drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include "mlx5.h"
  33 #include "mlx5_defs.h"
  34 #include "mlx5_glue.h"
  35 #include "mlx5_devx_cmds.h"
  36 #include "mlx5_flow.h"
  37 #include "mlx5_prm.h"
  38 #include "mlx5_rxtx.h"
  39
  40 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  41
  42 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  43 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  44 #endif
  45
  46 #ifndef HAVE_MLX5DV_DR_ESWITCH
  47 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  48 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  49 #endif
  50 #endif
  51
  52 #ifndef HAVE_MLX5DV_DR
  53 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  54 #endif
  55
  56 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  57                                           sizeof(struct rte_flow_item_ipv4))
  58 /* VLAN header definitions */
  59 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  60 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  61 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  62 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  63 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  64
  65 union flow_dv_attr {
  66         struct {
  67                 uint32_t valid:1;
  68                 uint32_t ipv4:1;
  69                 uint32_t ipv6:1;
  70                 uint32_t tcp:1;
  71                 uint32_t udp:1;
  72                 uint32_t reserved:27;
  73         };
  74         uint32_t attr;
  75 };
  76
  77 /**
  78  * Initialize flow attributes structure according to flow items' types.
  79  *
  80  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  81  * mode. For tunnel mode, the items to be modified are the outermost ones.
  82  *
  83  * @param[in] item
  84  *   Pointer to item specification.
  85  * @param[out] attr
  86  *   Pointer to flow attributes structure.
  87  */
  88 static void
  89 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  90 {
  91         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  92                 switch (item->type) {
  93                 case RTE_FLOW_ITEM_TYPE_IPV4:
  94                         if (!attr->ipv6)
  95                                 attr->ipv4 = 1;
  96                         break;
  97                 case RTE_FLOW_ITEM_TYPE_IPV6:
  98                         if (!attr->ipv4)
  99                                 attr->ipv6 = 1;
 100                         break;
 101                 case RTE_FLOW_ITEM_TYPE_UDP:
 102                         if (!attr->tcp)
 103                                 attr->udp = 1;
 104                         break;
 105                 case RTE_FLOW_ITEM_TYPE_TCP:
 106                         if (!attr->udp)
 107                                 attr->tcp = 1;
 108                         break;
 109                 default:
 110                         break;
 111                 }
 112         }
 113         attr->valid = 1;
 114 }
 115
 116 /**
 117  * Convert rte_mtr_color to mlx5 color.
 118  *
 119  * @param[in] rcol
 120  *   rte_mtr_color.
 121  *
 122  * @return
 123  *   mlx5 color.
 124  */
 125 static int
 126 rte_col_2_mlx5_col(enum rte_color rcol)
 127 {
 128         switch (rcol) {
 129         case RTE_COLOR_GREEN:
 130                 return MLX5_FLOW_COLOR_GREEN;
 131         case RTE_COLOR_YELLOW:
 132                 return MLX5_FLOW_COLOR_YELLOW;
 133         case RTE_COLOR_RED:
 134                 return MLX5_FLOW_COLOR_RED;
 135         default:
 136                 break;
 137         }
 138         return MLX5_FLOW_COLOR_UNDEFINED;
 139 }
 140
 141 struct field_modify_info {
 142         uint32_t size; /* Size of field in protocol header, in bytes. */
 143         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 144         enum mlx5_modification_field id;
 145 };
 146
 147 struct field_modify_info modify_eth[] = {
 148         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 149         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 150         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 151         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 152         {0, 0, 0},
 153 };
 154
 155 struct field_modify_info modify_vlan_out_first_vid[] = {
 156         /* Size in bits !!! */
 157         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 158         {0, 0, 0},
 159 };
 160
 161 struct field_modify_info modify_ipv4[] = {
 162         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 163         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 164         {4, 12, MLX5_MODI_OUT_SIPV4},
 165         {4, 16, MLX5_MODI_OUT_DIPV4},
 166         {0, 0, 0},
 167 };
 168
 169 struct field_modify_info modify_ipv6[] = {
 170         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 171         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 172         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 173         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 174         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 175         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 176         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 177         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 178         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 179         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 180         {0, 0, 0},
 181 };
 182
 183 struct field_modify_info modify_udp[] = {
 184         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 185         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 186         {0, 0, 0},
 187 };
 188
 189 struct field_modify_info modify_tcp[] = {
 190         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 191         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 192         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 193         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 194         {0, 0, 0},
 195 };
 196
 197 static void
 198 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 199                           uint8_t next_protocol, uint64_t *item_flags,
 200                           int *tunnel)
 201 {
 202         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 203                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 204         if (next_protocol == IPPROTO_IPIP) {
 205                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 206                 *tunnel = 1;
 207         }
 208         if (next_protocol == IPPROTO_IPV6) {
 209                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 210                 *tunnel = 1;
 211         }
 212 }
 213
 214 /**
 215  * Acquire the synchronizing object to protect multithreaded access
 216  * to shared dv context. Lock occurs only if context is actually
 217  * shared, i.e. we have multiport IB device and representors are
 218  * created.
 219  *
 220  * @param[in] dev
 221  *   Pointer to the rte_eth_dev structure.
 222  */
 223 static void
 224 flow_dv_shared_lock(struct rte_eth_dev *dev)
 225 {
 226         struct mlx5_priv *priv = dev->data->dev_private;
 227         struct mlx5_ibv_shared *sh = priv->sh;
 228
 229         if (sh->dv_refcnt > 1) {
 230                 int ret;
 231
 232                 ret = pthread_mutex_lock(&sh->dv_mutex);
 233                 assert(!ret);
 234                 (void)ret;
 235         }
 236 }
 237
 238 static void
 239 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 240 {
 241         struct mlx5_priv *priv = dev->data->dev_private;
 242         struct mlx5_ibv_shared *sh = priv->sh;
 243
 244         if (sh->dv_refcnt > 1) {
 245                 int ret;
 246
 247                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 248                 assert(!ret);
 249                 (void)ret;
 250         }
 251 }
 252
 253 /* Update VLAN's VID/PCP based on input rte_flow_action.
 254  *
 255  * @param[in] action
 256  *   Pointer to struct rte_flow_action.
 257  * @param[out] vlan
 258  *   Pointer to struct rte_vlan_hdr.
 259  */
 260 static void
 261 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 262                          struct rte_vlan_hdr *vlan)
 263 {
 264         uint16_t vlan_tci;
 265         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 266                 vlan_tci =
 267                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 268                                                action->conf)->vlan_pcp;
 269                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 270                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 271                 vlan->vlan_tci |= vlan_tci;
 272         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 273                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 274                 vlan->vlan_tci |= rte_be_to_cpu_16
 275                     (((const struct rte_flow_action_of_set_vlan_vid *)
 276                                              action->conf)->vlan_vid);
 277         }
 278 }
 279
 280 /**
 281  * Fetch 1, 2, 3 or 4 byte field from the byte array
 282  * and return as unsigned integer in host-endian format.
 283  *
 284  * @param[in] data
 285  *   Pointer to data array.
 286  * @param[in] size
 287  *   Size of field to extract.
 288  *
 289  * @return
 290  *   converted field in host endian format.
 291  */
 292 static inline uint32_t
 293 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 294 {
 295         uint32_t ret;
 296
 297         switch (size) {
 298         case 1:
 299                 ret = *data;
 300                 break;
 301         case 2:
 302                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 303                 break;
 304         case 3:
 305                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 306                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 307                 break;
 308         case 4:
 309                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 310                 break;
 311         default:
 312                 assert(false);
 313                 ret = 0;
 314                 break;
 315         }
 316         return ret;
 317 }
 318
 319 /**
 320  * Convert modify-header action to DV specification.
 321  *
 322  * Data length of each action is determined by provided field description
 323  * and the item mask. Data bit offset and width of each action is determined
 324  * by provided item mask.
 325  *
 326  * @param[in] item
 327  *   Pointer to item specification.
 328  * @param[in] field
 329  *   Pointer to field modification information.
 330  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 331  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 332  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 333  * @param[in] dcopy
 334  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 335  *   Negative offset value sets the same offset as source offset.
 336  *   size field is ignored, value is taken from source field.
 337  * @param[in,out] resource
 338  *   Pointer to the modify-header resource.
 339  * @param[in] type
 340  *   Type of modification.
 341  * @param[out] error
 342  *   Pointer to the error structure.
 343  *
 344  * @return
 345  *   0 on success, a negative errno value otherwise and rte_errno is set.
 346  */
 347 static int
 348 flow_dv_convert_modify_action(struct rte_flow_item *item,
 349                               struct field_modify_info *field,
 350                               struct field_modify_info *dcopy,
 351                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 352                               uint32_t type, struct rte_flow_error *error)
 353 {
 354         uint32_t i = resource->actions_num;
 355         struct mlx5_modification_cmd *actions = resource->actions;
 356
 357         /*
 358          * The item and mask are provided in big-endian format.
 359          * The fields should be presented as in big-endian format either.
 360          * Mask must be always present, it defines the actual field width.
 361          */
 362         assert(item->mask);
 363         assert(field->size);
 364         do {
 365                 unsigned int size_b;
 366                 unsigned int off_b;
 367                 uint32_t mask;
 368                 uint32_t data;
 369
 370                 if (i >= MLX5_MAX_MODIFY_NUM)
 371                         return rte_flow_error_set(error, EINVAL,
 372                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 373                                  "too many items to modify");
 374                 /* Fetch variable byte size mask from the array. */
 375                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 376                                            field->offset, field->size);
 377                 if (!mask) {
 378                         ++field;
 379                         continue;
 380                 }
 381                 /* Deduce actual data width in bits from mask value. */
 382                 off_b = rte_bsf32(mask);
 383                 size_b = sizeof(uint32_t) * CHAR_BIT -
 384                          off_b - __builtin_clz(mask);
 385                 assert(size_b);
 386                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 387                 actions[i].action_type = type;
 388                 actions[i].field = field->id;
 389                 actions[i].offset = off_b;
 390                 actions[i].length = size_b;
 391                 /* Convert entire record to expected big-endian format. */
 392                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 393                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 394                         assert(dcopy);
 395                         actions[i].dst_field = dcopy->id;
 396                         actions[i].dst_offset =
 397                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 398                         /* Convert entire record to big-endian format. */
 399                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 400                 } else {
 401                         assert(item->spec);
 402                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 403                                                    field->offset, field->size);
 404                         /* Shift out the trailing masked bits from data. */
 405                         data = (data & mask) >> off_b;
 406                         actions[i].data1 = rte_cpu_to_be_32(data);
 407                 }
 408                 ++i;
 409                 ++field;
 410         } while (field->size);
 411         if (resource->actions_num == i)
 412                 return rte_flow_error_set(error, EINVAL,
 413                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 414                                           "invalid modification flow item");
 415         resource->actions_num = i;
 416         return 0;
 417 }
 418
 419 /**
 420  * Convert modify-header set IPv4 address action to DV specification.
 421  *
 422  * @param[in,out] resource
 423  *   Pointer to the modify-header resource.
 424  * @param[in] action
 425  *   Pointer to action specification.
 426  * @param[out] error
 427  *   Pointer to the error structure.
 428  *
 429  * @return
 430  *   0 on success, a negative errno value otherwise and rte_errno is set.
 431  */
 432 static int
 433 flow_dv_convert_action_modify_ipv4
 434                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 435                          const struct rte_flow_action *action,
 436                          struct rte_flow_error *error)
 437 {
 438         const struct rte_flow_action_set_ipv4 *conf =
 439                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 440         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 441         struct rte_flow_item_ipv4 ipv4;
 442         struct rte_flow_item_ipv4 ipv4_mask;
 443
 444         memset(&ipv4, 0, sizeof(ipv4));
 445         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 446         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 447                 ipv4.hdr.src_addr = conf->ipv4_addr;
 448                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 449         } else {
 450                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 451                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 452         }
 453         item.spec = &ipv4;
 454         item.mask = &ipv4_mask;
 455         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 456                                              MLX5_MODIFICATION_TYPE_SET, error);
 457 }
 458
 459 /**
 460  * Convert modify-header set IPv6 address action to DV specification.
 461  *
 462  * @param[in,out] resource
 463  *   Pointer to the modify-header resource.
 464  * @param[in] action
 465  *   Pointer to action specification.
 466  * @param[out] error
 467  *   Pointer to the error structure.
 468  *
 469  * @return
 470  *   0 on success, a negative errno value otherwise and rte_errno is set.
 471  */
 472 static int
 473 flow_dv_convert_action_modify_ipv6
 474                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 475                          const struct rte_flow_action *action,
 476                          struct rte_flow_error *error)
 477 {
 478         const struct rte_flow_action_set_ipv6 *conf =
 479                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 480         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 481         struct rte_flow_item_ipv6 ipv6;
 482         struct rte_flow_item_ipv6 ipv6_mask;
 483
 484         memset(&ipv6, 0, sizeof(ipv6));
 485         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 486         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 487                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 488                        sizeof(ipv6.hdr.src_addr));
 489                 memcpy(&ipv6_mask.hdr.src_addr,
 490                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 491                        sizeof(ipv6.hdr.src_addr));
 492         } else {
 493                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 494                        sizeof(ipv6.hdr.dst_addr));
 495                 memcpy(&ipv6_mask.hdr.dst_addr,
 496                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 497                        sizeof(ipv6.hdr.dst_addr));
 498         }
 499         item.spec = &ipv6;
 500         item.mask = &ipv6_mask;
 501         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 502                                              MLX5_MODIFICATION_TYPE_SET, error);
 503 }
 504
 505 /**
 506  * Convert modify-header set MAC address action to DV specification.
 507  *
 508  * @param[in,out] resource
 509  *   Pointer to the modify-header resource.
 510  * @param[in] action
 511  *   Pointer to action specification.
 512  * @param[out] error
 513  *   Pointer to the error structure.
 514  *
 515  * @return
 516  *   0 on success, a negative errno value otherwise and rte_errno is set.
 517  */
 518 static int
 519 flow_dv_convert_action_modify_mac
 520                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 521                          const struct rte_flow_action *action,
 522                          struct rte_flow_error *error)
 523 {
 524         const struct rte_flow_action_set_mac *conf =
 525                 (const struct rte_flow_action_set_mac *)(action->conf);
 526         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 527         struct rte_flow_item_eth eth;
 528         struct rte_flow_item_eth eth_mask;
 529
 530         memset(&eth, 0, sizeof(eth));
 531         memset(&eth_mask, 0, sizeof(eth_mask));
 532         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 533                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 534                        sizeof(eth.src.addr_bytes));
 535                 memcpy(&eth_mask.src.addr_bytes,
 536                        &rte_flow_item_eth_mask.src.addr_bytes,
 537                        sizeof(eth_mask.src.addr_bytes));
 538         } else {
 539                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 540                        sizeof(eth.dst.addr_bytes));
 541                 memcpy(&eth_mask.dst.addr_bytes,
 542                        &rte_flow_item_eth_mask.dst.addr_bytes,
 543                        sizeof(eth_mask.dst.addr_bytes));
 544         }
 545         item.spec = &eth;
 546         item.mask = &eth_mask;
 547         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 548                                              MLX5_MODIFICATION_TYPE_SET, error);
 549 }
 550
 551 /**
 552  * Convert modify-header set VLAN VID action to DV specification.
 553  *
 554  * @param[in,out] resource
 555  *   Pointer to the modify-header resource.
 556  * @param[in] action
 557  *   Pointer to action specification.
 558  * @param[out] error
 559  *   Pointer to the error structure.
 560  *
 561  * @return
 562  *   0 on success, a negative errno value otherwise and rte_errno is set.
 563  */
 564 static int
 565 flow_dv_convert_action_modify_vlan_vid
 566                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 567                          const struct rte_flow_action *action,
 568                          struct rte_flow_error *error)
 569 {
 570         const struct rte_flow_action_of_set_vlan_vid *conf =
 571                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 572         int i = resource->actions_num;
 573         struct mlx5_modification_cmd *actions = &resource->actions[i];
 574         struct field_modify_info *field = modify_vlan_out_first_vid;
 575
 576         if (i >= MLX5_MAX_MODIFY_NUM)
 577                 return rte_flow_error_set(error, EINVAL,
 578                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 579                          "too many items to modify");
 580         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 581         actions[i].field = field->id;
 582         actions[i].length = field->size;
 583         actions[i].offset = field->offset;
 584         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 585         actions[i].data1 = conf->vlan_vid;
 586         actions[i].data1 = actions[i].data1 << 16;
 587         resource->actions_num = ++i;
 588         return 0;
 589 }
 590
 591 /**
 592  * Convert modify-header set TP action to DV specification.
 593  *
 594  * @param[in,out] resource
 595  *   Pointer to the modify-header resource.
 596  * @param[in] action
 597  *   Pointer to action specification.
 598  * @param[in] items
 599  *   Pointer to rte_flow_item objects list.
 600  * @param[in] attr
 601  *   Pointer to flow attributes structure.
 602  * @param[out] error
 603  *   Pointer to the error structure.
 604  *
 605  * @return
 606  *   0 on success, a negative errno value otherwise and rte_errno is set.
 607  */
 608 static int
 609 flow_dv_convert_action_modify_tp
 610                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 611                          const struct rte_flow_action *action,
 612                          const struct rte_flow_item *items,
 613                          union flow_dv_attr *attr,
 614                          struct rte_flow_error *error)
 615 {
 616         const struct rte_flow_action_set_tp *conf =
 617                 (const struct rte_flow_action_set_tp *)(action->conf);
 618         struct rte_flow_item item;
 619         struct rte_flow_item_udp udp;
 620         struct rte_flow_item_udp udp_mask;
 621         struct rte_flow_item_tcp tcp;
 622         struct rte_flow_item_tcp tcp_mask;
 623         struct field_modify_info *field;
 624
 625         if (!attr->valid)
 626                 flow_dv_attr_init(items, attr);
 627         if (attr->udp) {
 628                 memset(&udp, 0, sizeof(udp));
 629                 memset(&udp_mask, 0, sizeof(udp_mask));
 630                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 631                         udp.hdr.src_port = conf->port;
 632                         udp_mask.hdr.src_port =
 633                                         rte_flow_item_udp_mask.hdr.src_port;
 634                 } else {
 635                         udp.hdr.dst_port = conf->port;
 636                         udp_mask.hdr.dst_port =
 637                                         rte_flow_item_udp_mask.hdr.dst_port;
 638                 }
 639                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 640                 item.spec = &udp;
 641                 item.mask = &udp_mask;
 642                 field = modify_udp;
 643         }
 644         if (attr->tcp) {
 645                 memset(&tcp, 0, sizeof(tcp));
 646                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 647                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 648                         tcp.hdr.src_port = conf->port;
 649                         tcp_mask.hdr.src_port =
 650                                         rte_flow_item_tcp_mask.hdr.src_port;
 651                 } else {
 652                         tcp.hdr.dst_port = conf->port;
 653                         tcp_mask.hdr.dst_port =
 654                                         rte_flow_item_tcp_mask.hdr.dst_port;
 655                 }
 656                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 657                 item.spec = &tcp;
 658                 item.mask = &tcp_mask;
 659                 field = modify_tcp;
 660         }
 661         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 662                                              MLX5_MODIFICATION_TYPE_SET, error);
 663 }
 664
 665 /**
 666  * Convert modify-header set TTL action to DV specification.
 667  *
 668  * @param[in,out] resource
 669  *   Pointer to the modify-header resource.
 670  * @param[in] action
 671  *   Pointer to action specification.
 672  * @param[in] items
 673  *   Pointer to rte_flow_item objects list.
 674  * @param[in] attr
 675  *   Pointer to flow attributes structure.
 676  * @param[out] error
 677  *   Pointer to the error structure.
 678  *
 679  * @return
 680  *   0 on success, a negative errno value otherwise and rte_errno is set.
 681  */
 682 static int
 683 flow_dv_convert_action_modify_ttl
 684                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 685                          const struct rte_flow_action *action,
 686                          const struct rte_flow_item *items,
 687                          union flow_dv_attr *attr,
 688                          struct rte_flow_error *error)
 689 {
 690         const struct rte_flow_action_set_ttl *conf =
 691                 (const struct rte_flow_action_set_ttl *)(action->conf);
 692         struct rte_flow_item item;
 693         struct rte_flow_item_ipv4 ipv4;
 694         struct rte_flow_item_ipv4 ipv4_mask;
 695         struct rte_flow_item_ipv6 ipv6;
 696         struct rte_flow_item_ipv6 ipv6_mask;
 697         struct field_modify_info *field;
 698
 699         if (!attr->valid)
 700                 flow_dv_attr_init(items, attr);
 701         if (attr->ipv4) {
 702                 memset(&ipv4, 0, sizeof(ipv4));
 703                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 704                 ipv4.hdr.time_to_live = conf->ttl_value;
 705                 ipv4_mask.hdr.time_to_live = 0xFF;
 706                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 707                 item.spec = &ipv4;
 708                 item.mask = &ipv4_mask;
 709                 field = modify_ipv4;
 710         }
 711         if (attr->ipv6) {
 712                 memset(&ipv6, 0, sizeof(ipv6));
 713                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 714                 ipv6.hdr.hop_limits = conf->ttl_value;
 715                 ipv6_mask.hdr.hop_limits = 0xFF;
 716                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 717                 item.spec = &ipv6;
 718                 item.mask = &ipv6_mask;
 719                 field = modify_ipv6;
 720         }
 721         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 722                                              MLX5_MODIFICATION_TYPE_SET, error);
 723 }
 724
 725 /**
 726  * Convert modify-header decrement TTL action to DV specification.
 727  *
 728  * @param[in,out] resource
 729  *   Pointer to the modify-header resource.
 730  * @param[in] action
 731  *   Pointer to action specification.
 732  * @param[in] items
 733  *   Pointer to rte_flow_item objects list.
 734  * @param[in] attr
 735  *   Pointer to flow attributes structure.
 736  * @param[out] error
 737  *   Pointer to the error structure.
 738  *
 739  * @return
 740  *   0 on success, a negative errno value otherwise and rte_errno is set.
 741  */
 742 static int
 743 flow_dv_convert_action_modify_dec_ttl
 744                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 745                          const struct rte_flow_item *items,
 746                          union flow_dv_attr *attr,
 747                          struct rte_flow_error *error)
 748 {
 749         struct rte_flow_item item;
 750         struct rte_flow_item_ipv4 ipv4;
 751         struct rte_flow_item_ipv4 ipv4_mask;
 752         struct rte_flow_item_ipv6 ipv6;
 753         struct rte_flow_item_ipv6 ipv6_mask;
 754         struct field_modify_info *field;
 755
 756         if (!attr->valid)
 757                 flow_dv_attr_init(items, attr);
 758         if (attr->ipv4) {
 759                 memset(&ipv4, 0, sizeof(ipv4));
 760                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 761                 ipv4.hdr.time_to_live = 0xFF;
 762                 ipv4_mask.hdr.time_to_live = 0xFF;
 763                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 764                 item.spec = &ipv4;
 765                 item.mask = &ipv4_mask;
 766                 field = modify_ipv4;
 767         }
 768         if (attr->ipv6) {
 769                 memset(&ipv6, 0, sizeof(ipv6));
 770                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 771                 ipv6.hdr.hop_limits = 0xFF;
 772                 ipv6_mask.hdr.hop_limits = 0xFF;
 773                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 774                 item.spec = &ipv6;
 775                 item.mask = &ipv6_mask;
 776                 field = modify_ipv6;
 777         }
 778         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 779                                              MLX5_MODIFICATION_TYPE_ADD, error);
 780 }
 781
 782 /**
 783  * Convert modify-header increment/decrement TCP Sequence number
 784  * to DV specification.
 785  *
 786  * @param[in,out] resource
 787  *   Pointer to the modify-header resource.
 788  * @param[in] action
 789  *   Pointer to action specification.
 790  * @param[out] error
 791  *   Pointer to the error structure.
 792  *
 793  * @return
 794  *   0 on success, a negative errno value otherwise and rte_errno is set.
 795  */
 796 static int
 797 flow_dv_convert_action_modify_tcp_seq
 798                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 799                          const struct rte_flow_action *action,
 800                          struct rte_flow_error *error)
 801 {
 802         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 803         uint64_t value = rte_be_to_cpu_32(*conf);
 804         struct rte_flow_item item;
 805         struct rte_flow_item_tcp tcp;
 806         struct rte_flow_item_tcp tcp_mask;
 807
 808         memset(&tcp, 0, sizeof(tcp));
 809         memset(&tcp_mask, 0, sizeof(tcp_mask));
 810         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 811                 /*
 812                  * The HW has no decrement operation, only increment operation.
 813                  * To simulate decrement X from Y using increment operation
 814                  * we need to add UINT32_MAX X times to Y.
 815                  * Each adding of UINT32_MAX decrements Y by 1.
 816                  */
 817                 value *= UINT32_MAX;
 818         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 819         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 820         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 821         item.spec = &tcp;
 822         item.mask = &tcp_mask;
 823         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 824                                              MLX5_MODIFICATION_TYPE_ADD, error);
 825 }
 826
 827 /**
 828  * Convert modify-header increment/decrement TCP Acknowledgment number
 829  * to DV specification.
 830  *
 831  * @param[in,out] resource
 832  *   Pointer to the modify-header resource.
 833  * @param[in] action
 834  *   Pointer to action specification.
 835  * @param[out] error
 836  *   Pointer to the error structure.
 837  *
 838  * @return
 839  *   0 on success, a negative errno value otherwise and rte_errno is set.
 840  */
 841 static int
 842 flow_dv_convert_action_modify_tcp_ack
 843                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 844                          const struct rte_flow_action *action,
 845                          struct rte_flow_error *error)
 846 {
 847         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 848         uint64_t value = rte_be_to_cpu_32(*conf);
 849         struct rte_flow_item item;
 850         struct rte_flow_item_tcp tcp;
 851         struct rte_flow_item_tcp tcp_mask;
 852
 853         memset(&tcp, 0, sizeof(tcp));
 854         memset(&tcp_mask, 0, sizeof(tcp_mask));
 855         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 856                 /*
 857                  * The HW has no decrement operation, only increment operation.
 858                  * To simulate decrement X from Y using increment operation
 859                  * we need to add UINT32_MAX X times to Y.
 860                  * Each adding of UINT32_MAX decrements Y by 1.
 861                  */
 862                 value *= UINT32_MAX;
 863         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 864         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 865         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 866         item.spec = &tcp;
 867         item.mask = &tcp_mask;
 868         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 869                                              MLX5_MODIFICATION_TYPE_ADD, error);
 870 }
 871
 872 static enum mlx5_modification_field reg_to_field[] = {
 873         [REG_NONE] = MLX5_MODI_OUT_NONE,
 874         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 875         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 876         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 877         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 878         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 879         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 880         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 881         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 882         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 883         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 884 };
 885
 886 /**
 887  * Convert register set to DV specification.
 888  *
 889  * @param[in,out] resource
 890  *   Pointer to the modify-header resource.
 891  * @param[in] action
 892  *   Pointer to action specification.
 893  * @param[out] error
 894  *   Pointer to the error structure.
 895  *
 896  * @return
 897  *   0 on success, a negative errno value otherwise and rte_errno is set.
 898  */
 899 static int
 900 flow_dv_convert_action_set_reg
 901                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 902                          const struct rte_flow_action *action,
 903                          struct rte_flow_error *error)
 904 {
 905         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 906         struct mlx5_modification_cmd *actions = resource->actions;
 907         uint32_t i = resource->actions_num;
 908
 909         if (i >= MLX5_MAX_MODIFY_NUM)
 910                 return rte_flow_error_set(error, EINVAL,
 911                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 912                                           "too many items to modify");
 913         assert(conf->id != REG_NONE);
 914         assert(conf->id < RTE_DIM(reg_to_field));
 915         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 916         actions[i].field = reg_to_field[conf->id];
 917         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 918         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 919         ++i;
 920         resource->actions_num = i;
 921         return 0;
 922 }
 923
 924 /**
 925  * Convert SET_TAG action to DV specification.
 926  *
 927  * @param[in] dev
 928  *   Pointer to the rte_eth_dev structure.
 929  * @param[in,out] resource
 930  *   Pointer to the modify-header resource.
 931  * @param[in] conf
 932  *   Pointer to action specification.
 933  * @param[out] error
 934  *   Pointer to the error structure.
 935  *
 936  * @return
 937  *   0 on success, a negative errno value otherwise and rte_errno is set.
 938  */
 939 static int
 940 flow_dv_convert_action_set_tag
 941                         (struct rte_eth_dev *dev,
 942                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 943                          const struct rte_flow_action_set_tag *conf,
 944                          struct rte_flow_error *error)
 945 {
 946         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 947         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 948         struct rte_flow_item item = {
 949                 .spec = &data,
 950                 .mask = &mask,
 951         };
 952         struct field_modify_info reg_c_x[] = {
 953                 [1] = {0, 0, 0},
 954         };
 955         enum mlx5_modification_field reg_type;
 956         int ret;
 957
 958         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 959         if (ret < 0)
 960                 return ret;
 961         assert(ret != REG_NONE);
 962         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 963         reg_type = reg_to_field[ret];
 964         assert(reg_type > 0);
 965         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 966         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 967                                              MLX5_MODIFICATION_TYPE_SET, error);
 968 }
 969
 970 /**
 971  * Convert internal COPY_REG action to DV specification.
 972  *
 973  * @param[in] dev
 974  *   Pointer to the rte_eth_dev structure.
 975  * @param[in,out] res
 976  *   Pointer to the modify-header resource.
 977  * @param[in] action
 978  *   Pointer to action specification.
 979  * @param[out] error
 980  *   Pointer to the error structure.
 981  *
 982  * @return
 983  *   0 on success, a negative errno value otherwise and rte_errno is set.
 984  */
 985 static int
 986 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 987                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 988                                  const struct rte_flow_action *action,
 989                                  struct rte_flow_error *error)
 990 {
 991         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 992         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 993         struct rte_flow_item item = {
 994                 .spec = NULL,
 995                 .mask = &mask,
 996         };
 997         struct field_modify_info reg_src[] = {
 998                 {4, 0, reg_to_field[conf->src]},
 999                 {0, 0, 0},
1000         };
1001         struct field_modify_info reg_dst = {
1002                 .offset = 0,
1003                 .id = reg_to_field[conf->dst],
1004         };
1005         /* Adjust reg_c[0] usage according to reported mask. */
1006         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1007                 struct mlx5_priv *priv = dev->data->dev_private;
1008                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1009
1010                 assert(reg_c0);
1011                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1012                 if (conf->dst == REG_C_0) {
1013                         /* Copy to reg_c[0], within mask only. */
1014                         reg_dst.offset = rte_bsf32(reg_c0);
1015                         /*
1016                          * Mask is ignoring the enianness, because
1017                          * there is no conversion in datapath.
1018                          */
1019 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1020                         /* Copy from destination lower bits to reg_c[0]. */
1021                         mask = reg_c0 >> reg_dst.offset;
1022 #else
1023                         /* Copy from destination upper bits to reg_c[0]. */
1024                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1025                                           rte_fls_u32(reg_c0));
1026 #endif
1027                 } else {
1028                         mask = rte_cpu_to_be_32(reg_c0);
1029 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1030                         /* Copy from reg_c[0] to destination lower bits. */
1031                         reg_dst.offset = 0;
1032 #else
1033                         /* Copy from reg_c[0] to destination upper bits. */
1034                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1035                                          (rte_fls_u32(reg_c0) -
1036                                           rte_bsf32(reg_c0));
1037 #endif
1038                 }
1039         }
1040         return flow_dv_convert_modify_action(&item,
1041                                              reg_src, &reg_dst, res,
1042                                              MLX5_MODIFICATION_TYPE_COPY,
1043                                              error);
1044 }
1045
1046 /**
1047  * Convert MARK action to DV specification. This routine is used
1048  * in extensive metadata only and requires metadata register to be
1049  * handled. In legacy mode hardware tag resource is engaged.
1050  *
1051  * @param[in] dev
1052  *   Pointer to the rte_eth_dev structure.
1053  * @param[in] conf
1054  *   Pointer to MARK action specification.
1055  * @param[in,out] resource
1056  *   Pointer to the modify-header resource.
1057  * @param[out] error
1058  *   Pointer to the error structure.
1059  *
1060  * @return
1061  *   0 on success, a negative errno value otherwise and rte_errno is set.
1062  */
1063 static int
1064 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1065                             const struct rte_flow_action_mark *conf,
1066                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1067                             struct rte_flow_error *error)
1068 {
1069         struct mlx5_priv *priv = dev->data->dev_private;
1070         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1071                                            priv->sh->dv_mark_mask);
1072         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1073         struct rte_flow_item item = {
1074                 .spec = &data,
1075                 .mask = &mask,
1076         };
1077         struct field_modify_info reg_c_x[] = {
1078                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1079                 {0, 0, 0},
1080         };
1081         int reg;
1082
1083         if (!mask)
1084                 return rte_flow_error_set(error, EINVAL,
1085                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1086                                           NULL, "zero mark action mask");
1087         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1088         if (reg < 0)
1089                 return reg;
1090         assert(reg > 0);
1091         if (reg == REG_C_0) {
1092                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1093                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1094
1095                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1096                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1097                 mask = rte_cpu_to_be_32(mask << shl_c0);
1098         }
1099         reg_c_x[0].id = reg_to_field[reg];
1100         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1101                                              MLX5_MODIFICATION_TYPE_SET, error);
1102 }
1103
1104 /**
1105  * Get metadata register index for specified steering domain.
1106  *
1107  * @param[in] dev
1108  *   Pointer to the rte_eth_dev structure.
1109  * @param[in] attr
1110  *   Attributes of flow to determine steering domain.
1111  * @param[out] error
1112  *   Pointer to the error structure.
1113  *
1114  * @return
1115  *   positive index on success, a negative errno value otherwise
1116  *   and rte_errno is set.
1117  */
1118 static enum modify_reg
1119 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1120                          const struct rte_flow_attr *attr,
1121                          struct rte_flow_error *error)
1122 {
1123         int reg =
1124                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1125                                           MLX5_METADATA_FDB :
1126                                             attr->egress ?
1127                                             MLX5_METADATA_TX :
1128                                             MLX5_METADATA_RX, 0, error);
1129         if (reg < 0)
1130                 return rte_flow_error_set(error,
1131                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1132                                           NULL, "unavailable "
1133                                           "metadata register");
1134         return reg;
1135 }
1136
1137 /**
1138  * Convert SET_META action to DV specification.
1139  *
1140  * @param[in] dev
1141  *   Pointer to the rte_eth_dev structure.
1142  * @param[in,out] resource
1143  *   Pointer to the modify-header resource.
1144  * @param[in] attr
1145  *   Attributes of flow that includes this item.
1146  * @param[in] conf
1147  *   Pointer to action specification.
1148  * @param[out] error
1149  *   Pointer to the error structure.
1150  *
1151  * @return
1152  *   0 on success, a negative errno value otherwise and rte_errno is set.
1153  */
1154 static int
1155 flow_dv_convert_action_set_meta
1156                         (struct rte_eth_dev *dev,
1157                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1158                          const struct rte_flow_attr *attr,
1159                          const struct rte_flow_action_set_meta *conf,
1160                          struct rte_flow_error *error)
1161 {
1162         uint32_t data = conf->data;
1163         uint32_t mask = conf->mask;
1164         struct rte_flow_item item = {
1165                 .spec = &data,
1166                 .mask = &mask,
1167         };
1168         struct field_modify_info reg_c_x[] = {
1169                 [1] = {0, 0, 0},
1170         };
1171         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1172
1173         if (reg < 0)
1174                 return reg;
1175         /*
1176          * In datapath code there is no endianness
1177          * coversions for perfromance reasons, all
1178          * pattern conversions are done in rte_flow.
1179          */
1180         if (reg == REG_C_0) {
1181                 struct mlx5_priv *priv = dev->data->dev_private;
1182                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1183                 uint32_t shl_c0;
1184
1185                 assert(msk_c0);
1186 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1187                 shl_c0 = rte_bsf32(msk_c0);
1188 #else
1189                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1190 #endif
1191                 mask <<= shl_c0;
1192                 data <<= shl_c0;
1193                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1194         }
1195         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1196         /* The routine expects parameters in memory as big-endian ones. */
1197         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1198                                              MLX5_MODIFICATION_TYPE_SET, error);
1199 }
1200
1201 /**
1202  * Convert modify-header set IPv4 DSCP action to DV specification.
1203  *
1204  * @param[in,out] resource
1205  *   Pointer to the modify-header resource.
1206  * @param[in] action
1207  *   Pointer to action specification.
1208  * @param[out] error
1209  *   Pointer to the error structure.
1210  *
1211  * @return
1212  *   0 on success, a negative errno value otherwise and rte_errno is set.
1213  */
1214 static int
1215 flow_dv_convert_action_modify_ipv4_dscp
1216                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1217                          const struct rte_flow_action *action,
1218                          struct rte_flow_error *error)
1219 {
1220         const struct rte_flow_action_set_dscp *conf =
1221                 (const struct rte_flow_action_set_dscp *)(action->conf);
1222         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1223         struct rte_flow_item_ipv4 ipv4;
1224         struct rte_flow_item_ipv4 ipv4_mask;
1225
1226         memset(&ipv4, 0, sizeof(ipv4));
1227         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1228         ipv4.hdr.type_of_service = conf->dscp;
1229         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1230         item.spec = &ipv4;
1231         item.mask = &ipv4_mask;
1232         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1233                                              MLX5_MODIFICATION_TYPE_SET, error);
1234 }
1235
1236 /**
1237  * Convert modify-header set IPv6 DSCP action to DV specification.
1238  *
1239  * @param[in,out] resource
1240  *   Pointer to the modify-header resource.
1241  * @param[in] action
1242  *   Pointer to action specification.
1243  * @param[out] error
1244  *   Pointer to the error structure.
1245  *
1246  * @return
1247  *   0 on success, a negative errno value otherwise and rte_errno is set.
1248  */
1249 static int
1250 flow_dv_convert_action_modify_ipv6_dscp
1251                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1252                          const struct rte_flow_action *action,
1253                          struct rte_flow_error *error)
1254 {
1255         const struct rte_flow_action_set_dscp *conf =
1256                 (const struct rte_flow_action_set_dscp *)(action->conf);
1257         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1258         struct rte_flow_item_ipv6 ipv6;
1259         struct rte_flow_item_ipv6 ipv6_mask;
1260
1261         memset(&ipv6, 0, sizeof(ipv6));
1262         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1263         /*
1264          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1265          * rdma-core only accept the DSCP bits byte aligned start from
1266          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1267          * bits in IPv6 case as rdma-core requires byte aligned value.
1268          */
1269         ipv6.hdr.vtc_flow = conf->dscp;
1270         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1271         item.spec = &ipv6;
1272         item.mask = &ipv6_mask;
1273         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1274                                              MLX5_MODIFICATION_TYPE_SET, error);
1275 }
1276
1277 /**
1278  * Validate MARK item.
1279  *
1280  * @param[in] dev
1281  *   Pointer to the rte_eth_dev structure.
1282  * @param[in] item
1283  *   Item specification.
1284  * @param[in] attr
1285  *   Attributes of flow that includes this item.
1286  * @param[out] error
1287  *   Pointer to error structure.
1288  *
1289  * @return
1290  *   0 on success, a negative errno value otherwise and rte_errno is set.
1291  */
1292 static int
1293 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1294                            const struct rte_flow_item *item,
1295                            const struct rte_flow_attr *attr __rte_unused,
1296                            struct rte_flow_error *error)
1297 {
1298         struct mlx5_priv *priv = dev->data->dev_private;
1299         struct mlx5_dev_config *config = &priv->config;
1300         const struct rte_flow_item_mark *spec = item->spec;
1301         const struct rte_flow_item_mark *mask = item->mask;
1302         const struct rte_flow_item_mark nic_mask = {
1303                 .id = priv->sh->dv_mark_mask,
1304         };
1305         int ret;
1306
1307         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1308                 return rte_flow_error_set(error, ENOTSUP,
1309                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1310                                           "extended metadata feature"
1311                                           " isn't enabled");
1312         if (!mlx5_flow_ext_mreg_supported(dev))
1313                 return rte_flow_error_set(error, ENOTSUP,
1314                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1315                                           "extended metadata register"
1316                                           " isn't supported");
1317         if (!nic_mask.id)
1318                 return rte_flow_error_set(error, ENOTSUP,
1319                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1320                                           "extended metadata register"
1321                                           " isn't available");
1322         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1323         if (ret < 0)
1324                 return ret;
1325         if (!spec)
1326                 return rte_flow_error_set(error, EINVAL,
1327                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1328                                           item->spec,
1329                                           "data cannot be empty");
1330         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1331                 return rte_flow_error_set(error, EINVAL,
1332                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1333                                           &spec->id,
1334                                           "mark id exceeds the limit");
1335         if (!mask)
1336                 mask = &nic_mask;
1337         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1338                                         (const uint8_t *)&nic_mask,
1339                                         sizeof(struct rte_flow_item_mark),
1340                                         error);
1341         if (ret < 0)
1342                 return ret;
1343         return 0;
1344 }
1345
1346 /**
1347  * Validate META item.
1348  *
1349  * @param[in] dev
1350  *   Pointer to the rte_eth_dev structure.
1351  * @param[in] item
1352  *   Item specification.
1353  * @param[in] attr
1354  *   Attributes of flow that includes this item.
1355  * @param[out] error
1356  *   Pointer to error structure.
1357  *
1358  * @return
1359  *   0 on success, a negative errno value otherwise and rte_errno is set.
1360  */
1361 static int
1362 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1363                            const struct rte_flow_item *item,
1364                            const struct rte_flow_attr *attr,
1365                            struct rte_flow_error *error)
1366 {
1367         struct mlx5_priv *priv = dev->data->dev_private;
1368         struct mlx5_dev_config *config = &priv->config;
1369         const struct rte_flow_item_meta *spec = item->spec;
1370         const struct rte_flow_item_meta *mask = item->mask;
1371         struct rte_flow_item_meta nic_mask = {
1372                 .data = UINT32_MAX
1373         };
1374         int reg;
1375         int ret;
1376
1377         if (!spec)
1378                 return rte_flow_error_set(error, EINVAL,
1379                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1380                                           item->spec,
1381                                           "data cannot be empty");
1382         if (!spec->data)
1383                 return rte_flow_error_set(error, EINVAL,
1384                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1385                                           "data cannot be zero");
1386         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1387                 if (!mlx5_flow_ext_mreg_supported(dev))
1388                         return rte_flow_error_set(error, ENOTSUP,
1389                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1390                                           "extended metadata register"
1391                                           " isn't supported");
1392                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1393                 if (reg < 0)
1394                         return reg;
1395                 if (reg == REG_B)
1396                         return rte_flow_error_set(error, ENOTSUP,
1397                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1398                                           "match on reg_b "
1399                                           "isn't supported");
1400                 if (reg != REG_A)
1401                         nic_mask.data = priv->sh->dv_meta_mask;
1402         }
1403         if (!mask)
1404                 mask = &rte_flow_item_meta_mask;
1405         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1406                                         (const uint8_t *)&nic_mask,
1407                                         sizeof(struct rte_flow_item_meta),
1408                                         error);
1409         return ret;
1410 }
1411
1412 /**
1413  * Validate TAG item.
1414  *
1415  * @param[in] dev
1416  *   Pointer to the rte_eth_dev structure.
1417  * @param[in] item
1418  *   Item specification.
1419  * @param[in] attr
1420  *   Attributes of flow that includes this item.
1421  * @param[out] error
1422  *   Pointer to error structure.
1423  *
1424  * @return
1425  *   0 on success, a negative errno value otherwise and rte_errno is set.
1426  */
1427 static int
1428 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1429                           const struct rte_flow_item *item,
1430                           const struct rte_flow_attr *attr __rte_unused,
1431                           struct rte_flow_error *error)
1432 {
1433         const struct rte_flow_item_tag *spec = item->spec;
1434         const struct rte_flow_item_tag *mask = item->mask;
1435         const struct rte_flow_item_tag nic_mask = {
1436                 .data = RTE_BE32(UINT32_MAX),
1437                 .index = 0xff,
1438         };
1439         int ret;
1440
1441         if (!mlx5_flow_ext_mreg_supported(dev))
1442                 return rte_flow_error_set(error, ENOTSUP,
1443                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1444                                           "extensive metadata register"
1445                                           " isn't supported");
1446         if (!spec)
1447                 return rte_flow_error_set(error, EINVAL,
1448                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1449                                           item->spec,
1450                                           "data cannot be empty");
1451         if (!mask)
1452                 mask = &rte_flow_item_tag_mask;
1453         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1454                                         (const uint8_t *)&nic_mask,
1455                                         sizeof(struct rte_flow_item_tag),
1456                                         error);
1457         if (ret < 0)
1458                 return ret;
1459         if (mask->index != 0xff)
1460                 return rte_flow_error_set(error, EINVAL,
1461                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1462                                           "partial mask for tag index"
1463                                           " is not supported");
1464         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1465         if (ret < 0)
1466                 return ret;
1467         assert(ret != REG_NONE);
1468         return 0;
1469 }
1470
1471 /**
1472  * Validate vport item.
1473  *
1474  * @param[in] dev
1475  *   Pointer to the rte_eth_dev structure.
1476  * @param[in] item
1477  *   Item specification.
1478  * @param[in] attr
1479  *   Attributes of flow that includes this item.
1480  * @param[in] item_flags
1481  *   Bit-fields that holds the items detected until now.
1482  * @param[out] error
1483  *   Pointer to error structure.
1484  *
1485  * @return
1486  *   0 on success, a negative errno value otherwise and rte_errno is set.
1487  */
1488 static int
1489 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1490                               const struct rte_flow_item *item,
1491                               const struct rte_flow_attr *attr,
1492                               uint64_t item_flags,
1493                               struct rte_flow_error *error)
1494 {
1495         const struct rte_flow_item_port_id *spec = item->spec;
1496         const struct rte_flow_item_port_id *mask = item->mask;
1497         const struct rte_flow_item_port_id switch_mask = {
1498                         .id = 0xffffffff,
1499         };
1500         struct mlx5_priv *esw_priv;
1501         struct mlx5_priv *dev_priv;
1502         int ret;
1503
1504         if (!attr->transfer)
1505                 return rte_flow_error_set(error, EINVAL,
1506                                           RTE_FLOW_ERROR_TYPE_ITEM,
1507                                           NULL,
1508                                           "match on port id is valid only"
1509                                           " when transfer flag is enabled");
1510         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1511                 return rte_flow_error_set(error, ENOTSUP,
1512                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1513                                           "multiple source ports are not"
1514                                           " supported");
1515         if (!mask)
1516                 mask = &switch_mask;
1517         if (mask->id != 0xffffffff)
1518                 return rte_flow_error_set(error, ENOTSUP,
1519                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1520                                            mask,
1521                                            "no support for partial mask on"
1522                                            " \"id\" field");
1523         ret = mlx5_flow_item_acceptable
1524                                 (item, (const uint8_t *)mask,
1525                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1526                                  sizeof(struct rte_flow_item_port_id),
1527                                  error);
1528         if (ret)
1529                 return ret;
1530         if (!spec)
1531                 return 0;
1532         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1533         if (!esw_priv)
1534                 return rte_flow_error_set(error, rte_errno,
1535                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1536                                           "failed to obtain E-Switch info for"
1537                                           " port");
1538         dev_priv = mlx5_dev_to_eswitch_info(dev);
1539         if (!dev_priv)
1540                 return rte_flow_error_set(error, rte_errno,
1541                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1542                                           NULL,
1543                                           "failed to obtain E-Switch info");
1544         if (esw_priv->domain_id != dev_priv->domain_id)
1545                 return rte_flow_error_set(error, EINVAL,
1546                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1547                                           "cannot match on a port from a"
1548                                           " different E-Switch");
1549         return 0;
1550 }
1551
1552 /**
1553  * Validate GTP item.
1554  *
1555  * @param[in] dev
1556  *   Pointer to the rte_eth_dev structure.
1557  * @param[in] item
1558  *   Item specification.
1559  * @param[in] item_flags
1560  *   Bit-fields that holds the items detected until now.
1561  * @param[out] error
1562  *   Pointer to error structure.
1563  *
1564  * @return
1565  *   0 on success, a negative errno value otherwise and rte_errno is set.
1566  */
1567 static int
1568 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1569                           const struct rte_flow_item *item,
1570                           uint64_t item_flags,
1571                           struct rte_flow_error *error)
1572 {
1573         struct mlx5_priv *priv = dev->data->dev_private;
1574         const struct rte_flow_item_gtp *mask = item->mask;
1575         const struct rte_flow_item_gtp nic_mask = {
1576                 .msg_type = 0xff,
1577                 .teid = RTE_BE32(0xffffffff),
1578         };
1579
1580         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1581                 return rte_flow_error_set(error, ENOTSUP,
1582                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1583                                           "GTP support is not enabled");
1584         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1585                 return rte_flow_error_set(error, ENOTSUP,
1586                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1587                                           "multiple tunnel layers not"
1588                                           " supported");
1589         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1590                 return rte_flow_error_set(error, EINVAL,
1591                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1592                                           "no outer UDP layer found");
1593         if (!mask)
1594                 mask = &rte_flow_item_gtp_mask;
1595         return mlx5_flow_item_acceptable
1596                 (item, (const uint8_t *)mask,
1597                  (const uint8_t *)&nic_mask,
1598                  sizeof(struct rte_flow_item_gtp),
1599                  error);
1600 }
1601
1602 /**
1603  * Validate the pop VLAN action.
1604  *
1605  * @param[in] dev
1606  *   Pointer to the rte_eth_dev structure.
1607  * @param[in] action_flags
1608  *   Holds the actions detected until now.
1609  * @param[in] action
1610  *   Pointer to the pop vlan action.
1611  * @param[in] item_flags
1612  *   The items found in this flow rule.
1613  * @param[in] attr
1614  *   Pointer to flow attributes.
1615  * @param[out] error
1616  *   Pointer to error structure.
1617  *
1618  * @return
1619  *   0 on success, a negative errno value otherwise and rte_errno is set.
1620  */
1621 static int
1622 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1623                                  uint64_t action_flags,
1624                                  const struct rte_flow_action *action,
1625                                  uint64_t item_flags,
1626                                  const struct rte_flow_attr *attr,
1627                                  struct rte_flow_error *error)
1628 {
1629         struct mlx5_priv *priv = dev->data->dev_private;
1630
1631         (void)action;
1632         (void)attr;
1633         if (!priv->sh->pop_vlan_action)
1634                 return rte_flow_error_set(error, ENOTSUP,
1635                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1636                                           NULL,
1637                                           "pop vlan action is not supported");
1638         if (attr->egress)
1639                 return rte_flow_error_set(error, ENOTSUP,
1640                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1641                                           NULL,
1642                                           "pop vlan action not supported for "
1643                                           "egress");
1644         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1645                 return rte_flow_error_set(error, ENOTSUP,
1646                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1647                                           "no support for multiple VLAN "
1648                                           "actions");
1649         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1650                 return rte_flow_error_set(error, ENOTSUP,
1651                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1652                                           NULL,
1653                                           "cannot pop vlan without a "
1654                                           "match on (outer) vlan in the flow");
1655         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1656                 return rte_flow_error_set(error, EINVAL,
1657                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1658                                           "wrong action order, port_id should "
1659                                           "be after pop VLAN action");
1660         return 0;
1661 }
1662
1663 /**
1664  * Get VLAN default info from vlan match info.
1665  *
1666  * @param[in] items
1667  *   the list of item specifications.
1668  * @param[out] vlan
1669  *   pointer VLAN info to fill to.
1670  *
1671  * @return
1672  *   0 on success, a negative errno value otherwise and rte_errno is set.
1673  */
1674 static void
1675 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1676                                   struct rte_vlan_hdr *vlan)
1677 {
1678         const struct rte_flow_item_vlan nic_mask = {
1679                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1680                                 MLX5DV_FLOW_VLAN_VID_MASK),
1681                 .inner_type = RTE_BE16(0xffff),
1682         };
1683
1684         if (items == NULL)
1685                 return;
1686         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1687                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1688                 ;
1689         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1690                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1691                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1692
1693                 if (!vlan_m)
1694                         vlan_m = &nic_mask;
1695                 /* Only full match values are accepted */
1696                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1697                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1698                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1699                         vlan->vlan_tci |=
1700                                 rte_be_to_cpu_16(vlan_v->tci &
1701                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1702                 }
1703                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1704                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1705                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1706                         vlan->vlan_tci |=
1707                                 rte_be_to_cpu_16(vlan_v->tci &
1708                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1709                 }
1710                 if (vlan_m->inner_type == nic_mask.inner_type)
1711                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1712                                                            vlan_m->inner_type);
1713         }
1714 }
1715
1716 /**
1717  * Validate the push VLAN action.
1718  *
1719  * @param[in] action_flags
1720  *   Holds the actions detected until now.
1721  * @param[in] item_flags
1722  *   The items found in this flow rule.
1723  * @param[in] action
1724  *   Pointer to the action structure.
1725  * @param[in] attr
1726  *   Pointer to flow attributes
1727  * @param[out] error
1728  *   Pointer to error structure.
1729  *
1730  * @return
1731  *   0 on success, a negative errno value otherwise and rte_errno is set.
1732  */
1733 static int
1734 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1735                                   uint64_t item_flags __rte_unused,
1736                                   const struct rte_flow_action *action,
1737                                   const struct rte_flow_attr *attr,
1738                                   struct rte_flow_error *error)
1739 {
1740         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1741
1742         if (attr->ingress)
1743                 return rte_flow_error_set(error, ENOTSUP,
1744                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1745                                           NULL,
1746                                           "push VLAN action not supported for "
1747                                           "ingress");
1748         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1749             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1750                 return rte_flow_error_set(error, EINVAL,
1751                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1752                                           "invalid vlan ethertype");
1753         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1754                 return rte_flow_error_set(error, ENOTSUP,
1755                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1756                                           "no support for multiple VLAN "
1757                                           "actions");
1758         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1759                 return rte_flow_error_set(error, EINVAL,
1760                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1761                                           "wrong action order, port_id should "
1762                                           "be after push VLAN");
1763         (void)attr;
1764         return 0;
1765 }
1766
1767 /**
1768  * Validate the set VLAN PCP.
1769  *
1770  * @param[in] action_flags
1771  *   Holds the actions detected until now.
1772  * @param[in] actions
1773  *   Pointer to the list of actions remaining in the flow rule.
1774  * @param[out] error
1775  *   Pointer to error structure.
1776  *
1777  * @return
1778  *   0 on success, a negative errno value otherwise and rte_errno is set.
1779  */
1780 static int
1781 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1782                                      const struct rte_flow_action actions[],
1783                                      struct rte_flow_error *error)
1784 {
1785         const struct rte_flow_action *action = actions;
1786         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1787
1788         if (conf->vlan_pcp > 7)
1789                 return rte_flow_error_set(error, EINVAL,
1790                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1791                                           "VLAN PCP value is too big");
1792         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1793                 return rte_flow_error_set(error, ENOTSUP,
1794                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1795                                           "set VLAN PCP action must follow "
1796                                           "the push VLAN action");
1797         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1798                 return rte_flow_error_set(error, ENOTSUP,
1799                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1800                                           "Multiple VLAN PCP modification are "
1801                                           "not supported");
1802         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1803                 return rte_flow_error_set(error, EINVAL,
1804                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1805                                           "wrong action order, port_id should "
1806                                           "be after set VLAN PCP");
1807         return 0;
1808 }
1809
1810 /**
1811  * Validate the set VLAN VID.
1812  *
1813  * @param[in] item_flags
1814  *   Holds the items detected in this rule.
1815  * @param[in] action_flags
1816  *   Holds the actions detected until now.
1817  * @param[in] actions
1818  *   Pointer to the list of actions remaining in the flow rule.
1819  * @param[out] error
1820  *   Pointer to error structure.
1821  *
1822  * @return
1823  *   0 on success, a negative errno value otherwise and rte_errno is set.
1824  */
1825 static int
1826 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1827                                      uint64_t action_flags,
1828                                      const struct rte_flow_action actions[],
1829                                      struct rte_flow_error *error)
1830 {
1831         const struct rte_flow_action *action = actions;
1832         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1833
1834         if (conf->vlan_vid > RTE_BE16(0xFFE))
1835                 return rte_flow_error_set(error, EINVAL,
1836                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1837                                           "VLAN VID value is too big");
1838         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1839             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1840                 return rte_flow_error_set(error, ENOTSUP,
1841                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1842                                           "set VLAN VID action must follow push"
1843                                           " VLAN action or match on VLAN item");
1844         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1845                 return rte_flow_error_set(error, ENOTSUP,
1846                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1847                                           "Multiple VLAN VID modifications are "
1848                                           "not supported");
1849         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1850                 return rte_flow_error_set(error, EINVAL,
1851                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1852                                           "wrong action order, port_id should "
1853                                           "be after set VLAN VID");
1854         return 0;
1855 }
1856
1857 /*
1858  * Validate the FLAG action.
1859  *
1860  * @param[in] dev
1861  *   Pointer to the rte_eth_dev structure.
1862  * @param[in] action_flags
1863  *   Holds the actions detected until now.
1864  * @param[in] attr
1865  *   Pointer to flow attributes
1866  * @param[out] error
1867  *   Pointer to error structure.
1868  *
1869  * @return
1870  *   0 on success, a negative errno value otherwise and rte_errno is set.
1871  */
1872 static int
1873 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1874                              uint64_t action_flags,
1875                              const struct rte_flow_attr *attr,
1876                              struct rte_flow_error *error)
1877 {
1878         struct mlx5_priv *priv = dev->data->dev_private;
1879         struct mlx5_dev_config *config = &priv->config;
1880         int ret;
1881
1882         /* Fall back if no extended metadata register support. */
1883         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1884                 return mlx5_flow_validate_action_flag(action_flags, attr,
1885                                                       error);
1886         /* Extensive metadata mode requires registers. */
1887         if (!mlx5_flow_ext_mreg_supported(dev))
1888                 return rte_flow_error_set(error, ENOTSUP,
1889                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1890                                           "no metadata registers "
1891                                           "to support flag action");
1892         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1893                 return rte_flow_error_set(error, ENOTSUP,
1894                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1895                                           "extended metadata register"
1896                                           " isn't available");
1897         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1898         if (ret < 0)
1899                 return ret;
1900         assert(ret > 0);
1901         if (action_flags & MLX5_FLOW_ACTION_MARK)
1902                 return rte_flow_error_set(error, EINVAL,
1903                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1904                                           "can't mark and flag in same flow");
1905         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1906                 return rte_flow_error_set(error, EINVAL,
1907                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1908                                           "can't have 2 flag"
1909                                           " actions in same flow");
1910         return 0;
1911 }
1912
1913 /**
1914  * Validate MARK action.
1915  *
1916  * @param[in] dev
1917  *   Pointer to the rte_eth_dev structure.
1918  * @param[in] action
1919  *   Pointer to action.
1920  * @param[in] action_flags
1921  *   Holds the actions detected until now.
1922  * @param[in] attr
1923  *   Pointer to flow attributes
1924  * @param[out] error
1925  *   Pointer to error structure.
1926  *
1927  * @return
1928  *   0 on success, a negative errno value otherwise and rte_errno is set.
1929  */
1930 static int
1931 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1932                              const struct rte_flow_action *action,
1933                              uint64_t action_flags,
1934                              const struct rte_flow_attr *attr,
1935                              struct rte_flow_error *error)
1936 {
1937         struct mlx5_priv *priv = dev->data->dev_private;
1938         struct mlx5_dev_config *config = &priv->config;
1939         const struct rte_flow_action_mark *mark = action->conf;
1940         int ret;
1941
1942         /* Fall back if no extended metadata register support. */
1943         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1944                 return mlx5_flow_validate_action_mark(action, action_flags,
1945                                                       attr, error);
1946         /* Extensive metadata mode requires registers. */
1947         if (!mlx5_flow_ext_mreg_supported(dev))
1948                 return rte_flow_error_set(error, ENOTSUP,
1949                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1950                                           "no metadata registers "
1951                                           "to support mark action");
1952         if (!priv->sh->dv_mark_mask)
1953                 return rte_flow_error_set(error, ENOTSUP,
1954                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1955                                           "extended metadata register"
1956                                           " isn't available");
1957         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1958         if (ret < 0)
1959                 return ret;
1960         assert(ret > 0);
1961         if (!mark)
1962                 return rte_flow_error_set(error, EINVAL,
1963                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1964                                           "configuration cannot be null");
1965         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1966                 return rte_flow_error_set(error, EINVAL,
1967                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1968                                           &mark->id,
1969                                           "mark id exceeds the limit");
1970         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1971                 return rte_flow_error_set(error, EINVAL,
1972                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1973                                           "can't flag and mark in same flow");
1974         if (action_flags & MLX5_FLOW_ACTION_MARK)
1975                 return rte_flow_error_set(error, EINVAL,
1976                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1977                                           "can't have 2 mark actions in same"
1978                                           " flow");
1979         return 0;
1980 }
1981
1982 /**
1983  * Validate SET_META action.
1984  *
1985  * @param[in] dev
1986  *   Pointer to the rte_eth_dev structure.
1987  * @param[in] action
1988  *   Pointer to the action structure.
1989  * @param[in] action_flags
1990  *   Holds the actions detected until now.
1991  * @param[in] attr
1992  *   Pointer to flow attributes
1993  * @param[out] error
1994  *   Pointer to error structure.
1995  *
1996  * @return
1997  *   0 on success, a negative errno value otherwise and rte_errno is set.
1998  */
1999 static int
2000 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2001                                  const struct rte_flow_action *action,
2002                                  uint64_t action_flags __rte_unused,
2003                                  const struct rte_flow_attr *attr,
2004                                  struct rte_flow_error *error)
2005 {
2006         const struct rte_flow_action_set_meta *conf;
2007         uint32_t nic_mask = UINT32_MAX;
2008         int reg;
2009
2010         if (!mlx5_flow_ext_mreg_supported(dev))
2011                 return rte_flow_error_set(error, ENOTSUP,
2012                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2013                                           "extended metadata register"
2014                                           " isn't supported");
2015         reg = flow_dv_get_metadata_reg(dev, attr, error);
2016         if (reg < 0)
2017                 return reg;
2018         if (reg != REG_A && reg != REG_B) {
2019                 struct mlx5_priv *priv = dev->data->dev_private;
2020
2021                 nic_mask = priv->sh->dv_meta_mask;
2022         }
2023         if (!(action->conf))
2024                 return rte_flow_error_set(error, EINVAL,
2025                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2026                                           "configuration cannot be null");
2027         conf = (const struct rte_flow_action_set_meta *)action->conf;
2028         if (!conf->mask)
2029                 return rte_flow_error_set(error, EINVAL,
2030                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2031                                           "zero mask doesn't have any effect");
2032         if (conf->mask & ~nic_mask)
2033                 return rte_flow_error_set(error, EINVAL,
2034                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2035                                           "meta data must be within reg C0");
2036         if (!(conf->data & conf->mask))
2037                 return rte_flow_error_set(error, EINVAL,
2038                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2039                                           "zero value has no effect");
2040         return 0;
2041 }
2042
2043 /**
2044  * Validate SET_TAG action.
2045  *
2046  * @param[in] dev
2047  *   Pointer to the rte_eth_dev structure.
2048  * @param[in] action
2049  *   Pointer to the action structure.
2050  * @param[in] action_flags
2051  *   Holds the actions detected until now.
2052  * @param[in] attr
2053  *   Pointer to flow attributes
2054  * @param[out] error
2055  *   Pointer to error structure.
2056  *
2057  * @return
2058  *   0 on success, a negative errno value otherwise and rte_errno is set.
2059  */
2060 static int
2061 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2062                                 const struct rte_flow_action *action,
2063                                 uint64_t action_flags,
2064                                 const struct rte_flow_attr *attr,
2065                                 struct rte_flow_error *error)
2066 {
2067         const struct rte_flow_action_set_tag *conf;
2068         const uint64_t terminal_action_flags =
2069                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2070                 MLX5_FLOW_ACTION_RSS;
2071         int ret;
2072
2073         if (!mlx5_flow_ext_mreg_supported(dev))
2074                 return rte_flow_error_set(error, ENOTSUP,
2075                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2076                                           "extensive metadata register"
2077                                           " isn't supported");
2078         if (!(action->conf))
2079                 return rte_flow_error_set(error, EINVAL,
2080                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2081                                           "configuration cannot be null");
2082         conf = (const struct rte_flow_action_set_tag *)action->conf;
2083         if (!conf->mask)
2084                 return rte_flow_error_set(error, EINVAL,
2085                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2086                                           "zero mask doesn't have any effect");
2087         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2088         if (ret < 0)
2089                 return ret;
2090         if (!attr->transfer && attr->ingress &&
2091             (action_flags & terminal_action_flags))
2092                 return rte_flow_error_set(error, EINVAL,
2093                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2094                                           "set_tag has no effect"
2095                                           " with terminal actions");
2096         return 0;
2097 }
2098
2099 /**
2100  * Validate count action.
2101  *
2102  * @param[in] dev
2103  *   Pointer to rte_eth_dev structure.
2104  * @param[out] error
2105  *   Pointer to error structure.
2106  *
2107  * @return
2108  *   0 on success, a negative errno value otherwise and rte_errno is set.
2109  */
2110 static int
2111 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2112                               struct rte_flow_error *error)
2113 {
2114         struct mlx5_priv *priv = dev->data->dev_private;
2115
2116         if (!priv->config.devx)
2117                 goto notsup_err;
2118 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2119         return 0;
2120 #endif
2121 notsup_err:
2122         return rte_flow_error_set
2123                       (error, ENOTSUP,
2124                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2125                        NULL,
2126                        "count action not supported");
2127 }
2128
2129 /**
2130  * Validate the L2 encap action.
2131  *
2132  * @param[in] action_flags
2133  *   Holds the actions detected until now.
2134  * @param[in] action
2135  *   Pointer to the action structure.
2136  * @param[in] attr
2137  *   Pointer to flow attributes
2138  * @param[out] error
2139  *   Pointer to error structure.
2140  *
2141  * @return
2142  *   0 on success, a negative errno value otherwise and rte_errno is set.
2143  */
2144 static int
2145 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2146                                  const struct rte_flow_action *action,
2147                                  const struct rte_flow_attr *attr,
2148                                  struct rte_flow_error *error)
2149 {
2150         if (!(action->conf))
2151                 return rte_flow_error_set(error, EINVAL,
2152                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2153                                           "configuration cannot be null");
2154         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2155                 return rte_flow_error_set(error, EINVAL,
2156                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2157                                           "can only have a single encap or"
2158                                           " decap action in a flow");
2159         if (!attr->transfer && attr->ingress)
2160                 return rte_flow_error_set(error, ENOTSUP,
2161                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2162                                           NULL,
2163                                           "encap action not supported for "
2164                                           "ingress");
2165         return 0;
2166 }
2167
2168 /**
2169  * Validate the L2 decap action.
2170  *
2171  * @param[in] action_flags
2172  *   Holds the actions detected until now.
2173  * @param[in] attr
2174  *   Pointer to flow attributes
2175  * @param[out] error
2176  *   Pointer to error structure.
2177  *
2178  * @return
2179  *   0 on success, a negative errno value otherwise and rte_errno is set.
2180  */
2181 static int
2182 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2183                                  const struct rte_flow_attr *attr,
2184                                  struct rte_flow_error *error)
2185 {
2186         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2187                 return rte_flow_error_set(error, EINVAL,
2188                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2189                                           "can only have a single encap or"
2190                                           " decap action in a flow");
2191         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2192                 return rte_flow_error_set(error, EINVAL,
2193                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2194                                           "can't have decap action after"
2195                                           " modify action");
2196         if (attr->egress)
2197                 return rte_flow_error_set(error, ENOTSUP,
2198                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2199                                           NULL,
2200                                           "decap action not supported for "
2201                                           "egress");
2202         return 0;
2203 }
2204
2205 /**
2206  * Validate the raw encap action.
2207  *
2208  * @param[in] action_flags
2209  *   Holds the actions detected until now.
2210  * @param[in] action
2211  *   Pointer to the encap action.
2212  * @param[in] attr
2213  *   Pointer to flow attributes
2214  * @param[out] error
2215  *   Pointer to error structure.
2216  *
2217  * @return
2218  *   0 on success, a negative errno value otherwise and rte_errno is set.
2219  */
2220 static int
2221 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2222                                   const struct rte_flow_action *action,
2223                                   const struct rte_flow_attr *attr,
2224                                   struct rte_flow_error *error)
2225 {
2226         const struct rte_flow_action_raw_encap *raw_encap =
2227                 (const struct rte_flow_action_raw_encap *)action->conf;
2228         if (!(action->conf))
2229                 return rte_flow_error_set(error, EINVAL,
2230                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2231                                           "configuration cannot be null");
2232         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2233                 return rte_flow_error_set(error, EINVAL,
2234                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2235                                           "can only have a single encap"
2236                                           " action in a flow");
2237         /* encap without preceding decap is not supported for ingress */
2238         if (!attr->transfer &&  attr->ingress &&
2239             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2240                 return rte_flow_error_set(error, ENOTSUP,
2241                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2242                                           NULL,
2243                                           "encap action not supported for "
2244                                           "ingress");
2245         if (!raw_encap->size || !raw_encap->data)
2246                 return rte_flow_error_set(error, EINVAL,
2247                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2248                                           "raw encap data cannot be empty");
2249         return 0;
2250 }
2251
2252 /**
2253  * Validate the raw decap action.
2254  *
2255  * @param[in] action_flags
2256  *   Holds the actions detected until now.
2257  * @param[in] action
2258  *   Pointer to the encap action.
2259  * @param[in] attr
2260  *   Pointer to flow attributes
2261  * @param[out] error
2262  *   Pointer to error structure.
2263  *
2264  * @return
2265  *   0 on success, a negative errno value otherwise and rte_errno is set.
2266  */
2267 static int
2268 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2269                                   const struct rte_flow_action *action,
2270                                   const struct rte_flow_attr *attr,
2271                                   struct rte_flow_error *error)
2272 {
2273         const struct rte_flow_action_raw_decap *decap   = action->conf;
2274
2275         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2276                 return rte_flow_error_set(error, EINVAL,
2277                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2278                                           "can't have encap action before"
2279                                           " decap action");
2280         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2281                 return rte_flow_error_set(error, EINVAL,
2282                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2283                                           "can only have a single decap"
2284                                           " action in a flow");
2285         /* decap action is valid on egress only if it is followed by encap */
2286         if (attr->egress && decap &&
2287             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2288                 return rte_flow_error_set(error, ENOTSUP,
2289                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2290                                           NULL, "decap action not supported"
2291                                           " for egress");
2292         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2293                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2294                 return rte_flow_error_set(error, EINVAL,
2295                                           RTE_FLOW_ERROR_TYPE_ACTION,
2296                                           NULL,
2297                                           "can't have decap action "
2298                                           "after modify action");
2299         }
2300         return 0;
2301 }
2302
2303 /**
2304  * Find existing encap/decap resource or create and register a new one.
2305  *
2306  * @param[in, out] dev
2307  *   Pointer to rte_eth_dev structure.
2308  * @param[in, out] resource
2309  *   Pointer to encap/decap resource.
2310  * @parm[in, out] dev_flow
2311  *   Pointer to the dev_flow.
2312  * @param[out] error
2313  *   pointer to error structure.
2314  *
2315  * @return
2316  *   0 on success otherwise -errno and errno is set.
2317  */
2318 static int
2319 flow_dv_encap_decap_resource_register
2320                         (struct rte_eth_dev *dev,
2321                          struct mlx5_flow_dv_encap_decap_resource *resource,
2322                          struct mlx5_flow *dev_flow,
2323                          struct rte_flow_error *error)
2324 {
2325         struct mlx5_priv *priv = dev->data->dev_private;
2326         struct mlx5_ibv_shared *sh = priv->sh;
2327         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2328         struct mlx5dv_dr_domain *domain;
2329
2330         resource->flags = dev_flow->group ? 0 : 1;
2331         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2332                 domain = sh->fdb_domain;
2333         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2334                 domain = sh->rx_domain;
2335         else
2336                 domain = sh->tx_domain;
2337         /* Lookup a matching resource from cache. */
2338         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2339                 if (resource->reformat_type == cache_resource->reformat_type &&
2340                     resource->ft_type == cache_resource->ft_type &&
2341                     resource->flags == cache_resource->flags &&
2342                     resource->size == cache_resource->size &&
2343                     !memcmp((const void *)resource->buf,
2344                             (const void *)cache_resource->buf,
2345                             resource->size)) {
2346                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2347                                 (void *)cache_resource,
2348                                 rte_atomic32_read(&cache_resource->refcnt));
2349                         rte_atomic32_inc(&cache_resource->refcnt);
2350                         dev_flow->dv.encap_decap = cache_resource;
2351                         return 0;
2352                 }
2353         }
2354         /* Register new encap/decap resource. */
2355         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2356         if (!cache_resource)
2357                 return rte_flow_error_set(error, ENOMEM,
2358                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2359                                           "cannot allocate resource memory");
2360         *cache_resource = *resource;
2361         cache_resource->verbs_action =
2362                 mlx5_glue->dv_create_flow_action_packet_reformat
2363                         (sh->ctx, cache_resource->reformat_type,
2364                          cache_resource->ft_type, domain, cache_resource->flags,
2365                          cache_resource->size,
2366                          (cache_resource->size ? cache_resource->buf : NULL));
2367         if (!cache_resource->verbs_action) {
2368                 rte_free(cache_resource);
2369                 return rte_flow_error_set(error, ENOMEM,
2370                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2371                                           NULL, "cannot create action");
2372         }
2373         rte_atomic32_init(&cache_resource->refcnt);
2374         rte_atomic32_inc(&cache_resource->refcnt);
2375         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2376         dev_flow->dv.encap_decap = cache_resource;
2377         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2378                 (void *)cache_resource,
2379                 rte_atomic32_read(&cache_resource->refcnt));
2380         return 0;
2381 }
2382
2383 /**
2384  * Find existing table jump resource or create and register a new one.
2385  *
2386  * @param[in, out] dev
2387  *   Pointer to rte_eth_dev structure.
2388  * @param[in, out] tbl
2389  *   Pointer to flow table resource.
2390  * @parm[in, out] dev_flow
2391  *   Pointer to the dev_flow.
2392  * @param[out] error
2393  *   pointer to error structure.
2394  *
2395  * @return
2396  *   0 on success otherwise -errno and errno is set.
2397  */
2398 static int
2399 flow_dv_jump_tbl_resource_register
2400                         (struct rte_eth_dev *dev __rte_unused,
2401                          struct mlx5_flow_tbl_resource *tbl,
2402                          struct mlx5_flow *dev_flow,
2403                          struct rte_flow_error *error)
2404 {
2405         struct mlx5_flow_tbl_data_entry *tbl_data =
2406                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2407         int cnt;
2408
2409         assert(tbl);
2410         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2411         if (!cnt) {
2412                 tbl_data->jump.action =
2413                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2414                         (tbl->obj);
2415                 if (!tbl_data->jump.action)
2416                         return rte_flow_error_set(error, ENOMEM,
2417                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2418                                         NULL, "cannot create jump action");
2419                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2420                         (void *)&tbl_data->jump, cnt);
2421         } else {
2422                 assert(tbl_data->jump.action);
2423                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2424                         (void *)&tbl_data->jump, cnt);
2425         }
2426         rte_atomic32_inc(&tbl_data->jump.refcnt);
2427         dev_flow->dv.jump = &tbl_data->jump;
2428         return 0;
2429 }
2430
2431 /**
2432  * Find existing table port ID resource or create and register a new one.
2433  *
2434  * @param[in, out] dev
2435  *   Pointer to rte_eth_dev structure.
2436  * @param[in, out] resource
2437  *   Pointer to port ID action resource.
2438  * @parm[in, out] dev_flow
2439  *   Pointer to the dev_flow.
2440  * @param[out] error
2441  *   pointer to error structure.
2442  *
2443  * @return
2444  *   0 on success otherwise -errno and errno is set.
2445  */
2446 static int
2447 flow_dv_port_id_action_resource_register
2448                         (struct rte_eth_dev *dev,
2449                          struct mlx5_flow_dv_port_id_action_resource *resource,
2450                          struct mlx5_flow *dev_flow,
2451                          struct rte_flow_error *error)
2452 {
2453         struct mlx5_priv *priv = dev->data->dev_private;
2454         struct mlx5_ibv_shared *sh = priv->sh;
2455         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2456
2457         /* Lookup a matching resource from cache. */
2458         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2459                 if (resource->port_id == cache_resource->port_id) {
2460                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2461                                 "refcnt %d++",
2462                                 (void *)cache_resource,
2463                                 rte_atomic32_read(&cache_resource->refcnt));
2464                         rte_atomic32_inc(&cache_resource->refcnt);
2465                         dev_flow->dv.port_id_action = cache_resource;
2466                         return 0;
2467                 }
2468         }
2469         /* Register new port id action resource. */
2470         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2471         if (!cache_resource)
2472                 return rte_flow_error_set(error, ENOMEM,
2473                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2474                                           "cannot allocate resource memory");
2475         *cache_resource = *resource;
2476         /*
2477          * Depending on rdma_core version the glue routine calls
2478          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2479          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2480          */
2481         cache_resource->action =
2482                 mlx5_glue->dr_create_flow_action_dest_port
2483                         (priv->sh->fdb_domain, resource->port_id);
2484         if (!cache_resource->action) {
2485                 rte_free(cache_resource);
2486                 return rte_flow_error_set(error, ENOMEM,
2487                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2488                                           NULL, "cannot create action");
2489         }
2490         rte_atomic32_init(&cache_resource->refcnt);
2491         rte_atomic32_inc(&cache_resource->refcnt);
2492         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2493         dev_flow->dv.port_id_action = cache_resource;
2494         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2495                 (void *)cache_resource,
2496                 rte_atomic32_read(&cache_resource->refcnt));
2497         return 0;
2498 }
2499
2500 /**
2501  * Find existing push vlan resource or create and register a new one.
2502  *
2503  * @param [in, out] dev
2504  *   Pointer to rte_eth_dev structure.
2505  * @param[in, out] resource
2506  *   Pointer to port ID action resource.
2507  * @parm[in, out] dev_flow
2508  *   Pointer to the dev_flow.
2509  * @param[out] error
2510  *   pointer to error structure.
2511  *
2512  * @return
2513  *   0 on success otherwise -errno and errno is set.
2514  */
2515 static int
2516 flow_dv_push_vlan_action_resource_register
2517                        (struct rte_eth_dev *dev,
2518                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2519                         struct mlx5_flow *dev_flow,
2520                         struct rte_flow_error *error)
2521 {
2522         struct mlx5_priv *priv = dev->data->dev_private;
2523         struct mlx5_ibv_shared *sh = priv->sh;
2524         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2525         struct mlx5dv_dr_domain *domain;
2526
2527         /* Lookup a matching resource from cache. */
2528         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2529                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2530                     resource->ft_type == cache_resource->ft_type) {
2531                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2532                                 "refcnt %d++",
2533                                 (void *)cache_resource,
2534                                 rte_atomic32_read(&cache_resource->refcnt));
2535                         rte_atomic32_inc(&cache_resource->refcnt);
2536                         dev_flow->dv.push_vlan_res = cache_resource;
2537                         return 0;
2538                 }
2539         }
2540         /* Register new push_vlan action resource. */
2541         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2542         if (!cache_resource)
2543                 return rte_flow_error_set(error, ENOMEM,
2544                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2545                                           "cannot allocate resource memory");
2546         *cache_resource = *resource;
2547         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2548                 domain = sh->fdb_domain;
2549         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2550                 domain = sh->rx_domain;
2551         else
2552                 domain = sh->tx_domain;
2553         cache_resource->action =
2554                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2555                                                            resource->vlan_tag);
2556         if (!cache_resource->action) {
2557                 rte_free(cache_resource);
2558                 return rte_flow_error_set(error, ENOMEM,
2559                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2560                                           NULL, "cannot create action");
2561         }
2562         rte_atomic32_init(&cache_resource->refcnt);
2563         rte_atomic32_inc(&cache_resource->refcnt);
2564         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2565         dev_flow->dv.push_vlan_res = cache_resource;
2566         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2567                 (void *)cache_resource,
2568                 rte_atomic32_read(&cache_resource->refcnt));
2569         return 0;
2570 }
2571 /**
2572  * Get the size of specific rte_flow_item_type
2573  *
2574  * @param[in] item_type
2575  *   Tested rte_flow_item_type.
2576  *
2577  * @return
2578  *   sizeof struct item_type, 0 if void or irrelevant.
2579  */
2580 static size_t
2581 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2582 {
2583         size_t retval;
2584
2585         switch (item_type) {
2586         case RTE_FLOW_ITEM_TYPE_ETH:
2587                 retval = sizeof(struct rte_flow_item_eth);
2588                 break;
2589         case RTE_FLOW_ITEM_TYPE_VLAN:
2590                 retval = sizeof(struct rte_flow_item_vlan);
2591                 break;
2592         case RTE_FLOW_ITEM_TYPE_IPV4:
2593                 retval = sizeof(struct rte_flow_item_ipv4);
2594                 break;
2595         case RTE_FLOW_ITEM_TYPE_IPV6:
2596                 retval = sizeof(struct rte_flow_item_ipv6);
2597                 break;
2598         case RTE_FLOW_ITEM_TYPE_UDP:
2599                 retval = sizeof(struct rte_flow_item_udp);
2600                 break;
2601         case RTE_FLOW_ITEM_TYPE_TCP:
2602                 retval = sizeof(struct rte_flow_item_tcp);
2603                 break;
2604         case RTE_FLOW_ITEM_TYPE_VXLAN:
2605                 retval = sizeof(struct rte_flow_item_vxlan);
2606                 break;
2607         case RTE_FLOW_ITEM_TYPE_GRE:
2608                 retval = sizeof(struct rte_flow_item_gre);
2609                 break;
2610         case RTE_FLOW_ITEM_TYPE_NVGRE:
2611                 retval = sizeof(struct rte_flow_item_nvgre);
2612                 break;
2613         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2614                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2615                 break;
2616         case RTE_FLOW_ITEM_TYPE_MPLS:
2617                 retval = sizeof(struct rte_flow_item_mpls);
2618                 break;
2619         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2620         default:
2621                 retval = 0;
2622                 break;
2623         }
2624         return retval;
2625 }
2626
2627 #define MLX5_ENCAP_IPV4_VERSION         0x40
2628 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2629 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2630 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2631 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2632 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2633 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2634
2635 /**
2636  * Convert the encap action data from list of rte_flow_item to raw buffer
2637  *
2638  * @param[in] items
2639  *   Pointer to rte_flow_item objects list.
2640  * @param[out] buf
2641  *   Pointer to the output buffer.
2642  * @param[out] size
2643  *   Pointer to the output buffer size.
2644  * @param[out] error
2645  *   Pointer to the error structure.
2646  *
2647  * @return
2648  *   0 on success, a negative errno value otherwise and rte_errno is set.
2649  */
2650 static int
2651 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2652                            size_t *size, struct rte_flow_error *error)
2653 {
2654         struct rte_ether_hdr *eth = NULL;
2655         struct rte_vlan_hdr *vlan = NULL;
2656         struct rte_ipv4_hdr *ipv4 = NULL;
2657         struct rte_ipv6_hdr *ipv6 = NULL;
2658         struct rte_udp_hdr *udp = NULL;
2659         struct rte_vxlan_hdr *vxlan = NULL;
2660         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2661         struct rte_gre_hdr *gre = NULL;
2662         size_t len;
2663         size_t temp_size = 0;
2664
2665         if (!items)
2666                 return rte_flow_error_set(error, EINVAL,
2667                                           RTE_FLOW_ERROR_TYPE_ACTION,
2668                                           NULL, "invalid empty data");
2669         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2670                 len = flow_dv_get_item_len(items->type);
2671                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2672                         return rte_flow_error_set(error, EINVAL,
2673                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2674                                                   (void *)items->type,
2675                                                   "items total size is too big"
2676                                                   " for encap action");
2677                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2678                 switch (items->type) {
2679                 case RTE_FLOW_ITEM_TYPE_ETH:
2680                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2681                         break;
2682                 case RTE_FLOW_ITEM_TYPE_VLAN:
2683                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2684                         if (!eth)
2685                                 return rte_flow_error_set(error, EINVAL,
2686                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2687                                                 (void *)items->type,
2688                                                 "eth header not found");
2689                         if (!eth->ether_type)
2690                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2691                         break;
2692                 case RTE_FLOW_ITEM_TYPE_IPV4:
2693                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2694                         if (!vlan && !eth)
2695                                 return rte_flow_error_set(error, EINVAL,
2696                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2697                                                 (void *)items->type,
2698                                                 "neither eth nor vlan"
2699                                                 " header found");
2700                         if (vlan && !vlan->eth_proto)
2701                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2702                         else if (eth && !eth->ether_type)
2703                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2704                         if (!ipv4->version_ihl)
2705                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2706                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2707                         if (!ipv4->time_to_live)
2708                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2709                         break;
2710                 case RTE_FLOW_ITEM_TYPE_IPV6:
2711                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2712                         if (!vlan && !eth)
2713                                 return rte_flow_error_set(error, EINVAL,
2714                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2715                                                 (void *)items->type,
2716                                                 "neither eth nor vlan"
2717                                                 " header found");
2718                         if (vlan && !vlan->eth_proto)
2719                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2720                         else if (eth && !eth->ether_type)
2721                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2722                         if (!ipv6->vtc_flow)
2723                                 ipv6->vtc_flow =
2724                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2725                         if (!ipv6->hop_limits)
2726                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2727                         break;
2728                 case RTE_FLOW_ITEM_TYPE_UDP:
2729                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2730                         if (!ipv4 && !ipv6)
2731                                 return rte_flow_error_set(error, EINVAL,
2732                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2733                                                 (void *)items->type,
2734                                                 "ip header not found");
2735                         if (ipv4 && !ipv4->next_proto_id)
2736                                 ipv4->next_proto_id = IPPROTO_UDP;
2737                         else if (ipv6 && !ipv6->proto)
2738                                 ipv6->proto = IPPROTO_UDP;
2739                         break;
2740                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2741                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2742                         if (!udp)
2743                                 return rte_flow_error_set(error, EINVAL,
2744                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2745                                                 (void *)items->type,
2746                                                 "udp header not found");
2747                         if (!udp->dst_port)
2748                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2749                         if (!vxlan->vx_flags)
2750                                 vxlan->vx_flags =
2751                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2752                         break;
2753                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2754                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2755                         if (!udp)
2756                                 return rte_flow_error_set(error, EINVAL,
2757                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2758                                                 (void *)items->type,
2759                                                 "udp header not found");
2760                         if (!vxlan_gpe->proto)
2761                                 return rte_flow_error_set(error, EINVAL,
2762                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2763                                                 (void *)items->type,
2764                                                 "next protocol not found");
2765                         if (!udp->dst_port)
2766                                 udp->dst_port =
2767                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2768                         if (!vxlan_gpe->vx_flags)
2769                                 vxlan_gpe->vx_flags =
2770                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2771                         break;
2772                 case RTE_FLOW_ITEM_TYPE_GRE:
2773                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2774                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2775                         if (!gre->proto)
2776                                 return rte_flow_error_set(error, EINVAL,
2777                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2778                                                 (void *)items->type,
2779                                                 "next protocol not found");
2780                         if (!ipv4 && !ipv6)
2781                                 return rte_flow_error_set(error, EINVAL,
2782                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2783                                                 (void *)items->type,
2784                                                 "ip header not found");
2785                         if (ipv4 && !ipv4->next_proto_id)
2786                                 ipv4->next_proto_id = IPPROTO_GRE;
2787                         else if (ipv6 && !ipv6->proto)
2788                                 ipv6->proto = IPPROTO_GRE;
2789                         break;
2790                 case RTE_FLOW_ITEM_TYPE_VOID:
2791                         break;
2792                 default:
2793                         return rte_flow_error_set(error, EINVAL,
2794                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2795                                                   (void *)items->type,
2796                                                   "unsupported item type");
2797                         break;
2798                 }
2799                 temp_size += len;
2800         }
2801         *size = temp_size;
2802         return 0;
2803 }
2804
2805 static int
2806 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2807 {
2808         struct rte_ether_hdr *eth = NULL;
2809         struct rte_vlan_hdr *vlan = NULL;
2810         struct rte_ipv6_hdr *ipv6 = NULL;
2811         struct rte_udp_hdr *udp = NULL;
2812         char *next_hdr;
2813         uint16_t proto;
2814
2815         eth = (struct rte_ether_hdr *)data;
2816         next_hdr = (char *)(eth + 1);
2817         proto = RTE_BE16(eth->ether_type);
2818
2819         /* VLAN skipping */
2820         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2821                 vlan = (struct rte_vlan_hdr *)next_hdr;
2822                 proto = RTE_BE16(vlan->eth_proto);
2823                 next_hdr += sizeof(struct rte_vlan_hdr);
2824         }
2825
2826         /* HW calculates IPv4 csum. no need to proceed */
2827         if (proto == RTE_ETHER_TYPE_IPV4)
2828                 return 0;
2829
2830         /* non IPv4/IPv6 header. not supported */
2831         if (proto != RTE_ETHER_TYPE_IPV6) {
2832                 return rte_flow_error_set(error, ENOTSUP,
2833                                           RTE_FLOW_ERROR_TYPE_ACTION,
2834                                           NULL, "Cannot offload non IPv4/IPv6");
2835         }
2836
2837         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2838
2839         /* ignore non UDP */
2840         if (ipv6->proto != IPPROTO_UDP)
2841                 return 0;
2842
2843         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2844         udp->dgram_cksum = 0;
2845
2846         return 0;
2847 }
2848
2849 /**
2850  * Convert L2 encap action to DV specification.
2851  *
2852  * @param[in] dev
2853  *   Pointer to rte_eth_dev structure.
2854  * @param[in] action
2855  *   Pointer to action structure.
2856  * @param[in, out] dev_flow
2857  *   Pointer to the mlx5_flow.
2858  * @param[in] transfer
2859  *   Mark if the flow is E-Switch flow.
2860  * @param[out] error
2861  *   Pointer to the error structure.
2862  *
2863  * @return
2864  *   0 on success, a negative errno value otherwise and rte_errno is set.
2865  */
2866 static int
2867 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2868                                const struct rte_flow_action *action,
2869                                struct mlx5_flow *dev_flow,
2870                                uint8_t transfer,
2871                                struct rte_flow_error *error)
2872 {
2873         const struct rte_flow_item *encap_data;
2874         const struct rte_flow_action_raw_encap *raw_encap_data;
2875         struct mlx5_flow_dv_encap_decap_resource res = {
2876                 .reformat_type =
2877                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2878                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2879                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2880         };
2881
2882         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2883                 raw_encap_data =
2884                         (const struct rte_flow_action_raw_encap *)action->conf;
2885                 res.size = raw_encap_data->size;
2886                 memcpy(res.buf, raw_encap_data->data, res.size);
2887         } else {
2888                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2889                         encap_data =
2890                                 ((const struct rte_flow_action_vxlan_encap *)
2891                                                 action->conf)->definition;
2892                 else
2893                         encap_data =
2894                                 ((const struct rte_flow_action_nvgre_encap *)
2895                                                 action->conf)->definition;
2896                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2897                                                &res.size, error))
2898                         return -rte_errno;
2899         }
2900         if (flow_dv_zero_encap_udp_csum(res.buf, error))
2901                 return -rte_errno;
2902         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2903                 return rte_flow_error_set(error, EINVAL,
2904                                           RTE_FLOW_ERROR_TYPE_ACTION,
2905                                           NULL, "can't create L2 encap action");
2906         return 0;
2907 }
2908
2909 /**
2910  * Convert L2 decap action to DV specification.
2911  *
2912  * @param[in] dev
2913  *   Pointer to rte_eth_dev structure.
2914  * @param[in, out] dev_flow
2915  *   Pointer to the mlx5_flow.
2916  * @param[in] transfer
2917  *   Mark if the flow is E-Switch flow.
2918  * @param[out] error
2919  *   Pointer to the error structure.
2920  *
2921  * @return
2922  *   0 on success, a negative errno value otherwise and rte_errno is set.
2923  */
2924 static int
2925 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2926                                struct mlx5_flow *dev_flow,
2927                                uint8_t transfer,
2928                                struct rte_flow_error *error)
2929 {
2930         struct mlx5_flow_dv_encap_decap_resource res = {
2931                 .size = 0,
2932                 .reformat_type =
2933                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2934                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2935                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2936         };
2937
2938         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2939                 return rte_flow_error_set(error, EINVAL,
2940                                           RTE_FLOW_ERROR_TYPE_ACTION,
2941                                           NULL, "can't create L2 decap action");
2942         return 0;
2943 }
2944
2945 /**
2946  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2947  *
2948  * @param[in] dev
2949  *   Pointer to rte_eth_dev structure.
2950  * @param[in] action
2951  *   Pointer to action structure.
2952  * @param[in, out] dev_flow
2953  *   Pointer to the mlx5_flow.
2954  * @param[in] attr
2955  *   Pointer to the flow attributes.
2956  * @param[out] error
2957  *   Pointer to the error structure.
2958  *
2959  * @return
2960  *   0 on success, a negative errno value otherwise and rte_errno is set.
2961  */
2962 static int
2963 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2964                                 const struct rte_flow_action *action,
2965                                 struct mlx5_flow *dev_flow,
2966                                 const struct rte_flow_attr *attr,
2967                                 struct rte_flow_error *error)
2968 {
2969         const struct rte_flow_action_raw_encap *encap_data;
2970         struct mlx5_flow_dv_encap_decap_resource res;
2971
2972         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2973         res.size = encap_data->size;
2974         memcpy(res.buf, encap_data->data, res.size);
2975         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
2976                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
2977                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
2978         if (attr->transfer)
2979                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2980         else
2981                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2982                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2983         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2984                 return rte_flow_error_set(error, EINVAL,
2985                                           RTE_FLOW_ERROR_TYPE_ACTION,
2986                                           NULL, "can't create encap action");
2987         return 0;
2988 }
2989
2990 /**
2991  * Create action push VLAN.
2992  *
2993  * @param[in] dev
2994  *   Pointer to rte_eth_dev structure.
2995  * @param[in] attr
2996  *   Pointer to the flow attributes.
2997  * @param[in] vlan
2998  *   Pointer to the vlan to push to the Ethernet header.
2999  * @param[in, out] dev_flow
3000  *   Pointer to the mlx5_flow.
3001  * @param[out] error
3002  *   Pointer to the error structure.
3003  *
3004  * @return
3005  *   0 on success, a negative errno value otherwise and rte_errno is set.
3006  */
3007 static int
3008 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3009                                 const struct rte_flow_attr *attr,
3010                                 const struct rte_vlan_hdr *vlan,
3011                                 struct mlx5_flow *dev_flow,
3012                                 struct rte_flow_error *error)
3013 {
3014         struct mlx5_flow_dv_push_vlan_action_resource res;
3015
3016         res.vlan_tag =
3017                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3018                                  vlan->vlan_tci);
3019         if (attr->transfer)
3020                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3021         else
3022                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3023                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3024         return flow_dv_push_vlan_action_resource_register
3025                                             (dev, &res, dev_flow, error);
3026 }
3027
3028 /**
3029  * Validate the modify-header actions.
3030  *
3031  * @param[in] action_flags
3032  *   Holds the actions detected until now.
3033  * @param[in] action
3034  *   Pointer to the modify action.
3035  * @param[out] error
3036  *   Pointer to error structure.
3037  *
3038  * @return
3039  *   0 on success, a negative errno value otherwise and rte_errno is set.
3040  */
3041 static int
3042 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3043                                    const struct rte_flow_action *action,
3044                                    struct rte_flow_error *error)
3045 {
3046         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3047                 return rte_flow_error_set(error, EINVAL,
3048                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3049                                           NULL, "action configuration not set");
3050         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
3051                 return rte_flow_error_set(error, EINVAL,
3052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3053                                           "can't have encap action before"
3054                                           " modify action");
3055         return 0;
3056 }
3057
3058 /**
3059  * Validate the modify-header MAC address actions.
3060  *
3061  * @param[in] action_flags
3062  *   Holds the actions detected until now.
3063  * @param[in] action
3064  *   Pointer to the modify action.
3065  * @param[in] item_flags
3066  *   Holds the items detected.
3067  * @param[out] error
3068  *   Pointer to error structure.
3069  *
3070  * @return
3071  *   0 on success, a negative errno value otherwise and rte_errno is set.
3072  */
3073 static int
3074 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3075                                    const struct rte_flow_action *action,
3076                                    const uint64_t item_flags,
3077                                    struct rte_flow_error *error)
3078 {
3079         int ret = 0;
3080
3081         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3082         if (!ret) {
3083                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3084                         return rte_flow_error_set(error, EINVAL,
3085                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3086                                                   NULL,
3087                                                   "no L2 item in pattern");
3088         }
3089         return ret;
3090 }
3091
3092 /**
3093  * Validate the modify-header IPv4 address actions.
3094  *
3095  * @param[in] action_flags
3096  *   Holds the actions detected until now.
3097  * @param[in] action
3098  *   Pointer to the modify action.
3099  * @param[in] item_flags
3100  *   Holds the items detected.
3101  * @param[out] error
3102  *   Pointer to error structure.
3103  *
3104  * @return
3105  *   0 on success, a negative errno value otherwise and rte_errno is set.
3106  */
3107 static int
3108 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3109                                     const struct rte_flow_action *action,
3110                                     const uint64_t item_flags,
3111                                     struct rte_flow_error *error)
3112 {
3113         int ret = 0;
3114
3115         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3116         if (!ret) {
3117                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3118                         return rte_flow_error_set(error, EINVAL,
3119                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3120                                                   NULL,
3121                                                   "no ipv4 item in pattern");
3122         }
3123         return ret;
3124 }
3125
3126 /**
3127  * Validate the modify-header IPv6 address actions.
3128  *
3129  * @param[in] action_flags
3130  *   Holds the actions detected until now.
3131  * @param[in] action
3132  *   Pointer to the modify action.
3133  * @param[in] item_flags
3134  *   Holds the items detected.
3135  * @param[out] error
3136  *   Pointer to error structure.
3137  *
3138  * @return
3139  *   0 on success, a negative errno value otherwise and rte_errno is set.
3140  */
3141 static int
3142 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3143                                     const struct rte_flow_action *action,
3144                                     const uint64_t item_flags,
3145                                     struct rte_flow_error *error)
3146 {
3147         int ret = 0;
3148
3149         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3150         if (!ret) {
3151                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3152                         return rte_flow_error_set(error, EINVAL,
3153                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3154                                                   NULL,
3155                                                   "no ipv6 item in pattern");
3156         }
3157         return ret;
3158 }
3159
3160 /**
3161  * Validate the modify-header TP actions.
3162  *
3163  * @param[in] action_flags
3164  *   Holds the actions detected until now.
3165  * @param[in] action
3166  *   Pointer to the modify action.
3167  * @param[in] item_flags
3168  *   Holds the items detected.
3169  * @param[out] error
3170  *   Pointer to error structure.
3171  *
3172  * @return
3173  *   0 on success, a negative errno value otherwise and rte_errno is set.
3174  */
3175 static int
3176 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3177                                   const struct rte_flow_action *action,
3178                                   const uint64_t item_flags,
3179                                   struct rte_flow_error *error)
3180 {
3181         int ret = 0;
3182
3183         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3184         if (!ret) {
3185                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3186                         return rte_flow_error_set(error, EINVAL,
3187                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3188                                                   NULL, "no transport layer "
3189                                                   "in pattern");
3190         }
3191         return ret;
3192 }
3193
3194 /**
3195  * Validate the modify-header actions of increment/decrement
3196  * TCP Sequence-number.
3197  *
3198  * @param[in] action_flags
3199  *   Holds the actions detected until now.
3200  * @param[in] action
3201  *   Pointer to the modify action.
3202  * @param[in] item_flags
3203  *   Holds the items detected.
3204  * @param[out] error
3205  *   Pointer to error structure.
3206  *
3207  * @return
3208  *   0 on success, a negative errno value otherwise and rte_errno is set.
3209  */
3210 static int
3211 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3212                                        const struct rte_flow_action *action,
3213                                        const uint64_t item_flags,
3214                                        struct rte_flow_error *error)
3215 {
3216         int ret = 0;
3217
3218         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3219         if (!ret) {
3220                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3221                         return rte_flow_error_set(error, EINVAL,
3222                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3223                                                   NULL, "no TCP item in"
3224                                                   " pattern");
3225                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3226                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3227                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3228                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3229                         return rte_flow_error_set(error, EINVAL,
3230                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3231                                                   NULL,
3232                                                   "cannot decrease and increase"
3233                                                   " TCP sequence number"
3234                                                   " at the same time");
3235         }
3236         return ret;
3237 }
3238
3239 /**
3240  * Validate the modify-header actions of increment/decrement
3241  * TCP Acknowledgment number.
3242  *
3243  * @param[in] action_flags
3244  *   Holds the actions detected until now.
3245  * @param[in] action
3246  *   Pointer to the modify action.
3247  * @param[in] item_flags
3248  *   Holds the items detected.
3249  * @param[out] error
3250  *   Pointer to error structure.
3251  *
3252  * @return
3253  *   0 on success, a negative errno value otherwise and rte_errno is set.
3254  */
3255 static int
3256 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3257                                        const struct rte_flow_action *action,
3258                                        const uint64_t item_flags,
3259                                        struct rte_flow_error *error)
3260 {
3261         int ret = 0;
3262
3263         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3264         if (!ret) {
3265                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3266                         return rte_flow_error_set(error, EINVAL,
3267                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3268                                                   NULL, "no TCP item in"
3269                                                   " pattern");
3270                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3271                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3272                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3273                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3274                         return rte_flow_error_set(error, EINVAL,
3275                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3276                                                   NULL,
3277                                                   "cannot decrease and increase"
3278                                                   " TCP acknowledgment number"
3279                                                   " at the same time");
3280         }
3281         return ret;
3282 }
3283
3284 /**
3285  * Validate the modify-header TTL actions.
3286  *
3287  * @param[in] action_flags
3288  *   Holds the actions detected until now.
3289  * @param[in] action
3290  *   Pointer to the modify action.
3291  * @param[in] item_flags
3292  *   Holds the items detected.
3293  * @param[out] error
3294  *   Pointer to error structure.
3295  *
3296  * @return
3297  *   0 on success, a negative errno value otherwise and rte_errno is set.
3298  */
3299 static int
3300 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3301                                    const struct rte_flow_action *action,
3302                                    const uint64_t item_flags,
3303                                    struct rte_flow_error *error)
3304 {
3305         int ret = 0;
3306
3307         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3308         if (!ret) {
3309                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3310                         return rte_flow_error_set(error, EINVAL,
3311                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3312                                                   NULL,
3313                                                   "no IP protocol in pattern");
3314         }
3315         return ret;
3316 }
3317
3318 /**
3319  * Validate jump action.
3320  *
3321  * @param[in] action
3322  *   Pointer to the jump action.
3323  * @param[in] action_flags
3324  *   Holds the actions detected until now.
3325  * @param[in] attributes
3326  *   Pointer to flow attributes
3327  * @param[in] external
3328  *   Action belongs to flow rule created by request external to PMD.
3329  * @param[out] error
3330  *   Pointer to error structure.
3331  *
3332  * @return
3333  *   0 on success, a negative errno value otherwise and rte_errno is set.
3334  */
3335 static int
3336 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3337                              uint64_t action_flags,
3338                              const struct rte_flow_attr *attributes,
3339                              bool external, struct rte_flow_error *error)
3340 {
3341         uint32_t target_group, table;
3342         int ret = 0;
3343
3344         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3345                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3346                 return rte_flow_error_set(error, EINVAL,
3347                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3348                                           "can't have 2 fate actions in"
3349                                           " same flow");
3350         if (action_flags & MLX5_FLOW_ACTION_METER)
3351                 return rte_flow_error_set(error, ENOTSUP,
3352                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3353                                           "jump with meter not support");
3354         if (!action->conf)
3355                 return rte_flow_error_set(error, EINVAL,
3356                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3357                                           NULL, "action configuration not set");
3358         target_group =
3359                 ((const struct rte_flow_action_jump *)action->conf)->group;
3360         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3361                                        &table, error);
3362         if (ret)
3363                 return ret;
3364         if (attributes->group == target_group)
3365                 return rte_flow_error_set(error, EINVAL,
3366                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3367                                           "target group must be other than"
3368                                           " the current flow group");
3369         return 0;
3370 }
3371
3372 /*
3373  * Validate the port_id action.
3374  *
3375  * @param[in] dev
3376  *   Pointer to rte_eth_dev structure.
3377  * @param[in] action_flags
3378  *   Bit-fields that holds the actions detected until now.
3379  * @param[in] action
3380  *   Port_id RTE action structure.
3381  * @param[in] attr
3382  *   Attributes of flow that includes this action.
3383  * @param[out] error
3384  *   Pointer to error structure.
3385  *
3386  * @return
3387  *   0 on success, a negative errno value otherwise and rte_errno is set.
3388  */
3389 static int
3390 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3391                                 uint64_t action_flags,
3392                                 const struct rte_flow_action *action,
3393                                 const struct rte_flow_attr *attr,
3394                                 struct rte_flow_error *error)
3395 {
3396         const struct rte_flow_action_port_id *port_id;
3397         struct mlx5_priv *act_priv;
3398         struct mlx5_priv *dev_priv;
3399         uint16_t port;
3400
3401         if (!attr->transfer)
3402                 return rte_flow_error_set(error, ENOTSUP,
3403                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3404                                           NULL,
3405                                           "port id action is valid in transfer"
3406                                           " mode only");
3407         if (!action || !action->conf)
3408                 return rte_flow_error_set(error, ENOTSUP,
3409                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3410                                           NULL,
3411                                           "port id action parameters must be"
3412                                           " specified");
3413         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3414                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3415                 return rte_flow_error_set(error, EINVAL,
3416                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3417                                           "can have only one fate actions in"
3418                                           " a flow");
3419         dev_priv = mlx5_dev_to_eswitch_info(dev);
3420         if (!dev_priv)
3421                 return rte_flow_error_set(error, rte_errno,
3422                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3423                                           NULL,
3424                                           "failed to obtain E-Switch info");
3425         port_id = action->conf;
3426         port = port_id->original ? dev->data->port_id : port_id->id;
3427         act_priv = mlx5_port_to_eswitch_info(port, false);
3428         if (!act_priv)
3429                 return rte_flow_error_set
3430                                 (error, rte_errno,
3431                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3432                                  "failed to obtain E-Switch port id for port");
3433         if (act_priv->domain_id != dev_priv->domain_id)
3434                 return rte_flow_error_set
3435                                 (error, EINVAL,
3436                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3437                                  "port does not belong to"
3438                                  " E-Switch being configured");
3439         return 0;
3440 }
3441
3442 /**
3443  * Get the maximum number of modify header actions.
3444  *
3445  * @param dev
3446  *   Pointer to rte_eth_dev structure.
3447  * @param flags
3448  *   Flags bits to check if root level.
3449  *
3450  * @return
3451  *   Max number of modify header actions device can support.
3452  */
3453 static unsigned int
3454 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3455 {
3456         /*
3457          * There's no way to directly query the max cap. Although it has to be
3458          * acquried by iterative trial, it is a safe assumption that more
3459          * actions are supported by FW if extensive metadata register is
3460          * supported. (Only in the root table)
3461          */
3462         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3463                 return MLX5_MAX_MODIFY_NUM;
3464         else
3465                 return mlx5_flow_ext_mreg_supported(dev) ?
3466                                         MLX5_ROOT_TBL_MODIFY_NUM :
3467                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3468 }
3469
3470 /**
3471  * Validate the meter action.
3472  *
3473  * @param[in] dev
3474  *   Pointer to rte_eth_dev structure.
3475  * @param[in] action_flags
3476  *   Bit-fields that holds the actions detected until now.
3477  * @param[in] action
3478  *   Pointer to the meter action.
3479  * @param[in] attr
3480  *   Attributes of flow that includes this action.
3481  * @param[out] error
3482  *   Pointer to error structure.
3483  *
3484  * @return
3485  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3486  */
3487 static int
3488 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3489                                 uint64_t action_flags,
3490                                 const struct rte_flow_action *action,
3491                                 const struct rte_flow_attr *attr,
3492                                 struct rte_flow_error *error)
3493 {
3494         struct mlx5_priv *priv = dev->data->dev_private;
3495         const struct rte_flow_action_meter *am = action->conf;
3496         struct mlx5_flow_meter *fm;
3497
3498         if (!am)
3499                 return rte_flow_error_set(error, EINVAL,
3500                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3501                                           "meter action conf is NULL");
3502
3503         if (action_flags & MLX5_FLOW_ACTION_METER)
3504                 return rte_flow_error_set(error, ENOTSUP,
3505                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3506                                           "meter chaining not support");
3507         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3508                 return rte_flow_error_set(error, ENOTSUP,
3509                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3510                                           "meter with jump not support");
3511         if (!priv->mtr_en)
3512                 return rte_flow_error_set(error, ENOTSUP,
3513                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3514                                           NULL,
3515                                           "meter action not supported");
3516         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3517         if (!fm)
3518                 return rte_flow_error_set(error, EINVAL,
3519                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3520                                           "Meter not found");
3521         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3522               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3523               (!fm->attr.egress && !attr->egress && attr->ingress))))
3524                 return rte_flow_error_set(error, EINVAL,
3525                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3526                                           "Flow attributes are either invalid "
3527                                           "or have a conflict with current "
3528                                           "meter attributes");
3529         return 0;
3530 }
3531
3532 /**
3533  * Validate the modify-header IPv4 DSCP actions.
3534  *
3535  * @param[in] action_flags
3536  *   Holds the actions detected until now.
3537  * @param[in] action
3538  *   Pointer to the modify action.
3539  * @param[in] item_flags
3540  *   Holds the items detected.
3541  * @param[out] error
3542  *   Pointer to error structure.
3543  *
3544  * @return
3545  *   0 on success, a negative errno value otherwise and rte_errno is set.
3546  */
3547 static int
3548 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3549                                          const struct rte_flow_action *action,
3550                                          const uint64_t item_flags,
3551                                          struct rte_flow_error *error)
3552 {
3553         int ret = 0;
3554
3555         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3556         if (!ret) {
3557                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3558                         return rte_flow_error_set(error, EINVAL,
3559                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3560                                                   NULL,
3561                                                   "no ipv4 item in pattern");
3562         }
3563         return ret;
3564 }
3565
3566 /**
3567  * Validate the modify-header IPv6 DSCP actions.
3568  *
3569  * @param[in] action_flags
3570  *   Holds the actions detected until now.
3571  * @param[in] action
3572  *   Pointer to the modify action.
3573  * @param[in] item_flags
3574  *   Holds the items detected.
3575  * @param[out] error
3576  *   Pointer to error structure.
3577  *
3578  * @return
3579  *   0 on success, a negative errno value otherwise and rte_errno is set.
3580  */
3581 static int
3582 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3583                                          const struct rte_flow_action *action,
3584                                          const uint64_t item_flags,
3585                                          struct rte_flow_error *error)
3586 {
3587         int ret = 0;
3588
3589         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3590         if (!ret) {
3591                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3592                         return rte_flow_error_set(error, EINVAL,
3593                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3594                                                   NULL,
3595                                                   "no ipv6 item in pattern");
3596         }
3597         return ret;
3598 }
3599
3600 /**
3601  * Find existing modify-header resource or create and register a new one.
3602  *
3603  * @param dev[in, out]
3604  *   Pointer to rte_eth_dev structure.
3605  * @param[in, out] resource
3606  *   Pointer to modify-header resource.
3607  * @parm[in, out] dev_flow
3608  *   Pointer to the dev_flow.
3609  * @param[out] error
3610  *   pointer to error structure.
3611  *
3612  * @return
3613  *   0 on success otherwise -errno and errno is set.
3614  */
3615 static int
3616 flow_dv_modify_hdr_resource_register
3617                         (struct rte_eth_dev *dev,
3618                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3619                          struct mlx5_flow *dev_flow,
3620                          struct rte_flow_error *error)
3621 {
3622         struct mlx5_priv *priv = dev->data->dev_private;
3623         struct mlx5_ibv_shared *sh = priv->sh;
3624         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3625         struct mlx5dv_dr_domain *ns;
3626         uint32_t actions_len;
3627
3628         resource->flags =
3629                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3630         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3631                                     resource->flags))
3632                 return rte_flow_error_set(error, EOVERFLOW,
3633                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3634                                           "too many modify header items");
3635         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3636                 ns = sh->fdb_domain;
3637         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3638                 ns = sh->tx_domain;
3639         else
3640                 ns = sh->rx_domain;
3641         /* Lookup a matching resource from cache. */
3642         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3643         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3644                 if (resource->ft_type == cache_resource->ft_type &&
3645                     resource->actions_num == cache_resource->actions_num &&
3646                     resource->flags == cache_resource->flags &&
3647                     !memcmp((const void *)resource->actions,
3648                             (const void *)cache_resource->actions,
3649                             actions_len)) {
3650                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3651                                 (void *)cache_resource,
3652                                 rte_atomic32_read(&cache_resource->refcnt));
3653                         rte_atomic32_inc(&cache_resource->refcnt);
3654                         dev_flow->dv.modify_hdr = cache_resource;
3655                         return 0;
3656                 }
3657         }
3658         /* Register new modify-header resource. */
3659         cache_resource = rte_calloc(__func__, 1,
3660                                     sizeof(*cache_resource) + actions_len, 0);
3661         if (!cache_resource)
3662                 return rte_flow_error_set(error, ENOMEM,
3663                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3664                                           "cannot allocate resource memory");
3665         *cache_resource = *resource;
3666         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3667         cache_resource->verbs_action =
3668                 mlx5_glue->dv_create_flow_action_modify_header
3669                                         (sh->ctx, cache_resource->ft_type, ns,
3670                                          cache_resource->flags, actions_len,
3671                                          (uint64_t *)cache_resource->actions);
3672         if (!cache_resource->verbs_action) {
3673                 rte_free(cache_resource);
3674                 return rte_flow_error_set(error, ENOMEM,
3675                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3676                                           NULL, "cannot create action");
3677         }
3678         rte_atomic32_init(&cache_resource->refcnt);
3679         rte_atomic32_inc(&cache_resource->refcnt);
3680         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3681         dev_flow->dv.modify_hdr = cache_resource;
3682         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3683                 (void *)cache_resource,
3684                 rte_atomic32_read(&cache_resource->refcnt));
3685         return 0;
3686 }
3687
3688 #define MLX5_CNT_CONTAINER_RESIZE 64
3689
3690 /**
3691  * Get or create a flow counter.
3692  *
3693  * @param[in] dev
3694  *   Pointer to the Ethernet device structure.
3695  * @param[in] shared
3696  *   Indicate if this counter is shared with other flows.
3697  * @param[in] id
3698  *   Counter identifier.
3699  *
3700  * @return
3701  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3702  */
3703 static struct mlx5_flow_counter *
3704 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3705                                uint32_t id)
3706 {
3707         struct mlx5_priv *priv = dev->data->dev_private;
3708         struct mlx5_flow_counter *cnt = NULL;
3709         struct mlx5_devx_obj *dcs = NULL;
3710
3711         if (!priv->config.devx) {
3712                 rte_errno = ENOTSUP;
3713                 return NULL;
3714         }
3715         if (shared) {
3716                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3717                         if (cnt->shared && cnt->id == id) {
3718                                 cnt->ref_cnt++;
3719                                 return cnt;
3720                         }
3721                 }
3722         }
3723         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3724         if (!dcs)
3725                 return NULL;
3726         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3727         if (!cnt) {
3728                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3729                 rte_errno = ENOMEM;
3730                 return NULL;
3731         }
3732         struct mlx5_flow_counter tmpl = {
3733                 .shared = shared,
3734                 .ref_cnt = 1,
3735                 .id = id,
3736                 .dcs = dcs,
3737         };
3738         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3739         if (!tmpl.action) {
3740                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3741                 rte_errno = errno;
3742                 rte_free(cnt);
3743                 return NULL;
3744         }
3745         *cnt = tmpl;
3746         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3747         return cnt;
3748 }
3749
3750 /**
3751  * Release a flow counter.
3752  *
3753  * @param[in] dev
3754  *   Pointer to the Ethernet device structure.
3755  * @param[in] counter
3756  *   Pointer to the counter handler.
3757  */
3758 static void
3759 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3760                                  struct mlx5_flow_counter *counter)
3761 {
3762         struct mlx5_priv *priv = dev->data->dev_private;
3763
3764         if (!counter)
3765                 return;
3766         if (--counter->ref_cnt == 0) {
3767                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3768                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3769                 rte_free(counter);
3770         }
3771 }
3772
3773 /**
3774  * Query a devx flow counter.
3775  *
3776  * @param[in] dev
3777  *   Pointer to the Ethernet device structure.
3778  * @param[in] cnt
3779  *   Pointer to the flow counter.
3780  * @param[out] pkts
3781  *   The statistics value of packets.
3782  * @param[out] bytes
3783  *   The statistics value of bytes.
3784  *
3785  * @return
3786  *   0 on success, otherwise a negative errno value and rte_errno is set.
3787  */
3788 static inline int
3789 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3790                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3791                      uint64_t *bytes)
3792 {
3793         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3794                                                 0, NULL, NULL, 0);
3795 }
3796
3797 /**
3798  * Get a pool by a counter.
3799  *
3800  * @param[in] cnt
3801  *   Pointer to the counter.
3802  *
3803  * @return
3804  *   The counter pool.
3805  */
3806 static struct mlx5_flow_counter_pool *
3807 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3808 {
3809         if (!cnt->batch) {
3810                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3811                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3812         }
3813         return cnt->pool;
3814 }
3815
3816 /**
3817  * Get a pool by devx counter ID.
3818  *
3819  * @param[in] cont
3820  *   Pointer to the counter container.
3821  * @param[in] id
3822  *   The counter devx ID.
3823  *
3824  * @return
3825  *   The counter pool pointer if exists, NULL otherwise,
3826  */
3827 static struct mlx5_flow_counter_pool *
3828 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3829 {
3830         struct mlx5_flow_counter_pool *pool;
3831
3832         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3833                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3834                                 MLX5_COUNTERS_PER_POOL;
3835
3836                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3837                         return pool;
3838         };
3839         return NULL;
3840 }
3841
3842 /**
3843  * Allocate a new memory for the counter values wrapped by all the needed
3844  * management.
3845  *
3846  * @param[in] dev
3847  *   Pointer to the Ethernet device structure.
3848  * @param[in] raws_n
3849  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3850  *
3851  * @return
3852  *   The new memory management pointer on success, otherwise NULL and rte_errno
3853  *   is set.
3854  */
3855 static struct mlx5_counter_stats_mem_mng *
3856 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3857 {
3858         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3859                                         (dev->data->dev_private))->sh;
3860         struct mlx5_devx_mkey_attr mkey_attr;
3861         struct mlx5_counter_stats_mem_mng *mem_mng;
3862         volatile struct flow_counter_stats *raw_data;
3863         int size = (sizeof(struct flow_counter_stats) *
3864                         MLX5_COUNTERS_PER_POOL +
3865                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3866                         sizeof(struct mlx5_counter_stats_mem_mng);
3867         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3868         int i;
3869
3870         if (!mem) {
3871                 rte_errno = ENOMEM;
3872                 return NULL;
3873         }
3874         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3875         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3876         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3877                                                  IBV_ACCESS_LOCAL_WRITE);
3878         if (!mem_mng->umem) {
3879                 rte_errno = errno;
3880                 rte_free(mem);
3881                 return NULL;
3882         }
3883         mkey_attr.addr = (uintptr_t)mem;
3884         mkey_attr.size = size;
3885         mkey_attr.umem_id = mem_mng->umem->umem_id;
3886         mkey_attr.pd = sh->pdn;
3887         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3888         if (!mem_mng->dm) {
3889                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3890                 rte_errno = errno;
3891                 rte_free(mem);
3892                 return NULL;
3893         }
3894         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3895         raw_data = (volatile struct flow_counter_stats *)mem;
3896         for (i = 0; i < raws_n; ++i) {
3897                 mem_mng->raws[i].mem_mng = mem_mng;
3898                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3899         }
3900         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3901         return mem_mng;
3902 }
3903
3904 /**
3905  * Resize a counter container.
3906  *
3907  * @param[in] dev
3908  *   Pointer to the Ethernet device structure.
3909  * @param[in] batch
3910  *   Whether the pool is for counter that was allocated by batch command.
3911  *
3912  * @return
3913  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3914  */
3915 static struct mlx5_pools_container *
3916 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3917 {
3918         struct mlx5_priv *priv = dev->data->dev_private;
3919         struct mlx5_pools_container *cont =
3920                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3921         struct mlx5_pools_container *new_cont =
3922                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3923         struct mlx5_counter_stats_mem_mng *mem_mng;
3924         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3925         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3926         int i;
3927
3928         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3929                 /* The last resize still hasn't detected by the host thread. */
3930                 rte_errno = EAGAIN;
3931                 return NULL;
3932         }
3933         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3934         if (!new_cont->pools) {
3935                 rte_errno = ENOMEM;
3936                 return NULL;
3937         }
3938         if (cont->n)
3939                 memcpy(new_cont->pools, cont->pools, cont->n *
3940                        sizeof(struct mlx5_flow_counter_pool *));
3941         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3942                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3943         if (!mem_mng) {
3944                 rte_free(new_cont->pools);
3945                 return NULL;
3946         }
3947         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3948                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3949                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3950                                  i, next);
3951         new_cont->n = resize;
3952         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3953         TAILQ_INIT(&new_cont->pool_list);
3954         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3955         new_cont->init_mem_mng = mem_mng;
3956         rte_cio_wmb();
3957          /* Flip the master container. */
3958         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3959         return new_cont;
3960 }
3961
3962 /**
3963  * Query a devx flow counter.
3964  *
3965  * @param[in] dev
3966  *   Pointer to the Ethernet device structure.
3967  * @param[in] cnt
3968  *   Pointer to the flow counter.
3969  * @param[out] pkts
3970  *   The statistics value of packets.
3971  * @param[out] bytes
3972  *   The statistics value of bytes.
3973  *
3974  * @return
3975  *   0 on success, otherwise a negative errno value and rte_errno is set.
3976  */
3977 static inline int
3978 _flow_dv_query_count(struct rte_eth_dev *dev,
3979                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3980                      uint64_t *bytes)
3981 {
3982         struct mlx5_priv *priv = dev->data->dev_private;
3983         struct mlx5_flow_counter_pool *pool =
3984                         flow_dv_counter_pool_get(cnt);
3985         int offset = cnt - &pool->counters_raw[0];
3986
3987         if (priv->counter_fallback)
3988                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3989
3990         rte_spinlock_lock(&pool->sl);
3991         /*
3992          * The single counters allocation may allocate smaller ID than the
3993          * current allocated in parallel to the host reading.
3994          * In this case the new counter values must be reported as 0.
3995          */
3996         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
3997                 *pkts = 0;
3998                 *bytes = 0;
3999         } else {
4000                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4001                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4002         }
4003         rte_spinlock_unlock(&pool->sl);
4004         return 0;
4005 }
4006
4007 /**
4008  * Create and initialize a new counter pool.
4009  *
4010  * @param[in] dev
4011  *   Pointer to the Ethernet device structure.
4012  * @param[out] dcs
4013  *   The devX counter handle.
4014  * @param[in] batch
4015  *   Whether the pool is for counter that was allocated by batch command.
4016  *
4017  * @return
4018  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4019  */
4020 static struct mlx5_flow_counter_pool *
4021 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4022                     uint32_t batch)
4023 {
4024         struct mlx5_priv *priv = dev->data->dev_private;
4025         struct mlx5_flow_counter_pool *pool;
4026         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4027                                                                0);
4028         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4029         uint32_t size;
4030
4031         if (cont->n == n_valid) {
4032                 cont = flow_dv_container_resize(dev, batch);
4033                 if (!cont)
4034                         return NULL;
4035         }
4036         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4037                         sizeof(struct mlx5_flow_counter);
4038         pool = rte_calloc(__func__, 1, size, 0);
4039         if (!pool) {
4040                 rte_errno = ENOMEM;
4041                 return NULL;
4042         }
4043         pool->min_dcs = dcs;
4044         pool->raw = cont->init_mem_mng->raws + n_valid %
4045                                                      MLX5_CNT_CONTAINER_RESIZE;
4046         pool->raw_hw = NULL;
4047         rte_spinlock_init(&pool->sl);
4048         /*
4049          * The generation of the new allocated counters in this pool is 0, 2 in
4050          * the pool generation makes all the counters valid for allocation.
4051          */
4052         rte_atomic64_set(&pool->query_gen, 0x2);
4053         TAILQ_INIT(&pool->counters);
4054         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4055         cont->pools[n_valid] = pool;
4056         /* Pool initialization must be updated before host thread access. */
4057         rte_cio_wmb();
4058         rte_atomic16_add(&cont->n_valid, 1);
4059         return pool;
4060 }
4061
4062 /**
4063  * Prepare a new counter and/or a new counter pool.
4064  *
4065  * @param[in] dev
4066  *   Pointer to the Ethernet device structure.
4067  * @param[out] cnt_free
4068  *   Where to put the pointer of a new counter.
4069  * @param[in] batch
4070  *   Whether the pool is for counter that was allocated by batch command.
4071  *
4072  * @return
4073  *   The free counter pool pointer and @p cnt_free is set on success,
4074  *   NULL otherwise and rte_errno is set.
4075  */
4076 static struct mlx5_flow_counter_pool *
4077 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4078                              struct mlx5_flow_counter **cnt_free,
4079                              uint32_t batch)
4080 {
4081         struct mlx5_priv *priv = dev->data->dev_private;
4082         struct mlx5_flow_counter_pool *pool;
4083         struct mlx5_devx_obj *dcs = NULL;
4084         struct mlx5_flow_counter *cnt;
4085         uint32_t i;
4086
4087         if (!batch) {
4088                 /* bulk_bitmap must be 0 for single counter allocation. */
4089                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4090                 if (!dcs)
4091                         return NULL;
4092                 pool = flow_dv_find_pool_by_id
4093                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4094                 if (!pool) {
4095                         pool = flow_dv_pool_create(dev, dcs, batch);
4096                         if (!pool) {
4097                                 mlx5_devx_cmd_destroy(dcs);
4098                                 return NULL;
4099                         }
4100                 } else if (dcs->id < pool->min_dcs->id) {
4101                         rte_atomic64_set(&pool->a64_dcs,
4102                                          (int64_t)(uintptr_t)dcs);
4103                 }
4104                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4105                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4106                 cnt->dcs = dcs;
4107                 *cnt_free = cnt;
4108                 return pool;
4109         }
4110         /* bulk_bitmap is in 128 counters units. */
4111         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4112                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4113         if (!dcs) {
4114                 rte_errno = ENODATA;
4115                 return NULL;
4116         }
4117         pool = flow_dv_pool_create(dev, dcs, batch);
4118         if (!pool) {
4119                 mlx5_devx_cmd_destroy(dcs);
4120                 return NULL;
4121         }
4122         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4123                 cnt = &pool->counters_raw[i];
4124                 cnt->pool = pool;
4125                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4126         }
4127         *cnt_free = &pool->counters_raw[0];
4128         return pool;
4129 }
4130
4131 /**
4132  * Search for existed shared counter.
4133  *
4134  * @param[in] cont
4135  *   Pointer to the relevant counter pool container.
4136  * @param[in] id
4137  *   The shared counter ID to search.
4138  *
4139  * @return
4140  *   NULL if not existed, otherwise pointer to the shared counter.
4141  */
4142 static struct mlx5_flow_counter *
4143 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4144                               uint32_t id)
4145 {
4146         static struct mlx5_flow_counter *cnt;
4147         struct mlx5_flow_counter_pool *pool;
4148         int i;
4149
4150         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4151                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4152                         cnt = &pool->counters_raw[i];
4153                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4154                                 return cnt;
4155                 }
4156         }
4157         return NULL;
4158 }
4159
4160 /**
4161  * Allocate a flow counter.
4162  *
4163  * @param[in] dev
4164  *   Pointer to the Ethernet device structure.
4165  * @param[in] shared
4166  *   Indicate if this counter is shared with other flows.
4167  * @param[in] id
4168  *   Counter identifier.
4169  * @param[in] group
4170  *   Counter flow group.
4171  *
4172  * @return
4173  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4174  */
4175 static struct mlx5_flow_counter *
4176 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4177                       uint16_t group)
4178 {
4179         struct mlx5_priv *priv = dev->data->dev_private;
4180         struct mlx5_flow_counter_pool *pool = NULL;
4181         struct mlx5_flow_counter *cnt_free = NULL;
4182         /*
4183          * Currently group 0 flow counter cannot be assigned to a flow if it is
4184          * not the first one in the batch counter allocation, so it is better
4185          * to allocate counters one by one for these flows in a separate
4186          * container.
4187          * A counter can be shared between different groups so need to take
4188          * shared counters from the single container.
4189          */
4190         uint32_t batch = (group && !shared) ? 1 : 0;
4191         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4192                                                                0);
4193
4194         if (priv->counter_fallback)
4195                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4196         if (!priv->config.devx) {
4197                 rte_errno = ENOTSUP;
4198                 return NULL;
4199         }
4200         if (shared) {
4201                 cnt_free = flow_dv_counter_shared_search(cont, id);
4202                 if (cnt_free) {
4203                         if (cnt_free->ref_cnt + 1 == 0) {
4204                                 rte_errno = E2BIG;
4205                                 return NULL;
4206                         }
4207                         cnt_free->ref_cnt++;
4208                         return cnt_free;
4209                 }
4210         }
4211         /* Pools which has a free counters are in the start. */
4212         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4213                 /*
4214                  * The free counter reset values must be updated between the
4215                  * counter release to the counter allocation, so, at least one
4216                  * query must be done in this time. ensure it by saving the
4217                  * query generation in the release time.
4218                  * The free list is sorted according to the generation - so if
4219                  * the first one is not updated, all the others are not
4220                  * updated too.
4221                  */
4222                 cnt_free = TAILQ_FIRST(&pool->counters);
4223                 if (cnt_free && cnt_free->query_gen + 1 <
4224                     rte_atomic64_read(&pool->query_gen))
4225                         break;
4226                 cnt_free = NULL;
4227         }
4228         if (!cnt_free) {
4229                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4230                 if (!pool)
4231                         return NULL;
4232         }
4233         cnt_free->batch = batch;
4234         /* Create a DV counter action only in the first time usage. */
4235         if (!cnt_free->action) {
4236                 uint16_t offset;
4237                 struct mlx5_devx_obj *dcs;
4238
4239                 if (batch) {
4240                         offset = cnt_free - &pool->counters_raw[0];
4241                         dcs = pool->min_dcs;
4242                 } else {
4243                         offset = 0;
4244                         dcs = cnt_free->dcs;
4245                 }
4246                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4247                                         (dcs->obj, offset);
4248                 if (!cnt_free->action) {
4249                         rte_errno = errno;
4250                         return NULL;
4251                 }
4252         }
4253         /* Update the counter reset values. */
4254         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4255                                  &cnt_free->bytes))
4256                 return NULL;
4257         cnt_free->shared = shared;
4258         cnt_free->ref_cnt = 1;
4259         cnt_free->id = id;
4260         if (!priv->sh->cmng.query_thread_on)
4261                 /* Start the asynchronous batch query by the host thread. */
4262                 mlx5_set_query_alarm(priv->sh);
4263         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4264         if (TAILQ_EMPTY(&pool->counters)) {
4265                 /* Move the pool to the end of the container pool list. */
4266                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4267                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4268         }
4269         return cnt_free;
4270 }
4271
4272 /**
4273  * Release a flow counter.
4274  *
4275  * @param[in] dev
4276  *   Pointer to the Ethernet device structure.
4277  * @param[in] counter
4278  *   Pointer to the counter handler.
4279  */
4280 static void
4281 flow_dv_counter_release(struct rte_eth_dev *dev,
4282                         struct mlx5_flow_counter *counter)
4283 {
4284         struct mlx5_priv *priv = dev->data->dev_private;
4285
4286         if (!counter)
4287                 return;
4288         if (priv->counter_fallback) {
4289                 flow_dv_counter_release_fallback(dev, counter);
4290                 return;
4291         }
4292         if (--counter->ref_cnt == 0) {
4293                 struct mlx5_flow_counter_pool *pool =
4294                                 flow_dv_counter_pool_get(counter);
4295
4296                 /* Put the counter in the end - the last updated one. */
4297                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4298                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4299         }
4300 }
4301
4302 /**
4303  * Verify the @p attributes will be correctly understood by the NIC and store
4304  * them in the @p flow if everything is correct.
4305  *
4306  * @param[in] dev
4307  *   Pointer to dev struct.
4308  * @param[in] attributes
4309  *   Pointer to flow attributes
4310  * @param[in] external
4311  *   This flow rule is created by request external to PMD.
4312  * @param[out] error
4313  *   Pointer to error structure.
4314  *
4315  * @return
4316  *   0 on success, a negative errno value otherwise and rte_errno is set.
4317  */
4318 static int
4319 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4320                             const struct rte_flow_attr *attributes,
4321                             bool external __rte_unused,
4322                             struct rte_flow_error *error)
4323 {
4324         struct mlx5_priv *priv = dev->data->dev_private;
4325         uint32_t priority_max = priv->config.flow_prio - 1;
4326
4327 #ifndef HAVE_MLX5DV_DR
4328         if (attributes->group)
4329                 return rte_flow_error_set(error, ENOTSUP,
4330                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4331                                           NULL,
4332                                           "groups are not supported");
4333 #else
4334         uint32_t table;
4335         int ret;
4336
4337         ret = mlx5_flow_group_to_table(attributes, external,
4338                                        attributes->group,
4339                                        &table, error);
4340         if (ret)
4341                 return ret;
4342 #endif
4343         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4344             attributes->priority >= priority_max)
4345                 return rte_flow_error_set(error, ENOTSUP,
4346                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4347                                           NULL,
4348                                           "priority out of range");
4349         if (attributes->transfer) {
4350                 if (!priv->config.dv_esw_en)
4351                         return rte_flow_error_set
4352                                 (error, ENOTSUP,
4353                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4354                                  "E-Switch dr is not supported");
4355                 if (!(priv->representor || priv->master))
4356                         return rte_flow_error_set
4357                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4358                                  NULL, "E-Switch configuration can only be"
4359                                  " done by a master or a representor device");
4360                 if (attributes->egress)
4361                         return rte_flow_error_set
4362                                 (error, ENOTSUP,
4363                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4364                                  "egress is not supported");
4365         }
4366         if (!(attributes->egress ^ attributes->ingress))
4367                 return rte_flow_error_set(error, ENOTSUP,
4368                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4369                                           "must specify exactly one of "
4370                                           "ingress or egress");
4371         return 0;
4372 }
4373
4374 /**
4375  * Internal validation function. For validating both actions and items.
4376  *
4377  * @param[in] dev
4378  *   Pointer to the rte_eth_dev structure.
4379  * @param[in] attr
4380  *   Pointer to the flow attributes.
4381  * @param[in] items
4382  *   Pointer to the list of items.
4383  * @param[in] actions
4384  *   Pointer to the list of actions.
4385  * @param[in] external
4386  *   This flow rule is created by request external to PMD.
4387  * @param[out] error
4388  *   Pointer to the error structure.
4389  *
4390  * @return
4391  *   0 on success, a negative errno value otherwise and rte_errno is set.
4392  */
4393 static int
4394 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4395                  const struct rte_flow_item items[],
4396                  const struct rte_flow_action actions[],
4397                  bool external, struct rte_flow_error *error)
4398 {
4399         int ret;
4400         uint64_t action_flags = 0;
4401         uint64_t item_flags = 0;
4402         uint64_t last_item = 0;
4403         uint8_t next_protocol = 0xff;
4404         uint16_t ether_type = 0;
4405         int actions_n = 0;
4406         uint8_t item_ipv6_proto = 0;
4407         const struct rte_flow_item *gre_item = NULL;
4408         struct rte_flow_item_tcp nic_tcp_mask = {
4409                 .hdr = {
4410                         .tcp_flags = 0xFF,
4411                         .src_port = RTE_BE16(UINT16_MAX),
4412                         .dst_port = RTE_BE16(UINT16_MAX),
4413                 }
4414         };
4415         struct mlx5_priv *priv = dev->data->dev_private;
4416         struct mlx5_dev_config *dev_conf = &priv->config;
4417
4418         if (items == NULL)
4419                 return -1;
4420         ret = flow_dv_validate_attributes(dev, attr, external, error);
4421         if (ret < 0)
4422                 return ret;
4423         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4424                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4425                 int type = items->type;
4426
4427                 switch (type) {
4428                 case RTE_FLOW_ITEM_TYPE_VOID:
4429                         break;
4430                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4431                         ret = flow_dv_validate_item_port_id
4432                                         (dev, items, attr, item_flags, error);
4433                         if (ret < 0)
4434                                 return ret;
4435                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4436                         break;
4437                 case RTE_FLOW_ITEM_TYPE_ETH:
4438                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4439                                                           error);
4440                         if (ret < 0)
4441                                 return ret;
4442                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4443                                              MLX5_FLOW_LAYER_OUTER_L2;
4444                         if (items->mask != NULL && items->spec != NULL) {
4445                                 ether_type =
4446                                         ((const struct rte_flow_item_eth *)
4447                                          items->spec)->type;
4448                                 ether_type &=
4449                                         ((const struct rte_flow_item_eth *)
4450                                          items->mask)->type;
4451                                 ether_type = rte_be_to_cpu_16(ether_type);
4452                         } else {
4453                                 ether_type = 0;
4454                         }
4455                         break;
4456                 case RTE_FLOW_ITEM_TYPE_VLAN:
4457                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4458                                                            dev, error);
4459                         if (ret < 0)
4460                                 return ret;
4461                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4462                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4463                         if (items->mask != NULL && items->spec != NULL) {
4464                                 ether_type =
4465                                         ((const struct rte_flow_item_vlan *)
4466                                          items->spec)->inner_type;
4467                                 ether_type &=
4468                                         ((const struct rte_flow_item_vlan *)
4469                                          items->mask)->inner_type;
4470                                 ether_type = rte_be_to_cpu_16(ether_type);
4471                         } else {
4472                                 ether_type = 0;
4473                         }
4474                         break;
4475                 case RTE_FLOW_ITEM_TYPE_IPV4:
4476                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4477                                                   &item_flags, &tunnel);
4478                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4479                                                            last_item,
4480                                                            ether_type, NULL,
4481                                                            error);
4482                         if (ret < 0)
4483                                 return ret;
4484                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4485                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4486                         if (items->mask != NULL &&
4487                             ((const struct rte_flow_item_ipv4 *)
4488                              items->mask)->hdr.next_proto_id) {
4489                                 next_protocol =
4490                                         ((const struct rte_flow_item_ipv4 *)
4491                                          (items->spec))->hdr.next_proto_id;
4492                                 next_protocol &=
4493                                         ((const struct rte_flow_item_ipv4 *)
4494                                          (items->mask))->hdr.next_proto_id;
4495                         } else {
4496                                 /* Reset for inner layer. */
4497                                 next_protocol = 0xff;
4498                         }
4499                         break;
4500                 case RTE_FLOW_ITEM_TYPE_IPV6:
4501                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4502                                                   &item_flags, &tunnel);
4503                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4504                                                            last_item,
4505                                                            ether_type, NULL,
4506                                                            error);
4507                         if (ret < 0)
4508                                 return ret;
4509                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4510                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4511                         if (items->mask != NULL &&
4512                             ((const struct rte_flow_item_ipv6 *)
4513                              items->mask)->hdr.proto) {
4514                                 item_ipv6_proto =
4515                                         ((const struct rte_flow_item_ipv6 *)
4516                                          items->spec)->hdr.proto;
4517                                 next_protocol =
4518                                         ((const struct rte_flow_item_ipv6 *)
4519                                          items->spec)->hdr.proto;
4520                                 next_protocol &=
4521                                         ((const struct rte_flow_item_ipv6 *)
4522                                          items->mask)->hdr.proto;
4523                         } else {
4524                                 /* Reset for inner layer. */
4525                                 next_protocol = 0xff;
4526                         }
4527                         break;
4528                 case RTE_FLOW_ITEM_TYPE_TCP:
4529                         ret = mlx5_flow_validate_item_tcp
4530                                                 (items, item_flags,
4531                                                  next_protocol,
4532                                                  &nic_tcp_mask,
4533                                                  error);
4534                         if (ret < 0)
4535                                 return ret;
4536                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4537                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4538                         break;
4539                 case RTE_FLOW_ITEM_TYPE_UDP:
4540                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4541                                                           next_protocol,
4542                                                           error);
4543                         if (ret < 0)
4544                                 return ret;
4545                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4546                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4547                         break;
4548                 case RTE_FLOW_ITEM_TYPE_GRE:
4549                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4550                                                           next_protocol, error);
4551                         if (ret < 0)
4552                                 return ret;
4553                         gre_item = items;
4554                         last_item = MLX5_FLOW_LAYER_GRE;
4555                         break;
4556                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4557                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4558                                                             next_protocol,
4559                                                             error);
4560                         if (ret < 0)
4561                                 return ret;
4562                         last_item = MLX5_FLOW_LAYER_NVGRE;
4563                         break;
4564                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4565                         ret = mlx5_flow_validate_item_gre_key
4566                                 (items, item_flags, gre_item, error);
4567                         if (ret < 0)
4568                                 return ret;
4569                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4570                         break;
4571                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4572                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4573                                                             error);
4574                         if (ret < 0)
4575                                 return ret;
4576                         last_item = MLX5_FLOW_LAYER_VXLAN;
4577                         break;
4578                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4579                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4580                                                                 item_flags, dev,
4581                                                                 error);
4582                         if (ret < 0)
4583                                 return ret;
4584                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4585                         break;
4586                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4587                         ret = mlx5_flow_validate_item_geneve(items,
4588                                                              item_flags, dev,
4589                                                              error);
4590                         if (ret < 0)
4591                                 return ret;
4592                         last_item = MLX5_FLOW_LAYER_GENEVE;
4593                         break;
4594                 case RTE_FLOW_ITEM_TYPE_MPLS:
4595                         ret = mlx5_flow_validate_item_mpls(dev, items,
4596                                                            item_flags,
4597                                                            last_item, error);
4598                         if (ret < 0)
4599                                 return ret;
4600                         last_item = MLX5_FLOW_LAYER_MPLS;
4601                         break;
4602
4603                 case RTE_FLOW_ITEM_TYPE_MARK:
4604                         ret = flow_dv_validate_item_mark(dev, items, attr,
4605                                                          error);
4606                         if (ret < 0)
4607                                 return ret;
4608                         last_item = MLX5_FLOW_ITEM_MARK;
4609                         break;
4610                 case RTE_FLOW_ITEM_TYPE_META:
4611                         ret = flow_dv_validate_item_meta(dev, items, attr,
4612                                                          error);
4613                         if (ret < 0)
4614                                 return ret;
4615                         last_item = MLX5_FLOW_ITEM_METADATA;
4616                         break;
4617                 case RTE_FLOW_ITEM_TYPE_ICMP:
4618                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4619                                                            next_protocol,
4620                                                            error);
4621                         if (ret < 0)
4622                                 return ret;
4623                         last_item = MLX5_FLOW_LAYER_ICMP;
4624                         break;
4625                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4626                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4627                                                             next_protocol,
4628                                                             error);
4629                         if (ret < 0)
4630                                 return ret;
4631                         last_item = MLX5_FLOW_LAYER_ICMP6;
4632                         break;
4633                 case RTE_FLOW_ITEM_TYPE_TAG:
4634                         ret = flow_dv_validate_item_tag(dev, items,
4635                                                         attr, error);
4636                         if (ret < 0)
4637                                 return ret;
4638                         last_item = MLX5_FLOW_ITEM_TAG;
4639                         break;
4640                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4641                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4642                         break;
4643                 case RTE_FLOW_ITEM_TYPE_GTP:
4644                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4645                                                         error);
4646                         if (ret < 0)
4647                                 return ret;
4648                         last_item = MLX5_FLOW_LAYER_GTP;
4649                         break;
4650                 default:
4651                         return rte_flow_error_set(error, ENOTSUP,
4652                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4653                                                   NULL, "item not supported");
4654                 }
4655                 item_flags |= last_item;
4656         }
4657         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4658                 int type = actions->type;
4659                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4660                         return rte_flow_error_set(error, ENOTSUP,
4661                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4662                                                   actions, "too many actions");
4663                 switch (type) {
4664                 case RTE_FLOW_ACTION_TYPE_VOID:
4665                         break;
4666                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4667                         ret = flow_dv_validate_action_port_id(dev,
4668                                                               action_flags,
4669                                                               actions,
4670                                                               attr,
4671                                                               error);
4672                         if (ret)
4673                                 return ret;
4674                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4675                         ++actions_n;
4676                         break;
4677                 case RTE_FLOW_ACTION_TYPE_FLAG:
4678                         ret = flow_dv_validate_action_flag(dev, action_flags,
4679                                                            attr, error);
4680                         if (ret < 0)
4681                                 return ret;
4682                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4683                                 /* Count all modify-header actions as one. */
4684                                 if (!(action_flags &
4685                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4686                                         ++actions_n;
4687                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4688                                                 MLX5_FLOW_ACTION_MARK_EXT;
4689                         } else {
4690                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4691                                 ++actions_n;
4692                         }
4693                         break;
4694                 case RTE_FLOW_ACTION_TYPE_MARK:
4695                         ret = flow_dv_validate_action_mark(dev, actions,
4696                                                            action_flags,
4697                                                            attr, error);
4698                         if (ret < 0)
4699                                 return ret;
4700                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4701                                 /* Count all modify-header actions as one. */
4702                                 if (!(action_flags &
4703                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4704                                         ++actions_n;
4705                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4706                                                 MLX5_FLOW_ACTION_MARK_EXT;
4707                         } else {
4708                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4709                                 ++actions_n;
4710                         }
4711                         break;
4712                 case RTE_FLOW_ACTION_TYPE_SET_META:
4713                         ret = flow_dv_validate_action_set_meta(dev, actions,
4714                                                                action_flags,
4715                                                                attr, error);
4716                         if (ret < 0)
4717                                 return ret;
4718                         /* Count all modify-header actions as one action. */
4719                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4720                                 ++actions_n;
4721                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4722                         break;
4723                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4724                         ret = flow_dv_validate_action_set_tag(dev, actions,
4725                                                               action_flags,
4726                                                               attr, error);
4727                         if (ret < 0)
4728                                 return ret;
4729                         /* Count all modify-header actions as one action. */
4730                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4731                                 ++actions_n;
4732                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4733                         break;
4734                 case RTE_FLOW_ACTION_TYPE_DROP:
4735                         ret = mlx5_flow_validate_action_drop(action_flags,
4736                                                              attr, error);
4737                         if (ret < 0)
4738                                 return ret;
4739                         action_flags |= MLX5_FLOW_ACTION_DROP;
4740                         ++actions_n;
4741                         break;
4742                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4743                         ret = mlx5_flow_validate_action_queue(actions,
4744                                                               action_flags, dev,
4745                                                               attr, error);
4746                         if (ret < 0)
4747                                 return ret;
4748                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4749                         ++actions_n;
4750                         break;
4751                 case RTE_FLOW_ACTION_TYPE_RSS:
4752                         ret = mlx5_flow_validate_action_rss(actions,
4753                                                             action_flags, dev,
4754                                                             attr, item_flags,
4755                                                             error);
4756                         if (ret < 0)
4757                                 return ret;
4758                         action_flags |= MLX5_FLOW_ACTION_RSS;
4759                         ++actions_n;
4760                         break;
4761                 case RTE_FLOW_ACTION_TYPE_COUNT:
4762                         ret = flow_dv_validate_action_count(dev, error);
4763                         if (ret < 0)
4764                                 return ret;
4765                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4766                         ++actions_n;
4767                         break;
4768                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4769                         if (flow_dv_validate_action_pop_vlan(dev,
4770                                                              action_flags,
4771                                                              actions,
4772                                                              item_flags, attr,
4773                                                              error))
4774                                 return -rte_errno;
4775                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4776                         ++actions_n;
4777                         break;
4778                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4779                         ret = flow_dv_validate_action_push_vlan(action_flags,
4780                                                                 item_flags,
4781                                                                 actions, attr,
4782                                                                 error);
4783                         if (ret < 0)
4784                                 return ret;
4785                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4786                         ++actions_n;
4787                         break;
4788                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4789                         ret = flow_dv_validate_action_set_vlan_pcp
4790                                                 (action_flags, actions, error);
4791                         if (ret < 0)
4792                                 return ret;
4793                         /* Count PCP with push_vlan command. */
4794                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4795                         break;
4796                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4797                         ret = flow_dv_validate_action_set_vlan_vid
4798                                                 (item_flags, action_flags,
4799                                                  actions, error);
4800                         if (ret < 0)
4801                                 return ret;
4802                         /* Count VID with push_vlan command. */
4803                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4804                         break;
4805                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4806                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4807                         ret = flow_dv_validate_action_l2_encap(action_flags,
4808                                                                actions, attr,
4809                                                                error);
4810                         if (ret < 0)
4811                                 return ret;
4812                         action_flags |= actions->type ==
4813                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4814                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4815                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4816                         ++actions_n;
4817                         break;
4818                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4819                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4820                         ret = flow_dv_validate_action_l2_decap(action_flags,
4821                                                                attr, error);
4822                         if (ret < 0)
4823                                 return ret;
4824                         action_flags |= actions->type ==
4825                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4826                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4827                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4828                         ++actions_n;
4829                         break;
4830                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4831                         ret = flow_dv_validate_action_raw_encap(action_flags,
4832                                                                 actions, attr,
4833                                                                 error);
4834                         if (ret < 0)
4835                                 return ret;
4836                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4837                         ++actions_n;
4838                         break;
4839                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4840                         ret = flow_dv_validate_action_raw_decap(action_flags,
4841                                                                 actions, attr,
4842                                                                 error);
4843                         if (ret < 0)
4844                                 return ret;
4845                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4846                         ++actions_n;
4847                         break;
4848                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4849                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4850                         ret = flow_dv_validate_action_modify_mac(action_flags,
4851                                                                  actions,
4852                                                                  item_flags,
4853                                                                  error);
4854                         if (ret < 0)
4855                                 return ret;
4856                         /* Count all modify-header actions as one action. */
4857                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4858                                 ++actions_n;
4859                         action_flags |= actions->type ==
4860                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4861                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4862                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4863                         break;
4864
4865                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4866                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4867                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4868                                                                   actions,
4869                                                                   item_flags,
4870                                                                   error);
4871                         if (ret < 0)
4872                                 return ret;
4873                         /* Count all modify-header actions as one action. */
4874                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4875                                 ++actions_n;
4876                         action_flags |= actions->type ==
4877                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4878                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4879                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4880                         break;
4881                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4882                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4883                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4884                                                                   actions,
4885                                                                   item_flags,
4886                                                                   error);
4887                         if (ret < 0)
4888                                 return ret;
4889                         if (item_ipv6_proto == IPPROTO_ICMPV6)
4890                                 return rte_flow_error_set(error, ENOTSUP,
4891                                         RTE_FLOW_ERROR_TYPE_ACTION,
4892                                         actions,
4893                                         "Can't change header "
4894                                         "with ICMPv6 proto");
4895                         /* Count all modify-header actions as one action. */
4896                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4897                                 ++actions_n;
4898                         action_flags |= actions->type ==
4899                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4900                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4901                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4902                         break;
4903                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4904                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4905                         ret = flow_dv_validate_action_modify_tp(action_flags,
4906                                                                 actions,
4907                                                                 item_flags,
4908                                                                 error);
4909                         if (ret < 0)
4910                                 return ret;
4911                         /* Count all modify-header actions as one action. */
4912                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4913                                 ++actions_n;
4914                         action_flags |= actions->type ==
4915                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4916                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4917                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4918                         break;
4919                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4920                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4921                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4922                                                                  actions,
4923                                                                  item_flags,
4924                                                                  error);
4925                         if (ret < 0)
4926                                 return ret;
4927                         /* Count all modify-header actions as one action. */
4928                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4929                                 ++actions_n;
4930                         action_flags |= actions->type ==
4931                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4932                                                 MLX5_FLOW_ACTION_SET_TTL :
4933                                                 MLX5_FLOW_ACTION_DEC_TTL;
4934                         break;
4935                 case RTE_FLOW_ACTION_TYPE_JUMP:
4936                         ret = flow_dv_validate_action_jump(actions,
4937                                                            action_flags,
4938                                                            attr, external,
4939                                                            error);
4940                         if (ret)
4941                                 return ret;
4942                         ++actions_n;
4943                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4944                         break;
4945                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4946                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4947                         ret = flow_dv_validate_action_modify_tcp_seq
4948                                                                 (action_flags,
4949                                                                  actions,
4950                                                                  item_flags,
4951                                                                  error);
4952                         if (ret < 0)
4953                                 return ret;
4954                         /* Count all modify-header actions as one action. */
4955                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4956                                 ++actions_n;
4957                         action_flags |= actions->type ==
4958                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4959                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4960                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4961                         break;
4962                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4963                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4964                         ret = flow_dv_validate_action_modify_tcp_ack
4965                                                                 (action_flags,
4966                                                                  actions,
4967                                                                  item_flags,
4968                                                                  error);
4969                         if (ret < 0)
4970                                 return ret;
4971                         /* Count all modify-header actions as one action. */
4972                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4973                                 ++actions_n;
4974                         action_flags |= actions->type ==
4975                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4976                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4977                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4978                         break;
4979                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4980                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4981                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4982                         break;
4983                 case RTE_FLOW_ACTION_TYPE_METER:
4984                         ret = mlx5_flow_validate_action_meter(dev,
4985                                                               action_flags,
4986                                                               actions, attr,
4987                                                               error);
4988                         if (ret < 0)
4989                                 return ret;
4990                         action_flags |= MLX5_FLOW_ACTION_METER;
4991                         ++actions_n;
4992                         break;
4993                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4994                         ret = flow_dv_validate_action_modify_ipv4_dscp
4995                                                          (action_flags,
4996                                                           actions,
4997                                                           item_flags,
4998                                                           error);
4999                         if (ret < 0)
5000                                 return ret;
5001                         /* Count all modify-header actions as one action. */
5002                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5003                                 ++actions_n;
5004                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5005                         break;
5006                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5007                         ret = flow_dv_validate_action_modify_ipv6_dscp
5008                                                                 (action_flags,
5009                                                                  actions,
5010                                                                  item_flags,
5011                                                                  error);
5012                         if (ret < 0)
5013                                 return ret;
5014                         /* Count all modify-header actions as one action. */
5015                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5016                                 ++actions_n;
5017                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5018                         break;
5019                 default:
5020                         return rte_flow_error_set(error, ENOTSUP,
5021                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5022                                                   actions,
5023                                                   "action not supported");
5024                 }
5025         }
5026         /*
5027          * Validate the drop action mutual exclusion with other actions.
5028          * Drop action is mutually-exclusive with any other action, except for
5029          * Count action.
5030          */
5031         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5032             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5033                 return rte_flow_error_set(error, EINVAL,
5034                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5035                                           "Drop action is mutually-exclusive "
5036                                           "with any other action, except for "
5037                                           "Count action");
5038         /* Eswitch has few restrictions on using items and actions */
5039         if (attr->transfer) {
5040                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5041                     action_flags & MLX5_FLOW_ACTION_FLAG)
5042                         return rte_flow_error_set(error, ENOTSUP,
5043                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5044                                                   NULL,
5045                                                   "unsupported action FLAG");
5046                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5047                     action_flags & MLX5_FLOW_ACTION_MARK)
5048                         return rte_flow_error_set(error, ENOTSUP,
5049                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5050                                                   NULL,
5051                                                   "unsupported action MARK");
5052                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5053                         return rte_flow_error_set(error, ENOTSUP,
5054                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5055                                                   NULL,
5056                                                   "unsupported action QUEUE");
5057                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5058                         return rte_flow_error_set(error, ENOTSUP,
5059                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5060                                                   NULL,
5061                                                   "unsupported action RSS");
5062                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5063                         return rte_flow_error_set(error, EINVAL,
5064                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5065                                                   actions,
5066                                                   "no fate action is found");
5067         } else {
5068                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5069                         return rte_flow_error_set(error, EINVAL,
5070                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5071                                                   actions,
5072                                                   "no fate action is found");
5073         }
5074         return 0;
5075 }
5076
5077 /**
5078  * Internal preparation function. Allocates the DV flow size,
5079  * this size is constant.
5080  *
5081  * @param[in] attr
5082  *   Pointer to the flow attributes.
5083  * @param[in] items
5084  *   Pointer to the list of items.
5085  * @param[in] actions
5086  *   Pointer to the list of actions.
5087  * @param[out] error
5088  *   Pointer to the error structure.
5089  *
5090  * @return
5091  *   Pointer to mlx5_flow object on success,
5092  *   otherwise NULL and rte_errno is set.
5093  */
5094 static struct mlx5_flow *
5095 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5096                 const struct rte_flow_item items[] __rte_unused,
5097                 const struct rte_flow_action actions[] __rte_unused,
5098                 struct rte_flow_error *error)
5099 {
5100         size_t size = sizeof(struct mlx5_flow);
5101         struct mlx5_flow *dev_flow;
5102
5103         dev_flow = rte_calloc(__func__, 1, size, 0);
5104         if (!dev_flow) {
5105                 rte_flow_error_set(error, ENOMEM,
5106                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5107                                    "not enough memory to create flow");
5108                 return NULL;
5109         }
5110         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5111         dev_flow->ingress = attr->ingress;
5112         dev_flow->transfer = attr->transfer;
5113         return dev_flow;
5114 }
5115
5116 #ifndef NDEBUG
5117 /**
5118  * Sanity check for match mask and value. Similar to check_valid_spec() in
5119  * kernel driver. If unmasked bit is present in value, it returns failure.
5120  *
5121  * @param match_mask
5122  *   pointer to match mask buffer.
5123  * @param match_value
5124  *   pointer to match value buffer.
5125  *
5126  * @return
5127  *   0 if valid, -EINVAL otherwise.
5128  */
5129 static int
5130 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5131 {
5132         uint8_t *m = match_mask;
5133         uint8_t *v = match_value;
5134         unsigned int i;
5135
5136         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5137                 if (v[i] & ~m[i]) {
5138                         DRV_LOG(ERR,
5139                                 "match_value differs from match_criteria"
5140                                 " %p[%u] != %p[%u]",
5141                                 match_value, i, match_mask, i);
5142                         return -EINVAL;
5143                 }
5144         }
5145         return 0;
5146 }
5147 #endif
5148
5149 /**
5150  * Add Ethernet item to matcher and to the value.
5151  *
5152  * @param[in, out] matcher
5153  *   Flow matcher.
5154  * @param[in, out] key
5155  *   Flow matcher value.
5156  * @param[in] item
5157  *   Flow pattern to translate.
5158  * @param[in] inner
5159  *   Item is inner pattern.
5160  */
5161 static void
5162 flow_dv_translate_item_eth(void *matcher, void *key,
5163                            const struct rte_flow_item *item, int inner)
5164 {
5165         const struct rte_flow_item_eth *eth_m = item->mask;
5166         const struct rte_flow_item_eth *eth_v = item->spec;
5167         const struct rte_flow_item_eth nic_mask = {
5168                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5169                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5170                 .type = RTE_BE16(0xffff),
5171         };
5172         void *headers_m;
5173         void *headers_v;
5174         char *l24_v;
5175         unsigned int i;
5176
5177         if (!eth_v)
5178                 return;
5179         if (!eth_m)
5180                 eth_m = &nic_mask;
5181         if (inner) {
5182                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5183                                          inner_headers);
5184                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5185         } else {
5186                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5187                                          outer_headers);
5188                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5189         }
5190         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5191                &eth_m->dst, sizeof(eth_m->dst));
5192         /* The value must be in the range of the mask. */
5193         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5194         for (i = 0; i < sizeof(eth_m->dst); ++i)
5195                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5196         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5197                &eth_m->src, sizeof(eth_m->src));
5198         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5199         /* The value must be in the range of the mask. */
5200         for (i = 0; i < sizeof(eth_m->dst); ++i)
5201                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5202         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5203                  rte_be_to_cpu_16(eth_m->type));
5204         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5205         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5206 }
5207
5208 /**
5209  * Add VLAN item to matcher and to the value.
5210  *
5211  * @param[in, out] dev_flow
5212  *   Flow descriptor.
5213  * @param[in, out] matcher
5214  *   Flow matcher.
5215  * @param[in, out] key
5216  *   Flow matcher value.
5217  * @param[in] item
5218  *   Flow pattern to translate.
5219  * @param[in] inner
5220  *   Item is inner pattern.
5221  */
5222 static void
5223 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5224                             void *matcher, void *key,
5225                             const struct rte_flow_item *item,
5226                             int inner)
5227 {
5228         const struct rte_flow_item_vlan *vlan_m = item->mask;
5229         const struct rte_flow_item_vlan *vlan_v = item->spec;
5230         void *headers_m;
5231         void *headers_v;
5232         uint16_t tci_m;
5233         uint16_t tci_v;
5234
5235         if (!vlan_v)
5236                 return;
5237         if (!vlan_m)
5238                 vlan_m = &rte_flow_item_vlan_mask;
5239         if (inner) {
5240                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5241                                          inner_headers);
5242                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5243         } else {
5244                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5245                                          outer_headers);
5246                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5247                 /*
5248                  * This is workaround, masks are not supported,
5249                  * and pre-validated.
5250                  */
5251                 dev_flow->dv.vf_vlan.tag =
5252                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5253         }
5254         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5255         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5256         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5257         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5258         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5259         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5260         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5261         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5262         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5263         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5264         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5265                  rte_be_to_cpu_16(vlan_m->inner_type));
5266         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5267                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5268 }
5269
5270 /**
5271  * Add IPV4 item to matcher and to the value.
5272  *
5273  * @param[in, out] matcher
5274  *   Flow matcher.
5275  * @param[in, out] key
5276  *   Flow matcher value.
5277  * @param[in] item
5278  *   Flow pattern to translate.
5279  * @param[in] inner
5280  *   Item is inner pattern.
5281  * @param[in] group
5282  *   The group to insert the rule.
5283  */
5284 static void
5285 flow_dv_translate_item_ipv4(void *matcher, void *key,
5286                             const struct rte_flow_item *item,
5287                             int inner, uint32_t group)
5288 {
5289         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5290         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5291         const struct rte_flow_item_ipv4 nic_mask = {
5292                 .hdr = {
5293                         .src_addr = RTE_BE32(0xffffffff),
5294                         .dst_addr = RTE_BE32(0xffffffff),
5295                         .type_of_service = 0xff,
5296                         .next_proto_id = 0xff,
5297                 },
5298         };
5299         void *headers_m;
5300         void *headers_v;
5301         char *l24_m;
5302         char *l24_v;
5303         uint8_t tos;
5304
5305         if (inner) {
5306                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5307                                          inner_headers);
5308                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5309         } else {
5310                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5311                                          outer_headers);
5312                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5313         }
5314         if (group == 0)
5315                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5316         else
5317                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5318         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5319         if (!ipv4_v)
5320                 return;
5321         if (!ipv4_m)
5322                 ipv4_m = &nic_mask;
5323         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5324                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5325         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5326                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5327         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5328         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5329         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5330                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5331         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5332                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5333         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5334         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5335         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5336         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5337                  ipv4_m->hdr.type_of_service);
5338         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5339         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5340                  ipv4_m->hdr.type_of_service >> 2);
5341         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5342         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5343                  ipv4_m->hdr.next_proto_id);
5344         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5345                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5346 }
5347
5348 /**
5349  * Add IPV6 item to matcher and to the value.
5350  *
5351  * @param[in, out] matcher
5352  *   Flow matcher.
5353  * @param[in, out] key
5354  *   Flow matcher value.
5355  * @param[in] item
5356  *   Flow pattern to translate.
5357  * @param[in] inner
5358  *   Item is inner pattern.
5359  * @param[in] group
5360  *   The group to insert the rule.
5361  */
5362 static void
5363 flow_dv_translate_item_ipv6(void *matcher, void *key,
5364                             const struct rte_flow_item *item,
5365                             int inner, uint32_t group)
5366 {
5367         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5368         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5369         const struct rte_flow_item_ipv6 nic_mask = {
5370                 .hdr = {
5371                         .src_addr =
5372                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5373                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5374                         .dst_addr =
5375                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5376                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5377                         .vtc_flow = RTE_BE32(0xffffffff),
5378                         .proto = 0xff,
5379                         .hop_limits = 0xff,
5380                 },
5381         };
5382         void *headers_m;
5383         void *headers_v;
5384         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5385         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5386         char *l24_m;
5387         char *l24_v;
5388         uint32_t vtc_m;
5389         uint32_t vtc_v;
5390         int i;
5391         int size;
5392
5393         if (inner) {
5394                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5395                                          inner_headers);
5396                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5397         } else {
5398                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5399                                          outer_headers);
5400                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5401         }
5402         if (group == 0)
5403                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5404         else
5405                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5406         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5407         if (!ipv6_v)
5408                 return;
5409         if (!ipv6_m)
5410                 ipv6_m = &nic_mask;
5411         size = sizeof(ipv6_m->hdr.dst_addr);
5412         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5413                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5414         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5415                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5416         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5417         for (i = 0; i < size; ++i)
5418                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5419         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5420                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5421         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5422                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5423         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5424         for (i = 0; i < size; ++i)
5425                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5426         /* TOS. */
5427         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5428         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5429         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5430         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5431         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5432         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5433         /* Label. */
5434         if (inner) {
5435                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5436                          vtc_m);
5437                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5438                          vtc_v);
5439         } else {
5440                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5441                          vtc_m);
5442                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5443                          vtc_v);
5444         }
5445         /* Protocol. */
5446         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5447                  ipv6_m->hdr.proto);
5448         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5449                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5450 }
5451
5452 /**
5453  * Add TCP item to matcher and to the value.
5454  *
5455  * @param[in, out] matcher
5456  *   Flow matcher.
5457  * @param[in, out] key
5458  *   Flow matcher value.
5459  * @param[in] item
5460  *   Flow pattern to translate.
5461  * @param[in] inner
5462  *   Item is inner pattern.
5463  */
5464 static void
5465 flow_dv_translate_item_tcp(void *matcher, void *key,
5466                            const struct rte_flow_item *item,
5467                            int inner)
5468 {
5469         const struct rte_flow_item_tcp *tcp_m = item->mask;
5470         const struct rte_flow_item_tcp *tcp_v = item->spec;
5471         void *headers_m;
5472         void *headers_v;
5473
5474         if (inner) {
5475                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5476                                          inner_headers);
5477                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5478         } else {
5479                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5480                                          outer_headers);
5481                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5482         }
5483         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5484         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5485         if (!tcp_v)
5486                 return;
5487         if (!tcp_m)
5488                 tcp_m = &rte_flow_item_tcp_mask;
5489         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5490                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5491         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5492                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5493         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5494                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5495         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5496                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5497         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5498                  tcp_m->hdr.tcp_flags);
5499         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5500                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5501 }
5502
5503 /**
5504  * Add UDP item to matcher and to the value.
5505  *
5506  * @param[in, out] matcher
5507  *   Flow matcher.
5508  * @param[in, out] key
5509  *   Flow matcher value.
5510  * @param[in] item
5511  *   Flow pattern to translate.
5512  * @param[in] inner
5513  *   Item is inner pattern.
5514  */
5515 static void
5516 flow_dv_translate_item_udp(void *matcher, void *key,
5517                            const struct rte_flow_item *item,
5518                            int inner)
5519 {
5520         const struct rte_flow_item_udp *udp_m = item->mask;
5521         const struct rte_flow_item_udp *udp_v = item->spec;
5522         void *headers_m;
5523         void *headers_v;
5524
5525         if (inner) {
5526                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5527                                          inner_headers);
5528                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5529         } else {
5530                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5531                                          outer_headers);
5532                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5533         }
5534         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5535         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5536         if (!udp_v)
5537                 return;
5538         if (!udp_m)
5539                 udp_m = &rte_flow_item_udp_mask;
5540         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5541                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5542         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5543                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5544         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5545                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5546         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5547                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5548 }
5549
5550 /**
5551  * Add GRE optional Key item to matcher and to the value.
5552  *
5553  * @param[in, out] matcher
5554  *   Flow matcher.
5555  * @param[in, out] key
5556  *   Flow matcher value.
5557  * @param[in] item
5558  *   Flow pattern to translate.
5559  * @param[in] inner
5560  *   Item is inner pattern.
5561  */
5562 static void
5563 flow_dv_translate_item_gre_key(void *matcher, void *key,
5564                                    const struct rte_flow_item *item)
5565 {
5566         const rte_be32_t *key_m = item->mask;
5567         const rte_be32_t *key_v = item->spec;
5568         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5569         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5570         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5571
5572         if (!key_v)
5573                 return;
5574         if (!key_m)
5575                 key_m = &gre_key_default_mask;
5576         /* GRE K bit must be on and should already be validated */
5577         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5578         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5579         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5580                  rte_be_to_cpu_32(*key_m) >> 8);
5581         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5582                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5583         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5584                  rte_be_to_cpu_32(*key_m) & 0xFF);
5585         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5586                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5587 }
5588
5589 /**
5590  * Add GRE item to matcher and to the value.
5591  *
5592  * @param[in, out] matcher
5593  *   Flow matcher.
5594  * @param[in, out] key
5595  *   Flow matcher value.
5596  * @param[in] item
5597  *   Flow pattern to translate.
5598  * @param[in] inner
5599  *   Item is inner pattern.
5600  */
5601 static void
5602 flow_dv_translate_item_gre(void *matcher, void *key,
5603                            const struct rte_flow_item *item,
5604                            int inner)
5605 {
5606         const struct rte_flow_item_gre *gre_m = item->mask;
5607         const struct rte_flow_item_gre *gre_v = item->spec;
5608         void *headers_m;
5609         void *headers_v;
5610         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5611         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5612         struct {
5613                 union {
5614                         __extension__
5615                         struct {
5616                                 uint16_t version:3;
5617                                 uint16_t rsvd0:9;
5618                                 uint16_t s_present:1;
5619                                 uint16_t k_present:1;
5620                                 uint16_t rsvd_bit1:1;
5621                                 uint16_t c_present:1;
5622                         };
5623                         uint16_t value;
5624                 };
5625         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5626
5627         if (inner) {
5628                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5629                                          inner_headers);
5630                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5631         } else {
5632                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5633                                          outer_headers);
5634                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5635         }
5636         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5637         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5638         if (!gre_v)
5639                 return;
5640         if (!gre_m)
5641                 gre_m = &rte_flow_item_gre_mask;
5642         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5643                  rte_be_to_cpu_16(gre_m->protocol));
5644         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5645                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5646         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5647         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5648         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5649                  gre_crks_rsvd0_ver_m.c_present);
5650         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5651                  gre_crks_rsvd0_ver_v.c_present &
5652                  gre_crks_rsvd0_ver_m.c_present);
5653         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5654                  gre_crks_rsvd0_ver_m.k_present);
5655         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5656                  gre_crks_rsvd0_ver_v.k_present &
5657                  gre_crks_rsvd0_ver_m.k_present);
5658         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5659                  gre_crks_rsvd0_ver_m.s_present);
5660         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5661                  gre_crks_rsvd0_ver_v.s_present &
5662                  gre_crks_rsvd0_ver_m.s_present);
5663 }
5664
5665 /**
5666  * Add NVGRE item to matcher and to the value.
5667  *
5668  * @param[in, out] matcher
5669  *   Flow matcher.
5670  * @param[in, out] key
5671  *   Flow matcher value.
5672  * @param[in] item
5673  *   Flow pattern to translate.
5674  * @param[in] inner
5675  *   Item is inner pattern.
5676  */
5677 static void
5678 flow_dv_translate_item_nvgre(void *matcher, void *key,
5679                              const struct rte_flow_item *item,
5680                              int inner)
5681 {
5682         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5683         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5684         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5685         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5686         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5687         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5688         char *gre_key_m;
5689         char *gre_key_v;
5690         int size;
5691         int i;
5692
5693         /* For NVGRE, GRE header fields must be set with defined values. */
5694         const struct rte_flow_item_gre gre_spec = {
5695                 .c_rsvd0_ver = RTE_BE16(0x2000),
5696                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5697         };
5698         const struct rte_flow_item_gre gre_mask = {
5699                 .c_rsvd0_ver = RTE_BE16(0xB000),
5700                 .protocol = RTE_BE16(UINT16_MAX),
5701         };
5702         const struct rte_flow_item gre_item = {
5703                 .spec = &gre_spec,
5704                 .mask = &gre_mask,
5705                 .last = NULL,
5706         };
5707         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5708         if (!nvgre_v)
5709                 return;
5710         if (!nvgre_m)
5711                 nvgre_m = &rte_flow_item_nvgre_mask;
5712         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5713         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5714         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5715         memcpy(gre_key_m, tni_flow_id_m, size);
5716         for (i = 0; i < size; ++i)
5717                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5718 }
5719
5720 /**
5721  * Add VXLAN item to matcher and to the value.
5722  *
5723  * @param[in, out] matcher
5724  *   Flow matcher.
5725  * @param[in, out] key
5726  *   Flow matcher value.
5727  * @param[in] item
5728  *   Flow pattern to translate.
5729  * @param[in] inner
5730  *   Item is inner pattern.
5731  */
5732 static void
5733 flow_dv_translate_item_vxlan(void *matcher, void *key,
5734                              const struct rte_flow_item *item,
5735                              int inner)
5736 {
5737         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5738         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5739         void *headers_m;
5740         void *headers_v;
5741         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5742         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5743         char *vni_m;
5744         char *vni_v;
5745         uint16_t dport;
5746         int size;
5747         int i;
5748
5749         if (inner) {
5750                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5751                                          inner_headers);
5752                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5753         } else {
5754                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5755                                          outer_headers);
5756                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5757         }
5758         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5759                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5760         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5761                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5762                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5763         }
5764         if (!vxlan_v)
5765                 return;
5766         if (!vxlan_m)
5767                 vxlan_m = &rte_flow_item_vxlan_mask;
5768         size = sizeof(vxlan_m->vni);
5769         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5770         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5771         memcpy(vni_m, vxlan_m->vni, size);
5772         for (i = 0; i < size; ++i)
5773                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5774 }
5775
5776 /**
5777  * Add Geneve item to matcher and to the value.
5778  *
5779  * @param[in, out] matcher
5780  *   Flow matcher.
5781  * @param[in, out] key
5782  *   Flow matcher value.
5783  * @param[in] item
5784  *   Flow pattern to translate.
5785  * @param[in] inner
5786  *   Item is inner pattern.
5787  */
5788
5789 static void
5790 flow_dv_translate_item_geneve(void *matcher, void *key,
5791                               const struct rte_flow_item *item, int inner)
5792 {
5793         const struct rte_flow_item_geneve *geneve_m = item->mask;
5794         const struct rte_flow_item_geneve *geneve_v = item->spec;
5795         void *headers_m;
5796         void *headers_v;
5797         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5798         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5799         uint16_t dport;
5800         uint16_t gbhdr_m;
5801         uint16_t gbhdr_v;
5802         char *vni_m;
5803         char *vni_v;
5804         size_t size, i;
5805
5806         if (inner) {
5807                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5808                                          inner_headers);
5809                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5810         } else {
5811                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5812                                          outer_headers);
5813                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5814         }
5815         dport = MLX5_UDP_PORT_GENEVE;
5816         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5817                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5818                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5819         }
5820         if (!geneve_v)
5821                 return;
5822         if (!geneve_m)
5823                 geneve_m = &rte_flow_item_geneve_mask;
5824         size = sizeof(geneve_m->vni);
5825         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5826         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5827         memcpy(vni_m, geneve_m->vni, size);
5828         for (i = 0; i < size; ++i)
5829                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5830         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5831                  rte_be_to_cpu_16(geneve_m->protocol));
5832         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5833                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5834         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5835         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5836         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5837                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5838         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5839                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5840         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5841                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5842         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5843                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5844                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5845 }
5846
5847 /**
5848  * Add MPLS item to matcher and to the value.
5849  *
5850  * @param[in, out] matcher
5851  *   Flow matcher.
5852  * @param[in, out] key
5853  *   Flow matcher value.
5854  * @param[in] item
5855  *   Flow pattern to translate.
5856  * @param[in] prev_layer
5857  *   The protocol layer indicated in previous item.
5858  * @param[in] inner
5859  *   Item is inner pattern.
5860  */
5861 static void
5862 flow_dv_translate_item_mpls(void *matcher, void *key,
5863                             const struct rte_flow_item *item,
5864                             uint64_t prev_layer,
5865                             int inner)
5866 {
5867         const uint32_t *in_mpls_m = item->mask;
5868         const uint32_t *in_mpls_v = item->spec;
5869         uint32_t *out_mpls_m = 0;
5870         uint32_t *out_mpls_v = 0;
5871         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5872         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5873         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5874                                      misc_parameters_2);
5875         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5876         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5877         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5878
5879         switch (prev_layer) {
5880         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5881                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5882                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5883                          MLX5_UDP_PORT_MPLS);
5884                 break;
5885         case MLX5_FLOW_LAYER_GRE:
5886                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5887                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5888                          RTE_ETHER_TYPE_MPLS);
5889                 break;
5890         default:
5891                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5892                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5893                          IPPROTO_MPLS);
5894                 break;
5895         }
5896         if (!in_mpls_v)
5897                 return;
5898         if (!in_mpls_m)
5899                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5900         switch (prev_layer) {
5901         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5902                 out_mpls_m =
5903                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5904                                                  outer_first_mpls_over_udp);
5905                 out_mpls_v =
5906                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5907                                                  outer_first_mpls_over_udp);
5908                 break;
5909         case MLX5_FLOW_LAYER_GRE:
5910                 out_mpls_m =
5911                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5912                                                  outer_first_mpls_over_gre);
5913                 out_mpls_v =
5914                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5915                                                  outer_first_mpls_over_gre);
5916                 break;
5917         default:
5918                 /* Inner MPLS not over GRE is not supported. */
5919                 if (!inner) {
5920                         out_mpls_m =
5921                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5922                                                          misc2_m,
5923                                                          outer_first_mpls);
5924                         out_mpls_v =
5925                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5926                                                          misc2_v,
5927                                                          outer_first_mpls);
5928                 }
5929                 break;
5930         }
5931         if (out_mpls_m && out_mpls_v) {
5932                 *out_mpls_m = *in_mpls_m;
5933                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5934         }
5935 }
5936
5937 /**
5938  * Add metadata register item to matcher
5939  *
5940  * @param[in, out] matcher
5941  *   Flow matcher.
5942  * @param[in, out] key
5943  *   Flow matcher value.
5944  * @param[in] reg_type
5945  *   Type of device metadata register
5946  * @param[in] value
5947  *   Register value
5948  * @param[in] mask
5949  *   Register mask
5950  */
5951 static void
5952 flow_dv_match_meta_reg(void *matcher, void *key,
5953                        enum modify_reg reg_type,
5954                        uint32_t data, uint32_t mask)
5955 {
5956         void *misc2_m =
5957                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5958         void *misc2_v =
5959                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5960         uint32_t temp;
5961
5962         data &= mask;
5963         switch (reg_type) {
5964         case REG_A:
5965                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5966                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5967                 break;
5968         case REG_B:
5969                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5970                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5971                 break;
5972         case REG_C_0:
5973                 /*
5974                  * The metadata register C0 field might be divided into
5975                  * source vport index and META item value, we should set
5976                  * this field according to specified mask, not as whole one.
5977                  */
5978                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
5979                 temp |= mask;
5980                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
5981                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
5982                 temp &= ~mask;
5983                 temp |= data;
5984                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
5985                 break;
5986         case REG_C_1:
5987                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5988                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5989                 break;
5990         case REG_C_2:
5991                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5992                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5993                 break;
5994         case REG_C_3:
5995                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
5996                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
5997                 break;
5998         case REG_C_4:
5999                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6000                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6001                 break;
6002         case REG_C_5:
6003                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6004                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6005                 break;
6006         case REG_C_6:
6007                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6008                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6009                 break;
6010         case REG_C_7:
6011                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6012                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6013                 break;
6014         default:
6015                 assert(false);
6016                 break;
6017         }
6018 }
6019
6020 /**
6021  * Add MARK item to matcher
6022  *
6023  * @param[in] dev
6024  *   The device to configure through.
6025  * @param[in, out] matcher
6026  *   Flow matcher.
6027  * @param[in, out] key
6028  *   Flow matcher value.
6029  * @param[in] item
6030  *   Flow pattern to translate.
6031  */
6032 static void
6033 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6034                             void *matcher, void *key,
6035                             const struct rte_flow_item *item)
6036 {
6037         struct mlx5_priv *priv = dev->data->dev_private;
6038         const struct rte_flow_item_mark *mark;
6039         uint32_t value;
6040         uint32_t mask;
6041
6042         mark = item->mask ? (const void *)item->mask :
6043                             &rte_flow_item_mark_mask;
6044         mask = mark->id & priv->sh->dv_mark_mask;
6045         mark = (const void *)item->spec;
6046         assert(mark);
6047         value = mark->id & priv->sh->dv_mark_mask & mask;
6048         if (mask) {
6049                 enum modify_reg reg;
6050
6051                 /* Get the metadata register index for the mark. */
6052                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6053                 assert(reg > 0);
6054                 if (reg == REG_C_0) {
6055                         struct mlx5_priv *priv = dev->data->dev_private;
6056                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6057                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6058
6059                         mask &= msk_c0;
6060                         mask <<= shl_c0;
6061                         value <<= shl_c0;
6062                 }
6063                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6064         }
6065 }
6066
6067 /**
6068  * Add META item to matcher
6069  *
6070  * @param[in] dev
6071  *   The devich to configure through.
6072  * @param[in, out] matcher
6073  *   Flow matcher.
6074  * @param[in, out] key
6075  *   Flow matcher value.
6076  * @param[in] attr
6077  *   Attributes of flow that includes this item.
6078  * @param[in] item
6079  *   Flow pattern to translate.
6080  */
6081 static void
6082 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6083                             void *matcher, void *key,
6084                             const struct rte_flow_attr *attr,
6085                             const struct rte_flow_item *item)
6086 {
6087         const struct rte_flow_item_meta *meta_m;
6088         const struct rte_flow_item_meta *meta_v;
6089
6090         meta_m = (const void *)item->mask;
6091         if (!meta_m)
6092                 meta_m = &rte_flow_item_meta_mask;
6093         meta_v = (const void *)item->spec;
6094         if (meta_v) {
6095                 int reg;
6096                 uint32_t value = meta_v->data;
6097                 uint32_t mask = meta_m->data;
6098
6099                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6100                 if (reg < 0)
6101                         return;
6102                 /*
6103                  * In datapath code there is no endianness
6104                  * coversions for perfromance reasons, all
6105                  * pattern conversions are done in rte_flow.
6106                  */
6107                 value = rte_cpu_to_be_32(value);
6108                 mask = rte_cpu_to_be_32(mask);
6109                 if (reg == REG_C_0) {
6110                         struct mlx5_priv *priv = dev->data->dev_private;
6111                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6112                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6113 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6114                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6115
6116                         value >>= shr_c0;
6117                         mask >>= shr_c0;
6118 #endif
6119                         value <<= shl_c0;
6120                         mask <<= shl_c0;
6121                         assert(msk_c0);
6122                         assert(!(~msk_c0 & mask));
6123                 }
6124                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6125         }
6126 }
6127
6128 /**
6129  * Add vport metadata Reg C0 item to matcher
6130  *
6131  * @param[in, out] matcher
6132  *   Flow matcher.
6133  * @param[in, out] key
6134  *   Flow matcher value.
6135  * @param[in] reg
6136  *   Flow pattern to translate.
6137  */
6138 static void
6139 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6140                                   uint32_t value, uint32_t mask)
6141 {
6142         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6143 }
6144
6145 /**
6146  * Add tag item to matcher
6147  *
6148  * @param[in] dev
6149  *   The devich to configure through.
6150  * @param[in, out] matcher
6151  *   Flow matcher.
6152  * @param[in, out] key
6153  *   Flow matcher value.
6154  * @param[in] item
6155  *   Flow pattern to translate.
6156  */
6157 static void
6158 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6159                                 void *matcher, void *key,
6160                                 const struct rte_flow_item *item)
6161 {
6162         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6163         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6164         uint32_t mask, value;
6165
6166         assert(tag_v);
6167         value = tag_v->data;
6168         mask = tag_m ? tag_m->data : UINT32_MAX;
6169         if (tag_v->id == REG_C_0) {
6170                 struct mlx5_priv *priv = dev->data->dev_private;
6171                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6172                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6173
6174                 mask &= msk_c0;
6175                 mask <<= shl_c0;
6176                 value <<= shl_c0;
6177         }
6178         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6179 }
6180
6181 /**
6182  * Add TAG item to matcher
6183  *
6184  * @param[in] dev
6185  *   The devich to configure through.
6186  * @param[in, out] matcher
6187  *   Flow matcher.
6188  * @param[in, out] key
6189  *   Flow matcher value.
6190  * @param[in] item
6191  *   Flow pattern to translate.
6192  */
6193 static void
6194 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6195                            void *matcher, void *key,
6196                            const struct rte_flow_item *item)
6197 {
6198         const struct rte_flow_item_tag *tag_v = item->spec;
6199         const struct rte_flow_item_tag *tag_m = item->mask;
6200         enum modify_reg reg;
6201
6202         assert(tag_v);
6203         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6204         /* Get the metadata register index for the tag. */
6205         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6206         assert(reg > 0);
6207         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6208 }
6209
6210 /**
6211  * Add source vport match to the specified matcher.
6212  *
6213  * @param[in, out] matcher
6214  *   Flow matcher.
6215  * @param[in, out] key
6216  *   Flow matcher value.
6217  * @param[in] port
6218  *   Source vport value to match
6219  * @param[in] mask
6220  *   Mask
6221  */
6222 static void
6223 flow_dv_translate_item_source_vport(void *matcher, void *key,
6224                                     int16_t port, uint16_t mask)
6225 {
6226         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6227         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6228
6229         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6230         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6231 }
6232
6233 /**
6234  * Translate port-id item to eswitch match on  port-id.
6235  *
6236  * @param[in] dev
6237  *   The devich to configure through.
6238  * @param[in, out] matcher
6239  *   Flow matcher.
6240  * @param[in, out] key
6241  *   Flow matcher value.
6242  * @param[in] item
6243  *   Flow pattern to translate.
6244  *
6245  * @return
6246  *   0 on success, a negative errno value otherwise.
6247  */
6248 static int
6249 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6250                                void *key, const struct rte_flow_item *item)
6251 {
6252         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6253         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6254         struct mlx5_priv *priv;
6255         uint16_t mask, id;
6256
6257         mask = pid_m ? pid_m->id : 0xffff;
6258         id = pid_v ? pid_v->id : dev->data->port_id;
6259         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6260         if (!priv)
6261                 return -rte_errno;
6262         /* Translate to vport field or to metadata, depending on mode. */
6263         if (priv->vport_meta_mask)
6264                 flow_dv_translate_item_meta_vport(matcher, key,
6265                                                   priv->vport_meta_tag,
6266                                                   priv->vport_meta_mask);
6267         else
6268                 flow_dv_translate_item_source_vport(matcher, key,
6269                                                     priv->vport_id, mask);
6270         return 0;
6271 }
6272
6273 /**
6274  * Add ICMP6 item to matcher and to the value.
6275  *
6276  * @param[in, out] matcher
6277  *   Flow matcher.
6278  * @param[in, out] key
6279  *   Flow matcher value.
6280  * @param[in] item
6281  *   Flow pattern to translate.
6282  * @param[in] inner
6283  *   Item is inner pattern.
6284  */
6285 static void
6286 flow_dv_translate_item_icmp6(void *matcher, void *key,
6287                               const struct rte_flow_item *item,
6288                               int inner)
6289 {
6290         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6291         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6292         void *headers_m;
6293         void *headers_v;
6294         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6295                                      misc_parameters_3);
6296         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6297         if (inner) {
6298                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6299                                          inner_headers);
6300                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6301         } else {
6302                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6303                                          outer_headers);
6304                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6305         }
6306         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6307         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6308         if (!icmp6_v)
6309                 return;
6310         if (!icmp6_m)
6311                 icmp6_m = &rte_flow_item_icmp6_mask;
6312         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6313         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6314                  icmp6_v->type & icmp6_m->type);
6315         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6316         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6317                  icmp6_v->code & icmp6_m->code);
6318 }
6319
6320 /**
6321  * Add ICMP item to matcher and to the value.
6322  *
6323  * @param[in, out] matcher
6324  *   Flow matcher.
6325  * @param[in, out] key
6326  *   Flow matcher value.
6327  * @param[in] item
6328  *   Flow pattern to translate.
6329  * @param[in] inner
6330  *   Item is inner pattern.
6331  */
6332 static void
6333 flow_dv_translate_item_icmp(void *matcher, void *key,
6334                             const struct rte_flow_item *item,
6335                             int inner)
6336 {
6337         const struct rte_flow_item_icmp *icmp_m = item->mask;
6338         const struct rte_flow_item_icmp *icmp_v = item->spec;
6339         void *headers_m;
6340         void *headers_v;
6341         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6342                                      misc_parameters_3);
6343         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6344         if (inner) {
6345                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6346                                          inner_headers);
6347                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6348         } else {
6349                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6350                                          outer_headers);
6351                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6352         }
6353         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6354         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6355         if (!icmp_v)
6356                 return;
6357         if (!icmp_m)
6358                 icmp_m = &rte_flow_item_icmp_mask;
6359         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6360                  icmp_m->hdr.icmp_type);
6361         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6362                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6363         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6364                  icmp_m->hdr.icmp_code);
6365         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6366                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6367 }
6368
6369 /**
6370  * Add GTP item to matcher and to the value.
6371  *
6372  * @param[in, out] matcher
6373  *   Flow matcher.
6374  * @param[in, out] key
6375  *   Flow matcher value.
6376  * @param[in] item
6377  *   Flow pattern to translate.
6378  * @param[in] inner
6379  *   Item is inner pattern.
6380  */
6381 static void
6382 flow_dv_translate_item_gtp(void *matcher, void *key,
6383                            const struct rte_flow_item *item, int inner)
6384 {
6385         const struct rte_flow_item_gtp *gtp_m = item->mask;
6386         const struct rte_flow_item_gtp *gtp_v = item->spec;
6387         void *headers_m;
6388         void *headers_v;
6389         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6390                                      misc_parameters_3);
6391         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6392         uint16_t dport = RTE_GTPU_UDP_PORT;
6393
6394         if (inner) {
6395                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6396                                          inner_headers);
6397                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6398         } else {
6399                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6400                                          outer_headers);
6401                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6402         }
6403         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6404                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6405                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6406         }
6407         if (!gtp_v)
6408                 return;
6409         if (!gtp_m)
6410                 gtp_m = &rte_flow_item_gtp_mask;
6411         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6412         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6413                  gtp_v->msg_type & gtp_m->msg_type);
6414         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6415                  rte_be_to_cpu_32(gtp_m->teid));
6416         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6417                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6418 }
6419
6420 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6421
6422 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6423         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6424                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6425
6426 /**
6427  * Calculate flow matcher enable bitmap.
6428  *
6429  * @param match_criteria
6430  *   Pointer to flow matcher criteria.
6431  *
6432  * @return
6433  *   Bitmap of enabled fields.
6434  */
6435 static uint8_t
6436 flow_dv_matcher_enable(uint32_t *match_criteria)
6437 {
6438         uint8_t match_criteria_enable;
6439
6440         match_criteria_enable =
6441                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6442                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6443         match_criteria_enable |=
6444                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6445                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6446         match_criteria_enable |=
6447                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6448                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6449         match_criteria_enable |=
6450                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6451                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6452         match_criteria_enable |=
6453                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6454                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6455         return match_criteria_enable;
6456 }
6457
6458
6459 /**
6460  * Get a flow table.
6461  *
6462  * @param[in, out] dev
6463  *   Pointer to rte_eth_dev structure.
6464  * @param[in] table_id
6465  *   Table id to use.
6466  * @param[in] egress
6467  *   Direction of the table.
6468  * @param[in] transfer
6469  *   E-Switch or NIC flow.
6470  * @param[out] error
6471  *   pointer to error structure.
6472  *
6473  * @return
6474  *   Returns tables resource based on the index, NULL in case of failed.
6475  */
6476 static struct mlx5_flow_tbl_resource *
6477 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6478                          uint32_t table_id, uint8_t egress,
6479                          uint8_t transfer,
6480                          struct rte_flow_error *error)
6481 {
6482         struct mlx5_priv *priv = dev->data->dev_private;
6483         struct mlx5_ibv_shared *sh = priv->sh;
6484         struct mlx5_flow_tbl_resource *tbl;
6485         union mlx5_flow_tbl_key table_key = {
6486                 {
6487                         .table_id = table_id,
6488                         .reserved = 0,
6489                         .domain = !!transfer,
6490                         .direction = !!egress,
6491                 }
6492         };
6493         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6494                                                          table_key.v64);
6495         struct mlx5_flow_tbl_data_entry *tbl_data;
6496         int ret;
6497         void *domain;
6498
6499         if (pos) {
6500                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6501                                         entry);
6502                 tbl = &tbl_data->tbl;
6503                 rte_atomic32_inc(&tbl->refcnt);
6504                 return tbl;
6505         }
6506         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6507         if (!tbl_data) {
6508                 rte_flow_error_set(error, ENOMEM,
6509                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6510                                    NULL,
6511                                    "cannot allocate flow table data entry");
6512                 return NULL;
6513         }
6514         tbl = &tbl_data->tbl;
6515         pos = &tbl_data->entry;
6516         if (transfer)
6517                 domain = sh->fdb_domain;
6518         else if (egress)
6519                 domain = sh->tx_domain;
6520         else
6521                 domain = sh->rx_domain;
6522         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6523         if (!tbl->obj) {
6524                 rte_flow_error_set(error, ENOMEM,
6525                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6526                                    NULL, "cannot create flow table object");
6527                 rte_free(tbl_data);
6528                 return NULL;
6529         }
6530         /*
6531          * No multi-threads now, but still better to initialize the reference
6532          * count before insert it into the hash list.
6533          */
6534         rte_atomic32_init(&tbl->refcnt);
6535         /* Jump action reference count is initialized here. */
6536         rte_atomic32_init(&tbl_data->jump.refcnt);
6537         pos->key = table_key.v64;
6538         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6539         if (ret < 0) {
6540                 rte_flow_error_set(error, -ret,
6541                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6542                                    "cannot insert flow table data entry");
6543                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6544                 rte_free(tbl_data);
6545         }
6546         rte_atomic32_inc(&tbl->refcnt);
6547         return tbl;
6548 }
6549
6550 /**
6551  * Release a flow table.
6552  *
6553  * @param[in] dev
6554  *   Pointer to rte_eth_dev structure.
6555  * @param[in] tbl
6556  *   Table resource to be released.
6557  *
6558  * @return
6559  *   Returns 0 if table was released, else return 1;
6560  */
6561 static int
6562 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6563                              struct mlx5_flow_tbl_resource *tbl)
6564 {
6565         struct mlx5_priv *priv = dev->data->dev_private;
6566         struct mlx5_ibv_shared *sh = priv->sh;
6567         struct mlx5_flow_tbl_data_entry *tbl_data =
6568                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6569
6570         if (!tbl)
6571                 return 0;
6572         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6573                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6574
6575                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6576                 tbl->obj = NULL;
6577                 /* remove the entry from the hash list and free memory. */
6578                 mlx5_hlist_remove(sh->flow_tbls, pos);
6579                 rte_free(tbl_data);
6580                 return 0;
6581         }
6582         return 1;
6583 }
6584
6585 /**
6586  * Register the flow matcher.
6587  *
6588  * @param[in, out] dev
6589  *   Pointer to rte_eth_dev structure.
6590  * @param[in, out] matcher
6591  *   Pointer to flow matcher.
6592  * @param[in, out] key
6593  *   Pointer to flow table key.
6594  * @parm[in, out] dev_flow
6595  *   Pointer to the dev_flow.
6596  * @param[out] error
6597  *   pointer to error structure.
6598  *
6599  * @return
6600  *   0 on success otherwise -errno and errno is set.
6601  */
6602 static int
6603 flow_dv_matcher_register(struct rte_eth_dev *dev,
6604                          struct mlx5_flow_dv_matcher *matcher,
6605                          union mlx5_flow_tbl_key *key,
6606                          struct mlx5_flow *dev_flow,
6607                          struct rte_flow_error *error)
6608 {
6609         struct mlx5_priv *priv = dev->data->dev_private;
6610         struct mlx5_ibv_shared *sh = priv->sh;
6611         struct mlx5_flow_dv_matcher *cache_matcher;
6612         struct mlx5dv_flow_matcher_attr dv_attr = {
6613                 .type = IBV_FLOW_ATTR_NORMAL,
6614                 .match_mask = (void *)&matcher->mask,
6615         };
6616         struct mlx5_flow_tbl_resource *tbl;
6617         struct mlx5_flow_tbl_data_entry *tbl_data;
6618
6619         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6620                                        key->domain, error);
6621         if (!tbl)
6622                 return -rte_errno;      /* No need to refill the error info */
6623         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6624         /* Lookup from cache. */
6625         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6626                 if (matcher->crc == cache_matcher->crc &&
6627                     matcher->priority == cache_matcher->priority &&
6628                     !memcmp((const void *)matcher->mask.buf,
6629                             (const void *)cache_matcher->mask.buf,
6630                             cache_matcher->mask.size)) {
6631                         DRV_LOG(DEBUG,
6632                                 "%s group %u priority %hd use %s "
6633                                 "matcher %p: refcnt %d++",
6634                                 key->domain ? "FDB" : "NIC", key->table_id,
6635                                 cache_matcher->priority,
6636                                 key->direction ? "tx" : "rx",
6637                                 (void *)cache_matcher,
6638                                 rte_atomic32_read(&cache_matcher->refcnt));
6639                         rte_atomic32_inc(&cache_matcher->refcnt);
6640                         dev_flow->dv.matcher = cache_matcher;
6641                         /* old matcher should not make the table ref++. */
6642                         flow_dv_tbl_resource_release(dev, tbl);
6643                         return 0;
6644                 }
6645         }
6646         /* Register new matcher. */
6647         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6648         if (!cache_matcher) {
6649                 flow_dv_tbl_resource_release(dev, tbl);
6650                 return rte_flow_error_set(error, ENOMEM,
6651                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6652                                           "cannot allocate matcher memory");
6653         }
6654         *cache_matcher = *matcher;
6655         dv_attr.match_criteria_enable =
6656                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6657         dv_attr.priority = matcher->priority;
6658         if (key->direction)
6659                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6660         cache_matcher->matcher_object =
6661                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6662         if (!cache_matcher->matcher_object) {
6663                 rte_free(cache_matcher);
6664 #ifdef HAVE_MLX5DV_DR
6665                 flow_dv_tbl_resource_release(dev, tbl);
6666 #endif
6667                 return rte_flow_error_set(error, ENOMEM,
6668                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6669                                           NULL, "cannot create matcher");
6670         }
6671         /* Save the table information */
6672         cache_matcher->tbl = tbl;
6673         rte_atomic32_init(&cache_matcher->refcnt);
6674         /* only matcher ref++, table ref++ already done above in get API. */
6675         rte_atomic32_inc(&cache_matcher->refcnt);
6676         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6677         dev_flow->dv.matcher = cache_matcher;
6678         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6679                 key->domain ? "FDB" : "NIC", key->table_id,
6680                 cache_matcher->priority,
6681                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6682                 rte_atomic32_read(&cache_matcher->refcnt));
6683         return 0;
6684 }
6685
6686 /**
6687  * Find existing tag resource or create and register a new one.
6688  *
6689  * @param dev[in, out]
6690  *   Pointer to rte_eth_dev structure.
6691  * @param[in, out] tag_be24
6692  *   Tag value in big endian then R-shift 8.
6693  * @parm[in, out] dev_flow
6694  *   Pointer to the dev_flow.
6695  * @param[out] error
6696  *   pointer to error structure.
6697  *
6698  * @return
6699  *   0 on success otherwise -errno and errno is set.
6700  */
6701 static int
6702 flow_dv_tag_resource_register
6703                         (struct rte_eth_dev *dev,
6704                          uint32_t tag_be24,
6705                          struct mlx5_flow *dev_flow,
6706                          struct rte_flow_error *error)
6707 {
6708         struct mlx5_priv *priv = dev->data->dev_private;
6709         struct mlx5_ibv_shared *sh = priv->sh;
6710         struct mlx5_flow_dv_tag_resource *cache_resource;
6711         struct mlx5_hlist_entry *entry;
6712
6713         /* Lookup a matching resource from cache. */
6714         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6715         if (entry) {
6716                 cache_resource = container_of
6717                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6718                 rte_atomic32_inc(&cache_resource->refcnt);
6719                 dev_flow->dv.tag_resource = cache_resource;
6720                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6721                         (void *)cache_resource,
6722                         rte_atomic32_read(&cache_resource->refcnt));
6723                 return 0;
6724         }
6725         /* Register new resource. */
6726         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6727         if (!cache_resource)
6728                 return rte_flow_error_set(error, ENOMEM,
6729                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6730                                           "cannot allocate resource memory");
6731         cache_resource->entry.key = (uint64_t)tag_be24;
6732         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6733         if (!cache_resource->action) {
6734                 rte_free(cache_resource);
6735                 return rte_flow_error_set(error, ENOMEM,
6736                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6737                                           NULL, "cannot create action");
6738         }
6739         rte_atomic32_init(&cache_resource->refcnt);
6740         rte_atomic32_inc(&cache_resource->refcnt);
6741         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6742                 mlx5_glue->destroy_flow_action(cache_resource->action);
6743                 rte_free(cache_resource);
6744                 return rte_flow_error_set(error, EEXIST,
6745                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6746                                           NULL, "cannot insert tag");
6747         }
6748         dev_flow->dv.tag_resource = cache_resource;
6749         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6750                 (void *)cache_resource,
6751                 rte_atomic32_read(&cache_resource->refcnt));
6752         return 0;
6753 }
6754
6755 /**
6756  * Release the tag.
6757  *
6758  * @param dev
6759  *   Pointer to Ethernet device.
6760  * @param flow
6761  *   Pointer to mlx5_flow.
6762  *
6763  * @return
6764  *   1 while a reference on it exists, 0 when freed.
6765  */
6766 static int
6767 flow_dv_tag_release(struct rte_eth_dev *dev,
6768                     struct mlx5_flow_dv_tag_resource *tag)
6769 {
6770         struct mlx5_priv *priv = dev->data->dev_private;
6771         struct mlx5_ibv_shared *sh = priv->sh;
6772
6773         assert(tag);
6774         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6775                 dev->data->port_id, (void *)tag,
6776                 rte_atomic32_read(&tag->refcnt));
6777         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6778                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6779                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6780                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6781                         dev->data->port_id, (void *)tag);
6782                 rte_free(tag);
6783                 return 0;
6784         }
6785         return 1;
6786 }
6787
6788 /**
6789  * Translate port ID action to vport.
6790  *
6791  * @param[in] dev
6792  *   Pointer to rte_eth_dev structure.
6793  * @param[in] action
6794  *   Pointer to the port ID action.
6795  * @param[out] dst_port_id
6796  *   The target port ID.
6797  * @param[out] error
6798  *   Pointer to the error structure.
6799  *
6800  * @return
6801  *   0 on success, a negative errno value otherwise and rte_errno is set.
6802  */
6803 static int
6804 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6805                                  const struct rte_flow_action *action,
6806                                  uint32_t *dst_port_id,
6807                                  struct rte_flow_error *error)
6808 {
6809         uint32_t port;
6810         struct mlx5_priv *priv;
6811         const struct rte_flow_action_port_id *conf =
6812                         (const struct rte_flow_action_port_id *)action->conf;
6813
6814         port = conf->original ? dev->data->port_id : conf->id;
6815         priv = mlx5_port_to_eswitch_info(port, false);
6816         if (!priv)
6817                 return rte_flow_error_set(error, -rte_errno,
6818                                           RTE_FLOW_ERROR_TYPE_ACTION,
6819                                           NULL,
6820                                           "No eswitch info was found for port");
6821 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6822         /*
6823          * This parameter is transferred to
6824          * mlx5dv_dr_action_create_dest_ib_port().
6825          */
6826         *dst_port_id = priv->ibv_port;
6827 #else
6828         /*
6829          * Legacy mode, no LAG configurations is supported.
6830          * This parameter is transferred to
6831          * mlx5dv_dr_action_create_dest_vport().
6832          */
6833         *dst_port_id = priv->vport_id;
6834 #endif
6835         return 0;
6836 }
6837
6838 /**
6839  * Add Tx queue matcher
6840  *
6841  * @param[in] dev
6842  *   Pointer to the dev struct.
6843  * @param[in, out] matcher
6844  *   Flow matcher.
6845  * @param[in, out] key
6846  *   Flow matcher value.
6847  * @param[in] item
6848  *   Flow pattern to translate.
6849  * @param[in] inner
6850  *   Item is inner pattern.
6851  */
6852 static void
6853 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6854                                 void *matcher, void *key,
6855                                 const struct rte_flow_item *item)
6856 {
6857         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6858         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6859         void *misc_m =
6860                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6861         void *misc_v =
6862                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6863         struct mlx5_txq_ctrl *txq;
6864         uint32_t queue;
6865
6866
6867         queue_m = (const void *)item->mask;
6868         if (!queue_m)
6869                 return;
6870         queue_v = (const void *)item->spec;
6871         if (!queue_v)
6872                 return;
6873         txq = mlx5_txq_get(dev, queue_v->queue);
6874         if (!txq)
6875                 return;
6876         queue = txq->obj->sq->id;
6877         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6878         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6879                  queue & queue_m->queue);
6880         mlx5_txq_release(dev, queue_v->queue);
6881 }
6882
6883 /**
6884  * Set the hash fields according to the @p flow information.
6885  *
6886  * @param[in] dev_flow
6887  *   Pointer to the mlx5_flow.
6888  */
6889 static void
6890 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6891 {
6892         struct rte_flow *flow = dev_flow->flow;
6893         uint64_t items = dev_flow->layers;
6894         int rss_inner = 0;
6895         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6896
6897         dev_flow->hash_fields = 0;
6898 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6899         if (flow->rss.level >= 2) {
6900                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6901                 rss_inner = 1;
6902         }
6903 #endif
6904         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6905             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6906                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6907                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6908                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6909                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6910                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6911                         else
6912                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6913                 }
6914         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6915                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6916                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6917                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6918                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
6919                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6920                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
6921                         else
6922                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
6923                 }
6924         }
6925         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
6926             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
6927                 if (rss_types & ETH_RSS_UDP) {
6928                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6929                                 dev_flow->hash_fields |=
6930                                                 IBV_RX_HASH_SRC_PORT_UDP;
6931                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6932                                 dev_flow->hash_fields |=
6933                                                 IBV_RX_HASH_DST_PORT_UDP;
6934                         else
6935                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
6936                 }
6937         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
6938                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
6939                 if (rss_types & ETH_RSS_TCP) {
6940                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6941                                 dev_flow->hash_fields |=
6942                                                 IBV_RX_HASH_SRC_PORT_TCP;
6943                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6944                                 dev_flow->hash_fields |=
6945                                                 IBV_RX_HASH_DST_PORT_TCP;
6946                         else
6947                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
6948                 }
6949         }
6950 }
6951
6952 /**
6953  * Fill the flow with DV spec, lock free
6954  * (mutex should be acquired by caller).
6955  *
6956  * @param[in] dev
6957  *   Pointer to rte_eth_dev structure.
6958  * @param[in, out] dev_flow
6959  *   Pointer to the sub flow.
6960  * @param[in] attr
6961  *   Pointer to the flow attributes.
6962  * @param[in] items
6963  *   Pointer to the list of items.
6964  * @param[in] actions
6965  *   Pointer to the list of actions.
6966  * @param[out] error
6967  *   Pointer to the error structure.
6968  *
6969  * @return
6970  *   0 on success, a negative errno value otherwise and rte_errno is set.
6971  */
6972 static int
6973 __flow_dv_translate(struct rte_eth_dev *dev,
6974                     struct mlx5_flow *dev_flow,
6975                     const struct rte_flow_attr *attr,
6976                     const struct rte_flow_item items[],
6977                     const struct rte_flow_action actions[],
6978                     struct rte_flow_error *error)
6979 {
6980         struct mlx5_priv *priv = dev->data->dev_private;
6981         struct mlx5_dev_config *dev_conf = &priv->config;
6982         struct rte_flow *flow = dev_flow->flow;
6983         uint64_t item_flags = 0;
6984         uint64_t last_item = 0;
6985         uint64_t action_flags = 0;
6986         uint64_t priority = attr->priority;
6987         struct mlx5_flow_dv_matcher matcher = {
6988                 .mask = {
6989                         .size = sizeof(matcher.mask.buf),
6990                 },
6991         };
6992         int actions_n = 0;
6993         bool actions_end = false;
6994         union {
6995                 struct mlx5_flow_dv_modify_hdr_resource res;
6996                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
6997                             sizeof(struct mlx5_modification_cmd) *
6998                             (MLX5_MAX_MODIFY_NUM + 1)];
6999         } mhdr_dummy;
7000         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7001         union flow_dv_attr flow_attr = { .attr = 0 };
7002         uint32_t tag_be;
7003         union mlx5_flow_tbl_key tbl_key;
7004         uint32_t modify_action_position = UINT32_MAX;
7005         void *match_mask = matcher.mask.buf;
7006         void *match_value = dev_flow->dv.value.buf;
7007         uint8_t next_protocol = 0xff;
7008         struct rte_vlan_hdr vlan = { 0 };
7009         uint32_t table;
7010         int ret = 0;
7011
7012         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7013                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7014         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7015                                        &table, error);
7016         if (ret)
7017                 return ret;
7018         dev_flow->group = table;
7019         if (attr->transfer)
7020                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7021         if (priority == MLX5_FLOW_PRIO_RSVD)
7022                 priority = dev_conf->flow_prio - 1;
7023         /* number of actions must be set to 0 in case of dirty stack. */
7024         mhdr_res->actions_num = 0;
7025         for (; !actions_end ; actions++) {
7026                 const struct rte_flow_action_queue *queue;
7027                 const struct rte_flow_action_rss *rss;
7028                 const struct rte_flow_action *action = actions;
7029                 const struct rte_flow_action_count *count = action->conf;
7030                 const uint8_t *rss_key;
7031                 const struct rte_flow_action_jump *jump_data;
7032                 const struct rte_flow_action_meter *mtr;
7033                 struct mlx5_flow_tbl_resource *tbl;
7034                 uint32_t port_id = 0;
7035                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7036                 int action_type = actions->type;
7037                 const struct rte_flow_action *found_action = NULL;
7038
7039                 switch (action_type) {
7040                 case RTE_FLOW_ACTION_TYPE_VOID:
7041                         break;
7042                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7043                         if (flow_dv_translate_action_port_id(dev, action,
7044                                                              &port_id, error))
7045                                 return -rte_errno;
7046                         port_id_resource.port_id = port_id;
7047                         if (flow_dv_port_id_action_resource_register
7048                             (dev, &port_id_resource, dev_flow, error))
7049                                 return -rte_errno;
7050                         dev_flow->dv.actions[actions_n++] =
7051                                 dev_flow->dv.port_id_action->action;
7052                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7053                         break;
7054                 case RTE_FLOW_ACTION_TYPE_FLAG:
7055                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7056                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7057                                 struct rte_flow_action_mark mark = {
7058                                         .id = MLX5_FLOW_MARK_DEFAULT,
7059                                 };
7060
7061                                 if (flow_dv_convert_action_mark(dev, &mark,
7062                                                                 mhdr_res,
7063                                                                 error))
7064                                         return -rte_errno;
7065                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7066                                 break;
7067                         }
7068                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7069                         if (!dev_flow->dv.tag_resource)
7070                                 if (flow_dv_tag_resource_register
7071                                     (dev, tag_be, dev_flow, error))
7072                                         return -rte_errno;
7073                         dev_flow->dv.actions[actions_n++] =
7074                                 dev_flow->dv.tag_resource->action;
7075                         break;
7076                 case RTE_FLOW_ACTION_TYPE_MARK:
7077                         action_flags |= MLX5_FLOW_ACTION_MARK;
7078                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7079                                 const struct rte_flow_action_mark *mark =
7080                                         (const struct rte_flow_action_mark *)
7081                                                 actions->conf;
7082
7083                                 if (flow_dv_convert_action_mark(dev, mark,
7084                                                                 mhdr_res,
7085                                                                 error))
7086                                         return -rte_errno;
7087                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7088                                 break;
7089                         }
7090                         /* Fall-through */
7091                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7092                         /* Legacy (non-extensive) MARK action. */
7093                         tag_be = mlx5_flow_mark_set
7094                               (((const struct rte_flow_action_mark *)
7095                                (actions->conf))->id);
7096                         if (!dev_flow->dv.tag_resource)
7097                                 if (flow_dv_tag_resource_register
7098                                     (dev, tag_be, dev_flow, error))
7099                                         return -rte_errno;
7100                         dev_flow->dv.actions[actions_n++] =
7101                                 dev_flow->dv.tag_resource->action;
7102                         break;
7103                 case RTE_FLOW_ACTION_TYPE_SET_META:
7104                         if (flow_dv_convert_action_set_meta
7105                                 (dev, mhdr_res, attr,
7106                                  (const struct rte_flow_action_set_meta *)
7107                                   actions->conf, error))
7108                                 return -rte_errno;
7109                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7110                         break;
7111                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7112                         if (flow_dv_convert_action_set_tag
7113                                 (dev, mhdr_res,
7114                                  (const struct rte_flow_action_set_tag *)
7115                                   actions->conf, error))
7116                                 return -rte_errno;
7117                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7118                         break;
7119                 case RTE_FLOW_ACTION_TYPE_DROP:
7120                         action_flags |= MLX5_FLOW_ACTION_DROP;
7121                         break;
7122                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7123                         assert(flow->rss.queue);
7124                         queue = actions->conf;
7125                         flow->rss.queue_num = 1;
7126                         (*flow->rss.queue)[0] = queue->index;
7127                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7128                         break;
7129                 case RTE_FLOW_ACTION_TYPE_RSS:
7130                         assert(flow->rss.queue);
7131                         rss = actions->conf;
7132                         if (flow->rss.queue)
7133                                 memcpy((*flow->rss.queue), rss->queue,
7134                                        rss->queue_num * sizeof(uint16_t));
7135                         flow->rss.queue_num = rss->queue_num;
7136                         /* NULL RSS key indicates default RSS key. */
7137                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7138                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7139                         /*
7140                          * rss->level and rss.types should be set in advance
7141                          * when expanding items for RSS.
7142                          */
7143                         action_flags |= MLX5_FLOW_ACTION_RSS;
7144                         break;
7145                 case RTE_FLOW_ACTION_TYPE_COUNT:
7146                         if (!dev_conf->devx) {
7147                                 rte_errno = ENOTSUP;
7148                                 goto cnt_err;
7149                         }
7150                         flow->counter = flow_dv_counter_alloc(dev,
7151                                                               count->shared,
7152                                                               count->id,
7153                                                               dev_flow->group);
7154                         if (flow->counter == NULL)
7155                                 goto cnt_err;
7156                         dev_flow->dv.actions[actions_n++] =
7157                                 flow->counter->action;
7158                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7159                         break;
7160 cnt_err:
7161                         if (rte_errno == ENOTSUP)
7162                                 return rte_flow_error_set
7163                                               (error, ENOTSUP,
7164                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7165                                                NULL,
7166                                                "count action not supported");
7167                         else
7168                                 return rte_flow_error_set
7169                                                 (error, rte_errno,
7170                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7171                                                  action,
7172                                                  "cannot create counter"
7173                                                   " object.");
7174                         break;
7175                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7176                         dev_flow->dv.actions[actions_n++] =
7177                                                 priv->sh->pop_vlan_action;
7178                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7179                         break;
7180                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7181                         flow_dev_get_vlan_info_from_items(items, &vlan);
7182                         vlan.eth_proto = rte_be_to_cpu_16
7183                              ((((const struct rte_flow_action_of_push_vlan *)
7184                                                    actions->conf)->ethertype));
7185                         found_action = mlx5_flow_find_action
7186                                         (actions + 1,
7187                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7188                         if (found_action)
7189                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7190                         found_action = mlx5_flow_find_action
7191                                         (actions + 1,
7192                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7193                         if (found_action)
7194                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7195                         if (flow_dv_create_action_push_vlan
7196                                             (dev, attr, &vlan, dev_flow, error))
7197                                 return -rte_errno;
7198                         dev_flow->dv.actions[actions_n++] =
7199                                            dev_flow->dv.push_vlan_res->action;
7200                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7201                         break;
7202                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7203                         /* of_vlan_push action handled this action */
7204                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7205                         break;
7206                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7207                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7208                                 break;
7209                         flow_dev_get_vlan_info_from_items(items, &vlan);
7210                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7211                         /* If no VLAN push - this is a modify header action */
7212                         if (flow_dv_convert_action_modify_vlan_vid
7213                                                 (mhdr_res, actions, error))
7214                                 return -rte_errno;
7215                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7216                         break;
7217                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7218                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7219                         if (flow_dv_create_action_l2_encap(dev, actions,
7220                                                            dev_flow,
7221                                                            attr->transfer,
7222                                                            error))
7223                                 return -rte_errno;
7224                         dev_flow->dv.actions[actions_n++] =
7225                                 dev_flow->dv.encap_decap->verbs_action;
7226                         action_flags |= actions->type ==
7227                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
7228                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
7229                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
7230                         break;
7231                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7232                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7233                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7234                                                            attr->transfer,
7235                                                            error))
7236                                 return -rte_errno;
7237                         dev_flow->dv.actions[actions_n++] =
7238                                 dev_flow->dv.encap_decap->verbs_action;
7239                         action_flags |= actions->type ==
7240                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
7241                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
7242                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
7243                         break;
7244                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7245                         /* Handle encap with preceding decap. */
7246                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
7247                                 if (flow_dv_create_action_raw_encap
7248                                         (dev, actions, dev_flow, attr, error))
7249                                         return -rte_errno;
7250                                 dev_flow->dv.actions[actions_n++] =
7251                                         dev_flow->dv.encap_decap->verbs_action;
7252                         } else {
7253                                 /* Handle encap without preceding decap. */
7254                                 if (flow_dv_create_action_l2_encap
7255                                     (dev, actions, dev_flow, attr->transfer,
7256                                      error))
7257                                         return -rte_errno;
7258                                 dev_flow->dv.actions[actions_n++] =
7259                                         dev_flow->dv.encap_decap->verbs_action;
7260                         }
7261                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
7262                         break;
7263                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7264                         /* Check if this decap is followed by encap. */
7265                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
7266                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
7267                                action++) {
7268                         }
7269                         /* Handle decap only if it isn't followed by encap. */
7270                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7271                                 if (flow_dv_create_action_l2_decap
7272                                     (dev, dev_flow, attr->transfer, error))
7273                                         return -rte_errno;
7274                                 dev_flow->dv.actions[actions_n++] =
7275                                         dev_flow->dv.encap_decap->verbs_action;
7276                         }
7277                         /* If decap is followed by encap, handle it at encap. */
7278                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
7279                         break;
7280                 case RTE_FLOW_ACTION_TYPE_JUMP:
7281                         jump_data = action->conf;
7282                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7283                                                        jump_data->group, &table,
7284                                                        error);
7285                         if (ret)
7286                                 return ret;
7287                         tbl = flow_dv_tbl_resource_get(dev, table,
7288                                                        attr->egress,
7289                                                        attr->transfer, error);
7290                         if (!tbl)
7291                                 return rte_flow_error_set
7292                                                 (error, errno,
7293                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7294                                                  NULL,
7295                                                  "cannot create jump action.");
7296                         if (flow_dv_jump_tbl_resource_register
7297                             (dev, tbl, dev_flow, error)) {
7298                                 flow_dv_tbl_resource_release(dev, tbl);
7299                                 return rte_flow_error_set
7300                                                 (error, errno,
7301                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7302                                                  NULL,
7303                                                  "cannot create jump action.");
7304                         }
7305                         dev_flow->dv.actions[actions_n++] =
7306                                 dev_flow->dv.jump->action;
7307                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7308                         break;
7309                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7310                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7311                         if (flow_dv_convert_action_modify_mac
7312                                         (mhdr_res, actions, error))
7313                                 return -rte_errno;
7314                         action_flags |= actions->type ==
7315                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7316                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7317                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7318                         break;
7319                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7320                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7321                         if (flow_dv_convert_action_modify_ipv4
7322                                         (mhdr_res, actions, error))
7323                                 return -rte_errno;
7324                         action_flags |= actions->type ==
7325                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7326                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7327                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7328                         break;
7329                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7330                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7331                         if (flow_dv_convert_action_modify_ipv6
7332                                         (mhdr_res, actions, error))
7333                                 return -rte_errno;
7334                         action_flags |= actions->type ==
7335                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7336                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7337                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7338                         break;
7339                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7340                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7341                         if (flow_dv_convert_action_modify_tp
7342                                         (mhdr_res, actions, items,
7343                                          &flow_attr, error))
7344                                 return -rte_errno;
7345                         action_flags |= actions->type ==
7346                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7347                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7348                                         MLX5_FLOW_ACTION_SET_TP_DST;
7349                         break;
7350                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7351                         if (flow_dv_convert_action_modify_dec_ttl
7352                                         (mhdr_res, items, &flow_attr, error))
7353                                 return -rte_errno;
7354                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7355                         break;
7356                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7357                         if (flow_dv_convert_action_modify_ttl
7358                                         (mhdr_res, actions, items,
7359                                          &flow_attr, error))
7360                                 return -rte_errno;
7361                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7362                         break;
7363                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7364                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7365                         if (flow_dv_convert_action_modify_tcp_seq
7366                                         (mhdr_res, actions, error))
7367                                 return -rte_errno;
7368                         action_flags |= actions->type ==
7369                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7370                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7371                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7372                         break;
7373
7374                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7375                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7376                         if (flow_dv_convert_action_modify_tcp_ack
7377                                         (mhdr_res, actions, error))
7378                                 return -rte_errno;
7379                         action_flags |= actions->type ==
7380                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7381                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7382                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7383                         break;
7384                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7385                         if (flow_dv_convert_action_set_reg
7386                                         (mhdr_res, actions, error))
7387                                 return -rte_errno;
7388                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7389                         break;
7390                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7391                         if (flow_dv_convert_action_copy_mreg
7392                                         (dev, mhdr_res, actions, error))
7393                                 return -rte_errno;
7394                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7395                         break;
7396                 case RTE_FLOW_ACTION_TYPE_METER:
7397                         mtr = actions->conf;
7398                         if (!flow->meter) {
7399                                 flow->meter = mlx5_flow_meter_attach(priv,
7400                                                         mtr->mtr_id, attr,
7401                                                         error);
7402                                 if (!flow->meter)
7403                                         return rte_flow_error_set(error,
7404                                                 rte_errno,
7405                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7406                                                 NULL,
7407                                                 "meter not found "
7408                                                 "or invalid parameters");
7409                         }
7410                         /* Set the meter action. */
7411                         dev_flow->dv.actions[actions_n++] =
7412                                 flow->meter->mfts->meter_action;
7413                         action_flags |= MLX5_FLOW_ACTION_METER;
7414                         break;
7415                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7416                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7417                                                               actions, error))
7418                                 return -rte_errno;
7419                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7420                         break;
7421                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7422                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7423                                                               actions, error))
7424                                 return -rte_errno;
7425                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7426                         break;
7427                 case RTE_FLOW_ACTION_TYPE_END:
7428                         actions_end = true;
7429                         if (mhdr_res->actions_num) {
7430                                 /* create modify action if needed. */
7431                                 if (flow_dv_modify_hdr_resource_register
7432                                         (dev, mhdr_res, dev_flow, error))
7433                                         return -rte_errno;
7434                                 dev_flow->dv.actions[modify_action_position] =
7435                                         dev_flow->dv.modify_hdr->verbs_action;
7436                         }
7437                         break;
7438                 default:
7439                         break;
7440                 }
7441                 if (mhdr_res->actions_num &&
7442                     modify_action_position == UINT32_MAX)
7443                         modify_action_position = actions_n++;
7444         }
7445         dev_flow->dv.actions_n = actions_n;
7446         dev_flow->actions = action_flags;
7447         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7448                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7449                 int item_type = items->type;
7450
7451                 switch (item_type) {
7452                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7453                         flow_dv_translate_item_port_id(dev, match_mask,
7454                                                        match_value, items);
7455                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7456                         break;
7457                 case RTE_FLOW_ITEM_TYPE_ETH:
7458                         flow_dv_translate_item_eth(match_mask, match_value,
7459                                                    items, tunnel);
7460                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7461                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7462                                              MLX5_FLOW_LAYER_OUTER_L2;
7463                         break;
7464                 case RTE_FLOW_ITEM_TYPE_VLAN:
7465                         flow_dv_translate_item_vlan(dev_flow,
7466                                                     match_mask, match_value,
7467                                                     items, tunnel);
7468                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7469                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7470                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7471                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7472                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7473                         break;
7474                 case RTE_FLOW_ITEM_TYPE_IPV4:
7475                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7476                                                   &item_flags, &tunnel);
7477                         flow_dv_translate_item_ipv4(match_mask, match_value,
7478                                                     items, tunnel,
7479                                                     dev_flow->group);
7480                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7481                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7482                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7483                         if (items->mask != NULL &&
7484                             ((const struct rte_flow_item_ipv4 *)
7485                              items->mask)->hdr.next_proto_id) {
7486                                 next_protocol =
7487                                         ((const struct rte_flow_item_ipv4 *)
7488                                          (items->spec))->hdr.next_proto_id;
7489                                 next_protocol &=
7490                                         ((const struct rte_flow_item_ipv4 *)
7491                                          (items->mask))->hdr.next_proto_id;
7492                         } else {
7493                                 /* Reset for inner layer. */
7494                                 next_protocol = 0xff;
7495                         }
7496                         break;
7497                 case RTE_FLOW_ITEM_TYPE_IPV6:
7498                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7499                                                   &item_flags, &tunnel);
7500                         flow_dv_translate_item_ipv6(match_mask, match_value,
7501                                                     items, tunnel,
7502                                                     dev_flow->group);
7503                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7504                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7505                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7506                         if (items->mask != NULL &&
7507                             ((const struct rte_flow_item_ipv6 *)
7508                              items->mask)->hdr.proto) {
7509                                 next_protocol =
7510                                         ((const struct rte_flow_item_ipv6 *)
7511                                          items->spec)->hdr.proto;
7512                                 next_protocol &=
7513                                         ((const struct rte_flow_item_ipv6 *)
7514                                          items->mask)->hdr.proto;
7515                         } else {
7516                                 /* Reset for inner layer. */
7517                                 next_protocol = 0xff;
7518                         }
7519                         break;
7520                 case RTE_FLOW_ITEM_TYPE_TCP:
7521                         flow_dv_translate_item_tcp(match_mask, match_value,
7522                                                    items, tunnel);
7523                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7524                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7525                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7526                         break;
7527                 case RTE_FLOW_ITEM_TYPE_UDP:
7528                         flow_dv_translate_item_udp(match_mask, match_value,
7529                                                    items, tunnel);
7530                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7531                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7532                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7533                         break;
7534                 case RTE_FLOW_ITEM_TYPE_GRE:
7535                         flow_dv_translate_item_gre(match_mask, match_value,
7536                                                    items, tunnel);
7537                         last_item = MLX5_FLOW_LAYER_GRE;
7538                         break;
7539                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7540                         flow_dv_translate_item_gre_key(match_mask,
7541                                                        match_value, items);
7542                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7543                         break;
7544                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7545                         flow_dv_translate_item_nvgre(match_mask, match_value,
7546                                                      items, tunnel);
7547                         last_item = MLX5_FLOW_LAYER_GRE;
7548                         break;
7549                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7550                         flow_dv_translate_item_vxlan(match_mask, match_value,
7551                                                      items, tunnel);
7552                         last_item = MLX5_FLOW_LAYER_VXLAN;
7553                         break;
7554                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7555                         flow_dv_translate_item_vxlan(match_mask, match_value,
7556                                                      items, tunnel);
7557                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7558                         break;
7559                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7560                         flow_dv_translate_item_geneve(match_mask, match_value,
7561                                                       items, tunnel);
7562                         last_item = MLX5_FLOW_LAYER_GENEVE;
7563                         break;
7564                 case RTE_FLOW_ITEM_TYPE_MPLS:
7565                         flow_dv_translate_item_mpls(match_mask, match_value,
7566                                                     items, last_item, tunnel);
7567                         last_item = MLX5_FLOW_LAYER_MPLS;
7568                         break;
7569                 case RTE_FLOW_ITEM_TYPE_MARK:
7570                         flow_dv_translate_item_mark(dev, match_mask,
7571                                                     match_value, items);
7572                         last_item = MLX5_FLOW_ITEM_MARK;
7573                         break;
7574                 case RTE_FLOW_ITEM_TYPE_META:
7575                         flow_dv_translate_item_meta(dev, match_mask,
7576                                                     match_value, attr, items);
7577                         last_item = MLX5_FLOW_ITEM_METADATA;
7578                         break;
7579                 case RTE_FLOW_ITEM_TYPE_ICMP:
7580                         flow_dv_translate_item_icmp(match_mask, match_value,
7581                                                     items, tunnel);
7582                         last_item = MLX5_FLOW_LAYER_ICMP;
7583                         break;
7584                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7585                         flow_dv_translate_item_icmp6(match_mask, match_value,
7586                                                       items, tunnel);
7587                         last_item = MLX5_FLOW_LAYER_ICMP6;
7588                         break;
7589                 case RTE_FLOW_ITEM_TYPE_TAG:
7590                         flow_dv_translate_item_tag(dev, match_mask,
7591                                                    match_value, items);
7592                         last_item = MLX5_FLOW_ITEM_TAG;
7593                         break;
7594                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7595                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7596                                                         match_value, items);
7597                         last_item = MLX5_FLOW_ITEM_TAG;
7598                         break;
7599                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7600                         flow_dv_translate_item_tx_queue(dev, match_mask,
7601                                                         match_value,
7602                                                         items);
7603                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7604                         break;
7605                 case RTE_FLOW_ITEM_TYPE_GTP:
7606                         flow_dv_translate_item_gtp(match_mask, match_value,
7607                                                    items, tunnel);
7608                         last_item = MLX5_FLOW_LAYER_GTP;
7609                         break;
7610                 default:
7611                         break;
7612                 }
7613                 item_flags |= last_item;
7614         }
7615         /*
7616          * When E-Switch mode is enabled, we have two cases where we need to
7617          * set the source port manually.
7618          * The first one, is in case of Nic steering rule, and the second is
7619          * E-Switch rule where no port_id item was found. In both cases
7620          * the source port is set according the current port in use.
7621          */
7622         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
7623             (priv->representor || priv->master)) {
7624                 if (flow_dv_translate_item_port_id(dev, match_mask,
7625                                                    match_value, NULL))
7626                         return -rte_errno;
7627         }
7628         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7629                                          dev_flow->dv.value.buf));
7630         dev_flow->layers = item_flags;
7631         if (action_flags & MLX5_FLOW_ACTION_RSS)
7632                 flow_dv_hashfields_set(dev_flow);
7633         /* Register matcher. */
7634         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7635                                     matcher.mask.size);
7636         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7637                                                      matcher.priority);
7638         /* reserved field no needs to be set to 0 here. */
7639         tbl_key.domain = attr->transfer;
7640         tbl_key.direction = attr->egress;
7641         tbl_key.table_id = dev_flow->group;
7642         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7643                 return -rte_errno;
7644         return 0;
7645 }
7646
7647 /**
7648  * Apply the flow to the NIC, lock free,
7649  * (mutex should be acquired by caller).
7650  *
7651  * @param[in] dev
7652  *   Pointer to the Ethernet device structure.
7653  * @param[in, out] flow
7654  *   Pointer to flow structure.
7655  * @param[out] error
7656  *   Pointer to error structure.
7657  *
7658  * @return
7659  *   0 on success, a negative errno value otherwise and rte_errno is set.
7660  */
7661 static int
7662 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7663                 struct rte_flow_error *error)
7664 {
7665         struct mlx5_flow_dv *dv;
7666         struct mlx5_flow *dev_flow;
7667         struct mlx5_priv *priv = dev->data->dev_private;
7668         int n;
7669         int err;
7670
7671         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7672                 dv = &dev_flow->dv;
7673                 n = dv->actions_n;
7674                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7675                         if (dev_flow->transfer) {
7676                                 dv->actions[n++] = priv->sh->esw_drop_action;
7677                         } else {
7678                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7679                                 if (!dv->hrxq) {
7680                                         rte_flow_error_set
7681                                                 (error, errno,
7682                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7683                                                  NULL,
7684                                                  "cannot get drop hash queue");
7685                                         goto error;
7686                                 }
7687                                 dv->actions[n++] = dv->hrxq->action;
7688                         }
7689                 } else if (dev_flow->actions &
7690                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7691                         struct mlx5_hrxq *hrxq;
7692
7693                         assert(flow->rss.queue);
7694                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7695                                              MLX5_RSS_HASH_KEY_LEN,
7696                                              dev_flow->hash_fields,
7697                                              (*flow->rss.queue),
7698                                              flow->rss.queue_num);
7699                         if (!hrxq) {
7700                                 hrxq = mlx5_hrxq_new
7701                                         (dev, flow->rss.key,
7702                                          MLX5_RSS_HASH_KEY_LEN,
7703                                          dev_flow->hash_fields,
7704                                          (*flow->rss.queue),
7705                                          flow->rss.queue_num,
7706                                          !!(dev_flow->layers &
7707                                             MLX5_FLOW_LAYER_TUNNEL));
7708                         }
7709                         if (!hrxq) {
7710                                 rte_flow_error_set
7711                                         (error, rte_errno,
7712                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7713                                          "cannot get hash queue");
7714                                 goto error;
7715                         }
7716                         dv->hrxq = hrxq;
7717                         dv->actions[n++] = dv->hrxq->action;
7718                 }
7719                 dv->flow =
7720                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7721                                                   (void *)&dv->value, n,
7722                                                   dv->actions);
7723                 if (!dv->flow) {
7724                         rte_flow_error_set(error, errno,
7725                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7726                                            NULL,
7727                                            "hardware refuses to create flow");
7728                         goto error;
7729                 }
7730                 if (priv->vmwa_context &&
7731                     dev_flow->dv.vf_vlan.tag &&
7732                     !dev_flow->dv.vf_vlan.created) {
7733                         /*
7734                          * The rule contains the VLAN pattern.
7735                          * For VF we are going to create VLAN
7736                          * interface to make hypervisor set correct
7737                          * e-Switch vport context.
7738                          */
7739                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7740                 }
7741         }
7742         return 0;
7743 error:
7744         err = rte_errno; /* Save rte_errno before cleanup. */
7745         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7746                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7747                 if (dv->hrxq) {
7748                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7749                                 mlx5_hrxq_drop_release(dev);
7750                         else
7751                                 mlx5_hrxq_release(dev, dv->hrxq);
7752                         dv->hrxq = NULL;
7753                 }
7754                 if (dev_flow->dv.vf_vlan.tag &&
7755                     dev_flow->dv.vf_vlan.created)
7756                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7757         }
7758         rte_errno = err; /* Restore rte_errno. */
7759         return -rte_errno;
7760 }
7761
7762 /**
7763  * Release the flow matcher.
7764  *
7765  * @param dev
7766  *   Pointer to Ethernet device.
7767  * @param flow
7768  *   Pointer to mlx5_flow.
7769  *
7770  * @return
7771  *   1 while a reference on it exists, 0 when freed.
7772  */
7773 static int
7774 flow_dv_matcher_release(struct rte_eth_dev *dev,
7775                         struct mlx5_flow *flow)
7776 {
7777         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7778
7779         assert(matcher->matcher_object);
7780         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7781                 dev->data->port_id, (void *)matcher,
7782                 rte_atomic32_read(&matcher->refcnt));
7783         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7784                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7785                            (matcher->matcher_object));
7786                 LIST_REMOVE(matcher, next);
7787                 /* table ref-- in release interface. */
7788                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7789                 rte_free(matcher);
7790                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7791                         dev->data->port_id, (void *)matcher);
7792                 return 0;
7793         }
7794         return 1;
7795 }
7796
7797 /**
7798  * Release an encap/decap resource.
7799  *
7800  * @param flow
7801  *   Pointer to mlx5_flow.
7802  *
7803  * @return
7804  *   1 while a reference on it exists, 0 when freed.
7805  */
7806 static int
7807 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7808 {
7809         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7810                                                 flow->dv.encap_decap;
7811
7812         assert(cache_resource->verbs_action);
7813         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7814                 (void *)cache_resource,
7815                 rte_atomic32_read(&cache_resource->refcnt));
7816         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7817                 claim_zero(mlx5_glue->destroy_flow_action
7818                                 (cache_resource->verbs_action));
7819                 LIST_REMOVE(cache_resource, next);
7820                 rte_free(cache_resource);
7821                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7822                         (void *)cache_resource);
7823                 return 0;
7824         }
7825         return 1;
7826 }
7827
7828 /**
7829  * Release an jump to table action resource.
7830  *
7831  * @param dev
7832  *   Pointer to Ethernet device.
7833  * @param flow
7834  *   Pointer to mlx5_flow.
7835  *
7836  * @return
7837  *   1 while a reference on it exists, 0 when freed.
7838  */
7839 static int
7840 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7841                                   struct mlx5_flow *flow)
7842 {
7843         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7844         struct mlx5_flow_tbl_data_entry *tbl_data =
7845                         container_of(cache_resource,
7846                                      struct mlx5_flow_tbl_data_entry, jump);
7847
7848         assert(cache_resource->action);
7849         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7850                 (void *)cache_resource,
7851                 rte_atomic32_read(&cache_resource->refcnt));
7852         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7853                 claim_zero(mlx5_glue->destroy_flow_action
7854                                 (cache_resource->action));
7855                 /* jump action memory free is inside the table release. */
7856                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7857                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7858                         (void *)cache_resource);
7859                 return 0;
7860         }
7861         return 1;
7862 }
7863
7864 /**
7865  * Release a modify-header resource.
7866  *
7867  * @param flow
7868  *   Pointer to mlx5_flow.
7869  *
7870  * @return
7871  *   1 while a reference on it exists, 0 when freed.
7872  */
7873 static int
7874 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7875 {
7876         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7877                                                 flow->dv.modify_hdr;
7878
7879         assert(cache_resource->verbs_action);
7880         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7881                 (void *)cache_resource,
7882                 rte_atomic32_read(&cache_resource->refcnt));
7883         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7884                 claim_zero(mlx5_glue->destroy_flow_action
7885                                 (cache_resource->verbs_action));
7886                 LIST_REMOVE(cache_resource, next);
7887                 rte_free(cache_resource);
7888                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7889                         (void *)cache_resource);
7890                 return 0;
7891         }
7892         return 1;
7893 }
7894
7895 /**
7896  * Release port ID action resource.
7897  *
7898  * @param flow
7899  *   Pointer to mlx5_flow.
7900  *
7901  * @return
7902  *   1 while a reference on it exists, 0 when freed.
7903  */
7904 static int
7905 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7906 {
7907         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7908                 flow->dv.port_id_action;
7909
7910         assert(cache_resource->action);
7911         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7912                 (void *)cache_resource,
7913                 rte_atomic32_read(&cache_resource->refcnt));
7914         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7915                 claim_zero(mlx5_glue->destroy_flow_action
7916                                 (cache_resource->action));
7917                 LIST_REMOVE(cache_resource, next);
7918                 rte_free(cache_resource);
7919                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7920                         (void *)cache_resource);
7921                 return 0;
7922         }
7923         return 1;
7924 }
7925
7926 /**
7927  * Release push vlan action resource.
7928  *
7929  * @param flow
7930  *   Pointer to mlx5_flow.
7931  *
7932  * @return
7933  *   1 while a reference on it exists, 0 when freed.
7934  */
7935 static int
7936 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7937 {
7938         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7939                 flow->dv.push_vlan_res;
7940
7941         assert(cache_resource->action);
7942         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7943                 (void *)cache_resource,
7944                 rte_atomic32_read(&cache_resource->refcnt));
7945         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7946                 claim_zero(mlx5_glue->destroy_flow_action
7947                                 (cache_resource->action));
7948                 LIST_REMOVE(cache_resource, next);
7949                 rte_free(cache_resource);
7950                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7951                         (void *)cache_resource);
7952                 return 0;
7953         }
7954         return 1;
7955 }
7956
7957 /**
7958  * Remove the flow from the NIC but keeps it in memory.
7959  * Lock free, (mutex should be acquired by caller).
7960  *
7961  * @param[in] dev
7962  *   Pointer to Ethernet device.
7963  * @param[in, out] flow
7964  *   Pointer to flow structure.
7965  */
7966 static void
7967 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7968 {
7969         struct mlx5_flow_dv *dv;
7970         struct mlx5_flow *dev_flow;
7971
7972         if (!flow)
7973                 return;
7974         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7975                 dv = &dev_flow->dv;
7976                 if (dv->flow) {
7977                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7978                         dv->flow = NULL;
7979                 }
7980                 if (dv->hrxq) {
7981                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7982                                 mlx5_hrxq_drop_release(dev);
7983                         else
7984                                 mlx5_hrxq_release(dev, dv->hrxq);
7985                         dv->hrxq = NULL;
7986                 }
7987                 if (dev_flow->dv.vf_vlan.tag &&
7988                     dev_flow->dv.vf_vlan.created)
7989                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7990         }
7991 }
7992
7993 /**
7994  * Remove the flow from the NIC and the memory.
7995  * Lock free, (mutex should be acquired by caller).
7996  *
7997  * @param[in] dev
7998  *   Pointer to the Ethernet device structure.
7999  * @param[in, out] flow
8000  *   Pointer to flow structure.
8001  */
8002 static void
8003 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8004 {
8005         struct mlx5_flow *dev_flow;
8006
8007         if (!flow)
8008                 return;
8009         __flow_dv_remove(dev, flow);
8010         if (flow->counter) {
8011                 flow_dv_counter_release(dev, flow->counter);
8012                 flow->counter = NULL;
8013         }
8014         if (flow->meter) {
8015                 mlx5_flow_meter_detach(flow->meter);
8016                 flow->meter = NULL;
8017         }
8018         while (!LIST_EMPTY(&flow->dev_flows)) {
8019                 dev_flow = LIST_FIRST(&flow->dev_flows);
8020                 LIST_REMOVE(dev_flow, next);
8021                 if (dev_flow->dv.matcher)
8022                         flow_dv_matcher_release(dev, dev_flow);
8023                 if (dev_flow->dv.encap_decap)
8024                         flow_dv_encap_decap_resource_release(dev_flow);
8025                 if (dev_flow->dv.modify_hdr)
8026                         flow_dv_modify_hdr_resource_release(dev_flow);
8027                 if (dev_flow->dv.jump)
8028                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8029                 if (dev_flow->dv.port_id_action)
8030                         flow_dv_port_id_action_resource_release(dev_flow);
8031                 if (dev_flow->dv.push_vlan_res)
8032                         flow_dv_push_vlan_action_resource_release(dev_flow);
8033                 if (dev_flow->dv.tag_resource)
8034                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8035                 rte_free(dev_flow);
8036         }
8037 }
8038
8039 /**
8040  * Query a dv flow  rule for its statistics via devx.
8041  *
8042  * @param[in] dev
8043  *   Pointer to Ethernet device.
8044  * @param[in] flow
8045  *   Pointer to the sub flow.
8046  * @param[out] data
8047  *   data retrieved by the query.
8048  * @param[out] error
8049  *   Perform verbose error reporting if not NULL.
8050  *
8051  * @return
8052  *   0 on success, a negative errno value otherwise and rte_errno is set.
8053  */
8054 static int
8055 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8056                     void *data, struct rte_flow_error *error)
8057 {
8058         struct mlx5_priv *priv = dev->data->dev_private;
8059         struct rte_flow_query_count *qc = data;
8060
8061         if (!priv->config.devx)
8062                 return rte_flow_error_set(error, ENOTSUP,
8063                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8064                                           NULL,
8065                                           "counters are not supported");
8066         if (flow->counter) {
8067                 uint64_t pkts, bytes;
8068                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8069                                                &bytes);
8070
8071                 if (err)
8072                         return rte_flow_error_set(error, -err,
8073                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8074                                         NULL, "cannot read counters");
8075                 qc->hits_set = 1;
8076                 qc->bytes_set = 1;
8077                 qc->hits = pkts - flow->counter->hits;
8078                 qc->bytes = bytes - flow->counter->bytes;
8079                 if (qc->reset) {
8080                         flow->counter->hits = pkts;
8081                         flow->counter->bytes = bytes;
8082                 }
8083                 return 0;
8084         }
8085         return rte_flow_error_set(error, EINVAL,
8086                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8087                                   NULL,
8088                                   "counters are not available");
8089 }
8090
8091 /**
8092  * Query a flow.
8093  *
8094  * @see rte_flow_query()
8095  * @see rte_flow_ops
8096  */
8097 static int
8098 flow_dv_query(struct rte_eth_dev *dev,
8099               struct rte_flow *flow __rte_unused,
8100               const struct rte_flow_action *actions __rte_unused,
8101               void *data __rte_unused,
8102               struct rte_flow_error *error __rte_unused)
8103 {
8104         int ret = -EINVAL;
8105
8106         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8107                 switch (actions->type) {
8108                 case RTE_FLOW_ACTION_TYPE_VOID:
8109                         break;
8110                 case RTE_FLOW_ACTION_TYPE_COUNT:
8111                         ret = flow_dv_query_count(dev, flow, data, error);
8112                         break;
8113                 default:
8114                         return rte_flow_error_set(error, ENOTSUP,
8115                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8116                                                   actions,
8117                                                   "action not supported");
8118                 }
8119         }
8120         return ret;
8121 }
8122
8123 /**
8124  * Destroy the meter table set.
8125  * Lock free, (mutex should be acquired by caller).
8126  *
8127  * @param[in] dev
8128  *   Pointer to Ethernet device.
8129  * @param[in] tbl
8130  *   Pointer to the meter table set.
8131  *
8132  * @return
8133  *   Always 0.
8134  */
8135 static int
8136 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8137                         struct mlx5_meter_domains_infos *tbl)
8138 {
8139         struct mlx5_priv *priv = dev->data->dev_private;
8140         struct mlx5_meter_domains_infos *mtd =
8141                                 (struct mlx5_meter_domains_infos *)tbl;
8142
8143         if (!mtd || !priv->config.dv_flow_en)
8144                 return 0;
8145         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8146                 claim_zero(mlx5_glue->dv_destroy_flow
8147                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8148         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8149                 claim_zero(mlx5_glue->dv_destroy_flow
8150                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8151         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8152                 claim_zero(mlx5_glue->dv_destroy_flow
8153                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8154         if (mtd->egress.color_matcher)
8155                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8156                           (mtd->egress.color_matcher));
8157         if (mtd->egress.any_matcher)
8158                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8159                           (mtd->egress.any_matcher));
8160         if (mtd->egress.tbl)
8161                 claim_zero(flow_dv_tbl_resource_release(dev,
8162                                                         mtd->egress.tbl));
8163         if (mtd->ingress.color_matcher)
8164                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8165                           (mtd->ingress.color_matcher));
8166         if (mtd->ingress.any_matcher)
8167                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8168                           (mtd->ingress.any_matcher));
8169         if (mtd->ingress.tbl)
8170                 claim_zero(flow_dv_tbl_resource_release(dev,
8171                                                         mtd->ingress.tbl));
8172         if (mtd->transfer.color_matcher)
8173                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8174                           (mtd->transfer.color_matcher));
8175         if (mtd->transfer.any_matcher)
8176                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8177                           (mtd->transfer.any_matcher));
8178         if (mtd->transfer.tbl)
8179                 claim_zero(flow_dv_tbl_resource_release(dev,
8180                                                         mtd->transfer.tbl));
8181         if (mtd->drop_actn)
8182                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8183         rte_free(mtd);
8184         return 0;
8185 }
8186
8187 /* Number of meter flow actions, count and jump or count and drop. */
8188 #define METER_ACTIONS 2
8189
8190 /**
8191  * Create specify domain meter table and suffix table.
8192  *
8193  * @param[in] dev
8194  *   Pointer to Ethernet device.
8195  * @param[in,out] mtb
8196  *   Pointer to DV meter table set.
8197  * @param[in] egress
8198  *   Table attribute.
8199  * @param[in] transfer
8200  *   Table attribute.
8201  * @param[in] color_reg_c_idx
8202  *   Reg C index for color match.
8203  *
8204  * @return
8205  *   0 on success, -1 otherwise and rte_errno is set.
8206  */
8207 static int
8208 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8209                            struct mlx5_meter_domains_infos *mtb,
8210                            uint8_t egress, uint8_t transfer,
8211                            uint32_t color_reg_c_idx)
8212 {
8213         struct mlx5_priv *priv = dev->data->dev_private;
8214         struct mlx5_ibv_shared *sh = priv->sh;
8215         struct mlx5_flow_dv_match_params mask = {
8216                 .size = sizeof(mask.buf),
8217         };
8218         struct mlx5_flow_dv_match_params value = {
8219                 .size = sizeof(value.buf),
8220         };
8221         struct mlx5dv_flow_matcher_attr dv_attr = {
8222                 .type = IBV_FLOW_ATTR_NORMAL,
8223                 .priority = 0,
8224                 .match_criteria_enable = 0,
8225                 .match_mask = (void *)&mask,
8226         };
8227         void *actions[METER_ACTIONS];
8228         struct mlx5_flow_tbl_resource **sfx_tbl;
8229         struct mlx5_meter_domain_info *dtb;
8230         struct rte_flow_error error;
8231         int i = 0;
8232
8233         if (transfer) {
8234                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8235                 dtb = &mtb->transfer;
8236         } else if (egress) {
8237                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8238                 dtb = &mtb->egress;
8239         } else {
8240                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8241                 dtb = &mtb->ingress;
8242         }
8243         /* If the suffix table in missing, create it. */
8244         if (!(*sfx_tbl)) {
8245                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8246                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8247                                                 egress, transfer, &error);
8248                 if (!(*sfx_tbl)) {
8249                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8250                         return -1;
8251                 }
8252         }
8253         /* Create the meter table with METER level. */
8254         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8255                                             egress, transfer, &error);
8256         if (!dtb->tbl) {
8257                 DRV_LOG(ERR, "Failed to create meter policer table.");
8258                 return -1;
8259         }
8260         /* Create matchers, Any and Color. */
8261         dv_attr.priority = 3;
8262         dv_attr.match_criteria_enable = 0;
8263         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8264                                                              &dv_attr,
8265                                                              dtb->tbl->obj);
8266         if (!dtb->any_matcher) {
8267                 DRV_LOG(ERR, "Failed to create meter"
8268                              " policer default matcher.");
8269                 goto error_exit;
8270         }
8271         dv_attr.priority = 0;
8272         dv_attr.match_criteria_enable =
8273                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8274         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8275                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
8276         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8277                                                                &dv_attr,
8278                                                                dtb->tbl->obj);
8279         if (!dtb->color_matcher) {
8280                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8281                 goto error_exit;
8282         }
8283         if (mtb->count_actns[RTE_MTR_DROPPED])
8284                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8285         actions[i++] = mtb->drop_actn;
8286         /* Default rule: lowest priority, match any, actions: drop. */
8287         dtb->policer_rules[RTE_MTR_DROPPED] =
8288                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8289                                                  (void *)&value, i, actions);
8290         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8291                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8292                 goto error_exit;
8293         }
8294         return 0;
8295 error_exit:
8296         return -1;
8297 }
8298
8299 /**
8300  * Create the needed meter and suffix tables.
8301  * Lock free, (mutex should be acquired by caller).
8302  *
8303  * @param[in] dev
8304  *   Pointer to Ethernet device.
8305  * @param[in] fm
8306  *   Pointer to the flow meter.
8307  *
8308  * @return
8309  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8310  */
8311 static struct mlx5_meter_domains_infos *
8312 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8313                        const struct mlx5_flow_meter *fm)
8314 {
8315         struct mlx5_priv *priv = dev->data->dev_private;
8316         struct mlx5_meter_domains_infos *mtb;
8317         int ret;
8318         int i;
8319
8320         if (!priv->mtr_en) {
8321                 rte_errno = ENOTSUP;
8322                 return NULL;
8323         }
8324         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8325         if (!mtb) {
8326                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8327                 return NULL;
8328         }
8329         /* Create meter count actions */
8330         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8331                 if (!fm->policer_stats.cnt[i])
8332                         continue;
8333                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8334         }
8335         /* Create drop action. */
8336         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8337         if (!mtb->drop_actn) {
8338                 DRV_LOG(ERR, "Failed to create drop action.");
8339                 goto error_exit;
8340         }
8341         /* Egress meter table. */
8342         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8343         if (ret) {
8344                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8345                 goto error_exit;
8346         }
8347         /* Ingress meter table. */
8348         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8349         if (ret) {
8350                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8351                 goto error_exit;
8352         }
8353         /* FDB meter table. */
8354         if (priv->config.dv_esw_en) {
8355                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8356                                                  priv->mtr_color_reg);
8357                 if (ret) {
8358                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8359                         goto error_exit;
8360                 }
8361         }
8362         return mtb;
8363 error_exit:
8364         flow_dv_destroy_mtr_tbl(dev, mtb);
8365         return NULL;
8366 }
8367
8368 /**
8369  * Destroy domain policer rule.
8370  *
8371  * @param[in] dt
8372  *   Pointer to domain table.
8373  */
8374 static void
8375 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8376 {
8377         int i;
8378
8379         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8380                 if (dt->policer_rules[i]) {
8381                         claim_zero(mlx5_glue->dv_destroy_flow
8382                                   (dt->policer_rules[i]));
8383                         dt->policer_rules[i] = NULL;
8384                 }
8385         }
8386         if (dt->jump_actn) {
8387                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8388                 dt->jump_actn = NULL;
8389         }
8390 }
8391
8392 /**
8393  * Destroy policer rules.
8394  *
8395  * @param[in] dev
8396  *   Pointer to Ethernet device.
8397  * @param[in] fm
8398  *   Pointer to flow meter structure.
8399  * @param[in] attr
8400  *   Pointer to flow attributes.
8401  *
8402  * @return
8403  *   Always 0.
8404  */
8405 static int
8406 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8407                               const struct mlx5_flow_meter *fm,
8408                               const struct rte_flow_attr *attr)
8409 {
8410         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8411
8412         if (!mtb)
8413                 return 0;
8414         if (attr->egress)
8415                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8416         if (attr->ingress)
8417                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8418         if (attr->transfer)
8419                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8420         return 0;
8421 }
8422
8423 /**
8424  * Create specify domain meter policer rule.
8425  *
8426  * @param[in] fm
8427  *   Pointer to flow meter structure.
8428  * @param[in] mtb
8429  *   Pointer to DV meter table set.
8430  * @param[in] sfx_tb
8431  *   Pointer to suffix table.
8432  * @param[in] mtr_reg_c
8433  *   Color match REG_C.
8434  *
8435  * @return
8436  *   0 on success, -1 otherwise.
8437  */
8438 static int
8439 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8440                                     struct mlx5_meter_domain_info *dtb,
8441                                     struct mlx5_flow_tbl_resource *sfx_tb,
8442                                     uint8_t mtr_reg_c)
8443 {
8444         struct mlx5_flow_dv_match_params matcher = {
8445                 .size = sizeof(matcher.buf),
8446         };
8447         struct mlx5_flow_dv_match_params value = {
8448                 .size = sizeof(value.buf),
8449         };
8450         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8451         void *actions[METER_ACTIONS];
8452         int i;
8453
8454         /* Create jump action. */
8455         if (!sfx_tb)
8456                 return -1;
8457         if (!dtb->jump_actn)
8458                 dtb->jump_actn =
8459                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8460                                                         (sfx_tb->obj);
8461         if (!dtb->jump_actn) {
8462                 DRV_LOG(ERR, "Failed to create policer jump action.");
8463                 goto error;
8464         }
8465         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8466                 int j = 0;
8467
8468                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8469                                        rte_col_2_mlx5_col(i), UINT8_MAX);
8470                 if (mtb->count_actns[i])
8471                         actions[j++] = mtb->count_actns[i];
8472                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8473                         actions[j++] = mtb->drop_actn;
8474                 else
8475                         actions[j++] = dtb->jump_actn;
8476                 dtb->policer_rules[i] =
8477                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8478                                                  (void *)&value,
8479                                                   j, actions);
8480                 if (!dtb->policer_rules[i]) {
8481                         DRV_LOG(ERR, "Failed to create policer rule.");
8482                         goto error;
8483                 }
8484         }
8485         return 0;
8486 error:
8487         rte_errno = errno;
8488         return -1;
8489 }
8490
8491 /**
8492  * Create policer rules.
8493  *
8494  * @param[in] dev
8495  *   Pointer to Ethernet device.
8496  * @param[in] fm
8497  *   Pointer to flow meter structure.
8498  * @param[in] attr
8499  *   Pointer to flow attributes.
8500  *
8501  * @return
8502  *   0 on success, -1 otherwise.
8503  */
8504 static int
8505 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8506                              struct mlx5_flow_meter *fm,
8507                              const struct rte_flow_attr *attr)
8508 {
8509         struct mlx5_priv *priv = dev->data->dev_private;
8510         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8511         int ret;
8512
8513         if (attr->egress) {
8514                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8515                                                 priv->sh->tx_mtr_sfx_tbl,
8516                                                 priv->mtr_color_reg);
8517                 if (ret) {
8518                         DRV_LOG(ERR, "Failed to create egress policer.");
8519                         goto error;
8520                 }
8521         }
8522         if (attr->ingress) {
8523                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8524                                                 priv->sh->rx_mtr_sfx_tbl,
8525                                                 priv->mtr_color_reg);
8526                 if (ret) {
8527                         DRV_LOG(ERR, "Failed to create ingress policer.");
8528                         goto error;
8529                 }
8530         }
8531         if (attr->transfer) {
8532                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8533                                                 priv->sh->fdb_mtr_sfx_tbl,
8534                                                 priv->mtr_color_reg);
8535                 if (ret) {
8536                         DRV_LOG(ERR, "Failed to create transfer policer.");
8537                         goto error;
8538                 }
8539         }
8540         return 0;
8541 error:
8542         flow_dv_destroy_policer_rules(dev, fm, attr);
8543         return -1;
8544 }
8545
8546 /**
8547  * Query a devx counter.
8548  *
8549  * @param[in] dev
8550  *   Pointer to the Ethernet device structure.
8551  * @param[in] cnt
8552  *   Pointer to the flow counter.
8553  * @param[in] clear
8554  *   Set to clear the counter statistics.
8555  * @param[out] pkts
8556  *   The statistics value of packets.
8557  * @param[out] bytes
8558  *   The statistics value of bytes.
8559  *
8560  * @return
8561  *   0 on success, otherwise return -1.
8562  */
8563 static int
8564 flow_dv_counter_query(struct rte_eth_dev *dev,
8565                       struct mlx5_flow_counter *cnt, bool clear,
8566                       uint64_t *pkts, uint64_t *bytes)
8567 {
8568         struct mlx5_priv *priv = dev->data->dev_private;
8569         uint64_t inn_pkts, inn_bytes;
8570         int ret;
8571
8572         if (!priv->config.devx)
8573                 return -1;
8574         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8575         if (ret)
8576                 return -1;
8577         *pkts = inn_pkts - cnt->hits;
8578         *bytes = inn_bytes - cnt->bytes;
8579         if (clear) {
8580                 cnt->hits = inn_pkts;
8581                 cnt->bytes = inn_bytes;
8582         }
8583         return 0;
8584 }
8585
8586 /*
8587  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8588  */
8589 static int
8590 flow_dv_translate(struct rte_eth_dev *dev,
8591                   struct mlx5_flow *dev_flow,
8592                   const struct rte_flow_attr *attr,
8593                   const struct rte_flow_item items[],
8594                   const struct rte_flow_action actions[],
8595                   struct rte_flow_error *error)
8596 {
8597         int ret;
8598
8599         flow_dv_shared_lock(dev);
8600         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8601         flow_dv_shared_unlock(dev);
8602         return ret;
8603 }
8604
8605 /*
8606  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8607  */
8608 static int
8609 flow_dv_apply(struct rte_eth_dev *dev,
8610               struct rte_flow *flow,
8611               struct rte_flow_error *error)
8612 {
8613         int ret;
8614
8615         flow_dv_shared_lock(dev);
8616         ret = __flow_dv_apply(dev, flow, error);
8617         flow_dv_shared_unlock(dev);
8618         return ret;
8619 }
8620
8621 /*
8622  * Mutex-protected thunk to lock-free __flow_dv_remove().
8623  */
8624 static void
8625 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8626 {
8627         flow_dv_shared_lock(dev);
8628         __flow_dv_remove(dev, flow);
8629         flow_dv_shared_unlock(dev);
8630 }
8631
8632 /*
8633  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8634  */
8635 static void
8636 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8637 {
8638         flow_dv_shared_lock(dev);
8639         __flow_dv_destroy(dev, flow);
8640         flow_dv_shared_unlock(dev);
8641 }
8642
8643 /*
8644  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8645  */
8646 static struct mlx5_flow_counter *
8647 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8648 {
8649         struct mlx5_flow_counter *cnt;
8650
8651         flow_dv_shared_lock(dev);
8652         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8653         flow_dv_shared_unlock(dev);
8654         return cnt;
8655 }
8656
8657 /*
8658  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8659  */
8660 static void
8661 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8662 {
8663         flow_dv_shared_lock(dev);
8664         flow_dv_counter_release(dev, cnt);
8665         flow_dv_shared_unlock(dev);
8666 }
8667
8668 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8669         .validate = flow_dv_validate,
8670         .prepare = flow_dv_prepare,
8671         .translate = flow_dv_translate,
8672         .apply = flow_dv_apply,
8673         .remove = flow_dv_remove,
8674         .destroy = flow_dv_destroy,
8675         .query = flow_dv_query,
8676         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8677         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8678         .create_policer_rules = flow_dv_create_policer_rules,
8679         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8680         .counter_alloc = flow_dv_counter_allocate,
8681         .counter_free = flow_dv_counter_free,
8682         .counter_query = flow_dv_counter_query,
8683 };
8684
8685 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */