drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_prm.h>
  35
  36 #include "mlx5_defs.h"
  37 #include "mlx5.h"
  38 #include "mlx5_flow.h"
  39 #include "mlx5_rxtx.h"
  40
  41 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 /**
  77  * Initialize flow attributes structure according to flow items' types.
  78  *
  79  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  80  * mode. For tunnel mode, the items to be modified are the outermost ones.
  81  *
  82  * @param[in] item
  83  *   Pointer to item specification.
  84  * @param[out] attr
  85  *   Pointer to flow attributes structure.
  86  * @param[in] dev_flow
  87  *   Pointer to the sub flow.
  88  * @param[in] tunnel_decap
  89  *   Whether action is after tunnel decapsulation.
  90  */
  91 static void
  92 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
  93                   struct mlx5_flow *dev_flow, bool tunnel_decap)
  94 {
  95         /*
  96          * If layers is already initialized, it means this dev_flow is the
  97          * suffix flow, the layers flags is set by the prefix flow. Need to
  98          * use the layer flags from prefix flow as the suffix flow may not
  99          * have the user defined items as the flow is split.
 100          */
 101         if (dev_flow->layers) {
 102                 if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 103                         attr->ipv4 = 1;
 104                 else if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 105                         attr->ipv6 = 1;
 106                 if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 107                         attr->tcp = 1;
 108                 else if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 109                         attr->udp = 1;
 110                 attr->valid = 1;
 111                 return;
 112         }
 113         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 114                 uint8_t next_protocol = 0xff;
 115                 switch (item->type) {
 116                 case RTE_FLOW_ITEM_TYPE_GRE:
 117                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 118                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 119                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 120                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 121                 case RTE_FLOW_ITEM_TYPE_MPLS:
 122                         if (tunnel_decap)
 123                                 attr->attr = 0;
 124                         break;
 125                 case RTE_FLOW_ITEM_TYPE_IPV4:
 126                         if (!attr->ipv6)
 127                                 attr->ipv4 = 1;
 128                         if (item->mask != NULL &&
 129                             ((const struct rte_flow_item_ipv4 *)
 130                             item->mask)->hdr.next_proto_id)
 131                                 next_protocol =
 132                                     ((const struct rte_flow_item_ipv4 *)
 133                                       (item->spec))->hdr.next_proto_id &
 134                                     ((const struct rte_flow_item_ipv4 *)
 135                                       (item->mask))->hdr.next_proto_id;
 136                         if ((next_protocol == IPPROTO_IPIP ||
 137                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 138                                 attr->attr = 0;
 139                         break;
 140                 case RTE_FLOW_ITEM_TYPE_IPV6:
 141                         if (!attr->ipv4)
 142                                 attr->ipv6 = 1;
 143                         if (item->mask != NULL &&
 144                             ((const struct rte_flow_item_ipv6 *)
 145                             item->mask)->hdr.proto)
 146                                 next_protocol =
 147                                     ((const struct rte_flow_item_ipv6 *)
 148                                       (item->spec))->hdr.proto &
 149                                     ((const struct rte_flow_item_ipv6 *)
 150                                       (item->mask))->hdr.proto;
 151                         if ((next_protocol == IPPROTO_IPIP ||
 152                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 153                                 attr->attr = 0;
 154                         break;
 155                 case RTE_FLOW_ITEM_TYPE_UDP:
 156                         if (!attr->tcp)
 157                                 attr->udp = 1;
 158                         break;
 159                 case RTE_FLOW_ITEM_TYPE_TCP:
 160                         if (!attr->udp)
 161                                 attr->tcp = 1;
 162                         break;
 163                 default:
 164                         break;
 165                 }
 166         }
 167         attr->valid = 1;
 168 }
 169
 170 /**
 171  * Convert rte_mtr_color to mlx5 color.
 172  *
 173  * @param[in] rcol
 174  *   rte_mtr_color.
 175  *
 176  * @return
 177  *   mlx5 color.
 178  */
 179 static int
 180 rte_col_2_mlx5_col(enum rte_color rcol)
 181 {
 182         switch (rcol) {
 183         case RTE_COLOR_GREEN:
 184                 return MLX5_FLOW_COLOR_GREEN;
 185         case RTE_COLOR_YELLOW:
 186                 return MLX5_FLOW_COLOR_YELLOW;
 187         case RTE_COLOR_RED:
 188                 return MLX5_FLOW_COLOR_RED;
 189         default:
 190                 break;
 191         }
 192         return MLX5_FLOW_COLOR_UNDEFINED;
 193 }
 194
 195 struct field_modify_info {
 196         uint32_t size; /* Size of field in protocol header, in bytes. */
 197         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 198         enum mlx5_modification_field id;
 199 };
 200
 201 struct field_modify_info modify_eth[] = {
 202         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 203         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 204         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 205         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 206         {0, 0, 0},
 207 };
 208
 209 struct field_modify_info modify_vlan_out_first_vid[] = {
 210         /* Size in bits !!! */
 211         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 212         {0, 0, 0},
 213 };
 214
 215 struct field_modify_info modify_ipv4[] = {
 216         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 217         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 218         {4, 12, MLX5_MODI_OUT_SIPV4},
 219         {4, 16, MLX5_MODI_OUT_DIPV4},
 220         {0, 0, 0},
 221 };
 222
 223 struct field_modify_info modify_ipv6[] = {
 224         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 225         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 226         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 227         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 228         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 229         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 230         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 231         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 232         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 233         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 234         {0, 0, 0},
 235 };
 236
 237 struct field_modify_info modify_udp[] = {
 238         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 239         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 240         {0, 0, 0},
 241 };
 242
 243 struct field_modify_info modify_tcp[] = {
 244         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 245         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 246         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 247         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 248         {0, 0, 0},
 249 };
 250
 251 static void
 252 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 253                           uint8_t next_protocol, uint64_t *item_flags,
 254                           int *tunnel)
 255 {
 256         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 257                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 258         if (next_protocol == IPPROTO_IPIP) {
 259                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 260                 *tunnel = 1;
 261         }
 262         if (next_protocol == IPPROTO_IPV6) {
 263                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 264                 *tunnel = 1;
 265         }
 266 }
 267
 268 /**
 269  * Acquire the synchronizing object to protect multithreaded access
 270  * to shared dv context. Lock occurs only if context is actually
 271  * shared, i.e. we have multiport IB device and representors are
 272  * created.
 273  *
 274  * @param[in] dev
 275  *   Pointer to the rte_eth_dev structure.
 276  */
 277 static void
 278 flow_dv_shared_lock(struct rte_eth_dev *dev)
 279 {
 280         struct mlx5_priv *priv = dev->data->dev_private;
 281         struct mlx5_ibv_shared *sh = priv->sh;
 282
 283         if (sh->dv_refcnt > 1) {
 284                 int ret;
 285
 286                 ret = pthread_mutex_lock(&sh->dv_mutex);
 287                 MLX5_ASSERT(!ret);
 288                 (void)ret;
 289         }
 290 }
 291
 292 static void
 293 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 294 {
 295         struct mlx5_priv *priv = dev->data->dev_private;
 296         struct mlx5_ibv_shared *sh = priv->sh;
 297
 298         if (sh->dv_refcnt > 1) {
 299                 int ret;
 300
 301                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 302                 MLX5_ASSERT(!ret);
 303                 (void)ret;
 304         }
 305 }
 306
 307 /* Update VLAN's VID/PCP based on input rte_flow_action.
 308  *
 309  * @param[in] action
 310  *   Pointer to struct rte_flow_action.
 311  * @param[out] vlan
 312  *   Pointer to struct rte_vlan_hdr.
 313  */
 314 static void
 315 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 316                          struct rte_vlan_hdr *vlan)
 317 {
 318         uint16_t vlan_tci;
 319         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 320                 vlan_tci =
 321                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 322                                                action->conf)->vlan_pcp;
 323                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 324                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 325                 vlan->vlan_tci |= vlan_tci;
 326         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 327                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 328                 vlan->vlan_tci |= rte_be_to_cpu_16
 329                     (((const struct rte_flow_action_of_set_vlan_vid *)
 330                                              action->conf)->vlan_vid);
 331         }
 332 }
 333
 334 /**
 335  * Fetch 1, 2, 3 or 4 byte field from the byte array
 336  * and return as unsigned integer in host-endian format.
 337  *
 338  * @param[in] data
 339  *   Pointer to data array.
 340  * @param[in] size
 341  *   Size of field to extract.
 342  *
 343  * @return
 344  *   converted field in host endian format.
 345  */
 346 static inline uint32_t
 347 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 348 {
 349         uint32_t ret;
 350
 351         switch (size) {
 352         case 1:
 353                 ret = *data;
 354                 break;
 355         case 2:
 356                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 357                 break;
 358         case 3:
 359                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 360                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 361                 break;
 362         case 4:
 363                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 364                 break;
 365         default:
 366                 MLX5_ASSERT(false);
 367                 ret = 0;
 368                 break;
 369         }
 370         return ret;
 371 }
 372
 373 /**
 374  * Convert modify-header action to DV specification.
 375  *
 376  * Data length of each action is determined by provided field description
 377  * and the item mask. Data bit offset and width of each action is determined
 378  * by provided item mask.
 379  *
 380  * @param[in] item
 381  *   Pointer to item specification.
 382  * @param[in] field
 383  *   Pointer to field modification information.
 384  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 385  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 386  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 387  * @param[in] dcopy
 388  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 389  *   Negative offset value sets the same offset as source offset.
 390  *   size field is ignored, value is taken from source field.
 391  * @param[in,out] resource
 392  *   Pointer to the modify-header resource.
 393  * @param[in] type
 394  *   Type of modification.
 395  * @param[out] error
 396  *   Pointer to the error structure.
 397  *
 398  * @return
 399  *   0 on success, a negative errno value otherwise and rte_errno is set.
 400  */
 401 static int
 402 flow_dv_convert_modify_action(struct rte_flow_item *item,
 403                               struct field_modify_info *field,
 404                               struct field_modify_info *dcopy,
 405                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 406                               uint32_t type, struct rte_flow_error *error)
 407 {
 408         uint32_t i = resource->actions_num;
 409         struct mlx5_modification_cmd *actions = resource->actions;
 410
 411         /*
 412          * The item and mask are provided in big-endian format.
 413          * The fields should be presented as in big-endian format either.
 414          * Mask must be always present, it defines the actual field width.
 415          */
 416         MLX5_ASSERT(item->mask);
 417         MLX5_ASSERT(field->size);
 418         do {
 419                 unsigned int size_b;
 420                 unsigned int off_b;
 421                 uint32_t mask;
 422                 uint32_t data;
 423
 424                 if (i >= MLX5_MAX_MODIFY_NUM)
 425                         return rte_flow_error_set(error, EINVAL,
 426                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 427                                  "too many items to modify");
 428                 /* Fetch variable byte size mask from the array. */
 429                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 430                                            field->offset, field->size);
 431                 if (!mask) {
 432                         ++field;
 433                         continue;
 434                 }
 435                 /* Deduce actual data width in bits from mask value. */
 436                 off_b = rte_bsf32(mask);
 437                 size_b = sizeof(uint32_t) * CHAR_BIT -
 438                          off_b - __builtin_clz(mask);
 439                 MLX5_ASSERT(size_b);
 440                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 441                 actions[i] = (struct mlx5_modification_cmd) {
 442                         .action_type = type,
 443                         .field = field->id,
 444                         .offset = off_b,
 445                         .length = size_b,
 446                 };
 447                 /* Convert entire record to expected big-endian format. */
 448                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 449                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 450                         MLX5_ASSERT(dcopy);
 451                         actions[i].dst_field = dcopy->id;
 452                         actions[i].dst_offset =
 453                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 454                         /* Convert entire record to big-endian format. */
 455                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 456                 } else {
 457                         MLX5_ASSERT(item->spec);
 458                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 459                                                    field->offset, field->size);
 460                         /* Shift out the trailing masked bits from data. */
 461                         data = (data & mask) >> off_b;
 462                         actions[i].data1 = rte_cpu_to_be_32(data);
 463                 }
 464                 ++i;
 465                 ++field;
 466         } while (field->size);
 467         if (resource->actions_num == i)
 468                 return rte_flow_error_set(error, EINVAL,
 469                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 470                                           "invalid modification flow item");
 471         resource->actions_num = i;
 472         return 0;
 473 }
 474
 475 /**
 476  * Convert modify-header set IPv4 address action to DV specification.
 477  *
 478  * @param[in,out] resource
 479  *   Pointer to the modify-header resource.
 480  * @param[in] action
 481  *   Pointer to action specification.
 482  * @param[out] error
 483  *   Pointer to the error structure.
 484  *
 485  * @return
 486  *   0 on success, a negative errno value otherwise and rte_errno is set.
 487  */
 488 static int
 489 flow_dv_convert_action_modify_ipv4
 490                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 491                          const struct rte_flow_action *action,
 492                          struct rte_flow_error *error)
 493 {
 494         const struct rte_flow_action_set_ipv4 *conf =
 495                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 496         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 497         struct rte_flow_item_ipv4 ipv4;
 498         struct rte_flow_item_ipv4 ipv4_mask;
 499
 500         memset(&ipv4, 0, sizeof(ipv4));
 501         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 502         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 503                 ipv4.hdr.src_addr = conf->ipv4_addr;
 504                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 505         } else {
 506                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 507                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 508         }
 509         item.spec = &ipv4;
 510         item.mask = &ipv4_mask;
 511         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 512                                              MLX5_MODIFICATION_TYPE_SET, error);
 513 }
 514
 515 /**
 516  * Convert modify-header set IPv6 address action to DV specification.
 517  *
 518  * @param[in,out] resource
 519  *   Pointer to the modify-header resource.
 520  * @param[in] action
 521  *   Pointer to action specification.
 522  * @param[out] error
 523  *   Pointer to the error structure.
 524  *
 525  * @return
 526  *   0 on success, a negative errno value otherwise and rte_errno is set.
 527  */
 528 static int
 529 flow_dv_convert_action_modify_ipv6
 530                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 531                          const struct rte_flow_action *action,
 532                          struct rte_flow_error *error)
 533 {
 534         const struct rte_flow_action_set_ipv6 *conf =
 535                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 536         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 537         struct rte_flow_item_ipv6 ipv6;
 538         struct rte_flow_item_ipv6 ipv6_mask;
 539
 540         memset(&ipv6, 0, sizeof(ipv6));
 541         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 542         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 543                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 544                        sizeof(ipv6.hdr.src_addr));
 545                 memcpy(&ipv6_mask.hdr.src_addr,
 546                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 547                        sizeof(ipv6.hdr.src_addr));
 548         } else {
 549                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 550                        sizeof(ipv6.hdr.dst_addr));
 551                 memcpy(&ipv6_mask.hdr.dst_addr,
 552                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 553                        sizeof(ipv6.hdr.dst_addr));
 554         }
 555         item.spec = &ipv6;
 556         item.mask = &ipv6_mask;
 557         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 558                                              MLX5_MODIFICATION_TYPE_SET, error);
 559 }
 560
 561 /**
 562  * Convert modify-header set MAC address action to DV specification.
 563  *
 564  * @param[in,out] resource
 565  *   Pointer to the modify-header resource.
 566  * @param[in] action
 567  *   Pointer to action specification.
 568  * @param[out] error
 569  *   Pointer to the error structure.
 570  *
 571  * @return
 572  *   0 on success, a negative errno value otherwise and rte_errno is set.
 573  */
 574 static int
 575 flow_dv_convert_action_modify_mac
 576                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 577                          const struct rte_flow_action *action,
 578                          struct rte_flow_error *error)
 579 {
 580         const struct rte_flow_action_set_mac *conf =
 581                 (const struct rte_flow_action_set_mac *)(action->conf);
 582         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 583         struct rte_flow_item_eth eth;
 584         struct rte_flow_item_eth eth_mask;
 585
 586         memset(&eth, 0, sizeof(eth));
 587         memset(&eth_mask, 0, sizeof(eth_mask));
 588         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 589                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 590                        sizeof(eth.src.addr_bytes));
 591                 memcpy(&eth_mask.src.addr_bytes,
 592                        &rte_flow_item_eth_mask.src.addr_bytes,
 593                        sizeof(eth_mask.src.addr_bytes));
 594         } else {
 595                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 596                        sizeof(eth.dst.addr_bytes));
 597                 memcpy(&eth_mask.dst.addr_bytes,
 598                        &rte_flow_item_eth_mask.dst.addr_bytes,
 599                        sizeof(eth_mask.dst.addr_bytes));
 600         }
 601         item.spec = &eth;
 602         item.mask = &eth_mask;
 603         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 604                                              MLX5_MODIFICATION_TYPE_SET, error);
 605 }
 606
 607 /**
 608  * Convert modify-header set VLAN VID action to DV specification.
 609  *
 610  * @param[in,out] resource
 611  *   Pointer to the modify-header resource.
 612  * @param[in] action
 613  *   Pointer to action specification.
 614  * @param[out] error
 615  *   Pointer to the error structure.
 616  *
 617  * @return
 618  *   0 on success, a negative errno value otherwise and rte_errno is set.
 619  */
 620 static int
 621 flow_dv_convert_action_modify_vlan_vid
 622                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 623                          const struct rte_flow_action *action,
 624                          struct rte_flow_error *error)
 625 {
 626         const struct rte_flow_action_of_set_vlan_vid *conf =
 627                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 628         int i = resource->actions_num;
 629         struct mlx5_modification_cmd *actions = resource->actions;
 630         struct field_modify_info *field = modify_vlan_out_first_vid;
 631
 632         if (i >= MLX5_MAX_MODIFY_NUM)
 633                 return rte_flow_error_set(error, EINVAL,
 634                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 635                          "too many items to modify");
 636         actions[i] = (struct mlx5_modification_cmd) {
 637                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 638                 .field = field->id,
 639                 .length = field->size,
 640                 .offset = field->offset,
 641         };
 642         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 643         actions[i].data1 = conf->vlan_vid;
 644         actions[i].data1 = actions[i].data1 << 16;
 645         resource->actions_num = ++i;
 646         return 0;
 647 }
 648
 649 /**
 650  * Convert modify-header set TP action to DV specification.
 651  *
 652  * @param[in,out] resource
 653  *   Pointer to the modify-header resource.
 654  * @param[in] action
 655  *   Pointer to action specification.
 656  * @param[in] items
 657  *   Pointer to rte_flow_item objects list.
 658  * @param[in] attr
 659  *   Pointer to flow attributes structure.
 660  * @param[in] dev_flow
 661  *   Pointer to the sub flow.
 662  * @param[in] tunnel_decap
 663  *   Whether action is after tunnel decapsulation.
 664  * @param[out] error
 665  *   Pointer to the error structure.
 666  *
 667  * @return
 668  *   0 on success, a negative errno value otherwise and rte_errno is set.
 669  */
 670 static int
 671 flow_dv_convert_action_modify_tp
 672                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 673                          const struct rte_flow_action *action,
 674                          const struct rte_flow_item *items,
 675                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 676                          bool tunnel_decap, struct rte_flow_error *error)
 677 {
 678         const struct rte_flow_action_set_tp *conf =
 679                 (const struct rte_flow_action_set_tp *)(action->conf);
 680         struct rte_flow_item item;
 681         struct rte_flow_item_udp udp;
 682         struct rte_flow_item_udp udp_mask;
 683         struct rte_flow_item_tcp tcp;
 684         struct rte_flow_item_tcp tcp_mask;
 685         struct field_modify_info *field;
 686
 687         if (!attr->valid)
 688                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 689         if (attr->udp) {
 690                 memset(&udp, 0, sizeof(udp));
 691                 memset(&udp_mask, 0, sizeof(udp_mask));
 692                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 693                         udp.hdr.src_port = conf->port;
 694                         udp_mask.hdr.src_port =
 695                                         rte_flow_item_udp_mask.hdr.src_port;
 696                 } else {
 697                         udp.hdr.dst_port = conf->port;
 698                         udp_mask.hdr.dst_port =
 699                                         rte_flow_item_udp_mask.hdr.dst_port;
 700                 }
 701                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 702                 item.spec = &udp;
 703                 item.mask = &udp_mask;
 704                 field = modify_udp;
 705         }
 706         if (attr->tcp) {
 707                 memset(&tcp, 0, sizeof(tcp));
 708                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 709                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 710                         tcp.hdr.src_port = conf->port;
 711                         tcp_mask.hdr.src_port =
 712                                         rte_flow_item_tcp_mask.hdr.src_port;
 713                 } else {
 714                         tcp.hdr.dst_port = conf->port;
 715                         tcp_mask.hdr.dst_port =
 716                                         rte_flow_item_tcp_mask.hdr.dst_port;
 717                 }
 718                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 719                 item.spec = &tcp;
 720                 item.mask = &tcp_mask;
 721                 field = modify_tcp;
 722         }
 723         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 724                                              MLX5_MODIFICATION_TYPE_SET, error);
 725 }
 726
 727 /**
 728  * Convert modify-header set TTL action to DV specification.
 729  *
 730  * @param[in,out] resource
 731  *   Pointer to the modify-header resource.
 732  * @param[in] action
 733  *   Pointer to action specification.
 734  * @param[in] items
 735  *   Pointer to rte_flow_item objects list.
 736  * @param[in] attr
 737  *   Pointer to flow attributes structure.
 738  * @param[in] dev_flow
 739  *   Pointer to the sub flow.
 740  * @param[in] tunnel_decap
 741  *   Whether action is after tunnel decapsulation.
 742  * @param[out] error
 743  *   Pointer to the error structure.
 744  *
 745  * @return
 746  *   0 on success, a negative errno value otherwise and rte_errno is set.
 747  */
 748 static int
 749 flow_dv_convert_action_modify_ttl
 750                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 751                          const struct rte_flow_action *action,
 752                          const struct rte_flow_item *items,
 753                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 754                          bool tunnel_decap, struct rte_flow_error *error)
 755 {
 756         const struct rte_flow_action_set_ttl *conf =
 757                 (const struct rte_flow_action_set_ttl *)(action->conf);
 758         struct rte_flow_item item;
 759         struct rte_flow_item_ipv4 ipv4;
 760         struct rte_flow_item_ipv4 ipv4_mask;
 761         struct rte_flow_item_ipv6 ipv6;
 762         struct rte_flow_item_ipv6 ipv6_mask;
 763         struct field_modify_info *field;
 764
 765         if (!attr->valid)
 766                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 767         if (attr->ipv4) {
 768                 memset(&ipv4, 0, sizeof(ipv4));
 769                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 770                 ipv4.hdr.time_to_live = conf->ttl_value;
 771                 ipv4_mask.hdr.time_to_live = 0xFF;
 772                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 773                 item.spec = &ipv4;
 774                 item.mask = &ipv4_mask;
 775                 field = modify_ipv4;
 776         }
 777         if (attr->ipv6) {
 778                 memset(&ipv6, 0, sizeof(ipv6));
 779                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 780                 ipv6.hdr.hop_limits = conf->ttl_value;
 781                 ipv6_mask.hdr.hop_limits = 0xFF;
 782                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 783                 item.spec = &ipv6;
 784                 item.mask = &ipv6_mask;
 785                 field = modify_ipv6;
 786         }
 787         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 788                                              MLX5_MODIFICATION_TYPE_SET, error);
 789 }
 790
 791 /**
 792  * Convert modify-header decrement TTL action to DV specification.
 793  *
 794  * @param[in,out] resource
 795  *   Pointer to the modify-header resource.
 796  * @param[in] action
 797  *   Pointer to action specification.
 798  * @param[in] items
 799  *   Pointer to rte_flow_item objects list.
 800  * @param[in] attr
 801  *   Pointer to flow attributes structure.
 802  * @param[in] dev_flow
 803  *   Pointer to the sub flow.
 804  * @param[in] tunnel_decap
 805  *   Whether action is after tunnel decapsulation.
 806  * @param[out] error
 807  *   Pointer to the error structure.
 808  *
 809  * @return
 810  *   0 on success, a negative errno value otherwise and rte_errno is set.
 811  */
 812 static int
 813 flow_dv_convert_action_modify_dec_ttl
 814                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 815                          const struct rte_flow_item *items,
 816                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 817                          bool tunnel_decap, struct rte_flow_error *error)
 818 {
 819         struct rte_flow_item item;
 820         struct rte_flow_item_ipv4 ipv4;
 821         struct rte_flow_item_ipv4 ipv4_mask;
 822         struct rte_flow_item_ipv6 ipv6;
 823         struct rte_flow_item_ipv6 ipv6_mask;
 824         struct field_modify_info *field;
 825
 826         if (!attr->valid)
 827                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 828         if (attr->ipv4) {
 829                 memset(&ipv4, 0, sizeof(ipv4));
 830                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 831                 ipv4.hdr.time_to_live = 0xFF;
 832                 ipv4_mask.hdr.time_to_live = 0xFF;
 833                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 834                 item.spec = &ipv4;
 835                 item.mask = &ipv4_mask;
 836                 field = modify_ipv4;
 837         }
 838         if (attr->ipv6) {
 839                 memset(&ipv6, 0, sizeof(ipv6));
 840                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 841                 ipv6.hdr.hop_limits = 0xFF;
 842                 ipv6_mask.hdr.hop_limits = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 844                 item.spec = &ipv6;
 845                 item.mask = &ipv6_mask;
 846                 field = modify_ipv6;
 847         }
 848         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 849                                              MLX5_MODIFICATION_TYPE_ADD, error);
 850 }
 851
 852 /**
 853  * Convert modify-header increment/decrement TCP Sequence number
 854  * to DV specification.
 855  *
 856  * @param[in,out] resource
 857  *   Pointer to the modify-header resource.
 858  * @param[in] action
 859  *   Pointer to action specification.
 860  * @param[out] error
 861  *   Pointer to the error structure.
 862  *
 863  * @return
 864  *   0 on success, a negative errno value otherwise and rte_errno is set.
 865  */
 866 static int
 867 flow_dv_convert_action_modify_tcp_seq
 868                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 869                          const struct rte_flow_action *action,
 870                          struct rte_flow_error *error)
 871 {
 872         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 873         uint64_t value = rte_be_to_cpu_32(*conf);
 874         struct rte_flow_item item;
 875         struct rte_flow_item_tcp tcp;
 876         struct rte_flow_item_tcp tcp_mask;
 877
 878         memset(&tcp, 0, sizeof(tcp));
 879         memset(&tcp_mask, 0, sizeof(tcp_mask));
 880         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 881                 /*
 882                  * The HW has no decrement operation, only increment operation.
 883                  * To simulate decrement X from Y using increment operation
 884                  * we need to add UINT32_MAX X times to Y.
 885                  * Each adding of UINT32_MAX decrements Y by 1.
 886                  */
 887                 value *= UINT32_MAX;
 888         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 889         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 890         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 891         item.spec = &tcp;
 892         item.mask = &tcp_mask;
 893         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 894                                              MLX5_MODIFICATION_TYPE_ADD, error);
 895 }
 896
 897 /**
 898  * Convert modify-header increment/decrement TCP Acknowledgment number
 899  * to DV specification.
 900  *
 901  * @param[in,out] resource
 902  *   Pointer to the modify-header resource.
 903  * @param[in] action
 904  *   Pointer to action specification.
 905  * @param[out] error
 906  *   Pointer to the error structure.
 907  *
 908  * @return
 909  *   0 on success, a negative errno value otherwise and rte_errno is set.
 910  */
 911 static int
 912 flow_dv_convert_action_modify_tcp_ack
 913                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 914                          const struct rte_flow_action *action,
 915                          struct rte_flow_error *error)
 916 {
 917         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 918         uint64_t value = rte_be_to_cpu_32(*conf);
 919         struct rte_flow_item item;
 920         struct rte_flow_item_tcp tcp;
 921         struct rte_flow_item_tcp tcp_mask;
 922
 923         memset(&tcp, 0, sizeof(tcp));
 924         memset(&tcp_mask, 0, sizeof(tcp_mask));
 925         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 926                 /*
 927                  * The HW has no decrement operation, only increment operation.
 928                  * To simulate decrement X from Y using increment operation
 929                  * we need to add UINT32_MAX X times to Y.
 930                  * Each adding of UINT32_MAX decrements Y by 1.
 931                  */
 932                 value *= UINT32_MAX;
 933         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 934         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 935         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 936         item.spec = &tcp;
 937         item.mask = &tcp_mask;
 938         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 939                                              MLX5_MODIFICATION_TYPE_ADD, error);
 940 }
 941
 942 static enum mlx5_modification_field reg_to_field[] = {
 943         [REG_NONE] = MLX5_MODI_OUT_NONE,
 944         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 945         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 946         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 947         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 948         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 949         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 950         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 951         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 952         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 953         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 954 };
 955
 956 /**
 957  * Convert register set to DV specification.
 958  *
 959  * @param[in,out] resource
 960  *   Pointer to the modify-header resource.
 961  * @param[in] action
 962  *   Pointer to action specification.
 963  * @param[out] error
 964  *   Pointer to the error structure.
 965  *
 966  * @return
 967  *   0 on success, a negative errno value otherwise and rte_errno is set.
 968  */
 969 static int
 970 flow_dv_convert_action_set_reg
 971                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 972                          const struct rte_flow_action *action,
 973                          struct rte_flow_error *error)
 974 {
 975         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 976         struct mlx5_modification_cmd *actions = resource->actions;
 977         uint32_t i = resource->actions_num;
 978
 979         if (i >= MLX5_MAX_MODIFY_NUM)
 980                 return rte_flow_error_set(error, EINVAL,
 981                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 982                                           "too many items to modify");
 983         MLX5_ASSERT(conf->id != REG_NONE);
 984         MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field));
 985         actions[i] = (struct mlx5_modification_cmd) {
 986                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 987                 .field = reg_to_field[conf->id],
 988         };
 989         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 990         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 991         ++i;
 992         resource->actions_num = i;
 993         return 0;
 994 }
 995
 996 /**
 997  * Convert SET_TAG action to DV specification.
 998  *
 999  * @param[in] dev
1000  *   Pointer to the rte_eth_dev structure.
1001  * @param[in,out] resource
1002  *   Pointer to the modify-header resource.
1003  * @param[in] conf
1004  *   Pointer to action specification.
1005  * @param[out] error
1006  *   Pointer to the error structure.
1007  *
1008  * @return
1009  *   0 on success, a negative errno value otherwise and rte_errno is set.
1010  */
1011 static int
1012 flow_dv_convert_action_set_tag
1013                         (struct rte_eth_dev *dev,
1014                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1015                          const struct rte_flow_action_set_tag *conf,
1016                          struct rte_flow_error *error)
1017 {
1018         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1019         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1020         struct rte_flow_item item = {
1021                 .spec = &data,
1022                 .mask = &mask,
1023         };
1024         struct field_modify_info reg_c_x[] = {
1025                 [1] = {0, 0, 0},
1026         };
1027         enum mlx5_modification_field reg_type;
1028         int ret;
1029
1030         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1031         if (ret < 0)
1032                 return ret;
1033         MLX5_ASSERT(ret != REG_NONE);
1034         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1035         reg_type = reg_to_field[ret];
1036         MLX5_ASSERT(reg_type > 0);
1037         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1038         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1039                                              MLX5_MODIFICATION_TYPE_SET, error);
1040 }
1041
1042 /**
1043  * Convert internal COPY_REG action to DV specification.
1044  *
1045  * @param[in] dev
1046  *   Pointer to the rte_eth_dev structure.
1047  * @param[in,out] res
1048  *   Pointer to the modify-header resource.
1049  * @param[in] action
1050  *   Pointer to action specification.
1051  * @param[out] error
1052  *   Pointer to the error structure.
1053  *
1054  * @return
1055  *   0 on success, a negative errno value otherwise and rte_errno is set.
1056  */
1057 static int
1058 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1059                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1060                                  const struct rte_flow_action *action,
1061                                  struct rte_flow_error *error)
1062 {
1063         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1064         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1065         struct rte_flow_item item = {
1066                 .spec = NULL,
1067                 .mask = &mask,
1068         };
1069         struct field_modify_info reg_src[] = {
1070                 {4, 0, reg_to_field[conf->src]},
1071                 {0, 0, 0},
1072         };
1073         struct field_modify_info reg_dst = {
1074                 .offset = 0,
1075                 .id = reg_to_field[conf->dst],
1076         };
1077         /* Adjust reg_c[0] usage according to reported mask. */
1078         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1079                 struct mlx5_priv *priv = dev->data->dev_private;
1080                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1081
1082                 MLX5_ASSERT(reg_c0);
1083                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1084                 if (conf->dst == REG_C_0) {
1085                         /* Copy to reg_c[0], within mask only. */
1086                         reg_dst.offset = rte_bsf32(reg_c0);
1087                         /*
1088                          * Mask is ignoring the enianness, because
1089                          * there is no conversion in datapath.
1090                          */
1091 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1092                         /* Copy from destination lower bits to reg_c[0]. */
1093                         mask = reg_c0 >> reg_dst.offset;
1094 #else
1095                         /* Copy from destination upper bits to reg_c[0]. */
1096                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1097                                           rte_fls_u32(reg_c0));
1098 #endif
1099                 } else {
1100                         mask = rte_cpu_to_be_32(reg_c0);
1101 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1102                         /* Copy from reg_c[0] to destination lower bits. */
1103                         reg_dst.offset = 0;
1104 #else
1105                         /* Copy from reg_c[0] to destination upper bits. */
1106                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1107                                          (rte_fls_u32(reg_c0) -
1108                                           rte_bsf32(reg_c0));
1109 #endif
1110                 }
1111         }
1112         return flow_dv_convert_modify_action(&item,
1113                                              reg_src, &reg_dst, res,
1114                                              MLX5_MODIFICATION_TYPE_COPY,
1115                                              error);
1116 }
1117
1118 /**
1119  * Convert MARK action to DV specification. This routine is used
1120  * in extensive metadata only and requires metadata register to be
1121  * handled. In legacy mode hardware tag resource is engaged.
1122  *
1123  * @param[in] dev
1124  *   Pointer to the rte_eth_dev structure.
1125  * @param[in] conf
1126  *   Pointer to MARK action specification.
1127  * @param[in,out] resource
1128  *   Pointer to the modify-header resource.
1129  * @param[out] error
1130  *   Pointer to the error structure.
1131  *
1132  * @return
1133  *   0 on success, a negative errno value otherwise and rte_errno is set.
1134  */
1135 static int
1136 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1137                             const struct rte_flow_action_mark *conf,
1138                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1139                             struct rte_flow_error *error)
1140 {
1141         struct mlx5_priv *priv = dev->data->dev_private;
1142         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1143                                            priv->sh->dv_mark_mask);
1144         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1145         struct rte_flow_item item = {
1146                 .spec = &data,
1147                 .mask = &mask,
1148         };
1149         struct field_modify_info reg_c_x[] = {
1150                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1151                 {0, 0, 0},
1152         };
1153         int reg;
1154
1155         if (!mask)
1156                 return rte_flow_error_set(error, EINVAL,
1157                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1158                                           NULL, "zero mark action mask");
1159         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1160         if (reg < 0)
1161                 return reg;
1162         MLX5_ASSERT(reg > 0);
1163         if (reg == REG_C_0) {
1164                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1165                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1166
1167                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1168                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1169                 mask = rte_cpu_to_be_32(mask << shl_c0);
1170         }
1171         reg_c_x[0].id = reg_to_field[reg];
1172         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1173                                              MLX5_MODIFICATION_TYPE_SET, error);
1174 }
1175
1176 /**
1177  * Get metadata register index for specified steering domain.
1178  *
1179  * @param[in] dev
1180  *   Pointer to the rte_eth_dev structure.
1181  * @param[in] attr
1182  *   Attributes of flow to determine steering domain.
1183  * @param[out] error
1184  *   Pointer to the error structure.
1185  *
1186  * @return
1187  *   positive index on success, a negative errno value otherwise
1188  *   and rte_errno is set.
1189  */
1190 static enum modify_reg
1191 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1192                          const struct rte_flow_attr *attr,
1193                          struct rte_flow_error *error)
1194 {
1195         int reg =
1196                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1197                                           MLX5_METADATA_FDB :
1198                                             attr->egress ?
1199                                             MLX5_METADATA_TX :
1200                                             MLX5_METADATA_RX, 0, error);
1201         if (reg < 0)
1202                 return rte_flow_error_set(error,
1203                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1204                                           NULL, "unavailable "
1205                                           "metadata register");
1206         return reg;
1207 }
1208
1209 /**
1210  * Convert SET_META action to DV specification.
1211  *
1212  * @param[in] dev
1213  *   Pointer to the rte_eth_dev structure.
1214  * @param[in,out] resource
1215  *   Pointer to the modify-header resource.
1216  * @param[in] attr
1217  *   Attributes of flow that includes this item.
1218  * @param[in] conf
1219  *   Pointer to action specification.
1220  * @param[out] error
1221  *   Pointer to the error structure.
1222  *
1223  * @return
1224  *   0 on success, a negative errno value otherwise and rte_errno is set.
1225  */
1226 static int
1227 flow_dv_convert_action_set_meta
1228                         (struct rte_eth_dev *dev,
1229                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1230                          const struct rte_flow_attr *attr,
1231                          const struct rte_flow_action_set_meta *conf,
1232                          struct rte_flow_error *error)
1233 {
1234         uint32_t data = conf->data;
1235         uint32_t mask = conf->mask;
1236         struct rte_flow_item item = {
1237                 .spec = &data,
1238                 .mask = &mask,
1239         };
1240         struct field_modify_info reg_c_x[] = {
1241                 [1] = {0, 0, 0},
1242         };
1243         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1244
1245         if (reg < 0)
1246                 return reg;
1247         /*
1248          * In datapath code there is no endianness
1249          * coversions for perfromance reasons, all
1250          * pattern conversions are done in rte_flow.
1251          */
1252         if (reg == REG_C_0) {
1253                 struct mlx5_priv *priv = dev->data->dev_private;
1254                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1255                 uint32_t shl_c0;
1256
1257                 MLX5_ASSERT(msk_c0);
1258 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1259                 shl_c0 = rte_bsf32(msk_c0);
1260 #else
1261                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1262 #endif
1263                 mask <<= shl_c0;
1264                 data <<= shl_c0;
1265                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1266         }
1267         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1268         /* The routine expects parameters in memory as big-endian ones. */
1269         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1270                                              MLX5_MODIFICATION_TYPE_SET, error);
1271 }
1272
1273 /**
1274  * Convert modify-header set IPv4 DSCP action to DV specification.
1275  *
1276  * @param[in,out] resource
1277  *   Pointer to the modify-header resource.
1278  * @param[in] action
1279  *   Pointer to action specification.
1280  * @param[out] error
1281  *   Pointer to the error structure.
1282  *
1283  * @return
1284  *   0 on success, a negative errno value otherwise and rte_errno is set.
1285  */
1286 static int
1287 flow_dv_convert_action_modify_ipv4_dscp
1288                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1289                          const struct rte_flow_action *action,
1290                          struct rte_flow_error *error)
1291 {
1292         const struct rte_flow_action_set_dscp *conf =
1293                 (const struct rte_flow_action_set_dscp *)(action->conf);
1294         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1295         struct rte_flow_item_ipv4 ipv4;
1296         struct rte_flow_item_ipv4 ipv4_mask;
1297
1298         memset(&ipv4, 0, sizeof(ipv4));
1299         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1300         ipv4.hdr.type_of_service = conf->dscp;
1301         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1302         item.spec = &ipv4;
1303         item.mask = &ipv4_mask;
1304         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1305                                              MLX5_MODIFICATION_TYPE_SET, error);
1306 }
1307
1308 /**
1309  * Convert modify-header set IPv6 DSCP action to DV specification.
1310  *
1311  * @param[in,out] resource
1312  *   Pointer to the modify-header resource.
1313  * @param[in] action
1314  *   Pointer to action specification.
1315  * @param[out] error
1316  *   Pointer to the error structure.
1317  *
1318  * @return
1319  *   0 on success, a negative errno value otherwise and rte_errno is set.
1320  */
1321 static int
1322 flow_dv_convert_action_modify_ipv6_dscp
1323                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1324                          const struct rte_flow_action *action,
1325                          struct rte_flow_error *error)
1326 {
1327         const struct rte_flow_action_set_dscp *conf =
1328                 (const struct rte_flow_action_set_dscp *)(action->conf);
1329         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1330         struct rte_flow_item_ipv6 ipv6;
1331         struct rte_flow_item_ipv6 ipv6_mask;
1332
1333         memset(&ipv6, 0, sizeof(ipv6));
1334         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1335         /*
1336          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1337          * rdma-core only accept the DSCP bits byte aligned start from
1338          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1339          * bits in IPv6 case as rdma-core requires byte aligned value.
1340          */
1341         ipv6.hdr.vtc_flow = conf->dscp;
1342         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1343         item.spec = &ipv6;
1344         item.mask = &ipv6_mask;
1345         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1346                                              MLX5_MODIFICATION_TYPE_SET, error);
1347 }
1348
1349 /**
1350  * Validate MARK item.
1351  *
1352  * @param[in] dev
1353  *   Pointer to the rte_eth_dev structure.
1354  * @param[in] item
1355  *   Item specification.
1356  * @param[in] attr
1357  *   Attributes of flow that includes this item.
1358  * @param[out] error
1359  *   Pointer to error structure.
1360  *
1361  * @return
1362  *   0 on success, a negative errno value otherwise and rte_errno is set.
1363  */
1364 static int
1365 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1366                            const struct rte_flow_item *item,
1367                            const struct rte_flow_attr *attr __rte_unused,
1368                            struct rte_flow_error *error)
1369 {
1370         struct mlx5_priv *priv = dev->data->dev_private;
1371         struct mlx5_dev_config *config = &priv->config;
1372         const struct rte_flow_item_mark *spec = item->spec;
1373         const struct rte_flow_item_mark *mask = item->mask;
1374         const struct rte_flow_item_mark nic_mask = {
1375                 .id = priv->sh->dv_mark_mask,
1376         };
1377         int ret;
1378
1379         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1380                 return rte_flow_error_set(error, ENOTSUP,
1381                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1382                                           "extended metadata feature"
1383                                           " isn't enabled");
1384         if (!mlx5_flow_ext_mreg_supported(dev))
1385                 return rte_flow_error_set(error, ENOTSUP,
1386                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1387                                           "extended metadata register"
1388                                           " isn't supported");
1389         if (!nic_mask.id)
1390                 return rte_flow_error_set(error, ENOTSUP,
1391                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1392                                           "extended metadata register"
1393                                           " isn't available");
1394         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1395         if (ret < 0)
1396                 return ret;
1397         if (!spec)
1398                 return rte_flow_error_set(error, EINVAL,
1399                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1400                                           item->spec,
1401                                           "data cannot be empty");
1402         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1403                 return rte_flow_error_set(error, EINVAL,
1404                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1405                                           &spec->id,
1406                                           "mark id exceeds the limit");
1407         if (!mask)
1408                 mask = &nic_mask;
1409         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1410                                         (const uint8_t *)&nic_mask,
1411                                         sizeof(struct rte_flow_item_mark),
1412                                         error);
1413         if (ret < 0)
1414                 return ret;
1415         return 0;
1416 }
1417
1418 /**
1419  * Validate META item.
1420  *
1421  * @param[in] dev
1422  *   Pointer to the rte_eth_dev structure.
1423  * @param[in] item
1424  *   Item specification.
1425  * @param[in] attr
1426  *   Attributes of flow that includes this item.
1427  * @param[out] error
1428  *   Pointer to error structure.
1429  *
1430  * @return
1431  *   0 on success, a negative errno value otherwise and rte_errno is set.
1432  */
1433 static int
1434 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1435                            const struct rte_flow_item *item,
1436                            const struct rte_flow_attr *attr,
1437                            struct rte_flow_error *error)
1438 {
1439         struct mlx5_priv *priv = dev->data->dev_private;
1440         struct mlx5_dev_config *config = &priv->config;
1441         const struct rte_flow_item_meta *spec = item->spec;
1442         const struct rte_flow_item_meta *mask = item->mask;
1443         struct rte_flow_item_meta nic_mask = {
1444                 .data = UINT32_MAX
1445         };
1446         int reg;
1447         int ret;
1448
1449         if (!spec)
1450                 return rte_flow_error_set(error, EINVAL,
1451                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1452                                           item->spec,
1453                                           "data cannot be empty");
1454         if (!spec->data)
1455                 return rte_flow_error_set(error, EINVAL,
1456                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1457                                           "data cannot be zero");
1458         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1459                 if (!mlx5_flow_ext_mreg_supported(dev))
1460                         return rte_flow_error_set(error, ENOTSUP,
1461                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1462                                           "extended metadata register"
1463                                           " isn't supported");
1464                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1465                 if (reg < 0)
1466                         return reg;
1467                 if (reg == REG_B)
1468                         return rte_flow_error_set(error, ENOTSUP,
1469                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1470                                           "match on reg_b "
1471                                           "isn't supported");
1472                 if (reg != REG_A)
1473                         nic_mask.data = priv->sh->dv_meta_mask;
1474         }
1475         if (!mask)
1476                 mask = &rte_flow_item_meta_mask;
1477         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1478                                         (const uint8_t *)&nic_mask,
1479                                         sizeof(struct rte_flow_item_meta),
1480                                         error);
1481         return ret;
1482 }
1483
1484 /**
1485  * Validate TAG item.
1486  *
1487  * @param[in] dev
1488  *   Pointer to the rte_eth_dev structure.
1489  * @param[in] item
1490  *   Item specification.
1491  * @param[in] attr
1492  *   Attributes of flow that includes this item.
1493  * @param[out] error
1494  *   Pointer to error structure.
1495  *
1496  * @return
1497  *   0 on success, a negative errno value otherwise and rte_errno is set.
1498  */
1499 static int
1500 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1501                           const struct rte_flow_item *item,
1502                           const struct rte_flow_attr *attr __rte_unused,
1503                           struct rte_flow_error *error)
1504 {
1505         const struct rte_flow_item_tag *spec = item->spec;
1506         const struct rte_flow_item_tag *mask = item->mask;
1507         const struct rte_flow_item_tag nic_mask = {
1508                 .data = RTE_BE32(UINT32_MAX),
1509                 .index = 0xff,
1510         };
1511         int ret;
1512
1513         if (!mlx5_flow_ext_mreg_supported(dev))
1514                 return rte_flow_error_set(error, ENOTSUP,
1515                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1516                                           "extensive metadata register"
1517                                           " isn't supported");
1518         if (!spec)
1519                 return rte_flow_error_set(error, EINVAL,
1520                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1521                                           item->spec,
1522                                           "data cannot be empty");
1523         if (!mask)
1524                 mask = &rte_flow_item_tag_mask;
1525         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1526                                         (const uint8_t *)&nic_mask,
1527                                         sizeof(struct rte_flow_item_tag),
1528                                         error);
1529         if (ret < 0)
1530                 return ret;
1531         if (mask->index != 0xff)
1532                 return rte_flow_error_set(error, EINVAL,
1533                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1534                                           "partial mask for tag index"
1535                                           " is not supported");
1536         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1537         if (ret < 0)
1538                 return ret;
1539         MLX5_ASSERT(ret != REG_NONE);
1540         return 0;
1541 }
1542
1543 /**
1544  * Validate vport item.
1545  *
1546  * @param[in] dev
1547  *   Pointer to the rte_eth_dev structure.
1548  * @param[in] item
1549  *   Item specification.
1550  * @param[in] attr
1551  *   Attributes of flow that includes this item.
1552  * @param[in] item_flags
1553  *   Bit-fields that holds the items detected until now.
1554  * @param[out] error
1555  *   Pointer to error structure.
1556  *
1557  * @return
1558  *   0 on success, a negative errno value otherwise and rte_errno is set.
1559  */
1560 static int
1561 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1562                               const struct rte_flow_item *item,
1563                               const struct rte_flow_attr *attr,
1564                               uint64_t item_flags,
1565                               struct rte_flow_error *error)
1566 {
1567         const struct rte_flow_item_port_id *spec = item->spec;
1568         const struct rte_flow_item_port_id *mask = item->mask;
1569         const struct rte_flow_item_port_id switch_mask = {
1570                         .id = 0xffffffff,
1571         };
1572         struct mlx5_priv *esw_priv;
1573         struct mlx5_priv *dev_priv;
1574         int ret;
1575
1576         if (!attr->transfer)
1577                 return rte_flow_error_set(error, EINVAL,
1578                                           RTE_FLOW_ERROR_TYPE_ITEM,
1579                                           NULL,
1580                                           "match on port id is valid only"
1581                                           " when transfer flag is enabled");
1582         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1583                 return rte_flow_error_set(error, ENOTSUP,
1584                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1585                                           "multiple source ports are not"
1586                                           " supported");
1587         if (!mask)
1588                 mask = &switch_mask;
1589         if (mask->id != 0xffffffff)
1590                 return rte_flow_error_set(error, ENOTSUP,
1591                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1592                                            mask,
1593                                            "no support for partial mask on"
1594                                            " \"id\" field");
1595         ret = mlx5_flow_item_acceptable
1596                                 (item, (const uint8_t *)mask,
1597                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1598                                  sizeof(struct rte_flow_item_port_id),
1599                                  error);
1600         if (ret)
1601                 return ret;
1602         if (!spec)
1603                 return 0;
1604         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1605         if (!esw_priv)
1606                 return rte_flow_error_set(error, rte_errno,
1607                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1608                                           "failed to obtain E-Switch info for"
1609                                           " port");
1610         dev_priv = mlx5_dev_to_eswitch_info(dev);
1611         if (!dev_priv)
1612                 return rte_flow_error_set(error, rte_errno,
1613                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1614                                           NULL,
1615                                           "failed to obtain E-Switch info");
1616         if (esw_priv->domain_id != dev_priv->domain_id)
1617                 return rte_flow_error_set(error, EINVAL,
1618                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1619                                           "cannot match on a port from a"
1620                                           " different E-Switch");
1621         return 0;
1622 }
1623
1624 /**
1625  * Validate GTP item.
1626  *
1627  * @param[in] dev
1628  *   Pointer to the rte_eth_dev structure.
1629  * @param[in] item
1630  *   Item specification.
1631  * @param[in] item_flags
1632  *   Bit-fields that holds the items detected until now.
1633  * @param[out] error
1634  *   Pointer to error structure.
1635  *
1636  * @return
1637  *   0 on success, a negative errno value otherwise and rte_errno is set.
1638  */
1639 static int
1640 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1641                           const struct rte_flow_item *item,
1642                           uint64_t item_flags,
1643                           struct rte_flow_error *error)
1644 {
1645         struct mlx5_priv *priv = dev->data->dev_private;
1646         const struct rte_flow_item_gtp *mask = item->mask;
1647         const struct rte_flow_item_gtp nic_mask = {
1648                 .msg_type = 0xff,
1649                 .teid = RTE_BE32(0xffffffff),
1650         };
1651
1652         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1653                 return rte_flow_error_set(error, ENOTSUP,
1654                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1655                                           "GTP support is not enabled");
1656         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1657                 return rte_flow_error_set(error, ENOTSUP,
1658                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1659                                           "multiple tunnel layers not"
1660                                           " supported");
1661         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1662                 return rte_flow_error_set(error, EINVAL,
1663                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1664                                           "no outer UDP layer found");
1665         if (!mask)
1666                 mask = &rte_flow_item_gtp_mask;
1667         return mlx5_flow_item_acceptable
1668                 (item, (const uint8_t *)mask,
1669                  (const uint8_t *)&nic_mask,
1670                  sizeof(struct rte_flow_item_gtp),
1671                  error);
1672 }
1673
1674 /**
1675  * Validate the pop VLAN action.
1676  *
1677  * @param[in] dev
1678  *   Pointer to the rte_eth_dev structure.
1679  * @param[in] action_flags
1680  *   Holds the actions detected until now.
1681  * @param[in] action
1682  *   Pointer to the pop vlan action.
1683  * @param[in] item_flags
1684  *   The items found in this flow rule.
1685  * @param[in] attr
1686  *   Pointer to flow attributes.
1687  * @param[out] error
1688  *   Pointer to error structure.
1689  *
1690  * @return
1691  *   0 on success, a negative errno value otherwise and rte_errno is set.
1692  */
1693 static int
1694 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1695                                  uint64_t action_flags,
1696                                  const struct rte_flow_action *action,
1697                                  uint64_t item_flags,
1698                                  const struct rte_flow_attr *attr,
1699                                  struct rte_flow_error *error)
1700 {
1701         struct mlx5_priv *priv = dev->data->dev_private;
1702
1703         (void)action;
1704         (void)attr;
1705         if (!priv->sh->pop_vlan_action)
1706                 return rte_flow_error_set(error, ENOTSUP,
1707                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1708                                           NULL,
1709                                           "pop vlan action is not supported");
1710         if (attr->egress)
1711                 return rte_flow_error_set(error, ENOTSUP,
1712                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1713                                           NULL,
1714                                           "pop vlan action not supported for "
1715                                           "egress");
1716         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1717                 return rte_flow_error_set(error, ENOTSUP,
1718                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1719                                           "no support for multiple VLAN "
1720                                           "actions");
1721         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1722                 return rte_flow_error_set(error, ENOTSUP,
1723                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1724                                           NULL,
1725                                           "cannot pop vlan without a "
1726                                           "match on (outer) vlan in the flow");
1727         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1728                 return rte_flow_error_set(error, EINVAL,
1729                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1730                                           "wrong action order, port_id should "
1731                                           "be after pop VLAN action");
1732         return 0;
1733 }
1734
1735 /**
1736  * Get VLAN default info from vlan match info.
1737  *
1738  * @param[in] items
1739  *   the list of item specifications.
1740  * @param[out] vlan
1741  *   pointer VLAN info to fill to.
1742  *
1743  * @return
1744  *   0 on success, a negative errno value otherwise and rte_errno is set.
1745  */
1746 static void
1747 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1748                                   struct rte_vlan_hdr *vlan)
1749 {
1750         const struct rte_flow_item_vlan nic_mask = {
1751                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1752                                 MLX5DV_FLOW_VLAN_VID_MASK),
1753                 .inner_type = RTE_BE16(0xffff),
1754         };
1755
1756         if (items == NULL)
1757                 return;
1758         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1759                 int type = items->type;
1760
1761                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
1762                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
1763                         break;
1764         }
1765         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
1766                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1767                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1768
1769                 if (!vlan_m)
1770                         vlan_m = &nic_mask;
1771                 /* Only full match values are accepted */
1772                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1773                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1774                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
1775                         vlan->vlan_tci |=
1776                                 rte_be_to_cpu_16(vlan_v->tci &
1777                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1778                 }
1779                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1780                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1781                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1782                         vlan->vlan_tci |=
1783                                 rte_be_to_cpu_16(vlan_v->tci &
1784                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1785                 }
1786                 if (vlan_m->inner_type == nic_mask.inner_type)
1787                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1788                                                            vlan_m->inner_type);
1789         }
1790 }
1791
1792 /**
1793  * Validate the push VLAN action.
1794  *
1795  * @param[in] action_flags
1796  *   Holds the actions detected until now.
1797  * @param[in] item_flags
1798  *   The items found in this flow rule.
1799  * @param[in] action
1800  *   Pointer to the action structure.
1801  * @param[in] attr
1802  *   Pointer to flow attributes
1803  * @param[out] error
1804  *   Pointer to error structure.
1805  *
1806  * @return
1807  *   0 on success, a negative errno value otherwise and rte_errno is set.
1808  */
1809 static int
1810 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1811                                   uint64_t item_flags __rte_unused,
1812                                   const struct rte_flow_action *action,
1813                                   const struct rte_flow_attr *attr,
1814                                   struct rte_flow_error *error)
1815 {
1816         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1817
1818         if (!attr->transfer && attr->ingress)
1819                 return rte_flow_error_set(error, ENOTSUP,
1820                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1821                                           NULL,
1822                                           "push VLAN action not supported for "
1823                                           "ingress");
1824         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1825             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1826                 return rte_flow_error_set(error, EINVAL,
1827                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1828                                           "invalid vlan ethertype");
1829         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1830                 return rte_flow_error_set(error, ENOTSUP,
1831                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1832                                           "no support for multiple VLAN "
1833                                           "actions");
1834         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1835                 return rte_flow_error_set(error, EINVAL,
1836                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1837                                           "wrong action order, port_id should "
1838                                           "be after push VLAN");
1839         (void)attr;
1840         return 0;
1841 }
1842
1843 /**
1844  * Validate the set VLAN PCP.
1845  *
1846  * @param[in] action_flags
1847  *   Holds the actions detected until now.
1848  * @param[in] actions
1849  *   Pointer to the list of actions remaining in the flow rule.
1850  * @param[out] error
1851  *   Pointer to error structure.
1852  *
1853  * @return
1854  *   0 on success, a negative errno value otherwise and rte_errno is set.
1855  */
1856 static int
1857 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1858                                      const struct rte_flow_action actions[],
1859                                      struct rte_flow_error *error)
1860 {
1861         const struct rte_flow_action *action = actions;
1862         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1863
1864         if (conf->vlan_pcp > 7)
1865                 return rte_flow_error_set(error, EINVAL,
1866                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1867                                           "VLAN PCP value is too big");
1868         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1869                 return rte_flow_error_set(error, ENOTSUP,
1870                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1871                                           "set VLAN PCP action must follow "
1872                                           "the push VLAN action");
1873         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1874                 return rte_flow_error_set(error, ENOTSUP,
1875                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1876                                           "Multiple VLAN PCP modification are "
1877                                           "not supported");
1878         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1879                 return rte_flow_error_set(error, EINVAL,
1880                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1881                                           "wrong action order, port_id should "
1882                                           "be after set VLAN PCP");
1883         return 0;
1884 }
1885
1886 /**
1887  * Validate the set VLAN VID.
1888  *
1889  * @param[in] item_flags
1890  *   Holds the items detected in this rule.
1891  * @param[in] action_flags
1892  *   Holds the actions detected until now.
1893  * @param[in] actions
1894  *   Pointer to the list of actions remaining in the flow rule.
1895  * @param[out] error
1896  *   Pointer to error structure.
1897  *
1898  * @return
1899  *   0 on success, a negative errno value otherwise and rte_errno is set.
1900  */
1901 static int
1902 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1903                                      uint64_t action_flags,
1904                                      const struct rte_flow_action actions[],
1905                                      struct rte_flow_error *error)
1906 {
1907         const struct rte_flow_action *action = actions;
1908         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1909
1910         if (conf->vlan_vid > RTE_BE16(0xFFE))
1911                 return rte_flow_error_set(error, EINVAL,
1912                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1913                                           "VLAN VID value is too big");
1914         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1915             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1916                 return rte_flow_error_set(error, ENOTSUP,
1917                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1918                                           "set VLAN VID action must follow push"
1919                                           " VLAN action or match on VLAN item");
1920         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1921                 return rte_flow_error_set(error, ENOTSUP,
1922                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1923                                           "Multiple VLAN VID modifications are "
1924                                           "not supported");
1925         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1926                 return rte_flow_error_set(error, EINVAL,
1927                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1928                                           "wrong action order, port_id should "
1929                                           "be after set VLAN VID");
1930         return 0;
1931 }
1932
1933 /*
1934  * Validate the FLAG action.
1935  *
1936  * @param[in] dev
1937  *   Pointer to the rte_eth_dev structure.
1938  * @param[in] action_flags
1939  *   Holds the actions detected until now.
1940  * @param[in] attr
1941  *   Pointer to flow attributes
1942  * @param[out] error
1943  *   Pointer to error structure.
1944  *
1945  * @return
1946  *   0 on success, a negative errno value otherwise and rte_errno is set.
1947  */
1948 static int
1949 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1950                              uint64_t action_flags,
1951                              const struct rte_flow_attr *attr,
1952                              struct rte_flow_error *error)
1953 {
1954         struct mlx5_priv *priv = dev->data->dev_private;
1955         struct mlx5_dev_config *config = &priv->config;
1956         int ret;
1957
1958         /* Fall back if no extended metadata register support. */
1959         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1960                 return mlx5_flow_validate_action_flag(action_flags, attr,
1961                                                       error);
1962         /* Extensive metadata mode requires registers. */
1963         if (!mlx5_flow_ext_mreg_supported(dev))
1964                 return rte_flow_error_set(error, ENOTSUP,
1965                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1966                                           "no metadata registers "
1967                                           "to support flag action");
1968         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1969                 return rte_flow_error_set(error, ENOTSUP,
1970                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1971                                           "extended metadata register"
1972                                           " isn't available");
1973         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1974         if (ret < 0)
1975                 return ret;
1976         MLX5_ASSERT(ret > 0);
1977         if (action_flags & MLX5_FLOW_ACTION_MARK)
1978                 return rte_flow_error_set(error, EINVAL,
1979                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1980                                           "can't mark and flag in same flow");
1981         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1982                 return rte_flow_error_set(error, EINVAL,
1983                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1984                                           "can't have 2 flag"
1985                                           " actions in same flow");
1986         return 0;
1987 }
1988
1989 /**
1990  * Validate MARK action.
1991  *
1992  * @param[in] dev
1993  *   Pointer to the rte_eth_dev structure.
1994  * @param[in] action
1995  *   Pointer to action.
1996  * @param[in] action_flags
1997  *   Holds the actions detected until now.
1998  * @param[in] attr
1999  *   Pointer to flow attributes
2000  * @param[out] error
2001  *   Pointer to error structure.
2002  *
2003  * @return
2004  *   0 on success, a negative errno value otherwise and rte_errno is set.
2005  */
2006 static int
2007 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
2008                              const struct rte_flow_action *action,
2009                              uint64_t action_flags,
2010                              const struct rte_flow_attr *attr,
2011                              struct rte_flow_error *error)
2012 {
2013         struct mlx5_priv *priv = dev->data->dev_private;
2014         struct mlx5_dev_config *config = &priv->config;
2015         const struct rte_flow_action_mark *mark = action->conf;
2016         int ret;
2017
2018         /* Fall back if no extended metadata register support. */
2019         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2020                 return mlx5_flow_validate_action_mark(action, action_flags,
2021                                                       attr, error);
2022         /* Extensive metadata mode requires registers. */
2023         if (!mlx5_flow_ext_mreg_supported(dev))
2024                 return rte_flow_error_set(error, ENOTSUP,
2025                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2026                                           "no metadata registers "
2027                                           "to support mark action");
2028         if (!priv->sh->dv_mark_mask)
2029                 return rte_flow_error_set(error, ENOTSUP,
2030                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2031                                           "extended metadata register"
2032                                           " isn't available");
2033         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2034         if (ret < 0)
2035                 return ret;
2036         MLX5_ASSERT(ret > 0);
2037         if (!mark)
2038                 return rte_flow_error_set(error, EINVAL,
2039                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2040                                           "configuration cannot be null");
2041         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
2042                 return rte_flow_error_set(error, EINVAL,
2043                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2044                                           &mark->id,
2045                                           "mark id exceeds the limit");
2046         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2047                 return rte_flow_error_set(error, EINVAL,
2048                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2049                                           "can't flag and mark in same flow");
2050         if (action_flags & MLX5_FLOW_ACTION_MARK)
2051                 return rte_flow_error_set(error, EINVAL,
2052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2053                                           "can't have 2 mark actions in same"
2054                                           " flow");
2055         return 0;
2056 }
2057
2058 /**
2059  * Validate SET_META action.
2060  *
2061  * @param[in] dev
2062  *   Pointer to the rte_eth_dev structure.
2063  * @param[in] action
2064  *   Pointer to the action structure.
2065  * @param[in] action_flags
2066  *   Holds the actions detected until now.
2067  * @param[in] attr
2068  *   Pointer to flow attributes
2069  * @param[out] error
2070  *   Pointer to error structure.
2071  *
2072  * @return
2073  *   0 on success, a negative errno value otherwise and rte_errno is set.
2074  */
2075 static int
2076 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2077                                  const struct rte_flow_action *action,
2078                                  uint64_t action_flags __rte_unused,
2079                                  const struct rte_flow_attr *attr,
2080                                  struct rte_flow_error *error)
2081 {
2082         const struct rte_flow_action_set_meta *conf;
2083         uint32_t nic_mask = UINT32_MAX;
2084         int reg;
2085
2086         if (!mlx5_flow_ext_mreg_supported(dev))
2087                 return rte_flow_error_set(error, ENOTSUP,
2088                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2089                                           "extended metadata register"
2090                                           " isn't supported");
2091         reg = flow_dv_get_metadata_reg(dev, attr, error);
2092         if (reg < 0)
2093                 return reg;
2094         if (reg != REG_A && reg != REG_B) {
2095                 struct mlx5_priv *priv = dev->data->dev_private;
2096
2097                 nic_mask = priv->sh->dv_meta_mask;
2098         }
2099         if (!(action->conf))
2100                 return rte_flow_error_set(error, EINVAL,
2101                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2102                                           "configuration cannot be null");
2103         conf = (const struct rte_flow_action_set_meta *)action->conf;
2104         if (!conf->mask)
2105                 return rte_flow_error_set(error, EINVAL,
2106                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2107                                           "zero mask doesn't have any effect");
2108         if (conf->mask & ~nic_mask)
2109                 return rte_flow_error_set(error, EINVAL,
2110                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2111                                           "meta data must be within reg C0");
2112         return 0;
2113 }
2114
2115 /**
2116  * Validate SET_TAG action.
2117  *
2118  * @param[in] dev
2119  *   Pointer to the rte_eth_dev structure.
2120  * @param[in] action
2121  *   Pointer to the action structure.
2122  * @param[in] action_flags
2123  *   Holds the actions detected until now.
2124  * @param[in] attr
2125  *   Pointer to flow attributes
2126  * @param[out] error
2127  *   Pointer to error structure.
2128  *
2129  * @return
2130  *   0 on success, a negative errno value otherwise and rte_errno is set.
2131  */
2132 static int
2133 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2134                                 const struct rte_flow_action *action,
2135                                 uint64_t action_flags,
2136                                 const struct rte_flow_attr *attr,
2137                                 struct rte_flow_error *error)
2138 {
2139         const struct rte_flow_action_set_tag *conf;
2140         const uint64_t terminal_action_flags =
2141                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2142                 MLX5_FLOW_ACTION_RSS;
2143         int ret;
2144
2145         if (!mlx5_flow_ext_mreg_supported(dev))
2146                 return rte_flow_error_set(error, ENOTSUP,
2147                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2148                                           "extensive metadata register"
2149                                           " isn't supported");
2150         if (!(action->conf))
2151                 return rte_flow_error_set(error, EINVAL,
2152                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2153                                           "configuration cannot be null");
2154         conf = (const struct rte_flow_action_set_tag *)action->conf;
2155         if (!conf->mask)
2156                 return rte_flow_error_set(error, EINVAL,
2157                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2158                                           "zero mask doesn't have any effect");
2159         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2160         if (ret < 0)
2161                 return ret;
2162         if (!attr->transfer && attr->ingress &&
2163             (action_flags & terminal_action_flags))
2164                 return rte_flow_error_set(error, EINVAL,
2165                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2166                                           "set_tag has no effect"
2167                                           " with terminal actions");
2168         return 0;
2169 }
2170
2171 /**
2172  * Validate count action.
2173  *
2174  * @param[in] dev
2175  *   Pointer to rte_eth_dev structure.
2176  * @param[out] error
2177  *   Pointer to error structure.
2178  *
2179  * @return
2180  *   0 on success, a negative errno value otherwise and rte_errno is set.
2181  */
2182 static int
2183 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2184                               struct rte_flow_error *error)
2185 {
2186         struct mlx5_priv *priv = dev->data->dev_private;
2187
2188         if (!priv->config.devx)
2189                 goto notsup_err;
2190 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2191         return 0;
2192 #endif
2193 notsup_err:
2194         return rte_flow_error_set
2195                       (error, ENOTSUP,
2196                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2197                        NULL,
2198                        "count action not supported");
2199 }
2200
2201 /**
2202  * Validate the L2 encap action.
2203  *
2204  * @param[in] action_flags
2205  *   Holds the actions detected until now.
2206  * @param[in] action
2207  *   Pointer to the action structure.
2208  * @param[out] error
2209  *   Pointer to error structure.
2210  *
2211  * @return
2212  *   0 on success, a negative errno value otherwise and rte_errno is set.
2213  */
2214 static int
2215 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2216                                  const struct rte_flow_action *action,
2217                                  struct rte_flow_error *error)
2218 {
2219         if (!(action->conf))
2220                 return rte_flow_error_set(error, EINVAL,
2221                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2222                                           "configuration cannot be null");
2223         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
2224                 return rte_flow_error_set(error, EINVAL,
2225                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2226                                           "can only have a single encap action "
2227                                           "in a flow");
2228         return 0;
2229 }
2230
2231 /**
2232  * Validate a decap action.
2233  *
2234  * @param[in] action_flags
2235  *   Holds the actions detected until now.
2236  * @param[in] attr
2237  *   Pointer to flow attributes
2238  * @param[out] error
2239  *   Pointer to error structure.
2240  *
2241  * @return
2242  *   0 on success, a negative errno value otherwise and rte_errno is set.
2243  */
2244 static int
2245 flow_dv_validate_action_decap(uint64_t action_flags,
2246                                  const struct rte_flow_attr *attr,
2247                                  struct rte_flow_error *error)
2248 {
2249         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
2250                 return rte_flow_error_set(error, ENOTSUP,
2251                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2252                                           action_flags &
2253                                           MLX5_FLOW_ACTION_DECAP ? "can only "
2254                                           "have a single decap action" : "decap "
2255                                           "after encap is not supported");
2256         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2257                 return rte_flow_error_set(error, EINVAL,
2258                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2259                                           "can't have decap action after"
2260                                           " modify action");
2261         if (attr->egress)
2262                 return rte_flow_error_set(error, ENOTSUP,
2263                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2264                                           NULL,
2265                                           "decap action not supported for "
2266                                           "egress");
2267         return 0;
2268 }
2269
2270 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
2271
2272 /**
2273  * Validate the raw encap and decap actions.
2274  *
2275  * @param[in] decap
2276  *   Pointer to the decap action.
2277  * @param[in] encap
2278  *   Pointer to the encap action.
2279  * @param[in] attr
2280  *   Pointer to flow attributes
2281  * @param[in/out] action_flags
2282  *   Holds the actions detected until now.
2283  * @param[out] actions_n
2284  *   pointer to the number of actions counter.
2285  * @param[out] error
2286  *   Pointer to error structure.
2287  *
2288  * @return
2289  *   0 on success, a negative errno value otherwise and rte_errno is set.
2290  */
2291 static int
2292 flow_dv_validate_action_raw_encap_decap
2293         (const struct rte_flow_action_raw_decap *decap,
2294          const struct rte_flow_action_raw_encap *encap,
2295          const struct rte_flow_attr *attr, uint64_t *action_flags,
2296          int *actions_n, struct rte_flow_error *error)
2297 {
2298         int ret;
2299
2300         if (encap && (!encap->size || !encap->data))
2301                 return rte_flow_error_set(error, EINVAL,
2302                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2303                                           "raw encap data cannot be empty");
2304         if (decap && encap) {
2305                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
2306                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2307                         /* L3 encap. */
2308                         decap = NULL;
2309                 else if (encap->size <=
2310                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2311                            decap->size >
2312                            MLX5_ENCAPSULATION_DECISION_SIZE)
2313                         /* L3 decap. */
2314                         encap = NULL;
2315                 else if (encap->size >
2316                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2317                            decap->size >
2318                            MLX5_ENCAPSULATION_DECISION_SIZE)
2319                         /* 2 L2 actions: encap and decap. */
2320                         ;
2321                 else
2322                         return rte_flow_error_set(error,
2323                                 ENOTSUP,
2324                                 RTE_FLOW_ERROR_TYPE_ACTION,
2325                                 NULL, "unsupported too small "
2326                                 "raw decap and too small raw "
2327                                 "encap combination");
2328         }
2329         if (decap) {
2330                 ret = flow_dv_validate_action_decap(*action_flags, attr, error);
2331                 if (ret < 0)
2332                         return ret;
2333                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
2334                 ++(*actions_n);
2335         }
2336         if (encap) {
2337                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
2338                         return rte_flow_error_set(error, ENOTSUP,
2339                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2340                                                   NULL,
2341                                                   "small raw encap size");
2342                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
2343                         return rte_flow_error_set(error, EINVAL,
2344                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2345                                                   NULL,
2346                                                   "more than one encap action");
2347                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
2348                 ++(*actions_n);
2349         }
2350         return 0;
2351 }
2352
2353 /**
2354  * Find existing encap/decap resource or create and register a new one.
2355  *
2356  * @param[in, out] dev
2357  *   Pointer to rte_eth_dev structure.
2358  * @param[in, out] resource
2359  *   Pointer to encap/decap resource.
2360  * @parm[in, out] dev_flow
2361  *   Pointer to the dev_flow.
2362  * @param[out] error
2363  *   pointer to error structure.
2364  *
2365  * @return
2366  *   0 on success otherwise -errno and errno is set.
2367  */
2368 static int
2369 flow_dv_encap_decap_resource_register
2370                         (struct rte_eth_dev *dev,
2371                          struct mlx5_flow_dv_encap_decap_resource *resource,
2372                          struct mlx5_flow *dev_flow,
2373                          struct rte_flow_error *error)
2374 {
2375         struct mlx5_priv *priv = dev->data->dev_private;
2376         struct mlx5_ibv_shared *sh = priv->sh;
2377         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2378         struct mlx5dv_dr_domain *domain;
2379
2380         resource->flags = dev_flow->group ? 0 : 1;
2381         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2382                 domain = sh->fdb_domain;
2383         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2384                 domain = sh->rx_domain;
2385         else
2386                 domain = sh->tx_domain;
2387         /* Lookup a matching resource from cache. */
2388         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2389                 if (resource->reformat_type == cache_resource->reformat_type &&
2390                     resource->ft_type == cache_resource->ft_type &&
2391                     resource->flags == cache_resource->flags &&
2392                     resource->size == cache_resource->size &&
2393                     !memcmp((const void *)resource->buf,
2394                             (const void *)cache_resource->buf,
2395                             resource->size)) {
2396                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2397                                 (void *)cache_resource,
2398                                 rte_atomic32_read(&cache_resource->refcnt));
2399                         rte_atomic32_inc(&cache_resource->refcnt);
2400                         dev_flow->dv.encap_decap = cache_resource;
2401                         return 0;
2402                 }
2403         }
2404         /* Register new encap/decap resource. */
2405         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2406         if (!cache_resource)
2407                 return rte_flow_error_set(error, ENOMEM,
2408                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2409                                           "cannot allocate resource memory");
2410         *cache_resource = *resource;
2411         cache_resource->verbs_action =
2412                 mlx5_glue->dv_create_flow_action_packet_reformat
2413                         (sh->ctx, cache_resource->reformat_type,
2414                          cache_resource->ft_type, domain, cache_resource->flags,
2415                          cache_resource->size,
2416                          (cache_resource->size ? cache_resource->buf : NULL));
2417         if (!cache_resource->verbs_action) {
2418                 rte_free(cache_resource);
2419                 return rte_flow_error_set(error, ENOMEM,
2420                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2421                                           NULL, "cannot create action");
2422         }
2423         rte_atomic32_init(&cache_resource->refcnt);
2424         rte_atomic32_inc(&cache_resource->refcnt);
2425         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2426         dev_flow->dv.encap_decap = cache_resource;
2427         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2428                 (void *)cache_resource,
2429                 rte_atomic32_read(&cache_resource->refcnt));
2430         return 0;
2431 }
2432
2433 /**
2434  * Find existing table jump resource or create and register a new one.
2435  *
2436  * @param[in, out] dev
2437  *   Pointer to rte_eth_dev structure.
2438  * @param[in, out] tbl
2439  *   Pointer to flow table resource.
2440  * @parm[in, out] dev_flow
2441  *   Pointer to the dev_flow.
2442  * @param[out] error
2443  *   pointer to error structure.
2444  *
2445  * @return
2446  *   0 on success otherwise -errno and errno is set.
2447  */
2448 static int
2449 flow_dv_jump_tbl_resource_register
2450                         (struct rte_eth_dev *dev __rte_unused,
2451                          struct mlx5_flow_tbl_resource *tbl,
2452                          struct mlx5_flow *dev_flow,
2453                          struct rte_flow_error *error)
2454 {
2455         struct mlx5_flow_tbl_data_entry *tbl_data =
2456                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2457         int cnt;
2458
2459         MLX5_ASSERT(tbl);
2460         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2461         if (!cnt) {
2462                 tbl_data->jump.action =
2463                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2464                         (tbl->obj);
2465                 if (!tbl_data->jump.action)
2466                         return rte_flow_error_set(error, ENOMEM,
2467                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2468                                         NULL, "cannot create jump action");
2469                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2470                         (void *)&tbl_data->jump, cnt);
2471         } else {
2472                 MLX5_ASSERT(tbl_data->jump.action);
2473                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2474                         (void *)&tbl_data->jump, cnt);
2475         }
2476         rte_atomic32_inc(&tbl_data->jump.refcnt);
2477         dev_flow->dv.jump = &tbl_data->jump;
2478         return 0;
2479 }
2480
2481 /**
2482  * Find existing table port ID resource or create and register a new one.
2483  *
2484  * @param[in, out] dev
2485  *   Pointer to rte_eth_dev structure.
2486  * @param[in, out] resource
2487  *   Pointer to port ID action resource.
2488  * @parm[in, out] dev_flow
2489  *   Pointer to the dev_flow.
2490  * @param[out] error
2491  *   pointer to error structure.
2492  *
2493  * @return
2494  *   0 on success otherwise -errno and errno is set.
2495  */
2496 static int
2497 flow_dv_port_id_action_resource_register
2498                         (struct rte_eth_dev *dev,
2499                          struct mlx5_flow_dv_port_id_action_resource *resource,
2500                          struct mlx5_flow *dev_flow,
2501                          struct rte_flow_error *error)
2502 {
2503         struct mlx5_priv *priv = dev->data->dev_private;
2504         struct mlx5_ibv_shared *sh = priv->sh;
2505         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2506
2507         /* Lookup a matching resource from cache. */
2508         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2509                 if (resource->port_id == cache_resource->port_id) {
2510                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2511                                 "refcnt %d++",
2512                                 (void *)cache_resource,
2513                                 rte_atomic32_read(&cache_resource->refcnt));
2514                         rte_atomic32_inc(&cache_resource->refcnt);
2515                         dev_flow->dv.port_id_action = cache_resource;
2516                         return 0;
2517                 }
2518         }
2519         /* Register new port id action resource. */
2520         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2521         if (!cache_resource)
2522                 return rte_flow_error_set(error, ENOMEM,
2523                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2524                                           "cannot allocate resource memory");
2525         *cache_resource = *resource;
2526         /*
2527          * Depending on rdma_core version the glue routine calls
2528          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2529          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2530          */
2531         cache_resource->action =
2532                 mlx5_glue->dr_create_flow_action_dest_port
2533                         (priv->sh->fdb_domain, resource->port_id);
2534         if (!cache_resource->action) {
2535                 rte_free(cache_resource);
2536                 return rte_flow_error_set(error, ENOMEM,
2537                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2538                                           NULL, "cannot create action");
2539         }
2540         rte_atomic32_init(&cache_resource->refcnt);
2541         rte_atomic32_inc(&cache_resource->refcnt);
2542         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2543         dev_flow->dv.port_id_action = cache_resource;
2544         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2545                 (void *)cache_resource,
2546                 rte_atomic32_read(&cache_resource->refcnt));
2547         return 0;
2548 }
2549
2550 /**
2551  * Find existing push vlan resource or create and register a new one.
2552  *
2553  * @param [in, out] dev
2554  *   Pointer to rte_eth_dev structure.
2555  * @param[in, out] resource
2556  *   Pointer to port ID action resource.
2557  * @parm[in, out] dev_flow
2558  *   Pointer to the dev_flow.
2559  * @param[out] error
2560  *   pointer to error structure.
2561  *
2562  * @return
2563  *   0 on success otherwise -errno and errno is set.
2564  */
2565 static int
2566 flow_dv_push_vlan_action_resource_register
2567                        (struct rte_eth_dev *dev,
2568                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2569                         struct mlx5_flow *dev_flow,
2570                         struct rte_flow_error *error)
2571 {
2572         struct mlx5_priv *priv = dev->data->dev_private;
2573         struct mlx5_ibv_shared *sh = priv->sh;
2574         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2575         struct mlx5dv_dr_domain *domain;
2576
2577         /* Lookup a matching resource from cache. */
2578         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2579                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2580                     resource->ft_type == cache_resource->ft_type) {
2581                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2582                                 "refcnt %d++",
2583                                 (void *)cache_resource,
2584                                 rte_atomic32_read(&cache_resource->refcnt));
2585                         rte_atomic32_inc(&cache_resource->refcnt);
2586                         dev_flow->dv.push_vlan_res = cache_resource;
2587                         return 0;
2588                 }
2589         }
2590         /* Register new push_vlan action resource. */
2591         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2592         if (!cache_resource)
2593                 return rte_flow_error_set(error, ENOMEM,
2594                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2595                                           "cannot allocate resource memory");
2596         *cache_resource = *resource;
2597         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2598                 domain = sh->fdb_domain;
2599         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2600                 domain = sh->rx_domain;
2601         else
2602                 domain = sh->tx_domain;
2603         cache_resource->action =
2604                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2605                                                            resource->vlan_tag);
2606         if (!cache_resource->action) {
2607                 rte_free(cache_resource);
2608                 return rte_flow_error_set(error, ENOMEM,
2609                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2610                                           NULL, "cannot create action");
2611         }
2612         rte_atomic32_init(&cache_resource->refcnt);
2613         rte_atomic32_inc(&cache_resource->refcnt);
2614         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2615         dev_flow->dv.push_vlan_res = cache_resource;
2616         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2617                 (void *)cache_resource,
2618                 rte_atomic32_read(&cache_resource->refcnt));
2619         return 0;
2620 }
2621 /**
2622  * Get the size of specific rte_flow_item_type
2623  *
2624  * @param[in] item_type
2625  *   Tested rte_flow_item_type.
2626  *
2627  * @return
2628  *   sizeof struct item_type, 0 if void or irrelevant.
2629  */
2630 static size_t
2631 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2632 {
2633         size_t retval;
2634
2635         switch (item_type) {
2636         case RTE_FLOW_ITEM_TYPE_ETH:
2637                 retval = sizeof(struct rte_flow_item_eth);
2638                 break;
2639         case RTE_FLOW_ITEM_TYPE_VLAN:
2640                 retval = sizeof(struct rte_flow_item_vlan);
2641                 break;
2642         case RTE_FLOW_ITEM_TYPE_IPV4:
2643                 retval = sizeof(struct rte_flow_item_ipv4);
2644                 break;
2645         case RTE_FLOW_ITEM_TYPE_IPV6:
2646                 retval = sizeof(struct rte_flow_item_ipv6);
2647                 break;
2648         case RTE_FLOW_ITEM_TYPE_UDP:
2649                 retval = sizeof(struct rte_flow_item_udp);
2650                 break;
2651         case RTE_FLOW_ITEM_TYPE_TCP:
2652                 retval = sizeof(struct rte_flow_item_tcp);
2653                 break;
2654         case RTE_FLOW_ITEM_TYPE_VXLAN:
2655                 retval = sizeof(struct rte_flow_item_vxlan);
2656                 break;
2657         case RTE_FLOW_ITEM_TYPE_GRE:
2658                 retval = sizeof(struct rte_flow_item_gre);
2659                 break;
2660         case RTE_FLOW_ITEM_TYPE_NVGRE:
2661                 retval = sizeof(struct rte_flow_item_nvgre);
2662                 break;
2663         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2664                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2665                 break;
2666         case RTE_FLOW_ITEM_TYPE_MPLS:
2667                 retval = sizeof(struct rte_flow_item_mpls);
2668                 break;
2669         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2670         default:
2671                 retval = 0;
2672                 break;
2673         }
2674         return retval;
2675 }
2676
2677 #define MLX5_ENCAP_IPV4_VERSION         0x40
2678 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2679 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2680 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2681 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2682 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2683 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2684
2685 /**
2686  * Convert the encap action data from list of rte_flow_item to raw buffer
2687  *
2688  * @param[in] items
2689  *   Pointer to rte_flow_item objects list.
2690  * @param[out] buf
2691  *   Pointer to the output buffer.
2692  * @param[out] size
2693  *   Pointer to the output buffer size.
2694  * @param[out] error
2695  *   Pointer to the error structure.
2696  *
2697  * @return
2698  *   0 on success, a negative errno value otherwise and rte_errno is set.
2699  */
2700 static int
2701 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2702                            size_t *size, struct rte_flow_error *error)
2703 {
2704         struct rte_ether_hdr *eth = NULL;
2705         struct rte_vlan_hdr *vlan = NULL;
2706         struct rte_ipv4_hdr *ipv4 = NULL;
2707         struct rte_ipv6_hdr *ipv6 = NULL;
2708         struct rte_udp_hdr *udp = NULL;
2709         struct rte_vxlan_hdr *vxlan = NULL;
2710         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2711         struct rte_gre_hdr *gre = NULL;
2712         size_t len;
2713         size_t temp_size = 0;
2714
2715         if (!items)
2716                 return rte_flow_error_set(error, EINVAL,
2717                                           RTE_FLOW_ERROR_TYPE_ACTION,
2718                                           NULL, "invalid empty data");
2719         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2720                 len = flow_dv_get_item_len(items->type);
2721                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2722                         return rte_flow_error_set(error, EINVAL,
2723                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2724                                                   (void *)items->type,
2725                                                   "items total size is too big"
2726                                                   " for encap action");
2727                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2728                 switch (items->type) {
2729                 case RTE_FLOW_ITEM_TYPE_ETH:
2730                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2731                         break;
2732                 case RTE_FLOW_ITEM_TYPE_VLAN:
2733                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2734                         if (!eth)
2735                                 return rte_flow_error_set(error, EINVAL,
2736                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2737                                                 (void *)items->type,
2738                                                 "eth header not found");
2739                         if (!eth->ether_type)
2740                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2741                         break;
2742                 case RTE_FLOW_ITEM_TYPE_IPV4:
2743                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2744                         if (!vlan && !eth)
2745                                 return rte_flow_error_set(error, EINVAL,
2746                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2747                                                 (void *)items->type,
2748                                                 "neither eth nor vlan"
2749                                                 " header found");
2750                         if (vlan && !vlan->eth_proto)
2751                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2752                         else if (eth && !eth->ether_type)
2753                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2754                         if (!ipv4->version_ihl)
2755                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2756                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2757                         if (!ipv4->time_to_live)
2758                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2759                         break;
2760                 case RTE_FLOW_ITEM_TYPE_IPV6:
2761                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2762                         if (!vlan && !eth)
2763                                 return rte_flow_error_set(error, EINVAL,
2764                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2765                                                 (void *)items->type,
2766                                                 "neither eth nor vlan"
2767                                                 " header found");
2768                         if (vlan && !vlan->eth_proto)
2769                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2770                         else if (eth && !eth->ether_type)
2771                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2772                         if (!ipv6->vtc_flow)
2773                                 ipv6->vtc_flow =
2774                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2775                         if (!ipv6->hop_limits)
2776                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2777                         break;
2778                 case RTE_FLOW_ITEM_TYPE_UDP:
2779                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2780                         if (!ipv4 && !ipv6)
2781                                 return rte_flow_error_set(error, EINVAL,
2782                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2783                                                 (void *)items->type,
2784                                                 "ip header not found");
2785                         if (ipv4 && !ipv4->next_proto_id)
2786                                 ipv4->next_proto_id = IPPROTO_UDP;
2787                         else if (ipv6 && !ipv6->proto)
2788                                 ipv6->proto = IPPROTO_UDP;
2789                         break;
2790                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2791                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2792                         if (!udp)
2793                                 return rte_flow_error_set(error, EINVAL,
2794                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2795                                                 (void *)items->type,
2796                                                 "udp header not found");
2797                         if (!udp->dst_port)
2798                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2799                         if (!vxlan->vx_flags)
2800                                 vxlan->vx_flags =
2801                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2802                         break;
2803                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2804                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2805                         if (!udp)
2806                                 return rte_flow_error_set(error, EINVAL,
2807                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2808                                                 (void *)items->type,
2809                                                 "udp header not found");
2810                         if (!vxlan_gpe->proto)
2811                                 return rte_flow_error_set(error, EINVAL,
2812                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2813                                                 (void *)items->type,
2814                                                 "next protocol not found");
2815                         if (!udp->dst_port)
2816                                 udp->dst_port =
2817                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2818                         if (!vxlan_gpe->vx_flags)
2819                                 vxlan_gpe->vx_flags =
2820                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2821                         break;
2822                 case RTE_FLOW_ITEM_TYPE_GRE:
2823                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2824                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2825                         if (!gre->proto)
2826                                 return rte_flow_error_set(error, EINVAL,
2827                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2828                                                 (void *)items->type,
2829                                                 "next protocol not found");
2830                         if (!ipv4 && !ipv6)
2831                                 return rte_flow_error_set(error, EINVAL,
2832                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2833                                                 (void *)items->type,
2834                                                 "ip header not found");
2835                         if (ipv4 && !ipv4->next_proto_id)
2836                                 ipv4->next_proto_id = IPPROTO_GRE;
2837                         else if (ipv6 && !ipv6->proto)
2838                                 ipv6->proto = IPPROTO_GRE;
2839                         break;
2840                 case RTE_FLOW_ITEM_TYPE_VOID:
2841                         break;
2842                 default:
2843                         return rte_flow_error_set(error, EINVAL,
2844                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2845                                                   (void *)items->type,
2846                                                   "unsupported item type");
2847                         break;
2848                 }
2849                 temp_size += len;
2850         }
2851         *size = temp_size;
2852         return 0;
2853 }
2854
2855 static int
2856 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2857 {
2858         struct rte_ether_hdr *eth = NULL;
2859         struct rte_vlan_hdr *vlan = NULL;
2860         struct rte_ipv6_hdr *ipv6 = NULL;
2861         struct rte_udp_hdr *udp = NULL;
2862         char *next_hdr;
2863         uint16_t proto;
2864
2865         eth = (struct rte_ether_hdr *)data;
2866         next_hdr = (char *)(eth + 1);
2867         proto = RTE_BE16(eth->ether_type);
2868
2869         /* VLAN skipping */
2870         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2871                 vlan = (struct rte_vlan_hdr *)next_hdr;
2872                 proto = RTE_BE16(vlan->eth_proto);
2873                 next_hdr += sizeof(struct rte_vlan_hdr);
2874         }
2875
2876         /* HW calculates IPv4 csum. no need to proceed */
2877         if (proto == RTE_ETHER_TYPE_IPV4)
2878                 return 0;
2879
2880         /* non IPv4/IPv6 header. not supported */
2881         if (proto != RTE_ETHER_TYPE_IPV6) {
2882                 return rte_flow_error_set(error, ENOTSUP,
2883                                           RTE_FLOW_ERROR_TYPE_ACTION,
2884                                           NULL, "Cannot offload non IPv4/IPv6");
2885         }
2886
2887         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2888
2889         /* ignore non UDP */
2890         if (ipv6->proto != IPPROTO_UDP)
2891                 return 0;
2892
2893         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2894         udp->dgram_cksum = 0;
2895
2896         return 0;
2897 }
2898
2899 /**
2900  * Convert L2 encap action to DV specification.
2901  *
2902  * @param[in] dev
2903  *   Pointer to rte_eth_dev structure.
2904  * @param[in] action
2905  *   Pointer to action structure.
2906  * @param[in, out] dev_flow
2907  *   Pointer to the mlx5_flow.
2908  * @param[in] transfer
2909  *   Mark if the flow is E-Switch flow.
2910  * @param[out] error
2911  *   Pointer to the error structure.
2912  *
2913  * @return
2914  *   0 on success, a negative errno value otherwise and rte_errno is set.
2915  */
2916 static int
2917 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2918                                const struct rte_flow_action *action,
2919                                struct mlx5_flow *dev_flow,
2920                                uint8_t transfer,
2921                                struct rte_flow_error *error)
2922 {
2923         const struct rte_flow_item *encap_data;
2924         const struct rte_flow_action_raw_encap *raw_encap_data;
2925         struct mlx5_flow_dv_encap_decap_resource res = {
2926                 .reformat_type =
2927                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2928                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2929                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2930         };
2931
2932         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2933                 raw_encap_data =
2934                         (const struct rte_flow_action_raw_encap *)action->conf;
2935                 res.size = raw_encap_data->size;
2936                 memcpy(res.buf, raw_encap_data->data, res.size);
2937         } else {
2938                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2939                         encap_data =
2940                                 ((const struct rte_flow_action_vxlan_encap *)
2941                                                 action->conf)->definition;
2942                 else
2943                         encap_data =
2944                                 ((const struct rte_flow_action_nvgre_encap *)
2945                                                 action->conf)->definition;
2946                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2947                                                &res.size, error))
2948                         return -rte_errno;
2949         }
2950         if (flow_dv_zero_encap_udp_csum(res.buf, error))
2951                 return -rte_errno;
2952         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2953                 return rte_flow_error_set(error, EINVAL,
2954                                           RTE_FLOW_ERROR_TYPE_ACTION,
2955                                           NULL, "can't create L2 encap action");
2956         return 0;
2957 }
2958
2959 /**
2960  * Convert L2 decap action to DV specification.
2961  *
2962  * @param[in] dev
2963  *   Pointer to rte_eth_dev structure.
2964  * @param[in, out] dev_flow
2965  *   Pointer to the mlx5_flow.
2966  * @param[in] transfer
2967  *   Mark if the flow is E-Switch flow.
2968  * @param[out] error
2969  *   Pointer to the error structure.
2970  *
2971  * @return
2972  *   0 on success, a negative errno value otherwise and rte_errno is set.
2973  */
2974 static int
2975 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2976                                struct mlx5_flow *dev_flow,
2977                                uint8_t transfer,
2978                                struct rte_flow_error *error)
2979 {
2980         struct mlx5_flow_dv_encap_decap_resource res = {
2981                 .size = 0,
2982                 .reformat_type =
2983                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2984                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2985                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2986         };
2987
2988         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2989                 return rte_flow_error_set(error, EINVAL,
2990                                           RTE_FLOW_ERROR_TYPE_ACTION,
2991                                           NULL, "can't create L2 decap action");
2992         return 0;
2993 }
2994
2995 /**
2996  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2997  *
2998  * @param[in] dev
2999  *   Pointer to rte_eth_dev structure.
3000  * @param[in] action
3001  *   Pointer to action structure.
3002  * @param[in, out] dev_flow
3003  *   Pointer to the mlx5_flow.
3004  * @param[in] attr
3005  *   Pointer to the flow attributes.
3006  * @param[out] error
3007  *   Pointer to the error structure.
3008  *
3009  * @return
3010  *   0 on success, a negative errno value otherwise and rte_errno is set.
3011  */
3012 static int
3013 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
3014                                 const struct rte_flow_action *action,
3015                                 struct mlx5_flow *dev_flow,
3016                                 const struct rte_flow_attr *attr,
3017                                 struct rte_flow_error *error)
3018 {
3019         const struct rte_flow_action_raw_encap *encap_data;
3020         struct mlx5_flow_dv_encap_decap_resource res;
3021
3022         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3023         res.size = encap_data->size;
3024         memcpy(res.buf, encap_data->data, res.size);
3025         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3026                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3027                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3028         if (attr->transfer)
3029                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3030         else
3031                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3032                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3033         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3034                 return rte_flow_error_set(error, EINVAL,
3035                                           RTE_FLOW_ERROR_TYPE_ACTION,
3036                                           NULL, "can't create encap action");
3037         return 0;
3038 }
3039
3040 /**
3041  * Create action push VLAN.
3042  *
3043  * @param[in] dev
3044  *   Pointer to rte_eth_dev structure.
3045  * @param[in] attr
3046  *   Pointer to the flow attributes.
3047  * @param[in] vlan
3048  *   Pointer to the vlan to push to the Ethernet header.
3049  * @param[in, out] dev_flow
3050  *   Pointer to the mlx5_flow.
3051  * @param[out] error
3052  *   Pointer to the error structure.
3053  *
3054  * @return
3055  *   0 on success, a negative errno value otherwise and rte_errno is set.
3056  */
3057 static int
3058 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3059                                 const struct rte_flow_attr *attr,
3060                                 const struct rte_vlan_hdr *vlan,
3061                                 struct mlx5_flow *dev_flow,
3062                                 struct rte_flow_error *error)
3063 {
3064         struct mlx5_flow_dv_push_vlan_action_resource res;
3065
3066         res.vlan_tag =
3067                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3068                                  vlan->vlan_tci);
3069         if (attr->transfer)
3070                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3071         else
3072                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3073                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3074         return flow_dv_push_vlan_action_resource_register
3075                                             (dev, &res, dev_flow, error);
3076 }
3077
3078 /**
3079  * Validate the modify-header actions.
3080  *
3081  * @param[in] action_flags
3082  *   Holds the actions detected until now.
3083  * @param[in] action
3084  *   Pointer to the modify action.
3085  * @param[out] error
3086  *   Pointer to error structure.
3087  *
3088  * @return
3089  *   0 on success, a negative errno value otherwise and rte_errno is set.
3090  */
3091 static int
3092 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3093                                    const struct rte_flow_action *action,
3094                                    struct rte_flow_error *error)
3095 {
3096         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3097                 return rte_flow_error_set(error, EINVAL,
3098                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3099                                           NULL, "action configuration not set");
3100         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3101                 return rte_flow_error_set(error, EINVAL,
3102                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3103                                           "can't have encap action before"
3104                                           " modify action");
3105         return 0;
3106 }
3107
3108 /**
3109  * Validate the modify-header MAC address actions.
3110  *
3111  * @param[in] action_flags
3112  *   Holds the actions detected until now.
3113  * @param[in] action
3114  *   Pointer to the modify action.
3115  * @param[in] item_flags
3116  *   Holds the items detected.
3117  * @param[out] error
3118  *   Pointer to error structure.
3119  *
3120  * @return
3121  *   0 on success, a negative errno value otherwise and rte_errno is set.
3122  */
3123 static int
3124 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3125                                    const struct rte_flow_action *action,
3126                                    const uint64_t item_flags,
3127                                    struct rte_flow_error *error)
3128 {
3129         int ret = 0;
3130
3131         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3132         if (!ret) {
3133                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3134                         return rte_flow_error_set(error, EINVAL,
3135                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3136                                                   NULL,
3137                                                   "no L2 item in pattern");
3138         }
3139         return ret;
3140 }
3141
3142 /**
3143  * Validate the modify-header IPv4 address actions.
3144  *
3145  * @param[in] action_flags
3146  *   Holds the actions detected until now.
3147  * @param[in] action
3148  *   Pointer to the modify action.
3149  * @param[in] item_flags
3150  *   Holds the items detected.
3151  * @param[out] error
3152  *   Pointer to error structure.
3153  *
3154  * @return
3155  *   0 on success, a negative errno value otherwise and rte_errno is set.
3156  */
3157 static int
3158 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3159                                     const struct rte_flow_action *action,
3160                                     const uint64_t item_flags,
3161                                     struct rte_flow_error *error)
3162 {
3163         int ret = 0;
3164         uint64_t layer;
3165
3166         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3167         if (!ret) {
3168                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3169                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3170                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3171                 if (!(item_flags & layer))
3172                         return rte_flow_error_set(error, EINVAL,
3173                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3174                                                   NULL,
3175                                                   "no ipv4 item in pattern");
3176         }
3177         return ret;
3178 }
3179
3180 /**
3181  * Validate the modify-header IPv6 address actions.
3182  *
3183  * @param[in] action_flags
3184  *   Holds the actions detected until now.
3185  * @param[in] action
3186  *   Pointer to the modify action.
3187  * @param[in] item_flags
3188  *   Holds the items detected.
3189  * @param[out] error
3190  *   Pointer to error structure.
3191  *
3192  * @return
3193  *   0 on success, a negative errno value otherwise and rte_errno is set.
3194  */
3195 static int
3196 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3197                                     const struct rte_flow_action *action,
3198                                     const uint64_t item_flags,
3199                                     struct rte_flow_error *error)
3200 {
3201         int ret = 0;
3202         uint64_t layer;
3203
3204         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3205         if (!ret) {
3206                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3207                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3208                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3209                 if (!(item_flags & layer))
3210                         return rte_flow_error_set(error, EINVAL,
3211                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3212                                                   NULL,
3213                                                   "no ipv6 item in pattern");
3214         }
3215         return ret;
3216 }
3217
3218 /**
3219  * Validate the modify-header TP actions.
3220  *
3221  * @param[in] action_flags
3222  *   Holds the actions detected until now.
3223  * @param[in] action
3224  *   Pointer to the modify action.
3225  * @param[in] item_flags
3226  *   Holds the items detected.
3227  * @param[out] error
3228  *   Pointer to error structure.
3229  *
3230  * @return
3231  *   0 on success, a negative errno value otherwise and rte_errno is set.
3232  */
3233 static int
3234 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3235                                   const struct rte_flow_action *action,
3236                                   const uint64_t item_flags,
3237                                   struct rte_flow_error *error)
3238 {
3239         int ret = 0;
3240         uint64_t layer;
3241
3242         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3243         if (!ret) {
3244                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3245                                  MLX5_FLOW_LAYER_INNER_L4 :
3246                                  MLX5_FLOW_LAYER_OUTER_L4;
3247                 if (!(item_flags & layer))
3248                         return rte_flow_error_set(error, EINVAL,
3249                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3250                                                   NULL, "no transport layer "
3251                                                   "in pattern");
3252         }
3253         return ret;
3254 }
3255
3256 /**
3257  * Validate the modify-header actions of increment/decrement
3258  * TCP Sequence-number.
3259  *
3260  * @param[in] action_flags
3261  *   Holds the actions detected until now.
3262  * @param[in] action
3263  *   Pointer to the modify action.
3264  * @param[in] item_flags
3265  *   Holds the items detected.
3266  * @param[out] error
3267  *   Pointer to error structure.
3268  *
3269  * @return
3270  *   0 on success, a negative errno value otherwise and rte_errno is set.
3271  */
3272 static int
3273 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3274                                        const struct rte_flow_action *action,
3275                                        const uint64_t item_flags,
3276                                        struct rte_flow_error *error)
3277 {
3278         int ret = 0;
3279         uint64_t layer;
3280
3281         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3282         if (!ret) {
3283                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3284                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3285                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3286                 if (!(item_flags & layer))
3287                         return rte_flow_error_set(error, EINVAL,
3288                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3289                                                   NULL, "no TCP item in"
3290                                                   " pattern");
3291                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3292                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3293                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3294                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3295                         return rte_flow_error_set(error, EINVAL,
3296                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3297                                                   NULL,
3298                                                   "cannot decrease and increase"
3299                                                   " TCP sequence number"
3300                                                   " at the same time");
3301         }
3302         return ret;
3303 }
3304
3305 /**
3306  * Validate the modify-header actions of increment/decrement
3307  * TCP Acknowledgment number.
3308  *
3309  * @param[in] action_flags
3310  *   Holds the actions detected until now.
3311  * @param[in] action
3312  *   Pointer to the modify action.
3313  * @param[in] item_flags
3314  *   Holds the items detected.
3315  * @param[out] error
3316  *   Pointer to error structure.
3317  *
3318  * @return
3319  *   0 on success, a negative errno value otherwise and rte_errno is set.
3320  */
3321 static int
3322 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3323                                        const struct rte_flow_action *action,
3324                                        const uint64_t item_flags,
3325                                        struct rte_flow_error *error)
3326 {
3327         int ret = 0;
3328         uint64_t layer;
3329
3330         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3331         if (!ret) {
3332                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3333                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3334                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3335                 if (!(item_flags & layer))
3336                         return rte_flow_error_set(error, EINVAL,
3337                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3338                                                   NULL, "no TCP item in"
3339                                                   " pattern");
3340                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3341                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3342                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3343                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3344                         return rte_flow_error_set(error, EINVAL,
3345                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3346                                                   NULL,
3347                                                   "cannot decrease and increase"
3348                                                   " TCP acknowledgment number"
3349                                                   " at the same time");
3350         }
3351         return ret;
3352 }
3353
3354 /**
3355  * Validate the modify-header TTL actions.
3356  *
3357  * @param[in] action_flags
3358  *   Holds the actions detected until now.
3359  * @param[in] action
3360  *   Pointer to the modify action.
3361  * @param[in] item_flags
3362  *   Holds the items detected.
3363  * @param[out] error
3364  *   Pointer to error structure.
3365  *
3366  * @return
3367  *   0 on success, a negative errno value otherwise and rte_errno is set.
3368  */
3369 static int
3370 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3371                                    const struct rte_flow_action *action,
3372                                    const uint64_t item_flags,
3373                                    struct rte_flow_error *error)
3374 {
3375         int ret = 0;
3376         uint64_t layer;
3377
3378         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3379         if (!ret) {
3380                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3381                                  MLX5_FLOW_LAYER_INNER_L3 :
3382                                  MLX5_FLOW_LAYER_OUTER_L3;
3383                 if (!(item_flags & layer))
3384                         return rte_flow_error_set(error, EINVAL,
3385                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3386                                                   NULL,
3387                                                   "no IP protocol in pattern");
3388         }
3389         return ret;
3390 }
3391
3392 /**
3393  * Validate jump action.
3394  *
3395  * @param[in] action
3396  *   Pointer to the jump action.
3397  * @param[in] action_flags
3398  *   Holds the actions detected until now.
3399  * @param[in] attributes
3400  *   Pointer to flow attributes
3401  * @param[in] external
3402  *   Action belongs to flow rule created by request external to PMD.
3403  * @param[out] error
3404  *   Pointer to error structure.
3405  *
3406  * @return
3407  *   0 on success, a negative errno value otherwise and rte_errno is set.
3408  */
3409 static int
3410 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3411                              uint64_t action_flags,
3412                              const struct rte_flow_attr *attributes,
3413                              bool external, struct rte_flow_error *error)
3414 {
3415         uint32_t target_group, table;
3416         int ret = 0;
3417
3418         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3419                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3420                 return rte_flow_error_set(error, EINVAL,
3421                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3422                                           "can't have 2 fate actions in"
3423                                           " same flow");
3424         if (action_flags & MLX5_FLOW_ACTION_METER)
3425                 return rte_flow_error_set(error, ENOTSUP,
3426                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3427                                           "jump with meter not support");
3428         if (!action->conf)
3429                 return rte_flow_error_set(error, EINVAL,
3430                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3431                                           NULL, "action configuration not set");
3432         target_group =
3433                 ((const struct rte_flow_action_jump *)action->conf)->group;
3434         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3435                                        true, &table, error);
3436         if (ret)
3437                 return ret;
3438         if (attributes->group == target_group)
3439                 return rte_flow_error_set(error, EINVAL,
3440                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3441                                           "target group must be other than"
3442                                           " the current flow group");
3443         return 0;
3444 }
3445
3446 /*
3447  * Validate the port_id action.
3448  *
3449  * @param[in] dev
3450  *   Pointer to rte_eth_dev structure.
3451  * @param[in] action_flags
3452  *   Bit-fields that holds the actions detected until now.
3453  * @param[in] action
3454  *   Port_id RTE action structure.
3455  * @param[in] attr
3456  *   Attributes of flow that includes this action.
3457  * @param[out] error
3458  *   Pointer to error structure.
3459  *
3460  * @return
3461  *   0 on success, a negative errno value otherwise and rte_errno is set.
3462  */
3463 static int
3464 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3465                                 uint64_t action_flags,
3466                                 const struct rte_flow_action *action,
3467                                 const struct rte_flow_attr *attr,
3468                                 struct rte_flow_error *error)
3469 {
3470         const struct rte_flow_action_port_id *port_id;
3471         struct mlx5_priv *act_priv;
3472         struct mlx5_priv *dev_priv;
3473         uint16_t port;
3474
3475         if (!attr->transfer)
3476                 return rte_flow_error_set(error, ENOTSUP,
3477                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3478                                           NULL,
3479                                           "port id action is valid in transfer"
3480                                           " mode only");
3481         if (!action || !action->conf)
3482                 return rte_flow_error_set(error, ENOTSUP,
3483                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3484                                           NULL,
3485                                           "port id action parameters must be"
3486                                           " specified");
3487         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3488                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3489                 return rte_flow_error_set(error, EINVAL,
3490                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3491                                           "can have only one fate actions in"
3492                                           " a flow");
3493         dev_priv = mlx5_dev_to_eswitch_info(dev);
3494         if (!dev_priv)
3495                 return rte_flow_error_set(error, rte_errno,
3496                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3497                                           NULL,
3498                                           "failed to obtain E-Switch info");
3499         port_id = action->conf;
3500         port = port_id->original ? dev->data->port_id : port_id->id;
3501         act_priv = mlx5_port_to_eswitch_info(port, false);
3502         if (!act_priv)
3503                 return rte_flow_error_set
3504                                 (error, rte_errno,
3505                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3506                                  "failed to obtain E-Switch port id for port");
3507         if (act_priv->domain_id != dev_priv->domain_id)
3508                 return rte_flow_error_set
3509                                 (error, EINVAL,
3510                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3511                                  "port does not belong to"
3512                                  " E-Switch being configured");
3513         return 0;
3514 }
3515
3516 /**
3517  * Get the maximum number of modify header actions.
3518  *
3519  * @param dev
3520  *   Pointer to rte_eth_dev structure.
3521  * @param flags
3522  *   Flags bits to check if root level.
3523  *
3524  * @return
3525  *   Max number of modify header actions device can support.
3526  */
3527 static unsigned int
3528 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3529 {
3530         /*
3531          * There's no way to directly query the max cap. Although it has to be
3532          * acquried by iterative trial, it is a safe assumption that more
3533          * actions are supported by FW if extensive metadata register is
3534          * supported. (Only in the root table)
3535          */
3536         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3537                 return MLX5_MAX_MODIFY_NUM;
3538         else
3539                 return mlx5_flow_ext_mreg_supported(dev) ?
3540                                         MLX5_ROOT_TBL_MODIFY_NUM :
3541                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3542 }
3543
3544 /**
3545  * Validate the meter action.
3546  *
3547  * @param[in] dev
3548  *   Pointer to rte_eth_dev structure.
3549  * @param[in] action_flags
3550  *   Bit-fields that holds the actions detected until now.
3551  * @param[in] action
3552  *   Pointer to the meter action.
3553  * @param[in] attr
3554  *   Attributes of flow that includes this action.
3555  * @param[out] error
3556  *   Pointer to error structure.
3557  *
3558  * @return
3559  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3560  */
3561 static int
3562 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3563                                 uint64_t action_flags,
3564                                 const struct rte_flow_action *action,
3565                                 const struct rte_flow_attr *attr,
3566                                 struct rte_flow_error *error)
3567 {
3568         struct mlx5_priv *priv = dev->data->dev_private;
3569         const struct rte_flow_action_meter *am = action->conf;
3570         struct mlx5_flow_meter *fm;
3571
3572         if (!am)
3573                 return rte_flow_error_set(error, EINVAL,
3574                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3575                                           "meter action conf is NULL");
3576
3577         if (action_flags & MLX5_FLOW_ACTION_METER)
3578                 return rte_flow_error_set(error, ENOTSUP,
3579                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3580                                           "meter chaining not support");
3581         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3582                 return rte_flow_error_set(error, ENOTSUP,
3583                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3584                                           "meter with jump not support");
3585         if (!priv->mtr_en)
3586                 return rte_flow_error_set(error, ENOTSUP,
3587                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3588                                           NULL,
3589                                           "meter action not supported");
3590         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3591         if (!fm)
3592                 return rte_flow_error_set(error, EINVAL,
3593                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3594                                           "Meter not found");
3595         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3596               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3597               (!fm->attr.egress && !attr->egress && attr->ingress))))
3598                 return rte_flow_error_set(error, EINVAL,
3599                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3600                                           "Flow attributes are either invalid "
3601                                           "or have a conflict with current "
3602                                           "meter attributes");
3603         return 0;
3604 }
3605
3606 /**
3607  * Validate the modify-header IPv4 DSCP actions.
3608  *
3609  * @param[in] action_flags
3610  *   Holds the actions detected until now.
3611  * @param[in] action
3612  *   Pointer to the modify action.
3613  * @param[in] item_flags
3614  *   Holds the items detected.
3615  * @param[out] error
3616  *   Pointer to error structure.
3617  *
3618  * @return
3619  *   0 on success, a negative errno value otherwise and rte_errno is set.
3620  */
3621 static int
3622 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3623                                          const struct rte_flow_action *action,
3624                                          const uint64_t item_flags,
3625                                          struct rte_flow_error *error)
3626 {
3627         int ret = 0;
3628
3629         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3630         if (!ret) {
3631                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3632                         return rte_flow_error_set(error, EINVAL,
3633                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3634                                                   NULL,
3635                                                   "no ipv4 item in pattern");
3636         }
3637         return ret;
3638 }
3639
3640 /**
3641  * Validate the modify-header IPv6 DSCP actions.
3642  *
3643  * @param[in] action_flags
3644  *   Holds the actions detected until now.
3645  * @param[in] action
3646  *   Pointer to the modify action.
3647  * @param[in] item_flags
3648  *   Holds the items detected.
3649  * @param[out] error
3650  *   Pointer to error structure.
3651  *
3652  * @return
3653  *   0 on success, a negative errno value otherwise and rte_errno is set.
3654  */
3655 static int
3656 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3657                                          const struct rte_flow_action *action,
3658                                          const uint64_t item_flags,
3659                                          struct rte_flow_error *error)
3660 {
3661         int ret = 0;
3662
3663         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3664         if (!ret) {
3665                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3666                         return rte_flow_error_set(error, EINVAL,
3667                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3668                                                   NULL,
3669                                                   "no ipv6 item in pattern");
3670         }
3671         return ret;
3672 }
3673
3674 /**
3675  * Find existing modify-header resource or create and register a new one.
3676  *
3677  * @param dev[in, out]
3678  *   Pointer to rte_eth_dev structure.
3679  * @param[in, out] resource
3680  *   Pointer to modify-header resource.
3681  * @parm[in, out] dev_flow
3682  *   Pointer to the dev_flow.
3683  * @param[out] error
3684  *   pointer to error structure.
3685  *
3686  * @return
3687  *   0 on success otherwise -errno and errno is set.
3688  */
3689 static int
3690 flow_dv_modify_hdr_resource_register
3691                         (struct rte_eth_dev *dev,
3692                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3693                          struct mlx5_flow *dev_flow,
3694                          struct rte_flow_error *error)
3695 {
3696         struct mlx5_priv *priv = dev->data->dev_private;
3697         struct mlx5_ibv_shared *sh = priv->sh;
3698         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3699         struct mlx5dv_dr_domain *ns;
3700         uint32_t actions_len;
3701
3702         resource->flags =
3703                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3704         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3705                                     resource->flags))
3706                 return rte_flow_error_set(error, EOVERFLOW,
3707                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3708                                           "too many modify header items");
3709         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3710                 ns = sh->fdb_domain;
3711         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3712                 ns = sh->tx_domain;
3713         else
3714                 ns = sh->rx_domain;
3715         /* Lookup a matching resource from cache. */
3716         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3717         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3718                 if (resource->ft_type == cache_resource->ft_type &&
3719                     resource->actions_num == cache_resource->actions_num &&
3720                     resource->flags == cache_resource->flags &&
3721                     !memcmp((const void *)resource->actions,
3722                             (const void *)cache_resource->actions,
3723                             actions_len)) {
3724                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3725                                 (void *)cache_resource,
3726                                 rte_atomic32_read(&cache_resource->refcnt));
3727                         rte_atomic32_inc(&cache_resource->refcnt);
3728                         dev_flow->dv.modify_hdr = cache_resource;
3729                         return 0;
3730                 }
3731         }
3732         /* Register new modify-header resource. */
3733         cache_resource = rte_calloc(__func__, 1,
3734                                     sizeof(*cache_resource) + actions_len, 0);
3735         if (!cache_resource)
3736                 return rte_flow_error_set(error, ENOMEM,
3737                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3738                                           "cannot allocate resource memory");
3739         *cache_resource = *resource;
3740         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3741         cache_resource->verbs_action =
3742                 mlx5_glue->dv_create_flow_action_modify_header
3743                                         (sh->ctx, cache_resource->ft_type, ns,
3744                                          cache_resource->flags, actions_len,
3745                                          (uint64_t *)cache_resource->actions);
3746         if (!cache_resource->verbs_action) {
3747                 rte_free(cache_resource);
3748                 return rte_flow_error_set(error, ENOMEM,
3749                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3750                                           NULL, "cannot create action");
3751         }
3752         rte_atomic32_init(&cache_resource->refcnt);
3753         rte_atomic32_inc(&cache_resource->refcnt);
3754         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3755         dev_flow->dv.modify_hdr = cache_resource;
3756         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3757                 (void *)cache_resource,
3758                 rte_atomic32_read(&cache_resource->refcnt));
3759         return 0;
3760 }
3761
3762 #define MLX5_CNT_CONTAINER_RESIZE 64
3763
3764 /**
3765  * Get or create a flow counter.
3766  *
3767  * @param[in] dev
3768  *   Pointer to the Ethernet device structure.
3769  * @param[in] shared
3770  *   Indicate if this counter is shared with other flows.
3771  * @param[in] id
3772  *   Counter identifier.
3773  *
3774  * @return
3775  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3776  */
3777 static struct mlx5_flow_counter *
3778 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3779                                uint32_t id)
3780 {
3781         struct mlx5_priv *priv = dev->data->dev_private;
3782         struct mlx5_flow_counter *cnt = NULL;
3783         struct mlx5_devx_obj *dcs = NULL;
3784
3785         if (!priv->config.devx) {
3786                 rte_errno = ENOTSUP;
3787                 return NULL;
3788         }
3789         if (shared) {
3790                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3791                         if (cnt->shared && cnt->id == id) {
3792                                 cnt->ref_cnt++;
3793                                 return cnt;
3794                         }
3795                 }
3796         }
3797         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3798         if (!dcs)
3799                 return NULL;
3800         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3801         if (!cnt) {
3802                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3803                 rte_errno = ENOMEM;
3804                 return NULL;
3805         }
3806         struct mlx5_flow_counter tmpl = {
3807                 .shared = shared,
3808                 .ref_cnt = 1,
3809                 .id = id,
3810                 .dcs = dcs,
3811         };
3812         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3813         if (!tmpl.action) {
3814                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3815                 rte_errno = errno;
3816                 rte_free(cnt);
3817                 return NULL;
3818         }
3819         *cnt = tmpl;
3820         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3821         return cnt;
3822 }
3823
3824 /**
3825  * Release a flow counter.
3826  *
3827  * @param[in] dev
3828  *   Pointer to the Ethernet device structure.
3829  * @param[in] counter
3830  *   Pointer to the counter handler.
3831  */
3832 static void
3833 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3834                                  struct mlx5_flow_counter *counter)
3835 {
3836         struct mlx5_priv *priv = dev->data->dev_private;
3837
3838         if (!counter)
3839                 return;
3840         if (--counter->ref_cnt == 0) {
3841                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3842                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3843                 rte_free(counter);
3844         }
3845 }
3846
3847 /**
3848  * Query a devx flow counter.
3849  *
3850  * @param[in] dev
3851  *   Pointer to the Ethernet device structure.
3852  * @param[in] cnt
3853  *   Pointer to the flow counter.
3854  * @param[out] pkts
3855  *   The statistics value of packets.
3856  * @param[out] bytes
3857  *   The statistics value of bytes.
3858  *
3859  * @return
3860  *   0 on success, otherwise a negative errno value and rte_errno is set.
3861  */
3862 static inline int
3863 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3864                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3865                      uint64_t *bytes)
3866 {
3867         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3868                                                 0, NULL, NULL, 0);
3869 }
3870
3871 /**
3872  * Get a pool by a counter.
3873  *
3874  * @param[in] cnt
3875  *   Pointer to the counter.
3876  *
3877  * @return
3878  *   The counter pool.
3879  */
3880 static struct mlx5_flow_counter_pool *
3881 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3882 {
3883         if (!cnt->batch) {
3884                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3885                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3886         }
3887         return cnt->pool;
3888 }
3889
3890 /**
3891  * Get a pool by devx counter ID.
3892  *
3893  * @param[in] cont
3894  *   Pointer to the counter container.
3895  * @param[in] id
3896  *   The counter devx ID.
3897  *
3898  * @return
3899  *   The counter pool pointer if exists, NULL otherwise,
3900  */
3901 static struct mlx5_flow_counter_pool *
3902 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3903 {
3904         struct mlx5_flow_counter_pool *pool;
3905
3906         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3907                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3908                                 MLX5_COUNTERS_PER_POOL;
3909
3910                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3911                         return pool;
3912         };
3913         return NULL;
3914 }
3915
3916 /**
3917  * Allocate a new memory for the counter values wrapped by all the needed
3918  * management.
3919  *
3920  * @param[in] dev
3921  *   Pointer to the Ethernet device structure.
3922  * @param[in] raws_n
3923  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3924  *
3925  * @return
3926  *   The new memory management pointer on success, otherwise NULL and rte_errno
3927  *   is set.
3928  */
3929 static struct mlx5_counter_stats_mem_mng *
3930 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3931 {
3932         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3933                                         (dev->data->dev_private))->sh;
3934         struct mlx5_devx_mkey_attr mkey_attr;
3935         struct mlx5_counter_stats_mem_mng *mem_mng;
3936         volatile struct flow_counter_stats *raw_data;
3937         int size = (sizeof(struct flow_counter_stats) *
3938                         MLX5_COUNTERS_PER_POOL +
3939                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3940                         sizeof(struct mlx5_counter_stats_mem_mng);
3941         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3942         int i;
3943
3944         if (!mem) {
3945                 rte_errno = ENOMEM;
3946                 return NULL;
3947         }
3948         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3949         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3950         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3951                                                  IBV_ACCESS_LOCAL_WRITE);
3952         if (!mem_mng->umem) {
3953                 rte_errno = errno;
3954                 rte_free(mem);
3955                 return NULL;
3956         }
3957         mkey_attr.addr = (uintptr_t)mem;
3958         mkey_attr.size = size;
3959         mkey_attr.umem_id = mem_mng->umem->umem_id;
3960         mkey_attr.pd = sh->pdn;
3961         mkey_attr.log_entity_size = 0;
3962         mkey_attr.pg_access = 0;
3963         mkey_attr.klm_array = NULL;
3964         mkey_attr.klm_num = 0;
3965         mkey_attr.relaxed_ordering = 1;
3966         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3967         if (!mem_mng->dm) {
3968                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3969                 rte_errno = errno;
3970                 rte_free(mem);
3971                 return NULL;
3972         }
3973         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3974         raw_data = (volatile struct flow_counter_stats *)mem;
3975         for (i = 0; i < raws_n; ++i) {
3976                 mem_mng->raws[i].mem_mng = mem_mng;
3977                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3978         }
3979         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3980         return mem_mng;
3981 }
3982
3983 /**
3984  * Resize a counter container.
3985  *
3986  * @param[in] dev
3987  *   Pointer to the Ethernet device structure.
3988  * @param[in] batch
3989  *   Whether the pool is for counter that was allocated by batch command.
3990  *
3991  * @return
3992  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3993  */
3994 static struct mlx5_pools_container *
3995 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3996 {
3997         struct mlx5_priv *priv = dev->data->dev_private;
3998         struct mlx5_pools_container *cont =
3999                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
4000         struct mlx5_pools_container *new_cont =
4001                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
4002         struct mlx5_counter_stats_mem_mng *mem_mng;
4003         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
4004         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
4005         int i;
4006
4007         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
4008                 /* The last resize still hasn't detected by the host thread. */
4009                 rte_errno = EAGAIN;
4010                 return NULL;
4011         }
4012         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
4013         if (!new_cont->pools) {
4014                 rte_errno = ENOMEM;
4015                 return NULL;
4016         }
4017         if (cont->n)
4018                 memcpy(new_cont->pools, cont->pools, cont->n *
4019                        sizeof(struct mlx5_flow_counter_pool *));
4020         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
4021                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
4022         if (!mem_mng) {
4023                 rte_free(new_cont->pools);
4024                 return NULL;
4025         }
4026         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
4027                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
4028                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
4029                                  i, next);
4030         new_cont->n = resize;
4031         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
4032         TAILQ_INIT(&new_cont->pool_list);
4033         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
4034         new_cont->init_mem_mng = mem_mng;
4035         rte_cio_wmb();
4036          /* Flip the master container. */
4037         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
4038         return new_cont;
4039 }
4040
4041 /**
4042  * Query a devx flow counter.
4043  *
4044  * @param[in] dev
4045  *   Pointer to the Ethernet device structure.
4046  * @param[in] cnt
4047  *   Pointer to the flow counter.
4048  * @param[out] pkts
4049  *   The statistics value of packets.
4050  * @param[out] bytes
4051  *   The statistics value of bytes.
4052  *
4053  * @return
4054  *   0 on success, otherwise a negative errno value and rte_errno is set.
4055  */
4056 static inline int
4057 _flow_dv_query_count(struct rte_eth_dev *dev,
4058                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
4059                      uint64_t *bytes)
4060 {
4061         struct mlx5_priv *priv = dev->data->dev_private;
4062         struct mlx5_flow_counter_pool *pool =
4063                         flow_dv_counter_pool_get(cnt);
4064         int offset = cnt - &pool->counters_raw[0];
4065
4066         if (priv->counter_fallback)
4067                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4068
4069         rte_spinlock_lock(&pool->sl);
4070         /*
4071          * The single counters allocation may allocate smaller ID than the
4072          * current allocated in parallel to the host reading.
4073          * In this case the new counter values must be reported as 0.
4074          */
4075         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4076                 *pkts = 0;
4077                 *bytes = 0;
4078         } else {
4079                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4080                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4081         }
4082         rte_spinlock_unlock(&pool->sl);
4083         return 0;
4084 }
4085
4086 /**
4087  * Create and initialize a new counter pool.
4088  *
4089  * @param[in] dev
4090  *   Pointer to the Ethernet device structure.
4091  * @param[out] dcs
4092  *   The devX counter handle.
4093  * @param[in] batch
4094  *   Whether the pool is for counter that was allocated by batch command.
4095  *
4096  * @return
4097  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4098  */
4099 static struct mlx5_flow_counter_pool *
4100 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4101                     uint32_t batch)
4102 {
4103         struct mlx5_priv *priv = dev->data->dev_private;
4104         struct mlx5_flow_counter_pool *pool;
4105         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4106                                                                0);
4107         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4108         uint32_t size;
4109
4110         if (cont->n == n_valid) {
4111                 cont = flow_dv_container_resize(dev, batch);
4112                 if (!cont)
4113                         return NULL;
4114         }
4115         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4116                         sizeof(struct mlx5_flow_counter);
4117         pool = rte_calloc(__func__, 1, size, 0);
4118         if (!pool) {
4119                 rte_errno = ENOMEM;
4120                 return NULL;
4121         }
4122         pool->min_dcs = dcs;
4123         pool->raw = cont->init_mem_mng->raws + n_valid %
4124                                                      MLX5_CNT_CONTAINER_RESIZE;
4125         pool->raw_hw = NULL;
4126         rte_spinlock_init(&pool->sl);
4127         /*
4128          * The generation of the new allocated counters in this pool is 0, 2 in
4129          * the pool generation makes all the counters valid for allocation.
4130          */
4131         rte_atomic64_set(&pool->query_gen, 0x2);
4132         TAILQ_INIT(&pool->counters);
4133         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4134         cont->pools[n_valid] = pool;
4135         /* Pool initialization must be updated before host thread access. */
4136         rte_cio_wmb();
4137         rte_atomic16_add(&cont->n_valid, 1);
4138         return pool;
4139 }
4140
4141 /**
4142  * Prepare a new counter and/or a new counter pool.
4143  *
4144  * @param[in] dev
4145  *   Pointer to the Ethernet device structure.
4146  * @param[out] cnt_free
4147  *   Where to put the pointer of a new counter.
4148  * @param[in] batch
4149  *   Whether the pool is for counter that was allocated by batch command.
4150  *
4151  * @return
4152  *   The free counter pool pointer and @p cnt_free is set on success,
4153  *   NULL otherwise and rte_errno is set.
4154  */
4155 static struct mlx5_flow_counter_pool *
4156 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4157                              struct mlx5_flow_counter **cnt_free,
4158                              uint32_t batch)
4159 {
4160         struct mlx5_priv *priv = dev->data->dev_private;
4161         struct mlx5_flow_counter_pool *pool;
4162         struct mlx5_devx_obj *dcs = NULL;
4163         struct mlx5_flow_counter *cnt;
4164         uint32_t i;
4165
4166         if (!batch) {
4167                 /* bulk_bitmap must be 0 for single counter allocation. */
4168                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4169                 if (!dcs)
4170                         return NULL;
4171                 pool = flow_dv_find_pool_by_id
4172                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4173                 if (!pool) {
4174                         pool = flow_dv_pool_create(dev, dcs, batch);
4175                         if (!pool) {
4176                                 mlx5_devx_cmd_destroy(dcs);
4177                                 return NULL;
4178                         }
4179                 } else if (dcs->id < pool->min_dcs->id) {
4180                         rte_atomic64_set(&pool->a64_dcs,
4181                                          (int64_t)(uintptr_t)dcs);
4182                 }
4183                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4184                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4185                 cnt->dcs = dcs;
4186                 *cnt_free = cnt;
4187                 return pool;
4188         }
4189         /* bulk_bitmap is in 128 counters units. */
4190         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4191                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4192         if (!dcs) {
4193                 rte_errno = ENODATA;
4194                 return NULL;
4195         }
4196         pool = flow_dv_pool_create(dev, dcs, batch);
4197         if (!pool) {
4198                 mlx5_devx_cmd_destroy(dcs);
4199                 return NULL;
4200         }
4201         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4202                 cnt = &pool->counters_raw[i];
4203                 cnt->pool = pool;
4204                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4205         }
4206         *cnt_free = &pool->counters_raw[0];
4207         return pool;
4208 }
4209
4210 /**
4211  * Search for existed shared counter.
4212  *
4213  * @param[in] cont
4214  *   Pointer to the relevant counter pool container.
4215  * @param[in] id
4216  *   The shared counter ID to search.
4217  *
4218  * @return
4219  *   NULL if not existed, otherwise pointer to the shared counter.
4220  */
4221 static struct mlx5_flow_counter *
4222 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4223                               uint32_t id)
4224 {
4225         static struct mlx5_flow_counter *cnt;
4226         struct mlx5_flow_counter_pool *pool;
4227         int i;
4228
4229         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4230                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4231                         cnt = &pool->counters_raw[i];
4232                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4233                                 return cnt;
4234                 }
4235         }
4236         return NULL;
4237 }
4238
4239 /**
4240  * Allocate a flow counter.
4241  *
4242  * @param[in] dev
4243  *   Pointer to the Ethernet device structure.
4244  * @param[in] shared
4245  *   Indicate if this counter is shared with other flows.
4246  * @param[in] id
4247  *   Counter identifier.
4248  * @param[in] group
4249  *   Counter flow group.
4250  *
4251  * @return
4252  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4253  */
4254 static struct mlx5_flow_counter *
4255 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4256                       uint16_t group)
4257 {
4258         struct mlx5_priv *priv = dev->data->dev_private;
4259         struct mlx5_flow_counter_pool *pool = NULL;
4260         struct mlx5_flow_counter *cnt_free = NULL;
4261         /*
4262          * Currently group 0 flow counter cannot be assigned to a flow if it is
4263          * not the first one in the batch counter allocation, so it is better
4264          * to allocate counters one by one for these flows in a separate
4265          * container.
4266          * A counter can be shared between different groups so need to take
4267          * shared counters from the single container.
4268          */
4269         uint32_t batch = (group && !shared) ? 1 : 0;
4270         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4271                                                                0);
4272
4273         if (priv->counter_fallback)
4274                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4275         if (!priv->config.devx) {
4276                 rte_errno = ENOTSUP;
4277                 return NULL;
4278         }
4279         if (shared) {
4280                 cnt_free = flow_dv_counter_shared_search(cont, id);
4281                 if (cnt_free) {
4282                         if (cnt_free->ref_cnt + 1 == 0) {
4283                                 rte_errno = E2BIG;
4284                                 return NULL;
4285                         }
4286                         cnt_free->ref_cnt++;
4287                         return cnt_free;
4288                 }
4289         }
4290         /* Pools which has a free counters are in the start. */
4291         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4292                 /*
4293                  * The free counter reset values must be updated between the
4294                  * counter release to the counter allocation, so, at least one
4295                  * query must be done in this time. ensure it by saving the
4296                  * query generation in the release time.
4297                  * The free list is sorted according to the generation - so if
4298                  * the first one is not updated, all the others are not
4299                  * updated too.
4300                  */
4301                 cnt_free = TAILQ_FIRST(&pool->counters);
4302                 if (cnt_free && cnt_free->query_gen + 1 <
4303                     rte_atomic64_read(&pool->query_gen))
4304                         break;
4305                 cnt_free = NULL;
4306         }
4307         if (!cnt_free) {
4308                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4309                 if (!pool)
4310                         return NULL;
4311         }
4312         cnt_free->batch = batch;
4313         /* Create a DV counter action only in the first time usage. */
4314         if (!cnt_free->action) {
4315                 uint16_t offset;
4316                 struct mlx5_devx_obj *dcs;
4317
4318                 if (batch) {
4319                         offset = cnt_free - &pool->counters_raw[0];
4320                         dcs = pool->min_dcs;
4321                 } else {
4322                         offset = 0;
4323                         dcs = cnt_free->dcs;
4324                 }
4325                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4326                                         (dcs->obj, offset);
4327                 if (!cnt_free->action) {
4328                         rte_errno = errno;
4329                         return NULL;
4330                 }
4331         }
4332         /* Update the counter reset values. */
4333         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4334                                  &cnt_free->bytes))
4335                 return NULL;
4336         cnt_free->shared = shared;
4337         cnt_free->ref_cnt = 1;
4338         cnt_free->id = id;
4339         if (!priv->sh->cmng.query_thread_on)
4340                 /* Start the asynchronous batch query by the host thread. */
4341                 mlx5_set_query_alarm(priv->sh);
4342         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4343         if (TAILQ_EMPTY(&pool->counters)) {
4344                 /* Move the pool to the end of the container pool list. */
4345                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4346                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4347         }
4348         return cnt_free;
4349 }
4350
4351 /**
4352  * Release a flow counter.
4353  *
4354  * @param[in] dev
4355  *   Pointer to the Ethernet device structure.
4356  * @param[in] counter
4357  *   Pointer to the counter handler.
4358  */
4359 static void
4360 flow_dv_counter_release(struct rte_eth_dev *dev,
4361                         struct mlx5_flow_counter *counter)
4362 {
4363         struct mlx5_priv *priv = dev->data->dev_private;
4364
4365         if (!counter)
4366                 return;
4367         if (priv->counter_fallback) {
4368                 flow_dv_counter_release_fallback(dev, counter);
4369                 return;
4370         }
4371         if (--counter->ref_cnt == 0) {
4372                 struct mlx5_flow_counter_pool *pool =
4373                                 flow_dv_counter_pool_get(counter);
4374
4375                 /* Put the counter in the end - the last updated one. */
4376                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4377                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4378         }
4379 }
4380
4381 /**
4382  * Verify the @p attributes will be correctly understood by the NIC and store
4383  * them in the @p flow if everything is correct.
4384  *
4385  * @param[in] dev
4386  *   Pointer to dev struct.
4387  * @param[in] attributes
4388  *   Pointer to flow attributes
4389  * @param[in] external
4390  *   This flow rule is created by request external to PMD.
4391  * @param[out] error
4392  *   Pointer to error structure.
4393  *
4394  * @return
4395  *   0 on success, a negative errno value otherwise and rte_errno is set.
4396  */
4397 static int
4398 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4399                             const struct rte_flow_attr *attributes,
4400                             bool external __rte_unused,
4401                             struct rte_flow_error *error)
4402 {
4403         struct mlx5_priv *priv = dev->data->dev_private;
4404         uint32_t priority_max = priv->config.flow_prio - 1;
4405
4406 #ifndef HAVE_MLX5DV_DR
4407         if (attributes->group)
4408                 return rte_flow_error_set(error, ENOTSUP,
4409                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4410                                           NULL,
4411                                           "groups are not supported");
4412 #else
4413         uint32_t table;
4414         int ret;
4415
4416         ret = mlx5_flow_group_to_table(attributes, external,
4417                                        attributes->group, !!priv->fdb_def_rule,
4418                                        &table, error);
4419         if (ret)
4420                 return ret;
4421 #endif
4422         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4423             attributes->priority >= priority_max)
4424                 return rte_flow_error_set(error, ENOTSUP,
4425                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4426                                           NULL,
4427                                           "priority out of range");
4428         if (attributes->transfer) {
4429                 if (!priv->config.dv_esw_en)
4430                         return rte_flow_error_set
4431                                 (error, ENOTSUP,
4432                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4433                                  "E-Switch dr is not supported");
4434                 if (!(priv->representor || priv->master))
4435                         return rte_flow_error_set
4436                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4437                                  NULL, "E-Switch configuration can only be"
4438                                  " done by a master or a representor device");
4439                 if (attributes->egress)
4440                         return rte_flow_error_set
4441                                 (error, ENOTSUP,
4442                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4443                                  "egress is not supported");
4444         }
4445         if (!(attributes->egress ^ attributes->ingress))
4446                 return rte_flow_error_set(error, ENOTSUP,
4447                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4448                                           "must specify exactly one of "
4449                                           "ingress or egress");
4450         return 0;
4451 }
4452
4453 /**
4454  * Internal validation function. For validating both actions and items.
4455  *
4456  * @param[in] dev
4457  *   Pointer to the rte_eth_dev structure.
4458  * @param[in] attr
4459  *   Pointer to the flow attributes.
4460  * @param[in] items
4461  *   Pointer to the list of items.
4462  * @param[in] actions
4463  *   Pointer to the list of actions.
4464  * @param[in] external
4465  *   This flow rule is created by request external to PMD.
4466  * @param[out] error
4467  *   Pointer to the error structure.
4468  *
4469  * @return
4470  *   0 on success, a negative errno value otherwise and rte_errno is set.
4471  */
4472 static int
4473 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4474                  const struct rte_flow_item items[],
4475                  const struct rte_flow_action actions[],
4476                  bool external, struct rte_flow_error *error)
4477 {
4478         int ret;
4479         uint64_t action_flags = 0;
4480         uint64_t item_flags = 0;
4481         uint64_t last_item = 0;
4482         uint8_t next_protocol = 0xff;
4483         uint16_t ether_type = 0;
4484         int actions_n = 0;
4485         uint8_t item_ipv6_proto = 0;
4486         const struct rte_flow_item *gre_item = NULL;
4487         const struct rte_flow_action_raw_decap *decap;
4488         const struct rte_flow_action_raw_encap *encap;
4489         const struct rte_flow_action_rss *rss;
4490         const struct rte_flow_item_tcp nic_tcp_mask = {
4491                 .hdr = {
4492                         .tcp_flags = 0xFF,
4493                         .src_port = RTE_BE16(UINT16_MAX),
4494                         .dst_port = RTE_BE16(UINT16_MAX),
4495                 }
4496         };
4497         const struct rte_flow_item_ipv4 nic_ipv4_mask = {
4498                 .hdr = {
4499                         .src_addr = RTE_BE32(0xffffffff),
4500                         .dst_addr = RTE_BE32(0xffffffff),
4501                         .type_of_service = 0xff,
4502                         .next_proto_id = 0xff,
4503                         .time_to_live = 0xff,
4504                 },
4505         };
4506         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
4507                 .hdr = {
4508                         .src_addr =
4509                         "\xff\xff\xff\xff\xff\xff\xff\xff"
4510                         "\xff\xff\xff\xff\xff\xff\xff\xff",
4511                         .dst_addr =
4512                         "\xff\xff\xff\xff\xff\xff\xff\xff"
4513                         "\xff\xff\xff\xff\xff\xff\xff\xff",
4514                         .vtc_flow = RTE_BE32(0xffffffff),
4515                         .proto = 0xff,
4516                         .hop_limits = 0xff,
4517                 },
4518         };
4519         struct mlx5_priv *priv = dev->data->dev_private;
4520         struct mlx5_dev_config *dev_conf = &priv->config;
4521         uint16_t queue_index = 0xFFFF;
4522
4523         if (items == NULL)
4524                 return -1;
4525         ret = flow_dv_validate_attributes(dev, attr, external, error);
4526         if (ret < 0)
4527                 return ret;
4528         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4529                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4530                 int type = items->type;
4531
4532                 switch (type) {
4533                 case RTE_FLOW_ITEM_TYPE_VOID:
4534                         break;
4535                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4536                         ret = flow_dv_validate_item_port_id
4537                                         (dev, items, attr, item_flags, error);
4538                         if (ret < 0)
4539                                 return ret;
4540                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4541                         break;
4542                 case RTE_FLOW_ITEM_TYPE_ETH:
4543                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4544                                                           error);
4545                         if (ret < 0)
4546                                 return ret;
4547                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4548                                              MLX5_FLOW_LAYER_OUTER_L2;
4549                         if (items->mask != NULL && items->spec != NULL) {
4550                                 ether_type =
4551                                         ((const struct rte_flow_item_eth *)
4552                                          items->spec)->type;
4553                                 ether_type &=
4554                                         ((const struct rte_flow_item_eth *)
4555                                          items->mask)->type;
4556                                 ether_type = rte_be_to_cpu_16(ether_type);
4557                         } else {
4558                                 ether_type = 0;
4559                         }
4560                         break;
4561                 case RTE_FLOW_ITEM_TYPE_VLAN:
4562                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4563                                                            dev, error);
4564                         if (ret < 0)
4565                                 return ret;
4566                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4567                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4568                         if (items->mask != NULL && items->spec != NULL) {
4569                                 ether_type =
4570                                         ((const struct rte_flow_item_vlan *)
4571                                          items->spec)->inner_type;
4572                                 ether_type &=
4573                                         ((const struct rte_flow_item_vlan *)
4574                                          items->mask)->inner_type;
4575                                 ether_type = rte_be_to_cpu_16(ether_type);
4576                         } else {
4577                                 ether_type = 0;
4578                         }
4579                         break;
4580                 case RTE_FLOW_ITEM_TYPE_IPV4:
4581                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4582                                                   &item_flags, &tunnel);
4583                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4584                                                            last_item,
4585                                                            ether_type,
4586                                                            &nic_ipv4_mask,
4587                                                            error);
4588                         if (ret < 0)
4589                                 return ret;
4590                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4591                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4592                         if (items->mask != NULL &&
4593                             ((const struct rte_flow_item_ipv4 *)
4594                              items->mask)->hdr.next_proto_id) {
4595                                 next_protocol =
4596                                         ((const struct rte_flow_item_ipv4 *)
4597                                          (items->spec))->hdr.next_proto_id;
4598                                 next_protocol &=
4599                                         ((const struct rte_flow_item_ipv4 *)
4600                                          (items->mask))->hdr.next_proto_id;
4601                         } else {
4602                                 /* Reset for inner layer. */
4603                                 next_protocol = 0xff;
4604                         }
4605                         break;
4606                 case RTE_FLOW_ITEM_TYPE_IPV6:
4607                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4608                                                   &item_flags, &tunnel);
4609                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4610                                                            last_item,
4611                                                            ether_type,
4612                                                            &nic_ipv6_mask,
4613                                                            error);
4614                         if (ret < 0)
4615                                 return ret;
4616                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4617                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4618                         if (items->mask != NULL &&
4619                             ((const struct rte_flow_item_ipv6 *)
4620                              items->mask)->hdr.proto) {
4621                                 item_ipv6_proto =
4622                                         ((const struct rte_flow_item_ipv6 *)
4623                                          items->spec)->hdr.proto;
4624                                 next_protocol =
4625                                         ((const struct rte_flow_item_ipv6 *)
4626                                          items->spec)->hdr.proto;
4627                                 next_protocol &=
4628                                         ((const struct rte_flow_item_ipv6 *)
4629                                          items->mask)->hdr.proto;
4630                         } else {
4631                                 /* Reset for inner layer. */
4632                                 next_protocol = 0xff;
4633                         }
4634                         break;
4635                 case RTE_FLOW_ITEM_TYPE_TCP:
4636                         ret = mlx5_flow_validate_item_tcp
4637                                                 (items, item_flags,
4638                                                  next_protocol,
4639                                                  &nic_tcp_mask,
4640                                                  error);
4641                         if (ret < 0)
4642                                 return ret;
4643                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4644                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4645                         break;
4646                 case RTE_FLOW_ITEM_TYPE_UDP:
4647                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4648                                                           next_protocol,
4649                                                           error);
4650                         if (ret < 0)
4651                                 return ret;
4652                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4653                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4654                         break;
4655                 case RTE_FLOW_ITEM_TYPE_GRE:
4656                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4657                                                           next_protocol, error);
4658                         if (ret < 0)
4659                                 return ret;
4660                         gre_item = items;
4661                         last_item = MLX5_FLOW_LAYER_GRE;
4662                         break;
4663                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4664                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4665                                                             next_protocol,
4666                                                             error);
4667                         if (ret < 0)
4668                                 return ret;
4669                         last_item = MLX5_FLOW_LAYER_NVGRE;
4670                         break;
4671                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4672                         ret = mlx5_flow_validate_item_gre_key
4673                                 (items, item_flags, gre_item, error);
4674                         if (ret < 0)
4675                                 return ret;
4676                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4677                         break;
4678                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4679                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4680                                                             error);
4681                         if (ret < 0)
4682                                 return ret;
4683                         last_item = MLX5_FLOW_LAYER_VXLAN;
4684                         break;
4685                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4686                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4687                                                                 item_flags, dev,
4688                                                                 error);
4689                         if (ret < 0)
4690                                 return ret;
4691                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4692                         break;
4693                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4694                         ret = mlx5_flow_validate_item_geneve(items,
4695                                                              item_flags, dev,
4696                                                              error);
4697                         if (ret < 0)
4698                                 return ret;
4699                         last_item = MLX5_FLOW_LAYER_GENEVE;
4700                         break;
4701                 case RTE_FLOW_ITEM_TYPE_MPLS:
4702                         ret = mlx5_flow_validate_item_mpls(dev, items,
4703                                                            item_flags,
4704                                                            last_item, error);
4705                         if (ret < 0)
4706                                 return ret;
4707                         last_item = MLX5_FLOW_LAYER_MPLS;
4708                         break;
4709
4710                 case RTE_FLOW_ITEM_TYPE_MARK:
4711                         ret = flow_dv_validate_item_mark(dev, items, attr,
4712                                                          error);
4713                         if (ret < 0)
4714                                 return ret;
4715                         last_item = MLX5_FLOW_ITEM_MARK;
4716                         break;
4717                 case RTE_FLOW_ITEM_TYPE_META:
4718                         ret = flow_dv_validate_item_meta(dev, items, attr,
4719                                                          error);
4720                         if (ret < 0)
4721                                 return ret;
4722                         last_item = MLX5_FLOW_ITEM_METADATA;
4723                         break;
4724                 case RTE_FLOW_ITEM_TYPE_ICMP:
4725                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4726                                                            next_protocol,
4727                                                            error);
4728                         if (ret < 0)
4729                                 return ret;
4730                         last_item = MLX5_FLOW_LAYER_ICMP;
4731                         break;
4732                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4733                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4734                                                             next_protocol,
4735                                                             error);
4736                         if (ret < 0)
4737                                 return ret;
4738                         item_ipv6_proto = IPPROTO_ICMPV6;
4739                         last_item = MLX5_FLOW_LAYER_ICMP6;
4740                         break;
4741                 case RTE_FLOW_ITEM_TYPE_TAG:
4742                         ret = flow_dv_validate_item_tag(dev, items,
4743                                                         attr, error);
4744                         if (ret < 0)
4745                                 return ret;
4746                         last_item = MLX5_FLOW_ITEM_TAG;
4747                         break;
4748                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4749                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4750                         break;
4751                 case RTE_FLOW_ITEM_TYPE_GTP:
4752                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4753                                                         error);
4754                         if (ret < 0)
4755                                 return ret;
4756                         last_item = MLX5_FLOW_LAYER_GTP;
4757                         break;
4758                 default:
4759                         return rte_flow_error_set(error, ENOTSUP,
4760                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4761                                                   NULL, "item not supported");
4762                 }
4763                 item_flags |= last_item;
4764         }
4765         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4766                 int type = actions->type;
4767                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4768                         return rte_flow_error_set(error, ENOTSUP,
4769                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4770                                                   actions, "too many actions");
4771                 switch (type) {
4772                 case RTE_FLOW_ACTION_TYPE_VOID:
4773                         break;
4774                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4775                         ret = flow_dv_validate_action_port_id(dev,
4776                                                               action_flags,
4777                                                               actions,
4778                                                               attr,
4779                                                               error);
4780                         if (ret)
4781                                 return ret;
4782                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4783                         ++actions_n;
4784                         break;
4785                 case RTE_FLOW_ACTION_TYPE_FLAG:
4786                         ret = flow_dv_validate_action_flag(dev, action_flags,
4787                                                            attr, error);
4788                         if (ret < 0)
4789                                 return ret;
4790                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4791                                 /* Count all modify-header actions as one. */
4792                                 if (!(action_flags &
4793                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4794                                         ++actions_n;
4795                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4796                                                 MLX5_FLOW_ACTION_MARK_EXT;
4797                         } else {
4798                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4799                                 ++actions_n;
4800                         }
4801                         break;
4802                 case RTE_FLOW_ACTION_TYPE_MARK:
4803                         ret = flow_dv_validate_action_mark(dev, actions,
4804                                                            action_flags,
4805                                                            attr, error);
4806                         if (ret < 0)
4807                                 return ret;
4808                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4809                                 /* Count all modify-header actions as one. */
4810                                 if (!(action_flags &
4811                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4812                                         ++actions_n;
4813                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4814                                                 MLX5_FLOW_ACTION_MARK_EXT;
4815                         } else {
4816                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4817                                 ++actions_n;
4818                         }
4819                         break;
4820                 case RTE_FLOW_ACTION_TYPE_SET_META:
4821                         ret = flow_dv_validate_action_set_meta(dev, actions,
4822                                                                action_flags,
4823                                                                attr, error);
4824                         if (ret < 0)
4825                                 return ret;
4826                         /* Count all modify-header actions as one action. */
4827                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4828                                 ++actions_n;
4829                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4830                         break;
4831                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4832                         ret = flow_dv_validate_action_set_tag(dev, actions,
4833                                                               action_flags,
4834                                                               attr, error);
4835                         if (ret < 0)
4836                                 return ret;
4837                         /* Count all modify-header actions as one action. */
4838                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4839                                 ++actions_n;
4840                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4841                         break;
4842                 case RTE_FLOW_ACTION_TYPE_DROP:
4843                         ret = mlx5_flow_validate_action_drop(action_flags,
4844                                                              attr, error);
4845                         if (ret < 0)
4846                                 return ret;
4847                         action_flags |= MLX5_FLOW_ACTION_DROP;
4848                         ++actions_n;
4849                         break;
4850                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4851                         ret = mlx5_flow_validate_action_queue(actions,
4852                                                               action_flags, dev,
4853                                                               attr, error);
4854                         if (ret < 0)
4855                                 return ret;
4856                         queue_index = ((const struct rte_flow_action_queue *)
4857                                                         (actions->conf))->index;
4858                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4859                         ++actions_n;
4860                         break;
4861                 case RTE_FLOW_ACTION_TYPE_RSS:
4862                         rss = actions->conf;
4863                         ret = mlx5_flow_validate_action_rss(actions,
4864                                                             action_flags, dev,
4865                                                             attr, item_flags,
4866                                                             error);
4867                         if (ret < 0)
4868                                 return ret;
4869                         if (rss != NULL && rss->queue_num)
4870                                 queue_index = rss->queue[0];
4871                         action_flags |= MLX5_FLOW_ACTION_RSS;
4872                         ++actions_n;
4873                         break;
4874                 case RTE_FLOW_ACTION_TYPE_COUNT:
4875                         ret = flow_dv_validate_action_count(dev, error);
4876                         if (ret < 0)
4877                                 return ret;
4878                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4879                         ++actions_n;
4880                         break;
4881                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4882                         if (flow_dv_validate_action_pop_vlan(dev,
4883                                                              action_flags,
4884                                                              actions,
4885                                                              item_flags, attr,
4886                                                              error))
4887                                 return -rte_errno;
4888                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4889                         ++actions_n;
4890                         break;
4891                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4892                         ret = flow_dv_validate_action_push_vlan(action_flags,
4893                                                                 item_flags,
4894                                                                 actions, attr,
4895                                                                 error);
4896                         if (ret < 0)
4897                                 return ret;
4898                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4899                         ++actions_n;
4900                         break;
4901                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4902                         ret = flow_dv_validate_action_set_vlan_pcp
4903                                                 (action_flags, actions, error);
4904                         if (ret < 0)
4905                                 return ret;
4906                         /* Count PCP with push_vlan command. */
4907                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4908                         break;
4909                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4910                         ret = flow_dv_validate_action_set_vlan_vid
4911                                                 (item_flags, action_flags,
4912                                                  actions, error);
4913                         if (ret < 0)
4914                                 return ret;
4915                         /* Count VID with push_vlan command. */
4916                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4917                         break;
4918                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4919                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4920                         ret = flow_dv_validate_action_l2_encap(action_flags,
4921                                                                actions, error);
4922                         if (ret < 0)
4923                                 return ret;
4924                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
4925                         ++actions_n;
4926                         break;
4927                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4928                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4929                         ret = flow_dv_validate_action_decap(action_flags, attr,
4930                                                             error);
4931                         if (ret < 0)
4932                                 return ret;
4933                         action_flags |= MLX5_FLOW_ACTION_DECAP;
4934                         ++actions_n;
4935                         break;
4936                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4937                         ret = flow_dv_validate_action_raw_encap_decap
4938                                 (NULL, actions->conf, attr, &action_flags,
4939                                  &actions_n, error);
4940                         if (ret < 0)
4941                                 return ret;
4942                         break;
4943                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4944                         decap = actions->conf;
4945                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
4946                                 ;
4947                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4948                                 encap = NULL;
4949                                 actions--;
4950                         } else {
4951                                 encap = actions->conf;
4952                         }
4953                         ret = flow_dv_validate_action_raw_encap_decap
4954                                            (decap ? decap : &empty_decap, encap,
4955                                             attr, &action_flags, &actions_n,
4956                                             error);
4957                         if (ret < 0)
4958                                 return ret;
4959                         break;
4960                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4961                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4962                         ret = flow_dv_validate_action_modify_mac(action_flags,
4963                                                                  actions,
4964                                                                  item_flags,
4965                                                                  error);
4966                         if (ret < 0)
4967                                 return ret;
4968                         /* Count all modify-header actions as one action. */
4969                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4970                                 ++actions_n;
4971                         action_flags |= actions->type ==
4972                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4973                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4974                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4975                         break;
4976
4977                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4978                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4979                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4980                                                                   actions,
4981                                                                   item_flags,
4982                                                                   error);
4983                         if (ret < 0)
4984                                 return ret;
4985                         /* Count all modify-header actions as one action. */
4986                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4987                                 ++actions_n;
4988                         action_flags |= actions->type ==
4989                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4990                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4991                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4992                         break;
4993                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4994                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4995                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4996                                                                   actions,
4997                                                                   item_flags,
4998                                                                   error);
4999                         if (ret < 0)
5000                                 return ret;
5001                         if (item_ipv6_proto == IPPROTO_ICMPV6)
5002                                 return rte_flow_error_set(error, ENOTSUP,
5003                                         RTE_FLOW_ERROR_TYPE_ACTION,
5004                                         actions,
5005                                         "Can't change header "
5006                                         "with ICMPv6 proto");
5007                         /* Count all modify-header actions as one action. */
5008                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5009                                 ++actions_n;
5010                         action_flags |= actions->type ==
5011                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
5012                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
5013                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
5014                         break;
5015                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5016                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5017                         ret = flow_dv_validate_action_modify_tp(action_flags,
5018                                                                 actions,
5019                                                                 item_flags,
5020                                                                 error);
5021                         if (ret < 0)
5022                                 return ret;
5023                         /* Count all modify-header actions as one action. */
5024                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5025                                 ++actions_n;
5026                         action_flags |= actions->type ==
5027                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5028                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
5029                                                 MLX5_FLOW_ACTION_SET_TP_DST;
5030                         break;
5031                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5032                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5033                         ret = flow_dv_validate_action_modify_ttl(action_flags,
5034                                                                  actions,
5035                                                                  item_flags,
5036                                                                  error);
5037                         if (ret < 0)
5038                                 return ret;
5039                         /* Count all modify-header actions as one action. */
5040                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5041                                 ++actions_n;
5042                         action_flags |= actions->type ==
5043                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
5044                                                 MLX5_FLOW_ACTION_SET_TTL :
5045                                                 MLX5_FLOW_ACTION_DEC_TTL;
5046                         break;
5047                 case RTE_FLOW_ACTION_TYPE_JUMP:
5048                         ret = flow_dv_validate_action_jump(actions,
5049                                                            action_flags,
5050                                                            attr, external,
5051                                                            error);
5052                         if (ret)
5053                                 return ret;
5054                         ++actions_n;
5055                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5056                         break;
5057                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5058                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5059                         ret = flow_dv_validate_action_modify_tcp_seq
5060                                                                 (action_flags,
5061                                                                  actions,
5062                                                                  item_flags,
5063                                                                  error);
5064                         if (ret < 0)
5065                                 return ret;
5066                         /* Count all modify-header actions as one action. */
5067                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5068                                 ++actions_n;
5069                         action_flags |= actions->type ==
5070                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5071                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
5072                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5073                         break;
5074                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5075                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5076                         ret = flow_dv_validate_action_modify_tcp_ack
5077                                                                 (action_flags,
5078                                                                  actions,
5079                                                                  item_flags,
5080                                                                  error);
5081                         if (ret < 0)
5082                                 return ret;
5083                         /* Count all modify-header actions as one action. */
5084                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5085                                 ++actions_n;
5086                         action_flags |= actions->type ==
5087                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5088                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5089                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5090                         break;
5091                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5092                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5093                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5094                         break;
5095                 case RTE_FLOW_ACTION_TYPE_METER:
5096                         ret = mlx5_flow_validate_action_meter(dev,
5097                                                               action_flags,
5098                                                               actions, attr,
5099                                                               error);
5100                         if (ret < 0)
5101                                 return ret;
5102                         action_flags |= MLX5_FLOW_ACTION_METER;
5103                         ++actions_n;
5104                         break;
5105                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5106                         ret = flow_dv_validate_action_modify_ipv4_dscp
5107                                                          (action_flags,
5108                                                           actions,
5109                                                           item_flags,
5110                                                           error);
5111                         if (ret < 0)
5112                                 return ret;
5113                         /* Count all modify-header actions as one action. */
5114                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5115                                 ++actions_n;
5116                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5117                         break;
5118                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5119                         ret = flow_dv_validate_action_modify_ipv6_dscp
5120                                                                 (action_flags,
5121                                                                  actions,
5122                                                                  item_flags,
5123                                                                  error);
5124                         if (ret < 0)
5125                                 return ret;
5126                         /* Count all modify-header actions as one action. */
5127                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5128                                 ++actions_n;
5129                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5130                         break;
5131                 default:
5132                         return rte_flow_error_set(error, ENOTSUP,
5133                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5134                                                   actions,
5135                                                   "action not supported");
5136                 }
5137         }
5138         /*
5139          * Validate the drop action mutual exclusion with other actions.
5140          * Drop action is mutually-exclusive with any other action, except for
5141          * Count action.
5142          */
5143         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5144             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5145                 return rte_flow_error_set(error, EINVAL,
5146                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5147                                           "Drop action is mutually-exclusive "
5148                                           "with any other action, except for "
5149                                           "Count action");
5150         /* Eswitch has few restrictions on using items and actions */
5151         if (attr->transfer) {
5152                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5153                     action_flags & MLX5_FLOW_ACTION_FLAG)
5154                         return rte_flow_error_set(error, ENOTSUP,
5155                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5156                                                   NULL,
5157                                                   "unsupported action FLAG");
5158                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5159                     action_flags & MLX5_FLOW_ACTION_MARK)
5160                         return rte_flow_error_set(error, ENOTSUP,
5161                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5162                                                   NULL,
5163                                                   "unsupported action MARK");
5164                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5165                         return rte_flow_error_set(error, ENOTSUP,
5166                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5167                                                   NULL,
5168                                                   "unsupported action QUEUE");
5169                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5170                         return rte_flow_error_set(error, ENOTSUP,
5171                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5172                                                   NULL,
5173                                                   "unsupported action RSS");
5174                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5175                         return rte_flow_error_set(error, EINVAL,
5176                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5177                                                   actions,
5178                                                   "no fate action is found");
5179         } else {
5180                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5181                         return rte_flow_error_set(error, EINVAL,
5182                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5183                                                   actions,
5184                                                   "no fate action is found");
5185         }
5186         /* Continue validation for Xcap actions.*/
5187         if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) && (queue_index == 0xFFFF ||
5188             mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5189                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5190                     MLX5_FLOW_XCAP_ACTIONS)
5191                         return rte_flow_error_set(error, ENOTSUP,
5192                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5193                                                   NULL, "encap and decap "
5194                                                   "combination aren't supported");
5195                 if (!attr->transfer && attr->ingress && (action_flags &
5196                                                         MLX5_FLOW_ACTION_ENCAP))
5197                         return rte_flow_error_set(error, ENOTSUP,
5198                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5199                                                   NULL, "encap is not supported"
5200                                                   " for ingress traffic");
5201         }
5202         return 0;
5203 }
5204
5205 /**
5206  * Internal preparation function. Allocates the DV flow size,
5207  * this size is constant.
5208  *
5209  * @param[in] attr
5210  *   Pointer to the flow attributes.
5211  * @param[in] items
5212  *   Pointer to the list of items.
5213  * @param[in] actions
5214  *   Pointer to the list of actions.
5215  * @param[out] error
5216  *   Pointer to the error structure.
5217  *
5218  * @return
5219  *   Pointer to mlx5_flow object on success,
5220  *   otherwise NULL and rte_errno is set.
5221  */
5222 static struct mlx5_flow *
5223 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5224                 const struct rte_flow_item items[] __rte_unused,
5225                 const struct rte_flow_action actions[] __rte_unused,
5226                 struct rte_flow_error *error)
5227 {
5228         size_t size = sizeof(struct mlx5_flow);
5229         struct mlx5_flow *dev_flow;
5230
5231         dev_flow = rte_calloc(__func__, 1, size, 0);
5232         if (!dev_flow) {
5233                 rte_flow_error_set(error, ENOMEM,
5234                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5235                                    "not enough memory to create flow");
5236                 return NULL;
5237         }
5238         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5239         dev_flow->ingress = attr->ingress;
5240         dev_flow->transfer = attr->transfer;
5241         return dev_flow;
5242 }
5243
5244 #ifdef RTE_LIBRTE_MLX5_DEBUG
5245 /**
5246  * Sanity check for match mask and value. Similar to check_valid_spec() in
5247  * kernel driver. If unmasked bit is present in value, it returns failure.
5248  *
5249  * @param match_mask
5250  *   pointer to match mask buffer.
5251  * @param match_value
5252  *   pointer to match value buffer.
5253  *
5254  * @return
5255  *   0 if valid, -EINVAL otherwise.
5256  */
5257 static int
5258 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5259 {
5260         uint8_t *m = match_mask;
5261         uint8_t *v = match_value;
5262         unsigned int i;
5263
5264         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5265                 if (v[i] & ~m[i]) {
5266                         DRV_LOG(ERR,
5267                                 "match_value differs from match_criteria"
5268                                 " %p[%u] != %p[%u]",
5269                                 match_value, i, match_mask, i);
5270                         return -EINVAL;
5271                 }
5272         }
5273         return 0;
5274 }
5275 #endif
5276
5277 /**
5278  * Add Ethernet item to matcher and to the value.
5279  *
5280  * @param[in, out] matcher
5281  *   Flow matcher.
5282  * @param[in, out] key
5283  *   Flow matcher value.
5284  * @param[in] item
5285  *   Flow pattern to translate.
5286  * @param[in] inner
5287  *   Item is inner pattern.
5288  */
5289 static void
5290 flow_dv_translate_item_eth(void *matcher, void *key,
5291                            const struct rte_flow_item *item, int inner)
5292 {
5293         const struct rte_flow_item_eth *eth_m = item->mask;
5294         const struct rte_flow_item_eth *eth_v = item->spec;
5295         const struct rte_flow_item_eth nic_mask = {
5296                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5297                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5298                 .type = RTE_BE16(0xffff),
5299         };
5300         void *headers_m;
5301         void *headers_v;
5302         char *l24_v;
5303         unsigned int i;
5304
5305         if (!eth_v)
5306                 return;
5307         if (!eth_m)
5308                 eth_m = &nic_mask;
5309         if (inner) {
5310                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5311                                          inner_headers);
5312                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5313         } else {
5314                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5315                                          outer_headers);
5316                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5317         }
5318         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5319                &eth_m->dst, sizeof(eth_m->dst));
5320         /* The value must be in the range of the mask. */
5321         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5322         for (i = 0; i < sizeof(eth_m->dst); ++i)
5323                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5324         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5325                &eth_m->src, sizeof(eth_m->src));
5326         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5327         /* The value must be in the range of the mask. */
5328         for (i = 0; i < sizeof(eth_m->dst); ++i)
5329                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5330         if (eth_v->type) {
5331                 /* When ethertype is present set mask for tagged VLAN. */
5332                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5333                 /* Set value for tagged VLAN if ethertype is 802.1Q. */
5334                 if (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_VLAN) ||
5335                     eth_v->type == RTE_BE16(RTE_ETHER_TYPE_QINQ)) {
5336                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag,
5337                                  1);
5338                         /* Return here to avoid setting match on ethertype. */
5339                         return;
5340                 }
5341         }
5342         /*
5343          * HW supports match on one Ethertype, the Ethertype following the last
5344          * VLAN tag of the packet (see PRM).
5345          * Set match on ethertype only if ETH header is not followed by VLAN.
5346          */
5347         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5348                  rte_be_to_cpu_16(eth_m->type));
5349         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5350         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5351 }
5352
5353 /**
5354  * Add VLAN item to matcher and to the value.
5355  *
5356  * @param[in, out] dev_flow
5357  *   Flow descriptor.
5358  * @param[in, out] matcher
5359  *   Flow matcher.
5360  * @param[in, out] key
5361  *   Flow matcher value.
5362  * @param[in] item
5363  *   Flow pattern to translate.
5364  * @param[in] inner
5365  *   Item is inner pattern.
5366  */
5367 static void
5368 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5369                             void *matcher, void *key,
5370                             const struct rte_flow_item *item,
5371                             int inner)
5372 {
5373         const struct rte_flow_item_vlan *vlan_m = item->mask;
5374         const struct rte_flow_item_vlan *vlan_v = item->spec;
5375         void *headers_m;
5376         void *headers_v;
5377         uint16_t tci_m;
5378         uint16_t tci_v;
5379
5380         if (!vlan_v)
5381                 return;
5382         if (!vlan_m)
5383                 vlan_m = &rte_flow_item_vlan_mask;
5384         if (inner) {
5385                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5386                                          inner_headers);
5387                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5388         } else {
5389                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5390                                          outer_headers);
5391                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5392                 /*
5393                  * This is workaround, masks are not supported,
5394                  * and pre-validated.
5395                  */
5396                 dev_flow->dv.vf_vlan.tag =
5397                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5398         }
5399         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5400         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5401         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5402         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5403         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5404         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5405         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5406         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5407         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5408         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5409         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5410                  rte_be_to_cpu_16(vlan_m->inner_type));
5411         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5412                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5413 }
5414
5415 /**
5416  * Add IPV4 item to matcher and to the value.
5417  *
5418  * @param[in, out] matcher
5419  *   Flow matcher.
5420  * @param[in, out] key
5421  *   Flow matcher value.
5422  * @param[in] item
5423  *   Flow pattern to translate.
5424  * @param[in] item_flags
5425  *   Bit-fields that holds the items detected until now.
5426  * @param[in] inner
5427  *   Item is inner pattern.
5428  * @param[in] group
5429  *   The group to insert the rule.
5430  */
5431 static void
5432 flow_dv_translate_item_ipv4(void *matcher, void *key,
5433                             const struct rte_flow_item *item,
5434                             const uint64_t item_flags,
5435                             int inner, uint32_t group)
5436 {
5437         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5438         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5439         const struct rte_flow_item_ipv4 nic_mask = {
5440                 .hdr = {
5441                         .src_addr = RTE_BE32(0xffffffff),
5442                         .dst_addr = RTE_BE32(0xffffffff),
5443                         .type_of_service = 0xff,
5444                         .next_proto_id = 0xff,
5445                         .time_to_live = 0xff,
5446                 },
5447         };
5448         void *headers_m;
5449         void *headers_v;
5450         char *l24_m;
5451         char *l24_v;
5452         uint8_t tos;
5453
5454         if (inner) {
5455                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5456                                          inner_headers);
5457                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5458         } else {
5459                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5460                                          outer_headers);
5461                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5462         }
5463         if (group == 0)
5464                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5465         else
5466                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5467         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5468         /*
5469          * On outer header (which must contains L2), or inner header with L2,
5470          * set cvlan_tag mask bit to mark this packet as untagged.
5471          * This should be done even if item->spec is empty.
5472          */
5473         if (!inner || item_flags & MLX5_FLOW_LAYER_INNER_L2)
5474                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5475         if (!ipv4_v)
5476                 return;
5477         if (!ipv4_m)
5478                 ipv4_m = &nic_mask;
5479         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5480                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5481         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5482                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5483         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5484         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5485         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5486                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5487         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5488                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5489         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5490         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5491         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5492         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5493                  ipv4_m->hdr.type_of_service);
5494         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5495         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5496                  ipv4_m->hdr.type_of_service >> 2);
5497         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5498         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5499                  ipv4_m->hdr.next_proto_id);
5500         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5501                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5502         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
5503                  ipv4_m->hdr.time_to_live);
5504         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
5505                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
5506 }
5507
5508 /**
5509  * Add IPV6 item to matcher and to the value.
5510  *
5511  * @param[in, out] matcher
5512  *   Flow matcher.
5513  * @param[in, out] key
5514  *   Flow matcher value.
5515  * @param[in] item
5516  *   Flow pattern to translate.
5517  * @param[in] item_flags
5518  *   Bit-fields that holds the items detected until now.
5519  * @param[in] inner
5520  *   Item is inner pattern.
5521  * @param[in] group
5522  *   The group to insert the rule.
5523  */
5524 static void
5525 flow_dv_translate_item_ipv6(void *matcher, void *key,
5526                             const struct rte_flow_item *item,
5527                             const uint64_t item_flags,
5528                             int inner, uint32_t group)
5529 {
5530         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5531         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5532         const struct rte_flow_item_ipv6 nic_mask = {
5533                 .hdr = {
5534                         .src_addr =
5535                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5536                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5537                         .dst_addr =
5538                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5539                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5540                         .vtc_flow = RTE_BE32(0xffffffff),
5541                         .proto = 0xff,
5542                         .hop_limits = 0xff,
5543                 },
5544         };
5545         void *headers_m;
5546         void *headers_v;
5547         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5548         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5549         char *l24_m;
5550         char *l24_v;
5551         uint32_t vtc_m;
5552         uint32_t vtc_v;
5553         int i;
5554         int size;
5555
5556         if (inner) {
5557                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5558                                          inner_headers);
5559                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5560         } else {
5561                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5562                                          outer_headers);
5563                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5564         }
5565         if (group == 0)
5566                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5567         else
5568                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5569         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5570         /*
5571          * On outer header (which must contains L2), or inner header with L2,
5572          * set cvlan_tag mask bit to mark this packet as untagged.
5573          * This should be done even if item->spec is empty.
5574          */
5575         if (!inner || item_flags & MLX5_FLOW_LAYER_INNER_L2)
5576                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5577         if (!ipv6_v)
5578                 return;
5579         if (!ipv6_m)
5580                 ipv6_m = &nic_mask;
5581         size = sizeof(ipv6_m->hdr.dst_addr);
5582         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5583                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5584         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5585                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5586         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5587         for (i = 0; i < size; ++i)
5588                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5589         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5590                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5591         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5592                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5593         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5594         for (i = 0; i < size; ++i)
5595                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5596         /* TOS. */
5597         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5598         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5599         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5600         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5601         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5602         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5603         /* Label. */
5604         if (inner) {
5605                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5606                          vtc_m);
5607                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5608                          vtc_v);
5609         } else {
5610                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5611                          vtc_m);
5612                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5613                          vtc_v);
5614         }
5615         /* Protocol. */
5616         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5617                  ipv6_m->hdr.proto);
5618         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5619                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5620         /* Hop limit. */
5621         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
5622                  ipv6_m->hdr.hop_limits);
5623         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
5624                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
5625 }
5626
5627 /**
5628  * Add TCP item to matcher and to the value.
5629  *
5630  * @param[in, out] matcher
5631  *   Flow matcher.
5632  * @param[in, out] key
5633  *   Flow matcher value.
5634  * @param[in] item
5635  *   Flow pattern to translate.
5636  * @param[in] inner
5637  *   Item is inner pattern.
5638  */
5639 static void
5640 flow_dv_translate_item_tcp(void *matcher, void *key,
5641                            const struct rte_flow_item *item,
5642                            int inner)
5643 {
5644         const struct rte_flow_item_tcp *tcp_m = item->mask;
5645         const struct rte_flow_item_tcp *tcp_v = item->spec;
5646         void *headers_m;
5647         void *headers_v;
5648
5649         if (inner) {
5650                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5651                                          inner_headers);
5652                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5653         } else {
5654                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5655                                          outer_headers);
5656                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5657         }
5658         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5659         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5660         if (!tcp_v)
5661                 return;
5662         if (!tcp_m)
5663                 tcp_m = &rte_flow_item_tcp_mask;
5664         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5665                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5666         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5667                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5668         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5669                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5670         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5671                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5672         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5673                  tcp_m->hdr.tcp_flags);
5674         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5675                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5676 }
5677
5678 /**
5679  * Add UDP item to matcher and to the value.
5680  *
5681  * @param[in, out] matcher
5682  *   Flow matcher.
5683  * @param[in, out] key
5684  *   Flow matcher value.
5685  * @param[in] item
5686  *   Flow pattern to translate.
5687  * @param[in] inner
5688  *   Item is inner pattern.
5689  */
5690 static void
5691 flow_dv_translate_item_udp(void *matcher, void *key,
5692                            const struct rte_flow_item *item,
5693                            int inner)
5694 {
5695         const struct rte_flow_item_udp *udp_m = item->mask;
5696         const struct rte_flow_item_udp *udp_v = item->spec;
5697         void *headers_m;
5698         void *headers_v;
5699
5700         if (inner) {
5701                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5702                                          inner_headers);
5703                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5704         } else {
5705                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5706                                          outer_headers);
5707                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5708         }
5709         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5710         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5711         if (!udp_v)
5712                 return;
5713         if (!udp_m)
5714                 udp_m = &rte_flow_item_udp_mask;
5715         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5716                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5717         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5718                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5719         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5720                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5721         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5722                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5723 }
5724
5725 /**
5726  * Add GRE optional Key item to matcher and to the value.
5727  *
5728  * @param[in, out] matcher
5729  *   Flow matcher.
5730  * @param[in, out] key
5731  *   Flow matcher value.
5732  * @param[in] item
5733  *   Flow pattern to translate.
5734  * @param[in] inner
5735  *   Item is inner pattern.
5736  */
5737 static void
5738 flow_dv_translate_item_gre_key(void *matcher, void *key,
5739                                    const struct rte_flow_item *item)
5740 {
5741         const rte_be32_t *key_m = item->mask;
5742         const rte_be32_t *key_v = item->spec;
5743         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5744         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5745         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5746
5747         /* GRE K bit must be on and should already be validated */
5748         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5749         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5750         if (!key_v)
5751                 return;
5752         if (!key_m)
5753                 key_m = &gre_key_default_mask;
5754         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5755                  rte_be_to_cpu_32(*key_m) >> 8);
5756         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5757                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5758         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5759                  rte_be_to_cpu_32(*key_m) & 0xFF);
5760         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5761                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5762 }
5763
5764 /**
5765  * Add GRE item to matcher and to the value.
5766  *
5767  * @param[in, out] matcher
5768  *   Flow matcher.
5769  * @param[in, out] key
5770  *   Flow matcher value.
5771  * @param[in] item
5772  *   Flow pattern to translate.
5773  * @param[in] inner
5774  *   Item is inner pattern.
5775  */
5776 static void
5777 flow_dv_translate_item_gre(void *matcher, void *key,
5778                            const struct rte_flow_item *item,
5779                            int inner)
5780 {
5781         const struct rte_flow_item_gre *gre_m = item->mask;
5782         const struct rte_flow_item_gre *gre_v = item->spec;
5783         void *headers_m;
5784         void *headers_v;
5785         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5786         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5787         struct {
5788                 union {
5789                         __extension__
5790                         struct {
5791                                 uint16_t version:3;
5792                                 uint16_t rsvd0:9;
5793                                 uint16_t s_present:1;
5794                                 uint16_t k_present:1;
5795                                 uint16_t rsvd_bit1:1;
5796                                 uint16_t c_present:1;
5797                         };
5798                         uint16_t value;
5799                 };
5800         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5801
5802         if (inner) {
5803                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5804                                          inner_headers);
5805                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5806         } else {
5807                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5808                                          outer_headers);
5809                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5810         }
5811         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5812         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5813         if (!gre_v)
5814                 return;
5815         if (!gre_m)
5816                 gre_m = &rte_flow_item_gre_mask;
5817         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5818                  rte_be_to_cpu_16(gre_m->protocol));
5819         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5820                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5821         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5822         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5823         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5824                  gre_crks_rsvd0_ver_m.c_present);
5825         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5826                  gre_crks_rsvd0_ver_v.c_present &
5827                  gre_crks_rsvd0_ver_m.c_present);
5828         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5829                  gre_crks_rsvd0_ver_m.k_present);
5830         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5831                  gre_crks_rsvd0_ver_v.k_present &
5832                  gre_crks_rsvd0_ver_m.k_present);
5833         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5834                  gre_crks_rsvd0_ver_m.s_present);
5835         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5836                  gre_crks_rsvd0_ver_v.s_present &
5837                  gre_crks_rsvd0_ver_m.s_present);
5838 }
5839
5840 /**
5841  * Add NVGRE item to matcher and to the value.
5842  *
5843  * @param[in, out] matcher
5844  *   Flow matcher.
5845  * @param[in, out] key
5846  *   Flow matcher value.
5847  * @param[in] item
5848  *   Flow pattern to translate.
5849  * @param[in] inner
5850  *   Item is inner pattern.
5851  */
5852 static void
5853 flow_dv_translate_item_nvgre(void *matcher, void *key,
5854                              const struct rte_flow_item *item,
5855                              int inner)
5856 {
5857         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5858         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5859         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5860         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5861         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5862         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5863         char *gre_key_m;
5864         char *gre_key_v;
5865         int size;
5866         int i;
5867
5868         /* For NVGRE, GRE header fields must be set with defined values. */
5869         const struct rte_flow_item_gre gre_spec = {
5870                 .c_rsvd0_ver = RTE_BE16(0x2000),
5871                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5872         };
5873         const struct rte_flow_item_gre gre_mask = {
5874                 .c_rsvd0_ver = RTE_BE16(0xB000),
5875                 .protocol = RTE_BE16(UINT16_MAX),
5876         };
5877         const struct rte_flow_item gre_item = {
5878                 .spec = &gre_spec,
5879                 .mask = &gre_mask,
5880                 .last = NULL,
5881         };
5882         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5883         if (!nvgre_v)
5884                 return;
5885         if (!nvgre_m)
5886                 nvgre_m = &rte_flow_item_nvgre_mask;
5887         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5888         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5889         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5890         memcpy(gre_key_m, tni_flow_id_m, size);
5891         for (i = 0; i < size; ++i)
5892                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5893 }
5894
5895 /**
5896  * Add VXLAN item to matcher and to the value.
5897  *
5898  * @param[in, out] matcher
5899  *   Flow matcher.
5900  * @param[in, out] key
5901  *   Flow matcher value.
5902  * @param[in] item
5903  *   Flow pattern to translate.
5904  * @param[in] inner
5905  *   Item is inner pattern.
5906  */
5907 static void
5908 flow_dv_translate_item_vxlan(void *matcher, void *key,
5909                              const struct rte_flow_item *item,
5910                              int inner)
5911 {
5912         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5913         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5914         void *headers_m;
5915         void *headers_v;
5916         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5917         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5918         char *vni_m;
5919         char *vni_v;
5920         uint16_t dport;
5921         int size;
5922         int i;
5923
5924         if (inner) {
5925                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5926                                          inner_headers);
5927                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5928         } else {
5929                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5930                                          outer_headers);
5931                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5932         }
5933         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5934                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5935         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5936                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5937                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5938         }
5939         if (!vxlan_v)
5940                 return;
5941         if (!vxlan_m)
5942                 vxlan_m = &rte_flow_item_vxlan_mask;
5943         size = sizeof(vxlan_m->vni);
5944         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5945         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5946         memcpy(vni_m, vxlan_m->vni, size);
5947         for (i = 0; i < size; ++i)
5948                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5949 }
5950
5951 /**
5952  * Add VXLAN-GPE item to matcher and to the value.
5953  *
5954  * @param[in, out] matcher
5955  *   Flow matcher.
5956  * @param[in, out] key
5957  *   Flow matcher value.
5958  * @param[in] item
5959  *   Flow pattern to translate.
5960  * @param[in] inner
5961  *   Item is inner pattern.
5962  */
5963
5964 static void
5965 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
5966                                  const struct rte_flow_item *item, int inner)
5967 {
5968         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
5969         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
5970         void *headers_m;
5971         void *headers_v;
5972         void *misc_m =
5973                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
5974         void *misc_v =
5975                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
5976         char *vni_m;
5977         char *vni_v;
5978         uint16_t dport;
5979         int size;
5980         int i;
5981         uint8_t flags_m = 0xff;
5982         uint8_t flags_v = 0xc;
5983
5984         if (inner) {
5985                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5986                                          inner_headers);
5987                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5988         } else {
5989                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5990                                          outer_headers);
5991                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5992         }
5993         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5994                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5995         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5996                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5997                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5998         }
5999         if (!vxlan_v)
6000                 return;
6001         if (!vxlan_m)
6002                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
6003         size = sizeof(vxlan_m->vni);
6004         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
6005         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
6006         memcpy(vni_m, vxlan_m->vni, size);
6007         for (i = 0; i < size; ++i)
6008                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
6009         if (vxlan_m->flags) {
6010                 flags_m = vxlan_m->flags;
6011                 flags_v = vxlan_v->flags;
6012         }
6013         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
6014         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
6015         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
6016                  vxlan_m->protocol);
6017         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
6018                  vxlan_v->protocol);
6019 }
6020
6021 /**
6022  * Add Geneve item to matcher and to the value.
6023  *
6024  * @param[in, out] matcher
6025  *   Flow matcher.
6026  * @param[in, out] key
6027  *   Flow matcher value.
6028  * @param[in] item
6029  *   Flow pattern to translate.
6030  * @param[in] inner
6031  *   Item is inner pattern.
6032  */
6033
6034 static void
6035 flow_dv_translate_item_geneve(void *matcher, void *key,
6036                               const struct rte_flow_item *item, int inner)
6037 {
6038         const struct rte_flow_item_geneve *geneve_m = item->mask;
6039         const struct rte_flow_item_geneve *geneve_v = item->spec;
6040         void *headers_m;
6041         void *headers_v;
6042         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6043         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6044         uint16_t dport;
6045         uint16_t gbhdr_m;
6046         uint16_t gbhdr_v;
6047         char *vni_m;
6048         char *vni_v;
6049         size_t size, i;
6050
6051         if (inner) {
6052                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6053                                          inner_headers);
6054                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6055         } else {
6056                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6057                                          outer_headers);
6058                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6059         }
6060         dport = MLX5_UDP_PORT_GENEVE;
6061         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6062                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6063                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6064         }
6065         if (!geneve_v)
6066                 return;
6067         if (!geneve_m)
6068                 geneve_m = &rte_flow_item_geneve_mask;
6069         size = sizeof(geneve_m->vni);
6070         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
6071         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
6072         memcpy(vni_m, geneve_m->vni, size);
6073         for (i = 0; i < size; ++i)
6074                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
6075         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
6076                  rte_be_to_cpu_16(geneve_m->protocol));
6077         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
6078                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
6079         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
6080         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
6081         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
6082                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6083         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
6084                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6085         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
6086                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6087         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
6088                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
6089                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6090 }
6091
6092 /**
6093  * Add MPLS item to matcher and to the value.
6094  *
6095  * @param[in, out] matcher
6096  *   Flow matcher.
6097  * @param[in, out] key
6098  *   Flow matcher value.
6099  * @param[in] item
6100  *   Flow pattern to translate.
6101  * @param[in] prev_layer
6102  *   The protocol layer indicated in previous item.
6103  * @param[in] inner
6104  *   Item is inner pattern.
6105  */
6106 static void
6107 flow_dv_translate_item_mpls(void *matcher, void *key,
6108                             const struct rte_flow_item *item,
6109                             uint64_t prev_layer,
6110                             int inner)
6111 {
6112         const uint32_t *in_mpls_m = item->mask;
6113         const uint32_t *in_mpls_v = item->spec;
6114         uint32_t *out_mpls_m = 0;
6115         uint32_t *out_mpls_v = 0;
6116         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6117         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6118         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
6119                                      misc_parameters_2);
6120         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6121         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
6122         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6123
6124         switch (prev_layer) {
6125         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6126                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
6127                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
6128                          MLX5_UDP_PORT_MPLS);
6129                 break;
6130         case MLX5_FLOW_LAYER_GRE:
6131                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
6132                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
6133                          RTE_ETHER_TYPE_MPLS);
6134                 break;
6135         default:
6136                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6137                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6138                          IPPROTO_MPLS);
6139                 break;
6140         }
6141         if (!in_mpls_v)
6142                 return;
6143         if (!in_mpls_m)
6144                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
6145         switch (prev_layer) {
6146         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6147                 out_mpls_m =
6148                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6149                                                  outer_first_mpls_over_udp);
6150                 out_mpls_v =
6151                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6152                                                  outer_first_mpls_over_udp);
6153                 break;
6154         case MLX5_FLOW_LAYER_GRE:
6155                 out_mpls_m =
6156                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6157                                                  outer_first_mpls_over_gre);
6158                 out_mpls_v =
6159                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6160                                                  outer_first_mpls_over_gre);
6161                 break;
6162         default:
6163                 /* Inner MPLS not over GRE is not supported. */
6164                 if (!inner) {
6165                         out_mpls_m =
6166                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6167                                                          misc2_m,
6168                                                          outer_first_mpls);
6169                         out_mpls_v =
6170                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6171                                                          misc2_v,
6172                                                          outer_first_mpls);
6173                 }
6174                 break;
6175         }
6176         if (out_mpls_m && out_mpls_v) {
6177                 *out_mpls_m = *in_mpls_m;
6178                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
6179         }
6180 }
6181
6182 /**
6183  * Add metadata register item to matcher
6184  *
6185  * @param[in, out] matcher
6186  *   Flow matcher.
6187  * @param[in, out] key
6188  *   Flow matcher value.
6189  * @param[in] reg_type
6190  *   Type of device metadata register
6191  * @param[in] value
6192  *   Register value
6193  * @param[in] mask
6194  *   Register mask
6195  */
6196 static void
6197 flow_dv_match_meta_reg(void *matcher, void *key,
6198                        enum modify_reg reg_type,
6199                        uint32_t data, uint32_t mask)
6200 {
6201         void *misc2_m =
6202                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
6203         void *misc2_v =
6204                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6205         uint32_t temp;
6206
6207         data &= mask;
6208         switch (reg_type) {
6209         case REG_A:
6210                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
6211                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
6212                 break;
6213         case REG_B:
6214                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
6215                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
6216                 break;
6217         case REG_C_0:
6218                 /*
6219                  * The metadata register C0 field might be divided into
6220                  * source vport index and META item value, we should set
6221                  * this field according to specified mask, not as whole one.
6222                  */
6223                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
6224                 temp |= mask;
6225                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
6226                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
6227                 temp &= ~mask;
6228                 temp |= data;
6229                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
6230                 break;
6231         case REG_C_1:
6232                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
6233                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
6234                 break;
6235         case REG_C_2:
6236                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
6237                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
6238                 break;
6239         case REG_C_3:
6240                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6241                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6242                 break;
6243         case REG_C_4:
6244                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6245                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6246                 break;
6247         case REG_C_5:
6248                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6249                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6250                 break;
6251         case REG_C_6:
6252                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6253                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6254                 break;
6255         case REG_C_7:
6256                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6257                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6258                 break;
6259         default:
6260                 MLX5_ASSERT(false);
6261                 break;
6262         }
6263 }
6264
6265 /**
6266  * Add MARK item to matcher
6267  *
6268  * @param[in] dev
6269  *   The device to configure through.
6270  * @param[in, out] matcher
6271  *   Flow matcher.
6272  * @param[in, out] key
6273  *   Flow matcher value.
6274  * @param[in] item
6275  *   Flow pattern to translate.
6276  */
6277 static void
6278 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6279                             void *matcher, void *key,
6280                             const struct rte_flow_item *item)
6281 {
6282         struct mlx5_priv *priv = dev->data->dev_private;
6283         const struct rte_flow_item_mark *mark;
6284         uint32_t value;
6285         uint32_t mask;
6286
6287         mark = item->mask ? (const void *)item->mask :
6288                             &rte_flow_item_mark_mask;
6289         mask = mark->id & priv->sh->dv_mark_mask;
6290         mark = (const void *)item->spec;
6291         MLX5_ASSERT(mark);
6292         value = mark->id & priv->sh->dv_mark_mask & mask;
6293         if (mask) {
6294                 enum modify_reg reg;
6295
6296                 /* Get the metadata register index for the mark. */
6297                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6298                 MLX5_ASSERT(reg > 0);
6299                 if (reg == REG_C_0) {
6300                         struct mlx5_priv *priv = dev->data->dev_private;
6301                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6302                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6303
6304                         mask &= msk_c0;
6305                         mask <<= shl_c0;
6306                         value <<= shl_c0;
6307                 }
6308                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6309         }
6310 }
6311
6312 /**
6313  * Add META item to matcher
6314  *
6315  * @param[in] dev
6316  *   The devich to configure through.
6317  * @param[in, out] matcher
6318  *   Flow matcher.
6319  * @param[in, out] key
6320  *   Flow matcher value.
6321  * @param[in] attr
6322  *   Attributes of flow that includes this item.
6323  * @param[in] item
6324  *   Flow pattern to translate.
6325  */
6326 static void
6327 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6328                             void *matcher, void *key,
6329                             const struct rte_flow_attr *attr,
6330                             const struct rte_flow_item *item)
6331 {
6332         const struct rte_flow_item_meta *meta_m;
6333         const struct rte_flow_item_meta *meta_v;
6334
6335         meta_m = (const void *)item->mask;
6336         if (!meta_m)
6337                 meta_m = &rte_flow_item_meta_mask;
6338         meta_v = (const void *)item->spec;
6339         if (meta_v) {
6340                 int reg;
6341                 uint32_t value = meta_v->data;
6342                 uint32_t mask = meta_m->data;
6343
6344                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6345                 if (reg < 0)
6346                         return;
6347                 /*
6348                  * In datapath code there is no endianness
6349                  * coversions for perfromance reasons, all
6350                  * pattern conversions are done in rte_flow.
6351                  */
6352                 value = rte_cpu_to_be_32(value);
6353                 mask = rte_cpu_to_be_32(mask);
6354                 if (reg == REG_C_0) {
6355                         struct mlx5_priv *priv = dev->data->dev_private;
6356                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6357                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6358 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6359                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6360
6361                         value >>= shr_c0;
6362                         mask >>= shr_c0;
6363 #endif
6364                         value <<= shl_c0;
6365                         mask <<= shl_c0;
6366                         MLX5_ASSERT(msk_c0);
6367                         MLX5_ASSERT(!(~msk_c0 & mask));
6368                 }
6369                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6370         }
6371 }
6372
6373 /**
6374  * Add vport metadata Reg C0 item to matcher
6375  *
6376  * @param[in, out] matcher
6377  *   Flow matcher.
6378  * @param[in, out] key
6379  *   Flow matcher value.
6380  * @param[in] reg
6381  *   Flow pattern to translate.
6382  */
6383 static void
6384 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6385                                   uint32_t value, uint32_t mask)
6386 {
6387         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6388 }
6389
6390 /**
6391  * Add tag item to matcher
6392  *
6393  * @param[in] dev
6394  *   The devich to configure through.
6395  * @param[in, out] matcher
6396  *   Flow matcher.
6397  * @param[in, out] key
6398  *   Flow matcher value.
6399  * @param[in] item
6400  *   Flow pattern to translate.
6401  */
6402 static void
6403 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6404                                 void *matcher, void *key,
6405                                 const struct rte_flow_item *item)
6406 {
6407         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6408         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6409         uint32_t mask, value;
6410
6411         MLX5_ASSERT(tag_v);
6412         value = tag_v->data;
6413         mask = tag_m ? tag_m->data : UINT32_MAX;
6414         if (tag_v->id == REG_C_0) {
6415                 struct mlx5_priv *priv = dev->data->dev_private;
6416                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6417                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6418
6419                 mask &= msk_c0;
6420                 mask <<= shl_c0;
6421                 value <<= shl_c0;
6422         }
6423         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6424 }
6425
6426 /**
6427  * Add TAG item to matcher
6428  *
6429  * @param[in] dev
6430  *   The devich to configure through.
6431  * @param[in, out] matcher
6432  *   Flow matcher.
6433  * @param[in, out] key
6434  *   Flow matcher value.
6435  * @param[in] item
6436  *   Flow pattern to translate.
6437  */
6438 static void
6439 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6440                            void *matcher, void *key,
6441                            const struct rte_flow_item *item)
6442 {
6443         const struct rte_flow_item_tag *tag_v = item->spec;
6444         const struct rte_flow_item_tag *tag_m = item->mask;
6445         enum modify_reg reg;
6446
6447         MLX5_ASSERT(tag_v);
6448         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6449         /* Get the metadata register index for the tag. */
6450         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6451         MLX5_ASSERT(reg > 0);
6452         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6453 }
6454
6455 /**
6456  * Add source vport match to the specified matcher.
6457  *
6458  * @param[in, out] matcher
6459  *   Flow matcher.
6460  * @param[in, out] key
6461  *   Flow matcher value.
6462  * @param[in] port
6463  *   Source vport value to match
6464  * @param[in] mask
6465  *   Mask
6466  */
6467 static void
6468 flow_dv_translate_item_source_vport(void *matcher, void *key,
6469                                     int16_t port, uint16_t mask)
6470 {
6471         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6472         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6473
6474         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6475         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6476 }
6477
6478 /**
6479  * Translate port-id item to eswitch match on  port-id.
6480  *
6481  * @param[in] dev
6482  *   The devich to configure through.
6483  * @param[in, out] matcher
6484  *   Flow matcher.
6485  * @param[in, out] key
6486  *   Flow matcher value.
6487  * @param[in] item
6488  *   Flow pattern to translate.
6489  *
6490  * @return
6491  *   0 on success, a negative errno value otherwise.
6492  */
6493 static int
6494 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6495                                void *key, const struct rte_flow_item *item)
6496 {
6497         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6498         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6499         struct mlx5_priv *priv;
6500         uint16_t mask, id;
6501
6502         mask = pid_m ? pid_m->id : 0xffff;
6503         id = pid_v ? pid_v->id : dev->data->port_id;
6504         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6505         if (!priv)
6506                 return -rte_errno;
6507         /* Translate to vport field or to metadata, depending on mode. */
6508         if (priv->vport_meta_mask)
6509                 flow_dv_translate_item_meta_vport(matcher, key,
6510                                                   priv->vport_meta_tag,
6511                                                   priv->vport_meta_mask);
6512         else
6513                 flow_dv_translate_item_source_vport(matcher, key,
6514                                                     priv->vport_id, mask);
6515         return 0;
6516 }
6517
6518 /**
6519  * Add ICMP6 item to matcher and to the value.
6520  *
6521  * @param[in, out] matcher
6522  *   Flow matcher.
6523  * @param[in, out] key
6524  *   Flow matcher value.
6525  * @param[in] item
6526  *   Flow pattern to translate.
6527  * @param[in] inner
6528  *   Item is inner pattern.
6529  */
6530 static void
6531 flow_dv_translate_item_icmp6(void *matcher, void *key,
6532                               const struct rte_flow_item *item,
6533                               int inner)
6534 {
6535         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6536         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6537         void *headers_m;
6538         void *headers_v;
6539         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6540                                      misc_parameters_3);
6541         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6542         if (inner) {
6543                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6544                                          inner_headers);
6545                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6546         } else {
6547                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6548                                          outer_headers);
6549                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6550         }
6551         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6552         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6553         if (!icmp6_v)
6554                 return;
6555         if (!icmp6_m)
6556                 icmp6_m = &rte_flow_item_icmp6_mask;
6557         /*
6558          * Force flow only to match the non-fragmented IPv6 ICMPv6 packets.
6559          * If only the protocol is specified, no need to match the frag.
6560          */
6561         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6562         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6563         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6564         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6565                  icmp6_v->type & icmp6_m->type);
6566         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6567         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6568                  icmp6_v->code & icmp6_m->code);
6569 }
6570
6571 /**
6572  * Add ICMP item to matcher and to the value.
6573  *
6574  * @param[in, out] matcher
6575  *   Flow matcher.
6576  * @param[in, out] key
6577  *   Flow matcher value.
6578  * @param[in] item
6579  *   Flow pattern to translate.
6580  * @param[in] inner
6581  *   Item is inner pattern.
6582  */
6583 static void
6584 flow_dv_translate_item_icmp(void *matcher, void *key,
6585                             const struct rte_flow_item *item,
6586                             int inner)
6587 {
6588         const struct rte_flow_item_icmp *icmp_m = item->mask;
6589         const struct rte_flow_item_icmp *icmp_v = item->spec;
6590         void *headers_m;
6591         void *headers_v;
6592         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6593                                      misc_parameters_3);
6594         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6595         if (inner) {
6596                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6597                                          inner_headers);
6598                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6599         } else {
6600                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6601                                          outer_headers);
6602                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6603         }
6604         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6605         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6606         if (!icmp_v)
6607                 return;
6608         if (!icmp_m)
6609                 icmp_m = &rte_flow_item_icmp_mask;
6610         /*
6611          * Force flow only to match the non-fragmented IPv4 ICMP packets.
6612          * If only the protocol is specified, no need to match the frag.
6613          */
6614         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6615         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6616         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6617                  icmp_m->hdr.icmp_type);
6618         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6619                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6620         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6621                  icmp_m->hdr.icmp_code);
6622         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6623                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6624 }
6625
6626 /**
6627  * Add GTP item to matcher and to the value.
6628  *
6629  * @param[in, out] matcher
6630  *   Flow matcher.
6631  * @param[in, out] key
6632  *   Flow matcher value.
6633  * @param[in] item
6634  *   Flow pattern to translate.
6635  * @param[in] inner
6636  *   Item is inner pattern.
6637  */
6638 static void
6639 flow_dv_translate_item_gtp(void *matcher, void *key,
6640                            const struct rte_flow_item *item, int inner)
6641 {
6642         const struct rte_flow_item_gtp *gtp_m = item->mask;
6643         const struct rte_flow_item_gtp *gtp_v = item->spec;
6644         void *headers_m;
6645         void *headers_v;
6646         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6647                                      misc_parameters_3);
6648         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6649         uint16_t dport = RTE_GTPU_UDP_PORT;
6650
6651         if (inner) {
6652                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6653                                          inner_headers);
6654                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6655         } else {
6656                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6657                                          outer_headers);
6658                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6659         }
6660         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6661                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6662                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6663         }
6664         if (!gtp_v)
6665                 return;
6666         if (!gtp_m)
6667                 gtp_m = &rte_flow_item_gtp_mask;
6668         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6669         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6670                  gtp_v->msg_type & gtp_m->msg_type);
6671         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6672                  rte_be_to_cpu_32(gtp_m->teid));
6673         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6674                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6675 }
6676
6677 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6678
6679 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6680         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6681                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6682
6683 /**
6684  * Calculate flow matcher enable bitmap.
6685  *
6686  * @param match_criteria
6687  *   Pointer to flow matcher criteria.
6688  *
6689  * @return
6690  *   Bitmap of enabled fields.
6691  */
6692 static uint8_t
6693 flow_dv_matcher_enable(uint32_t *match_criteria)
6694 {
6695         uint8_t match_criteria_enable;
6696
6697         match_criteria_enable =
6698                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6699                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6700         match_criteria_enable |=
6701                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6702                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6703         match_criteria_enable |=
6704                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6705                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6706         match_criteria_enable |=
6707                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6708                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6709         match_criteria_enable |=
6710                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6711                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6712         return match_criteria_enable;
6713 }
6714
6715
6716 /**
6717  * Get a flow table.
6718  *
6719  * @param[in, out] dev
6720  *   Pointer to rte_eth_dev structure.
6721  * @param[in] table_id
6722  *   Table id to use.
6723  * @param[in] egress
6724  *   Direction of the table.
6725  * @param[in] transfer
6726  *   E-Switch or NIC flow.
6727  * @param[out] error
6728  *   pointer to error structure.
6729  *
6730  * @return
6731  *   Returns tables resource based on the index, NULL in case of failed.
6732  */
6733 static struct mlx5_flow_tbl_resource *
6734 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6735                          uint32_t table_id, uint8_t egress,
6736                          uint8_t transfer,
6737                          struct rte_flow_error *error)
6738 {
6739         struct mlx5_priv *priv = dev->data->dev_private;
6740         struct mlx5_ibv_shared *sh = priv->sh;
6741         struct mlx5_flow_tbl_resource *tbl;
6742         union mlx5_flow_tbl_key table_key = {
6743                 {
6744                         .table_id = table_id,
6745                         .reserved = 0,
6746                         .domain = !!transfer,
6747                         .direction = !!egress,
6748                 }
6749         };
6750         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6751                                                          table_key.v64);
6752         struct mlx5_flow_tbl_data_entry *tbl_data;
6753         int ret;
6754         void *domain;
6755
6756         if (pos) {
6757                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6758                                         entry);
6759                 tbl = &tbl_data->tbl;
6760                 rte_atomic32_inc(&tbl->refcnt);
6761                 return tbl;
6762         }
6763         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6764         if (!tbl_data) {
6765                 rte_flow_error_set(error, ENOMEM,
6766                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6767                                    NULL,
6768                                    "cannot allocate flow table data entry");
6769                 return NULL;
6770         }
6771         tbl = &tbl_data->tbl;
6772         pos = &tbl_data->entry;
6773         if (transfer)
6774                 domain = sh->fdb_domain;
6775         else if (egress)
6776                 domain = sh->tx_domain;
6777         else
6778                 domain = sh->rx_domain;
6779         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6780         if (!tbl->obj) {
6781                 rte_flow_error_set(error, ENOMEM,
6782                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6783                                    NULL, "cannot create flow table object");
6784                 rte_free(tbl_data);
6785                 return NULL;
6786         }
6787         /*
6788          * No multi-threads now, but still better to initialize the reference
6789          * count before insert it into the hash list.
6790          */
6791         rte_atomic32_init(&tbl->refcnt);
6792         /* Jump action reference count is initialized here. */
6793         rte_atomic32_init(&tbl_data->jump.refcnt);
6794         pos->key = table_key.v64;
6795         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6796         if (ret < 0) {
6797                 rte_flow_error_set(error, -ret,
6798                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6799                                    "cannot insert flow table data entry");
6800                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6801                 rte_free(tbl_data);
6802         }
6803         rte_atomic32_inc(&tbl->refcnt);
6804         return tbl;
6805 }
6806
6807 /**
6808  * Release a flow table.
6809  *
6810  * @param[in] dev
6811  *   Pointer to rte_eth_dev structure.
6812  * @param[in] tbl
6813  *   Table resource to be released.
6814  *
6815  * @return
6816  *   Returns 0 if table was released, else return 1;
6817  */
6818 static int
6819 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6820                              struct mlx5_flow_tbl_resource *tbl)
6821 {
6822         struct mlx5_priv *priv = dev->data->dev_private;
6823         struct mlx5_ibv_shared *sh = priv->sh;
6824         struct mlx5_flow_tbl_data_entry *tbl_data =
6825                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6826
6827         if (!tbl)
6828                 return 0;
6829         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6830                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6831
6832                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6833                 tbl->obj = NULL;
6834                 /* remove the entry from the hash list and free memory. */
6835                 mlx5_hlist_remove(sh->flow_tbls, pos);
6836                 rte_free(tbl_data);
6837                 return 0;
6838         }
6839         return 1;
6840 }
6841
6842 /**
6843  * Register the flow matcher.
6844  *
6845  * @param[in, out] dev
6846  *   Pointer to rte_eth_dev structure.
6847  * @param[in, out] matcher
6848  *   Pointer to flow matcher.
6849  * @param[in, out] key
6850  *   Pointer to flow table key.
6851  * @parm[in, out] dev_flow
6852  *   Pointer to the dev_flow.
6853  * @param[out] error
6854  *   pointer to error structure.
6855  *
6856  * @return
6857  *   0 on success otherwise -errno and errno is set.
6858  */
6859 static int
6860 flow_dv_matcher_register(struct rte_eth_dev *dev,
6861                          struct mlx5_flow_dv_matcher *matcher,
6862                          union mlx5_flow_tbl_key *key,
6863                          struct mlx5_flow *dev_flow,
6864                          struct rte_flow_error *error)
6865 {
6866         struct mlx5_priv *priv = dev->data->dev_private;
6867         struct mlx5_ibv_shared *sh = priv->sh;
6868         struct mlx5_flow_dv_matcher *cache_matcher;
6869         struct mlx5dv_flow_matcher_attr dv_attr = {
6870                 .type = IBV_FLOW_ATTR_NORMAL,
6871                 .match_mask = (void *)&matcher->mask,
6872         };
6873         struct mlx5_flow_tbl_resource *tbl;
6874         struct mlx5_flow_tbl_data_entry *tbl_data;
6875
6876         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6877                                        key->domain, error);
6878         if (!tbl)
6879                 return -rte_errno;      /* No need to refill the error info */
6880         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6881         /* Lookup from cache. */
6882         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6883                 if (matcher->crc == cache_matcher->crc &&
6884                     matcher->priority == cache_matcher->priority &&
6885                     !memcmp((const void *)matcher->mask.buf,
6886                             (const void *)cache_matcher->mask.buf,
6887                             cache_matcher->mask.size)) {
6888                         DRV_LOG(DEBUG,
6889                                 "%s group %u priority %hd use %s "
6890                                 "matcher %p: refcnt %d++",
6891                                 key->domain ? "FDB" : "NIC", key->table_id,
6892                                 cache_matcher->priority,
6893                                 key->direction ? "tx" : "rx",
6894                                 (void *)cache_matcher,
6895                                 rte_atomic32_read(&cache_matcher->refcnt));
6896                         rte_atomic32_inc(&cache_matcher->refcnt);
6897                         dev_flow->dv.matcher = cache_matcher;
6898                         /* old matcher should not make the table ref++. */
6899                         flow_dv_tbl_resource_release(dev, tbl);
6900                         return 0;
6901                 }
6902         }
6903         /* Register new matcher. */
6904         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6905         if (!cache_matcher) {
6906                 flow_dv_tbl_resource_release(dev, tbl);
6907                 return rte_flow_error_set(error, ENOMEM,
6908                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6909                                           "cannot allocate matcher memory");
6910         }
6911         *cache_matcher = *matcher;
6912         dv_attr.match_criteria_enable =
6913                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6914         dv_attr.priority = matcher->priority;
6915         if (key->direction)
6916                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6917         cache_matcher->matcher_object =
6918                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6919         if (!cache_matcher->matcher_object) {
6920                 rte_free(cache_matcher);
6921 #ifdef HAVE_MLX5DV_DR
6922                 flow_dv_tbl_resource_release(dev, tbl);
6923 #endif
6924                 return rte_flow_error_set(error, ENOMEM,
6925                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6926                                           NULL, "cannot create matcher");
6927         }
6928         /* Save the table information */
6929         cache_matcher->tbl = tbl;
6930         rte_atomic32_init(&cache_matcher->refcnt);
6931         /* only matcher ref++, table ref++ already done above in get API. */
6932         rte_atomic32_inc(&cache_matcher->refcnt);
6933         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6934         dev_flow->dv.matcher = cache_matcher;
6935         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6936                 key->domain ? "FDB" : "NIC", key->table_id,
6937                 cache_matcher->priority,
6938                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6939                 rte_atomic32_read(&cache_matcher->refcnt));
6940         return 0;
6941 }
6942
6943 /**
6944  * Find existing tag resource or create and register a new one.
6945  *
6946  * @param dev[in, out]
6947  *   Pointer to rte_eth_dev structure.
6948  * @param[in, out] tag_be24
6949  *   Tag value in big endian then R-shift 8.
6950  * @parm[in, out] dev_flow
6951  *   Pointer to the dev_flow.
6952  * @param[out] error
6953  *   pointer to error structure.
6954  *
6955  * @return
6956  *   0 on success otherwise -errno and errno is set.
6957  */
6958 static int
6959 flow_dv_tag_resource_register
6960                         (struct rte_eth_dev *dev,
6961                          uint32_t tag_be24,
6962                          struct mlx5_flow *dev_flow,
6963                          struct rte_flow_error *error)
6964 {
6965         struct mlx5_priv *priv = dev->data->dev_private;
6966         struct mlx5_ibv_shared *sh = priv->sh;
6967         struct mlx5_flow_dv_tag_resource *cache_resource;
6968         struct mlx5_hlist_entry *entry;
6969
6970         /* Lookup a matching resource from cache. */
6971         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6972         if (entry) {
6973                 cache_resource = container_of
6974                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6975                 rte_atomic32_inc(&cache_resource->refcnt);
6976                 dev_flow->dv.tag_resource = cache_resource;
6977                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6978                         (void *)cache_resource,
6979                         rte_atomic32_read(&cache_resource->refcnt));
6980                 return 0;
6981         }
6982         /* Register new resource. */
6983         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6984         if (!cache_resource)
6985                 return rte_flow_error_set(error, ENOMEM,
6986                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6987                                           "cannot allocate resource memory");
6988         cache_resource->entry.key = (uint64_t)tag_be24;
6989         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6990         if (!cache_resource->action) {
6991                 rte_free(cache_resource);
6992                 return rte_flow_error_set(error, ENOMEM,
6993                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6994                                           NULL, "cannot create action");
6995         }
6996         rte_atomic32_init(&cache_resource->refcnt);
6997         rte_atomic32_inc(&cache_resource->refcnt);
6998         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6999                 mlx5_glue->destroy_flow_action(cache_resource->action);
7000                 rte_free(cache_resource);
7001                 return rte_flow_error_set(error, EEXIST,
7002                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7003                                           NULL, "cannot insert tag");
7004         }
7005         dev_flow->dv.tag_resource = cache_resource;
7006         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
7007                 (void *)cache_resource,
7008                 rte_atomic32_read(&cache_resource->refcnt));
7009         return 0;
7010 }
7011
7012 /**
7013  * Release the tag.
7014  *
7015  * @param dev
7016  *   Pointer to Ethernet device.
7017  * @param flow
7018  *   Pointer to mlx5_flow.
7019  *
7020  * @return
7021  *   1 while a reference on it exists, 0 when freed.
7022  */
7023 static int
7024 flow_dv_tag_release(struct rte_eth_dev *dev,
7025                     struct mlx5_flow_dv_tag_resource *tag)
7026 {
7027         struct mlx5_priv *priv = dev->data->dev_private;
7028         struct mlx5_ibv_shared *sh = priv->sh;
7029
7030         MLX5_ASSERT(tag);
7031         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
7032                 dev->data->port_id, (void *)tag,
7033                 rte_atomic32_read(&tag->refcnt));
7034         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
7035                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
7036                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
7037                 DRV_LOG(DEBUG, "port %u tag %p: removed",
7038                         dev->data->port_id, (void *)tag);
7039                 rte_free(tag);
7040                 return 0;
7041         }
7042         return 1;
7043 }
7044
7045 /**
7046  * Translate port ID action to vport.
7047  *
7048  * @param[in] dev
7049  *   Pointer to rte_eth_dev structure.
7050  * @param[in] action
7051  *   Pointer to the port ID action.
7052  * @param[out] dst_port_id
7053  *   The target port ID.
7054  * @param[out] error
7055  *   Pointer to the error structure.
7056  *
7057  * @return
7058  *   0 on success, a negative errno value otherwise and rte_errno is set.
7059  */
7060 static int
7061 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
7062                                  const struct rte_flow_action *action,
7063                                  uint32_t *dst_port_id,
7064                                  struct rte_flow_error *error)
7065 {
7066         uint32_t port;
7067         struct mlx5_priv *priv;
7068         const struct rte_flow_action_port_id *conf =
7069                         (const struct rte_flow_action_port_id *)action->conf;
7070
7071         port = conf->original ? dev->data->port_id : conf->id;
7072         priv = mlx5_port_to_eswitch_info(port, false);
7073         if (!priv)
7074                 return rte_flow_error_set(error, -rte_errno,
7075                                           RTE_FLOW_ERROR_TYPE_ACTION,
7076                                           NULL,
7077                                           "No eswitch info was found for port");
7078 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
7079         /*
7080          * This parameter is transferred to
7081          * mlx5dv_dr_action_create_dest_ib_port().
7082          */
7083         *dst_port_id = priv->ibv_port;
7084 #else
7085         /*
7086          * Legacy mode, no LAG configurations is supported.
7087          * This parameter is transferred to
7088          * mlx5dv_dr_action_create_dest_vport().
7089          */
7090         *dst_port_id = priv->vport_id;
7091 #endif
7092         return 0;
7093 }
7094
7095 /**
7096  * Add Tx queue matcher
7097  *
7098  * @param[in] dev
7099  *   Pointer to the dev struct.
7100  * @param[in, out] matcher
7101  *   Flow matcher.
7102  * @param[in, out] key
7103  *   Flow matcher value.
7104  * @param[in] item
7105  *   Flow pattern to translate.
7106  * @param[in] inner
7107  *   Item is inner pattern.
7108  */
7109 static void
7110 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
7111                                 void *matcher, void *key,
7112                                 const struct rte_flow_item *item)
7113 {
7114         const struct mlx5_rte_flow_item_tx_queue *queue_m;
7115         const struct mlx5_rte_flow_item_tx_queue *queue_v;
7116         void *misc_m =
7117                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7118         void *misc_v =
7119                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7120         struct mlx5_txq_ctrl *txq;
7121         uint32_t queue;
7122
7123
7124         queue_m = (const void *)item->mask;
7125         if (!queue_m)
7126                 return;
7127         queue_v = (const void *)item->spec;
7128         if (!queue_v)
7129                 return;
7130         txq = mlx5_txq_get(dev, queue_v->queue);
7131         if (!txq)
7132                 return;
7133         queue = txq->obj->sq->id;
7134         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
7135         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
7136                  queue & queue_m->queue);
7137         mlx5_txq_release(dev, queue_v->queue);
7138 }
7139
7140 /**
7141  * Set the hash fields according to the @p flow information.
7142  *
7143  * @param[in] dev_flow
7144  *   Pointer to the mlx5_flow.
7145  */
7146 static void
7147 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
7148 {
7149         struct rte_flow *flow = dev_flow->flow;
7150         uint64_t items = dev_flow->layers;
7151         int rss_inner = 0;
7152         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
7153
7154         dev_flow->hash_fields = 0;
7155 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
7156         if (flow->rss.level >= 2) {
7157                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
7158                 rss_inner = 1;
7159         }
7160 #endif
7161         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
7162             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
7163                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
7164                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7165                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
7166                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7167                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
7168                         else
7169                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
7170                 }
7171         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
7172                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
7173                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
7174                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7175                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
7176                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7177                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
7178                         else
7179                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
7180                 }
7181         }
7182         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
7183             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
7184                 if (rss_types & ETH_RSS_UDP) {
7185                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7186                                 dev_flow->hash_fields |=
7187                                                 IBV_RX_HASH_SRC_PORT_UDP;
7188                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7189                                 dev_flow->hash_fields |=
7190                                                 IBV_RX_HASH_DST_PORT_UDP;
7191                         else
7192                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
7193                 }
7194         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
7195                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
7196                 if (rss_types & ETH_RSS_TCP) {
7197                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7198                                 dev_flow->hash_fields |=
7199                                                 IBV_RX_HASH_SRC_PORT_TCP;
7200                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7201                                 dev_flow->hash_fields |=
7202                                                 IBV_RX_HASH_DST_PORT_TCP;
7203                         else
7204                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
7205                 }
7206         }
7207 }
7208
7209 /**
7210  * Fill the flow with DV spec, lock free
7211  * (mutex should be acquired by caller).
7212  *
7213  * @param[in] dev
7214  *   Pointer to rte_eth_dev structure.
7215  * @param[in, out] dev_flow
7216  *   Pointer to the sub flow.
7217  * @param[in] attr
7218  *   Pointer to the flow attributes.
7219  * @param[in] items
7220  *   Pointer to the list of items.
7221  * @param[in] actions
7222  *   Pointer to the list of actions.
7223  * @param[out] error
7224  *   Pointer to the error structure.
7225  *
7226  * @return
7227  *   0 on success, a negative errno value otherwise and rte_errno is set.
7228  */
7229 static int
7230 __flow_dv_translate(struct rte_eth_dev *dev,
7231                     struct mlx5_flow *dev_flow,
7232                     const struct rte_flow_attr *attr,
7233                     const struct rte_flow_item items[],
7234                     const struct rte_flow_action actions[],
7235                     struct rte_flow_error *error)
7236 {
7237         struct mlx5_priv *priv = dev->data->dev_private;
7238         struct mlx5_dev_config *dev_conf = &priv->config;
7239         struct rte_flow *flow = dev_flow->flow;
7240         uint64_t item_flags = 0;
7241         uint64_t last_item = 0;
7242         uint64_t action_flags = 0;
7243         uint64_t priority = attr->priority;
7244         struct mlx5_flow_dv_matcher matcher = {
7245                 .mask = {
7246                         .size = sizeof(matcher.mask.buf),
7247                 },
7248         };
7249         int actions_n = 0;
7250         bool actions_end = false;
7251         union {
7252                 struct mlx5_flow_dv_modify_hdr_resource res;
7253                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7254                             sizeof(struct mlx5_modification_cmd) *
7255                             (MLX5_MAX_MODIFY_NUM + 1)];
7256         } mhdr_dummy;
7257         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7258         union flow_dv_attr flow_attr = { .attr = 0 };
7259         uint32_t tag_be;
7260         union mlx5_flow_tbl_key tbl_key;
7261         uint32_t modify_action_position = UINT32_MAX;
7262         void *match_mask = matcher.mask.buf;
7263         void *match_value = dev_flow->dv.value.buf;
7264         uint8_t next_protocol = 0xff;
7265         struct rte_vlan_hdr vlan = { 0 };
7266         uint32_t table;
7267         int ret = 0;
7268
7269         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7270                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7271         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7272                                        !!priv->fdb_def_rule, &table, error);
7273         if (ret)
7274                 return ret;
7275         dev_flow->group = table;
7276         if (attr->transfer)
7277                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7278         if (priority == MLX5_FLOW_PRIO_RSVD)
7279                 priority = dev_conf->flow_prio - 1;
7280         /* number of actions must be set to 0 in case of dirty stack. */
7281         mhdr_res->actions_num = 0;
7282         for (; !actions_end ; actions++) {
7283                 const struct rte_flow_action_queue *queue;
7284                 const struct rte_flow_action_rss *rss;
7285                 const struct rte_flow_action *action = actions;
7286                 const struct rte_flow_action_count *count = action->conf;
7287                 const uint8_t *rss_key;
7288                 const struct rte_flow_action_jump *jump_data;
7289                 const struct rte_flow_action_meter *mtr;
7290                 struct mlx5_flow_tbl_resource *tbl;
7291                 uint32_t port_id = 0;
7292                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7293                 int action_type = actions->type;
7294                 const struct rte_flow_action *found_action = NULL;
7295
7296                 switch (action_type) {
7297                 case RTE_FLOW_ACTION_TYPE_VOID:
7298                         break;
7299                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7300                         if (flow_dv_translate_action_port_id(dev, action,
7301                                                              &port_id, error))
7302                                 return -rte_errno;
7303                         port_id_resource.port_id = port_id;
7304                         if (flow_dv_port_id_action_resource_register
7305                             (dev, &port_id_resource, dev_flow, error))
7306                                 return -rte_errno;
7307                         dev_flow->dv.actions[actions_n++] =
7308                                 dev_flow->dv.port_id_action->action;
7309                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7310                         break;
7311                 case RTE_FLOW_ACTION_TYPE_FLAG:
7312                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7313                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7314                                 struct rte_flow_action_mark mark = {
7315                                         .id = MLX5_FLOW_MARK_DEFAULT,
7316                                 };
7317
7318                                 if (flow_dv_convert_action_mark(dev, &mark,
7319                                                                 mhdr_res,
7320                                                                 error))
7321                                         return -rte_errno;
7322                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7323                                 break;
7324                         }
7325                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7326                         if (!dev_flow->dv.tag_resource)
7327                                 if (flow_dv_tag_resource_register
7328                                     (dev, tag_be, dev_flow, error))
7329                                         return -rte_errno;
7330                         dev_flow->dv.actions[actions_n++] =
7331                                 dev_flow->dv.tag_resource->action;
7332                         break;
7333                 case RTE_FLOW_ACTION_TYPE_MARK:
7334                         action_flags |= MLX5_FLOW_ACTION_MARK;
7335                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7336                                 const struct rte_flow_action_mark *mark =
7337                                         (const struct rte_flow_action_mark *)
7338                                                 actions->conf;
7339
7340                                 if (flow_dv_convert_action_mark(dev, mark,
7341                                                                 mhdr_res,
7342                                                                 error))
7343                                         return -rte_errno;
7344                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7345                                 break;
7346                         }
7347                         /* Fall-through */
7348                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7349                         /* Legacy (non-extensive) MARK action. */
7350                         tag_be = mlx5_flow_mark_set
7351                               (((const struct rte_flow_action_mark *)
7352                                (actions->conf))->id);
7353                         if (!dev_flow->dv.tag_resource)
7354                                 if (flow_dv_tag_resource_register
7355                                     (dev, tag_be, dev_flow, error))
7356                                         return -rte_errno;
7357                         dev_flow->dv.actions[actions_n++] =
7358                                 dev_flow->dv.tag_resource->action;
7359                         break;
7360                 case RTE_FLOW_ACTION_TYPE_SET_META:
7361                         if (flow_dv_convert_action_set_meta
7362                                 (dev, mhdr_res, attr,
7363                                  (const struct rte_flow_action_set_meta *)
7364                                   actions->conf, error))
7365                                 return -rte_errno;
7366                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7367                         break;
7368                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7369                         if (flow_dv_convert_action_set_tag
7370                                 (dev, mhdr_res,
7371                                  (const struct rte_flow_action_set_tag *)
7372                                   actions->conf, error))
7373                                 return -rte_errno;
7374                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7375                         break;
7376                 case RTE_FLOW_ACTION_TYPE_DROP:
7377                         action_flags |= MLX5_FLOW_ACTION_DROP;
7378                         break;
7379                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7380                         MLX5_ASSERT(flow->rss.queue);
7381                         queue = actions->conf;
7382                         flow->rss.queue_num = 1;
7383                         (*flow->rss.queue)[0] = queue->index;
7384                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7385                         break;
7386                 case RTE_FLOW_ACTION_TYPE_RSS:
7387                         MLX5_ASSERT(flow->rss.queue);
7388                         rss = actions->conf;
7389                         if (flow->rss.queue)
7390                                 memcpy((*flow->rss.queue), rss->queue,
7391                                        rss->queue_num * sizeof(uint16_t));
7392                         flow->rss.queue_num = rss->queue_num;
7393                         /* NULL RSS key indicates default RSS key. */
7394                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7395                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7396                         /*
7397                          * rss->level and rss.types should be set in advance
7398                          * when expanding items for RSS.
7399                          */
7400                         action_flags |= MLX5_FLOW_ACTION_RSS;
7401                         break;
7402                 case RTE_FLOW_ACTION_TYPE_COUNT:
7403                         if (!dev_conf->devx) {
7404                                 rte_errno = ENOTSUP;
7405                                 goto cnt_err;
7406                         }
7407                         flow->counter = flow_dv_counter_alloc(dev,
7408                                                               count->shared,
7409                                                               count->id,
7410                                                               dev_flow->group);
7411                         if (flow->counter == NULL)
7412                                 goto cnt_err;
7413                         dev_flow->dv.actions[actions_n++] =
7414                                 flow->counter->action;
7415                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7416                         break;
7417 cnt_err:
7418                         if (rte_errno == ENOTSUP)
7419                                 return rte_flow_error_set
7420                                               (error, ENOTSUP,
7421                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7422                                                NULL,
7423                                                "count action not supported");
7424                         else
7425                                 return rte_flow_error_set
7426                                                 (error, rte_errno,
7427                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7428                                                  action,
7429                                                  "cannot create counter"
7430                                                   " object.");
7431                         break;
7432                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7433                         dev_flow->dv.actions[actions_n++] =
7434                                                 priv->sh->pop_vlan_action;
7435                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7436                         break;
7437                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7438                         flow_dev_get_vlan_info_from_items(items, &vlan);
7439                         vlan.eth_proto = rte_be_to_cpu_16
7440                              ((((const struct rte_flow_action_of_push_vlan *)
7441                                                    actions->conf)->ethertype));
7442                         found_action = mlx5_flow_find_action
7443                                         (actions + 1,
7444                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7445                         if (found_action)
7446                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7447                         found_action = mlx5_flow_find_action
7448                                         (actions + 1,
7449                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7450                         if (found_action)
7451                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7452                         if (flow_dv_create_action_push_vlan
7453                                             (dev, attr, &vlan, dev_flow, error))
7454                                 return -rte_errno;
7455                         dev_flow->dv.actions[actions_n++] =
7456                                            dev_flow->dv.push_vlan_res->action;
7457                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7458                         break;
7459                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7460                         /* of_vlan_push action handled this action */
7461                         MLX5_ASSERT(action_flags &
7462                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7463                         break;
7464                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7465                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7466                                 break;
7467                         flow_dev_get_vlan_info_from_items(items, &vlan);
7468                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7469                         /* If no VLAN push - this is a modify header action */
7470                         if (flow_dv_convert_action_modify_vlan_vid
7471                                                 (mhdr_res, actions, error))
7472                                 return -rte_errno;
7473                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7474                         break;
7475                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7476                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7477                         if (flow_dv_create_action_l2_encap(dev, actions,
7478                                                            dev_flow,
7479                                                            attr->transfer,
7480                                                            error))
7481                                 return -rte_errno;
7482                         dev_flow->dv.actions[actions_n++] =
7483                                 dev_flow->dv.encap_decap->verbs_action;
7484                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7485                         break;
7486                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7487                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7488                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7489                                                            attr->transfer,
7490                                                            error))
7491                                 return -rte_errno;
7492                         dev_flow->dv.actions[actions_n++] =
7493                                 dev_flow->dv.encap_decap->verbs_action;
7494                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7495                         break;
7496                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7497                         /* Handle encap with preceding decap. */
7498                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
7499                                 if (flow_dv_create_action_raw_encap
7500                                         (dev, actions, dev_flow, attr, error))
7501                                         return -rte_errno;
7502                                 dev_flow->dv.actions[actions_n++] =
7503                                         dev_flow->dv.encap_decap->verbs_action;
7504                         } else {
7505                                 /* Handle encap without preceding decap. */
7506                                 if (flow_dv_create_action_l2_encap
7507                                     (dev, actions, dev_flow, attr->transfer,
7508                                      error))
7509                                         return -rte_errno;
7510                                 dev_flow->dv.actions[actions_n++] =
7511                                         dev_flow->dv.encap_decap->verbs_action;
7512                         }
7513                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7514                         break;
7515                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7516                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
7517                                 ;
7518                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7519                                 if (flow_dv_create_action_l2_decap
7520                                     (dev, dev_flow, attr->transfer, error))
7521                                         return -rte_errno;
7522                                 dev_flow->dv.actions[actions_n++] =
7523                                         dev_flow->dv.encap_decap->verbs_action;
7524                         }
7525                         /* If decap is followed by encap, handle it at encap. */
7526                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7527                         break;
7528                 case RTE_FLOW_ACTION_TYPE_JUMP:
7529                         jump_data = action->conf;
7530                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7531                                                        jump_data->group,
7532                                                        !!priv->fdb_def_rule,
7533                                                        &table, error);
7534                         if (ret)
7535                                 return ret;
7536                         tbl = flow_dv_tbl_resource_get(dev, table,
7537                                                        attr->egress,
7538                                                        attr->transfer, error);
7539                         if (!tbl)
7540                                 return rte_flow_error_set
7541                                                 (error, errno,
7542                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7543                                                  NULL,
7544                                                  "cannot create jump action.");
7545                         if (flow_dv_jump_tbl_resource_register
7546                             (dev, tbl, dev_flow, error)) {
7547                                 flow_dv_tbl_resource_release(dev, tbl);
7548                                 return rte_flow_error_set
7549                                                 (error, errno,
7550                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7551                                                  NULL,
7552                                                  "cannot create jump action.");
7553                         }
7554                         dev_flow->dv.actions[actions_n++] =
7555                                 dev_flow->dv.jump->action;
7556                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7557                         break;
7558                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7559                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7560                         if (flow_dv_convert_action_modify_mac
7561                                         (mhdr_res, actions, error))
7562                                 return -rte_errno;
7563                         action_flags |= actions->type ==
7564                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7565                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7566                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7567                         break;
7568                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7569                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7570                         if (flow_dv_convert_action_modify_ipv4
7571                                         (mhdr_res, actions, error))
7572                                 return -rte_errno;
7573                         action_flags |= actions->type ==
7574                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7575                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7576                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7577                         break;
7578                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7579                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7580                         if (flow_dv_convert_action_modify_ipv6
7581                                         (mhdr_res, actions, error))
7582                                 return -rte_errno;
7583                         action_flags |= actions->type ==
7584                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7585                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7586                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7587                         break;
7588                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7589                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7590                         if (flow_dv_convert_action_modify_tp
7591                                         (mhdr_res, actions, items,
7592                                          &flow_attr, dev_flow, !!(action_flags &
7593                                          MLX5_FLOW_ACTION_DECAP), error))
7594                                 return -rte_errno;
7595                         action_flags |= actions->type ==
7596                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7597                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7598                                         MLX5_FLOW_ACTION_SET_TP_DST;
7599                         break;
7600                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7601                         if (flow_dv_convert_action_modify_dec_ttl
7602                                         (mhdr_res, items, &flow_attr, dev_flow,
7603                                          !!(action_flags &
7604                                          MLX5_FLOW_ACTION_DECAP), error))
7605                                 return -rte_errno;
7606                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7607                         break;
7608                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7609                         if (flow_dv_convert_action_modify_ttl
7610                                         (mhdr_res, actions, items, &flow_attr,
7611                                          dev_flow, !!(action_flags &
7612                                          MLX5_FLOW_ACTION_DECAP), error))
7613                                 return -rte_errno;
7614                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7615                         break;
7616                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7617                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7618                         if (flow_dv_convert_action_modify_tcp_seq
7619                                         (mhdr_res, actions, error))
7620                                 return -rte_errno;
7621                         action_flags |= actions->type ==
7622                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7623                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7624                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7625                         break;
7626
7627                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7628                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7629                         if (flow_dv_convert_action_modify_tcp_ack
7630                                         (mhdr_res, actions, error))
7631                                 return -rte_errno;
7632                         action_flags |= actions->type ==
7633                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7634                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7635                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7636                         break;
7637                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7638                         if (flow_dv_convert_action_set_reg
7639                                         (mhdr_res, actions, error))
7640                                 return -rte_errno;
7641                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7642                         break;
7643                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7644                         if (flow_dv_convert_action_copy_mreg
7645                                         (dev, mhdr_res, actions, error))
7646                                 return -rte_errno;
7647                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7648                         break;
7649                 case RTE_FLOW_ACTION_TYPE_METER:
7650                         mtr = actions->conf;
7651                         if (!flow->meter) {
7652                                 flow->meter = mlx5_flow_meter_attach(priv,
7653                                                         mtr->mtr_id, attr,
7654                                                         error);
7655                                 if (!flow->meter)
7656                                         return rte_flow_error_set(error,
7657                                                 rte_errno,
7658                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7659                                                 NULL,
7660                                                 "meter not found "
7661                                                 "or invalid parameters");
7662                         }
7663                         /* Set the meter action. */
7664                         dev_flow->dv.actions[actions_n++] =
7665                                 flow->meter->mfts->meter_action;
7666                         action_flags |= MLX5_FLOW_ACTION_METER;
7667                         break;
7668                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7669                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7670                                                               actions, error))
7671                                 return -rte_errno;
7672                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7673                         break;
7674                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7675                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7676                                                               actions, error))
7677                                 return -rte_errno;
7678                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7679                         break;
7680                 case RTE_FLOW_ACTION_TYPE_END:
7681                         actions_end = true;
7682                         if (mhdr_res->actions_num) {
7683                                 /* create modify action if needed. */
7684                                 if (flow_dv_modify_hdr_resource_register
7685                                         (dev, mhdr_res, dev_flow, error))
7686                                         return -rte_errno;
7687                                 dev_flow->dv.actions[modify_action_position] =
7688                                         dev_flow->dv.modify_hdr->verbs_action;
7689                         }
7690                         break;
7691                 default:
7692                         break;
7693                 }
7694                 if (mhdr_res->actions_num &&
7695                     modify_action_position == UINT32_MAX)
7696                         modify_action_position = actions_n++;
7697         }
7698         dev_flow->dv.actions_n = actions_n;
7699         dev_flow->actions = action_flags;
7700         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7701                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7702                 int item_type = items->type;
7703
7704                 switch (item_type) {
7705                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7706                         flow_dv_translate_item_port_id(dev, match_mask,
7707                                                        match_value, items);
7708                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7709                         break;
7710                 case RTE_FLOW_ITEM_TYPE_ETH:
7711                         flow_dv_translate_item_eth(match_mask, match_value,
7712                                                    items, tunnel);
7713                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7714                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7715                                              MLX5_FLOW_LAYER_OUTER_L2;
7716                         break;
7717                 case RTE_FLOW_ITEM_TYPE_VLAN:
7718                         flow_dv_translate_item_vlan(dev_flow,
7719                                                     match_mask, match_value,
7720                                                     items, tunnel);
7721                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7722                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7723                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7724                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7725                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7726                         break;
7727                 case RTE_FLOW_ITEM_TYPE_IPV4:
7728                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7729                                                   &item_flags, &tunnel);
7730                         flow_dv_translate_item_ipv4(match_mask, match_value,
7731                                                     items, item_flags, tunnel,
7732                                                     dev_flow->group);
7733                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7734                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7735                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7736                         if (items->mask != NULL &&
7737                             ((const struct rte_flow_item_ipv4 *)
7738                              items->mask)->hdr.next_proto_id) {
7739                                 next_protocol =
7740                                         ((const struct rte_flow_item_ipv4 *)
7741                                          (items->spec))->hdr.next_proto_id;
7742                                 next_protocol &=
7743                                         ((const struct rte_flow_item_ipv4 *)
7744                                          (items->mask))->hdr.next_proto_id;
7745                         } else {
7746                                 /* Reset for inner layer. */
7747                                 next_protocol = 0xff;
7748                         }
7749                         break;
7750                 case RTE_FLOW_ITEM_TYPE_IPV6:
7751                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7752                                                   &item_flags, &tunnel);
7753                         flow_dv_translate_item_ipv6(match_mask, match_value,
7754                                                     items, item_flags, tunnel,
7755                                                     dev_flow->group);
7756                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7757                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7758                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7759                         if (items->mask != NULL &&
7760                             ((const struct rte_flow_item_ipv6 *)
7761                              items->mask)->hdr.proto) {
7762                                 next_protocol =
7763                                         ((const struct rte_flow_item_ipv6 *)
7764                                          items->spec)->hdr.proto;
7765                                 next_protocol &=
7766                                         ((const struct rte_flow_item_ipv6 *)
7767                                          items->mask)->hdr.proto;
7768                         } else {
7769                                 /* Reset for inner layer. */
7770                                 next_protocol = 0xff;
7771                         }
7772                         break;
7773                 case RTE_FLOW_ITEM_TYPE_TCP:
7774                         flow_dv_translate_item_tcp(match_mask, match_value,
7775                                                    items, tunnel);
7776                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7777                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7778                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7779                         break;
7780                 case RTE_FLOW_ITEM_TYPE_UDP:
7781                         flow_dv_translate_item_udp(match_mask, match_value,
7782                                                    items, tunnel);
7783                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7784                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7785                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7786                         break;
7787                 case RTE_FLOW_ITEM_TYPE_GRE:
7788                         flow_dv_translate_item_gre(match_mask, match_value,
7789                                                    items, tunnel);
7790                         matcher.priority = flow->rss.level >= 2 ?
7791                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7792                         last_item = MLX5_FLOW_LAYER_GRE;
7793                         break;
7794                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7795                         flow_dv_translate_item_gre_key(match_mask,
7796                                                        match_value, items);
7797                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7798                         break;
7799                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7800                         flow_dv_translate_item_nvgre(match_mask, match_value,
7801                                                      items, tunnel);
7802                         matcher.priority = flow->rss.level >= 2 ?
7803                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7804                         last_item = MLX5_FLOW_LAYER_GRE;
7805                         break;
7806                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7807                         flow_dv_translate_item_vxlan(match_mask, match_value,
7808                                                      items, tunnel);
7809                         matcher.priority = flow->rss.level >= 2 ?
7810                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7811                         last_item = MLX5_FLOW_LAYER_VXLAN;
7812                         break;
7813                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7814                         flow_dv_translate_item_vxlan_gpe(match_mask,
7815                                                          match_value, items,
7816                                                          tunnel);
7817                         matcher.priority = flow->rss.level >= 2 ?
7818                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7819                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7820                         break;
7821                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7822                         flow_dv_translate_item_geneve(match_mask, match_value,
7823                                                       items, tunnel);
7824                         matcher.priority = flow->rss.level >= 2 ?
7825                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7826                         last_item = MLX5_FLOW_LAYER_GENEVE;
7827                         break;
7828                 case RTE_FLOW_ITEM_TYPE_MPLS:
7829                         flow_dv_translate_item_mpls(match_mask, match_value,
7830                                                     items, last_item, tunnel);
7831                         matcher.priority = flow->rss.level >= 2 ?
7832                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7833                         last_item = MLX5_FLOW_LAYER_MPLS;
7834                         break;
7835                 case RTE_FLOW_ITEM_TYPE_MARK:
7836                         flow_dv_translate_item_mark(dev, match_mask,
7837                                                     match_value, items);
7838                         last_item = MLX5_FLOW_ITEM_MARK;
7839                         break;
7840                 case RTE_FLOW_ITEM_TYPE_META:
7841                         flow_dv_translate_item_meta(dev, match_mask,
7842                                                     match_value, attr, items);
7843                         last_item = MLX5_FLOW_ITEM_METADATA;
7844                         break;
7845                 case RTE_FLOW_ITEM_TYPE_ICMP:
7846                         flow_dv_translate_item_icmp(match_mask, match_value,
7847                                                     items, tunnel);
7848                         last_item = MLX5_FLOW_LAYER_ICMP;
7849                         break;
7850                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7851                         flow_dv_translate_item_icmp6(match_mask, match_value,
7852                                                       items, tunnel);
7853                         last_item = MLX5_FLOW_LAYER_ICMP6;
7854                         break;
7855                 case RTE_FLOW_ITEM_TYPE_TAG:
7856                         flow_dv_translate_item_tag(dev, match_mask,
7857                                                    match_value, items);
7858                         last_item = MLX5_FLOW_ITEM_TAG;
7859                         break;
7860                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7861                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7862                                                         match_value, items);
7863                         last_item = MLX5_FLOW_ITEM_TAG;
7864                         break;
7865                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7866                         flow_dv_translate_item_tx_queue(dev, match_mask,
7867                                                         match_value,
7868                                                         items);
7869                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7870                         break;
7871                 case RTE_FLOW_ITEM_TYPE_GTP:
7872                         flow_dv_translate_item_gtp(match_mask, match_value,
7873                                                    items, tunnel);
7874                         matcher.priority = flow->rss.level >= 2 ?
7875                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7876                         last_item = MLX5_FLOW_LAYER_GTP;
7877                         break;
7878                 default:
7879                         break;
7880                 }
7881                 item_flags |= last_item;
7882         }
7883         /*
7884          * When E-Switch mode is enabled, we have two cases where we need to
7885          * set the source port manually.
7886          * The first one, is in case of Nic steering rule, and the second is
7887          * E-Switch rule where no port_id item was found. In both cases
7888          * the source port is set according the current port in use.
7889          */
7890         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
7891             (priv->representor || priv->master)) {
7892                 if (flow_dv_translate_item_port_id(dev, match_mask,
7893                                                    match_value, NULL))
7894                         return -rte_errno;
7895         }
7896 #ifdef RTE_LIBRTE_MLX5_DEBUG
7897         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
7898                                               dev_flow->dv.value.buf));
7899 #endif
7900         /*
7901          * Layers may be already initialized from prefix flow if this dev_flow
7902          * is the suffix flow.
7903          */
7904         dev_flow->layers |= item_flags;
7905         if (action_flags & MLX5_FLOW_ACTION_RSS)
7906                 flow_dv_hashfields_set(dev_flow);
7907         /* Register matcher. */
7908         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7909                                     matcher.mask.size);
7910         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7911                                                      matcher.priority);
7912         /* reserved field no needs to be set to 0 here. */
7913         tbl_key.domain = attr->transfer;
7914         tbl_key.direction = attr->egress;
7915         tbl_key.table_id = dev_flow->group;
7916         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7917                 return -rte_errno;
7918         return 0;
7919 }
7920
7921 /**
7922  * Apply the flow to the NIC, lock free,
7923  * (mutex should be acquired by caller).
7924  *
7925  * @param[in] dev
7926  *   Pointer to the Ethernet device structure.
7927  * @param[in, out] flow
7928  *   Pointer to flow structure.
7929  * @param[out] error
7930  *   Pointer to error structure.
7931  *
7932  * @return
7933  *   0 on success, a negative errno value otherwise and rte_errno is set.
7934  */
7935 static int
7936 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7937                 struct rte_flow_error *error)
7938 {
7939         struct mlx5_flow_dv *dv;
7940         struct mlx5_flow *dev_flow;
7941         struct mlx5_priv *priv = dev->data->dev_private;
7942         int n;
7943         int err;
7944
7945         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7946                 dv = &dev_flow->dv;
7947                 n = dv->actions_n;
7948                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7949                         if (dev_flow->transfer) {
7950                                 dv->actions[n++] = priv->sh->esw_drop_action;
7951                         } else {
7952                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7953                                 if (!dv->hrxq) {
7954                                         rte_flow_error_set
7955                                                 (error, errno,
7956                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7957                                                  NULL,
7958                                                  "cannot get drop hash queue");
7959                                         goto error;
7960                                 }
7961                                 dv->actions[n++] = dv->hrxq->action;
7962                         }
7963                 } else if (dev_flow->actions &
7964                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7965                         struct mlx5_hrxq *hrxq;
7966
7967                         MLX5_ASSERT(flow->rss.queue);
7968                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7969                                              MLX5_RSS_HASH_KEY_LEN,
7970                                              dev_flow->hash_fields,
7971                                              (*flow->rss.queue),
7972                                              flow->rss.queue_num);
7973                         if (!hrxq) {
7974                                 hrxq = mlx5_hrxq_new
7975                                         (dev, flow->rss.key,
7976                                          MLX5_RSS_HASH_KEY_LEN,
7977                                          dev_flow->hash_fields,
7978                                          (*flow->rss.queue),
7979                                          flow->rss.queue_num,
7980                                          !!(dev_flow->layers &
7981                                             MLX5_FLOW_LAYER_TUNNEL));
7982                         }
7983                         if (!hrxq) {
7984                                 rte_flow_error_set
7985                                         (error, rte_errno,
7986                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7987                                          "cannot get hash queue");
7988                                 goto error;
7989                         }
7990                         dv->hrxq = hrxq;
7991                         dv->actions[n++] = dv->hrxq->action;
7992                 }
7993                 dv->flow =
7994                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7995                                                   (void *)&dv->value, n,
7996                                                   dv->actions);
7997                 if (!dv->flow) {
7998                         rte_flow_error_set(error, errno,
7999                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8000                                            NULL,
8001                                            "hardware refuses to create flow");
8002                         goto error;
8003                 }
8004                 if (priv->vmwa_context &&
8005                     dev_flow->dv.vf_vlan.tag &&
8006                     !dev_flow->dv.vf_vlan.created) {
8007                         /*
8008                          * The rule contains the VLAN pattern.
8009                          * For VF we are going to create VLAN
8010                          * interface to make hypervisor set correct
8011                          * e-Switch vport context.
8012                          */
8013                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
8014                 }
8015         }
8016         return 0;
8017 error:
8018         err = rte_errno; /* Save rte_errno before cleanup. */
8019         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8020                 struct mlx5_flow_dv *dv = &dev_flow->dv;
8021                 if (dv->hrxq) {
8022                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8023                                 mlx5_hrxq_drop_release(dev);
8024                         else
8025                                 mlx5_hrxq_release(dev, dv->hrxq);
8026                         dv->hrxq = NULL;
8027                 }
8028                 if (dev_flow->dv.vf_vlan.tag &&
8029                     dev_flow->dv.vf_vlan.created)
8030                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8031         }
8032         rte_errno = err; /* Restore rte_errno. */
8033         return -rte_errno;
8034 }
8035
8036 /**
8037  * Release the flow matcher.
8038  *
8039  * @param dev
8040  *   Pointer to Ethernet device.
8041  * @param flow
8042  *   Pointer to mlx5_flow.
8043  *
8044  * @return
8045  *   1 while a reference on it exists, 0 when freed.
8046  */
8047 static int
8048 flow_dv_matcher_release(struct rte_eth_dev *dev,
8049                         struct mlx5_flow *flow)
8050 {
8051         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
8052
8053         MLX5_ASSERT(matcher->matcher_object);
8054         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
8055                 dev->data->port_id, (void *)matcher,
8056                 rte_atomic32_read(&matcher->refcnt));
8057         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
8058                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8059                            (matcher->matcher_object));
8060                 LIST_REMOVE(matcher, next);
8061                 /* table ref-- in release interface. */
8062                 flow_dv_tbl_resource_release(dev, matcher->tbl);
8063                 rte_free(matcher);
8064                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
8065                         dev->data->port_id, (void *)matcher);
8066                 return 0;
8067         }
8068         return 1;
8069 }
8070
8071 /**
8072  * Release an encap/decap resource.
8073  *
8074  * @param flow
8075  *   Pointer to mlx5_flow.
8076  *
8077  * @return
8078  *   1 while a reference on it exists, 0 when freed.
8079  */
8080 static int
8081 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
8082 {
8083         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
8084                                                 flow->dv.encap_decap;
8085
8086         MLX5_ASSERT(cache_resource->verbs_action);
8087         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
8088                 (void *)cache_resource,
8089                 rte_atomic32_read(&cache_resource->refcnt));
8090         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8091                 claim_zero(mlx5_glue->destroy_flow_action
8092                                 (cache_resource->verbs_action));
8093                 LIST_REMOVE(cache_resource, next);
8094                 rte_free(cache_resource);
8095                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
8096                         (void *)cache_resource);
8097                 return 0;
8098         }
8099         return 1;
8100 }
8101
8102 /**
8103  * Release an jump to table action resource.
8104  *
8105  * @param dev
8106  *   Pointer to Ethernet device.
8107  * @param flow
8108  *   Pointer to mlx5_flow.
8109  *
8110  * @return
8111  *   1 while a reference on it exists, 0 when freed.
8112  */
8113 static int
8114 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
8115                                   struct mlx5_flow *flow)
8116 {
8117         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
8118         struct mlx5_flow_tbl_data_entry *tbl_data =
8119                         container_of(cache_resource,
8120                                      struct mlx5_flow_tbl_data_entry, jump);
8121
8122         MLX5_ASSERT(cache_resource->action);
8123         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
8124                 (void *)cache_resource,
8125                 rte_atomic32_read(&cache_resource->refcnt));
8126         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8127                 claim_zero(mlx5_glue->destroy_flow_action
8128                                 (cache_resource->action));
8129                 /* jump action memory free is inside the table release. */
8130                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
8131                 DRV_LOG(DEBUG, "jump table resource %p: removed",
8132                         (void *)cache_resource);
8133                 return 0;
8134         }
8135         return 1;
8136 }
8137
8138 /**
8139  * Release a modify-header resource.
8140  *
8141  * @param flow
8142  *   Pointer to mlx5_flow.
8143  *
8144  * @return
8145  *   1 while a reference on it exists, 0 when freed.
8146  */
8147 static int
8148 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
8149 {
8150         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
8151                                                 flow->dv.modify_hdr;
8152
8153         MLX5_ASSERT(cache_resource->verbs_action);
8154         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
8155                 (void *)cache_resource,
8156                 rte_atomic32_read(&cache_resource->refcnt));
8157         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8158                 claim_zero(mlx5_glue->destroy_flow_action
8159                                 (cache_resource->verbs_action));
8160                 LIST_REMOVE(cache_resource, next);
8161                 rte_free(cache_resource);
8162                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
8163                         (void *)cache_resource);
8164                 return 0;
8165         }
8166         return 1;
8167 }
8168
8169 /**
8170  * Release port ID action resource.
8171  *
8172  * @param flow
8173  *   Pointer to mlx5_flow.
8174  *
8175  * @return
8176  *   1 while a reference on it exists, 0 when freed.
8177  */
8178 static int
8179 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
8180 {
8181         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
8182                 flow->dv.port_id_action;
8183
8184         MLX5_ASSERT(cache_resource->action);
8185         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
8186                 (void *)cache_resource,
8187                 rte_atomic32_read(&cache_resource->refcnt));
8188         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8189                 claim_zero(mlx5_glue->destroy_flow_action
8190                                 (cache_resource->action));
8191                 LIST_REMOVE(cache_resource, next);
8192                 rte_free(cache_resource);
8193                 DRV_LOG(DEBUG, "port id action resource %p: removed",
8194                         (void *)cache_resource);
8195                 return 0;
8196         }
8197         return 1;
8198 }
8199
8200 /**
8201  * Release push vlan action resource.
8202  *
8203  * @param flow
8204  *   Pointer to mlx5_flow.
8205  *
8206  * @return
8207  *   1 while a reference on it exists, 0 when freed.
8208  */
8209 static int
8210 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
8211 {
8212         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
8213                 flow->dv.push_vlan_res;
8214
8215         MLX5_ASSERT(cache_resource->action);
8216         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
8217                 (void *)cache_resource,
8218                 rte_atomic32_read(&cache_resource->refcnt));
8219         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8220                 claim_zero(mlx5_glue->destroy_flow_action
8221                                 (cache_resource->action));
8222                 LIST_REMOVE(cache_resource, next);
8223                 rte_free(cache_resource);
8224                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
8225                         (void *)cache_resource);
8226                 return 0;
8227         }
8228         return 1;
8229 }
8230
8231 /**
8232  * Remove the flow from the NIC but keeps it in memory.
8233  * Lock free, (mutex should be acquired by caller).
8234  *
8235  * @param[in] dev
8236  *   Pointer to Ethernet device.
8237  * @param[in, out] flow
8238  *   Pointer to flow structure.
8239  */
8240 static void
8241 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8242 {
8243         struct mlx5_flow_dv *dv;
8244         struct mlx5_flow *dev_flow;
8245
8246         if (!flow)
8247                 return;
8248         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8249                 dv = &dev_flow->dv;
8250                 if (dv->flow) {
8251                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
8252                         dv->flow = NULL;
8253                 }
8254                 if (dv->hrxq) {
8255                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8256                                 mlx5_hrxq_drop_release(dev);
8257                         else
8258                                 mlx5_hrxq_release(dev, dv->hrxq);
8259                         dv->hrxq = NULL;
8260                 }
8261                 if (dev_flow->dv.vf_vlan.tag &&
8262                     dev_flow->dv.vf_vlan.created)
8263                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8264         }
8265 }
8266
8267 /**
8268  * Remove the flow from the NIC and the memory.
8269  * Lock free, (mutex should be acquired by caller).
8270  *
8271  * @param[in] dev
8272  *   Pointer to the Ethernet device structure.
8273  * @param[in, out] flow
8274  *   Pointer to flow structure.
8275  */
8276 static void
8277 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8278 {
8279         struct mlx5_flow *dev_flow;
8280
8281         if (!flow)
8282                 return;
8283         __flow_dv_remove(dev, flow);
8284         if (flow->counter) {
8285                 flow_dv_counter_release(dev, flow->counter);
8286                 flow->counter = NULL;
8287         }
8288         if (flow->meter) {
8289                 mlx5_flow_meter_detach(flow->meter);
8290                 flow->meter = NULL;
8291         }
8292         while (!LIST_EMPTY(&flow->dev_flows)) {
8293                 dev_flow = LIST_FIRST(&flow->dev_flows);
8294                 LIST_REMOVE(dev_flow, next);
8295                 if (dev_flow->dv.matcher)
8296                         flow_dv_matcher_release(dev, dev_flow);
8297                 if (dev_flow->dv.encap_decap)
8298                         flow_dv_encap_decap_resource_release(dev_flow);
8299                 if (dev_flow->dv.modify_hdr)
8300                         flow_dv_modify_hdr_resource_release(dev_flow);
8301                 if (dev_flow->dv.jump)
8302                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8303                 if (dev_flow->dv.port_id_action)
8304                         flow_dv_port_id_action_resource_release(dev_flow);
8305                 if (dev_flow->dv.push_vlan_res)
8306                         flow_dv_push_vlan_action_resource_release(dev_flow);
8307                 if (dev_flow->dv.tag_resource)
8308                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8309                 rte_free(dev_flow);
8310         }
8311 }
8312
8313 /**
8314  * Query a dv flow  rule for its statistics via devx.
8315  *
8316  * @param[in] dev
8317  *   Pointer to Ethernet device.
8318  * @param[in] flow
8319  *   Pointer to the sub flow.
8320  * @param[out] data
8321  *   data retrieved by the query.
8322  * @param[out] error
8323  *   Perform verbose error reporting if not NULL.
8324  *
8325  * @return
8326  *   0 on success, a negative errno value otherwise and rte_errno is set.
8327  */
8328 static int
8329 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8330                     void *data, struct rte_flow_error *error)
8331 {
8332         struct mlx5_priv *priv = dev->data->dev_private;
8333         struct rte_flow_query_count *qc = data;
8334
8335         if (!priv->config.devx)
8336                 return rte_flow_error_set(error, ENOTSUP,
8337                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8338                                           NULL,
8339                                           "counters are not supported");
8340         if (flow->counter) {
8341                 uint64_t pkts, bytes;
8342                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8343                                                &bytes);
8344
8345                 if (err)
8346                         return rte_flow_error_set(error, -err,
8347                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8348                                         NULL, "cannot read counters");
8349                 qc->hits_set = 1;
8350                 qc->bytes_set = 1;
8351                 qc->hits = pkts - flow->counter->hits;
8352                 qc->bytes = bytes - flow->counter->bytes;
8353                 if (qc->reset) {
8354                         flow->counter->hits = pkts;
8355                         flow->counter->bytes = bytes;
8356                 }
8357                 return 0;
8358         }
8359         return rte_flow_error_set(error, EINVAL,
8360                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8361                                   NULL,
8362                                   "counters are not available");
8363 }
8364
8365 /**
8366  * Query a flow.
8367  *
8368  * @see rte_flow_query()
8369  * @see rte_flow_ops
8370  */
8371 static int
8372 flow_dv_query(struct rte_eth_dev *dev,
8373               struct rte_flow *flow __rte_unused,
8374               const struct rte_flow_action *actions __rte_unused,
8375               void *data __rte_unused,
8376               struct rte_flow_error *error __rte_unused)
8377 {
8378         int ret = -EINVAL;
8379
8380         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8381                 switch (actions->type) {
8382                 case RTE_FLOW_ACTION_TYPE_VOID:
8383                         break;
8384                 case RTE_FLOW_ACTION_TYPE_COUNT:
8385                         ret = flow_dv_query_count(dev, flow, data, error);
8386                         break;
8387                 default:
8388                         return rte_flow_error_set(error, ENOTSUP,
8389                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8390                                                   actions,
8391                                                   "action not supported");
8392                 }
8393         }
8394         return ret;
8395 }
8396
8397 /**
8398  * Destroy the meter table set.
8399  * Lock free, (mutex should be acquired by caller).
8400  *
8401  * @param[in] dev
8402  *   Pointer to Ethernet device.
8403  * @param[in] tbl
8404  *   Pointer to the meter table set.
8405  *
8406  * @return
8407  *   Always 0.
8408  */
8409 static int
8410 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8411                         struct mlx5_meter_domains_infos *tbl)
8412 {
8413         struct mlx5_priv *priv = dev->data->dev_private;
8414         struct mlx5_meter_domains_infos *mtd =
8415                                 (struct mlx5_meter_domains_infos *)tbl;
8416
8417         if (!mtd || !priv->config.dv_flow_en)
8418                 return 0;
8419         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8420                 claim_zero(mlx5_glue->dv_destroy_flow
8421                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8422         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8423                 claim_zero(mlx5_glue->dv_destroy_flow
8424                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8425         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8426                 claim_zero(mlx5_glue->dv_destroy_flow
8427                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8428         if (mtd->egress.color_matcher)
8429                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8430                           (mtd->egress.color_matcher));
8431         if (mtd->egress.any_matcher)
8432                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8433                           (mtd->egress.any_matcher));
8434         if (mtd->egress.tbl)
8435                 claim_zero(flow_dv_tbl_resource_release(dev,
8436                                                         mtd->egress.tbl));
8437         if (mtd->ingress.color_matcher)
8438                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8439                           (mtd->ingress.color_matcher));
8440         if (mtd->ingress.any_matcher)
8441                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8442                           (mtd->ingress.any_matcher));
8443         if (mtd->ingress.tbl)
8444                 claim_zero(flow_dv_tbl_resource_release(dev,
8445                                                         mtd->ingress.tbl));
8446         if (mtd->transfer.color_matcher)
8447                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8448                           (mtd->transfer.color_matcher));
8449         if (mtd->transfer.any_matcher)
8450                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8451                           (mtd->transfer.any_matcher));
8452         if (mtd->transfer.tbl)
8453                 claim_zero(flow_dv_tbl_resource_release(dev,
8454                                                         mtd->transfer.tbl));
8455         if (mtd->drop_actn)
8456                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8457         rte_free(mtd);
8458         return 0;
8459 }
8460
8461 /* Number of meter flow actions, count and jump or count and drop. */
8462 #define METER_ACTIONS 2
8463
8464 /**
8465  * Create specify domain meter table and suffix table.
8466  *
8467  * @param[in] dev
8468  *   Pointer to Ethernet device.
8469  * @param[in,out] mtb
8470  *   Pointer to DV meter table set.
8471  * @param[in] egress
8472  *   Table attribute.
8473  * @param[in] transfer
8474  *   Table attribute.
8475  * @param[in] color_reg_c_idx
8476  *   Reg C index for color match.
8477  *
8478  * @return
8479  *   0 on success, -1 otherwise and rte_errno is set.
8480  */
8481 static int
8482 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8483                            struct mlx5_meter_domains_infos *mtb,
8484                            uint8_t egress, uint8_t transfer,
8485                            uint32_t color_reg_c_idx)
8486 {
8487         struct mlx5_priv *priv = dev->data->dev_private;
8488         struct mlx5_ibv_shared *sh = priv->sh;
8489         struct mlx5_flow_dv_match_params mask = {
8490                 .size = sizeof(mask.buf),
8491         };
8492         struct mlx5_flow_dv_match_params value = {
8493                 .size = sizeof(value.buf),
8494         };
8495         struct mlx5dv_flow_matcher_attr dv_attr = {
8496                 .type = IBV_FLOW_ATTR_NORMAL,
8497                 .priority = 0,
8498                 .match_criteria_enable = 0,
8499                 .match_mask = (void *)&mask,
8500         };
8501         void *actions[METER_ACTIONS];
8502         struct mlx5_flow_tbl_resource **sfx_tbl;
8503         struct mlx5_meter_domain_info *dtb;
8504         struct rte_flow_error error;
8505         int i = 0;
8506
8507         if (transfer) {
8508                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8509                 dtb = &mtb->transfer;
8510         } else if (egress) {
8511                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8512                 dtb = &mtb->egress;
8513         } else {
8514                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8515                 dtb = &mtb->ingress;
8516         }
8517         /* If the suffix table in missing, create it. */
8518         if (!(*sfx_tbl)) {
8519                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8520                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8521                                                 egress, transfer, &error);
8522                 if (!(*sfx_tbl)) {
8523                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8524                         return -1;
8525                 }
8526         }
8527         /* Create the meter table with METER level. */
8528         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8529                                             egress, transfer, &error);
8530         if (!dtb->tbl) {
8531                 DRV_LOG(ERR, "Failed to create meter policer table.");
8532                 return -1;
8533         }
8534         /* Create matchers, Any and Color. */
8535         dv_attr.priority = 3;
8536         dv_attr.match_criteria_enable = 0;
8537         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8538                                                              &dv_attr,
8539                                                              dtb->tbl->obj);
8540         if (!dtb->any_matcher) {
8541                 DRV_LOG(ERR, "Failed to create meter"
8542                              " policer default matcher.");
8543                 goto error_exit;
8544         }
8545         dv_attr.priority = 0;
8546         dv_attr.match_criteria_enable =
8547                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8548         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8549                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
8550         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8551                                                                &dv_attr,
8552                                                                dtb->tbl->obj);
8553         if (!dtb->color_matcher) {
8554                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8555                 goto error_exit;
8556         }
8557         if (mtb->count_actns[RTE_MTR_DROPPED])
8558                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8559         actions[i++] = mtb->drop_actn;
8560         /* Default rule: lowest priority, match any, actions: drop. */
8561         dtb->policer_rules[RTE_MTR_DROPPED] =
8562                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8563                                                  (void *)&value, i, actions);
8564         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8565                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8566                 goto error_exit;
8567         }
8568         return 0;
8569 error_exit:
8570         return -1;
8571 }
8572
8573 /**
8574  * Create the needed meter and suffix tables.
8575  * Lock free, (mutex should be acquired by caller).
8576  *
8577  * @param[in] dev
8578  *   Pointer to Ethernet device.
8579  * @param[in] fm
8580  *   Pointer to the flow meter.
8581  *
8582  * @return
8583  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8584  */
8585 static struct mlx5_meter_domains_infos *
8586 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8587                        const struct mlx5_flow_meter *fm)
8588 {
8589         struct mlx5_priv *priv = dev->data->dev_private;
8590         struct mlx5_meter_domains_infos *mtb;
8591         int ret;
8592         int i;
8593
8594         if (!priv->mtr_en) {
8595                 rte_errno = ENOTSUP;
8596                 return NULL;
8597         }
8598         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8599         if (!mtb) {
8600                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8601                 return NULL;
8602         }
8603         /* Create meter count actions */
8604         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8605                 if (!fm->policer_stats.cnt[i])
8606                         continue;
8607                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8608         }
8609         /* Create drop action. */
8610         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8611         if (!mtb->drop_actn) {
8612                 DRV_LOG(ERR, "Failed to create drop action.");
8613                 goto error_exit;
8614         }
8615         /* Egress meter table. */
8616         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8617         if (ret) {
8618                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8619                 goto error_exit;
8620         }
8621         /* Ingress meter table. */
8622         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8623         if (ret) {
8624                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8625                 goto error_exit;
8626         }
8627         /* FDB meter table. */
8628         if (priv->config.dv_esw_en) {
8629                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8630                                                  priv->mtr_color_reg);
8631                 if (ret) {
8632                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8633                         goto error_exit;
8634                 }
8635         }
8636         return mtb;
8637 error_exit:
8638         flow_dv_destroy_mtr_tbl(dev, mtb);
8639         return NULL;
8640 }
8641
8642 /**
8643  * Destroy domain policer rule.
8644  *
8645  * @param[in] dt
8646  *   Pointer to domain table.
8647  */
8648 static void
8649 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8650 {
8651         int i;
8652
8653         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8654                 if (dt->policer_rules[i]) {
8655                         claim_zero(mlx5_glue->dv_destroy_flow
8656                                   (dt->policer_rules[i]));
8657                         dt->policer_rules[i] = NULL;
8658                 }
8659         }
8660         if (dt->jump_actn) {
8661                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8662                 dt->jump_actn = NULL;
8663         }
8664 }
8665
8666 /**
8667  * Destroy policer rules.
8668  *
8669  * @param[in] dev
8670  *   Pointer to Ethernet device.
8671  * @param[in] fm
8672  *   Pointer to flow meter structure.
8673  * @param[in] attr
8674  *   Pointer to flow attributes.
8675  *
8676  * @return
8677  *   Always 0.
8678  */
8679 static int
8680 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8681                               const struct mlx5_flow_meter *fm,
8682                               const struct rte_flow_attr *attr)
8683 {
8684         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8685
8686         if (!mtb)
8687                 return 0;
8688         if (attr->egress)
8689                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8690         if (attr->ingress)
8691                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8692         if (attr->transfer)
8693                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8694         return 0;
8695 }
8696
8697 /**
8698  * Create specify domain meter policer rule.
8699  *
8700  * @param[in] fm
8701  *   Pointer to flow meter structure.
8702  * @param[in] mtb
8703  *   Pointer to DV meter table set.
8704  * @param[in] sfx_tb
8705  *   Pointer to suffix table.
8706  * @param[in] mtr_reg_c
8707  *   Color match REG_C.
8708  *
8709  * @return
8710  *   0 on success, -1 otherwise.
8711  */
8712 static int
8713 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8714                                     struct mlx5_meter_domain_info *dtb,
8715                                     struct mlx5_flow_tbl_resource *sfx_tb,
8716                                     uint8_t mtr_reg_c)
8717 {
8718         struct mlx5_flow_dv_match_params matcher = {
8719                 .size = sizeof(matcher.buf),
8720         };
8721         struct mlx5_flow_dv_match_params value = {
8722                 .size = sizeof(value.buf),
8723         };
8724         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8725         void *actions[METER_ACTIONS];
8726         int i;
8727
8728         /* Create jump action. */
8729         if (!sfx_tb)
8730                 return -1;
8731         if (!dtb->jump_actn)
8732                 dtb->jump_actn =
8733                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8734                                                         (sfx_tb->obj);
8735         if (!dtb->jump_actn) {
8736                 DRV_LOG(ERR, "Failed to create policer jump action.");
8737                 goto error;
8738         }
8739         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8740                 int j = 0;
8741
8742                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8743                                        rte_col_2_mlx5_col(i), UINT8_MAX);
8744                 if (mtb->count_actns[i])
8745                         actions[j++] = mtb->count_actns[i];
8746                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8747                         actions[j++] = mtb->drop_actn;
8748                 else
8749                         actions[j++] = dtb->jump_actn;
8750                 dtb->policer_rules[i] =
8751                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8752                                                  (void *)&value,
8753                                                   j, actions);
8754                 if (!dtb->policer_rules[i]) {
8755                         DRV_LOG(ERR, "Failed to create policer rule.");
8756                         goto error;
8757                 }
8758         }
8759         return 0;
8760 error:
8761         rte_errno = errno;
8762         return -1;
8763 }
8764
8765 /**
8766  * Create policer rules.
8767  *
8768  * @param[in] dev
8769  *   Pointer to Ethernet device.
8770  * @param[in] fm
8771  *   Pointer to flow meter structure.
8772  * @param[in] attr
8773  *   Pointer to flow attributes.
8774  *
8775  * @return
8776  *   0 on success, -1 otherwise.
8777  */
8778 static int
8779 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8780                              struct mlx5_flow_meter *fm,
8781                              const struct rte_flow_attr *attr)
8782 {
8783         struct mlx5_priv *priv = dev->data->dev_private;
8784         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8785         int ret;
8786
8787         if (attr->egress) {
8788                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8789                                                 priv->sh->tx_mtr_sfx_tbl,
8790                                                 priv->mtr_color_reg);
8791                 if (ret) {
8792                         DRV_LOG(ERR, "Failed to create egress policer.");
8793                         goto error;
8794                 }
8795         }
8796         if (attr->ingress) {
8797                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8798                                                 priv->sh->rx_mtr_sfx_tbl,
8799                                                 priv->mtr_color_reg);
8800                 if (ret) {
8801                         DRV_LOG(ERR, "Failed to create ingress policer.");
8802                         goto error;
8803                 }
8804         }
8805         if (attr->transfer) {
8806                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8807                                                 priv->sh->fdb_mtr_sfx_tbl,
8808                                                 priv->mtr_color_reg);
8809                 if (ret) {
8810                         DRV_LOG(ERR, "Failed to create transfer policer.");
8811                         goto error;
8812                 }
8813         }
8814         return 0;
8815 error:
8816         flow_dv_destroy_policer_rules(dev, fm, attr);
8817         return -1;
8818 }
8819
8820 /**
8821  * Query a devx counter.
8822  *
8823  * @param[in] dev
8824  *   Pointer to the Ethernet device structure.
8825  * @param[in] cnt
8826  *   Pointer to the flow counter.
8827  * @param[in] clear
8828  *   Set to clear the counter statistics.
8829  * @param[out] pkts
8830  *   The statistics value of packets.
8831  * @param[out] bytes
8832  *   The statistics value of bytes.
8833  *
8834  * @return
8835  *   0 on success, otherwise return -1.
8836  */
8837 static int
8838 flow_dv_counter_query(struct rte_eth_dev *dev,
8839                       struct mlx5_flow_counter *cnt, bool clear,
8840                       uint64_t *pkts, uint64_t *bytes)
8841 {
8842         struct mlx5_priv *priv = dev->data->dev_private;
8843         uint64_t inn_pkts, inn_bytes;
8844         int ret;
8845
8846         if (!priv->config.devx)
8847                 return -1;
8848         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8849         if (ret)
8850                 return -1;
8851         *pkts = inn_pkts - cnt->hits;
8852         *bytes = inn_bytes - cnt->bytes;
8853         if (clear) {
8854                 cnt->hits = inn_pkts;
8855                 cnt->bytes = inn_bytes;
8856         }
8857         return 0;
8858 }
8859
8860 /*
8861  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8862  */
8863 static int
8864 flow_dv_translate(struct rte_eth_dev *dev,
8865                   struct mlx5_flow *dev_flow,
8866                   const struct rte_flow_attr *attr,
8867                   const struct rte_flow_item items[],
8868                   const struct rte_flow_action actions[],
8869                   struct rte_flow_error *error)
8870 {
8871         int ret;
8872
8873         flow_dv_shared_lock(dev);
8874         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8875         flow_dv_shared_unlock(dev);
8876         return ret;
8877 }
8878
8879 /*
8880  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8881  */
8882 static int
8883 flow_dv_apply(struct rte_eth_dev *dev,
8884               struct rte_flow *flow,
8885               struct rte_flow_error *error)
8886 {
8887         int ret;
8888
8889         flow_dv_shared_lock(dev);
8890         ret = __flow_dv_apply(dev, flow, error);
8891         flow_dv_shared_unlock(dev);
8892         return ret;
8893 }
8894
8895 /*
8896  * Mutex-protected thunk to lock-free __flow_dv_remove().
8897  */
8898 static void
8899 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8900 {
8901         flow_dv_shared_lock(dev);
8902         __flow_dv_remove(dev, flow);
8903         flow_dv_shared_unlock(dev);
8904 }
8905
8906 /*
8907  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8908  */
8909 static void
8910 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8911 {
8912         flow_dv_shared_lock(dev);
8913         __flow_dv_destroy(dev, flow);
8914         flow_dv_shared_unlock(dev);
8915 }
8916
8917 /*
8918  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8919  */
8920 static struct mlx5_flow_counter *
8921 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8922 {
8923         struct mlx5_flow_counter *cnt;
8924
8925         flow_dv_shared_lock(dev);
8926         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8927         flow_dv_shared_unlock(dev);
8928         return cnt;
8929 }
8930
8931 /*
8932  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8933  */
8934 static void
8935 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8936 {
8937         flow_dv_shared_lock(dev);
8938         flow_dv_counter_release(dev, cnt);
8939         flow_dv_shared_unlock(dev);
8940 }
8941
8942 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8943         .validate = flow_dv_validate,
8944         .prepare = flow_dv_prepare,
8945         .translate = flow_dv_translate,
8946         .apply = flow_dv_apply,
8947         .remove = flow_dv_remove,
8948         .destroy = flow_dv_destroy,
8949         .query = flow_dv_query,
8950         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8951         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8952         .create_policer_rules = flow_dv_create_policer_rules,
8953         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8954         .counter_alloc = flow_dv_counter_allocate,
8955         .counter_free = flow_dv_counter_free,
8956         .counter_query = flow_dv_counter_query,
8957 };
8958
8959 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */