drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include "mlx5.h"
  33 #include "mlx5_defs.h"
  34 #include "mlx5_glue.h"
  35 #include "mlx5_flow.h"
  36 #include "mlx5_prm.h"
  37 #include "mlx5_rxtx.h"
  38
  39 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  40
  41 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  42 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  43 #endif
  44
  45 #ifndef HAVE_MLX5DV_DR_ESWITCH
  46 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  47 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  48 #endif
  49 #endif
  50
  51 #ifndef HAVE_MLX5DV_DR
  52 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  53 #endif
  54
  55 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  56                                           sizeof(struct rte_flow_item_ipv4))
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 /**
  77  * Initialize flow attributes structure according to flow items' types.
  78  *
  79  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  80  * mode. For tunnel mode, the items to be modified are the outermost ones.
  81  *
  82  * @param[in] item
  83  *   Pointer to item specification.
  84  * @param[out] attr
  85  *   Pointer to flow attributes structure.
  86  */
  87 static void
  88 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  89 {
  90         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  91                 switch (item->type) {
  92                 case RTE_FLOW_ITEM_TYPE_IPV4:
  93                         if (!attr->ipv6)
  94                                 attr->ipv4 = 1;
  95                         break;
  96                 case RTE_FLOW_ITEM_TYPE_IPV6:
  97                         if (!attr->ipv4)
  98                                 attr->ipv6 = 1;
  99                         break;
 100                 case RTE_FLOW_ITEM_TYPE_UDP:
 101                         if (!attr->tcp)
 102                                 attr->udp = 1;
 103                         break;
 104                 case RTE_FLOW_ITEM_TYPE_TCP:
 105                         if (!attr->udp)
 106                                 attr->tcp = 1;
 107                         break;
 108                 default:
 109                         break;
 110                 }
 111         }
 112         attr->valid = 1;
 113 }
 114
 115 /**
 116  * Convert rte_mtr_color to mlx5 color.
 117  *
 118  * @param[in] rcol
 119  *   rte_mtr_color.
 120  *
 121  * @return
 122  *   mlx5 color.
 123  */
 124 static int
 125 rte_col_2_mlx5_col(enum rte_color rcol)
 126 {
 127         switch (rcol) {
 128         case RTE_COLOR_GREEN:
 129                 return MLX5_FLOW_COLOR_GREEN;
 130         case RTE_COLOR_YELLOW:
 131                 return MLX5_FLOW_COLOR_YELLOW;
 132         case RTE_COLOR_RED:
 133                 return MLX5_FLOW_COLOR_RED;
 134         default:
 135                 break;
 136         }
 137         return MLX5_FLOW_COLOR_UNDEFINED;
 138 }
 139
 140 struct field_modify_info {
 141         uint32_t size; /* Size of field in protocol header, in bytes. */
 142         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 143         enum mlx5_modification_field id;
 144 };
 145
 146 struct field_modify_info modify_eth[] = {
 147         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 148         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 149         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 150         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 151         {0, 0, 0},
 152 };
 153
 154 struct field_modify_info modify_vlan_out_first_vid[] = {
 155         /* Size in bits !!! */
 156         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 157         {0, 0, 0},
 158 };
 159
 160 struct field_modify_info modify_ipv4[] = {
 161         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 162         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 163         {4, 12, MLX5_MODI_OUT_SIPV4},
 164         {4, 16, MLX5_MODI_OUT_DIPV4},
 165         {0, 0, 0},
 166 };
 167
 168 struct field_modify_info modify_ipv6[] = {
 169         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 170         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 171         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 172         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 173         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 174         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 175         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 176         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 177         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 178         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 179         {0, 0, 0},
 180 };
 181
 182 struct field_modify_info modify_udp[] = {
 183         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 184         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 185         {0, 0, 0},
 186 };
 187
 188 struct field_modify_info modify_tcp[] = {
 189         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 190         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 191         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 192         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 193         {0, 0, 0},
 194 };
 195
 196 static void
 197 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 198                           uint8_t next_protocol, uint64_t *item_flags,
 199                           int *tunnel)
 200 {
 201         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 202                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 203         if (next_protocol == IPPROTO_IPIP) {
 204                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 205                 *tunnel = 1;
 206         }
 207         if (next_protocol == IPPROTO_IPV6) {
 208                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 209                 *tunnel = 1;
 210         }
 211 }
 212
 213 /**
 214  * Acquire the synchronizing object to protect multithreaded access
 215  * to shared dv context. Lock occurs only if context is actually
 216  * shared, i.e. we have multiport IB device and representors are
 217  * created.
 218  *
 219  * @param[in] dev
 220  *   Pointer to the rte_eth_dev structure.
 221  */
 222 static void
 223 flow_dv_shared_lock(struct rte_eth_dev *dev)
 224 {
 225         struct mlx5_priv *priv = dev->data->dev_private;
 226         struct mlx5_ibv_shared *sh = priv->sh;
 227
 228         if (sh->dv_refcnt > 1) {
 229                 int ret;
 230
 231                 ret = pthread_mutex_lock(&sh->dv_mutex);
 232                 assert(!ret);
 233                 (void)ret;
 234         }
 235 }
 236
 237 static void
 238 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 239 {
 240         struct mlx5_priv *priv = dev->data->dev_private;
 241         struct mlx5_ibv_shared *sh = priv->sh;
 242
 243         if (sh->dv_refcnt > 1) {
 244                 int ret;
 245
 246                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 247                 assert(!ret);
 248                 (void)ret;
 249         }
 250 }
 251
 252 /* Update VLAN's VID/PCP based on input rte_flow_action.
 253  *
 254  * @param[in] action
 255  *   Pointer to struct rte_flow_action.
 256  * @param[out] vlan
 257  *   Pointer to struct rte_vlan_hdr.
 258  */
 259 static void
 260 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 261                          struct rte_vlan_hdr *vlan)
 262 {
 263         uint16_t vlan_tci;
 264         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 265                 vlan_tci =
 266                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 267                                                action->conf)->vlan_pcp;
 268                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 269                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 270                 vlan->vlan_tci |= vlan_tci;
 271         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 272                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 273                 vlan->vlan_tci |= rte_be_to_cpu_16
 274                     (((const struct rte_flow_action_of_set_vlan_vid *)
 275                                              action->conf)->vlan_vid);
 276         }
 277 }
 278
 279 /**
 280  * Fetch 1, 2, 3 or 4 byte field from the byte array
 281  * and return as unsigned integer in host-endian format.
 282  *
 283  * @param[in] data
 284  *   Pointer to data array.
 285  * @param[in] size
 286  *   Size of field to extract.
 287  *
 288  * @return
 289  *   converted field in host endian format.
 290  */
 291 static inline uint32_t
 292 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 293 {
 294         uint32_t ret;
 295
 296         switch (size) {
 297         case 1:
 298                 ret = *data;
 299                 break;
 300         case 2:
 301                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 302                 break;
 303         case 3:
 304                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 305                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 306                 break;
 307         case 4:
 308                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 309                 break;
 310         default:
 311                 assert(false);
 312                 ret = 0;
 313                 break;
 314         }
 315         return ret;
 316 }
 317
 318 /**
 319  * Convert modify-header action to DV specification.
 320  *
 321  * Data length of each action is determined by provided field description
 322  * and the item mask. Data bit offset and width of each action is determined
 323  * by provided item mask.
 324  *
 325  * @param[in] item
 326  *   Pointer to item specification.
 327  * @param[in] field
 328  *   Pointer to field modification information.
 329  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 330  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 331  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 332  * @param[in] dcopy
 333  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 334  *   Negative offset value sets the same offset as source offset.
 335  *   size field is ignored, value is taken from source field.
 336  * @param[in,out] resource
 337  *   Pointer to the modify-header resource.
 338  * @param[in] type
 339  *   Type of modification.
 340  * @param[out] error
 341  *   Pointer to the error structure.
 342  *
 343  * @return
 344  *   0 on success, a negative errno value otherwise and rte_errno is set.
 345  */
 346 static int
 347 flow_dv_convert_modify_action(struct rte_flow_item *item,
 348                               struct field_modify_info *field,
 349                               struct field_modify_info *dcopy,
 350                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 351                               uint32_t type, struct rte_flow_error *error)
 352 {
 353         uint32_t i = resource->actions_num;
 354         struct mlx5_modification_cmd *actions = resource->actions;
 355
 356         /*
 357          * The item and mask are provided in big-endian format.
 358          * The fields should be presented as in big-endian format either.
 359          * Mask must be always present, it defines the actual field width.
 360          */
 361         assert(item->mask);
 362         assert(field->size);
 363         do {
 364                 unsigned int size_b;
 365                 unsigned int off_b;
 366                 uint32_t mask;
 367                 uint32_t data;
 368
 369                 if (i >= MLX5_MAX_MODIFY_NUM)
 370                         return rte_flow_error_set(error, EINVAL,
 371                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 372                                  "too many items to modify");
 373                 /* Fetch variable byte size mask from the array. */
 374                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 375                                            field->offset, field->size);
 376                 if (!mask) {
 377                         ++field;
 378                         continue;
 379                 }
 380                 /* Deduce actual data width in bits from mask value. */
 381                 off_b = rte_bsf32(mask);
 382                 size_b = sizeof(uint32_t) * CHAR_BIT -
 383                          off_b - __builtin_clz(mask);
 384                 assert(size_b);
 385                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 386                 actions[i].action_type = type;
 387                 actions[i].field = field->id;
 388                 actions[i].offset = off_b;
 389                 actions[i].length = size_b;
 390                 /* Convert entire record to expected big-endian format. */
 391                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 392                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 393                         assert(dcopy);
 394                         actions[i].dst_field = dcopy->id;
 395                         actions[i].dst_offset =
 396                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 397                         /* Convert entire record to big-endian format. */
 398                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 399                 } else {
 400                         assert(item->spec);
 401                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 402                                                    field->offset, field->size);
 403                         /* Shift out the trailing masked bits from data. */
 404                         data = (data & mask) >> off_b;
 405                         actions[i].data1 = rte_cpu_to_be_32(data);
 406                 }
 407                 ++i;
 408                 ++field;
 409         } while (field->size);
 410         if (resource->actions_num == i)
 411                 return rte_flow_error_set(error, EINVAL,
 412                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 413                                           "invalid modification flow item");
 414         resource->actions_num = i;
 415         return 0;
 416 }
 417
 418 /**
 419  * Convert modify-header set IPv4 address action to DV specification.
 420  *
 421  * @param[in,out] resource
 422  *   Pointer to the modify-header resource.
 423  * @param[in] action
 424  *   Pointer to action specification.
 425  * @param[out] error
 426  *   Pointer to the error structure.
 427  *
 428  * @return
 429  *   0 on success, a negative errno value otherwise and rte_errno is set.
 430  */
 431 static int
 432 flow_dv_convert_action_modify_ipv4
 433                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 434                          const struct rte_flow_action *action,
 435                          struct rte_flow_error *error)
 436 {
 437         const struct rte_flow_action_set_ipv4 *conf =
 438                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 439         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 440         struct rte_flow_item_ipv4 ipv4;
 441         struct rte_flow_item_ipv4 ipv4_mask;
 442
 443         memset(&ipv4, 0, sizeof(ipv4));
 444         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 445         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 446                 ipv4.hdr.src_addr = conf->ipv4_addr;
 447                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 448         } else {
 449                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 450                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 451         }
 452         item.spec = &ipv4;
 453         item.mask = &ipv4_mask;
 454         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 455                                              MLX5_MODIFICATION_TYPE_SET, error);
 456 }
 457
 458 /**
 459  * Convert modify-header set IPv6 address action to DV specification.
 460  *
 461  * @param[in,out] resource
 462  *   Pointer to the modify-header resource.
 463  * @param[in] action
 464  *   Pointer to action specification.
 465  * @param[out] error
 466  *   Pointer to the error structure.
 467  *
 468  * @return
 469  *   0 on success, a negative errno value otherwise and rte_errno is set.
 470  */
 471 static int
 472 flow_dv_convert_action_modify_ipv6
 473                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 474                          const struct rte_flow_action *action,
 475                          struct rte_flow_error *error)
 476 {
 477         const struct rte_flow_action_set_ipv6 *conf =
 478                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 479         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 480         struct rte_flow_item_ipv6 ipv6;
 481         struct rte_flow_item_ipv6 ipv6_mask;
 482
 483         memset(&ipv6, 0, sizeof(ipv6));
 484         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 485         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 486                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 487                        sizeof(ipv6.hdr.src_addr));
 488                 memcpy(&ipv6_mask.hdr.src_addr,
 489                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 490                        sizeof(ipv6.hdr.src_addr));
 491         } else {
 492                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 493                        sizeof(ipv6.hdr.dst_addr));
 494                 memcpy(&ipv6_mask.hdr.dst_addr,
 495                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 496                        sizeof(ipv6.hdr.dst_addr));
 497         }
 498         item.spec = &ipv6;
 499         item.mask = &ipv6_mask;
 500         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 501                                              MLX5_MODIFICATION_TYPE_SET, error);
 502 }
 503
 504 /**
 505  * Convert modify-header set MAC address action to DV specification.
 506  *
 507  * @param[in,out] resource
 508  *   Pointer to the modify-header resource.
 509  * @param[in] action
 510  *   Pointer to action specification.
 511  * @param[out] error
 512  *   Pointer to the error structure.
 513  *
 514  * @return
 515  *   0 on success, a negative errno value otherwise and rte_errno is set.
 516  */
 517 static int
 518 flow_dv_convert_action_modify_mac
 519                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 520                          const struct rte_flow_action *action,
 521                          struct rte_flow_error *error)
 522 {
 523         const struct rte_flow_action_set_mac *conf =
 524                 (const struct rte_flow_action_set_mac *)(action->conf);
 525         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 526         struct rte_flow_item_eth eth;
 527         struct rte_flow_item_eth eth_mask;
 528
 529         memset(&eth, 0, sizeof(eth));
 530         memset(&eth_mask, 0, sizeof(eth_mask));
 531         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 532                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 533                        sizeof(eth.src.addr_bytes));
 534                 memcpy(&eth_mask.src.addr_bytes,
 535                        &rte_flow_item_eth_mask.src.addr_bytes,
 536                        sizeof(eth_mask.src.addr_bytes));
 537         } else {
 538                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 539                        sizeof(eth.dst.addr_bytes));
 540                 memcpy(&eth_mask.dst.addr_bytes,
 541                        &rte_flow_item_eth_mask.dst.addr_bytes,
 542                        sizeof(eth_mask.dst.addr_bytes));
 543         }
 544         item.spec = &eth;
 545         item.mask = &eth_mask;
 546         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 547                                              MLX5_MODIFICATION_TYPE_SET, error);
 548 }
 549
 550 /**
 551  * Convert modify-header set VLAN VID action to DV specification.
 552  *
 553  * @param[in,out] resource
 554  *   Pointer to the modify-header resource.
 555  * @param[in] action
 556  *   Pointer to action specification.
 557  * @param[out] error
 558  *   Pointer to the error structure.
 559  *
 560  * @return
 561  *   0 on success, a negative errno value otherwise and rte_errno is set.
 562  */
 563 static int
 564 flow_dv_convert_action_modify_vlan_vid
 565                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 566                          const struct rte_flow_action *action,
 567                          struct rte_flow_error *error)
 568 {
 569         const struct rte_flow_action_of_set_vlan_vid *conf =
 570                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 571         int i = resource->actions_num;
 572         struct mlx5_modification_cmd *actions = &resource->actions[i];
 573         struct field_modify_info *field = modify_vlan_out_first_vid;
 574
 575         if (i >= MLX5_MAX_MODIFY_NUM)
 576                 return rte_flow_error_set(error, EINVAL,
 577                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 578                          "too many items to modify");
 579         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 580         actions[i].field = field->id;
 581         actions[i].length = field->size;
 582         actions[i].offset = field->offset;
 583         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 584         actions[i].data1 = conf->vlan_vid;
 585         actions[i].data1 = actions[i].data1 << 16;
 586         resource->actions_num = ++i;
 587         return 0;
 588 }
 589
 590 /**
 591  * Convert modify-header set TP action to DV specification.
 592  *
 593  * @param[in,out] resource
 594  *   Pointer to the modify-header resource.
 595  * @param[in] action
 596  *   Pointer to action specification.
 597  * @param[in] items
 598  *   Pointer to rte_flow_item objects list.
 599  * @param[in] attr
 600  *   Pointer to flow attributes structure.
 601  * @param[out] error
 602  *   Pointer to the error structure.
 603  *
 604  * @return
 605  *   0 on success, a negative errno value otherwise and rte_errno is set.
 606  */
 607 static int
 608 flow_dv_convert_action_modify_tp
 609                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 610                          const struct rte_flow_action *action,
 611                          const struct rte_flow_item *items,
 612                          union flow_dv_attr *attr,
 613                          struct rte_flow_error *error)
 614 {
 615         const struct rte_flow_action_set_tp *conf =
 616                 (const struct rte_flow_action_set_tp *)(action->conf);
 617         struct rte_flow_item item;
 618         struct rte_flow_item_udp udp;
 619         struct rte_flow_item_udp udp_mask;
 620         struct rte_flow_item_tcp tcp;
 621         struct rte_flow_item_tcp tcp_mask;
 622         struct field_modify_info *field;
 623
 624         if (!attr->valid)
 625                 flow_dv_attr_init(items, attr);
 626         if (attr->udp) {
 627                 memset(&udp, 0, sizeof(udp));
 628                 memset(&udp_mask, 0, sizeof(udp_mask));
 629                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 630                         udp.hdr.src_port = conf->port;
 631                         udp_mask.hdr.src_port =
 632                                         rte_flow_item_udp_mask.hdr.src_port;
 633                 } else {
 634                         udp.hdr.dst_port = conf->port;
 635                         udp_mask.hdr.dst_port =
 636                                         rte_flow_item_udp_mask.hdr.dst_port;
 637                 }
 638                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 639                 item.spec = &udp;
 640                 item.mask = &udp_mask;
 641                 field = modify_udp;
 642         }
 643         if (attr->tcp) {
 644                 memset(&tcp, 0, sizeof(tcp));
 645                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 646                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 647                         tcp.hdr.src_port = conf->port;
 648                         tcp_mask.hdr.src_port =
 649                                         rte_flow_item_tcp_mask.hdr.src_port;
 650                 } else {
 651                         tcp.hdr.dst_port = conf->port;
 652                         tcp_mask.hdr.dst_port =
 653                                         rte_flow_item_tcp_mask.hdr.dst_port;
 654                 }
 655                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 656                 item.spec = &tcp;
 657                 item.mask = &tcp_mask;
 658                 field = modify_tcp;
 659         }
 660         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 661                                              MLX5_MODIFICATION_TYPE_SET, error);
 662 }
 663
 664 /**
 665  * Convert modify-header set TTL action to DV specification.
 666  *
 667  * @param[in,out] resource
 668  *   Pointer to the modify-header resource.
 669  * @param[in] action
 670  *   Pointer to action specification.
 671  * @param[in] items
 672  *   Pointer to rte_flow_item objects list.
 673  * @param[in] attr
 674  *   Pointer to flow attributes structure.
 675  * @param[out] error
 676  *   Pointer to the error structure.
 677  *
 678  * @return
 679  *   0 on success, a negative errno value otherwise and rte_errno is set.
 680  */
 681 static int
 682 flow_dv_convert_action_modify_ttl
 683                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 684                          const struct rte_flow_action *action,
 685                          const struct rte_flow_item *items,
 686                          union flow_dv_attr *attr,
 687                          struct rte_flow_error *error)
 688 {
 689         const struct rte_flow_action_set_ttl *conf =
 690                 (const struct rte_flow_action_set_ttl *)(action->conf);
 691         struct rte_flow_item item;
 692         struct rte_flow_item_ipv4 ipv4;
 693         struct rte_flow_item_ipv4 ipv4_mask;
 694         struct rte_flow_item_ipv6 ipv6;
 695         struct rte_flow_item_ipv6 ipv6_mask;
 696         struct field_modify_info *field;
 697
 698         if (!attr->valid)
 699                 flow_dv_attr_init(items, attr);
 700         if (attr->ipv4) {
 701                 memset(&ipv4, 0, sizeof(ipv4));
 702                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 703                 ipv4.hdr.time_to_live = conf->ttl_value;
 704                 ipv4_mask.hdr.time_to_live = 0xFF;
 705                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 706                 item.spec = &ipv4;
 707                 item.mask = &ipv4_mask;
 708                 field = modify_ipv4;
 709         }
 710         if (attr->ipv6) {
 711                 memset(&ipv6, 0, sizeof(ipv6));
 712                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 713                 ipv6.hdr.hop_limits = conf->ttl_value;
 714                 ipv6_mask.hdr.hop_limits = 0xFF;
 715                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 716                 item.spec = &ipv6;
 717                 item.mask = &ipv6_mask;
 718                 field = modify_ipv6;
 719         }
 720         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 721                                              MLX5_MODIFICATION_TYPE_SET, error);
 722 }
 723
 724 /**
 725  * Convert modify-header decrement TTL action to DV specification.
 726  *
 727  * @param[in,out] resource
 728  *   Pointer to the modify-header resource.
 729  * @param[in] action
 730  *   Pointer to action specification.
 731  * @param[in] items
 732  *   Pointer to rte_flow_item objects list.
 733  * @param[in] attr
 734  *   Pointer to flow attributes structure.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_dec_ttl
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_item *items,
 745                          union flow_dv_attr *attr,
 746                          struct rte_flow_error *error)
 747 {
 748         struct rte_flow_item item;
 749         struct rte_flow_item_ipv4 ipv4;
 750         struct rte_flow_item_ipv4 ipv4_mask;
 751         struct rte_flow_item_ipv6 ipv6;
 752         struct rte_flow_item_ipv6 ipv6_mask;
 753         struct field_modify_info *field;
 754
 755         if (!attr->valid)
 756                 flow_dv_attr_init(items, attr);
 757         if (attr->ipv4) {
 758                 memset(&ipv4, 0, sizeof(ipv4));
 759                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 760                 ipv4.hdr.time_to_live = 0xFF;
 761                 ipv4_mask.hdr.time_to_live = 0xFF;
 762                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 763                 item.spec = &ipv4;
 764                 item.mask = &ipv4_mask;
 765                 field = modify_ipv4;
 766         }
 767         if (attr->ipv6) {
 768                 memset(&ipv6, 0, sizeof(ipv6));
 769                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 770                 ipv6.hdr.hop_limits = 0xFF;
 771                 ipv6_mask.hdr.hop_limits = 0xFF;
 772                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 773                 item.spec = &ipv6;
 774                 item.mask = &ipv6_mask;
 775                 field = modify_ipv6;
 776         }
 777         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 778                                              MLX5_MODIFICATION_TYPE_ADD, error);
 779 }
 780
 781 /**
 782  * Convert modify-header increment/decrement TCP Sequence number
 783  * to DV specification.
 784  *
 785  * @param[in,out] resource
 786  *   Pointer to the modify-header resource.
 787  * @param[in] action
 788  *   Pointer to action specification.
 789  * @param[out] error
 790  *   Pointer to the error structure.
 791  *
 792  * @return
 793  *   0 on success, a negative errno value otherwise and rte_errno is set.
 794  */
 795 static int
 796 flow_dv_convert_action_modify_tcp_seq
 797                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 798                          const struct rte_flow_action *action,
 799                          struct rte_flow_error *error)
 800 {
 801         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 802         uint64_t value = rte_be_to_cpu_32(*conf);
 803         struct rte_flow_item item;
 804         struct rte_flow_item_tcp tcp;
 805         struct rte_flow_item_tcp tcp_mask;
 806
 807         memset(&tcp, 0, sizeof(tcp));
 808         memset(&tcp_mask, 0, sizeof(tcp_mask));
 809         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 810                 /*
 811                  * The HW has no decrement operation, only increment operation.
 812                  * To simulate decrement X from Y using increment operation
 813                  * we need to add UINT32_MAX X times to Y.
 814                  * Each adding of UINT32_MAX decrements Y by 1.
 815                  */
 816                 value *= UINT32_MAX;
 817         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 818         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 819         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 820         item.spec = &tcp;
 821         item.mask = &tcp_mask;
 822         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 823                                              MLX5_MODIFICATION_TYPE_ADD, error);
 824 }
 825
 826 /**
 827  * Convert modify-header increment/decrement TCP Acknowledgment number
 828  * to DV specification.
 829  *
 830  * @param[in,out] resource
 831  *   Pointer to the modify-header resource.
 832  * @param[in] action
 833  *   Pointer to action specification.
 834  * @param[out] error
 835  *   Pointer to the error structure.
 836  *
 837  * @return
 838  *   0 on success, a negative errno value otherwise and rte_errno is set.
 839  */
 840 static int
 841 flow_dv_convert_action_modify_tcp_ack
 842                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 843                          const struct rte_flow_action *action,
 844                          struct rte_flow_error *error)
 845 {
 846         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 847         uint64_t value = rte_be_to_cpu_32(*conf);
 848         struct rte_flow_item item;
 849         struct rte_flow_item_tcp tcp;
 850         struct rte_flow_item_tcp tcp_mask;
 851
 852         memset(&tcp, 0, sizeof(tcp));
 853         memset(&tcp_mask, 0, sizeof(tcp_mask));
 854         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 855                 /*
 856                  * The HW has no decrement operation, only increment operation.
 857                  * To simulate decrement X from Y using increment operation
 858                  * we need to add UINT32_MAX X times to Y.
 859                  * Each adding of UINT32_MAX decrements Y by 1.
 860                  */
 861                 value *= UINT32_MAX;
 862         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 863         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 864         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 865         item.spec = &tcp;
 866         item.mask = &tcp_mask;
 867         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 868                                              MLX5_MODIFICATION_TYPE_ADD, error);
 869 }
 870
 871 static enum mlx5_modification_field reg_to_field[] = {
 872         [REG_NONE] = MLX5_MODI_OUT_NONE,
 873         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 874         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 875         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 876         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 877         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 878         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 879         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 880         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 881         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 882         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 883 };
 884
 885 /**
 886  * Convert register set to DV specification.
 887  *
 888  * @param[in,out] resource
 889  *   Pointer to the modify-header resource.
 890  * @param[in] action
 891  *   Pointer to action specification.
 892  * @param[out] error
 893  *   Pointer to the error structure.
 894  *
 895  * @return
 896  *   0 on success, a negative errno value otherwise and rte_errno is set.
 897  */
 898 static int
 899 flow_dv_convert_action_set_reg
 900                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 901                          const struct rte_flow_action *action,
 902                          struct rte_flow_error *error)
 903 {
 904         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 905         struct mlx5_modification_cmd *actions = resource->actions;
 906         uint32_t i = resource->actions_num;
 907
 908         if (i >= MLX5_MAX_MODIFY_NUM)
 909                 return rte_flow_error_set(error, EINVAL,
 910                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 911                                           "too many items to modify");
 912         assert(conf->id != REG_NONE);
 913         assert(conf->id < RTE_DIM(reg_to_field));
 914         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 915         actions[i].field = reg_to_field[conf->id];
 916         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 917         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 918         ++i;
 919         resource->actions_num = i;
 920         return 0;
 921 }
 922
 923 /**
 924  * Convert SET_TAG action to DV specification.
 925  *
 926  * @param[in] dev
 927  *   Pointer to the rte_eth_dev structure.
 928  * @param[in,out] resource
 929  *   Pointer to the modify-header resource.
 930  * @param[in] conf
 931  *   Pointer to action specification.
 932  * @param[out] error
 933  *   Pointer to the error structure.
 934  *
 935  * @return
 936  *   0 on success, a negative errno value otherwise and rte_errno is set.
 937  */
 938 static int
 939 flow_dv_convert_action_set_tag
 940                         (struct rte_eth_dev *dev,
 941                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 942                          const struct rte_flow_action_set_tag *conf,
 943                          struct rte_flow_error *error)
 944 {
 945         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 946         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 947         struct rte_flow_item item = {
 948                 .spec = &data,
 949                 .mask = &mask,
 950         };
 951         struct field_modify_info reg_c_x[] = {
 952                 [1] = {0, 0, 0},
 953         };
 954         enum mlx5_modification_field reg_type;
 955         int ret;
 956
 957         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 958         if (ret < 0)
 959                 return ret;
 960         assert(ret != REG_NONE);
 961         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 962         reg_type = reg_to_field[ret];
 963         assert(reg_type > 0);
 964         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 965         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 966                                              MLX5_MODIFICATION_TYPE_SET, error);
 967 }
 968
 969 /**
 970  * Convert internal COPY_REG action to DV specification.
 971  *
 972  * @param[in] dev
 973  *   Pointer to the rte_eth_dev structure.
 974  * @param[in,out] res
 975  *   Pointer to the modify-header resource.
 976  * @param[in] action
 977  *   Pointer to action specification.
 978  * @param[out] error
 979  *   Pointer to the error structure.
 980  *
 981  * @return
 982  *   0 on success, a negative errno value otherwise and rte_errno is set.
 983  */
 984 static int
 985 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 986                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 987                                  const struct rte_flow_action *action,
 988                                  struct rte_flow_error *error)
 989 {
 990         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 991         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 992         struct rte_flow_item item = {
 993                 .spec = NULL,
 994                 .mask = &mask,
 995         };
 996         struct field_modify_info reg_src[] = {
 997                 {4, 0, reg_to_field[conf->src]},
 998                 {0, 0, 0},
 999         };
1000         struct field_modify_info reg_dst = {
1001                 .offset = 0,
1002                 .id = reg_to_field[conf->dst],
1003         };
1004         /* Adjust reg_c[0] usage according to reported mask. */
1005         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1006                 struct mlx5_priv *priv = dev->data->dev_private;
1007                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1008
1009                 assert(reg_c0);
1010                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1011                 if (conf->dst == REG_C_0) {
1012                         /* Copy to reg_c[0], within mask only. */
1013                         reg_dst.offset = rte_bsf32(reg_c0);
1014                         /*
1015                          * Mask is ignoring the enianness, because
1016                          * there is no conversion in datapath.
1017                          */
1018 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1019                         /* Copy from destination lower bits to reg_c[0]. */
1020                         mask = reg_c0 >> reg_dst.offset;
1021 #else
1022                         /* Copy from destination upper bits to reg_c[0]. */
1023                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1024                                           rte_fls_u32(reg_c0));
1025 #endif
1026                 } else {
1027                         mask = rte_cpu_to_be_32(reg_c0);
1028 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1029                         /* Copy from reg_c[0] to destination lower bits. */
1030                         reg_dst.offset = 0;
1031 #else
1032                         /* Copy from reg_c[0] to destination upper bits. */
1033                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1034                                          (rte_fls_u32(reg_c0) -
1035                                           rte_bsf32(reg_c0));
1036 #endif
1037                 }
1038         }
1039         return flow_dv_convert_modify_action(&item,
1040                                              reg_src, &reg_dst, res,
1041                                              MLX5_MODIFICATION_TYPE_COPY,
1042                                              error);
1043 }
1044
1045 /**
1046  * Convert MARK action to DV specification. This routine is used
1047  * in extensive metadata only and requires metadata register to be
1048  * handled. In legacy mode hardware tag resource is engaged.
1049  *
1050  * @param[in] dev
1051  *   Pointer to the rte_eth_dev structure.
1052  * @param[in] conf
1053  *   Pointer to MARK action specification.
1054  * @param[in,out] resource
1055  *   Pointer to the modify-header resource.
1056  * @param[out] error
1057  *   Pointer to the error structure.
1058  *
1059  * @return
1060  *   0 on success, a negative errno value otherwise and rte_errno is set.
1061  */
1062 static int
1063 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1064                             const struct rte_flow_action_mark *conf,
1065                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1066                             struct rte_flow_error *error)
1067 {
1068         struct mlx5_priv *priv = dev->data->dev_private;
1069         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1070                                            priv->sh->dv_mark_mask);
1071         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1072         struct rte_flow_item item = {
1073                 .spec = &data,
1074                 .mask = &mask,
1075         };
1076         struct field_modify_info reg_c_x[] = {
1077                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1078                 {0, 0, 0},
1079         };
1080         enum modify_reg reg;
1081
1082         if (!mask)
1083                 return rte_flow_error_set(error, EINVAL,
1084                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1085                                           NULL, "zero mark action mask");
1086         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1087         if (reg < 0)
1088                 return reg;
1089         assert(reg > 0);
1090         if (reg == REG_C_0) {
1091                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1092                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1093
1094                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1095                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1096                 mask = rte_cpu_to_be_32(mask << shl_c0);
1097         }
1098         reg_c_x[0].id = reg_to_field[reg];
1099         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1100                                              MLX5_MODIFICATION_TYPE_SET, error);
1101 }
1102
1103 /**
1104  * Get metadata register index for specified steering domain.
1105  *
1106  * @param[in] dev
1107  *   Pointer to the rte_eth_dev structure.
1108  * @param[in] attr
1109  *   Attributes of flow to determine steering domain.
1110  * @param[out] error
1111  *   Pointer to the error structure.
1112  *
1113  * @return
1114  *   positive index on success, a negative errno value otherwise
1115  *   and rte_errno is set.
1116  */
1117 static enum modify_reg
1118 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1119                          const struct rte_flow_attr *attr,
1120                          struct rte_flow_error *error)
1121 {
1122         enum modify_reg reg =
1123                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1124                                           MLX5_METADATA_FDB :
1125                                             attr->egress ?
1126                                             MLX5_METADATA_TX :
1127                                             MLX5_METADATA_RX, 0, error);
1128         if (reg < 0)
1129                 return rte_flow_error_set(error,
1130                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1131                                           NULL, "unavailable "
1132                                           "metadata register");
1133         return reg;
1134 }
1135
1136 /**
1137  * Convert SET_META action to DV specification.
1138  *
1139  * @param[in] dev
1140  *   Pointer to the rte_eth_dev structure.
1141  * @param[in,out] resource
1142  *   Pointer to the modify-header resource.
1143  * @param[in] attr
1144  *   Attributes of flow that includes this item.
1145  * @param[in] conf
1146  *   Pointer to action specification.
1147  * @param[out] error
1148  *   Pointer to the error structure.
1149  *
1150  * @return
1151  *   0 on success, a negative errno value otherwise and rte_errno is set.
1152  */
1153 static int
1154 flow_dv_convert_action_set_meta
1155                         (struct rte_eth_dev *dev,
1156                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1157                          const struct rte_flow_attr *attr,
1158                          const struct rte_flow_action_set_meta *conf,
1159                          struct rte_flow_error *error)
1160 {
1161         uint32_t data = conf->data;
1162         uint32_t mask = conf->mask;
1163         struct rte_flow_item item = {
1164                 .spec = &data,
1165                 .mask = &mask,
1166         };
1167         struct field_modify_info reg_c_x[] = {
1168                 [1] = {0, 0, 0},
1169         };
1170         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1171
1172         if (reg < 0)
1173                 return reg;
1174         /*
1175          * In datapath code there is no endianness
1176          * coversions for perfromance reasons, all
1177          * pattern conversions are done in rte_flow.
1178          */
1179         if (reg == REG_C_0) {
1180                 struct mlx5_priv *priv = dev->data->dev_private;
1181                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1182                 uint32_t shl_c0;
1183
1184                 assert(msk_c0);
1185 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1186                 shl_c0 = rte_bsf32(msk_c0);
1187 #else
1188                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1189 #endif
1190                 mask <<= shl_c0;
1191                 data <<= shl_c0;
1192                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1193         }
1194         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1195         /* The routine expects parameters in memory as big-endian ones. */
1196         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1197                                              MLX5_MODIFICATION_TYPE_SET, error);
1198 }
1199
1200 /**
1201  * Convert modify-header set IPv4 DSCP action to DV specification.
1202  *
1203  * @param[in,out] resource
1204  *   Pointer to the modify-header resource.
1205  * @param[in] action
1206  *   Pointer to action specification.
1207  * @param[out] error
1208  *   Pointer to the error structure.
1209  *
1210  * @return
1211  *   0 on success, a negative errno value otherwise and rte_errno is set.
1212  */
1213 static int
1214 flow_dv_convert_action_modify_ipv4_dscp
1215                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1216                          const struct rte_flow_action *action,
1217                          struct rte_flow_error *error)
1218 {
1219         const struct rte_flow_action_set_dscp *conf =
1220                 (const struct rte_flow_action_set_dscp *)(action->conf);
1221         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1222         struct rte_flow_item_ipv4 ipv4;
1223         struct rte_flow_item_ipv4 ipv4_mask;
1224
1225         memset(&ipv4, 0, sizeof(ipv4));
1226         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1227         ipv4.hdr.type_of_service = conf->dscp;
1228         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1229         item.spec = &ipv4;
1230         item.mask = &ipv4_mask;
1231         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1232                                              MLX5_MODIFICATION_TYPE_SET, error);
1233 }
1234
1235 /**
1236  * Convert modify-header set IPv6 DSCP action to DV specification.
1237  *
1238  * @param[in,out] resource
1239  *   Pointer to the modify-header resource.
1240  * @param[in] action
1241  *   Pointer to action specification.
1242  * @param[out] error
1243  *   Pointer to the error structure.
1244  *
1245  * @return
1246  *   0 on success, a negative errno value otherwise and rte_errno is set.
1247  */
1248 static int
1249 flow_dv_convert_action_modify_ipv6_dscp
1250                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1251                          const struct rte_flow_action *action,
1252                          struct rte_flow_error *error)
1253 {
1254         const struct rte_flow_action_set_dscp *conf =
1255                 (const struct rte_flow_action_set_dscp *)(action->conf);
1256         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1257         struct rte_flow_item_ipv6 ipv6;
1258         struct rte_flow_item_ipv6 ipv6_mask;
1259
1260         memset(&ipv6, 0, sizeof(ipv6));
1261         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1262         /*
1263          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1264          * rdma-core only accept the DSCP bits byte aligned start from
1265          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1266          * bits in IPv6 case as rdma-core requires byte aligned value.
1267          */
1268         ipv6.hdr.vtc_flow = conf->dscp;
1269         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1270         item.spec = &ipv6;
1271         item.mask = &ipv6_mask;
1272         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1273                                              MLX5_MODIFICATION_TYPE_SET, error);
1274 }
1275
1276 /**
1277  * Validate MARK item.
1278  *
1279  * @param[in] dev
1280  *   Pointer to the rte_eth_dev structure.
1281  * @param[in] item
1282  *   Item specification.
1283  * @param[in] attr
1284  *   Attributes of flow that includes this item.
1285  * @param[out] error
1286  *   Pointer to error structure.
1287  *
1288  * @return
1289  *   0 on success, a negative errno value otherwise and rte_errno is set.
1290  */
1291 static int
1292 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1293                            const struct rte_flow_item *item,
1294                            const struct rte_flow_attr *attr __rte_unused,
1295                            struct rte_flow_error *error)
1296 {
1297         struct mlx5_priv *priv = dev->data->dev_private;
1298         struct mlx5_dev_config *config = &priv->config;
1299         const struct rte_flow_item_mark *spec = item->spec;
1300         const struct rte_flow_item_mark *mask = item->mask;
1301         const struct rte_flow_item_mark nic_mask = {
1302                 .id = priv->sh->dv_mark_mask,
1303         };
1304         int ret;
1305
1306         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1307                 return rte_flow_error_set(error, ENOTSUP,
1308                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1309                                           "extended metadata feature"
1310                                           " isn't enabled");
1311         if (!mlx5_flow_ext_mreg_supported(dev))
1312                 return rte_flow_error_set(error, ENOTSUP,
1313                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1314                                           "extended metadata register"
1315                                           " isn't supported");
1316         if (!nic_mask.id)
1317                 return rte_flow_error_set(error, ENOTSUP,
1318                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1319                                           "extended metadata register"
1320                                           " isn't available");
1321         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1322         if (ret < 0)
1323                 return ret;
1324         if (!spec)
1325                 return rte_flow_error_set(error, EINVAL,
1326                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1327                                           item->spec,
1328                                           "data cannot be empty");
1329         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1330                 return rte_flow_error_set(error, EINVAL,
1331                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1332                                           &spec->id,
1333                                           "mark id exceeds the limit");
1334         if (!mask)
1335                 mask = &nic_mask;
1336         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1337                                         (const uint8_t *)&nic_mask,
1338                                         sizeof(struct rte_flow_item_mark),
1339                                         error);
1340         if (ret < 0)
1341                 return ret;
1342         return 0;
1343 }
1344
1345 /**
1346  * Validate META item.
1347  *
1348  * @param[in] dev
1349  *   Pointer to the rte_eth_dev structure.
1350  * @param[in] item
1351  *   Item specification.
1352  * @param[in] attr
1353  *   Attributes of flow that includes this item.
1354  * @param[out] error
1355  *   Pointer to error structure.
1356  *
1357  * @return
1358  *   0 on success, a negative errno value otherwise and rte_errno is set.
1359  */
1360 static int
1361 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1362                            const struct rte_flow_item *item,
1363                            const struct rte_flow_attr *attr,
1364                            struct rte_flow_error *error)
1365 {
1366         struct mlx5_priv *priv = dev->data->dev_private;
1367         struct mlx5_dev_config *config = &priv->config;
1368         const struct rte_flow_item_meta *spec = item->spec;
1369         const struct rte_flow_item_meta *mask = item->mask;
1370         struct rte_flow_item_meta nic_mask = {
1371                 .data = UINT32_MAX
1372         };
1373         enum modify_reg reg;
1374         int ret;
1375
1376         if (!spec)
1377                 return rte_flow_error_set(error, EINVAL,
1378                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1379                                           item->spec,
1380                                           "data cannot be empty");
1381         if (!spec->data)
1382                 return rte_flow_error_set(error, EINVAL,
1383                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1384                                           "data cannot be zero");
1385         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1386                 if (!mlx5_flow_ext_mreg_supported(dev))
1387                         return rte_flow_error_set(error, ENOTSUP,
1388                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1389                                           "extended metadata register"
1390                                           " isn't supported");
1391                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1392                 if (reg < 0)
1393                         return reg;
1394                 if (reg == REG_B)
1395                         return rte_flow_error_set(error, ENOTSUP,
1396                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1397                                           "match on reg_b "
1398                                           "isn't supported");
1399                 if (reg != REG_A)
1400                         nic_mask.data = priv->sh->dv_meta_mask;
1401         }
1402         if (!mask)
1403                 mask = &rte_flow_item_meta_mask;
1404         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1405                                         (const uint8_t *)&nic_mask,
1406                                         sizeof(struct rte_flow_item_meta),
1407                                         error);
1408         return ret;
1409 }
1410
1411 /**
1412  * Validate TAG item.
1413  *
1414  * @param[in] dev
1415  *   Pointer to the rte_eth_dev structure.
1416  * @param[in] item
1417  *   Item specification.
1418  * @param[in] attr
1419  *   Attributes of flow that includes this item.
1420  * @param[out] error
1421  *   Pointer to error structure.
1422  *
1423  * @return
1424  *   0 on success, a negative errno value otherwise and rte_errno is set.
1425  */
1426 static int
1427 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1428                           const struct rte_flow_item *item,
1429                           const struct rte_flow_attr *attr __rte_unused,
1430                           struct rte_flow_error *error)
1431 {
1432         const struct rte_flow_item_tag *spec = item->spec;
1433         const struct rte_flow_item_tag *mask = item->mask;
1434         const struct rte_flow_item_tag nic_mask = {
1435                 .data = RTE_BE32(UINT32_MAX),
1436                 .index = 0xff,
1437         };
1438         int ret;
1439
1440         if (!mlx5_flow_ext_mreg_supported(dev))
1441                 return rte_flow_error_set(error, ENOTSUP,
1442                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1443                                           "extensive metadata register"
1444                                           " isn't supported");
1445         if (!spec)
1446                 return rte_flow_error_set(error, EINVAL,
1447                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1448                                           item->spec,
1449                                           "data cannot be empty");
1450         if (!mask)
1451                 mask = &rte_flow_item_tag_mask;
1452         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1453                                         (const uint8_t *)&nic_mask,
1454                                         sizeof(struct rte_flow_item_tag),
1455                                         error);
1456         if (ret < 0)
1457                 return ret;
1458         if (mask->index != 0xff)
1459                 return rte_flow_error_set(error, EINVAL,
1460                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1461                                           "partial mask for tag index"
1462                                           " is not supported");
1463         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1464         if (ret < 0)
1465                 return ret;
1466         assert(ret != REG_NONE);
1467         return 0;
1468 }
1469
1470 /**
1471  * Validate vport item.
1472  *
1473  * @param[in] dev
1474  *   Pointer to the rte_eth_dev structure.
1475  * @param[in] item
1476  *   Item specification.
1477  * @param[in] attr
1478  *   Attributes of flow that includes this item.
1479  * @param[in] item_flags
1480  *   Bit-fields that holds the items detected until now.
1481  * @param[out] error
1482  *   Pointer to error structure.
1483  *
1484  * @return
1485  *   0 on success, a negative errno value otherwise and rte_errno is set.
1486  */
1487 static int
1488 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1489                               const struct rte_flow_item *item,
1490                               const struct rte_flow_attr *attr,
1491                               uint64_t item_flags,
1492                               struct rte_flow_error *error)
1493 {
1494         const struct rte_flow_item_port_id *spec = item->spec;
1495         const struct rte_flow_item_port_id *mask = item->mask;
1496         const struct rte_flow_item_port_id switch_mask = {
1497                         .id = 0xffffffff,
1498         };
1499         struct mlx5_priv *esw_priv;
1500         struct mlx5_priv *dev_priv;
1501         int ret;
1502
1503         if (!attr->transfer)
1504                 return rte_flow_error_set(error, EINVAL,
1505                                           RTE_FLOW_ERROR_TYPE_ITEM,
1506                                           NULL,
1507                                           "match on port id is valid only"
1508                                           " when transfer flag is enabled");
1509         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1510                 return rte_flow_error_set(error, ENOTSUP,
1511                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1512                                           "multiple source ports are not"
1513                                           " supported");
1514         if (!mask)
1515                 mask = &switch_mask;
1516         if (mask->id != 0xffffffff)
1517                 return rte_flow_error_set(error, ENOTSUP,
1518                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1519                                            mask,
1520                                            "no support for partial mask on"
1521                                            " \"id\" field");
1522         ret = mlx5_flow_item_acceptable
1523                                 (item, (const uint8_t *)mask,
1524                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1525                                  sizeof(struct rte_flow_item_port_id),
1526                                  error);
1527         if (ret)
1528                 return ret;
1529         if (!spec)
1530                 return 0;
1531         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1532         if (!esw_priv)
1533                 return rte_flow_error_set(error, rte_errno,
1534                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1535                                           "failed to obtain E-Switch info for"
1536                                           " port");
1537         dev_priv = mlx5_dev_to_eswitch_info(dev);
1538         if (!dev_priv)
1539                 return rte_flow_error_set(error, rte_errno,
1540                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1541                                           NULL,
1542                                           "failed to obtain E-Switch info");
1543         if (esw_priv->domain_id != dev_priv->domain_id)
1544                 return rte_flow_error_set(error, EINVAL,
1545                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1546                                           "cannot match on a port from a"
1547                                           " different E-Switch");
1548         return 0;
1549 }
1550
1551 /**
1552  * Validate GTP item.
1553  *
1554  * @param[in] dev
1555  *   Pointer to the rte_eth_dev structure.
1556  * @param[in] item
1557  *   Item specification.
1558  * @param[in] item_flags
1559  *   Bit-fields that holds the items detected until now.
1560  * @param[out] error
1561  *   Pointer to error structure.
1562  *
1563  * @return
1564  *   0 on success, a negative errno value otherwise and rte_errno is set.
1565  */
1566 static int
1567 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1568                           const struct rte_flow_item *item,
1569                           uint64_t item_flags,
1570                           struct rte_flow_error *error)
1571 {
1572         struct mlx5_priv *priv = dev->data->dev_private;
1573         const struct rte_flow_item_gtp *mask = item->mask;
1574         const struct rte_flow_item_gtp nic_mask = {
1575                 .msg_type = 0xff,
1576                 .teid = RTE_BE32(0xffffffff),
1577         };
1578
1579         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1580                 return rte_flow_error_set(error, ENOTSUP,
1581                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1582                                           "GTP support is not enabled");
1583         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1584                 return rte_flow_error_set(error, ENOTSUP,
1585                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1586                                           "multiple tunnel layers not"
1587                                           " supported");
1588         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1589                 return rte_flow_error_set(error, EINVAL,
1590                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1591                                           "no outer UDP layer found");
1592         if (!mask)
1593                 mask = &rte_flow_item_gtp_mask;
1594         return mlx5_flow_item_acceptable
1595                 (item, (const uint8_t *)mask,
1596                  (const uint8_t *)&nic_mask,
1597                  sizeof(struct rte_flow_item_gtp),
1598                  error);
1599 }
1600
1601 /**
1602  * Validate the pop VLAN action.
1603  *
1604  * @param[in] dev
1605  *   Pointer to the rte_eth_dev structure.
1606  * @param[in] action_flags
1607  *   Holds the actions detected until now.
1608  * @param[in] action
1609  *   Pointer to the pop vlan action.
1610  * @param[in] item_flags
1611  *   The items found in this flow rule.
1612  * @param[in] attr
1613  *   Pointer to flow attributes.
1614  * @param[out] error
1615  *   Pointer to error structure.
1616  *
1617  * @return
1618  *   0 on success, a negative errno value otherwise and rte_errno is set.
1619  */
1620 static int
1621 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1622                                  uint64_t action_flags,
1623                                  const struct rte_flow_action *action,
1624                                  uint64_t item_flags,
1625                                  const struct rte_flow_attr *attr,
1626                                  struct rte_flow_error *error)
1627 {
1628         struct mlx5_priv *priv = dev->data->dev_private;
1629
1630         (void)action;
1631         (void)attr;
1632         if (!priv->sh->pop_vlan_action)
1633                 return rte_flow_error_set(error, ENOTSUP,
1634                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1635                                           NULL,
1636                                           "pop vlan action is not supported");
1637         /*
1638          * Check for inconsistencies:
1639          *  fail strip_vlan in a flow that matches packets without VLAN tags.
1640          *  fail strip_vlan in a flow that matches packets without explicitly a
1641          *  matching on VLAN tag ?
1642          */
1643         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
1644                 return rte_flow_error_set(error, ENOTSUP,
1645                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1646                                           NULL,
1647                                           "no support for multiple vlan pop "
1648                                           "actions");
1649         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1650                 return rte_flow_error_set(error, ENOTSUP,
1651                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1652                                           NULL,
1653                                           "cannot pop vlan without a "
1654                                           "match on (outer) vlan in the flow");
1655         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1656                 return rte_flow_error_set(error, EINVAL,
1657                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1658                                           "wrong action order, port_id should "
1659                                           "be after pop VLAN action");
1660         return 0;
1661 }
1662
1663 /**
1664  * Get VLAN default info from vlan match info.
1665  *
1666  * @param[in] dev
1667  *   Pointer to the rte_eth_dev structure.
1668  * @param[in] item
1669  *   the list of item specifications.
1670  * @param[out] vlan
1671  *   pointer VLAN info to fill to.
1672  * @param[out] error
1673  *   Pointer to error structure.
1674  *
1675  * @return
1676  *   0 on success, a negative errno value otherwise and rte_errno is set.
1677  */
1678 static void
1679 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1680                                   struct rte_vlan_hdr *vlan)
1681 {
1682         const struct rte_flow_item_vlan nic_mask = {
1683                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1684                                 MLX5DV_FLOW_VLAN_VID_MASK),
1685                 .inner_type = RTE_BE16(0xffff),
1686         };
1687
1688         if (items == NULL)
1689                 return;
1690         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1691                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1692                 ;
1693         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1694                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1695                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1696
1697                 if (!vlan_m)
1698                         vlan_m = &nic_mask;
1699                 /* Only full match values are accepted */
1700                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1701                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1702                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1703                         vlan->vlan_tci |=
1704                                 rte_be_to_cpu_16(vlan_v->tci &
1705                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1706                 }
1707                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1708                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1709                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1710                         vlan->vlan_tci |=
1711                                 rte_be_to_cpu_16(vlan_v->tci &
1712                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1713                 }
1714                 if (vlan_m->inner_type == nic_mask.inner_type)
1715                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1716                                                            vlan_m->inner_type);
1717         }
1718 }
1719
1720 /**
1721  * Validate the push VLAN action.
1722  *
1723  * @param[in] action_flags
1724  *   Holds the actions detected until now.
1725  * @param[in] action
1726  *   Pointer to the encap action.
1727  * @param[in] attr
1728  *   Pointer to flow attributes
1729  * @param[out] error
1730  *   Pointer to error structure.
1731  *
1732  * @return
1733  *   0 on success, a negative errno value otherwise and rte_errno is set.
1734  */
1735 static int
1736 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1737                                   uint64_t item_flags __rte_unused,
1738                                   const struct rte_flow_action *action,
1739                                   const struct rte_flow_attr *attr,
1740                                   struct rte_flow_error *error)
1741 {
1742         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1743
1744         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1745             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1746                 return rte_flow_error_set(error, EINVAL,
1747                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1748                                           "invalid vlan ethertype");
1749         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1750                 return rte_flow_error_set(error, ENOTSUP,
1751                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1752                                           "no support for multiple VLAN "
1753                                           "actions");
1754         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1755                 return rte_flow_error_set(error, EINVAL,
1756                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1757                                           "wrong action order, port_id should "
1758                                           "be after push VLAN");
1759         (void)attr;
1760         return 0;
1761 }
1762
1763 /**
1764  * Validate the set VLAN PCP.
1765  *
1766  * @param[in] action_flags
1767  *   Holds the actions detected until now.
1768  * @param[in] actions
1769  *   Pointer to the list of actions remaining in the flow rule.
1770  * @param[in] attr
1771  *   Pointer to flow attributes
1772  * @param[out] error
1773  *   Pointer to error structure.
1774  *
1775  * @return
1776  *   0 on success, a negative errno value otherwise and rte_errno is set.
1777  */
1778 static int
1779 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1780                                      const struct rte_flow_action actions[],
1781                                      struct rte_flow_error *error)
1782 {
1783         const struct rte_flow_action *action = actions;
1784         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1785
1786         if (conf->vlan_pcp > 7)
1787                 return rte_flow_error_set(error, EINVAL,
1788                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1789                                           "VLAN PCP value is too big");
1790         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1791                 return rte_flow_error_set(error, ENOTSUP,
1792                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1793                                           "set VLAN PCP action must follow "
1794                                           "the push VLAN action");
1795         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1796                 return rte_flow_error_set(error, ENOTSUP,
1797                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1798                                           "Multiple VLAN PCP modification are "
1799                                           "not supported");
1800         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1801                 return rte_flow_error_set(error, EINVAL,
1802                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1803                                           "wrong action order, port_id should "
1804                                           "be after set VLAN PCP");
1805         return 0;
1806 }
1807
1808 /**
1809  * Validate the set VLAN VID.
1810  *
1811  * @param[in] item_flags
1812  *   Holds the items detected in this rule.
1813  * @param[in] actions
1814  *   Pointer to the list of actions remaining in the flow rule.
1815  * @param[in] attr
1816  *   Pointer to flow attributes
1817  * @param[out] error
1818  *   Pointer to error structure.
1819  *
1820  * @return
1821  *   0 on success, a negative errno value otherwise and rte_errno is set.
1822  */
1823 static int
1824 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1825                                      uint64_t action_flags,
1826                                      const struct rte_flow_action actions[],
1827                                      struct rte_flow_error *error)
1828 {
1829         const struct rte_flow_action *action = actions;
1830         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1831
1832         if (conf->vlan_vid > RTE_BE16(0xFFE))
1833                 return rte_flow_error_set(error, EINVAL,
1834                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1835                                           "VLAN VID value is too big");
1836         /* there is an of_push_vlan action before us */
1837         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1838                 if (mlx5_flow_find_action(actions + 1,
1839                                           RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1840                         return rte_flow_error_set(error, ENOTSUP,
1841                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
1842                                         "Multiple VLAN VID modifications are "
1843                                         "not supported");
1844                 else
1845                         return 0;
1846         }
1847
1848         /*
1849          * Action is on an existing VLAN header:
1850          *    Need to verify this is a single modify CID action.
1851          *   Rule mast include a match on outer VLAN.
1852          */
1853         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1854                 return rte_flow_error_set(error, ENOTSUP,
1855                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1856                                           "Multiple VLAN VID modifications are "
1857                                           "not supported");
1858         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1859                 return rte_flow_error_set(error, EINVAL,
1860                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1861                                           "match on VLAN is required in order "
1862                                           "to set VLAN VID");
1863         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1864                 return rte_flow_error_set(error, EINVAL,
1865                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1866                                           "wrong action order, port_id should "
1867                                           "be after set VLAN VID");
1868         return 0;
1869 }
1870
1871 /*
1872  * Validate the FLAG action.
1873  *
1874  * @param[in] dev
1875  *   Pointer to the rte_eth_dev structure.
1876  * @param[in] action_flags
1877  *   Holds the actions detected until now.
1878  * @param[in] attr
1879  *   Pointer to flow attributes
1880  * @param[out] error
1881  *   Pointer to error structure.
1882  *
1883  * @return
1884  *   0 on success, a negative errno value otherwise and rte_errno is set.
1885  */
1886 static int
1887 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1888                              uint64_t action_flags,
1889                              const struct rte_flow_attr *attr,
1890                              struct rte_flow_error *error)
1891 {
1892         struct mlx5_priv *priv = dev->data->dev_private;
1893         struct mlx5_dev_config *config = &priv->config;
1894         int ret;
1895
1896         /* Fall back if no extended metadata register support. */
1897         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1898                 return mlx5_flow_validate_action_flag(action_flags, attr,
1899                                                       error);
1900         /* Extensive metadata mode requires registers. */
1901         if (!mlx5_flow_ext_mreg_supported(dev))
1902                 return rte_flow_error_set(error, ENOTSUP,
1903                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1904                                           "no metadata registers "
1905                                           "to support flag action");
1906         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1907                 return rte_flow_error_set(error, ENOTSUP,
1908                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1909                                           "extended metadata register"
1910                                           " isn't available");
1911         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1912         if (ret < 0)
1913                 return ret;
1914         assert(ret > 0);
1915         if (action_flags & MLX5_FLOW_ACTION_MARK)
1916                 return rte_flow_error_set(error, EINVAL,
1917                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1918                                           "can't mark and flag in same flow");
1919         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1920                 return rte_flow_error_set(error, EINVAL,
1921                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1922                                           "can't have 2 flag"
1923                                           " actions in same flow");
1924         return 0;
1925 }
1926
1927 /**
1928  * Validate MARK action.
1929  *
1930  * @param[in] dev
1931  *   Pointer to the rte_eth_dev structure.
1932  * @param[in] action
1933  *   Pointer to action.
1934  * @param[in] action_flags
1935  *   Holds the actions detected until now.
1936  * @param[in] attr
1937  *   Pointer to flow attributes
1938  * @param[out] error
1939  *   Pointer to error structure.
1940  *
1941  * @return
1942  *   0 on success, a negative errno value otherwise and rte_errno is set.
1943  */
1944 static int
1945 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1946                              const struct rte_flow_action *action,
1947                              uint64_t action_flags,
1948                              const struct rte_flow_attr *attr,
1949                              struct rte_flow_error *error)
1950 {
1951         struct mlx5_priv *priv = dev->data->dev_private;
1952         struct mlx5_dev_config *config = &priv->config;
1953         const struct rte_flow_action_mark *mark = action->conf;
1954         int ret;
1955
1956         /* Fall back if no extended metadata register support. */
1957         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1958                 return mlx5_flow_validate_action_mark(action, action_flags,
1959                                                       attr, error);
1960         /* Extensive metadata mode requires registers. */
1961         if (!mlx5_flow_ext_mreg_supported(dev))
1962                 return rte_flow_error_set(error, ENOTSUP,
1963                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1964                                           "no metadata registers "
1965                                           "to support mark action");
1966         if (!priv->sh->dv_mark_mask)
1967                 return rte_flow_error_set(error, ENOTSUP,
1968                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1969                                           "extended metadata register"
1970                                           " isn't available");
1971         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1972         if (ret < 0)
1973                 return ret;
1974         assert(ret > 0);
1975         if (!mark)
1976                 return rte_flow_error_set(error, EINVAL,
1977                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1978                                           "configuration cannot be null");
1979         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1980                 return rte_flow_error_set(error, EINVAL,
1981                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1982                                           &mark->id,
1983                                           "mark id exceeds the limit");
1984         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1985                 return rte_flow_error_set(error, EINVAL,
1986                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1987                                           "can't flag and mark in same flow");
1988         if (action_flags & MLX5_FLOW_ACTION_MARK)
1989                 return rte_flow_error_set(error, EINVAL,
1990                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1991                                           "can't have 2 mark actions in same"
1992                                           " flow");
1993         return 0;
1994 }
1995
1996 /**
1997  * Validate SET_META action.
1998  *
1999  * @param[in] dev
2000  *   Pointer to the rte_eth_dev structure.
2001  * @param[in] action
2002  *   Pointer to the encap action.
2003  * @param[in] action_flags
2004  *   Holds the actions detected until now.
2005  * @param[in] attr
2006  *   Pointer to flow attributes
2007  * @param[out] error
2008  *   Pointer to error structure.
2009  *
2010  * @return
2011  *   0 on success, a negative errno value otherwise and rte_errno is set.
2012  */
2013 static int
2014 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2015                                  const struct rte_flow_action *action,
2016                                  uint64_t action_flags __rte_unused,
2017                                  const struct rte_flow_attr *attr,
2018                                  struct rte_flow_error *error)
2019 {
2020         const struct rte_flow_action_set_meta *conf;
2021         uint32_t nic_mask = UINT32_MAX;
2022         enum modify_reg reg;
2023
2024         if (!mlx5_flow_ext_mreg_supported(dev))
2025                 return rte_flow_error_set(error, ENOTSUP,
2026                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2027                                           "extended metadata register"
2028                                           " isn't supported");
2029         reg = flow_dv_get_metadata_reg(dev, attr, error);
2030         if (reg < 0)
2031                 return reg;
2032         if (reg != REG_A && reg != REG_B) {
2033                 struct mlx5_priv *priv = dev->data->dev_private;
2034
2035                 nic_mask = priv->sh->dv_meta_mask;
2036         }
2037         if (!(action->conf))
2038                 return rte_flow_error_set(error, EINVAL,
2039                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2040                                           "configuration cannot be null");
2041         conf = (const struct rte_flow_action_set_meta *)action->conf;
2042         if (!conf->mask)
2043                 return rte_flow_error_set(error, EINVAL,
2044                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2045                                           "zero mask doesn't have any effect");
2046         if (conf->mask & ~nic_mask)
2047                 return rte_flow_error_set(error, EINVAL,
2048                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2049                                           "meta data must be within reg C0");
2050         if (!(conf->data & conf->mask))
2051                 return rte_flow_error_set(error, EINVAL,
2052                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2053                                           "zero value has no effect");
2054         return 0;
2055 }
2056
2057 /**
2058  * Validate SET_TAG action.
2059  *
2060  * @param[in] dev
2061  *   Pointer to the rte_eth_dev structure.
2062  * @param[in] action
2063  *   Pointer to the encap action.
2064  * @param[in] action_flags
2065  *   Holds the actions detected until now.
2066  * @param[in] attr
2067  *   Pointer to flow attributes
2068  * @param[out] error
2069  *   Pointer to error structure.
2070  *
2071  * @return
2072  *   0 on success, a negative errno value otherwise and rte_errno is set.
2073  */
2074 static int
2075 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2076                                 const struct rte_flow_action *action,
2077                                 uint64_t action_flags,
2078                                 const struct rte_flow_attr *attr,
2079                                 struct rte_flow_error *error)
2080 {
2081         const struct rte_flow_action_set_tag *conf;
2082         const uint64_t terminal_action_flags =
2083                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2084                 MLX5_FLOW_ACTION_RSS;
2085         int ret;
2086
2087         if (!mlx5_flow_ext_mreg_supported(dev))
2088                 return rte_flow_error_set(error, ENOTSUP,
2089                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2090                                           "extensive metadata register"
2091                                           " isn't supported");
2092         if (!(action->conf))
2093                 return rte_flow_error_set(error, EINVAL,
2094                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2095                                           "configuration cannot be null");
2096         conf = (const struct rte_flow_action_set_tag *)action->conf;
2097         if (!conf->mask)
2098                 return rte_flow_error_set(error, EINVAL,
2099                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2100                                           "zero mask doesn't have any effect");
2101         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2102         if (ret < 0)
2103                 return ret;
2104         if (!attr->transfer && attr->ingress &&
2105             (action_flags & terminal_action_flags))
2106                 return rte_flow_error_set(error, EINVAL,
2107                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2108                                           "set_tag has no effect"
2109                                           " with terminal actions");
2110         return 0;
2111 }
2112
2113 /**
2114  * Validate count action.
2115  *
2116  * @param[in] dev
2117  *   device otr.
2118  * @param[out] error
2119  *   Pointer to error structure.
2120  *
2121  * @return
2122  *   0 on success, a negative errno value otherwise and rte_errno is set.
2123  */
2124 static int
2125 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2126                               struct rte_flow_error *error)
2127 {
2128         struct mlx5_priv *priv = dev->data->dev_private;
2129
2130         if (!priv->config.devx)
2131                 goto notsup_err;
2132 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2133         return 0;
2134 #endif
2135 notsup_err:
2136         return rte_flow_error_set
2137                       (error, ENOTSUP,
2138                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2139                        NULL,
2140                        "count action not supported");
2141 }
2142
2143 /**
2144  * Validate the L2 encap action.
2145  *
2146  * @param[in] action_flags
2147  *   Holds the actions detected until now.
2148  * @param[in] action
2149  *   Pointer to the encap action.
2150  * @param[in] attr
2151  *   Pointer to flow attributes
2152  * @param[out] error
2153  *   Pointer to error structure.
2154  *
2155  * @return
2156  *   0 on success, a negative errno value otherwise and rte_errno is set.
2157  */
2158 static int
2159 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2160                                  const struct rte_flow_action *action,
2161                                  const struct rte_flow_attr *attr,
2162                                  struct rte_flow_error *error)
2163 {
2164         if (!(action->conf))
2165                 return rte_flow_error_set(error, EINVAL,
2166                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2167                                           "configuration cannot be null");
2168         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2169                 return rte_flow_error_set(error, EINVAL,
2170                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2171                                           "can only have a single encap or"
2172                                           " decap action in a flow");
2173         if (!attr->transfer && attr->ingress)
2174                 return rte_flow_error_set(error, ENOTSUP,
2175                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2176                                           NULL,
2177                                           "encap action not supported for "
2178                                           "ingress");
2179         return 0;
2180 }
2181
2182 /**
2183  * Validate the L2 decap action.
2184  *
2185  * @param[in] action_flags
2186  *   Holds the actions detected until now.
2187  * @param[in] attr
2188  *   Pointer to flow attributes
2189  * @param[out] error
2190  *   Pointer to error structure.
2191  *
2192  * @return
2193  *   0 on success, a negative errno value otherwise and rte_errno is set.
2194  */
2195 static int
2196 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2197                                  const struct rte_flow_attr *attr,
2198                                  struct rte_flow_error *error)
2199 {
2200         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2201                 return rte_flow_error_set(error, EINVAL,
2202                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2203                                           "can only have a single encap or"
2204                                           " decap action in a flow");
2205         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2206                 return rte_flow_error_set(error, EINVAL,
2207                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2208                                           "can't have decap action after"
2209                                           " modify action");
2210         if (attr->egress)
2211                 return rte_flow_error_set(error, ENOTSUP,
2212                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2213                                           NULL,
2214                                           "decap action not supported for "
2215                                           "egress");
2216         return 0;
2217 }
2218
2219 /**
2220  * Validate the raw encap action.
2221  *
2222  * @param[in] action_flags
2223  *   Holds the actions detected until now.
2224  * @param[in] action
2225  *   Pointer to the encap action.
2226  * @param[in] attr
2227  *   Pointer to flow attributes
2228  * @param[out] error
2229  *   Pointer to error structure.
2230  *
2231  * @return
2232  *   0 on success, a negative errno value otherwise and rte_errno is set.
2233  */
2234 static int
2235 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2236                                   const struct rte_flow_action *action,
2237                                   const struct rte_flow_attr *attr,
2238                                   struct rte_flow_error *error)
2239 {
2240         const struct rte_flow_action_raw_encap *raw_encap =
2241                 (const struct rte_flow_action_raw_encap *)action->conf;
2242         if (!(action->conf))
2243                 return rte_flow_error_set(error, EINVAL,
2244                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2245                                           "configuration cannot be null");
2246         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2247                 return rte_flow_error_set(error, EINVAL,
2248                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2249                                           "can only have a single encap"
2250                                           " action in a flow");
2251         /* encap without preceding decap is not supported for ingress */
2252         if (!attr->transfer &&  attr->ingress &&
2253             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2254                 return rte_flow_error_set(error, ENOTSUP,
2255                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2256                                           NULL,
2257                                           "encap action not supported for "
2258                                           "ingress");
2259         if (!raw_encap->size || !raw_encap->data)
2260                 return rte_flow_error_set(error, EINVAL,
2261                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2262                                           "raw encap data cannot be empty");
2263         return 0;
2264 }
2265
2266 /**
2267  * Validate the raw decap action.
2268  *
2269  * @param[in] action_flags
2270  *   Holds the actions detected until now.
2271  * @param[in] action
2272  *   Pointer to the encap action.
2273  * @param[in] attr
2274  *   Pointer to flow attributes
2275  * @param[out] error
2276  *   Pointer to error structure.
2277  *
2278  * @return
2279  *   0 on success, a negative errno value otherwise and rte_errno is set.
2280  */
2281 static int
2282 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2283                                   const struct rte_flow_action *action,
2284                                   const struct rte_flow_attr *attr,
2285                                   struct rte_flow_error *error)
2286 {
2287         const struct rte_flow_action_raw_decap *decap   = action->conf;
2288
2289         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2290                 return rte_flow_error_set(error, EINVAL,
2291                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2292                                           "can't have encap action before"
2293                                           " decap action");
2294         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2295                 return rte_flow_error_set(error, EINVAL,
2296                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2297                                           "can only have a single decap"
2298                                           " action in a flow");
2299         /* decap action is valid on egress only if it is followed by encap */
2300         if (attr->egress && decap &&
2301             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2302                 return rte_flow_error_set(error, ENOTSUP,
2303                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2304                                           NULL, "decap action not supported"
2305                                           " for egress");
2306         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2307                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2308                 return rte_flow_error_set(error, EINVAL,
2309                                           RTE_FLOW_ERROR_TYPE_ACTION,
2310                                           NULL,
2311                                           "can't have decap action "
2312                                           "after modify action");
2313         }
2314         return 0;
2315 }
2316
2317 /**
2318  * Find existing encap/decap resource or create and register a new one.
2319  *
2320  * @param[in, out] dev
2321  *   Pointer to rte_eth_dev structure.
2322  * @param[in, out] resource
2323  *   Pointer to encap/decap resource.
2324  * @parm[in, out] dev_flow
2325  *   Pointer to the dev_flow.
2326  * @param[out] error
2327  *   pointer to error structure.
2328  *
2329  * @return
2330  *   0 on success otherwise -errno and errno is set.
2331  */
2332 static int
2333 flow_dv_encap_decap_resource_register
2334                         (struct rte_eth_dev *dev,
2335                          struct mlx5_flow_dv_encap_decap_resource *resource,
2336                          struct mlx5_flow *dev_flow,
2337                          struct rte_flow_error *error)
2338 {
2339         struct mlx5_priv *priv = dev->data->dev_private;
2340         struct mlx5_ibv_shared *sh = priv->sh;
2341         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2342         struct mlx5dv_dr_domain *domain;
2343
2344         resource->flags = dev_flow->group ? 0 : 1;
2345         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2346                 domain = sh->fdb_domain;
2347         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2348                 domain = sh->rx_domain;
2349         else
2350                 domain = sh->tx_domain;
2351         /* Lookup a matching resource from cache. */
2352         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2353                 if (resource->reformat_type == cache_resource->reformat_type &&
2354                     resource->ft_type == cache_resource->ft_type &&
2355                     resource->flags == cache_resource->flags &&
2356                     resource->size == cache_resource->size &&
2357                     !memcmp((const void *)resource->buf,
2358                             (const void *)cache_resource->buf,
2359                             resource->size)) {
2360                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2361                                 (void *)cache_resource,
2362                                 rte_atomic32_read(&cache_resource->refcnt));
2363                         rte_atomic32_inc(&cache_resource->refcnt);
2364                         dev_flow->dv.encap_decap = cache_resource;
2365                         return 0;
2366                 }
2367         }
2368         /* Register new encap/decap resource. */
2369         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2370         if (!cache_resource)
2371                 return rte_flow_error_set(error, ENOMEM,
2372                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2373                                           "cannot allocate resource memory");
2374         *cache_resource = *resource;
2375         cache_resource->verbs_action =
2376                 mlx5_glue->dv_create_flow_action_packet_reformat
2377                         (sh->ctx, cache_resource->reformat_type,
2378                          cache_resource->ft_type, domain, cache_resource->flags,
2379                          cache_resource->size,
2380                          (cache_resource->size ? cache_resource->buf : NULL));
2381         if (!cache_resource->verbs_action) {
2382                 rte_free(cache_resource);
2383                 return rte_flow_error_set(error, ENOMEM,
2384                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2385                                           NULL, "cannot create action");
2386         }
2387         rte_atomic32_init(&cache_resource->refcnt);
2388         rte_atomic32_inc(&cache_resource->refcnt);
2389         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2390         dev_flow->dv.encap_decap = cache_resource;
2391         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2392                 (void *)cache_resource,
2393                 rte_atomic32_read(&cache_resource->refcnt));
2394         return 0;
2395 }
2396
2397 /**
2398  * Find existing table jump resource or create and register a new one.
2399  *
2400  * @param[in, out] dev
2401  *   Pointer to rte_eth_dev structure.
2402  * @param[in, out] tbl
2403  *   Pointer to flow table resource.
2404  * @parm[in, out] dev_flow
2405  *   Pointer to the dev_flow.
2406  * @param[out] error
2407  *   pointer to error structure.
2408  *
2409  * @return
2410  *   0 on success otherwise -errno and errno is set.
2411  */
2412 static int
2413 flow_dv_jump_tbl_resource_register
2414                         (struct rte_eth_dev *dev __rte_unused,
2415                          struct mlx5_flow_tbl_resource *tbl,
2416                          struct mlx5_flow *dev_flow,
2417                          struct rte_flow_error *error)
2418 {
2419         struct mlx5_flow_tbl_data_entry *tbl_data =
2420                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2421         int cnt;
2422
2423         assert(tbl);
2424         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2425         if (!cnt) {
2426                 tbl_data->jump.action =
2427                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2428                         (tbl->obj);
2429                 if (!tbl_data->jump.action)
2430                         return rte_flow_error_set(error, ENOMEM,
2431                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2432                                         NULL, "cannot create jump action");
2433                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2434                         (void *)&tbl_data->jump, cnt);
2435         } else {
2436                 assert(tbl_data->jump.action);
2437                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2438                         (void *)&tbl_data->jump, cnt);
2439         }
2440         rte_atomic32_inc(&tbl_data->jump.refcnt);
2441         dev_flow->dv.jump = &tbl_data->jump;
2442         return 0;
2443 }
2444
2445 /**
2446  * Find existing table port ID resource or create and register a new one.
2447  *
2448  * @param[in, out] dev
2449  *   Pointer to rte_eth_dev structure.
2450  * @param[in, out] resource
2451  *   Pointer to port ID action resource.
2452  * @parm[in, out] dev_flow
2453  *   Pointer to the dev_flow.
2454  * @param[out] error
2455  *   pointer to error structure.
2456  *
2457  * @return
2458  *   0 on success otherwise -errno and errno is set.
2459  */
2460 static int
2461 flow_dv_port_id_action_resource_register
2462                         (struct rte_eth_dev *dev,
2463                          struct mlx5_flow_dv_port_id_action_resource *resource,
2464                          struct mlx5_flow *dev_flow,
2465                          struct rte_flow_error *error)
2466 {
2467         struct mlx5_priv *priv = dev->data->dev_private;
2468         struct mlx5_ibv_shared *sh = priv->sh;
2469         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2470
2471         /* Lookup a matching resource from cache. */
2472         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2473                 if (resource->port_id == cache_resource->port_id) {
2474                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2475                                 "refcnt %d++",
2476                                 (void *)cache_resource,
2477                                 rte_atomic32_read(&cache_resource->refcnt));
2478                         rte_atomic32_inc(&cache_resource->refcnt);
2479                         dev_flow->dv.port_id_action = cache_resource;
2480                         return 0;
2481                 }
2482         }
2483         /* Register new port id action resource. */
2484         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2485         if (!cache_resource)
2486                 return rte_flow_error_set(error, ENOMEM,
2487                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2488                                           "cannot allocate resource memory");
2489         *cache_resource = *resource;
2490         /*
2491          * Depending on rdma_core version the glue routine calls
2492          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2493          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2494          */
2495         cache_resource->action =
2496                 mlx5_glue->dr_create_flow_action_dest_port
2497                         (priv->sh->fdb_domain, resource->port_id);
2498         if (!cache_resource->action) {
2499                 rte_free(cache_resource);
2500                 return rte_flow_error_set(error, ENOMEM,
2501                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2502                                           NULL, "cannot create action");
2503         }
2504         rte_atomic32_init(&cache_resource->refcnt);
2505         rte_atomic32_inc(&cache_resource->refcnt);
2506         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2507         dev_flow->dv.port_id_action = cache_resource;
2508         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2509                 (void *)cache_resource,
2510                 rte_atomic32_read(&cache_resource->refcnt));
2511         return 0;
2512 }
2513
2514 /**
2515  * Find existing push vlan resource or create and register a new one.
2516  *
2517  * @param [in, out] dev
2518  *   Pointer to rte_eth_dev structure.
2519  * @param[in, out] resource
2520  *   Pointer to port ID action resource.
2521  * @parm[in, out] dev_flow
2522  *   Pointer to the dev_flow.
2523  * @param[out] error
2524  *   pointer to error structure.
2525  *
2526  * @return
2527  *   0 on success otherwise -errno and errno is set.
2528  */
2529 static int
2530 flow_dv_push_vlan_action_resource_register
2531                        (struct rte_eth_dev *dev,
2532                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2533                         struct mlx5_flow *dev_flow,
2534                         struct rte_flow_error *error)
2535 {
2536         struct mlx5_priv *priv = dev->data->dev_private;
2537         struct mlx5_ibv_shared *sh = priv->sh;
2538         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2539         struct mlx5dv_dr_domain *domain;
2540
2541         /* Lookup a matching resource from cache. */
2542         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2543                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2544                     resource->ft_type == cache_resource->ft_type) {
2545                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2546                                 "refcnt %d++",
2547                                 (void *)cache_resource,
2548                                 rte_atomic32_read(&cache_resource->refcnt));
2549                         rte_atomic32_inc(&cache_resource->refcnt);
2550                         dev_flow->dv.push_vlan_res = cache_resource;
2551                         return 0;
2552                 }
2553         }
2554         /* Register new push_vlan action resource. */
2555         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2556         if (!cache_resource)
2557                 return rte_flow_error_set(error, ENOMEM,
2558                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2559                                           "cannot allocate resource memory");
2560         *cache_resource = *resource;
2561         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2562                 domain = sh->fdb_domain;
2563         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2564                 domain = sh->rx_domain;
2565         else
2566                 domain = sh->tx_domain;
2567         cache_resource->action =
2568                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2569                                                            resource->vlan_tag);
2570         if (!cache_resource->action) {
2571                 rte_free(cache_resource);
2572                 return rte_flow_error_set(error, ENOMEM,
2573                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2574                                           NULL, "cannot create action");
2575         }
2576         rte_atomic32_init(&cache_resource->refcnt);
2577         rte_atomic32_inc(&cache_resource->refcnt);
2578         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2579         dev_flow->dv.push_vlan_res = cache_resource;
2580         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2581                 (void *)cache_resource,
2582                 rte_atomic32_read(&cache_resource->refcnt));
2583         return 0;
2584 }
2585 /**
2586  * Get the size of specific rte_flow_item_type
2587  *
2588  * @param[in] item_type
2589  *   Tested rte_flow_item_type.
2590  *
2591  * @return
2592  *   sizeof struct item_type, 0 if void or irrelevant.
2593  */
2594 static size_t
2595 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2596 {
2597         size_t retval;
2598
2599         switch (item_type) {
2600         case RTE_FLOW_ITEM_TYPE_ETH:
2601                 retval = sizeof(struct rte_flow_item_eth);
2602                 break;
2603         case RTE_FLOW_ITEM_TYPE_VLAN:
2604                 retval = sizeof(struct rte_flow_item_vlan);
2605                 break;
2606         case RTE_FLOW_ITEM_TYPE_IPV4:
2607                 retval = sizeof(struct rte_flow_item_ipv4);
2608                 break;
2609         case RTE_FLOW_ITEM_TYPE_IPV6:
2610                 retval = sizeof(struct rte_flow_item_ipv6);
2611                 break;
2612         case RTE_FLOW_ITEM_TYPE_UDP:
2613                 retval = sizeof(struct rte_flow_item_udp);
2614                 break;
2615         case RTE_FLOW_ITEM_TYPE_TCP:
2616                 retval = sizeof(struct rte_flow_item_tcp);
2617                 break;
2618         case RTE_FLOW_ITEM_TYPE_VXLAN:
2619                 retval = sizeof(struct rte_flow_item_vxlan);
2620                 break;
2621         case RTE_FLOW_ITEM_TYPE_GRE:
2622                 retval = sizeof(struct rte_flow_item_gre);
2623                 break;
2624         case RTE_FLOW_ITEM_TYPE_NVGRE:
2625                 retval = sizeof(struct rte_flow_item_nvgre);
2626                 break;
2627         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2628                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2629                 break;
2630         case RTE_FLOW_ITEM_TYPE_MPLS:
2631                 retval = sizeof(struct rte_flow_item_mpls);
2632                 break;
2633         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2634         default:
2635                 retval = 0;
2636                 break;
2637         }
2638         return retval;
2639 }
2640
2641 #define MLX5_ENCAP_IPV4_VERSION         0x40
2642 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2643 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2644 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2645 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2646 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2647 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2648
2649 /**
2650  * Convert the encap action data from list of rte_flow_item to raw buffer
2651  *
2652  * @param[in] items
2653  *   Pointer to rte_flow_item objects list.
2654  * @param[out] buf
2655  *   Pointer to the output buffer.
2656  * @param[out] size
2657  *   Pointer to the output buffer size.
2658  * @param[out] error
2659  *   Pointer to the error structure.
2660  *
2661  * @return
2662  *   0 on success, a negative errno value otherwise and rte_errno is set.
2663  */
2664 static int
2665 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2666                            size_t *size, struct rte_flow_error *error)
2667 {
2668         struct rte_ether_hdr *eth = NULL;
2669         struct rte_vlan_hdr *vlan = NULL;
2670         struct rte_ipv4_hdr *ipv4 = NULL;
2671         struct rte_ipv6_hdr *ipv6 = NULL;
2672         struct rte_udp_hdr *udp = NULL;
2673         struct rte_vxlan_hdr *vxlan = NULL;
2674         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2675         struct rte_gre_hdr *gre = NULL;
2676         size_t len;
2677         size_t temp_size = 0;
2678
2679         if (!items)
2680                 return rte_flow_error_set(error, EINVAL,
2681                                           RTE_FLOW_ERROR_TYPE_ACTION,
2682                                           NULL, "invalid empty data");
2683         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2684                 len = flow_dv_get_item_len(items->type);
2685                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2686                         return rte_flow_error_set(error, EINVAL,
2687                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2688                                                   (void *)items->type,
2689                                                   "items total size is too big"
2690                                                   " for encap action");
2691                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2692                 switch (items->type) {
2693                 case RTE_FLOW_ITEM_TYPE_ETH:
2694                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2695                         break;
2696                 case RTE_FLOW_ITEM_TYPE_VLAN:
2697                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2698                         if (!eth)
2699                                 return rte_flow_error_set(error, EINVAL,
2700                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2701                                                 (void *)items->type,
2702                                                 "eth header not found");
2703                         if (!eth->ether_type)
2704                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2705                         break;
2706                 case RTE_FLOW_ITEM_TYPE_IPV4:
2707                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2708                         if (!vlan && !eth)
2709                                 return rte_flow_error_set(error, EINVAL,
2710                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2711                                                 (void *)items->type,
2712                                                 "neither eth nor vlan"
2713                                                 " header found");
2714                         if (vlan && !vlan->eth_proto)
2715                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2716                         else if (eth && !eth->ether_type)
2717                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2718                         if (!ipv4->version_ihl)
2719                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2720                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2721                         if (!ipv4->time_to_live)
2722                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2723                         break;
2724                 case RTE_FLOW_ITEM_TYPE_IPV6:
2725                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2726                         if (!vlan && !eth)
2727                                 return rte_flow_error_set(error, EINVAL,
2728                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2729                                                 (void *)items->type,
2730                                                 "neither eth nor vlan"
2731                                                 " header found");
2732                         if (vlan && !vlan->eth_proto)
2733                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2734                         else if (eth && !eth->ether_type)
2735                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2736                         if (!ipv6->vtc_flow)
2737                                 ipv6->vtc_flow =
2738                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2739                         if (!ipv6->hop_limits)
2740                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2741                         break;
2742                 case RTE_FLOW_ITEM_TYPE_UDP:
2743                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2744                         if (!ipv4 && !ipv6)
2745                                 return rte_flow_error_set(error, EINVAL,
2746                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2747                                                 (void *)items->type,
2748                                                 "ip header not found");
2749                         if (ipv4 && !ipv4->next_proto_id)
2750                                 ipv4->next_proto_id = IPPROTO_UDP;
2751                         else if (ipv6 && !ipv6->proto)
2752                                 ipv6->proto = IPPROTO_UDP;
2753                         break;
2754                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2755                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2756                         if (!udp)
2757                                 return rte_flow_error_set(error, EINVAL,
2758                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2759                                                 (void *)items->type,
2760                                                 "udp header not found");
2761                         if (!udp->dst_port)
2762                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2763                         if (!vxlan->vx_flags)
2764                                 vxlan->vx_flags =
2765                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2766                         break;
2767                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2768                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2769                         if (!udp)
2770                                 return rte_flow_error_set(error, EINVAL,
2771                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2772                                                 (void *)items->type,
2773                                                 "udp header not found");
2774                         if (!vxlan_gpe->proto)
2775                                 return rte_flow_error_set(error, EINVAL,
2776                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2777                                                 (void *)items->type,
2778                                                 "next protocol not found");
2779                         if (!udp->dst_port)
2780                                 udp->dst_port =
2781                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2782                         if (!vxlan_gpe->vx_flags)
2783                                 vxlan_gpe->vx_flags =
2784                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2785                         break;
2786                 case RTE_FLOW_ITEM_TYPE_GRE:
2787                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2788                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2789                         if (!gre->proto)
2790                                 return rte_flow_error_set(error, EINVAL,
2791                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2792                                                 (void *)items->type,
2793                                                 "next protocol not found");
2794                         if (!ipv4 && !ipv6)
2795                                 return rte_flow_error_set(error, EINVAL,
2796                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2797                                                 (void *)items->type,
2798                                                 "ip header not found");
2799                         if (ipv4 && !ipv4->next_proto_id)
2800                                 ipv4->next_proto_id = IPPROTO_GRE;
2801                         else if (ipv6 && !ipv6->proto)
2802                                 ipv6->proto = IPPROTO_GRE;
2803                         break;
2804                 case RTE_FLOW_ITEM_TYPE_VOID:
2805                         break;
2806                 default:
2807                         return rte_flow_error_set(error, EINVAL,
2808                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2809                                                   (void *)items->type,
2810                                                   "unsupported item type");
2811                         break;
2812                 }
2813                 temp_size += len;
2814         }
2815         *size = temp_size;
2816         return 0;
2817 }
2818
2819 static int
2820 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2821 {
2822         struct rte_ether_hdr *eth = NULL;
2823         struct rte_vlan_hdr *vlan = NULL;
2824         struct rte_ipv6_hdr *ipv6 = NULL;
2825         struct rte_udp_hdr *udp = NULL;
2826         char *next_hdr;
2827         uint16_t proto;
2828
2829         eth = (struct rte_ether_hdr *)data;
2830         next_hdr = (char *)(eth + 1);
2831         proto = RTE_BE16(eth->ether_type);
2832
2833         /* VLAN skipping */
2834         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2835                 vlan = (struct rte_vlan_hdr *)next_hdr;
2836                 proto = RTE_BE16(vlan->eth_proto);
2837                 next_hdr += sizeof(struct rte_vlan_hdr);
2838         }
2839
2840         /* HW calculates IPv4 csum. no need to proceed */
2841         if (proto == RTE_ETHER_TYPE_IPV4)
2842                 return 0;
2843
2844         /* non IPv4/IPv6 header. not supported */
2845         if (proto != RTE_ETHER_TYPE_IPV6) {
2846                 return rte_flow_error_set(error, ENOTSUP,
2847                                           RTE_FLOW_ERROR_TYPE_ACTION,
2848                                           NULL, "Cannot offload non IPv4/IPv6");
2849         }
2850
2851         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2852
2853         /* ignore non UDP */
2854         if (ipv6->proto != IPPROTO_UDP)
2855                 return 0;
2856
2857         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2858         udp->dgram_cksum = 0;
2859
2860         return 0;
2861 }
2862
2863 /**
2864  * Convert L2 encap action to DV specification.
2865  *
2866  * @param[in] dev
2867  *   Pointer to rte_eth_dev structure.
2868  * @param[in] action
2869  *   Pointer to action structure.
2870  * @param[in, out] dev_flow
2871  *   Pointer to the mlx5_flow.
2872  * @param[in] transfer
2873  *   Mark if the flow is E-Switch flow.
2874  * @param[out] error
2875  *   Pointer to the error structure.
2876  *
2877  * @return
2878  *   0 on success, a negative errno value otherwise and rte_errno is set.
2879  */
2880 static int
2881 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2882                                const struct rte_flow_action *action,
2883                                struct mlx5_flow *dev_flow,
2884                                uint8_t transfer,
2885                                struct rte_flow_error *error)
2886 {
2887         const struct rte_flow_item *encap_data;
2888         const struct rte_flow_action_raw_encap *raw_encap_data;
2889         struct mlx5_flow_dv_encap_decap_resource res = {
2890                 .reformat_type =
2891                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2892                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2893                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2894         };
2895
2896         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2897                 raw_encap_data =
2898                         (const struct rte_flow_action_raw_encap *)action->conf;
2899                 res.size = raw_encap_data->size;
2900                 memcpy(res.buf, raw_encap_data->data, res.size);
2901                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2902                         return -rte_errno;
2903         } else {
2904                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2905                         encap_data =
2906                                 ((const struct rte_flow_action_vxlan_encap *)
2907                                                 action->conf)->definition;
2908                 else
2909                         encap_data =
2910                                 ((const struct rte_flow_action_nvgre_encap *)
2911                                                 action->conf)->definition;
2912                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2913                                                &res.size, error))
2914                         return -rte_errno;
2915         }
2916         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2917                 return rte_flow_error_set(error, EINVAL,
2918                                           RTE_FLOW_ERROR_TYPE_ACTION,
2919                                           NULL, "can't create L2 encap action");
2920         return 0;
2921 }
2922
2923 /**
2924  * Convert L2 decap action to DV specification.
2925  *
2926  * @param[in] dev
2927  *   Pointer to rte_eth_dev structure.
2928  * @param[in, out] dev_flow
2929  *   Pointer to the mlx5_flow.
2930  * @param[in] transfer
2931  *   Mark if the flow is E-Switch flow.
2932  * @param[out] error
2933  *   Pointer to the error structure.
2934  *
2935  * @return
2936  *   0 on success, a negative errno value otherwise and rte_errno is set.
2937  */
2938 static int
2939 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2940                                struct mlx5_flow *dev_flow,
2941                                uint8_t transfer,
2942                                struct rte_flow_error *error)
2943 {
2944         struct mlx5_flow_dv_encap_decap_resource res = {
2945                 .size = 0,
2946                 .reformat_type =
2947                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2948                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2949                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2950         };
2951
2952         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2953                 return rte_flow_error_set(error, EINVAL,
2954                                           RTE_FLOW_ERROR_TYPE_ACTION,
2955                                           NULL, "can't create L2 decap action");
2956         return 0;
2957 }
2958
2959 /**
2960  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2961  *
2962  * @param[in] dev
2963  *   Pointer to rte_eth_dev structure.
2964  * @param[in] action
2965  *   Pointer to action structure.
2966  * @param[in, out] dev_flow
2967  *   Pointer to the mlx5_flow.
2968  * @param[in] attr
2969  *   Pointer to the flow attributes.
2970  * @param[out] error
2971  *   Pointer to the error structure.
2972  *
2973  * @return
2974  *   0 on success, a negative errno value otherwise and rte_errno is set.
2975  */
2976 static int
2977 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2978                                 const struct rte_flow_action *action,
2979                                 struct mlx5_flow *dev_flow,
2980                                 const struct rte_flow_attr *attr,
2981                                 struct rte_flow_error *error)
2982 {
2983         const struct rte_flow_action_raw_encap *encap_data;
2984         struct mlx5_flow_dv_encap_decap_resource res;
2985
2986         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2987         res.size = encap_data->size;
2988         memcpy(res.buf, encap_data->data, res.size);
2989         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
2990                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
2991                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
2992         if (attr->transfer)
2993                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2994         else
2995                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2996                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2997         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2998                 return rte_flow_error_set(error, EINVAL,
2999                                           RTE_FLOW_ERROR_TYPE_ACTION,
3000                                           NULL, "can't create encap action");
3001         return 0;
3002 }
3003
3004 /**
3005  * Create action push VLAN.
3006  *
3007  * @param[in] dev
3008  *   Pointer to rte_eth_dev structure.
3009  * @param[in] vlan_tag
3010  *   the vlan tag to push to the Ethernet header.
3011  * @param[in, out] dev_flow
3012  *   Pointer to the mlx5_flow.
3013  * @param[in] attr
3014  *   Pointer to the flow attributes.
3015  * @param[out] error
3016  *   Pointer to the error structure.
3017  *
3018  * @return
3019  *   0 on success, a negative errno value otherwise and rte_errno is set.
3020  */
3021 static int
3022 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3023                                 const struct rte_flow_attr *attr,
3024                                 const struct rte_vlan_hdr *vlan,
3025                                 struct mlx5_flow *dev_flow,
3026                                 struct rte_flow_error *error)
3027 {
3028         struct mlx5_flow_dv_push_vlan_action_resource res;
3029
3030         res.vlan_tag =
3031                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3032                                  vlan->vlan_tci);
3033         if (attr->transfer)
3034                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3035         else
3036                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3037                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3038         return flow_dv_push_vlan_action_resource_register
3039                                             (dev, &res, dev_flow, error);
3040 }
3041
3042 /**
3043  * Validate the modify-header actions.
3044  *
3045  * @param[in] action_flags
3046  *   Holds the actions detected until now.
3047  * @param[in] action
3048  *   Pointer to the modify action.
3049  * @param[out] error
3050  *   Pointer to error structure.
3051  *
3052  * @return
3053  *   0 on success, a negative errno value otherwise and rte_errno is set.
3054  */
3055 static int
3056 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3057                                    const struct rte_flow_action *action,
3058                                    struct rte_flow_error *error)
3059 {
3060         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3061                 return rte_flow_error_set(error, EINVAL,
3062                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3063                                           NULL, "action configuration not set");
3064         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
3065                 return rte_flow_error_set(error, EINVAL,
3066                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3067                                           "can't have encap action before"
3068                                           " modify action");
3069         return 0;
3070 }
3071
3072 /**
3073  * Validate the modify-header MAC address actions.
3074  *
3075  * @param[in] action_flags
3076  *   Holds the actions detected until now.
3077  * @param[in] action
3078  *   Pointer to the modify action.
3079  * @param[in] item_flags
3080  *   Holds the items detected.
3081  * @param[out] error
3082  *   Pointer to error structure.
3083  *
3084  * @return
3085  *   0 on success, a negative errno value otherwise and rte_errno is set.
3086  */
3087 static int
3088 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3089                                    const struct rte_flow_action *action,
3090                                    const uint64_t item_flags,
3091                                    struct rte_flow_error *error)
3092 {
3093         int ret = 0;
3094
3095         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3096         if (!ret) {
3097                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3098                         return rte_flow_error_set(error, EINVAL,
3099                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3100                                                   NULL,
3101                                                   "no L2 item in pattern");
3102         }
3103         return ret;
3104 }
3105
3106 /**
3107  * Validate the modify-header IPv4 address actions.
3108  *
3109  * @param[in] action_flags
3110  *   Holds the actions detected until now.
3111  * @param[in] action
3112  *   Pointer to the modify action.
3113  * @param[in] item_flags
3114  *   Holds the items detected.
3115  * @param[out] error
3116  *   Pointer to error structure.
3117  *
3118  * @return
3119  *   0 on success, a negative errno value otherwise and rte_errno is set.
3120  */
3121 static int
3122 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3123                                     const struct rte_flow_action *action,
3124                                     const uint64_t item_flags,
3125                                     struct rte_flow_error *error)
3126 {
3127         int ret = 0;
3128
3129         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3130         if (!ret) {
3131                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3132                         return rte_flow_error_set(error, EINVAL,
3133                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3134                                                   NULL,
3135                                                   "no ipv4 item in pattern");
3136         }
3137         return ret;
3138 }
3139
3140 /**
3141  * Validate the modify-header IPv6 address actions.
3142  *
3143  * @param[in] action_flags
3144  *   Holds the actions detected until now.
3145  * @param[in] action
3146  *   Pointer to the modify action.
3147  * @param[in] item_flags
3148  *   Holds the items detected.
3149  * @param[out] error
3150  *   Pointer to error structure.
3151  *
3152  * @return
3153  *   0 on success, a negative errno value otherwise and rte_errno is set.
3154  */
3155 static int
3156 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3157                                     const struct rte_flow_action *action,
3158                                     const uint64_t item_flags,
3159                                     struct rte_flow_error *error)
3160 {
3161         int ret = 0;
3162
3163         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3164         if (!ret) {
3165                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3166                         return rte_flow_error_set(error, EINVAL,
3167                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3168                                                   NULL,
3169                                                   "no ipv6 item in pattern");
3170         }
3171         return ret;
3172 }
3173
3174 /**
3175  * Validate the modify-header TP actions.
3176  *
3177  * @param[in] action_flags
3178  *   Holds the actions detected until now.
3179  * @param[in] action
3180  *   Pointer to the modify action.
3181  * @param[in] item_flags
3182  *   Holds the items detected.
3183  * @param[out] error
3184  *   Pointer to error structure.
3185  *
3186  * @return
3187  *   0 on success, a negative errno value otherwise and rte_errno is set.
3188  */
3189 static int
3190 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3191                                   const struct rte_flow_action *action,
3192                                   const uint64_t item_flags,
3193                                   struct rte_flow_error *error)
3194 {
3195         int ret = 0;
3196
3197         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3198         if (!ret) {
3199                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3200                         return rte_flow_error_set(error, EINVAL,
3201                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3202                                                   NULL, "no transport layer "
3203                                                   "in pattern");
3204         }
3205         return ret;
3206 }
3207
3208 /**
3209  * Validate the modify-header actions of increment/decrement
3210  * TCP Sequence-number.
3211  *
3212  * @param[in] action_flags
3213  *   Holds the actions detected until now.
3214  * @param[in] action
3215  *   Pointer to the modify action.
3216  * @param[in] item_flags
3217  *   Holds the items detected.
3218  * @param[out] error
3219  *   Pointer to error structure.
3220  *
3221  * @return
3222  *   0 on success, a negative errno value otherwise and rte_errno is set.
3223  */
3224 static int
3225 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3226                                        const struct rte_flow_action *action,
3227                                        const uint64_t item_flags,
3228                                        struct rte_flow_error *error)
3229 {
3230         int ret = 0;
3231
3232         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3233         if (!ret) {
3234                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3235                         return rte_flow_error_set(error, EINVAL,
3236                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3237                                                   NULL, "no TCP item in"
3238                                                   " pattern");
3239                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3240                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3241                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3242                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3243                         return rte_flow_error_set(error, EINVAL,
3244                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3245                                                   NULL,
3246                                                   "cannot decrease and increase"
3247                                                   " TCP sequence number"
3248                                                   " at the same time");
3249         }
3250         return ret;
3251 }
3252
3253 /**
3254  * Validate the modify-header actions of increment/decrement
3255  * TCP Acknowledgment number.
3256  *
3257  * @param[in] action_flags
3258  *   Holds the actions detected until now.
3259  * @param[in] action
3260  *   Pointer to the modify action.
3261  * @param[in] item_flags
3262  *   Holds the items detected.
3263  * @param[out] error
3264  *   Pointer to error structure.
3265  *
3266  * @return
3267  *   0 on success, a negative errno value otherwise and rte_errno is set.
3268  */
3269 static int
3270 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3271                                        const struct rte_flow_action *action,
3272                                        const uint64_t item_flags,
3273                                        struct rte_flow_error *error)
3274 {
3275         int ret = 0;
3276
3277         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3278         if (!ret) {
3279                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3280                         return rte_flow_error_set(error, EINVAL,
3281                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3282                                                   NULL, "no TCP item in"
3283                                                   " pattern");
3284                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3285                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3286                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3287                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3288                         return rte_flow_error_set(error, EINVAL,
3289                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3290                                                   NULL,
3291                                                   "cannot decrease and increase"
3292                                                   " TCP acknowledgment number"
3293                                                   " at the same time");
3294         }
3295         return ret;
3296 }
3297
3298 /**
3299  * Validate the modify-header TTL actions.
3300  *
3301  * @param[in] action_flags
3302  *   Holds the actions detected until now.
3303  * @param[in] action
3304  *   Pointer to the modify action.
3305  * @param[in] item_flags
3306  *   Holds the items detected.
3307  * @param[out] error
3308  *   Pointer to error structure.
3309  *
3310  * @return
3311  *   0 on success, a negative errno value otherwise and rte_errno is set.
3312  */
3313 static int
3314 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3315                                    const struct rte_flow_action *action,
3316                                    const uint64_t item_flags,
3317                                    struct rte_flow_error *error)
3318 {
3319         int ret = 0;
3320
3321         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3322         if (!ret) {
3323                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3324                         return rte_flow_error_set(error, EINVAL,
3325                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3326                                                   NULL,
3327                                                   "no IP protocol in pattern");
3328         }
3329         return ret;
3330 }
3331
3332 /**
3333  * Validate jump action.
3334  *
3335  * @param[in] action
3336  *   Pointer to the jump action.
3337  * @param[in] action_flags
3338  *   Holds the actions detected until now.
3339  * @param[in] attributes
3340  *   Pointer to flow attributes
3341  * @param[in] external
3342  *   Action belongs to flow rule created by request external to PMD.
3343  * @param[out] error
3344  *   Pointer to error structure.
3345  *
3346  * @return
3347  *   0 on success, a negative errno value otherwise and rte_errno is set.
3348  */
3349 static int
3350 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3351                              uint64_t action_flags,
3352                              const struct rte_flow_attr *attributes,
3353                              bool external, struct rte_flow_error *error)
3354 {
3355         uint32_t target_group, table;
3356         int ret = 0;
3357
3358         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3359                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3360                 return rte_flow_error_set(error, EINVAL,
3361                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3362                                           "can't have 2 fate actions in"
3363                                           " same flow");
3364         if (action_flags & MLX5_FLOW_ACTION_METER)
3365                 return rte_flow_error_set(error, ENOTSUP,
3366                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3367                                           "jump with meter not support");
3368         if (!action->conf)
3369                 return rte_flow_error_set(error, EINVAL,
3370                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3371                                           NULL, "action configuration not set");
3372         target_group =
3373                 ((const struct rte_flow_action_jump *)action->conf)->group;
3374         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3375                                        &table, error);
3376         if (ret)
3377                 return ret;
3378         if (attributes->group == target_group)
3379                 return rte_flow_error_set(error, EINVAL,
3380                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3381                                           "target group must be other than"
3382                                           " the current flow group");
3383         return 0;
3384 }
3385
3386 /*
3387  * Validate the port_id action.
3388  *
3389  * @param[in] dev
3390  *   Pointer to rte_eth_dev structure.
3391  * @param[in] action_flags
3392  *   Bit-fields that holds the actions detected until now.
3393  * @param[in] action
3394  *   Port_id RTE action structure.
3395  * @param[in] attr
3396  *   Attributes of flow that includes this action.
3397  * @param[out] error
3398  *   Pointer to error structure.
3399  *
3400  * @return
3401  *   0 on success, a negative errno value otherwise and rte_errno is set.
3402  */
3403 static int
3404 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3405                                 uint64_t action_flags,
3406                                 const struct rte_flow_action *action,
3407                                 const struct rte_flow_attr *attr,
3408                                 struct rte_flow_error *error)
3409 {
3410         const struct rte_flow_action_port_id *port_id;
3411         struct mlx5_priv *act_priv;
3412         struct mlx5_priv *dev_priv;
3413         uint16_t port;
3414
3415         if (!attr->transfer)
3416                 return rte_flow_error_set(error, ENOTSUP,
3417                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3418                                           NULL,
3419                                           "port id action is valid in transfer"
3420                                           " mode only");
3421         if (!action || !action->conf)
3422                 return rte_flow_error_set(error, ENOTSUP,
3423                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3424                                           NULL,
3425                                           "port id action parameters must be"
3426                                           " specified");
3427         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3428                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3429                 return rte_flow_error_set(error, EINVAL,
3430                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3431                                           "can have only one fate actions in"
3432                                           " a flow");
3433         dev_priv = mlx5_dev_to_eswitch_info(dev);
3434         if (!dev_priv)
3435                 return rte_flow_error_set(error, rte_errno,
3436                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3437                                           NULL,
3438                                           "failed to obtain E-Switch info");
3439         port_id = action->conf;
3440         port = port_id->original ? dev->data->port_id : port_id->id;
3441         act_priv = mlx5_port_to_eswitch_info(port, false);
3442         if (!act_priv)
3443                 return rte_flow_error_set
3444                                 (error, rte_errno,
3445                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3446                                  "failed to obtain E-Switch port id for port");
3447         if (act_priv->domain_id != dev_priv->domain_id)
3448                 return rte_flow_error_set
3449                                 (error, EINVAL,
3450                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3451                                  "port does not belong to"
3452                                  " E-Switch being configured");
3453         return 0;
3454 }
3455
3456 /**
3457  * Get the maximum number of modify header actions.
3458  *
3459  * @param dev
3460  *   Pointer to rte_eth_dev structure.
3461  * @param flags
3462  *   Flags bits to check if root level.
3463  *
3464  * @return
3465  *   Max number of modify header actions device can support.
3466  */
3467 static unsigned int
3468 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3469 {
3470         /*
3471          * There's no way to directly query the max cap. Although it has to be
3472          * acquried by iterative trial, it is a safe assumption that more
3473          * actions are supported by FW if extensive metadata register is
3474          * supported. (Only in the root table)
3475          */
3476         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3477                 return MLX5_MAX_MODIFY_NUM;
3478         else
3479                 return mlx5_flow_ext_mreg_supported(dev) ?
3480                                         MLX5_ROOT_TBL_MODIFY_NUM :
3481                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3482 }
3483
3484 /**
3485  * Validate the meter action.
3486  *
3487  * @param[in] dev
3488  *   Pointer to rte_eth_dev structure.
3489  * @param[in] action_flags
3490  *   Bit-fields that holds the actions detected until now.
3491  * @param[in] action
3492  *   Pointer to the meter action.
3493  * @param[in] attr
3494  *   Attributes of flow that includes this action.
3495  * @param[out] error
3496  *   Pointer to error structure.
3497  *
3498  * @return
3499  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3500  */
3501 static int
3502 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3503                                 uint64_t action_flags,
3504                                 const struct rte_flow_action *action,
3505                                 const struct rte_flow_attr *attr,
3506                                 struct rte_flow_error *error)
3507 {
3508         struct mlx5_priv *priv = dev->data->dev_private;
3509         const struct rte_flow_action_meter *am = action->conf;
3510         struct mlx5_flow_meter *fm;
3511
3512         if (!am)
3513                 return rte_flow_error_set(error, EINVAL,
3514                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3515                                           "meter action conf is NULL");
3516
3517         if (action_flags & MLX5_FLOW_ACTION_METER)
3518                 return rte_flow_error_set(error, ENOTSUP,
3519                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3520                                           "meter chaining not support");
3521         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3522                 return rte_flow_error_set(error, ENOTSUP,
3523                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3524                                           "meter with jump not support");
3525         if (!priv->mtr_en)
3526                 return rte_flow_error_set(error, ENOTSUP,
3527                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3528                                           NULL,
3529                                           "meter action not supported");
3530         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3531         if (!fm)
3532                 return rte_flow_error_set(error, EINVAL,
3533                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3534                                           "Meter not found");
3535         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3536               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3537               (!fm->attr.egress && !attr->egress && attr->ingress))))
3538                 return rte_flow_error_set(error, EINVAL,
3539                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3540                                           "Flow attributes are either invalid "
3541                                           "or have a conflict with current "
3542                                           "meter attributes");
3543         return 0;
3544 }
3545
3546 /**
3547  * Validate the modify-header IPv4 DSCP actions.
3548  *
3549  * @param[in] action_flags
3550  *   Holds the actions detected until now.
3551  * @param[in] action
3552  *   Pointer to the modify action.
3553  * @param[in] item_flags
3554  *   Holds the items detected.
3555  * @param[out] error
3556  *   Pointer to error structure.
3557  *
3558  * @return
3559  *   0 on success, a negative errno value otherwise and rte_errno is set.
3560  */
3561 static int
3562 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3563                                          const struct rte_flow_action *action,
3564                                          const uint64_t item_flags,
3565                                          struct rte_flow_error *error)
3566 {
3567         int ret = 0;
3568
3569         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3570         if (!ret) {
3571                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3572                         return rte_flow_error_set(error, EINVAL,
3573                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3574                                                   NULL,
3575                                                   "no ipv4 item in pattern");
3576         }
3577         return ret;
3578 }
3579
3580 /**
3581  * Validate the modify-header IPv6 DSCP actions.
3582  *
3583  * @param[in] action_flags
3584  *   Holds the actions detected until now.
3585  * @param[in] action
3586  *   Pointer to the modify action.
3587  * @param[in] item_flags
3588  *   Holds the items detected.
3589  * @param[out] error
3590  *   Pointer to error structure.
3591  *
3592  * @return
3593  *   0 on success, a negative errno value otherwise and rte_errno is set.
3594  */
3595 static int
3596 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3597                                          const struct rte_flow_action *action,
3598                                          const uint64_t item_flags,
3599                                          struct rte_flow_error *error)
3600 {
3601         int ret = 0;
3602
3603         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3604         if (!ret) {
3605                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3606                         return rte_flow_error_set(error, EINVAL,
3607                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3608                                                   NULL,
3609                                                   "no ipv6 item in pattern");
3610         }
3611         return ret;
3612 }
3613
3614 /**
3615  * Find existing modify-header resource or create and register a new one.
3616  *
3617  * @param dev[in, out]
3618  *   Pointer to rte_eth_dev structure.
3619  * @param[in, out] resource
3620  *   Pointer to modify-header resource.
3621  * @parm[in, out] dev_flow
3622  *   Pointer to the dev_flow.
3623  * @param[out] error
3624  *   pointer to error structure.
3625  *
3626  * @return
3627  *   0 on success otherwise -errno and errno is set.
3628  */
3629 static int
3630 flow_dv_modify_hdr_resource_register
3631                         (struct rte_eth_dev *dev,
3632                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3633                          struct mlx5_flow *dev_flow,
3634                          struct rte_flow_error *error)
3635 {
3636         struct mlx5_priv *priv = dev->data->dev_private;
3637         struct mlx5_ibv_shared *sh = priv->sh;
3638         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3639         struct mlx5dv_dr_domain *ns;
3640         uint32_t actions_len;
3641
3642         resource->flags =
3643                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3644         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3645                                     resource->flags))
3646                 return rte_flow_error_set(error, EOVERFLOW,
3647                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3648                                           "too many modify header items");
3649         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3650                 ns = sh->fdb_domain;
3651         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3652                 ns = sh->tx_domain;
3653         else
3654                 ns = sh->rx_domain;
3655         /* Lookup a matching resource from cache. */
3656         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3657         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3658                 if (resource->ft_type == cache_resource->ft_type &&
3659                     resource->actions_num == cache_resource->actions_num &&
3660                     resource->flags == cache_resource->flags &&
3661                     !memcmp((const void *)resource->actions,
3662                             (const void *)cache_resource->actions,
3663                             actions_len)) {
3664                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3665                                 (void *)cache_resource,
3666                                 rte_atomic32_read(&cache_resource->refcnt));
3667                         rte_atomic32_inc(&cache_resource->refcnt);
3668                         dev_flow->dv.modify_hdr = cache_resource;
3669                         return 0;
3670                 }
3671         }
3672         /* Register new modify-header resource. */
3673         cache_resource = rte_calloc(__func__, 1,
3674                                     sizeof(*cache_resource) + actions_len, 0);
3675         if (!cache_resource)
3676                 return rte_flow_error_set(error, ENOMEM,
3677                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3678                                           "cannot allocate resource memory");
3679         *cache_resource = *resource;
3680         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3681         cache_resource->verbs_action =
3682                 mlx5_glue->dv_create_flow_action_modify_header
3683                                         (sh->ctx, cache_resource->ft_type, ns,
3684                                          cache_resource->flags, actions_len,
3685                                          (uint64_t *)cache_resource->actions);
3686         if (!cache_resource->verbs_action) {
3687                 rte_free(cache_resource);
3688                 return rte_flow_error_set(error, ENOMEM,
3689                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3690                                           NULL, "cannot create action");
3691         }
3692         rte_atomic32_init(&cache_resource->refcnt);
3693         rte_atomic32_inc(&cache_resource->refcnt);
3694         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3695         dev_flow->dv.modify_hdr = cache_resource;
3696         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3697                 (void *)cache_resource,
3698                 rte_atomic32_read(&cache_resource->refcnt));
3699         return 0;
3700 }
3701
3702 #define MLX5_CNT_CONTAINER_RESIZE 64
3703
3704 /**
3705  * Get or create a flow counter.
3706  *
3707  * @param[in] dev
3708  *   Pointer to the Ethernet device structure.
3709  * @param[in] shared
3710  *   Indicate if this counter is shared with other flows.
3711  * @param[in] id
3712  *   Counter identifier.
3713  *
3714  * @return
3715  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3716  */
3717 static struct mlx5_flow_counter *
3718 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3719                                uint32_t id)
3720 {
3721         struct mlx5_priv *priv = dev->data->dev_private;
3722         struct mlx5_flow_counter *cnt = NULL;
3723         struct mlx5_devx_obj *dcs = NULL;
3724
3725         if (!priv->config.devx) {
3726                 rte_errno = ENOTSUP;
3727                 return NULL;
3728         }
3729         if (shared) {
3730                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3731                         if (cnt->shared && cnt->id == id) {
3732                                 cnt->ref_cnt++;
3733                                 return cnt;
3734                         }
3735                 }
3736         }
3737         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3738         if (!dcs)
3739                 return NULL;
3740         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3741         if (!cnt) {
3742                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3743                 rte_errno = ENOMEM;
3744                 return NULL;
3745         }
3746         struct mlx5_flow_counter tmpl = {
3747                 .shared = shared,
3748                 .ref_cnt = 1,
3749                 .id = id,
3750                 .dcs = dcs,
3751         };
3752         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3753         if (!tmpl.action) {
3754                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3755                 rte_errno = errno;
3756                 rte_free(cnt);
3757                 return NULL;
3758         }
3759         *cnt = tmpl;
3760         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3761         return cnt;
3762 }
3763
3764 /**
3765  * Release a flow counter.
3766  *
3767  * @param[in] dev
3768  *   Pointer to the Ethernet device structure.
3769  * @param[in] counter
3770  *   Pointer to the counter handler.
3771  */
3772 static void
3773 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3774                                  struct mlx5_flow_counter *counter)
3775 {
3776         struct mlx5_priv *priv = dev->data->dev_private;
3777
3778         if (!counter)
3779                 return;
3780         if (--counter->ref_cnt == 0) {
3781                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3782                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3783                 rte_free(counter);
3784         }
3785 }
3786
3787 /**
3788  * Query a devx flow counter.
3789  *
3790  * @param[in] dev
3791  *   Pointer to the Ethernet device structure.
3792  * @param[in] cnt
3793  *   Pointer to the flow counter.
3794  * @param[out] pkts
3795  *   The statistics value of packets.
3796  * @param[out] bytes
3797  *   The statistics value of bytes.
3798  *
3799  * @return
3800  *   0 on success, otherwise a negative errno value and rte_errno is set.
3801  */
3802 static inline int
3803 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3804                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3805                      uint64_t *bytes)
3806 {
3807         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3808                                                 0, NULL, NULL, 0);
3809 }
3810
3811 /**
3812  * Get a pool by a counter.
3813  *
3814  * @param[in] cnt
3815  *   Pointer to the counter.
3816  *
3817  * @return
3818  *   The counter pool.
3819  */
3820 static struct mlx5_flow_counter_pool *
3821 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3822 {
3823         if (!cnt->batch) {
3824                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3825                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3826         }
3827         return cnt->pool;
3828 }
3829
3830 /**
3831  * Get a pool by devx counter ID.
3832  *
3833  * @param[in] cont
3834  *   Pointer to the counter container.
3835  * @param[in] id
3836  *   The counter devx ID.
3837  *
3838  * @return
3839  *   The counter pool pointer if exists, NULL otherwise,
3840  */
3841 static struct mlx5_flow_counter_pool *
3842 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3843 {
3844         struct mlx5_flow_counter_pool *pool;
3845
3846         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3847                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3848                                 MLX5_COUNTERS_PER_POOL;
3849
3850                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3851                         return pool;
3852         };
3853         return NULL;
3854 }
3855
3856 /**
3857  * Allocate a new memory for the counter values wrapped by all the needed
3858  * management.
3859  *
3860  * @param[in] dev
3861  *   Pointer to the Ethernet device structure.
3862  * @param[in] raws_n
3863  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3864  *
3865  * @return
3866  *   The new memory management pointer on success, otherwise NULL and rte_errno
3867  *   is set.
3868  */
3869 static struct mlx5_counter_stats_mem_mng *
3870 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3871 {
3872         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3873                                         (dev->data->dev_private))->sh;
3874         struct mlx5_devx_mkey_attr mkey_attr;
3875         struct mlx5_counter_stats_mem_mng *mem_mng;
3876         volatile struct flow_counter_stats *raw_data;
3877         int size = (sizeof(struct flow_counter_stats) *
3878                         MLX5_COUNTERS_PER_POOL +
3879                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3880                         sizeof(struct mlx5_counter_stats_mem_mng);
3881         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3882         int i;
3883
3884         if (!mem) {
3885                 rte_errno = ENOMEM;
3886                 return NULL;
3887         }
3888         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3889         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3890         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3891                                                  IBV_ACCESS_LOCAL_WRITE);
3892         if (!mem_mng->umem) {
3893                 rte_errno = errno;
3894                 rte_free(mem);
3895                 return NULL;
3896         }
3897         mkey_attr.addr = (uintptr_t)mem;
3898         mkey_attr.size = size;
3899         mkey_attr.umem_id = mem_mng->umem->umem_id;
3900         mkey_attr.pd = sh->pdn;
3901         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3902         if (!mem_mng->dm) {
3903                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3904                 rte_errno = errno;
3905                 rte_free(mem);
3906                 return NULL;
3907         }
3908         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3909         raw_data = (volatile struct flow_counter_stats *)mem;
3910         for (i = 0; i < raws_n; ++i) {
3911                 mem_mng->raws[i].mem_mng = mem_mng;
3912                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3913         }
3914         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3915         return mem_mng;
3916 }
3917
3918 /**
3919  * Resize a counter container.
3920  *
3921  * @param[in] dev
3922  *   Pointer to the Ethernet device structure.
3923  * @param[in] batch
3924  *   Whether the pool is for counter that was allocated by batch command.
3925  *
3926  * @return
3927  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3928  */
3929 static struct mlx5_pools_container *
3930 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3931 {
3932         struct mlx5_priv *priv = dev->data->dev_private;
3933         struct mlx5_pools_container *cont =
3934                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3935         struct mlx5_pools_container *new_cont =
3936                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3937         struct mlx5_counter_stats_mem_mng *mem_mng;
3938         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3939         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3940         int i;
3941
3942         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3943                 /* The last resize still hasn't detected by the host thread. */
3944                 rte_errno = EAGAIN;
3945                 return NULL;
3946         }
3947         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3948         if (!new_cont->pools) {
3949                 rte_errno = ENOMEM;
3950                 return NULL;
3951         }
3952         if (cont->n)
3953                 memcpy(new_cont->pools, cont->pools, cont->n *
3954                        sizeof(struct mlx5_flow_counter_pool *));
3955         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3956                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3957         if (!mem_mng) {
3958                 rte_free(new_cont->pools);
3959                 return NULL;
3960         }
3961         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3962                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3963                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3964                                  i, next);
3965         new_cont->n = resize;
3966         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3967         TAILQ_INIT(&new_cont->pool_list);
3968         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3969         new_cont->init_mem_mng = mem_mng;
3970         rte_cio_wmb();
3971          /* Flip the master container. */
3972         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3973         return new_cont;
3974 }
3975
3976 /**
3977  * Query a devx flow counter.
3978  *
3979  * @param[in] dev
3980  *   Pointer to the Ethernet device structure.
3981  * @param[in] cnt
3982  *   Pointer to the flow counter.
3983  * @param[out] pkts
3984  *   The statistics value of packets.
3985  * @param[out] bytes
3986  *   The statistics value of bytes.
3987  *
3988  * @return
3989  *   0 on success, otherwise a negative errno value and rte_errno is set.
3990  */
3991 static inline int
3992 _flow_dv_query_count(struct rte_eth_dev *dev,
3993                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3994                      uint64_t *bytes)
3995 {
3996         struct mlx5_priv *priv = dev->data->dev_private;
3997         struct mlx5_flow_counter_pool *pool =
3998                         flow_dv_counter_pool_get(cnt);
3999         int offset = cnt - &pool->counters_raw[0];
4000
4001         if (priv->counter_fallback)
4002                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4003
4004         rte_spinlock_lock(&pool->sl);
4005         /*
4006          * The single counters allocation may allocate smaller ID than the
4007          * current allocated in parallel to the host reading.
4008          * In this case the new counter values must be reported as 0.
4009          */
4010         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4011                 *pkts = 0;
4012                 *bytes = 0;
4013         } else {
4014                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4015                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4016         }
4017         rte_spinlock_unlock(&pool->sl);
4018         return 0;
4019 }
4020
4021 /**
4022  * Create and initialize a new counter pool.
4023  *
4024  * @param[in] dev
4025  *   Pointer to the Ethernet device structure.
4026  * @param[out] dcs
4027  *   The devX counter handle.
4028  * @param[in] batch
4029  *   Whether the pool is for counter that was allocated by batch command.
4030  *
4031  * @return
4032  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4033  */
4034 static struct mlx5_flow_counter_pool *
4035 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4036                     uint32_t batch)
4037 {
4038         struct mlx5_priv *priv = dev->data->dev_private;
4039         struct mlx5_flow_counter_pool *pool;
4040         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4041                                                                0);
4042         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4043         uint32_t size;
4044
4045         if (cont->n == n_valid) {
4046                 cont = flow_dv_container_resize(dev, batch);
4047                 if (!cont)
4048                         return NULL;
4049         }
4050         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4051                         sizeof(struct mlx5_flow_counter);
4052         pool = rte_calloc(__func__, 1, size, 0);
4053         if (!pool) {
4054                 rte_errno = ENOMEM;
4055                 return NULL;
4056         }
4057         pool->min_dcs = dcs;
4058         pool->raw = cont->init_mem_mng->raws + n_valid %
4059                                                      MLX5_CNT_CONTAINER_RESIZE;
4060         pool->raw_hw = NULL;
4061         rte_spinlock_init(&pool->sl);
4062         /*
4063          * The generation of the new allocated counters in this pool is 0, 2 in
4064          * the pool generation makes all the counters valid for allocation.
4065          */
4066         rte_atomic64_set(&pool->query_gen, 0x2);
4067         TAILQ_INIT(&pool->counters);
4068         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4069         cont->pools[n_valid] = pool;
4070         /* Pool initialization must be updated before host thread access. */
4071         rte_cio_wmb();
4072         rte_atomic16_add(&cont->n_valid, 1);
4073         return pool;
4074 }
4075
4076 /**
4077  * Prepare a new counter and/or a new counter pool.
4078  *
4079  * @param[in] dev
4080  *   Pointer to the Ethernet device structure.
4081  * @param[out] cnt_free
4082  *   Where to put the pointer of a new counter.
4083  * @param[in] batch
4084  *   Whether the pool is for counter that was allocated by batch command.
4085  *
4086  * @return
4087  *   The free counter pool pointer and @p cnt_free is set on success,
4088  *   NULL otherwise and rte_errno is set.
4089  */
4090 static struct mlx5_flow_counter_pool *
4091 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4092                              struct mlx5_flow_counter **cnt_free,
4093                              uint32_t batch)
4094 {
4095         struct mlx5_priv *priv = dev->data->dev_private;
4096         struct mlx5_flow_counter_pool *pool;
4097         struct mlx5_devx_obj *dcs = NULL;
4098         struct mlx5_flow_counter *cnt;
4099         uint32_t i;
4100
4101         if (!batch) {
4102                 /* bulk_bitmap must be 0 for single counter allocation. */
4103                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4104                 if (!dcs)
4105                         return NULL;
4106                 pool = flow_dv_find_pool_by_id
4107                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4108                 if (!pool) {
4109                         pool = flow_dv_pool_create(dev, dcs, batch);
4110                         if (!pool) {
4111                                 mlx5_devx_cmd_destroy(dcs);
4112                                 return NULL;
4113                         }
4114                 } else if (dcs->id < pool->min_dcs->id) {
4115                         rte_atomic64_set(&pool->a64_dcs,
4116                                          (int64_t)(uintptr_t)dcs);
4117                 }
4118                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4119                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4120                 cnt->dcs = dcs;
4121                 *cnt_free = cnt;
4122                 return pool;
4123         }
4124         /* bulk_bitmap is in 128 counters units. */
4125         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4126                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4127         if (!dcs) {
4128                 rte_errno = ENODATA;
4129                 return NULL;
4130         }
4131         pool = flow_dv_pool_create(dev, dcs, batch);
4132         if (!pool) {
4133                 mlx5_devx_cmd_destroy(dcs);
4134                 return NULL;
4135         }
4136         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4137                 cnt = &pool->counters_raw[i];
4138                 cnt->pool = pool;
4139                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4140         }
4141         *cnt_free = &pool->counters_raw[0];
4142         return pool;
4143 }
4144
4145 /**
4146  * Search for existed shared counter.
4147  *
4148  * @param[in] cont
4149  *   Pointer to the relevant counter pool container.
4150  * @param[in] id
4151  *   The shared counter ID to search.
4152  *
4153  * @return
4154  *   NULL if not existed, otherwise pointer to the shared counter.
4155  */
4156 static struct mlx5_flow_counter *
4157 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4158                               uint32_t id)
4159 {
4160         static struct mlx5_flow_counter *cnt;
4161         struct mlx5_flow_counter_pool *pool;
4162         int i;
4163
4164         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4165                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4166                         cnt = &pool->counters_raw[i];
4167                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4168                                 return cnt;
4169                 }
4170         }
4171         return NULL;
4172 }
4173
4174 /**
4175  * Allocate a flow counter.
4176  *
4177  * @param[in] dev
4178  *   Pointer to the Ethernet device structure.
4179  * @param[in] shared
4180  *   Indicate if this counter is shared with other flows.
4181  * @param[in] id
4182  *   Counter identifier.
4183  * @param[in] group
4184  *   Counter flow group.
4185  *
4186  * @return
4187  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4188  */
4189 static struct mlx5_flow_counter *
4190 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4191                       uint16_t group)
4192 {
4193         struct mlx5_priv *priv = dev->data->dev_private;
4194         struct mlx5_flow_counter_pool *pool = NULL;
4195         struct mlx5_flow_counter *cnt_free = NULL;
4196         /*
4197          * Currently group 0 flow counter cannot be assigned to a flow if it is
4198          * not the first one in the batch counter allocation, so it is better
4199          * to allocate counters one by one for these flows in a separate
4200          * container.
4201          * A counter can be shared between different groups so need to take
4202          * shared counters from the single container.
4203          */
4204         uint32_t batch = (group && !shared) ? 1 : 0;
4205         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4206                                                                0);
4207
4208         if (priv->counter_fallback)
4209                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4210         if (!priv->config.devx) {
4211                 rte_errno = ENOTSUP;
4212                 return NULL;
4213         }
4214         if (shared) {
4215                 cnt_free = flow_dv_counter_shared_search(cont, id);
4216                 if (cnt_free) {
4217                         if (cnt_free->ref_cnt + 1 == 0) {
4218                                 rte_errno = E2BIG;
4219                                 return NULL;
4220                         }
4221                         cnt_free->ref_cnt++;
4222                         return cnt_free;
4223                 }
4224         }
4225         /* Pools which has a free counters are in the start. */
4226         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4227                 /*
4228                  * The free counter reset values must be updated between the
4229                  * counter release to the counter allocation, so, at least one
4230                  * query must be done in this time. ensure it by saving the
4231                  * query generation in the release time.
4232                  * The free list is sorted according to the generation - so if
4233                  * the first one is not updated, all the others are not
4234                  * updated too.
4235                  */
4236                 cnt_free = TAILQ_FIRST(&pool->counters);
4237                 if (cnt_free && cnt_free->query_gen + 1 <
4238                     rte_atomic64_read(&pool->query_gen))
4239                         break;
4240                 cnt_free = NULL;
4241         }
4242         if (!cnt_free) {
4243                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4244                 if (!pool)
4245                         return NULL;
4246         }
4247         cnt_free->batch = batch;
4248         /* Create a DV counter action only in the first time usage. */
4249         if (!cnt_free->action) {
4250                 uint16_t offset;
4251                 struct mlx5_devx_obj *dcs;
4252
4253                 if (batch) {
4254                         offset = cnt_free - &pool->counters_raw[0];
4255                         dcs = pool->min_dcs;
4256                 } else {
4257                         offset = 0;
4258                         dcs = cnt_free->dcs;
4259                 }
4260                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4261                                         (dcs->obj, offset);
4262                 if (!cnt_free->action) {
4263                         rte_errno = errno;
4264                         return NULL;
4265                 }
4266         }
4267         /* Update the counter reset values. */
4268         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4269                                  &cnt_free->bytes))
4270                 return NULL;
4271         cnt_free->shared = shared;
4272         cnt_free->ref_cnt = 1;
4273         cnt_free->id = id;
4274         if (!priv->sh->cmng.query_thread_on)
4275                 /* Start the asynchronous batch query by the host thread. */
4276                 mlx5_set_query_alarm(priv->sh);
4277         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4278         if (TAILQ_EMPTY(&pool->counters)) {
4279                 /* Move the pool to the end of the container pool list. */
4280                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4281                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4282         }
4283         return cnt_free;
4284 }
4285
4286 /**
4287  * Release a flow counter.
4288  *
4289  * @param[in] dev
4290  *   Pointer to the Ethernet device structure.
4291  * @param[in] counter
4292  *   Pointer to the counter handler.
4293  */
4294 static void
4295 flow_dv_counter_release(struct rte_eth_dev *dev,
4296                         struct mlx5_flow_counter *counter)
4297 {
4298         struct mlx5_priv *priv = dev->data->dev_private;
4299
4300         if (!counter)
4301                 return;
4302         if (priv->counter_fallback) {
4303                 flow_dv_counter_release_fallback(dev, counter);
4304                 return;
4305         }
4306         if (--counter->ref_cnt == 0) {
4307                 struct mlx5_flow_counter_pool *pool =
4308                                 flow_dv_counter_pool_get(counter);
4309
4310                 /* Put the counter in the end - the last updated one. */
4311                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4312                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4313         }
4314 }
4315
4316 /**
4317  * Verify the @p attributes will be correctly understood by the NIC and store
4318  * them in the @p flow if everything is correct.
4319  *
4320  * @param[in] dev
4321  *   Pointer to dev struct.
4322  * @param[in] attributes
4323  *   Pointer to flow attributes
4324  * @param[in] external
4325  *   This flow rule is created by request external to PMD.
4326  * @param[out] error
4327  *   Pointer to error structure.
4328  *
4329  * @return
4330  *   0 on success, a negative errno value otherwise and rte_errno is set.
4331  */
4332 static int
4333 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4334                             const struct rte_flow_attr *attributes,
4335                             bool external __rte_unused,
4336                             struct rte_flow_error *error)
4337 {
4338         struct mlx5_priv *priv = dev->data->dev_private;
4339         uint32_t priority_max = priv->config.flow_prio - 1;
4340
4341 #ifndef HAVE_MLX5DV_DR
4342         if (attributes->group)
4343                 return rte_flow_error_set(error, ENOTSUP,
4344                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4345                                           NULL,
4346                                           "groups are not supported");
4347 #else
4348         uint32_t table;
4349         int ret;
4350
4351         ret = mlx5_flow_group_to_table(attributes, external,
4352                                        attributes->group,
4353                                        &table, error);
4354         if (ret)
4355                 return ret;
4356 #endif
4357         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4358             attributes->priority >= priority_max)
4359                 return rte_flow_error_set(error, ENOTSUP,
4360                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4361                                           NULL,
4362                                           "priority out of range");
4363         if (attributes->transfer) {
4364                 if (!priv->config.dv_esw_en)
4365                         return rte_flow_error_set
4366                                 (error, ENOTSUP,
4367                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4368                                  "E-Switch dr is not supported");
4369                 if (!(priv->representor || priv->master))
4370                         return rte_flow_error_set
4371                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4372                                  NULL, "E-Switch configuration can only be"
4373                                  " done by a master or a representor device");
4374                 if (attributes->egress)
4375                         return rte_flow_error_set
4376                                 (error, ENOTSUP,
4377                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4378                                  "egress is not supported");
4379         }
4380         if (!(attributes->egress ^ attributes->ingress))
4381                 return rte_flow_error_set(error, ENOTSUP,
4382                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4383                                           "must specify exactly one of "
4384                                           "ingress or egress");
4385         return 0;
4386 }
4387
4388 /**
4389  * Internal validation function. For validating both actions and items.
4390  *
4391  * @param[in] dev
4392  *   Pointer to the rte_eth_dev structure.
4393  * @param[in] attr
4394  *   Pointer to the flow attributes.
4395  * @param[in] items
4396  *   Pointer to the list of items.
4397  * @param[in] actions
4398  *   Pointer to the list of actions.
4399  * @param[in] external
4400  *   This flow rule is created by request external to PMD.
4401  * @param[out] error
4402  *   Pointer to the error structure.
4403  *
4404  * @return
4405  *   0 on success, a negative errno value otherwise and rte_errno is set.
4406  */
4407 static int
4408 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4409                  const struct rte_flow_item items[],
4410                  const struct rte_flow_action actions[],
4411                  bool external, struct rte_flow_error *error)
4412 {
4413         int ret;
4414         uint64_t action_flags = 0;
4415         uint64_t item_flags = 0;
4416         uint64_t last_item = 0;
4417         uint8_t next_protocol = 0xff;
4418         uint16_t ether_type = 0;
4419         int actions_n = 0;
4420         const struct rte_flow_item *gre_item = NULL;
4421         struct rte_flow_item_tcp nic_tcp_mask = {
4422                 .hdr = {
4423                         .tcp_flags = 0xFF,
4424                         .src_port = RTE_BE16(UINT16_MAX),
4425                         .dst_port = RTE_BE16(UINT16_MAX),
4426                 }
4427         };
4428         struct mlx5_priv *priv = dev->data->dev_private;
4429         struct mlx5_dev_config *dev_conf = &priv->config;
4430
4431         if (items == NULL)
4432                 return -1;
4433         ret = flow_dv_validate_attributes(dev, attr, external, error);
4434         if (ret < 0)
4435                 return ret;
4436         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4437                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4438                 int type = items->type;
4439
4440                 switch (type) {
4441                 case RTE_FLOW_ITEM_TYPE_VOID:
4442                         break;
4443                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4444                         ret = flow_dv_validate_item_port_id
4445                                         (dev, items, attr, item_flags, error);
4446                         if (ret < 0)
4447                                 return ret;
4448                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4449                         break;
4450                 case RTE_FLOW_ITEM_TYPE_ETH:
4451                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4452                                                           error);
4453                         if (ret < 0)
4454                                 return ret;
4455                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4456                                              MLX5_FLOW_LAYER_OUTER_L2;
4457                         if (items->mask != NULL && items->spec != NULL) {
4458                                 ether_type =
4459                                         ((const struct rte_flow_item_eth *)
4460                                          items->spec)->type;
4461                                 ether_type &=
4462                                         ((const struct rte_flow_item_eth *)
4463                                          items->mask)->type;
4464                                 ether_type = rte_be_to_cpu_16(ether_type);
4465                         } else {
4466                                 ether_type = 0;
4467                         }
4468                         break;
4469                 case RTE_FLOW_ITEM_TYPE_VLAN:
4470                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4471                                                            dev, error);
4472                         if (ret < 0)
4473                                 return ret;
4474                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4475                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4476                         if (items->mask != NULL && items->spec != NULL) {
4477                                 ether_type =
4478                                         ((const struct rte_flow_item_vlan *)
4479                                          items->spec)->inner_type;
4480                                 ether_type &=
4481                                         ((const struct rte_flow_item_vlan *)
4482                                          items->mask)->inner_type;
4483                                 ether_type = rte_be_to_cpu_16(ether_type);
4484                         } else {
4485                                 ether_type = 0;
4486                         }
4487                         break;
4488                 case RTE_FLOW_ITEM_TYPE_IPV4:
4489                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4490                                                   &item_flags, &tunnel);
4491                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4492                                                            last_item,
4493                                                            ether_type, NULL,
4494                                                            error);
4495                         if (ret < 0)
4496                                 return ret;
4497                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4498                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4499                         if (items->mask != NULL &&
4500                             ((const struct rte_flow_item_ipv4 *)
4501                              items->mask)->hdr.next_proto_id) {
4502                                 next_protocol =
4503                                         ((const struct rte_flow_item_ipv4 *)
4504                                          (items->spec))->hdr.next_proto_id;
4505                                 next_protocol &=
4506                                         ((const struct rte_flow_item_ipv4 *)
4507                                          (items->mask))->hdr.next_proto_id;
4508                         } else {
4509                                 /* Reset for inner layer. */
4510                                 next_protocol = 0xff;
4511                         }
4512                         break;
4513                 case RTE_FLOW_ITEM_TYPE_IPV6:
4514                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4515                                                   &item_flags, &tunnel);
4516                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4517                                                            last_item,
4518                                                            ether_type, NULL,
4519                                                            error);
4520                         if (ret < 0)
4521                                 return ret;
4522                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4523                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4524                         if (items->mask != NULL &&
4525                             ((const struct rte_flow_item_ipv6 *)
4526                              items->mask)->hdr.proto) {
4527                                 next_protocol =
4528                                         ((const struct rte_flow_item_ipv6 *)
4529                                          items->spec)->hdr.proto;
4530                                 next_protocol &=
4531                                         ((const struct rte_flow_item_ipv6 *)
4532                                          items->mask)->hdr.proto;
4533                         } else {
4534                                 /* Reset for inner layer. */
4535                                 next_protocol = 0xff;
4536                         }
4537                         break;
4538                 case RTE_FLOW_ITEM_TYPE_TCP:
4539                         ret = mlx5_flow_validate_item_tcp
4540                                                 (items, item_flags,
4541                                                  next_protocol,
4542                                                  &nic_tcp_mask,
4543                                                  error);
4544                         if (ret < 0)
4545                                 return ret;
4546                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4547                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4548                         break;
4549                 case RTE_FLOW_ITEM_TYPE_UDP:
4550                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4551                                                           next_protocol,
4552                                                           error);
4553                         if (ret < 0)
4554                                 return ret;
4555                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4556                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4557                         break;
4558                 case RTE_FLOW_ITEM_TYPE_GRE:
4559                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4560                                                           next_protocol, error);
4561                         if (ret < 0)
4562                                 return ret;
4563                         gre_item = items;
4564                         last_item = MLX5_FLOW_LAYER_GRE;
4565                         break;
4566                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4567                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4568                                                             next_protocol,
4569                                                             error);
4570                         if (ret < 0)
4571                                 return ret;
4572                         last_item = MLX5_FLOW_LAYER_NVGRE;
4573                         break;
4574                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4575                         ret = mlx5_flow_validate_item_gre_key
4576                                 (items, item_flags, gre_item, error);
4577                         if (ret < 0)
4578                                 return ret;
4579                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4580                         break;
4581                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4582                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4583                                                             error);
4584                         if (ret < 0)
4585                                 return ret;
4586                         last_item = MLX5_FLOW_LAYER_VXLAN;
4587                         break;
4588                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4589                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4590                                                                 item_flags, dev,
4591                                                                 error);
4592                         if (ret < 0)
4593                                 return ret;
4594                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4595                         break;
4596                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4597                         ret = mlx5_flow_validate_item_geneve(items,
4598                                                              item_flags, dev,
4599                                                              error);
4600                         if (ret < 0)
4601                                 return ret;
4602                         last_item = MLX5_FLOW_LAYER_GENEVE;
4603                         break;
4604                 case RTE_FLOW_ITEM_TYPE_MPLS:
4605                         ret = mlx5_flow_validate_item_mpls(dev, items,
4606                                                            item_flags,
4607                                                            last_item, error);
4608                         if (ret < 0)
4609                                 return ret;
4610                         last_item = MLX5_FLOW_LAYER_MPLS;
4611                         break;
4612
4613                 case RTE_FLOW_ITEM_TYPE_MARK:
4614                         ret = flow_dv_validate_item_mark(dev, items, attr,
4615                                                          error);
4616                         if (ret < 0)
4617                                 return ret;
4618                         last_item = MLX5_FLOW_ITEM_MARK;
4619                         break;
4620                 case RTE_FLOW_ITEM_TYPE_META:
4621                         ret = flow_dv_validate_item_meta(dev, items, attr,
4622                                                          error);
4623                         if (ret < 0)
4624                                 return ret;
4625                         last_item = MLX5_FLOW_ITEM_METADATA;
4626                         break;
4627                 case RTE_FLOW_ITEM_TYPE_ICMP:
4628                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4629                                                            next_protocol,
4630                                                            error);
4631                         if (ret < 0)
4632                                 return ret;
4633                         last_item = MLX5_FLOW_LAYER_ICMP;
4634                         break;
4635                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4636                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4637                                                             next_protocol,
4638                                                             error);
4639                         if (ret < 0)
4640                                 return ret;
4641                         last_item = MLX5_FLOW_LAYER_ICMP6;
4642                         break;
4643                 case RTE_FLOW_ITEM_TYPE_TAG:
4644                         ret = flow_dv_validate_item_tag(dev, items,
4645                                                         attr, error);
4646                         if (ret < 0)
4647                                 return ret;
4648                         last_item = MLX5_FLOW_ITEM_TAG;
4649                         break;
4650                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4651                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4652                         break;
4653                 case RTE_FLOW_ITEM_TYPE_GTP:
4654                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4655                                                         error);
4656                         if (ret < 0)
4657                                 return ret;
4658                         last_item = MLX5_FLOW_LAYER_GTP;
4659                         break;
4660                 default:
4661                         return rte_flow_error_set(error, ENOTSUP,
4662                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4663                                                   NULL, "item not supported");
4664                 }
4665                 item_flags |= last_item;
4666         }
4667         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4668                 int type = actions->type;
4669                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4670                         return rte_flow_error_set(error, ENOTSUP,
4671                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4672                                                   actions, "too many actions");
4673                 switch (type) {
4674                 case RTE_FLOW_ACTION_TYPE_VOID:
4675                         break;
4676                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4677                         ret = flow_dv_validate_action_port_id(dev,
4678                                                               action_flags,
4679                                                               actions,
4680                                                               attr,
4681                                                               error);
4682                         if (ret)
4683                                 return ret;
4684                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4685                         ++actions_n;
4686                         break;
4687                 case RTE_FLOW_ACTION_TYPE_FLAG:
4688                         ret = flow_dv_validate_action_flag(dev, action_flags,
4689                                                            attr, error);
4690                         if (ret < 0)
4691                                 return ret;
4692                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4693                                 /* Count all modify-header actions as one. */
4694                                 if (!(action_flags &
4695                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4696                                         ++actions_n;
4697                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4698                                                 MLX5_FLOW_ACTION_MARK_EXT;
4699                         } else {
4700                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4701                                 ++actions_n;
4702                         }
4703                         break;
4704                 case RTE_FLOW_ACTION_TYPE_MARK:
4705                         ret = flow_dv_validate_action_mark(dev, actions,
4706                                                            action_flags,
4707                                                            attr, error);
4708                         if (ret < 0)
4709                                 return ret;
4710                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4711                                 /* Count all modify-header actions as one. */
4712                                 if (!(action_flags &
4713                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4714                                         ++actions_n;
4715                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4716                                                 MLX5_FLOW_ACTION_MARK_EXT;
4717                         } else {
4718                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4719                                 ++actions_n;
4720                         }
4721                         break;
4722                 case RTE_FLOW_ACTION_TYPE_SET_META:
4723                         ret = flow_dv_validate_action_set_meta(dev, actions,
4724                                                                action_flags,
4725                                                                attr, error);
4726                         if (ret < 0)
4727                                 return ret;
4728                         /* Count all modify-header actions as one action. */
4729                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4730                                 ++actions_n;
4731                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4732                         break;
4733                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4734                         ret = flow_dv_validate_action_set_tag(dev, actions,
4735                                                               action_flags,
4736                                                               attr, error);
4737                         if (ret < 0)
4738                                 return ret;
4739                         /* Count all modify-header actions as one action. */
4740                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4741                                 ++actions_n;
4742                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4743                         break;
4744                 case RTE_FLOW_ACTION_TYPE_DROP:
4745                         ret = mlx5_flow_validate_action_drop(action_flags,
4746                                                              attr, error);
4747                         if (ret < 0)
4748                                 return ret;
4749                         action_flags |= MLX5_FLOW_ACTION_DROP;
4750                         ++actions_n;
4751                         break;
4752                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4753                         ret = mlx5_flow_validate_action_queue(actions,
4754                                                               action_flags, dev,
4755                                                               attr, error);
4756                         if (ret < 0)
4757                                 return ret;
4758                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4759                         ++actions_n;
4760                         break;
4761                 case RTE_FLOW_ACTION_TYPE_RSS:
4762                         ret = mlx5_flow_validate_action_rss(actions,
4763                                                             action_flags, dev,
4764                                                             attr, item_flags,
4765                                                             error);
4766                         if (ret < 0)
4767                                 return ret;
4768                         action_flags |= MLX5_FLOW_ACTION_RSS;
4769                         ++actions_n;
4770                         break;
4771                 case RTE_FLOW_ACTION_TYPE_COUNT:
4772                         ret = flow_dv_validate_action_count(dev, error);
4773                         if (ret < 0)
4774                                 return ret;
4775                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4776                         ++actions_n;
4777                         break;
4778                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4779                         if (flow_dv_validate_action_pop_vlan(dev,
4780                                                              action_flags,
4781                                                              actions,
4782                                                              item_flags, attr,
4783                                                              error))
4784                                 return -rte_errno;
4785                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4786                         ++actions_n;
4787                         break;
4788                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4789                         ret = flow_dv_validate_action_push_vlan(action_flags,
4790                                                                 item_flags,
4791                                                                 actions, attr,
4792                                                                 error);
4793                         if (ret < 0)
4794                                 return ret;
4795                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4796                         ++actions_n;
4797                         break;
4798                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4799                         ret = flow_dv_validate_action_set_vlan_pcp
4800                                                 (action_flags, actions, error);
4801                         if (ret < 0)
4802                                 return ret;
4803                         /* Count PCP with push_vlan command. */
4804                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4805                         break;
4806                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4807                         ret = flow_dv_validate_action_set_vlan_vid
4808                                                 (item_flags, action_flags,
4809                                                  actions, error);
4810                         if (ret < 0)
4811                                 return ret;
4812                         /* Count VID with push_vlan command. */
4813                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4814                         break;
4815                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4816                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4817                         ret = flow_dv_validate_action_l2_encap(action_flags,
4818                                                                actions, attr,
4819                                                                error);
4820                         if (ret < 0)
4821                                 return ret;
4822                         action_flags |= actions->type ==
4823                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4824                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4825                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4826                         ++actions_n;
4827                         break;
4828                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4829                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4830                         ret = flow_dv_validate_action_l2_decap(action_flags,
4831                                                                attr, error);
4832                         if (ret < 0)
4833                                 return ret;
4834                         action_flags |= actions->type ==
4835                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4836                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4837                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4838                         ++actions_n;
4839                         break;
4840                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4841                         ret = flow_dv_validate_action_raw_encap(action_flags,
4842                                                                 actions, attr,
4843                                                                 error);
4844                         if (ret < 0)
4845                                 return ret;
4846                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4847                         ++actions_n;
4848                         break;
4849                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4850                         ret = flow_dv_validate_action_raw_decap(action_flags,
4851                                                                 actions, attr,
4852                                                                 error);
4853                         if (ret < 0)
4854                                 return ret;
4855                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4856                         ++actions_n;
4857                         break;
4858                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4859                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4860                         ret = flow_dv_validate_action_modify_mac(action_flags,
4861                                                                  actions,
4862                                                                  item_flags,
4863                                                                  error);
4864                         if (ret < 0)
4865                                 return ret;
4866                         /* Count all modify-header actions as one action. */
4867                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4868                                 ++actions_n;
4869                         action_flags |= actions->type ==
4870                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4871                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4872                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4873                         break;
4874
4875                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4876                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4877                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4878                                                                   actions,
4879                                                                   item_flags,
4880                                                                   error);
4881                         if (ret < 0)
4882                                 return ret;
4883                         /* Count all modify-header actions as one action. */
4884                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4885                                 ++actions_n;
4886                         action_flags |= actions->type ==
4887                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4888                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4889                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4890                         break;
4891                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4892                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4893                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4894                                                                   actions,
4895                                                                   item_flags,
4896                                                                   error);
4897                         if (ret < 0)
4898                                 return ret;
4899                         /* Count all modify-header actions as one action. */
4900                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4901                                 ++actions_n;
4902                         action_flags |= actions->type ==
4903                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4904                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4905                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4906                         break;
4907                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4908                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4909                         ret = flow_dv_validate_action_modify_tp(action_flags,
4910                                                                 actions,
4911                                                                 item_flags,
4912                                                                 error);
4913                         if (ret < 0)
4914                                 return ret;
4915                         /* Count all modify-header actions as one action. */
4916                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4917                                 ++actions_n;
4918                         action_flags |= actions->type ==
4919                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4920                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4921                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4922                         break;
4923                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4924                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4925                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4926                                                                  actions,
4927                                                                  item_flags,
4928                                                                  error);
4929                         if (ret < 0)
4930                                 return ret;
4931                         /* Count all modify-header actions as one action. */
4932                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4933                                 ++actions_n;
4934                         action_flags |= actions->type ==
4935                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4936                                                 MLX5_FLOW_ACTION_SET_TTL :
4937                                                 MLX5_FLOW_ACTION_DEC_TTL;
4938                         break;
4939                 case RTE_FLOW_ACTION_TYPE_JUMP:
4940                         ret = flow_dv_validate_action_jump(actions,
4941                                                            action_flags,
4942                                                            attr, external,
4943                                                            error);
4944                         if (ret)
4945                                 return ret;
4946                         ++actions_n;
4947                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4948                         break;
4949                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4950                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4951                         ret = flow_dv_validate_action_modify_tcp_seq
4952                                                                 (action_flags,
4953                                                                  actions,
4954                                                                  item_flags,
4955                                                                  error);
4956                         if (ret < 0)
4957                                 return ret;
4958                         /* Count all modify-header actions as one action. */
4959                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4960                                 ++actions_n;
4961                         action_flags |= actions->type ==
4962                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4963                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4964                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4965                         break;
4966                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4967                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4968                         ret = flow_dv_validate_action_modify_tcp_ack
4969                                                                 (action_flags,
4970                                                                  actions,
4971                                                                  item_flags,
4972                                                                  error);
4973                         if (ret < 0)
4974                                 return ret;
4975                         /* Count all modify-header actions as one action. */
4976                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4977                                 ++actions_n;
4978                         action_flags |= actions->type ==
4979                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4980                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4981                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4982                         break;
4983                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4984                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4985                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4986                         break;
4987                 case RTE_FLOW_ACTION_TYPE_METER:
4988                         ret = mlx5_flow_validate_action_meter(dev,
4989                                                               action_flags,
4990                                                               actions, attr,
4991                                                               error);
4992                         if (ret < 0)
4993                                 return ret;
4994                         action_flags |= MLX5_FLOW_ACTION_METER;
4995                         ++actions_n;
4996                         break;
4997                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4998                         ret = flow_dv_validate_action_modify_ipv4_dscp
4999                                                          (action_flags,
5000                                                           actions,
5001                                                           item_flags,
5002                                                           error);
5003                         if (ret < 0)
5004                                 return ret;
5005                         /* Count all modify-header actions as one action. */
5006                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5007                                 ++actions_n;
5008                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5009                         break;
5010                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5011                         ret = flow_dv_validate_action_modify_ipv6_dscp
5012                                                                 (action_flags,
5013                                                                  actions,
5014                                                                  item_flags,
5015                                                                  error);
5016                         if (ret < 0)
5017                                 return ret;
5018                         /* Count all modify-header actions as one action. */
5019                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5020                                 ++actions_n;
5021                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5022                         break;
5023                 default:
5024                         return rte_flow_error_set(error, ENOTSUP,
5025                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5026                                                   actions,
5027                                                   "action not supported");
5028                 }
5029         }
5030         /*
5031          * Validate the drop action mutual exclusion with other actions.
5032          * Drop action is mutually-exclusive with any other action, except for
5033          * Count action.
5034          */
5035         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5036             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5037                 return rte_flow_error_set(error, EINVAL,
5038                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5039                                           "Drop action is mutually-exclusive "
5040                                           "with any other action, except for "
5041                                           "Count action");
5042         /* Eswitch has few restrictions on using items and actions */
5043         if (attr->transfer) {
5044                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5045                     action_flags & MLX5_FLOW_ACTION_FLAG)
5046                         return rte_flow_error_set(error, ENOTSUP,
5047                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5048                                                   NULL,
5049                                                   "unsupported action FLAG");
5050                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5051                     action_flags & MLX5_FLOW_ACTION_MARK)
5052                         return rte_flow_error_set(error, ENOTSUP,
5053                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5054                                                   NULL,
5055                                                   "unsupported action MARK");
5056                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5057                         return rte_flow_error_set(error, ENOTSUP,
5058                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5059                                                   NULL,
5060                                                   "unsupported action QUEUE");
5061                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5062                         return rte_flow_error_set(error, ENOTSUP,
5063                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5064                                                   NULL,
5065                                                   "unsupported action RSS");
5066                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5067                         return rte_flow_error_set(error, EINVAL,
5068                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5069                                                   actions,
5070                                                   "no fate action is found");
5071         } else {
5072                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5073                         return rte_flow_error_set(error, EINVAL,
5074                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5075                                                   actions,
5076                                                   "no fate action is found");
5077         }
5078         return 0;
5079 }
5080
5081 /**
5082  * Internal preparation function. Allocates the DV flow size,
5083  * this size is constant.
5084  *
5085  * @param[in] attr
5086  *   Pointer to the flow attributes.
5087  * @param[in] items
5088  *   Pointer to the list of items.
5089  * @param[in] actions
5090  *   Pointer to the list of actions.
5091  * @param[out] error
5092  *   Pointer to the error structure.
5093  *
5094  * @return
5095  *   Pointer to mlx5_flow object on success,
5096  *   otherwise NULL and rte_errno is set.
5097  */
5098 static struct mlx5_flow *
5099 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5100                 const struct rte_flow_item items[] __rte_unused,
5101                 const struct rte_flow_action actions[] __rte_unused,
5102                 struct rte_flow_error *error)
5103 {
5104         size_t size = sizeof(struct mlx5_flow);
5105         struct mlx5_flow *dev_flow;
5106
5107         dev_flow = rte_calloc(__func__, 1, size, 0);
5108         if (!dev_flow) {
5109                 rte_flow_error_set(error, ENOMEM,
5110                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5111                                    "not enough memory to create flow");
5112                 return NULL;
5113         }
5114         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5115         dev_flow->ingress = attr->ingress;
5116         dev_flow->transfer = attr->transfer;
5117         return dev_flow;
5118 }
5119
5120 #ifndef NDEBUG
5121 /**
5122  * Sanity check for match mask and value. Similar to check_valid_spec() in
5123  * kernel driver. If unmasked bit is present in value, it returns failure.
5124  *
5125  * @param match_mask
5126  *   pointer to match mask buffer.
5127  * @param match_value
5128  *   pointer to match value buffer.
5129  *
5130  * @return
5131  *   0 if valid, -EINVAL otherwise.
5132  */
5133 static int
5134 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5135 {
5136         uint8_t *m = match_mask;
5137         uint8_t *v = match_value;
5138         unsigned int i;
5139
5140         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5141                 if (v[i] & ~m[i]) {
5142                         DRV_LOG(ERR,
5143                                 "match_value differs from match_criteria"
5144                                 " %p[%u] != %p[%u]",
5145                                 match_value, i, match_mask, i);
5146                         return -EINVAL;
5147                 }
5148         }
5149         return 0;
5150 }
5151 #endif
5152
5153 /**
5154  * Add Ethernet item to matcher and to the value.
5155  *
5156  * @param[in, out] matcher
5157  *   Flow matcher.
5158  * @param[in, out] key
5159  *   Flow matcher value.
5160  * @param[in] item
5161  *   Flow pattern to translate.
5162  * @param[in] inner
5163  *   Item is inner pattern.
5164  */
5165 static void
5166 flow_dv_translate_item_eth(void *matcher, void *key,
5167                            const struct rte_flow_item *item, int inner)
5168 {
5169         const struct rte_flow_item_eth *eth_m = item->mask;
5170         const struct rte_flow_item_eth *eth_v = item->spec;
5171         const struct rte_flow_item_eth nic_mask = {
5172                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5173                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5174                 .type = RTE_BE16(0xffff),
5175         };
5176         void *headers_m;
5177         void *headers_v;
5178         char *l24_v;
5179         unsigned int i;
5180
5181         if (!eth_v)
5182                 return;
5183         if (!eth_m)
5184                 eth_m = &nic_mask;
5185         if (inner) {
5186                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5187                                          inner_headers);
5188                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5189         } else {
5190                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5191                                          outer_headers);
5192                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5193         }
5194         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5195                &eth_m->dst, sizeof(eth_m->dst));
5196         /* The value must be in the range of the mask. */
5197         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5198         for (i = 0; i < sizeof(eth_m->dst); ++i)
5199                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5200         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5201                &eth_m->src, sizeof(eth_m->src));
5202         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5203         /* The value must be in the range of the mask. */
5204         for (i = 0; i < sizeof(eth_m->dst); ++i)
5205                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5206         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5207                  rte_be_to_cpu_16(eth_m->type));
5208         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5209         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5210 }
5211
5212 /**
5213  * Add VLAN item to matcher and to the value.
5214  *
5215  * @param[in, out] dev_flow
5216  *   Flow descriptor.
5217  * @param[in, out] matcher
5218  *   Flow matcher.
5219  * @param[in, out] key
5220  *   Flow matcher value.
5221  * @param[in] item
5222  *   Flow pattern to translate.
5223  * @param[in] inner
5224  *   Item is inner pattern.
5225  */
5226 static void
5227 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5228                             void *matcher, void *key,
5229                             const struct rte_flow_item *item,
5230                             int inner)
5231 {
5232         const struct rte_flow_item_vlan *vlan_m = item->mask;
5233         const struct rte_flow_item_vlan *vlan_v = item->spec;
5234         void *headers_m;
5235         void *headers_v;
5236         uint16_t tci_m;
5237         uint16_t tci_v;
5238
5239         if (!vlan_v)
5240                 return;
5241         if (!vlan_m)
5242                 vlan_m = &rte_flow_item_vlan_mask;
5243         if (inner) {
5244                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5245                                          inner_headers);
5246                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5247         } else {
5248                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5249                                          outer_headers);
5250                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5251                 /*
5252                  * This is workaround, masks are not supported,
5253                  * and pre-validated.
5254                  */
5255                 dev_flow->dv.vf_vlan.tag =
5256                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5257         }
5258         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5259         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5260         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5261         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5262         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5263         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5264         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5265         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5266         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5267         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5268         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5269                  rte_be_to_cpu_16(vlan_m->inner_type));
5270         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5271                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5272 }
5273
5274 /**
5275  * Add IPV4 item to matcher and to the value.
5276  *
5277  * @param[in, out] matcher
5278  *   Flow matcher.
5279  * @param[in, out] key
5280  *   Flow matcher value.
5281  * @param[in] item
5282  *   Flow pattern to translate.
5283  * @param[in] inner
5284  *   Item is inner pattern.
5285  * @param[in] group
5286  *   The group to insert the rule.
5287  */
5288 static void
5289 flow_dv_translate_item_ipv4(void *matcher, void *key,
5290                             const struct rte_flow_item *item,
5291                             int inner, uint32_t group)
5292 {
5293         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5294         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5295         const struct rte_flow_item_ipv4 nic_mask = {
5296                 .hdr = {
5297                         .src_addr = RTE_BE32(0xffffffff),
5298                         .dst_addr = RTE_BE32(0xffffffff),
5299                         .type_of_service = 0xff,
5300                         .next_proto_id = 0xff,
5301                 },
5302         };
5303         void *headers_m;
5304         void *headers_v;
5305         char *l24_m;
5306         char *l24_v;
5307         uint8_t tos;
5308
5309         if (inner) {
5310                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5311                                          inner_headers);
5312                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5313         } else {
5314                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5315                                          outer_headers);
5316                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5317         }
5318         if (group == 0)
5319                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5320         else
5321                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5322         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5323         if (!ipv4_v)
5324                 return;
5325         if (!ipv4_m)
5326                 ipv4_m = &nic_mask;
5327         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5328                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5329         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5330                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5331         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5332         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5333         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5334                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5335         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5336                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5337         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5338         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5339         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5340         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5341                  ipv4_m->hdr.type_of_service);
5342         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5343         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5344                  ipv4_m->hdr.type_of_service >> 2);
5345         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5346         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5347                  ipv4_m->hdr.next_proto_id);
5348         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5349                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5350 }
5351
5352 /**
5353  * Add IPV6 item to matcher and to the value.
5354  *
5355  * @param[in, out] matcher
5356  *   Flow matcher.
5357  * @param[in, out] key
5358  *   Flow matcher value.
5359  * @param[in] item
5360  *   Flow pattern to translate.
5361  * @param[in] inner
5362  *   Item is inner pattern.
5363  * @param[in] group
5364  *   The group to insert the rule.
5365  */
5366 static void
5367 flow_dv_translate_item_ipv6(void *matcher, void *key,
5368                             const struct rte_flow_item *item,
5369                             int inner, uint32_t group)
5370 {
5371         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5372         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5373         const struct rte_flow_item_ipv6 nic_mask = {
5374                 .hdr = {
5375                         .src_addr =
5376                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5377                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5378                         .dst_addr =
5379                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5380                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5381                         .vtc_flow = RTE_BE32(0xffffffff),
5382                         .proto = 0xff,
5383                         .hop_limits = 0xff,
5384                 },
5385         };
5386         void *headers_m;
5387         void *headers_v;
5388         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5389         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5390         char *l24_m;
5391         char *l24_v;
5392         uint32_t vtc_m;
5393         uint32_t vtc_v;
5394         int i;
5395         int size;
5396
5397         if (inner) {
5398                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5399                                          inner_headers);
5400                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5401         } else {
5402                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5403                                          outer_headers);
5404                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5405         }
5406         if (group == 0)
5407                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5408         else
5409                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5410         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5411         if (!ipv6_v)
5412                 return;
5413         if (!ipv6_m)
5414                 ipv6_m = &nic_mask;
5415         size = sizeof(ipv6_m->hdr.dst_addr);
5416         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5417                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5418         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5419                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5420         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5421         for (i = 0; i < size; ++i)
5422                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5423         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5424                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5425         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5426                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5427         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5428         for (i = 0; i < size; ++i)
5429                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5430         /* TOS. */
5431         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5432         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5433         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5434         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5435         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5436         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5437         /* Label. */
5438         if (inner) {
5439                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5440                          vtc_m);
5441                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5442                          vtc_v);
5443         } else {
5444                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5445                          vtc_m);
5446                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5447                          vtc_v);
5448         }
5449         /* Protocol. */
5450         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5451                  ipv6_m->hdr.proto);
5452         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5453                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5454 }
5455
5456 /**
5457  * Add TCP item to matcher and to the value.
5458  *
5459  * @param[in, out] matcher
5460  *   Flow matcher.
5461  * @param[in, out] key
5462  *   Flow matcher value.
5463  * @param[in] item
5464  *   Flow pattern to translate.
5465  * @param[in] inner
5466  *   Item is inner pattern.
5467  */
5468 static void
5469 flow_dv_translate_item_tcp(void *matcher, void *key,
5470                            const struct rte_flow_item *item,
5471                            int inner)
5472 {
5473         const struct rte_flow_item_tcp *tcp_m = item->mask;
5474         const struct rte_flow_item_tcp *tcp_v = item->spec;
5475         void *headers_m;
5476         void *headers_v;
5477
5478         if (inner) {
5479                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5480                                          inner_headers);
5481                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5482         } else {
5483                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5484                                          outer_headers);
5485                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5486         }
5487         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5488         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5489         if (!tcp_v)
5490                 return;
5491         if (!tcp_m)
5492                 tcp_m = &rte_flow_item_tcp_mask;
5493         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5494                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5495         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5496                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5497         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5498                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5499         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5500                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5501         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5502                  tcp_m->hdr.tcp_flags);
5503         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5504                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5505 }
5506
5507 /**
5508  * Add UDP item to matcher and to the value.
5509  *
5510  * @param[in, out] matcher
5511  *   Flow matcher.
5512  * @param[in, out] key
5513  *   Flow matcher value.
5514  * @param[in] item
5515  *   Flow pattern to translate.
5516  * @param[in] inner
5517  *   Item is inner pattern.
5518  */
5519 static void
5520 flow_dv_translate_item_udp(void *matcher, void *key,
5521                            const struct rte_flow_item *item,
5522                            int inner)
5523 {
5524         const struct rte_flow_item_udp *udp_m = item->mask;
5525         const struct rte_flow_item_udp *udp_v = item->spec;
5526         void *headers_m;
5527         void *headers_v;
5528
5529         if (inner) {
5530                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5531                                          inner_headers);
5532                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5533         } else {
5534                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5535                                          outer_headers);
5536                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5537         }
5538         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5539         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5540         if (!udp_v)
5541                 return;
5542         if (!udp_m)
5543                 udp_m = &rte_flow_item_udp_mask;
5544         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5545                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5546         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5547                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5548         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5549                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5550         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5551                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5552 }
5553
5554 /**
5555  * Add GRE optional Key item to matcher and to the value.
5556  *
5557  * @param[in, out] matcher
5558  *   Flow matcher.
5559  * @param[in, out] key
5560  *   Flow matcher value.
5561  * @param[in] item
5562  *   Flow pattern to translate.
5563  * @param[in] inner
5564  *   Item is inner pattern.
5565  */
5566 static void
5567 flow_dv_translate_item_gre_key(void *matcher, void *key,
5568                                    const struct rte_flow_item *item)
5569 {
5570         const rte_be32_t *key_m = item->mask;
5571         const rte_be32_t *key_v = item->spec;
5572         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5573         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5574         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5575
5576         if (!key_v)
5577                 return;
5578         if (!key_m)
5579                 key_m = &gre_key_default_mask;
5580         /* GRE K bit must be on and should already be validated */
5581         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5582         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5583         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5584                  rte_be_to_cpu_32(*key_m) >> 8);
5585         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5586                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5587         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5588                  rte_be_to_cpu_32(*key_m) & 0xFF);
5589         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5590                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5591 }
5592
5593 /**
5594  * Add GRE item to matcher and to the value.
5595  *
5596  * @param[in, out] matcher
5597  *   Flow matcher.
5598  * @param[in, out] key
5599  *   Flow matcher value.
5600  * @param[in] item
5601  *   Flow pattern to translate.
5602  * @param[in] inner
5603  *   Item is inner pattern.
5604  */
5605 static void
5606 flow_dv_translate_item_gre(void *matcher, void *key,
5607                            const struct rte_flow_item *item,
5608                            int inner)
5609 {
5610         const struct rte_flow_item_gre *gre_m = item->mask;
5611         const struct rte_flow_item_gre *gre_v = item->spec;
5612         void *headers_m;
5613         void *headers_v;
5614         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5615         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5616         struct {
5617                 union {
5618                         __extension__
5619                         struct {
5620                                 uint16_t version:3;
5621                                 uint16_t rsvd0:9;
5622                                 uint16_t s_present:1;
5623                                 uint16_t k_present:1;
5624                                 uint16_t rsvd_bit1:1;
5625                                 uint16_t c_present:1;
5626                         };
5627                         uint16_t value;
5628                 };
5629         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5630
5631         if (inner) {
5632                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5633                                          inner_headers);
5634                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5635         } else {
5636                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5637                                          outer_headers);
5638                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5639         }
5640         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5641         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5642         if (!gre_v)
5643                 return;
5644         if (!gre_m)
5645                 gre_m = &rte_flow_item_gre_mask;
5646         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5647                  rte_be_to_cpu_16(gre_m->protocol));
5648         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5649                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5650         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5651         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5652         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5653                  gre_crks_rsvd0_ver_m.c_present);
5654         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5655                  gre_crks_rsvd0_ver_v.c_present &
5656                  gre_crks_rsvd0_ver_m.c_present);
5657         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5658                  gre_crks_rsvd0_ver_m.k_present);
5659         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5660                  gre_crks_rsvd0_ver_v.k_present &
5661                  gre_crks_rsvd0_ver_m.k_present);
5662         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5663                  gre_crks_rsvd0_ver_m.s_present);
5664         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5665                  gre_crks_rsvd0_ver_v.s_present &
5666                  gre_crks_rsvd0_ver_m.s_present);
5667 }
5668
5669 /**
5670  * Add NVGRE item to matcher and to the value.
5671  *
5672  * @param[in, out] matcher
5673  *   Flow matcher.
5674  * @param[in, out] key
5675  *   Flow matcher value.
5676  * @param[in] item
5677  *   Flow pattern to translate.
5678  * @param[in] inner
5679  *   Item is inner pattern.
5680  */
5681 static void
5682 flow_dv_translate_item_nvgre(void *matcher, void *key,
5683                              const struct rte_flow_item *item,
5684                              int inner)
5685 {
5686         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5687         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5688         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5689         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5690         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5691         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5692         char *gre_key_m;
5693         char *gre_key_v;
5694         int size;
5695         int i;
5696
5697         /* For NVGRE, GRE header fields must be set with defined values. */
5698         const struct rte_flow_item_gre gre_spec = {
5699                 .c_rsvd0_ver = RTE_BE16(0x2000),
5700                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5701         };
5702         const struct rte_flow_item_gre gre_mask = {
5703                 .c_rsvd0_ver = RTE_BE16(0xB000),
5704                 .protocol = RTE_BE16(UINT16_MAX),
5705         };
5706         const struct rte_flow_item gre_item = {
5707                 .spec = &gre_spec,
5708                 .mask = &gre_mask,
5709                 .last = NULL,
5710         };
5711         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5712         if (!nvgre_v)
5713                 return;
5714         if (!nvgre_m)
5715                 nvgre_m = &rte_flow_item_nvgre_mask;
5716         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5717         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5718         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5719         memcpy(gre_key_m, tni_flow_id_m, size);
5720         for (i = 0; i < size; ++i)
5721                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5722 }
5723
5724 /**
5725  * Add VXLAN item to matcher and to the value.
5726  *
5727  * @param[in, out] matcher
5728  *   Flow matcher.
5729  * @param[in, out] key
5730  *   Flow matcher value.
5731  * @param[in] item
5732  *   Flow pattern to translate.
5733  * @param[in] inner
5734  *   Item is inner pattern.
5735  */
5736 static void
5737 flow_dv_translate_item_vxlan(void *matcher, void *key,
5738                              const struct rte_flow_item *item,
5739                              int inner)
5740 {
5741         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5742         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5743         void *headers_m;
5744         void *headers_v;
5745         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5746         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5747         char *vni_m;
5748         char *vni_v;
5749         uint16_t dport;
5750         int size;
5751         int i;
5752
5753         if (inner) {
5754                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5755                                          inner_headers);
5756                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5757         } else {
5758                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5759                                          outer_headers);
5760                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5761         }
5762         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5763                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5764         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5765                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5766                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5767         }
5768         if (!vxlan_v)
5769                 return;
5770         if (!vxlan_m)
5771                 vxlan_m = &rte_flow_item_vxlan_mask;
5772         size = sizeof(vxlan_m->vni);
5773         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5774         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5775         memcpy(vni_m, vxlan_m->vni, size);
5776         for (i = 0; i < size; ++i)
5777                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5778 }
5779
5780 /**
5781  * Add Geneve item to matcher and to the value.
5782  *
5783  * @param[in, out] matcher
5784  *   Flow matcher.
5785  * @param[in, out] key
5786  *   Flow matcher value.
5787  * @param[in] item
5788  *   Flow pattern to translate.
5789  * @param[in] inner
5790  *   Item is inner pattern.
5791  */
5792
5793 static void
5794 flow_dv_translate_item_geneve(void *matcher, void *key,
5795                               const struct rte_flow_item *item, int inner)
5796 {
5797         const struct rte_flow_item_geneve *geneve_m = item->mask;
5798         const struct rte_flow_item_geneve *geneve_v = item->spec;
5799         void *headers_m;
5800         void *headers_v;
5801         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5802         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5803         uint16_t dport;
5804         uint16_t gbhdr_m;
5805         uint16_t gbhdr_v;
5806         char *vni_m;
5807         char *vni_v;
5808         size_t size, i;
5809
5810         if (inner) {
5811                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5812                                          inner_headers);
5813                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5814         } else {
5815                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5816                                          outer_headers);
5817                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5818         }
5819         dport = MLX5_UDP_PORT_GENEVE;
5820         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5821                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5822                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5823         }
5824         if (!geneve_v)
5825                 return;
5826         if (!geneve_m)
5827                 geneve_m = &rte_flow_item_geneve_mask;
5828         size = sizeof(geneve_m->vni);
5829         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5830         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5831         memcpy(vni_m, geneve_m->vni, size);
5832         for (i = 0; i < size; ++i)
5833                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5834         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5835                  rte_be_to_cpu_16(geneve_m->protocol));
5836         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5837                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5838         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5839         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5840         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5841                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5842         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5843                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5844         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5845                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5846         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5847                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5848                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5849 }
5850
5851 /**
5852  * Add MPLS item to matcher and to the value.
5853  *
5854  * @param[in, out] matcher
5855  *   Flow matcher.
5856  * @param[in, out] key
5857  *   Flow matcher value.
5858  * @param[in] item
5859  *   Flow pattern to translate.
5860  * @param[in] prev_layer
5861  *   The protocol layer indicated in previous item.
5862  * @param[in] inner
5863  *   Item is inner pattern.
5864  */
5865 static void
5866 flow_dv_translate_item_mpls(void *matcher, void *key,
5867                             const struct rte_flow_item *item,
5868                             uint64_t prev_layer,
5869                             int inner)
5870 {
5871         const uint32_t *in_mpls_m = item->mask;
5872         const uint32_t *in_mpls_v = item->spec;
5873         uint32_t *out_mpls_m = 0;
5874         uint32_t *out_mpls_v = 0;
5875         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5876         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5877         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5878                                      misc_parameters_2);
5879         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5880         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5881         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5882
5883         switch (prev_layer) {
5884         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5885                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5886                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5887                          MLX5_UDP_PORT_MPLS);
5888                 break;
5889         case MLX5_FLOW_LAYER_GRE:
5890                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5891                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5892                          RTE_ETHER_TYPE_MPLS);
5893                 break;
5894         default:
5895                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5896                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5897                          IPPROTO_MPLS);
5898                 break;
5899         }
5900         if (!in_mpls_v)
5901                 return;
5902         if (!in_mpls_m)
5903                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5904         switch (prev_layer) {
5905         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5906                 out_mpls_m =
5907                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5908                                                  outer_first_mpls_over_udp);
5909                 out_mpls_v =
5910                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5911                                                  outer_first_mpls_over_udp);
5912                 break;
5913         case MLX5_FLOW_LAYER_GRE:
5914                 out_mpls_m =
5915                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5916                                                  outer_first_mpls_over_gre);
5917                 out_mpls_v =
5918                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5919                                                  outer_first_mpls_over_gre);
5920                 break;
5921         default:
5922                 /* Inner MPLS not over GRE is not supported. */
5923                 if (!inner) {
5924                         out_mpls_m =
5925                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5926                                                          misc2_m,
5927                                                          outer_first_mpls);
5928                         out_mpls_v =
5929                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5930                                                          misc2_v,
5931                                                          outer_first_mpls);
5932                 }
5933                 break;
5934         }
5935         if (out_mpls_m && out_mpls_v) {
5936                 *out_mpls_m = *in_mpls_m;
5937                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5938         }
5939 }
5940
5941 /**
5942  * Add metadata register item to matcher
5943  *
5944  * @param[in, out] matcher
5945  *   Flow matcher.
5946  * @param[in, out] key
5947  *   Flow matcher value.
5948  * @param[in] reg_type
5949  *   Type of device metadata register
5950  * @param[in] value
5951  *   Register value
5952  * @param[in] mask
5953  *   Register mask
5954  */
5955 static void
5956 flow_dv_match_meta_reg(void *matcher, void *key,
5957                        enum modify_reg reg_type,
5958                        uint32_t data, uint32_t mask)
5959 {
5960         void *misc2_m =
5961                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5962         void *misc2_v =
5963                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5964         uint32_t temp;
5965
5966         data &= mask;
5967         switch (reg_type) {
5968         case REG_A:
5969                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5970                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5971                 break;
5972         case REG_B:
5973                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5974                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5975                 break;
5976         case REG_C_0:
5977                 /*
5978                  * The metadata register C0 field might be divided into
5979                  * source vport index and META item value, we should set
5980                  * this field according to specified mask, not as whole one.
5981                  */
5982                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
5983                 temp |= mask;
5984                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
5985                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
5986                 temp &= ~mask;
5987                 temp |= data;
5988                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
5989                 break;
5990         case REG_C_1:
5991                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5992                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5993                 break;
5994         case REG_C_2:
5995                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5996                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5997                 break;
5998         case REG_C_3:
5999                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6000                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6001                 break;
6002         case REG_C_4:
6003                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6004                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6005                 break;
6006         case REG_C_5:
6007                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6008                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6009                 break;
6010         case REG_C_6:
6011                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6012                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6013                 break;
6014         case REG_C_7:
6015                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6016                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6017                 break;
6018         default:
6019                 assert(false);
6020                 break;
6021         }
6022 }
6023
6024 /**
6025  * Add MARK item to matcher
6026  *
6027  * @param[in] dev
6028  *   The device to configure through.
6029  * @param[in, out] matcher
6030  *   Flow matcher.
6031  * @param[in, out] key
6032  *   Flow matcher value.
6033  * @param[in] item
6034  *   Flow pattern to translate.
6035  */
6036 static void
6037 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6038                             void *matcher, void *key,
6039                             const struct rte_flow_item *item)
6040 {
6041         struct mlx5_priv *priv = dev->data->dev_private;
6042         const struct rte_flow_item_mark *mark;
6043         uint32_t value;
6044         uint32_t mask;
6045
6046         mark = item->mask ? (const void *)item->mask :
6047                             &rte_flow_item_mark_mask;
6048         mask = mark->id & priv->sh->dv_mark_mask;
6049         mark = (const void *)item->spec;
6050         assert(mark);
6051         value = mark->id & priv->sh->dv_mark_mask & mask;
6052         if (mask) {
6053                 enum modify_reg reg;
6054
6055                 /* Get the metadata register index for the mark. */
6056                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6057                 assert(reg > 0);
6058                 if (reg == REG_C_0) {
6059                         struct mlx5_priv *priv = dev->data->dev_private;
6060                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6061                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6062
6063                         mask &= msk_c0;
6064                         mask <<= shl_c0;
6065                         value <<= shl_c0;
6066                 }
6067                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6068         }
6069 }
6070
6071 /**
6072  * Add META item to matcher
6073  *
6074  * @param[in] dev
6075  *   The devich to configure through.
6076  * @param[in, out] matcher
6077  *   Flow matcher.
6078  * @param[in, out] key
6079  *   Flow matcher value.
6080  * @param[in] attr
6081  *   Attributes of flow that includes this item.
6082  * @param[in] item
6083  *   Flow pattern to translate.
6084  */
6085 static void
6086 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6087                             void *matcher, void *key,
6088                             const struct rte_flow_attr *attr,
6089                             const struct rte_flow_item *item)
6090 {
6091         const struct rte_flow_item_meta *meta_m;
6092         const struct rte_flow_item_meta *meta_v;
6093
6094         meta_m = (const void *)item->mask;
6095         if (!meta_m)
6096                 meta_m = &rte_flow_item_meta_mask;
6097         meta_v = (const void *)item->spec;
6098         if (meta_v) {
6099                 enum modify_reg reg;
6100                 uint32_t value = meta_v->data;
6101                 uint32_t mask = meta_m->data;
6102
6103                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6104                 if (reg < 0)
6105                         return;
6106                 /*
6107                  * In datapath code there is no endianness
6108                  * coversions for perfromance reasons, all
6109                  * pattern conversions are done in rte_flow.
6110                  */
6111                 value = rte_cpu_to_be_32(value);
6112                 mask = rte_cpu_to_be_32(mask);
6113                 if (reg == REG_C_0) {
6114                         struct mlx5_priv *priv = dev->data->dev_private;
6115                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6116                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6117 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6118                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6119
6120                         value >>= shr_c0;
6121                         mask >>= shr_c0;
6122 #endif
6123                         value <<= shl_c0;
6124                         mask <<= shl_c0;
6125                         assert(msk_c0);
6126                         assert(!(~msk_c0 & mask));
6127                 }
6128                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6129         }
6130 }
6131
6132 /**
6133  * Add vport metadata Reg C0 item to matcher
6134  *
6135  * @param[in, out] matcher
6136  *   Flow matcher.
6137  * @param[in, out] key
6138  *   Flow matcher value.
6139  * @param[in] reg
6140  *   Flow pattern to translate.
6141  */
6142 static void
6143 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6144                                   uint32_t value, uint32_t mask)
6145 {
6146         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6147 }
6148
6149 /**
6150  * Add tag item to matcher
6151  *
6152  * @param[in] dev
6153  *   The devich to configure through.
6154  * @param[in, out] matcher
6155  *   Flow matcher.
6156  * @param[in, out] key
6157  *   Flow matcher value.
6158  * @param[in] item
6159  *   Flow pattern to translate.
6160  */
6161 static void
6162 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6163                                 void *matcher, void *key,
6164                                 const struct rte_flow_item *item)
6165 {
6166         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6167         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6168         uint32_t mask, value;
6169
6170         assert(tag_v);
6171         value = tag_v->data;
6172         mask = tag_m ? tag_m->data : UINT32_MAX;
6173         if (tag_v->id == REG_C_0) {
6174                 struct mlx5_priv *priv = dev->data->dev_private;
6175                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6176                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6177
6178                 mask &= msk_c0;
6179                 mask <<= shl_c0;
6180                 value <<= shl_c0;
6181         }
6182         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6183 }
6184
6185 /**
6186  * Add TAG item to matcher
6187  *
6188  * @param[in] dev
6189  *   The devich to configure through.
6190  * @param[in, out] matcher
6191  *   Flow matcher.
6192  * @param[in, out] key
6193  *   Flow matcher value.
6194  * @param[in] item
6195  *   Flow pattern to translate.
6196  */
6197 static void
6198 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6199                            void *matcher, void *key,
6200                            const struct rte_flow_item *item)
6201 {
6202         const struct rte_flow_item_tag *tag_v = item->spec;
6203         const struct rte_flow_item_tag *tag_m = item->mask;
6204         enum modify_reg reg;
6205
6206         assert(tag_v);
6207         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6208         /* Get the metadata register index for the tag. */
6209         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6210         assert(reg > 0);
6211         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6212 }
6213
6214 /**
6215  * Add source vport match to the specified matcher.
6216  *
6217  * @param[in, out] matcher
6218  *   Flow matcher.
6219  * @param[in, out] key
6220  *   Flow matcher value.
6221  * @param[in] port
6222  *   Source vport value to match
6223  * @param[in] mask
6224  *   Mask
6225  */
6226 static void
6227 flow_dv_translate_item_source_vport(void *matcher, void *key,
6228                                     int16_t port, uint16_t mask)
6229 {
6230         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6231         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6232
6233         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6234         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6235 }
6236
6237 /**
6238  * Translate port-id item to eswitch match on  port-id.
6239  *
6240  * @param[in] dev
6241  *   The devich to configure through.
6242  * @param[in, out] matcher
6243  *   Flow matcher.
6244  * @param[in, out] key
6245  *   Flow matcher value.
6246  * @param[in] item
6247  *   Flow pattern to translate.
6248  *
6249  * @return
6250  *   0 on success, a negative errno value otherwise.
6251  */
6252 static int
6253 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6254                                void *key, const struct rte_flow_item *item)
6255 {
6256         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6257         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6258         struct mlx5_priv *priv;
6259         uint16_t mask, id;
6260
6261         mask = pid_m ? pid_m->id : 0xffff;
6262         id = pid_v ? pid_v->id : dev->data->port_id;
6263         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6264         if (!priv)
6265                 return -rte_errno;
6266         /* Translate to vport field or to metadata, depending on mode. */
6267         if (priv->vport_meta_mask)
6268                 flow_dv_translate_item_meta_vport(matcher, key,
6269                                                   priv->vport_meta_tag,
6270                                                   priv->vport_meta_mask);
6271         else
6272                 flow_dv_translate_item_source_vport(matcher, key,
6273                                                     priv->vport_id, mask);
6274         return 0;
6275 }
6276
6277 /**
6278  * Add ICMP6 item to matcher and to the value.
6279  *
6280  * @param[in, out] matcher
6281  *   Flow matcher.
6282  * @param[in, out] key
6283  *   Flow matcher value.
6284  * @param[in] item
6285  *   Flow pattern to translate.
6286  * @param[in] inner
6287  *   Item is inner pattern.
6288  */
6289 static void
6290 flow_dv_translate_item_icmp6(void *matcher, void *key,
6291                               const struct rte_flow_item *item,
6292                               int inner)
6293 {
6294         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6295         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6296         void *headers_m;
6297         void *headers_v;
6298         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6299                                      misc_parameters_3);
6300         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6301         if (inner) {
6302                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6303                                          inner_headers);
6304                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6305         } else {
6306                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6307                                          outer_headers);
6308                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6309         }
6310         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6311         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6312         if (!icmp6_v)
6313                 return;
6314         if (!icmp6_m)
6315                 icmp6_m = &rte_flow_item_icmp6_mask;
6316         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6317         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6318                  icmp6_v->type & icmp6_m->type);
6319         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6320         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6321                  icmp6_v->code & icmp6_m->code);
6322 }
6323
6324 /**
6325  * Add ICMP item to matcher and to the value.
6326  *
6327  * @param[in, out] matcher
6328  *   Flow matcher.
6329  * @param[in, out] key
6330  *   Flow matcher value.
6331  * @param[in] item
6332  *   Flow pattern to translate.
6333  * @param[in] inner
6334  *   Item is inner pattern.
6335  */
6336 static void
6337 flow_dv_translate_item_icmp(void *matcher, void *key,
6338                             const struct rte_flow_item *item,
6339                             int inner)
6340 {
6341         const struct rte_flow_item_icmp *icmp_m = item->mask;
6342         const struct rte_flow_item_icmp *icmp_v = item->spec;
6343         void *headers_m;
6344         void *headers_v;
6345         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6346                                      misc_parameters_3);
6347         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6348         if (inner) {
6349                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6350                                          inner_headers);
6351                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6352         } else {
6353                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6354                                          outer_headers);
6355                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6356         }
6357         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6358         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6359         if (!icmp_v)
6360                 return;
6361         if (!icmp_m)
6362                 icmp_m = &rte_flow_item_icmp_mask;
6363         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6364                  icmp_m->hdr.icmp_type);
6365         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6366                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6367         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6368                  icmp_m->hdr.icmp_code);
6369         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6370                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6371 }
6372
6373 /**
6374  * Add GTP item to matcher and to the value.
6375  *
6376  * @param[in, out] matcher
6377  *   Flow matcher.
6378  * @param[in, out] key
6379  *   Flow matcher value.
6380  * @param[in] item
6381  *   Flow pattern to translate.
6382  * @param[in] inner
6383  *   Item is inner pattern.
6384  */
6385 static void
6386 flow_dv_translate_item_gtp(void *matcher, void *key,
6387                            const struct rte_flow_item *item, int inner)
6388 {
6389         const struct rte_flow_item_gtp *gtp_m = item->mask;
6390         const struct rte_flow_item_gtp *gtp_v = item->spec;
6391         void *headers_m;
6392         void *headers_v;
6393         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6394                                      misc_parameters_3);
6395         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6396         uint16_t dport = RTE_GTPU_UDP_PORT;
6397
6398         if (inner) {
6399                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6400                                          inner_headers);
6401                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6402         } else {
6403                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6404                                          outer_headers);
6405                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6406         }
6407         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6408                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6409                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6410         }
6411         if (!gtp_v)
6412                 return;
6413         if (!gtp_m)
6414                 gtp_m = &rte_flow_item_gtp_mask;
6415         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6416         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6417                  gtp_v->msg_type & gtp_m->msg_type);
6418         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6419                  rte_be_to_cpu_32(gtp_m->teid));
6420         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6421                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6422 }
6423
6424 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6425
6426 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6427         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6428                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6429
6430 /**
6431  * Calculate flow matcher enable bitmap.
6432  *
6433  * @param match_criteria
6434  *   Pointer to flow matcher criteria.
6435  *
6436  * @return
6437  *   Bitmap of enabled fields.
6438  */
6439 static uint8_t
6440 flow_dv_matcher_enable(uint32_t *match_criteria)
6441 {
6442         uint8_t match_criteria_enable;
6443
6444         match_criteria_enable =
6445                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6446                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6447         match_criteria_enable |=
6448                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6449                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6450         match_criteria_enable |=
6451                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6452                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6453         match_criteria_enable |=
6454                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6455                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6456         match_criteria_enable |=
6457                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6458                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6459         return match_criteria_enable;
6460 }
6461
6462
6463 /**
6464  * Get a flow table.
6465  *
6466  * @param[in, out] dev
6467  *   Pointer to rte_eth_dev structure.
6468  * @param[in] table_id
6469  *   Table id to use.
6470  * @param[in] egress
6471  *   Direction of the table.
6472  * @param[in] transfer
6473  *   E-Switch or NIC flow.
6474  * @param[out] error
6475  *   pointer to error structure.
6476  *
6477  * @return
6478  *   Returns tables resource based on the index, NULL in case of failed.
6479  */
6480 static struct mlx5_flow_tbl_resource *
6481 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6482                          uint32_t table_id, uint8_t egress,
6483                          uint8_t transfer,
6484                          struct rte_flow_error *error)
6485 {
6486         struct mlx5_priv *priv = dev->data->dev_private;
6487         struct mlx5_ibv_shared *sh = priv->sh;
6488         struct mlx5_flow_tbl_resource *tbl;
6489         union mlx5_flow_tbl_key table_key = {
6490                 {
6491                         .table_id = table_id,
6492                         .reserved = 0,
6493                         .domain = !!transfer,
6494                         .direction = !!egress,
6495                 }
6496         };
6497         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6498                                                          table_key.v64);
6499         struct mlx5_flow_tbl_data_entry *tbl_data;
6500         int ret;
6501         void *domain;
6502
6503         if (pos) {
6504                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6505                                         entry);
6506                 tbl = &tbl_data->tbl;
6507                 rte_atomic32_inc(&tbl->refcnt);
6508                 return tbl;
6509         }
6510         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6511         if (!tbl_data) {
6512                 rte_flow_error_set(error, ENOMEM,
6513                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6514                                    NULL,
6515                                    "cannot allocate flow table data entry");
6516                 return NULL;
6517         }
6518         tbl = &tbl_data->tbl;
6519         pos = &tbl_data->entry;
6520         if (transfer)
6521                 domain = sh->fdb_domain;
6522         else if (egress)
6523                 domain = sh->tx_domain;
6524         else
6525                 domain = sh->rx_domain;
6526         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6527         if (!tbl->obj) {
6528                 rte_flow_error_set(error, ENOMEM,
6529                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6530                                    NULL, "cannot create flow table object");
6531                 rte_free(tbl_data);
6532                 return NULL;
6533         }
6534         /*
6535          * No multi-threads now, but still better to initialize the reference
6536          * count before insert it into the hash list.
6537          */
6538         rte_atomic32_init(&tbl->refcnt);
6539         /* Jump action reference count is initialized here. */
6540         rte_atomic32_init(&tbl_data->jump.refcnt);
6541         pos->key = table_key.v64;
6542         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6543         if (ret < 0) {
6544                 rte_flow_error_set(error, -ret,
6545                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6546                                    "cannot insert flow table data entry");
6547                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6548                 rte_free(tbl_data);
6549         }
6550         rte_atomic32_inc(&tbl->refcnt);
6551         return tbl;
6552 }
6553
6554 /**
6555  * Release a flow table.
6556  *
6557  * @param[in] dev
6558  *   Pointer to rte_eth_dev structure.
6559  * @param[in] tbl
6560  *   Table resource to be released.
6561  *
6562  * @return
6563  *   Returns 0 if table was released, else return 1;
6564  */
6565 static int
6566 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6567                              struct mlx5_flow_tbl_resource *tbl)
6568 {
6569         struct mlx5_priv *priv = dev->data->dev_private;
6570         struct mlx5_ibv_shared *sh = priv->sh;
6571         struct mlx5_flow_tbl_data_entry *tbl_data =
6572                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6573
6574         if (!tbl)
6575                 return 0;
6576         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6577                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6578
6579                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6580                 tbl->obj = NULL;
6581                 /* remove the entry from the hash list and free memory. */
6582                 mlx5_hlist_remove(sh->flow_tbls, pos);
6583                 rte_free(tbl_data);
6584                 return 0;
6585         }
6586         return 1;
6587 }
6588
6589 /**
6590  * Register the flow matcher.
6591  *
6592  * @param[in, out] dev
6593  *   Pointer to rte_eth_dev structure.
6594  * @param[in, out] matcher
6595  *   Pointer to flow matcher.
6596  * @param[in, out] key
6597  *   Pointer to flow table key.
6598  * @parm[in, out] dev_flow
6599  *   Pointer to the dev_flow.
6600  * @param[out] error
6601  *   pointer to error structure.
6602  *
6603  * @return
6604  *   0 on success otherwise -errno and errno is set.
6605  */
6606 static int
6607 flow_dv_matcher_register(struct rte_eth_dev *dev,
6608                          struct mlx5_flow_dv_matcher *matcher,
6609                          union mlx5_flow_tbl_key *key,
6610                          struct mlx5_flow *dev_flow,
6611                          struct rte_flow_error *error)
6612 {
6613         struct mlx5_priv *priv = dev->data->dev_private;
6614         struct mlx5_ibv_shared *sh = priv->sh;
6615         struct mlx5_flow_dv_matcher *cache_matcher;
6616         struct mlx5dv_flow_matcher_attr dv_attr = {
6617                 .type = IBV_FLOW_ATTR_NORMAL,
6618                 .match_mask = (void *)&matcher->mask,
6619         };
6620         struct mlx5_flow_tbl_resource *tbl;
6621         struct mlx5_flow_tbl_data_entry *tbl_data;
6622
6623         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6624                                        key->domain, error);
6625         if (!tbl)
6626                 return -rte_errno;      /* No need to refill the error info */
6627         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6628         /* Lookup from cache. */
6629         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6630                 if (matcher->crc == cache_matcher->crc &&
6631                     matcher->priority == cache_matcher->priority &&
6632                     !memcmp((const void *)matcher->mask.buf,
6633                             (const void *)cache_matcher->mask.buf,
6634                             cache_matcher->mask.size)) {
6635                         DRV_LOG(DEBUG,
6636                                 "%s group %u priority %hd use %s "
6637                                 "matcher %p: refcnt %d++",
6638                                 key->domain ? "FDB" : "NIC", key->table_id,
6639                                 cache_matcher->priority,
6640                                 key->direction ? "tx" : "rx",
6641                                 (void *)cache_matcher,
6642                                 rte_atomic32_read(&cache_matcher->refcnt));
6643                         rte_atomic32_inc(&cache_matcher->refcnt);
6644                         dev_flow->dv.matcher = cache_matcher;
6645                         /* old matcher should not make the table ref++. */
6646                         flow_dv_tbl_resource_release(dev, tbl);
6647                         return 0;
6648                 }
6649         }
6650         /* Register new matcher. */
6651         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6652         if (!cache_matcher) {
6653                 flow_dv_tbl_resource_release(dev, tbl);
6654                 return rte_flow_error_set(error, ENOMEM,
6655                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6656                                           "cannot allocate matcher memory");
6657         }
6658         *cache_matcher = *matcher;
6659         dv_attr.match_criteria_enable =
6660                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6661         dv_attr.priority = matcher->priority;
6662         if (key->direction)
6663                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6664         cache_matcher->matcher_object =
6665                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6666         if (!cache_matcher->matcher_object) {
6667                 rte_free(cache_matcher);
6668 #ifdef HAVE_MLX5DV_DR
6669                 flow_dv_tbl_resource_release(dev, tbl);
6670 #endif
6671                 return rte_flow_error_set(error, ENOMEM,
6672                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6673                                           NULL, "cannot create matcher");
6674         }
6675         /* Save the table information */
6676         cache_matcher->tbl = tbl;
6677         rte_atomic32_init(&cache_matcher->refcnt);
6678         /* only matcher ref++, table ref++ already done above in get API. */
6679         rte_atomic32_inc(&cache_matcher->refcnt);
6680         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6681         dev_flow->dv.matcher = cache_matcher;
6682         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6683                 key->domain ? "FDB" : "NIC", key->table_id,
6684                 cache_matcher->priority,
6685                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6686                 rte_atomic32_read(&cache_matcher->refcnt));
6687         return 0;
6688 }
6689
6690 /**
6691  * Find existing tag resource or create and register a new one.
6692  *
6693  * @param dev[in, out]
6694  *   Pointer to rte_eth_dev structure.
6695  * @param[in, out] tag_be24
6696  *   Tag value in big endian then R-shift 8.
6697  * @parm[in, out] dev_flow
6698  *   Pointer to the dev_flow.
6699  * @param[out] error
6700  *   pointer to error structure.
6701  *
6702  * @return
6703  *   0 on success otherwise -errno and errno is set.
6704  */
6705 static int
6706 flow_dv_tag_resource_register
6707                         (struct rte_eth_dev *dev,
6708                          uint32_t tag_be24,
6709                          struct mlx5_flow *dev_flow,
6710                          struct rte_flow_error *error)
6711 {
6712         struct mlx5_priv *priv = dev->data->dev_private;
6713         struct mlx5_ibv_shared *sh = priv->sh;
6714         struct mlx5_flow_dv_tag_resource *cache_resource;
6715         struct mlx5_hlist_entry *entry;
6716
6717         /* Lookup a matching resource from cache. */
6718         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6719         if (entry) {
6720                 cache_resource = container_of
6721                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6722                 rte_atomic32_inc(&cache_resource->refcnt);
6723                 dev_flow->dv.tag_resource = cache_resource;
6724                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6725                         (void *)cache_resource,
6726                         rte_atomic32_read(&cache_resource->refcnt));
6727                 return 0;
6728         }
6729         /* Register new resource. */
6730         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6731         if (!cache_resource)
6732                 return rte_flow_error_set(error, ENOMEM,
6733                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6734                                           "cannot allocate resource memory");
6735         cache_resource->entry.key = (uint64_t)tag_be24;
6736         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6737         if (!cache_resource->action) {
6738                 rte_free(cache_resource);
6739                 return rte_flow_error_set(error, ENOMEM,
6740                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6741                                           NULL, "cannot create action");
6742         }
6743         rte_atomic32_init(&cache_resource->refcnt);
6744         rte_atomic32_inc(&cache_resource->refcnt);
6745         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6746                 mlx5_glue->destroy_flow_action(cache_resource->action);
6747                 rte_free(cache_resource);
6748                 return rte_flow_error_set(error, EEXIST,
6749                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6750                                           NULL, "cannot insert tag");
6751         }
6752         dev_flow->dv.tag_resource = cache_resource;
6753         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6754                 (void *)cache_resource,
6755                 rte_atomic32_read(&cache_resource->refcnt));
6756         return 0;
6757 }
6758
6759 /**
6760  * Release the tag.
6761  *
6762  * @param dev
6763  *   Pointer to Ethernet device.
6764  * @param flow
6765  *   Pointer to mlx5_flow.
6766  *
6767  * @return
6768  *   1 while a reference on it exists, 0 when freed.
6769  */
6770 static int
6771 flow_dv_tag_release(struct rte_eth_dev *dev,
6772                     struct mlx5_flow_dv_tag_resource *tag)
6773 {
6774         struct mlx5_priv *priv = dev->data->dev_private;
6775         struct mlx5_ibv_shared *sh = priv->sh;
6776
6777         assert(tag);
6778         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6779                 dev->data->port_id, (void *)tag,
6780                 rte_atomic32_read(&tag->refcnt));
6781         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6782                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6783                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6784                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6785                         dev->data->port_id, (void *)tag);
6786                 rte_free(tag);
6787                 return 0;
6788         }
6789         return 1;
6790 }
6791
6792 /**
6793  * Translate port ID action to vport.
6794  *
6795  * @param[in] dev
6796  *   Pointer to rte_eth_dev structure.
6797  * @param[in] action
6798  *   Pointer to the port ID action.
6799  * @param[out] dst_port_id
6800  *   The target port ID.
6801  * @param[out] error
6802  *   Pointer to the error structure.
6803  *
6804  * @return
6805  *   0 on success, a negative errno value otherwise and rte_errno is set.
6806  */
6807 static int
6808 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6809                                  const struct rte_flow_action *action,
6810                                  uint32_t *dst_port_id,
6811                                  struct rte_flow_error *error)
6812 {
6813         uint32_t port;
6814         struct mlx5_priv *priv;
6815         const struct rte_flow_action_port_id *conf =
6816                         (const struct rte_flow_action_port_id *)action->conf;
6817
6818         port = conf->original ? dev->data->port_id : conf->id;
6819         priv = mlx5_port_to_eswitch_info(port, false);
6820         if (!priv)
6821                 return rte_flow_error_set(error, -rte_errno,
6822                                           RTE_FLOW_ERROR_TYPE_ACTION,
6823                                           NULL,
6824                                           "No eswitch info was found for port");
6825 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6826         /*
6827          * This parameter is transferred to
6828          * mlx5dv_dr_action_create_dest_ib_port().
6829          */
6830         *dst_port_id = priv->ibv_port;
6831 #else
6832         /*
6833          * Legacy mode, no LAG configurations is supported.
6834          * This parameter is transferred to
6835          * mlx5dv_dr_action_create_dest_vport().
6836          */
6837         *dst_port_id = priv->vport_id;
6838 #endif
6839         return 0;
6840 }
6841
6842 /**
6843  * Add Tx queue matcher
6844  *
6845  * @param[in] dev
6846  *   Pointer to the dev struct.
6847  * @param[in, out] matcher
6848  *   Flow matcher.
6849  * @param[in, out] key
6850  *   Flow matcher value.
6851  * @param[in] item
6852  *   Flow pattern to translate.
6853  * @param[in] inner
6854  *   Item is inner pattern.
6855  */
6856 static void
6857 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6858                                 void *matcher, void *key,
6859                                 const struct rte_flow_item *item)
6860 {
6861         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6862         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6863         void *misc_m =
6864                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6865         void *misc_v =
6866                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6867         struct mlx5_txq_ctrl *txq;
6868         uint32_t queue;
6869
6870
6871         queue_m = (const void *)item->mask;
6872         if (!queue_m)
6873                 return;
6874         queue_v = (const void *)item->spec;
6875         if (!queue_v)
6876                 return;
6877         txq = mlx5_txq_get(dev, queue_v->queue);
6878         if (!txq)
6879                 return;
6880         queue = txq->obj->sq->id;
6881         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6882         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6883                  queue & queue_m->queue);
6884         mlx5_txq_release(dev, queue_v->queue);
6885 }
6886
6887 /**
6888  * Set the hash fields according to the @p flow information.
6889  *
6890  * @param[in] dev_flow
6891  *   Pointer to the mlx5_flow.
6892  */
6893 static void
6894 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6895 {
6896         struct rte_flow *flow = dev_flow->flow;
6897         uint64_t items = dev_flow->layers;
6898         int rss_inner = 0;
6899         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6900
6901         dev_flow->hash_fields = 0;
6902 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6903         if (flow->rss.level >= 2) {
6904                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6905                 rss_inner = 1;
6906         }
6907 #endif
6908         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6909             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6910                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6911                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6912                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6913                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6914                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6915                         else
6916                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6917                 }
6918         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6919                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6920                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6921                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6922                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
6923                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6924                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
6925                         else
6926                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
6927                 }
6928         }
6929         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
6930             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
6931                 if (rss_types & ETH_RSS_UDP) {
6932                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6933                                 dev_flow->hash_fields |=
6934                                                 IBV_RX_HASH_SRC_PORT_UDP;
6935                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6936                                 dev_flow->hash_fields |=
6937                                                 IBV_RX_HASH_DST_PORT_UDP;
6938                         else
6939                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
6940                 }
6941         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
6942                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
6943                 if (rss_types & ETH_RSS_TCP) {
6944                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6945                                 dev_flow->hash_fields |=
6946                                                 IBV_RX_HASH_SRC_PORT_TCP;
6947                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6948                                 dev_flow->hash_fields |=
6949                                                 IBV_RX_HASH_DST_PORT_TCP;
6950                         else
6951                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
6952                 }
6953         }
6954 }
6955
6956 /**
6957  * Fill the flow with DV spec, lock free
6958  * (mutex should be acquired by caller).
6959  *
6960  * @param[in] dev
6961  *   Pointer to rte_eth_dev structure.
6962  * @param[in, out] dev_flow
6963  *   Pointer to the sub flow.
6964  * @param[in] attr
6965  *   Pointer to the flow attributes.
6966  * @param[in] items
6967  *   Pointer to the list of items.
6968  * @param[in] actions
6969  *   Pointer to the list of actions.
6970  * @param[out] error
6971  *   Pointer to the error structure.
6972  *
6973  * @return
6974  *   0 on success, a negative errno value otherwise and rte_errno is set.
6975  */
6976 static int
6977 __flow_dv_translate(struct rte_eth_dev *dev,
6978                     struct mlx5_flow *dev_flow,
6979                     const struct rte_flow_attr *attr,
6980                     const struct rte_flow_item items[],
6981                     const struct rte_flow_action actions[],
6982                     struct rte_flow_error *error)
6983 {
6984         struct mlx5_priv *priv = dev->data->dev_private;
6985         struct mlx5_dev_config *dev_conf = &priv->config;
6986         struct rte_flow *flow = dev_flow->flow;
6987         uint64_t item_flags = 0;
6988         uint64_t last_item = 0;
6989         uint64_t action_flags = 0;
6990         uint64_t priority = attr->priority;
6991         struct mlx5_flow_dv_matcher matcher = {
6992                 .mask = {
6993                         .size = sizeof(matcher.mask.buf),
6994                 },
6995         };
6996         int actions_n = 0;
6997         bool actions_end = false;
6998         union {
6999                 struct mlx5_flow_dv_modify_hdr_resource res;
7000                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7001                             sizeof(struct mlx5_modification_cmd) *
7002                             (MLX5_MAX_MODIFY_NUM + 1)];
7003         } mhdr_dummy;
7004         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7005         union flow_dv_attr flow_attr = { .attr = 0 };
7006         uint32_t tag_be;
7007         union mlx5_flow_tbl_key tbl_key;
7008         uint32_t modify_action_position = UINT32_MAX;
7009         void *match_mask = matcher.mask.buf;
7010         void *match_value = dev_flow->dv.value.buf;
7011         uint8_t next_protocol = 0xff;
7012         struct rte_vlan_hdr vlan = { 0 };
7013         uint32_t table;
7014         int ret = 0;
7015
7016         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7017                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7018         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7019                                        &table, error);
7020         if (ret)
7021                 return ret;
7022         dev_flow->group = table;
7023         if (attr->transfer)
7024                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7025         if (priority == MLX5_FLOW_PRIO_RSVD)
7026                 priority = dev_conf->flow_prio - 1;
7027         /* number of actions must be set to 0 in case of dirty stack. */
7028         mhdr_res->actions_num = 0;
7029         for (; !actions_end ; actions++) {
7030                 const struct rte_flow_action_queue *queue;
7031                 const struct rte_flow_action_rss *rss;
7032                 const struct rte_flow_action *action = actions;
7033                 const struct rte_flow_action_count *count = action->conf;
7034                 const uint8_t *rss_key;
7035                 const struct rte_flow_action_jump *jump_data;
7036                 const struct rte_flow_action_meter *mtr;
7037                 struct mlx5_flow_tbl_resource *tbl;
7038                 uint32_t port_id = 0;
7039                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7040                 int action_type = actions->type;
7041                 const struct rte_flow_action *found_action = NULL;
7042
7043                 switch (action_type) {
7044                 case RTE_FLOW_ACTION_TYPE_VOID:
7045                         break;
7046                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7047                         if (flow_dv_translate_action_port_id(dev, action,
7048                                                              &port_id, error))
7049                                 return -rte_errno;
7050                         port_id_resource.port_id = port_id;
7051                         if (flow_dv_port_id_action_resource_register
7052                             (dev, &port_id_resource, dev_flow, error))
7053                                 return -rte_errno;
7054                         dev_flow->dv.actions[actions_n++] =
7055                                 dev_flow->dv.port_id_action->action;
7056                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7057                         break;
7058                 case RTE_FLOW_ACTION_TYPE_FLAG:
7059                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7060                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7061                                 struct rte_flow_action_mark mark = {
7062                                         .id = MLX5_FLOW_MARK_DEFAULT,
7063                                 };
7064
7065                                 if (flow_dv_convert_action_mark(dev, &mark,
7066                                                                 mhdr_res,
7067                                                                 error))
7068                                         return -rte_errno;
7069                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7070                                 break;
7071                         }
7072                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7073                         if (!dev_flow->dv.tag_resource)
7074                                 if (flow_dv_tag_resource_register
7075                                     (dev, tag_be, dev_flow, error))
7076                                         return -rte_errno;
7077                         dev_flow->dv.actions[actions_n++] =
7078                                 dev_flow->dv.tag_resource->action;
7079                         break;
7080                 case RTE_FLOW_ACTION_TYPE_MARK:
7081                         action_flags |= MLX5_FLOW_ACTION_MARK;
7082                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7083                                 const struct rte_flow_action_mark *mark =
7084                                         (const struct rte_flow_action_mark *)
7085                                                 actions->conf;
7086
7087                                 if (flow_dv_convert_action_mark(dev, mark,
7088                                                                 mhdr_res,
7089                                                                 error))
7090                                         return -rte_errno;
7091                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7092                                 break;
7093                         }
7094                         /* Fall-through */
7095                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7096                         /* Legacy (non-extensive) MARK action. */
7097                         tag_be = mlx5_flow_mark_set
7098                               (((const struct rte_flow_action_mark *)
7099                                (actions->conf))->id);
7100                         if (!dev_flow->dv.tag_resource)
7101                                 if (flow_dv_tag_resource_register
7102                                     (dev, tag_be, dev_flow, error))
7103                                         return -rte_errno;
7104                         dev_flow->dv.actions[actions_n++] =
7105                                 dev_flow->dv.tag_resource->action;
7106                         break;
7107                 case RTE_FLOW_ACTION_TYPE_SET_META:
7108                         if (flow_dv_convert_action_set_meta
7109                                 (dev, mhdr_res, attr,
7110                                  (const struct rte_flow_action_set_meta *)
7111                                   actions->conf, error))
7112                                 return -rte_errno;
7113                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7114                         break;
7115                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7116                         if (flow_dv_convert_action_set_tag
7117                                 (dev, mhdr_res,
7118                                  (const struct rte_flow_action_set_tag *)
7119                                   actions->conf, error))
7120                                 return -rte_errno;
7121                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7122                         break;
7123                 case RTE_FLOW_ACTION_TYPE_DROP:
7124                         action_flags |= MLX5_FLOW_ACTION_DROP;
7125                         break;
7126                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7127                         assert(flow->rss.queue);
7128                         queue = actions->conf;
7129                         flow->rss.queue_num = 1;
7130                         (*flow->rss.queue)[0] = queue->index;
7131                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7132                         break;
7133                 case RTE_FLOW_ACTION_TYPE_RSS:
7134                         assert(flow->rss.queue);
7135                         rss = actions->conf;
7136                         if (flow->rss.queue)
7137                                 memcpy((*flow->rss.queue), rss->queue,
7138                                        rss->queue_num * sizeof(uint16_t));
7139                         flow->rss.queue_num = rss->queue_num;
7140                         /* NULL RSS key indicates default RSS key. */
7141                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7142                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7143                         /*
7144                          * rss->level and rss.types should be set in advance
7145                          * when expanding items for RSS.
7146                          */
7147                         action_flags |= MLX5_FLOW_ACTION_RSS;
7148                         break;
7149                 case RTE_FLOW_ACTION_TYPE_COUNT:
7150                         if (!dev_conf->devx) {
7151                                 rte_errno = ENOTSUP;
7152                                 goto cnt_err;
7153                         }
7154                         flow->counter = flow_dv_counter_alloc(dev,
7155                                                               count->shared,
7156                                                               count->id,
7157                                                               dev_flow->group);
7158                         if (flow->counter == NULL)
7159                                 goto cnt_err;
7160                         dev_flow->dv.actions[actions_n++] =
7161                                 flow->counter->action;
7162                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7163                         break;
7164 cnt_err:
7165                         if (rte_errno == ENOTSUP)
7166                                 return rte_flow_error_set
7167                                               (error, ENOTSUP,
7168                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7169                                                NULL,
7170                                                "count action not supported");
7171                         else
7172                                 return rte_flow_error_set
7173                                                 (error, rte_errno,
7174                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7175                                                  action,
7176                                                  "cannot create counter"
7177                                                   " object.");
7178                         break;
7179                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7180                         dev_flow->dv.actions[actions_n++] =
7181                                                 priv->sh->pop_vlan_action;
7182                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7183                         break;
7184                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7185                         flow_dev_get_vlan_info_from_items(items, &vlan);
7186                         vlan.eth_proto = rte_be_to_cpu_16
7187                              ((((const struct rte_flow_action_of_push_vlan *)
7188                                                    actions->conf)->ethertype));
7189                         found_action = mlx5_flow_find_action
7190                                         (actions + 1,
7191                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7192                         if (found_action)
7193                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7194                         found_action = mlx5_flow_find_action
7195                                         (actions + 1,
7196                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7197                         if (found_action)
7198                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7199                         if (flow_dv_create_action_push_vlan
7200                                             (dev, attr, &vlan, dev_flow, error))
7201                                 return -rte_errno;
7202                         dev_flow->dv.actions[actions_n++] =
7203                                            dev_flow->dv.push_vlan_res->action;
7204                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7205                         break;
7206                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7207                         /* of_vlan_push action handled this action */
7208                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7209                         break;
7210                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7211                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7212                                 break;
7213                         flow_dev_get_vlan_info_from_items(items, &vlan);
7214                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7215                         /* If no VLAN push - this is a modify header action */
7216                         if (flow_dv_convert_action_modify_vlan_vid
7217                                                 (mhdr_res, actions, error))
7218                                 return -rte_errno;
7219                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7220                         break;
7221                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7222                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7223                         if (flow_dv_create_action_l2_encap(dev, actions,
7224                                                            dev_flow,
7225                                                            attr->transfer,
7226                                                            error))
7227                                 return -rte_errno;
7228                         dev_flow->dv.actions[actions_n++] =
7229                                 dev_flow->dv.encap_decap->verbs_action;
7230                         action_flags |= actions->type ==
7231                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
7232                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
7233                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
7234                         break;
7235                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7236                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7237                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7238                                                            attr->transfer,
7239                                                            error))
7240                                 return -rte_errno;
7241                         dev_flow->dv.actions[actions_n++] =
7242                                 dev_flow->dv.encap_decap->verbs_action;
7243                         action_flags |= actions->type ==
7244                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
7245                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
7246                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
7247                         break;
7248                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7249                         /* Handle encap with preceding decap. */
7250                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
7251                                 if (flow_dv_create_action_raw_encap
7252                                         (dev, actions, dev_flow, attr, error))
7253                                         return -rte_errno;
7254                                 dev_flow->dv.actions[actions_n++] =
7255                                         dev_flow->dv.encap_decap->verbs_action;
7256                         } else {
7257                                 /* Handle encap without preceding decap. */
7258                                 if (flow_dv_create_action_l2_encap
7259                                     (dev, actions, dev_flow, attr->transfer,
7260                                      error))
7261                                         return -rte_errno;
7262                                 dev_flow->dv.actions[actions_n++] =
7263                                         dev_flow->dv.encap_decap->verbs_action;
7264                         }
7265                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
7266                         break;
7267                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7268                         /* Check if this decap is followed by encap. */
7269                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
7270                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
7271                                action++) {
7272                         }
7273                         /* Handle decap only if it isn't followed by encap. */
7274                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7275                                 if (flow_dv_create_action_l2_decap
7276                                     (dev, dev_flow, attr->transfer, error))
7277                                         return -rte_errno;
7278                                 dev_flow->dv.actions[actions_n++] =
7279                                         dev_flow->dv.encap_decap->verbs_action;
7280                         }
7281                         /* If decap is followed by encap, handle it at encap. */
7282                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
7283                         break;
7284                 case RTE_FLOW_ACTION_TYPE_JUMP:
7285                         jump_data = action->conf;
7286                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7287                                                        jump_data->group, &table,
7288                                                        error);
7289                         if (ret)
7290                                 return ret;
7291                         tbl = flow_dv_tbl_resource_get(dev, table,
7292                                                        attr->egress,
7293                                                        attr->transfer, error);
7294                         if (!tbl)
7295                                 return rte_flow_error_set
7296                                                 (error, errno,
7297                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7298                                                  NULL,
7299                                                  "cannot create jump action.");
7300                         if (flow_dv_jump_tbl_resource_register
7301                             (dev, tbl, dev_flow, error)) {
7302                                 flow_dv_tbl_resource_release(dev, tbl);
7303                                 return rte_flow_error_set
7304                                                 (error, errno,
7305                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7306                                                  NULL,
7307                                                  "cannot create jump action.");
7308                         }
7309                         dev_flow->dv.actions[actions_n++] =
7310                                 dev_flow->dv.jump->action;
7311                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7312                         break;
7313                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7314                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7315                         if (flow_dv_convert_action_modify_mac
7316                                         (mhdr_res, actions, error))
7317                                 return -rte_errno;
7318                         action_flags |= actions->type ==
7319                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7320                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7321                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7322                         break;
7323                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7324                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7325                         if (flow_dv_convert_action_modify_ipv4
7326                                         (mhdr_res, actions, error))
7327                                 return -rte_errno;
7328                         action_flags |= actions->type ==
7329                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7330                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7331                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7332                         break;
7333                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7334                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7335                         if (flow_dv_convert_action_modify_ipv6
7336                                         (mhdr_res, actions, error))
7337                                 return -rte_errno;
7338                         action_flags |= actions->type ==
7339                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7340                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7341                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7342                         break;
7343                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7344                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7345                         if (flow_dv_convert_action_modify_tp
7346                                         (mhdr_res, actions, items,
7347                                          &flow_attr, error))
7348                                 return -rte_errno;
7349                         action_flags |= actions->type ==
7350                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7351                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7352                                         MLX5_FLOW_ACTION_SET_TP_DST;
7353                         break;
7354                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7355                         if (flow_dv_convert_action_modify_dec_ttl
7356                                         (mhdr_res, items, &flow_attr, error))
7357                                 return -rte_errno;
7358                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7359                         break;
7360                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7361                         if (flow_dv_convert_action_modify_ttl
7362                                         (mhdr_res, actions, items,
7363                                          &flow_attr, error))
7364                                 return -rte_errno;
7365                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7366                         break;
7367                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7368                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7369                         if (flow_dv_convert_action_modify_tcp_seq
7370                                         (mhdr_res, actions, error))
7371                                 return -rte_errno;
7372                         action_flags |= actions->type ==
7373                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7374                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7375                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7376                         break;
7377
7378                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7379                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7380                         if (flow_dv_convert_action_modify_tcp_ack
7381                                         (mhdr_res, actions, error))
7382                                 return -rte_errno;
7383                         action_flags |= actions->type ==
7384                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7385                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7386                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7387                         break;
7388                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7389                         if (flow_dv_convert_action_set_reg
7390                                         (mhdr_res, actions, error))
7391                                 return -rte_errno;
7392                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7393                         break;
7394                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7395                         if (flow_dv_convert_action_copy_mreg
7396                                         (dev, mhdr_res, actions, error))
7397                                 return -rte_errno;
7398                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7399                         break;
7400                 case RTE_FLOW_ACTION_TYPE_METER:
7401                         mtr = actions->conf;
7402                         if (!flow->meter) {
7403                                 flow->meter = mlx5_flow_meter_attach(priv,
7404                                                         mtr->mtr_id, attr,
7405                                                         error);
7406                                 if (!flow->meter)
7407                                         return rte_flow_error_set(error,
7408                                                 rte_errno,
7409                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7410                                                 NULL,
7411                                                 "meter not found "
7412                                                 "or invalid parameters");
7413                         }
7414                         /* Set the meter action. */
7415                         dev_flow->dv.actions[actions_n++] =
7416                                 flow->meter->mfts->meter_action;
7417                         action_flags |= MLX5_FLOW_ACTION_METER;
7418                         break;
7419                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7420                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7421                                                               actions, error))
7422                                 return -rte_errno;
7423                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7424                         break;
7425                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7426                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7427                                                               actions, error))
7428                                 return -rte_errno;
7429                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7430                         break;
7431                 case RTE_FLOW_ACTION_TYPE_END:
7432                         actions_end = true;
7433                         if (mhdr_res->actions_num) {
7434                                 /* create modify action if needed. */
7435                                 if (flow_dv_modify_hdr_resource_register
7436                                         (dev, mhdr_res, dev_flow, error))
7437                                         return -rte_errno;
7438                                 dev_flow->dv.actions[modify_action_position] =
7439                                         dev_flow->dv.modify_hdr->verbs_action;
7440                         }
7441                         break;
7442                 default:
7443                         break;
7444                 }
7445                 if (mhdr_res->actions_num &&
7446                     modify_action_position == UINT32_MAX)
7447                         modify_action_position = actions_n++;
7448         }
7449         dev_flow->dv.actions_n = actions_n;
7450         dev_flow->actions = action_flags;
7451         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7452                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7453                 int item_type = items->type;
7454
7455                 switch (item_type) {
7456                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7457                         flow_dv_translate_item_port_id(dev, match_mask,
7458                                                        match_value, items);
7459                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7460                         break;
7461                 case RTE_FLOW_ITEM_TYPE_ETH:
7462                         flow_dv_translate_item_eth(match_mask, match_value,
7463                                                    items, tunnel);
7464                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7465                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7466                                              MLX5_FLOW_LAYER_OUTER_L2;
7467                         break;
7468                 case RTE_FLOW_ITEM_TYPE_VLAN:
7469                         flow_dv_translate_item_vlan(dev_flow,
7470                                                     match_mask, match_value,
7471                                                     items, tunnel);
7472                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7473                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7474                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7475                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7476                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7477                         break;
7478                 case RTE_FLOW_ITEM_TYPE_IPV4:
7479                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7480                                                   &item_flags, &tunnel);
7481                         flow_dv_translate_item_ipv4(match_mask, match_value,
7482                                                     items, tunnel,
7483                                                     dev_flow->group);
7484                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7485                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7486                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7487                         if (items->mask != NULL &&
7488                             ((const struct rte_flow_item_ipv4 *)
7489                              items->mask)->hdr.next_proto_id) {
7490                                 next_protocol =
7491                                         ((const struct rte_flow_item_ipv4 *)
7492                                          (items->spec))->hdr.next_proto_id;
7493                                 next_protocol &=
7494                                         ((const struct rte_flow_item_ipv4 *)
7495                                          (items->mask))->hdr.next_proto_id;
7496                         } else {
7497                                 /* Reset for inner layer. */
7498                                 next_protocol = 0xff;
7499                         }
7500                         break;
7501                 case RTE_FLOW_ITEM_TYPE_IPV6:
7502                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7503                                                   &item_flags, &tunnel);
7504                         flow_dv_translate_item_ipv6(match_mask, match_value,
7505                                                     items, tunnel,
7506                                                     dev_flow->group);
7507                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7508                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7509                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7510                         if (items->mask != NULL &&
7511                             ((const struct rte_flow_item_ipv6 *)
7512                              items->mask)->hdr.proto) {
7513                                 next_protocol =
7514                                         ((const struct rte_flow_item_ipv6 *)
7515                                          items->spec)->hdr.proto;
7516                                 next_protocol &=
7517                                         ((const struct rte_flow_item_ipv6 *)
7518                                          items->mask)->hdr.proto;
7519                         } else {
7520                                 /* Reset for inner layer. */
7521                                 next_protocol = 0xff;
7522                         }
7523                         break;
7524                 case RTE_FLOW_ITEM_TYPE_TCP:
7525                         flow_dv_translate_item_tcp(match_mask, match_value,
7526                                                    items, tunnel);
7527                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7528                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7529                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7530                         break;
7531                 case RTE_FLOW_ITEM_TYPE_UDP:
7532                         flow_dv_translate_item_udp(match_mask, match_value,
7533                                                    items, tunnel);
7534                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7535                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7536                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7537                         break;
7538                 case RTE_FLOW_ITEM_TYPE_GRE:
7539                         flow_dv_translate_item_gre(match_mask, match_value,
7540                                                    items, tunnel);
7541                         last_item = MLX5_FLOW_LAYER_GRE;
7542                         break;
7543                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7544                         flow_dv_translate_item_gre_key(match_mask,
7545                                                        match_value, items);
7546                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7547                         break;
7548                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7549                         flow_dv_translate_item_nvgre(match_mask, match_value,
7550                                                      items, tunnel);
7551                         last_item = MLX5_FLOW_LAYER_GRE;
7552                         break;
7553                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7554                         flow_dv_translate_item_vxlan(match_mask, match_value,
7555                                                      items, tunnel);
7556                         last_item = MLX5_FLOW_LAYER_VXLAN;
7557                         break;
7558                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7559                         flow_dv_translate_item_vxlan(match_mask, match_value,
7560                                                      items, tunnel);
7561                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7562                         break;
7563                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7564                         flow_dv_translate_item_geneve(match_mask, match_value,
7565                                                       items, tunnel);
7566                         last_item = MLX5_FLOW_LAYER_GENEVE;
7567                         break;
7568                 case RTE_FLOW_ITEM_TYPE_MPLS:
7569                         flow_dv_translate_item_mpls(match_mask, match_value,
7570                                                     items, last_item, tunnel);
7571                         last_item = MLX5_FLOW_LAYER_MPLS;
7572                         break;
7573                 case RTE_FLOW_ITEM_TYPE_MARK:
7574                         flow_dv_translate_item_mark(dev, match_mask,
7575                                                     match_value, items);
7576                         last_item = MLX5_FLOW_ITEM_MARK;
7577                         break;
7578                 case RTE_FLOW_ITEM_TYPE_META:
7579                         flow_dv_translate_item_meta(dev, match_mask,
7580                                                     match_value, attr, items);
7581                         last_item = MLX5_FLOW_ITEM_METADATA;
7582                         break;
7583                 case RTE_FLOW_ITEM_TYPE_ICMP:
7584                         flow_dv_translate_item_icmp(match_mask, match_value,
7585                                                     items, tunnel);
7586                         last_item = MLX5_FLOW_LAYER_ICMP;
7587                         break;
7588                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7589                         flow_dv_translate_item_icmp6(match_mask, match_value,
7590                                                       items, tunnel);
7591                         last_item = MLX5_FLOW_LAYER_ICMP6;
7592                         break;
7593                 case RTE_FLOW_ITEM_TYPE_TAG:
7594                         flow_dv_translate_item_tag(dev, match_mask,
7595                                                    match_value, items);
7596                         last_item = MLX5_FLOW_ITEM_TAG;
7597                         break;
7598                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7599                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7600                                                         match_value, items);
7601                         last_item = MLX5_FLOW_ITEM_TAG;
7602                         break;
7603                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7604                         flow_dv_translate_item_tx_queue(dev, match_mask,
7605                                                         match_value,
7606                                                         items);
7607                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7608                         break;
7609                 case RTE_FLOW_ITEM_TYPE_GTP:
7610                         flow_dv_translate_item_gtp(match_mask, match_value,
7611                                                    items, tunnel);
7612                         last_item = MLX5_FLOW_LAYER_GTP;
7613                         break;
7614                 default:
7615                         break;
7616                 }
7617                 item_flags |= last_item;
7618         }
7619         /*
7620          * In case of ingress traffic when E-Switch mode is enabled,
7621          * we have two cases where we need to set the source port manually.
7622          * The first one, is in case of Nic steering rule, and the second is
7623          * E-Switch rule where no port_id item was found. In both cases
7624          * the source port is set according the current port in use.
7625          */
7626         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7627             (priv->representor || priv->master)) {
7628                 if (flow_dv_translate_item_port_id(dev, match_mask,
7629                                                    match_value, NULL))
7630                         return -rte_errno;
7631         }
7632         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7633                                          dev_flow->dv.value.buf));
7634         dev_flow->layers = item_flags;
7635         if (action_flags & MLX5_FLOW_ACTION_RSS)
7636                 flow_dv_hashfields_set(dev_flow);
7637         /* Register matcher. */
7638         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7639                                     matcher.mask.size);
7640         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7641                                                      matcher.priority);
7642         /* reserved field no needs to be set to 0 here. */
7643         tbl_key.domain = attr->transfer;
7644         tbl_key.direction = attr->egress;
7645         tbl_key.table_id = dev_flow->group;
7646         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7647                 return -rte_errno;
7648         return 0;
7649 }
7650
7651 /**
7652  * Apply the flow to the NIC, lock free,
7653  * (mutex should be acquired by caller).
7654  *
7655  * @param[in] dev
7656  *   Pointer to the Ethernet device structure.
7657  * @param[in, out] flow
7658  *   Pointer to flow structure.
7659  * @param[out] error
7660  *   Pointer to error structure.
7661  *
7662  * @return
7663  *   0 on success, a negative errno value otherwise and rte_errno is set.
7664  */
7665 static int
7666 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7667                 struct rte_flow_error *error)
7668 {
7669         struct mlx5_flow_dv *dv;
7670         struct mlx5_flow *dev_flow;
7671         struct mlx5_priv *priv = dev->data->dev_private;
7672         int n;
7673         int err;
7674
7675         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7676                 dv = &dev_flow->dv;
7677                 n = dv->actions_n;
7678                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7679                         if (dev_flow->transfer) {
7680                                 dv->actions[n++] = priv->sh->esw_drop_action;
7681                         } else {
7682                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7683                                 if (!dv->hrxq) {
7684                                         rte_flow_error_set
7685                                                 (error, errno,
7686                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7687                                                  NULL,
7688                                                  "cannot get drop hash queue");
7689                                         goto error;
7690                                 }
7691                                 dv->actions[n++] = dv->hrxq->action;
7692                         }
7693                 } else if (dev_flow->actions &
7694                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7695                         struct mlx5_hrxq *hrxq;
7696
7697                         assert(flow->rss.queue);
7698                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7699                                              MLX5_RSS_HASH_KEY_LEN,
7700                                              dev_flow->hash_fields,
7701                                              (*flow->rss.queue),
7702                                              flow->rss.queue_num);
7703                         if (!hrxq) {
7704                                 hrxq = mlx5_hrxq_new
7705                                         (dev, flow->rss.key,
7706                                          MLX5_RSS_HASH_KEY_LEN,
7707                                          dev_flow->hash_fields,
7708                                          (*flow->rss.queue),
7709                                          flow->rss.queue_num,
7710                                          !!(dev_flow->layers &
7711                                             MLX5_FLOW_LAYER_TUNNEL));
7712                         }
7713                         if (!hrxq) {
7714                                 rte_flow_error_set
7715                                         (error, rte_errno,
7716                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7717                                          "cannot get hash queue");
7718                                 goto error;
7719                         }
7720                         dv->hrxq = hrxq;
7721                         dv->actions[n++] = dv->hrxq->action;
7722                 }
7723                 dv->flow =
7724                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7725                                                   (void *)&dv->value, n,
7726                                                   dv->actions);
7727                 if (!dv->flow) {
7728                         rte_flow_error_set(error, errno,
7729                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7730                                            NULL,
7731                                            "hardware refuses to create flow");
7732                         goto error;
7733                 }
7734                 if (priv->vmwa_context &&
7735                     dev_flow->dv.vf_vlan.tag &&
7736                     !dev_flow->dv.vf_vlan.created) {
7737                         /*
7738                          * The rule contains the VLAN pattern.
7739                          * For VF we are going to create VLAN
7740                          * interface to make hypervisor set correct
7741                          * e-Switch vport context.
7742                          */
7743                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7744                 }
7745         }
7746         return 0;
7747 error:
7748         err = rte_errno; /* Save rte_errno before cleanup. */
7749         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7750                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7751                 if (dv->hrxq) {
7752                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7753                                 mlx5_hrxq_drop_release(dev);
7754                         else
7755                                 mlx5_hrxq_release(dev, dv->hrxq);
7756                         dv->hrxq = NULL;
7757                 }
7758                 if (dev_flow->dv.vf_vlan.tag &&
7759                     dev_flow->dv.vf_vlan.created)
7760                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7761         }
7762         rte_errno = err; /* Restore rte_errno. */
7763         return -rte_errno;
7764 }
7765
7766 /**
7767  * Release the flow matcher.
7768  *
7769  * @param dev
7770  *   Pointer to Ethernet device.
7771  * @param flow
7772  *   Pointer to mlx5_flow.
7773  *
7774  * @return
7775  *   1 while a reference on it exists, 0 when freed.
7776  */
7777 static int
7778 flow_dv_matcher_release(struct rte_eth_dev *dev,
7779                         struct mlx5_flow *flow)
7780 {
7781         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7782
7783         assert(matcher->matcher_object);
7784         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7785                 dev->data->port_id, (void *)matcher,
7786                 rte_atomic32_read(&matcher->refcnt));
7787         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7788                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7789                            (matcher->matcher_object));
7790                 LIST_REMOVE(matcher, next);
7791                 /* table ref-- in release interface. */
7792                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7793                 rte_free(matcher);
7794                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7795                         dev->data->port_id, (void *)matcher);
7796                 return 0;
7797         }
7798         return 1;
7799 }
7800
7801 /**
7802  * Release an encap/decap resource.
7803  *
7804  * @param flow
7805  *   Pointer to mlx5_flow.
7806  *
7807  * @return
7808  *   1 while a reference on it exists, 0 when freed.
7809  */
7810 static int
7811 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7812 {
7813         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7814                                                 flow->dv.encap_decap;
7815
7816         assert(cache_resource->verbs_action);
7817         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7818                 (void *)cache_resource,
7819                 rte_atomic32_read(&cache_resource->refcnt));
7820         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7821                 claim_zero(mlx5_glue->destroy_flow_action
7822                                 (cache_resource->verbs_action));
7823                 LIST_REMOVE(cache_resource, next);
7824                 rte_free(cache_resource);
7825                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7826                         (void *)cache_resource);
7827                 return 0;
7828         }
7829         return 1;
7830 }
7831
7832 /**
7833  * Release an jump to table action resource.
7834  *
7835  * @param dev
7836  *   Pointer to Ethernet device.
7837  * @param flow
7838  *   Pointer to mlx5_flow.
7839  *
7840  * @return
7841  *   1 while a reference on it exists, 0 when freed.
7842  */
7843 static int
7844 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7845                                   struct mlx5_flow *flow)
7846 {
7847         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7848         struct mlx5_flow_tbl_data_entry *tbl_data =
7849                         container_of(cache_resource,
7850                                      struct mlx5_flow_tbl_data_entry, jump);
7851
7852         assert(cache_resource->action);
7853         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7854                 (void *)cache_resource,
7855                 rte_atomic32_read(&cache_resource->refcnt));
7856         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7857                 claim_zero(mlx5_glue->destroy_flow_action
7858                                 (cache_resource->action));
7859                 /* jump action memory free is inside the table release. */
7860                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7861                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7862                         (void *)cache_resource);
7863                 return 0;
7864         }
7865         return 1;
7866 }
7867
7868 /**
7869  * Release a modify-header resource.
7870  *
7871  * @param flow
7872  *   Pointer to mlx5_flow.
7873  *
7874  * @return
7875  *   1 while a reference on it exists, 0 when freed.
7876  */
7877 static int
7878 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7879 {
7880         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7881                                                 flow->dv.modify_hdr;
7882
7883         assert(cache_resource->verbs_action);
7884         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7885                 (void *)cache_resource,
7886                 rte_atomic32_read(&cache_resource->refcnt));
7887         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7888                 claim_zero(mlx5_glue->destroy_flow_action
7889                                 (cache_resource->verbs_action));
7890                 LIST_REMOVE(cache_resource, next);
7891                 rte_free(cache_resource);
7892                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7893                         (void *)cache_resource);
7894                 return 0;
7895         }
7896         return 1;
7897 }
7898
7899 /**
7900  * Release port ID action resource.
7901  *
7902  * @param flow
7903  *   Pointer to mlx5_flow.
7904  *
7905  * @return
7906  *   1 while a reference on it exists, 0 when freed.
7907  */
7908 static int
7909 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7910 {
7911         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7912                 flow->dv.port_id_action;
7913
7914         assert(cache_resource->action);
7915         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7916                 (void *)cache_resource,
7917                 rte_atomic32_read(&cache_resource->refcnt));
7918         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7919                 claim_zero(mlx5_glue->destroy_flow_action
7920                                 (cache_resource->action));
7921                 LIST_REMOVE(cache_resource, next);
7922                 rte_free(cache_resource);
7923                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7924                         (void *)cache_resource);
7925                 return 0;
7926         }
7927         return 1;
7928 }
7929
7930 /**
7931  * Release push vlan action resource.
7932  *
7933  * @param flow
7934  *   Pointer to mlx5_flow.
7935  *
7936  * @return
7937  *   1 while a reference on it exists, 0 when freed.
7938  */
7939 static int
7940 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7941 {
7942         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7943                 flow->dv.push_vlan_res;
7944
7945         assert(cache_resource->action);
7946         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7947                 (void *)cache_resource,
7948                 rte_atomic32_read(&cache_resource->refcnt));
7949         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7950                 claim_zero(mlx5_glue->destroy_flow_action
7951                                 (cache_resource->action));
7952                 LIST_REMOVE(cache_resource, next);
7953                 rte_free(cache_resource);
7954                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7955                         (void *)cache_resource);
7956                 return 0;
7957         }
7958         return 1;
7959 }
7960
7961 /**
7962  * Remove the flow from the NIC but keeps it in memory.
7963  * Lock free, (mutex should be acquired by caller).
7964  *
7965  * @param[in] dev
7966  *   Pointer to Ethernet device.
7967  * @param[in, out] flow
7968  *   Pointer to flow structure.
7969  */
7970 static void
7971 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7972 {
7973         struct mlx5_flow_dv *dv;
7974         struct mlx5_flow *dev_flow;
7975
7976         if (!flow)
7977                 return;
7978         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7979                 dv = &dev_flow->dv;
7980                 if (dv->flow) {
7981                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7982                         dv->flow = NULL;
7983                 }
7984                 if (dv->hrxq) {
7985                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7986                                 mlx5_hrxq_drop_release(dev);
7987                         else
7988                                 mlx5_hrxq_release(dev, dv->hrxq);
7989                         dv->hrxq = NULL;
7990                 }
7991                 if (dev_flow->dv.vf_vlan.tag &&
7992                     dev_flow->dv.vf_vlan.created)
7993                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7994         }
7995 }
7996
7997 /**
7998  * Remove the flow from the NIC and the memory.
7999  * Lock free, (mutex should be acquired by caller).
8000  *
8001  * @param[in] dev
8002  *   Pointer to the Ethernet device structure.
8003  * @param[in, out] flow
8004  *   Pointer to flow structure.
8005  */
8006 static void
8007 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8008 {
8009         struct mlx5_flow *dev_flow;
8010
8011         if (!flow)
8012                 return;
8013         __flow_dv_remove(dev, flow);
8014         if (flow->counter) {
8015                 flow_dv_counter_release(dev, flow->counter);
8016                 flow->counter = NULL;
8017         }
8018         if (flow->meter) {
8019                 mlx5_flow_meter_detach(flow->meter);
8020                 flow->meter = NULL;
8021         }
8022         while (!LIST_EMPTY(&flow->dev_flows)) {
8023                 dev_flow = LIST_FIRST(&flow->dev_flows);
8024                 LIST_REMOVE(dev_flow, next);
8025                 if (dev_flow->dv.matcher)
8026                         flow_dv_matcher_release(dev, dev_flow);
8027                 if (dev_flow->dv.encap_decap)
8028                         flow_dv_encap_decap_resource_release(dev_flow);
8029                 if (dev_flow->dv.modify_hdr)
8030                         flow_dv_modify_hdr_resource_release(dev_flow);
8031                 if (dev_flow->dv.jump)
8032                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8033                 if (dev_flow->dv.port_id_action)
8034                         flow_dv_port_id_action_resource_release(dev_flow);
8035                 if (dev_flow->dv.push_vlan_res)
8036                         flow_dv_push_vlan_action_resource_release(dev_flow);
8037                 if (dev_flow->dv.tag_resource)
8038                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8039                 rte_free(dev_flow);
8040         }
8041 }
8042
8043 /**
8044  * Query a dv flow  rule for its statistics via devx.
8045  *
8046  * @param[in] dev
8047  *   Pointer to Ethernet device.
8048  * @param[in] flow
8049  *   Pointer to the sub flow.
8050  * @param[out] data
8051  *   data retrieved by the query.
8052  * @param[out] error
8053  *   Perform verbose error reporting if not NULL.
8054  *
8055  * @return
8056  *   0 on success, a negative errno value otherwise and rte_errno is set.
8057  */
8058 static int
8059 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8060                     void *data, struct rte_flow_error *error)
8061 {
8062         struct mlx5_priv *priv = dev->data->dev_private;
8063         struct rte_flow_query_count *qc = data;
8064
8065         if (!priv->config.devx)
8066                 return rte_flow_error_set(error, ENOTSUP,
8067                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8068                                           NULL,
8069                                           "counters are not supported");
8070         if (flow->counter) {
8071                 uint64_t pkts, bytes;
8072                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8073                                                &bytes);
8074
8075                 if (err)
8076                         return rte_flow_error_set(error, -err,
8077                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8078                                         NULL, "cannot read counters");
8079                 qc->hits_set = 1;
8080                 qc->bytes_set = 1;
8081                 qc->hits = pkts - flow->counter->hits;
8082                 qc->bytes = bytes - flow->counter->bytes;
8083                 if (qc->reset) {
8084                         flow->counter->hits = pkts;
8085                         flow->counter->bytes = bytes;
8086                 }
8087                 return 0;
8088         }
8089         return rte_flow_error_set(error, EINVAL,
8090                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8091                                   NULL,
8092                                   "counters are not available");
8093 }
8094
8095 /**
8096  * Query a flow.
8097  *
8098  * @see rte_flow_query()
8099  * @see rte_flow_ops
8100  */
8101 static int
8102 flow_dv_query(struct rte_eth_dev *dev,
8103               struct rte_flow *flow __rte_unused,
8104               const struct rte_flow_action *actions __rte_unused,
8105               void *data __rte_unused,
8106               struct rte_flow_error *error __rte_unused)
8107 {
8108         int ret = -EINVAL;
8109
8110         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8111                 switch (actions->type) {
8112                 case RTE_FLOW_ACTION_TYPE_VOID:
8113                         break;
8114                 case RTE_FLOW_ACTION_TYPE_COUNT:
8115                         ret = flow_dv_query_count(dev, flow, data, error);
8116                         break;
8117                 default:
8118                         return rte_flow_error_set(error, ENOTSUP,
8119                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8120                                                   actions,
8121                                                   "action not supported");
8122                 }
8123         }
8124         return ret;
8125 }
8126
8127 /**
8128  * Destroy the meter table set.
8129  * Lock free, (mutex should be acquired by caller).
8130  *
8131  * @param[in] dev
8132  *   Pointer to Ethernet device.
8133  * @param[in] tbl
8134  *   Pointer to the meter table set.
8135  *
8136  * @return
8137  *   Always 0.
8138  */
8139 static int
8140 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8141                         struct mlx5_meter_domains_infos *tbl)
8142 {
8143         struct mlx5_priv *priv = dev->data->dev_private;
8144         struct mlx5_meter_domains_infos *mtd =
8145                                 (struct mlx5_meter_domains_infos *)tbl;
8146
8147         if (!mtd || !priv->config.dv_flow_en)
8148                 return 0;
8149         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8150                 claim_zero(mlx5_glue->dv_destroy_flow
8151                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8152         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8153                 claim_zero(mlx5_glue->dv_destroy_flow
8154                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8155         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8156                 claim_zero(mlx5_glue->dv_destroy_flow
8157                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8158         if (mtd->egress.color_matcher)
8159                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8160                           (mtd->egress.color_matcher));
8161         if (mtd->egress.any_matcher)
8162                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8163                           (mtd->egress.any_matcher));
8164         if (mtd->egress.tbl)
8165                 claim_zero(flow_dv_tbl_resource_release(dev,
8166                                                         mtd->egress.tbl));
8167         if (mtd->ingress.color_matcher)
8168                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8169                           (mtd->ingress.color_matcher));
8170         if (mtd->ingress.any_matcher)
8171                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8172                           (mtd->ingress.any_matcher));
8173         if (mtd->ingress.tbl)
8174                 claim_zero(flow_dv_tbl_resource_release(dev,
8175                                                         mtd->ingress.tbl));
8176         if (mtd->transfer.color_matcher)
8177                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8178                           (mtd->transfer.color_matcher));
8179         if (mtd->transfer.any_matcher)
8180                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8181                           (mtd->transfer.any_matcher));
8182         if (mtd->transfer.tbl)
8183                 claim_zero(flow_dv_tbl_resource_release(dev,
8184                                                         mtd->transfer.tbl));
8185         if (mtd->drop_actn)
8186                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8187         rte_free(mtd);
8188         return 0;
8189 }
8190
8191 /* Number of meter flow actions, count and jump or count and drop. */
8192 #define METER_ACTIONS 2
8193
8194 /**
8195  * Create specify domain meter table and suffix table.
8196  *
8197  * @param[in] dev
8198  *   Pointer to Ethernet device.
8199  * @param[in,out] mtb
8200  *   Pointer to DV meter table set.
8201  * @param[in] egress
8202  *   Table attribute.
8203  * @param[in] transfer
8204  *   Table attribute.
8205  * @param[in] color_reg_c_idx
8206  *   Reg C index for color match.
8207  *
8208  * @return
8209  *   0 on success, -1 otherwise and rte_errno is set.
8210  */
8211 static int
8212 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8213                            struct mlx5_meter_domains_infos *mtb,
8214                            uint8_t egress, uint8_t transfer,
8215                            uint32_t color_reg_c_idx)
8216 {
8217         struct mlx5_priv *priv = dev->data->dev_private;
8218         struct mlx5_ibv_shared *sh = priv->sh;
8219         struct mlx5_flow_dv_match_params mask = {
8220                 .size = sizeof(mask.buf),
8221         };
8222         struct mlx5_flow_dv_match_params value = {
8223                 .size = sizeof(value.buf),
8224         };
8225         struct mlx5dv_flow_matcher_attr dv_attr = {
8226                 .type = IBV_FLOW_ATTR_NORMAL,
8227                 .priority = 0,
8228                 .match_criteria_enable = 0,
8229                 .match_mask = (void *)&mask,
8230         };
8231         void *actions[METER_ACTIONS];
8232         struct mlx5_flow_tbl_resource **sfx_tbl;
8233         struct mlx5_meter_domain_info *dtb;
8234         struct rte_flow_error error;
8235         int i = 0;
8236
8237         if (transfer) {
8238                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8239                 dtb = &mtb->transfer;
8240         } else if (egress) {
8241                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8242                 dtb = &mtb->egress;
8243         } else {
8244                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8245                 dtb = &mtb->ingress;
8246         }
8247         /* If the suffix table in missing, create it. */
8248         if (!(*sfx_tbl)) {
8249                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8250                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8251                                                 egress, transfer, &error);
8252                 if (!(*sfx_tbl)) {
8253                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8254                         return -1;
8255                 }
8256         }
8257         /* Create the meter table with METER level. */
8258         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8259                                             egress, transfer, &error);
8260         if (!dtb->tbl) {
8261                 DRV_LOG(ERR, "Failed to create meter policer table.");
8262                 return -1;
8263         }
8264         /* Create matchers, Any and Color. */
8265         dv_attr.priority = 3;
8266         dv_attr.match_criteria_enable = 0;
8267         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8268                                                              &dv_attr,
8269                                                              dtb->tbl->obj);
8270         if (!dtb->any_matcher) {
8271                 DRV_LOG(ERR, "Failed to create meter"
8272                              " policer default matcher.");
8273                 goto error_exit;
8274         }
8275         dv_attr.priority = 0;
8276         dv_attr.match_criteria_enable =
8277                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8278         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8279                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
8280         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8281                                                                &dv_attr,
8282                                                                dtb->tbl->obj);
8283         if (!dtb->color_matcher) {
8284                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8285                 goto error_exit;
8286         }
8287         if (mtb->count_actns[RTE_MTR_DROPPED])
8288                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8289         actions[i++] = mtb->drop_actn;
8290         /* Default rule: lowest priority, match any, actions: drop. */
8291         dtb->policer_rules[RTE_MTR_DROPPED] =
8292                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8293                                                  (void *)&value, i, actions);
8294         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8295                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8296                 goto error_exit;
8297         }
8298         return 0;
8299 error_exit:
8300         return -1;
8301 }
8302
8303 /**
8304  * Create the needed meter and suffix tables.
8305  * Lock free, (mutex should be acquired by caller).
8306  *
8307  * @param[in] dev
8308  *   Pointer to Ethernet device.
8309  * @param[in] fm
8310  *   Pointer to the flow meter.
8311  *
8312  * @return
8313  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8314  */
8315 static struct mlx5_meter_domains_infos *
8316 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8317                        const struct mlx5_flow_meter *fm)
8318 {
8319         struct mlx5_priv *priv = dev->data->dev_private;
8320         struct mlx5_meter_domains_infos *mtb;
8321         int ret;
8322         int i;
8323
8324         if (!priv->mtr_en) {
8325                 rte_errno = ENOTSUP;
8326                 return NULL;
8327         }
8328         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8329         if (!mtb) {
8330                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8331                 return NULL;
8332         }
8333         /* Create meter count actions */
8334         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8335                 if (!fm->policer_stats.cnt[i])
8336                         continue;
8337                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8338         }
8339         /* Create drop action. */
8340         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8341         if (!mtb->drop_actn) {
8342                 DRV_LOG(ERR, "Failed to create drop action.");
8343                 goto error_exit;
8344         }
8345         /* Egress meter table. */
8346         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8347         if (ret) {
8348                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8349                 goto error_exit;
8350         }
8351         /* Ingress meter table. */
8352         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8353         if (ret) {
8354                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8355                 goto error_exit;
8356         }
8357         /* FDB meter table. */
8358         if (priv->config.dv_esw_en) {
8359                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8360                                                  priv->mtr_color_reg);
8361                 if (ret) {
8362                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8363                         goto error_exit;
8364                 }
8365         }
8366         return mtb;
8367 error_exit:
8368         flow_dv_destroy_mtr_tbl(dev, mtb);
8369         return NULL;
8370 }
8371
8372 /**
8373  * Destroy domain policer rule.
8374  *
8375  * @param[in] dt
8376  *   Pointer to domain table.
8377  */
8378 static void
8379 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8380 {
8381         int i;
8382
8383         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8384                 if (dt->policer_rules[i]) {
8385                         claim_zero(mlx5_glue->dv_destroy_flow
8386                                   (dt->policer_rules[i]));
8387                         dt->policer_rules[i] = NULL;
8388                 }
8389         }
8390         if (dt->jump_actn) {
8391                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8392                 dt->jump_actn = NULL;
8393         }
8394 }
8395
8396 /**
8397  * Destroy policer rules.
8398  *
8399  * @param[in] dev
8400  *   Pointer to Ethernet device.
8401  * @param[in] fm
8402  *   Pointer to flow meter structure.
8403  * @param[in] attr
8404  *   Pointer to flow attributes.
8405  *
8406  * @return
8407  *   Always 0.
8408  */
8409 static int
8410 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8411                               const struct mlx5_flow_meter *fm,
8412                               const struct rte_flow_attr *attr)
8413 {
8414         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8415
8416         if (!mtb)
8417                 return 0;
8418         if (attr->egress)
8419                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8420         if (attr->ingress)
8421                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8422         if (attr->transfer)
8423                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8424         return 0;
8425 }
8426
8427 /**
8428  * Create specify domain meter policer rule.
8429  *
8430  * @param[in] fm
8431  *   Pointer to flow meter structure.
8432  * @param[in] mtb
8433  *   Pointer to DV meter table set.
8434  * @param[in] sfx_tb
8435  *   Pointer to suffix table.
8436  * @param[in] mtr_reg_c
8437  *   Color match REG_C.
8438  *
8439  * @return
8440  *   0 on success, -1 otherwise.
8441  */
8442 static int
8443 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8444                                     struct mlx5_meter_domain_info *dtb,
8445                                     struct mlx5_flow_tbl_resource *sfx_tb,
8446                                     uint8_t mtr_reg_c)
8447 {
8448         struct mlx5_flow_dv_match_params matcher = {
8449                 .size = sizeof(matcher.buf),
8450         };
8451         struct mlx5_flow_dv_match_params value = {
8452                 .size = sizeof(value.buf),
8453         };
8454         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8455         void *actions[METER_ACTIONS];
8456         int i;
8457
8458         /* Create jump action. */
8459         if (!sfx_tb)
8460                 return -1;
8461         if (!dtb->jump_actn)
8462                 dtb->jump_actn =
8463                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8464                                                         (sfx_tb->obj);
8465         if (!dtb->jump_actn) {
8466                 DRV_LOG(ERR, "Failed to create policer jump action.");
8467                 goto error;
8468         }
8469         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8470                 int j = 0;
8471
8472                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8473                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8474                 if (mtb->count_actns[i])
8475                         actions[j++] = mtb->count_actns[i];
8476                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8477                         actions[j++] = mtb->drop_actn;
8478                 else
8479                         actions[j++] = dtb->jump_actn;
8480                 dtb->policer_rules[i] =
8481                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8482                                                  (void *)&value,
8483                                                   j, actions);
8484                 if (!dtb->policer_rules[i]) {
8485                         DRV_LOG(ERR, "Failed to create policer rule.");
8486                         goto error;
8487                 }
8488         }
8489         return 0;
8490 error:
8491         rte_errno = errno;
8492         return -1;
8493 }
8494
8495 /**
8496  * Create policer rules.
8497  *
8498  * @param[in] dev
8499  *   Pointer to Ethernet device.
8500  * @param[in] fm
8501  *   Pointer to flow meter structure.
8502  * @param[in] attr
8503  *   Pointer to flow attributes.
8504  *
8505  * @return
8506  *   0 on success, -1 otherwise.
8507  */
8508 static int
8509 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8510                              struct mlx5_flow_meter *fm,
8511                              const struct rte_flow_attr *attr)
8512 {
8513         struct mlx5_priv *priv = dev->data->dev_private;
8514         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8515         int ret;
8516
8517         if (attr->egress) {
8518                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8519                                                 priv->sh->tx_mtr_sfx_tbl,
8520                                                 priv->mtr_color_reg);
8521                 if (ret) {
8522                         DRV_LOG(ERR, "Failed to create egress policer.");
8523                         goto error;
8524                 }
8525         }
8526         if (attr->ingress) {
8527                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8528                                                 priv->sh->rx_mtr_sfx_tbl,
8529                                                 priv->mtr_color_reg);
8530                 if (ret) {
8531                         DRV_LOG(ERR, "Failed to create ingress policer.");
8532                         goto error;
8533                 }
8534         }
8535         if (attr->transfer) {
8536                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8537                                                 priv->sh->fdb_mtr_sfx_tbl,
8538                                                 priv->mtr_color_reg);
8539                 if (ret) {
8540                         DRV_LOG(ERR, "Failed to create transfer policer.");
8541                         goto error;
8542                 }
8543         }
8544         return 0;
8545 error:
8546         flow_dv_destroy_policer_rules(dev, fm, attr);
8547         return -1;
8548 }
8549
8550 /**
8551  * Query a devx counter.
8552  *
8553  * @param[in] dev
8554  *   Pointer to the Ethernet device structure.
8555  * @param[in] cnt
8556  *   Pointer to the flow counter.
8557  * @param[in] clear
8558  *   Set to clear the counter statistics.
8559  * @param[out] pkts
8560  *   The statistics value of packets.
8561  * @param[out] bytes
8562  *   The statistics value of bytes.
8563  *
8564  * @return
8565  *   0 on success, otherwise return -1.
8566  */
8567 static int
8568 flow_dv_counter_query(struct rte_eth_dev *dev,
8569                       struct mlx5_flow_counter *cnt, bool clear,
8570                       uint64_t *pkts, uint64_t *bytes)
8571 {
8572         struct mlx5_priv *priv = dev->data->dev_private;
8573         uint64_t inn_pkts, inn_bytes;
8574         int ret;
8575
8576         if (!priv->config.devx)
8577                 return -1;
8578         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8579         if (ret)
8580                 return -1;
8581         *pkts = inn_pkts - cnt->hits;
8582         *bytes = inn_bytes - cnt->bytes;
8583         if (clear) {
8584                 cnt->hits = inn_pkts;
8585                 cnt->bytes = inn_bytes;
8586         }
8587         return 0;
8588 }
8589
8590 /*
8591  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8592  */
8593 static int
8594 flow_dv_translate(struct rte_eth_dev *dev,
8595                   struct mlx5_flow *dev_flow,
8596                   const struct rte_flow_attr *attr,
8597                   const struct rte_flow_item items[],
8598                   const struct rte_flow_action actions[],
8599                   struct rte_flow_error *error)
8600 {
8601         int ret;
8602
8603         flow_dv_shared_lock(dev);
8604         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8605         flow_dv_shared_unlock(dev);
8606         return ret;
8607 }
8608
8609 /*
8610  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8611  */
8612 static int
8613 flow_dv_apply(struct rte_eth_dev *dev,
8614               struct rte_flow *flow,
8615               struct rte_flow_error *error)
8616 {
8617         int ret;
8618
8619         flow_dv_shared_lock(dev);
8620         ret = __flow_dv_apply(dev, flow, error);
8621         flow_dv_shared_unlock(dev);
8622         return ret;
8623 }
8624
8625 /*
8626  * Mutex-protected thunk to lock-free __flow_dv_remove().
8627  */
8628 static void
8629 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8630 {
8631         flow_dv_shared_lock(dev);
8632         __flow_dv_remove(dev, flow);
8633         flow_dv_shared_unlock(dev);
8634 }
8635
8636 /*
8637  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8638  */
8639 static void
8640 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8641 {
8642         flow_dv_shared_lock(dev);
8643         __flow_dv_destroy(dev, flow);
8644         flow_dv_shared_unlock(dev);
8645 }
8646
8647 /*
8648  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8649  */
8650 static struct mlx5_flow_counter *
8651 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8652 {
8653         struct mlx5_flow_counter *cnt;
8654
8655         flow_dv_shared_lock(dev);
8656         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8657         flow_dv_shared_unlock(dev);
8658         return cnt;
8659 }
8660
8661 /*
8662  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8663  */
8664 static void
8665 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8666 {
8667         flow_dv_shared_lock(dev);
8668         flow_dv_counter_release(dev, cnt);
8669         flow_dv_shared_unlock(dev);
8670 }
8671
8672 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8673         .validate = flow_dv_validate,
8674         .prepare = flow_dv_prepare,
8675         .translate = flow_dv_translate,
8676         .apply = flow_dv_apply,
8677         .remove = flow_dv_remove,
8678         .destroy = flow_dv_destroy,
8679         .query = flow_dv_query,
8680         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8681         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8682         .create_policer_rules = flow_dv_create_policer_rules,
8683         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8684         .counter_alloc = flow_dv_counter_allocate,
8685         .counter_free = flow_dv_counter_free,
8686         .counter_query = flow_dv_counter_query,
8687 };
8688
8689 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */