drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30
  31 #include "mlx5.h"
  32 #include "mlx5_defs.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_flow.h"
  35 #include "mlx5_prm.h"
  36 #include "mlx5_rxtx.h"
  37
  38 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  39
  40 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  41 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  42 #endif
  43
  44 #ifndef HAVE_MLX5DV_DR_ESWITCH
  45 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  46 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  47 #endif
  48 #endif
  49
  50 #ifndef HAVE_MLX5DV_DR
  51 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  52 #endif
  53
  54 /* VLAN header definitions */
  55 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  56 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  57 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  58 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  59 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  60
  61 union flow_dv_attr {
  62         struct {
  63                 uint32_t valid:1;
  64                 uint32_t ipv4:1;
  65                 uint32_t ipv6:1;
  66                 uint32_t tcp:1;
  67                 uint32_t udp:1;
  68                 uint32_t reserved:27;
  69         };
  70         uint32_t attr;
  71 };
  72
  73 /**
  74  * Initialize flow attributes structure according to flow items' types.
  75  *
  76  * @param[in] item
  77  *   Pointer to item specification.
  78  * @param[out] attr
  79  *   Pointer to flow attributes structure.
  80  */
  81 static void
  82 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  83 {
  84         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  85                 switch (item->type) {
  86                 case RTE_FLOW_ITEM_TYPE_IPV4:
  87                         attr->ipv4 = 1;
  88                         break;
  89                 case RTE_FLOW_ITEM_TYPE_IPV6:
  90                         attr->ipv6 = 1;
  91                         break;
  92                 case RTE_FLOW_ITEM_TYPE_UDP:
  93                         attr->udp = 1;
  94                         break;
  95                 case RTE_FLOW_ITEM_TYPE_TCP:
  96                         attr->tcp = 1;
  97                         break;
  98                 default:
  99                         break;
 100                 }
 101         }
 102         attr->valid = 1;
 103 }
 104
 105 /**
 106  * Convert rte_mtr_color to mlx5 color.
 107  *
 108  * @param[in] rcol
 109  *   rte_mtr_color.
 110  *
 111  * @return
 112  *   mlx5 color.
 113  */
 114 static int
 115 rte_col_2_mlx5_col(enum rte_color rcol)
 116 {
 117         switch (rcol) {
 118         case RTE_COLOR_GREEN:
 119                 return MLX5_FLOW_COLOR_GREEN;
 120         case RTE_COLOR_YELLOW:
 121                 return MLX5_FLOW_COLOR_YELLOW;
 122         case RTE_COLOR_RED:
 123                 return MLX5_FLOW_COLOR_RED;
 124         default:
 125                 break;
 126         }
 127         return MLX5_FLOW_COLOR_UNDEFINED;
 128 }
 129
 130 struct field_modify_info {
 131         uint32_t size; /* Size of field in protocol header, in bytes. */
 132         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 133         enum mlx5_modification_field id;
 134 };
 135
 136 struct field_modify_info modify_eth[] = {
 137         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 138         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 139         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 140         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 141         {0, 0, 0},
 142 };
 143
 144 struct field_modify_info modify_vlan_out_first_vid[] = {
 145         /* Size in bits !!! */
 146         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 147         {0, 0, 0},
 148 };
 149
 150 struct field_modify_info modify_ipv4[] = {
 151         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 152         {4, 12, MLX5_MODI_OUT_SIPV4},
 153         {4, 16, MLX5_MODI_OUT_DIPV4},
 154         {0, 0, 0},
 155 };
 156
 157 struct field_modify_info modify_ipv6[] = {
 158         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 159         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 160         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 161         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 162         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 163         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 164         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 165         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 166         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 167         {0, 0, 0},
 168 };
 169
 170 struct field_modify_info modify_udp[] = {
 171         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 172         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 173         {0, 0, 0},
 174 };
 175
 176 struct field_modify_info modify_tcp[] = {
 177         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 178         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 179         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 180         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 181         {0, 0, 0},
 182 };
 183
 184 static void
 185 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 186                           uint8_t next_protocol, uint64_t *item_flags,
 187                           int *tunnel)
 188 {
 189         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 190                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 191         if (next_protocol == IPPROTO_IPIP) {
 192                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 193                 *tunnel = 1;
 194         }
 195         if (next_protocol == IPPROTO_IPV6) {
 196                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 197                 *tunnel = 1;
 198         }
 199 }
 200
 201 /**
 202  * Acquire the synchronizing object to protect multithreaded access
 203  * to shared dv context. Lock occurs only if context is actually
 204  * shared, i.e. we have multiport IB device and representors are
 205  * created.
 206  *
 207  * @param[in] dev
 208  *   Pointer to the rte_eth_dev structure.
 209  */
 210 static void
 211 flow_dv_shared_lock(struct rte_eth_dev *dev)
 212 {
 213         struct mlx5_priv *priv = dev->data->dev_private;
 214         struct mlx5_ibv_shared *sh = priv->sh;
 215
 216         if (sh->dv_refcnt > 1) {
 217                 int ret;
 218
 219                 ret = pthread_mutex_lock(&sh->dv_mutex);
 220                 assert(!ret);
 221                 (void)ret;
 222         }
 223 }
 224
 225 static void
 226 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 227 {
 228         struct mlx5_priv *priv = dev->data->dev_private;
 229         struct mlx5_ibv_shared *sh = priv->sh;
 230
 231         if (sh->dv_refcnt > 1) {
 232                 int ret;
 233
 234                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 235                 assert(!ret);
 236                 (void)ret;
 237         }
 238 }
 239
 240 /* Update VLAN's VID/PCP based on input rte_flow_action.
 241  *
 242  * @param[in] action
 243  *   Pointer to struct rte_flow_action.
 244  * @param[out] vlan
 245  *   Pointer to struct rte_vlan_hdr.
 246  */
 247 static void
 248 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 249                          struct rte_vlan_hdr *vlan)
 250 {
 251         uint16_t vlan_tci;
 252         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 253                 vlan_tci =
 254                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 255                                                action->conf)->vlan_pcp;
 256                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 257                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 258                 vlan->vlan_tci |= vlan_tci;
 259         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 260                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 261                 vlan->vlan_tci |= rte_be_to_cpu_16
 262                     (((const struct rte_flow_action_of_set_vlan_vid *)
 263                                              action->conf)->vlan_vid);
 264         }
 265 }
 266
 267 /**
 268  * Fetch 1, 2, 3 or 4 byte field from the byte array
 269  * and return as unsigned integer in host-endian format.
 270  *
 271  * @param[in] data
 272  *   Pointer to data array.
 273  * @param[in] size
 274  *   Size of field to extract.
 275  *
 276  * @return
 277  *   converted field in host endian format.
 278  */
 279 static inline uint32_t
 280 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 281 {
 282         uint32_t ret;
 283
 284         switch (size) {
 285         case 1:
 286                 ret = *data;
 287                 break;
 288         case 2:
 289                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 290                 break;
 291         case 3:
 292                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 293                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 294                 break;
 295         case 4:
 296                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 297                 break;
 298         default:
 299                 assert(false);
 300                 ret = 0;
 301                 break;
 302         }
 303         return ret;
 304 }
 305
 306 /**
 307  * Convert modify-header action to DV specification.
 308  *
 309  * Data length of each action is determined by provided field description
 310  * and the item mask. Data bit offset and width of each action is determined
 311  * by provided item mask.
 312  *
 313  * @param[in] item
 314  *   Pointer to item specification.
 315  * @param[in] field
 316  *   Pointer to field modification information.
 317  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 318  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 319  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 320  * @param[in] dcopy
 321  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 322  *   Negative offset value sets the same offset as source offset.
 323  *   size field is ignored, value is taken from source field.
 324  * @param[in,out] resource
 325  *   Pointer to the modify-header resource.
 326  * @param[in] type
 327  *   Type of modification.
 328  * @param[out] error
 329  *   Pointer to the error structure.
 330  *
 331  * @return
 332  *   0 on success, a negative errno value otherwise and rte_errno is set.
 333  */
 334 static int
 335 flow_dv_convert_modify_action(struct rte_flow_item *item,
 336                               struct field_modify_info *field,
 337                               struct field_modify_info *dcopy,
 338                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 339                               uint32_t type, struct rte_flow_error *error)
 340 {
 341         uint32_t i = resource->actions_num;
 342         struct mlx5_modification_cmd *actions = resource->actions;
 343
 344         /*
 345          * The item and mask are provided in big-endian format.
 346          * The fields should be presented as in big-endian format either.
 347          * Mask must be always present, it defines the actual field width.
 348          */
 349         assert(item->mask);
 350         assert(field->size);
 351         do {
 352                 unsigned int size_b;
 353                 unsigned int off_b;
 354                 uint32_t mask;
 355                 uint32_t data;
 356
 357                 if (i >= MLX5_MODIFY_NUM)
 358                         return rte_flow_error_set(error, EINVAL,
 359                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 360                                  "too many items to modify");
 361                 /* Fetch variable byte size mask from the array. */
 362                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 363                                            field->offset, field->size);
 364                 if (!mask) {
 365                         ++field;
 366                         continue;
 367                 }
 368                 /* Deduce actual data width in bits from mask value. */
 369                 off_b = rte_bsf32(mask);
 370                 size_b = sizeof(uint32_t) * CHAR_BIT -
 371                          off_b - __builtin_clz(mask);
 372                 assert(size_b);
 373                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 374                 actions[i].action_type = type;
 375                 actions[i].field = field->id;
 376                 actions[i].offset = off_b;
 377                 actions[i].length = size_b;
 378                 /* Convert entire record to expected big-endian format. */
 379                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 380                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 381                         assert(dcopy);
 382                         actions[i].dst_field = dcopy->id;
 383                         actions[i].dst_offset =
 384                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 385                         /* Convert entire record to big-endian format. */
 386                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 387                 } else {
 388                         assert(item->spec);
 389                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 390                                                    field->offset, field->size);
 391                         /* Shift out the trailing masked bits from data. */
 392                         data = (data & mask) >> off_b;
 393                         actions[i].data1 = rte_cpu_to_be_32(data);
 394                 }
 395                 ++i;
 396                 ++field;
 397         } while (field->size);
 398         resource->actions_num = i;
 399         if (!resource->actions_num)
 400                 return rte_flow_error_set(error, EINVAL,
 401                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 402                                           "invalid modification flow item");
 403         return 0;
 404 }
 405
 406 /**
 407  * Convert modify-header set IPv4 address action to DV specification.
 408  *
 409  * @param[in,out] resource
 410  *   Pointer to the modify-header resource.
 411  * @param[in] action
 412  *   Pointer to action specification.
 413  * @param[out] error
 414  *   Pointer to the error structure.
 415  *
 416  * @return
 417  *   0 on success, a negative errno value otherwise and rte_errno is set.
 418  */
 419 static int
 420 flow_dv_convert_action_modify_ipv4
 421                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 422                          const struct rte_flow_action *action,
 423                          struct rte_flow_error *error)
 424 {
 425         const struct rte_flow_action_set_ipv4 *conf =
 426                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 427         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 428         struct rte_flow_item_ipv4 ipv4;
 429         struct rte_flow_item_ipv4 ipv4_mask;
 430
 431         memset(&ipv4, 0, sizeof(ipv4));
 432         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 433         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 434                 ipv4.hdr.src_addr = conf->ipv4_addr;
 435                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 436         } else {
 437                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 438                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 439         }
 440         item.spec = &ipv4;
 441         item.mask = &ipv4_mask;
 442         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 443                                              MLX5_MODIFICATION_TYPE_SET, error);
 444 }
 445
 446 /**
 447  * Convert modify-header set IPv6 address action to DV specification.
 448  *
 449  * @param[in,out] resource
 450  *   Pointer to the modify-header resource.
 451  * @param[in] action
 452  *   Pointer to action specification.
 453  * @param[out] error
 454  *   Pointer to the error structure.
 455  *
 456  * @return
 457  *   0 on success, a negative errno value otherwise and rte_errno is set.
 458  */
 459 static int
 460 flow_dv_convert_action_modify_ipv6
 461                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 462                          const struct rte_flow_action *action,
 463                          struct rte_flow_error *error)
 464 {
 465         const struct rte_flow_action_set_ipv6 *conf =
 466                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 467         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 468         struct rte_flow_item_ipv6 ipv6;
 469         struct rte_flow_item_ipv6 ipv6_mask;
 470
 471         memset(&ipv6, 0, sizeof(ipv6));
 472         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 473         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 474                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 475                        sizeof(ipv6.hdr.src_addr));
 476                 memcpy(&ipv6_mask.hdr.src_addr,
 477                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 478                        sizeof(ipv6.hdr.src_addr));
 479         } else {
 480                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 481                        sizeof(ipv6.hdr.dst_addr));
 482                 memcpy(&ipv6_mask.hdr.dst_addr,
 483                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 484                        sizeof(ipv6.hdr.dst_addr));
 485         }
 486         item.spec = &ipv6;
 487         item.mask = &ipv6_mask;
 488         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 489                                              MLX5_MODIFICATION_TYPE_SET, error);
 490 }
 491
 492 /**
 493  * Convert modify-header set MAC address action to DV specification.
 494  *
 495  * @param[in,out] resource
 496  *   Pointer to the modify-header resource.
 497  * @param[in] action
 498  *   Pointer to action specification.
 499  * @param[out] error
 500  *   Pointer to the error structure.
 501  *
 502  * @return
 503  *   0 on success, a negative errno value otherwise and rte_errno is set.
 504  */
 505 static int
 506 flow_dv_convert_action_modify_mac
 507                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 508                          const struct rte_flow_action *action,
 509                          struct rte_flow_error *error)
 510 {
 511         const struct rte_flow_action_set_mac *conf =
 512                 (const struct rte_flow_action_set_mac *)(action->conf);
 513         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 514         struct rte_flow_item_eth eth;
 515         struct rte_flow_item_eth eth_mask;
 516
 517         memset(&eth, 0, sizeof(eth));
 518         memset(&eth_mask, 0, sizeof(eth_mask));
 519         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 520                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 521                        sizeof(eth.src.addr_bytes));
 522                 memcpy(&eth_mask.src.addr_bytes,
 523                        &rte_flow_item_eth_mask.src.addr_bytes,
 524                        sizeof(eth_mask.src.addr_bytes));
 525         } else {
 526                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 527                        sizeof(eth.dst.addr_bytes));
 528                 memcpy(&eth_mask.dst.addr_bytes,
 529                        &rte_flow_item_eth_mask.dst.addr_bytes,
 530                        sizeof(eth_mask.dst.addr_bytes));
 531         }
 532         item.spec = &eth;
 533         item.mask = &eth_mask;
 534         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 535                                              MLX5_MODIFICATION_TYPE_SET, error);
 536 }
 537
 538 /**
 539  * Convert modify-header set VLAN VID action to DV specification.
 540  *
 541  * @param[in,out] resource
 542  *   Pointer to the modify-header resource.
 543  * @param[in] action
 544  *   Pointer to action specification.
 545  * @param[out] error
 546  *   Pointer to the error structure.
 547  *
 548  * @return
 549  *   0 on success, a negative errno value otherwise and rte_errno is set.
 550  */
 551 static int
 552 flow_dv_convert_action_modify_vlan_vid
 553                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 554                          const struct rte_flow_action *action,
 555                          struct rte_flow_error *error)
 556 {
 557         const struct rte_flow_action_of_set_vlan_vid *conf =
 558                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 559         int i = resource->actions_num;
 560         struct mlx5_modification_cmd *actions = &resource->actions[i];
 561         struct field_modify_info *field = modify_vlan_out_first_vid;
 562
 563         if (i >= MLX5_MODIFY_NUM)
 564                 return rte_flow_error_set(error, EINVAL,
 565                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 566                          "too many items to modify");
 567         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 568         actions[i].field = field->id;
 569         actions[i].length = field->size;
 570         actions[i].offset = field->offset;
 571         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 572         actions[i].data1 = conf->vlan_vid;
 573         actions[i].data1 = actions[i].data1 << 16;
 574         resource->actions_num = ++i;
 575         return 0;
 576 }
 577
 578 /**
 579  * Convert modify-header set TP action to DV specification.
 580  *
 581  * @param[in,out] resource
 582  *   Pointer to the modify-header resource.
 583  * @param[in] action
 584  *   Pointer to action specification.
 585  * @param[in] items
 586  *   Pointer to rte_flow_item objects list.
 587  * @param[in] attr
 588  *   Pointer to flow attributes structure.
 589  * @param[out] error
 590  *   Pointer to the error structure.
 591  *
 592  * @return
 593  *   0 on success, a negative errno value otherwise and rte_errno is set.
 594  */
 595 static int
 596 flow_dv_convert_action_modify_tp
 597                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 598                          const struct rte_flow_action *action,
 599                          const struct rte_flow_item *items,
 600                          union flow_dv_attr *attr,
 601                          struct rte_flow_error *error)
 602 {
 603         const struct rte_flow_action_set_tp *conf =
 604                 (const struct rte_flow_action_set_tp *)(action->conf);
 605         struct rte_flow_item item;
 606         struct rte_flow_item_udp udp;
 607         struct rte_flow_item_udp udp_mask;
 608         struct rte_flow_item_tcp tcp;
 609         struct rte_flow_item_tcp tcp_mask;
 610         struct field_modify_info *field;
 611
 612         if (!attr->valid)
 613                 flow_dv_attr_init(items, attr);
 614         if (attr->udp) {
 615                 memset(&udp, 0, sizeof(udp));
 616                 memset(&udp_mask, 0, sizeof(udp_mask));
 617                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 618                         udp.hdr.src_port = conf->port;
 619                         udp_mask.hdr.src_port =
 620                                         rte_flow_item_udp_mask.hdr.src_port;
 621                 } else {
 622                         udp.hdr.dst_port = conf->port;
 623                         udp_mask.hdr.dst_port =
 624                                         rte_flow_item_udp_mask.hdr.dst_port;
 625                 }
 626                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 627                 item.spec = &udp;
 628                 item.mask = &udp_mask;
 629                 field = modify_udp;
 630         }
 631         if (attr->tcp) {
 632                 memset(&tcp, 0, sizeof(tcp));
 633                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 634                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 635                         tcp.hdr.src_port = conf->port;
 636                         tcp_mask.hdr.src_port =
 637                                         rte_flow_item_tcp_mask.hdr.src_port;
 638                 } else {
 639                         tcp.hdr.dst_port = conf->port;
 640                         tcp_mask.hdr.dst_port =
 641                                         rte_flow_item_tcp_mask.hdr.dst_port;
 642                 }
 643                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 644                 item.spec = &tcp;
 645                 item.mask = &tcp_mask;
 646                 field = modify_tcp;
 647         }
 648         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 649                                              MLX5_MODIFICATION_TYPE_SET, error);
 650 }
 651
 652 /**
 653  * Convert modify-header set TTL action to DV specification.
 654  *
 655  * @param[in,out] resource
 656  *   Pointer to the modify-header resource.
 657  * @param[in] action
 658  *   Pointer to action specification.
 659  * @param[in] items
 660  *   Pointer to rte_flow_item objects list.
 661  * @param[in] attr
 662  *   Pointer to flow attributes structure.
 663  * @param[out] error
 664  *   Pointer to the error structure.
 665  *
 666  * @return
 667  *   0 on success, a negative errno value otherwise and rte_errno is set.
 668  */
 669 static int
 670 flow_dv_convert_action_modify_ttl
 671                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 672                          const struct rte_flow_action *action,
 673                          const struct rte_flow_item *items,
 674                          union flow_dv_attr *attr,
 675                          struct rte_flow_error *error)
 676 {
 677         const struct rte_flow_action_set_ttl *conf =
 678                 (const struct rte_flow_action_set_ttl *)(action->conf);
 679         struct rte_flow_item item;
 680         struct rte_flow_item_ipv4 ipv4;
 681         struct rte_flow_item_ipv4 ipv4_mask;
 682         struct rte_flow_item_ipv6 ipv6;
 683         struct rte_flow_item_ipv6 ipv6_mask;
 684         struct field_modify_info *field;
 685
 686         if (!attr->valid)
 687                 flow_dv_attr_init(items, attr);
 688         if (attr->ipv4) {
 689                 memset(&ipv4, 0, sizeof(ipv4));
 690                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 691                 ipv4.hdr.time_to_live = conf->ttl_value;
 692                 ipv4_mask.hdr.time_to_live = 0xFF;
 693                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 694                 item.spec = &ipv4;
 695                 item.mask = &ipv4_mask;
 696                 field = modify_ipv4;
 697         }
 698         if (attr->ipv6) {
 699                 memset(&ipv6, 0, sizeof(ipv6));
 700                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 701                 ipv6.hdr.hop_limits = conf->ttl_value;
 702                 ipv6_mask.hdr.hop_limits = 0xFF;
 703                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 704                 item.spec = &ipv6;
 705                 item.mask = &ipv6_mask;
 706                 field = modify_ipv6;
 707         }
 708         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 709                                              MLX5_MODIFICATION_TYPE_SET, error);
 710 }
 711
 712 /**
 713  * Convert modify-header decrement TTL action to DV specification.
 714  *
 715  * @param[in,out] resource
 716  *   Pointer to the modify-header resource.
 717  * @param[in] action
 718  *   Pointer to action specification.
 719  * @param[in] items
 720  *   Pointer to rte_flow_item objects list.
 721  * @param[in] attr
 722  *   Pointer to flow attributes structure.
 723  * @param[out] error
 724  *   Pointer to the error structure.
 725  *
 726  * @return
 727  *   0 on success, a negative errno value otherwise and rte_errno is set.
 728  */
 729 static int
 730 flow_dv_convert_action_modify_dec_ttl
 731                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 732                          const struct rte_flow_item *items,
 733                          union flow_dv_attr *attr,
 734                          struct rte_flow_error *error)
 735 {
 736         struct rte_flow_item item;
 737         struct rte_flow_item_ipv4 ipv4;
 738         struct rte_flow_item_ipv4 ipv4_mask;
 739         struct rte_flow_item_ipv6 ipv6;
 740         struct rte_flow_item_ipv6 ipv6_mask;
 741         struct field_modify_info *field;
 742
 743         if (!attr->valid)
 744                 flow_dv_attr_init(items, attr);
 745         if (attr->ipv4) {
 746                 memset(&ipv4, 0, sizeof(ipv4));
 747                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 748                 ipv4.hdr.time_to_live = 0xFF;
 749                 ipv4_mask.hdr.time_to_live = 0xFF;
 750                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 751                 item.spec = &ipv4;
 752                 item.mask = &ipv4_mask;
 753                 field = modify_ipv4;
 754         }
 755         if (attr->ipv6) {
 756                 memset(&ipv6, 0, sizeof(ipv6));
 757                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 758                 ipv6.hdr.hop_limits = 0xFF;
 759                 ipv6_mask.hdr.hop_limits = 0xFF;
 760                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 761                 item.spec = &ipv6;
 762                 item.mask = &ipv6_mask;
 763                 field = modify_ipv6;
 764         }
 765         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 766                                              MLX5_MODIFICATION_TYPE_ADD, error);
 767 }
 768
 769 /**
 770  * Convert modify-header increment/decrement TCP Sequence number
 771  * to DV specification.
 772  *
 773  * @param[in,out] resource
 774  *   Pointer to the modify-header resource.
 775  * @param[in] action
 776  *   Pointer to action specification.
 777  * @param[out] error
 778  *   Pointer to the error structure.
 779  *
 780  * @return
 781  *   0 on success, a negative errno value otherwise and rte_errno is set.
 782  */
 783 static int
 784 flow_dv_convert_action_modify_tcp_seq
 785                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 786                          const struct rte_flow_action *action,
 787                          struct rte_flow_error *error)
 788 {
 789         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 790         uint64_t value = rte_be_to_cpu_32(*conf);
 791         struct rte_flow_item item;
 792         struct rte_flow_item_tcp tcp;
 793         struct rte_flow_item_tcp tcp_mask;
 794
 795         memset(&tcp, 0, sizeof(tcp));
 796         memset(&tcp_mask, 0, sizeof(tcp_mask));
 797         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 798                 /*
 799                  * The HW has no decrement operation, only increment operation.
 800                  * To simulate decrement X from Y using increment operation
 801                  * we need to add UINT32_MAX X times to Y.
 802                  * Each adding of UINT32_MAX decrements Y by 1.
 803                  */
 804                 value *= UINT32_MAX;
 805         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 806         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 807         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 808         item.spec = &tcp;
 809         item.mask = &tcp_mask;
 810         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 811                                              MLX5_MODIFICATION_TYPE_ADD, error);
 812 }
 813
 814 /**
 815  * Convert modify-header increment/decrement TCP Acknowledgment number
 816  * to DV specification.
 817  *
 818  * @param[in,out] resource
 819  *   Pointer to the modify-header resource.
 820  * @param[in] action
 821  *   Pointer to action specification.
 822  * @param[out] error
 823  *   Pointer to the error structure.
 824  *
 825  * @return
 826  *   0 on success, a negative errno value otherwise and rte_errno is set.
 827  */
 828 static int
 829 flow_dv_convert_action_modify_tcp_ack
 830                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 831                          const struct rte_flow_action *action,
 832                          struct rte_flow_error *error)
 833 {
 834         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 835         uint64_t value = rte_be_to_cpu_32(*conf);
 836         struct rte_flow_item item;
 837         struct rte_flow_item_tcp tcp;
 838         struct rte_flow_item_tcp tcp_mask;
 839
 840         memset(&tcp, 0, sizeof(tcp));
 841         memset(&tcp_mask, 0, sizeof(tcp_mask));
 842         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 843                 /*
 844                  * The HW has no decrement operation, only increment operation.
 845                  * To simulate decrement X from Y using increment operation
 846                  * we need to add UINT32_MAX X times to Y.
 847                  * Each adding of UINT32_MAX decrements Y by 1.
 848                  */
 849                 value *= UINT32_MAX;
 850         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 851         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 852         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 853         item.spec = &tcp;
 854         item.mask = &tcp_mask;
 855         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 856                                              MLX5_MODIFICATION_TYPE_ADD, error);
 857 }
 858
 859 static enum mlx5_modification_field reg_to_field[] = {
 860         [REG_NONE] = MLX5_MODI_OUT_NONE,
 861         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 862         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 863         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 864         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 865         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 866         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 867         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 868         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 869         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 870         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 871 };
 872
 873 /**
 874  * Convert register set to DV specification.
 875  *
 876  * @param[in,out] resource
 877  *   Pointer to the modify-header resource.
 878  * @param[in] action
 879  *   Pointer to action specification.
 880  * @param[out] error
 881  *   Pointer to the error structure.
 882  *
 883  * @return
 884  *   0 on success, a negative errno value otherwise and rte_errno is set.
 885  */
 886 static int
 887 flow_dv_convert_action_set_reg
 888                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 889                          const struct rte_flow_action *action,
 890                          struct rte_flow_error *error)
 891 {
 892         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 893         struct mlx5_modification_cmd *actions = resource->actions;
 894         uint32_t i = resource->actions_num;
 895
 896         if (i >= MLX5_MODIFY_NUM)
 897                 return rte_flow_error_set(error, EINVAL,
 898                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 899                                           "too many items to modify");
 900         assert(conf->id != REG_NONE);
 901         assert(conf->id < RTE_DIM(reg_to_field));
 902         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 903         actions[i].field = reg_to_field[conf->id];
 904         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 905         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 906         ++i;
 907         resource->actions_num = i;
 908         if (!resource->actions_num)
 909                 return rte_flow_error_set(error, EINVAL,
 910                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 911                                           "invalid modification flow item");
 912         return 0;
 913 }
 914
 915 /**
 916  * Convert SET_TAG action to DV specification.
 917  *
 918  * @param[in] dev
 919  *   Pointer to the rte_eth_dev structure.
 920  * @param[in,out] resource
 921  *   Pointer to the modify-header resource.
 922  * @param[in] conf
 923  *   Pointer to action specification.
 924  * @param[out] error
 925  *   Pointer to the error structure.
 926  *
 927  * @return
 928  *   0 on success, a negative errno value otherwise and rte_errno is set.
 929  */
 930 static int
 931 flow_dv_convert_action_set_tag
 932                         (struct rte_eth_dev *dev,
 933                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 934                          const struct rte_flow_action_set_tag *conf,
 935                          struct rte_flow_error *error)
 936 {
 937         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 938         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 939         struct rte_flow_item item = {
 940                 .spec = &data,
 941                 .mask = &mask,
 942         };
 943         struct field_modify_info reg_c_x[] = {
 944                 [1] = {0, 0, 0},
 945         };
 946         enum mlx5_modification_field reg_type;
 947         int ret;
 948
 949         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 950         if (ret < 0)
 951                 return ret;
 952         assert(ret != REG_NONE);
 953         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 954         reg_type = reg_to_field[ret];
 955         assert(reg_type > 0);
 956         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 957         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 958                                              MLX5_MODIFICATION_TYPE_SET, error);
 959 }
 960
 961 /**
 962  * Convert internal COPY_REG action to DV specification.
 963  *
 964  * @param[in] dev
 965  *   Pointer to the rte_eth_dev structure.
 966  * @param[in,out] res
 967  *   Pointer to the modify-header resource.
 968  * @param[in] action
 969  *   Pointer to action specification.
 970  * @param[out] error
 971  *   Pointer to the error structure.
 972  *
 973  * @return
 974  *   0 on success, a negative errno value otherwise and rte_errno is set.
 975  */
 976 static int
 977 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 978                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 979                                  const struct rte_flow_action *action,
 980                                  struct rte_flow_error *error)
 981 {
 982         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 983         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 984         struct rte_flow_item item = {
 985                 .spec = NULL,
 986                 .mask = &mask,
 987         };
 988         struct field_modify_info reg_src[] = {
 989                 {4, 0, reg_to_field[conf->src]},
 990                 {0, 0, 0},
 991         };
 992         struct field_modify_info reg_dst = {
 993                 .offset = 0,
 994                 .id = reg_to_field[conf->dst],
 995         };
 996         /* Adjust reg_c[0] usage according to reported mask. */
 997         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
 998                 struct mlx5_priv *priv = dev->data->dev_private;
 999                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1000
1001                 assert(reg_c0);
1002                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1003                 if (conf->dst == REG_C_0) {
1004                         /* Copy to reg_c[0], within mask only. */
1005                         reg_dst.offset = rte_bsf32(reg_c0);
1006                         /*
1007                          * Mask is ignoring the enianness, because
1008                          * there is no conversion in datapath.
1009                          */
1010 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1011                         /* Copy from destination lower bits to reg_c[0]. */
1012                         mask = reg_c0 >> reg_dst.offset;
1013 #else
1014                         /* Copy from destination upper bits to reg_c[0]. */
1015                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1016                                           rte_fls_u32(reg_c0));
1017 #endif
1018                 } else {
1019                         mask = rte_cpu_to_be_32(reg_c0);
1020 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1021                         /* Copy from reg_c[0] to destination lower bits. */
1022                         reg_dst.offset = 0;
1023 #else
1024                         /* Copy from reg_c[0] to destination upper bits. */
1025                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1026                                          (rte_fls_u32(reg_c0) -
1027                                           rte_bsf32(reg_c0));
1028 #endif
1029                 }
1030         }
1031         return flow_dv_convert_modify_action(&item,
1032                                              reg_src, &reg_dst, res,
1033                                              MLX5_MODIFICATION_TYPE_COPY,
1034                                              error);
1035 }
1036
1037 /**
1038  * Convert MARK action to DV specification. This routine is used
1039  * in extensive metadata only and requires metadata register to be
1040  * handled. In legacy mode hardware tag resource is engaged.
1041  *
1042  * @param[in] dev
1043  *   Pointer to the rte_eth_dev structure.
1044  * @param[in] conf
1045  *   Pointer to MARK action specification.
1046  * @param[in,out] resource
1047  *   Pointer to the modify-header resource.
1048  * @param[out] error
1049  *   Pointer to the error structure.
1050  *
1051  * @return
1052  *   0 on success, a negative errno value otherwise and rte_errno is set.
1053  */
1054 static int
1055 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1056                             const struct rte_flow_action_mark *conf,
1057                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1058                             struct rte_flow_error *error)
1059 {
1060         struct mlx5_priv *priv = dev->data->dev_private;
1061         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1062                                            priv->sh->dv_mark_mask);
1063         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1064         struct rte_flow_item item = {
1065                 .spec = &data,
1066                 .mask = &mask,
1067         };
1068         struct field_modify_info reg_c_x[] = {
1069                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1070                 {0, 0, 0},
1071         };
1072         enum modify_reg reg;
1073
1074         if (!mask)
1075                 return rte_flow_error_set(error, EINVAL,
1076                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1077                                           NULL, "zero mark action mask");
1078         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1079         if (reg < 0)
1080                 return reg;
1081         assert(reg > 0);
1082         reg_c_x[0].id = reg_to_field[reg];
1083         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1084                                              MLX5_MODIFICATION_TYPE_SET, error);
1085 }
1086
1087 /**
1088  * Get metadata register index for specified steering domain.
1089  *
1090  * @param[in] dev
1091  *   Pointer to the rte_eth_dev structure.
1092  * @param[in] attr
1093  *   Attributes of flow to determine steering domain.
1094  * @param[out] error
1095  *   Pointer to the error structure.
1096  *
1097  * @return
1098  *   positive index on success, a negative errno value otherwise
1099  *   and rte_errno is set.
1100  */
1101 static enum modify_reg
1102 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1103                          const struct rte_flow_attr *attr,
1104                          struct rte_flow_error *error)
1105 {
1106         enum modify_reg reg =
1107                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1108                                           MLX5_METADATA_FDB :
1109                                             attr->egress ?
1110                                             MLX5_METADATA_TX :
1111                                             MLX5_METADATA_RX, 0, error);
1112         if (reg < 0)
1113                 return rte_flow_error_set(error,
1114                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1115                                           NULL, "unavailable "
1116                                           "metadata register");
1117         return reg;
1118 }
1119
1120 /**
1121  * Convert SET_META action to DV specification.
1122  *
1123  * @param[in] dev
1124  *   Pointer to the rte_eth_dev structure.
1125  * @param[in,out] resource
1126  *   Pointer to the modify-header resource.
1127  * @param[in] attr
1128  *   Attributes of flow that includes this item.
1129  * @param[in] conf
1130  *   Pointer to action specification.
1131  * @param[out] error
1132  *   Pointer to the error structure.
1133  *
1134  * @return
1135  *   0 on success, a negative errno value otherwise and rte_errno is set.
1136  */
1137 static int
1138 flow_dv_convert_action_set_meta
1139                         (struct rte_eth_dev *dev,
1140                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1141                          const struct rte_flow_attr *attr,
1142                          const struct rte_flow_action_set_meta *conf,
1143                          struct rte_flow_error *error)
1144 {
1145         uint32_t data = conf->data;
1146         uint32_t mask = conf->mask;
1147         struct rte_flow_item item = {
1148                 .spec = &data,
1149                 .mask = &mask,
1150         };
1151         struct field_modify_info reg_c_x[] = {
1152                 [1] = {0, 0, 0},
1153         };
1154         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1155
1156         if (reg < 0)
1157                 return reg;
1158         /*
1159          * In datapath code there is no endianness
1160          * coversions for perfromance reasons, all
1161          * pattern conversions are done in rte_flow.
1162          */
1163         if (reg == REG_C_0) {
1164                 struct mlx5_priv *priv = dev->data->dev_private;
1165                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1166                 uint32_t shl_c0;
1167
1168                 assert(msk_c0);
1169 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1170                 shl_c0 = rte_bsf32(msk_c0);
1171 #else
1172                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1173 #endif
1174                 mask <<= shl_c0;
1175                 data <<= shl_c0;
1176                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1177         }
1178         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1179         /* The routine expects parameters in memory as big-endian ones. */
1180         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1181                                              MLX5_MODIFICATION_TYPE_SET, error);
1182 }
1183
1184 /**
1185  * Validate MARK item.
1186  *
1187  * @param[in] dev
1188  *   Pointer to the rte_eth_dev structure.
1189  * @param[in] item
1190  *   Item specification.
1191  * @param[in] attr
1192  *   Attributes of flow that includes this item.
1193  * @param[out] error
1194  *   Pointer to error structure.
1195  *
1196  * @return
1197  *   0 on success, a negative errno value otherwise and rte_errno is set.
1198  */
1199 static int
1200 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1201                            const struct rte_flow_item *item,
1202                            const struct rte_flow_attr *attr __rte_unused,
1203                            struct rte_flow_error *error)
1204 {
1205         struct mlx5_priv *priv = dev->data->dev_private;
1206         struct mlx5_dev_config *config = &priv->config;
1207         const struct rte_flow_item_mark *spec = item->spec;
1208         const struct rte_flow_item_mark *mask = item->mask;
1209         const struct rte_flow_item_mark nic_mask = {
1210                 .id = priv->sh->dv_mark_mask,
1211         };
1212         int ret;
1213
1214         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1215                 return rte_flow_error_set(error, ENOTSUP,
1216                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1217                                           "extended metadata feature"
1218                                           " isn't enabled");
1219         if (!mlx5_flow_ext_mreg_supported(dev))
1220                 return rte_flow_error_set(error, ENOTSUP,
1221                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1222                                           "extended metadata register"
1223                                           " isn't supported");
1224         if (!nic_mask.id)
1225                 return rte_flow_error_set(error, ENOTSUP,
1226                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1227                                           "extended metadata register"
1228                                           " isn't available");
1229         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1230         if (ret < 0)
1231                 return ret;
1232         if (!spec)
1233                 return rte_flow_error_set(error, EINVAL,
1234                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1235                                           item->spec,
1236                                           "data cannot be empty");
1237         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1238                 return rte_flow_error_set(error, EINVAL,
1239                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1240                                           &spec->id,
1241                                           "mark id exceeds the limit");
1242         if (!mask)
1243                 mask = &nic_mask;
1244         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1245                                         (const uint8_t *)&nic_mask,
1246                                         sizeof(struct rte_flow_item_mark),
1247                                         error);
1248         if (ret < 0)
1249                 return ret;
1250         return 0;
1251 }
1252
1253 /**
1254  * Validate META item.
1255  *
1256  * @param[in] dev
1257  *   Pointer to the rte_eth_dev structure.
1258  * @param[in] item
1259  *   Item specification.
1260  * @param[in] attr
1261  *   Attributes of flow that includes this item.
1262  * @param[out] error
1263  *   Pointer to error structure.
1264  *
1265  * @return
1266  *   0 on success, a negative errno value otherwise and rte_errno is set.
1267  */
1268 static int
1269 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1270                            const struct rte_flow_item *item,
1271                            const struct rte_flow_attr *attr,
1272                            struct rte_flow_error *error)
1273 {
1274         struct mlx5_priv *priv = dev->data->dev_private;
1275         struct mlx5_dev_config *config = &priv->config;
1276         const struct rte_flow_item_meta *spec = item->spec;
1277         const struct rte_flow_item_meta *mask = item->mask;
1278         struct rte_flow_item_meta nic_mask = {
1279                 .data = UINT32_MAX
1280         };
1281         enum modify_reg reg;
1282         int ret;
1283
1284         if (!spec)
1285                 return rte_flow_error_set(error, EINVAL,
1286                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1287                                           item->spec,
1288                                           "data cannot be empty");
1289         if (!spec->data)
1290                 return rte_flow_error_set(error, EINVAL,
1291                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1292                                           "data cannot be zero");
1293         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1294                 if (!mlx5_flow_ext_mreg_supported(dev))
1295                         return rte_flow_error_set(error, ENOTSUP,
1296                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1297                                           "extended metadata register"
1298                                           " isn't supported");
1299                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1300                 if (reg < 0)
1301                         return reg;
1302                 if (reg == REG_B)
1303                         return rte_flow_error_set(error, ENOTSUP,
1304                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1305                                           "match on reg_b "
1306                                           "isn't supported");
1307                 if (reg != REG_A)
1308                         nic_mask.data = priv->sh->dv_meta_mask;
1309         }
1310         if (!mask)
1311                 mask = &rte_flow_item_meta_mask;
1312         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1313                                         (const uint8_t *)&nic_mask,
1314                                         sizeof(struct rte_flow_item_meta),
1315                                         error);
1316         return ret;
1317 }
1318
1319 /**
1320  * Validate TAG item.
1321  *
1322  * @param[in] dev
1323  *   Pointer to the rte_eth_dev structure.
1324  * @param[in] item
1325  *   Item specification.
1326  * @param[in] attr
1327  *   Attributes of flow that includes this item.
1328  * @param[out] error
1329  *   Pointer to error structure.
1330  *
1331  * @return
1332  *   0 on success, a negative errno value otherwise and rte_errno is set.
1333  */
1334 static int
1335 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1336                           const struct rte_flow_item *item,
1337                           const struct rte_flow_attr *attr __rte_unused,
1338                           struct rte_flow_error *error)
1339 {
1340         const struct rte_flow_item_tag *spec = item->spec;
1341         const struct rte_flow_item_tag *mask = item->mask;
1342         const struct rte_flow_item_tag nic_mask = {
1343                 .data = RTE_BE32(UINT32_MAX),
1344                 .index = 0xff,
1345         };
1346         int ret;
1347
1348         if (!mlx5_flow_ext_mreg_supported(dev))
1349                 return rte_flow_error_set(error, ENOTSUP,
1350                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1351                                           "extensive metadata register"
1352                                           " isn't supported");
1353         if (!spec)
1354                 return rte_flow_error_set(error, EINVAL,
1355                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1356                                           item->spec,
1357                                           "data cannot be empty");
1358         if (!mask)
1359                 mask = &rte_flow_item_tag_mask;
1360         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1361                                         (const uint8_t *)&nic_mask,
1362                                         sizeof(struct rte_flow_item_tag),
1363                                         error);
1364         if (ret < 0)
1365                 return ret;
1366         if (mask->index != 0xff)
1367                 return rte_flow_error_set(error, EINVAL,
1368                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1369                                           "partial mask for tag index"
1370                                           " is not supported");
1371         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1372         if (ret < 0)
1373                 return ret;
1374         assert(ret != REG_NONE);
1375         return 0;
1376 }
1377
1378 /**
1379  * Validate vport item.
1380  *
1381  * @param[in] dev
1382  *   Pointer to the rte_eth_dev structure.
1383  * @param[in] item
1384  *   Item specification.
1385  * @param[in] attr
1386  *   Attributes of flow that includes this item.
1387  * @param[in] item_flags
1388  *   Bit-fields that holds the items detected until now.
1389  * @param[out] error
1390  *   Pointer to error structure.
1391  *
1392  * @return
1393  *   0 on success, a negative errno value otherwise and rte_errno is set.
1394  */
1395 static int
1396 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1397                               const struct rte_flow_item *item,
1398                               const struct rte_flow_attr *attr,
1399                               uint64_t item_flags,
1400                               struct rte_flow_error *error)
1401 {
1402         const struct rte_flow_item_port_id *spec = item->spec;
1403         const struct rte_flow_item_port_id *mask = item->mask;
1404         const struct rte_flow_item_port_id switch_mask = {
1405                         .id = 0xffffffff,
1406         };
1407         struct mlx5_priv *esw_priv;
1408         struct mlx5_priv *dev_priv;
1409         int ret;
1410
1411         if (!attr->transfer)
1412                 return rte_flow_error_set(error, EINVAL,
1413                                           RTE_FLOW_ERROR_TYPE_ITEM,
1414                                           NULL,
1415                                           "match on port id is valid only"
1416                                           " when transfer flag is enabled");
1417         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1418                 return rte_flow_error_set(error, ENOTSUP,
1419                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1420                                           "multiple source ports are not"
1421                                           " supported");
1422         if (!mask)
1423                 mask = &switch_mask;
1424         if (mask->id != 0xffffffff)
1425                 return rte_flow_error_set(error, ENOTSUP,
1426                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1427                                            mask,
1428                                            "no support for partial mask on"
1429                                            " \"id\" field");
1430         ret = mlx5_flow_item_acceptable
1431                                 (item, (const uint8_t *)mask,
1432                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1433                                  sizeof(struct rte_flow_item_port_id),
1434                                  error);
1435         if (ret)
1436                 return ret;
1437         if (!spec)
1438                 return 0;
1439         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1440         if (!esw_priv)
1441                 return rte_flow_error_set(error, rte_errno,
1442                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1443                                           "failed to obtain E-Switch info for"
1444                                           " port");
1445         dev_priv = mlx5_dev_to_eswitch_info(dev);
1446         if (!dev_priv)
1447                 return rte_flow_error_set(error, rte_errno,
1448                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1449                                           NULL,
1450                                           "failed to obtain E-Switch info");
1451         if (esw_priv->domain_id != dev_priv->domain_id)
1452                 return rte_flow_error_set(error, EINVAL,
1453                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1454                                           "cannot match on a port from a"
1455                                           " different E-Switch");
1456         return 0;
1457 }
1458
1459 /**
1460  * Validate the pop VLAN action.
1461  *
1462  * @param[in] dev
1463  *   Pointer to the rte_eth_dev structure.
1464  * @param[in] action_flags
1465  *   Holds the actions detected until now.
1466  * @param[in] action
1467  *   Pointer to the pop vlan action.
1468  * @param[in] item_flags
1469  *   The items found in this flow rule.
1470  * @param[in] attr
1471  *   Pointer to flow attributes.
1472  * @param[out] error
1473  *   Pointer to error structure.
1474  *
1475  * @return
1476  *   0 on success, a negative errno value otherwise and rte_errno is set.
1477  */
1478 static int
1479 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1480                                  uint64_t action_flags,
1481                                  const struct rte_flow_action *action,
1482                                  uint64_t item_flags,
1483                                  const struct rte_flow_attr *attr,
1484                                  struct rte_flow_error *error)
1485 {
1486         struct mlx5_priv *priv = dev->data->dev_private;
1487
1488         (void)action;
1489         (void)attr;
1490         if (!priv->sh->pop_vlan_action)
1491                 return rte_flow_error_set(error, ENOTSUP,
1492                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1493                                           NULL,
1494                                           "pop vlan action is not supported");
1495         /*
1496          * Check for inconsistencies:
1497          *  fail strip_vlan in a flow that matches packets without VLAN tags.
1498          *  fail strip_vlan in a flow that matches packets without explicitly a
1499          *  matching on VLAN tag ?
1500          */
1501         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
1502                 return rte_flow_error_set(error, ENOTSUP,
1503                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1504                                           NULL,
1505                                           "no support for multiple vlan pop "
1506                                           "actions");
1507         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1508                 return rte_flow_error_set(error, ENOTSUP,
1509                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1510                                           NULL,
1511                                           "cannot pop vlan without a "
1512                                           "match on (outer) vlan in the flow");
1513         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1514                 return rte_flow_error_set(error, EINVAL,
1515                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1516                                           "wrong action order, port_id should "
1517                                           "be after pop VLAN action");
1518         return 0;
1519 }
1520
1521 /**
1522  * Get VLAN default info from vlan match info.
1523  *
1524  * @param[in] dev
1525  *   Pointer to the rte_eth_dev structure.
1526  * @param[in] item
1527  *   the list of item specifications.
1528  * @param[out] vlan
1529  *   pointer VLAN info to fill to.
1530  * @param[out] error
1531  *   Pointer to error structure.
1532  *
1533  * @return
1534  *   0 on success, a negative errno value otherwise and rte_errno is set.
1535  */
1536 static void
1537 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1538                                   struct rte_vlan_hdr *vlan)
1539 {
1540         const struct rte_flow_item_vlan nic_mask = {
1541                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1542                                 MLX5DV_FLOW_VLAN_VID_MASK),
1543                 .inner_type = RTE_BE16(0xffff),
1544         };
1545
1546         if (items == NULL)
1547                 return;
1548         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1549                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1550                 ;
1551         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1552                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1553                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1554
1555                 if (!vlan_m)
1556                         vlan_m = &nic_mask;
1557                 /* Only full match values are accepted */
1558                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1559                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1560                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1561                         vlan->vlan_tci |=
1562                                 rte_be_to_cpu_16(vlan_v->tci &
1563                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1564                 }
1565                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1566                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1567                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1568                         vlan->vlan_tci |=
1569                                 rte_be_to_cpu_16(vlan_v->tci &
1570                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1571                 }
1572                 if (vlan_m->inner_type == nic_mask.inner_type)
1573                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1574                                                            vlan_m->inner_type);
1575         }
1576 }
1577
1578 /**
1579  * Validate the push VLAN action.
1580  *
1581  * @param[in] action_flags
1582  *   Holds the actions detected until now.
1583  * @param[in] action
1584  *   Pointer to the encap action.
1585  * @param[in] attr
1586  *   Pointer to flow attributes
1587  * @param[out] error
1588  *   Pointer to error structure.
1589  *
1590  * @return
1591  *   0 on success, a negative errno value otherwise and rte_errno is set.
1592  */
1593 static int
1594 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1595                                   uint64_t item_flags,
1596                                   const struct rte_flow_action *action,
1597                                   const struct rte_flow_attr *attr,
1598                                   struct rte_flow_error *error)
1599 {
1600         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1601
1602         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1603             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1604                 return rte_flow_error_set(error, EINVAL,
1605                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1606                                           "invalid vlan ethertype");
1607         if (action_flags &
1608                 (MLX5_FLOW_ACTION_OF_POP_VLAN | MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1609                 return rte_flow_error_set(error, ENOTSUP,
1610                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1611                                           "no support for multiple VLAN "
1612                                           "actions");
1613         if (!mlx5_flow_find_action
1614                         (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) &&
1615             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1616                 return rte_flow_error_set(error, ENOTSUP,
1617                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
1618                                 "push VLAN needs to match on VLAN in order to "
1619                                 "get VLAN VID information because there is "
1620                                 "no followed set VLAN VID action");
1621         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1622                 return rte_flow_error_set(error, EINVAL,
1623                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1624                                           "wrong action order, port_id should "
1625                                           "be after push VLAN");
1626         (void)attr;
1627         return 0;
1628 }
1629
1630 /**
1631  * Validate the set VLAN PCP.
1632  *
1633  * @param[in] action_flags
1634  *   Holds the actions detected until now.
1635  * @param[in] actions
1636  *   Pointer to the list of actions remaining in the flow rule.
1637  * @param[in] attr
1638  *   Pointer to flow attributes
1639  * @param[out] error
1640  *   Pointer to error structure.
1641  *
1642  * @return
1643  *   0 on success, a negative errno value otherwise and rte_errno is set.
1644  */
1645 static int
1646 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1647                                      const struct rte_flow_action actions[],
1648                                      struct rte_flow_error *error)
1649 {
1650         const struct rte_flow_action *action = actions;
1651         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1652
1653         if (conf->vlan_pcp > 7)
1654                 return rte_flow_error_set(error, EINVAL,
1655                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1656                                           "VLAN PCP value is too big");
1657         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1658                 return rte_flow_error_set(error, ENOTSUP,
1659                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1660                                           "set VLAN PCP action must follow "
1661                                           "the push VLAN action");
1662         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1663                 return rte_flow_error_set(error, ENOTSUP,
1664                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1665                                           "Multiple VLAN PCP modification are "
1666                                           "not supported");
1667         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1668                 return rte_flow_error_set(error, EINVAL,
1669                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1670                                           "wrong action order, port_id should "
1671                                           "be after set VLAN PCP");
1672         return 0;
1673 }
1674
1675 /**
1676  * Validate the set VLAN VID.
1677  *
1678  * @param[in] item_flags
1679  *   Holds the items detected in this rule.
1680  * @param[in] actions
1681  *   Pointer to the list of actions remaining in the flow rule.
1682  * @param[in] attr
1683  *   Pointer to flow attributes
1684  * @param[out] error
1685  *   Pointer to error structure.
1686  *
1687  * @return
1688  *   0 on success, a negative errno value otherwise and rte_errno is set.
1689  */
1690 static int
1691 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1692                                      uint64_t action_flags,
1693                                      const struct rte_flow_action actions[],
1694                                      struct rte_flow_error *error)
1695 {
1696         const struct rte_flow_action *action = actions;
1697         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1698
1699         if (conf->vlan_vid > RTE_BE16(0xFFE))
1700                 return rte_flow_error_set(error, EINVAL,
1701                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1702                                           "VLAN VID value is too big");
1703         /* there is an of_push_vlan action before us */
1704         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1705                 if (mlx5_flow_find_action(actions + 1,
1706                                           RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1707                         return rte_flow_error_set(error, ENOTSUP,
1708                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
1709                                         "Multiple VLAN VID modifications are "
1710                                         "not supported");
1711                 else
1712                         return 0;
1713         }
1714
1715         /*
1716          * Action is on an existing VLAN header:
1717          *    Need to verify this is a single modify CID action.
1718          *   Rule mast include a match on outer VLAN.
1719          */
1720         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1721                 return rte_flow_error_set(error, ENOTSUP,
1722                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1723                                           "Multiple VLAN VID modifications are "
1724                                           "not supported");
1725         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1726                 return rte_flow_error_set(error, EINVAL,
1727                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1728                                           "match on VLAN is required in order "
1729                                           "to set VLAN VID");
1730         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1731                 return rte_flow_error_set(error, EINVAL,
1732                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1733                                           "wrong action order, port_id should "
1734                                           "be after set VLAN VID");
1735         return 0;
1736 }
1737
1738 /*
1739  * Validate the FLAG action.
1740  *
1741  * @param[in] dev
1742  *   Pointer to the rte_eth_dev structure.
1743  * @param[in] action_flags
1744  *   Holds the actions detected until now.
1745  * @param[in] attr
1746  *   Pointer to flow attributes
1747  * @param[out] error
1748  *   Pointer to error structure.
1749  *
1750  * @return
1751  *   0 on success, a negative errno value otherwise and rte_errno is set.
1752  */
1753 static int
1754 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1755                              uint64_t action_flags,
1756                              const struct rte_flow_attr *attr,
1757                              struct rte_flow_error *error)
1758 {
1759         struct mlx5_priv *priv = dev->data->dev_private;
1760         struct mlx5_dev_config *config = &priv->config;
1761         int ret;
1762
1763         /* Fall back if no extended metadata register support. */
1764         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1765                 return mlx5_flow_validate_action_flag(action_flags, attr,
1766                                                       error);
1767         /* Extensive metadata mode requires registers. */
1768         if (!mlx5_flow_ext_mreg_supported(dev))
1769                 return rte_flow_error_set(error, ENOTSUP,
1770                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1771                                           "no metadata registers "
1772                                           "to support flag action");
1773         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1774                 return rte_flow_error_set(error, ENOTSUP,
1775                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1776                                           "extended metadata register"
1777                                           " isn't available");
1778         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1779         if (ret < 0)
1780                 return ret;
1781         assert(ret > 0);
1782         if (action_flags & MLX5_FLOW_ACTION_DROP)
1783                 return rte_flow_error_set(error, EINVAL,
1784                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1785                                           "can't drop and flag in same flow");
1786         if (action_flags & MLX5_FLOW_ACTION_MARK)
1787                 return rte_flow_error_set(error, EINVAL,
1788                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1789                                           "can't mark and flag in same flow");
1790         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1791                 return rte_flow_error_set(error, EINVAL,
1792                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1793                                           "can't have 2 flag"
1794                                           " actions in same flow");
1795         return 0;
1796 }
1797
1798 /**
1799  * Validate MARK action.
1800  *
1801  * @param[in] dev
1802  *   Pointer to the rte_eth_dev structure.
1803  * @param[in] action
1804  *   Pointer to action.
1805  * @param[in] action_flags
1806  *   Holds the actions detected until now.
1807  * @param[in] attr
1808  *   Pointer to flow attributes
1809  * @param[out] error
1810  *   Pointer to error structure.
1811  *
1812  * @return
1813  *   0 on success, a negative errno value otherwise and rte_errno is set.
1814  */
1815 static int
1816 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1817                              const struct rte_flow_action *action,
1818                              uint64_t action_flags,
1819                              const struct rte_flow_attr *attr,
1820                              struct rte_flow_error *error)
1821 {
1822         struct mlx5_priv *priv = dev->data->dev_private;
1823         struct mlx5_dev_config *config = &priv->config;
1824         const struct rte_flow_action_mark *mark = action->conf;
1825         int ret;
1826
1827         /* Fall back if no extended metadata register support. */
1828         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1829                 return mlx5_flow_validate_action_mark(action, action_flags,
1830                                                       attr, error);
1831         /* Extensive metadata mode requires registers. */
1832         if (!mlx5_flow_ext_mreg_supported(dev))
1833                 return rte_flow_error_set(error, ENOTSUP,
1834                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1835                                           "no metadata registers "
1836                                           "to support mark action");
1837         if (!priv->sh->dv_mark_mask)
1838                 return rte_flow_error_set(error, ENOTSUP,
1839                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1840                                           "extended metadata register"
1841                                           " isn't available");
1842         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1843         if (ret < 0)
1844                 return ret;
1845         assert(ret > 0);
1846         if (!mark)
1847                 return rte_flow_error_set(error, EINVAL,
1848                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1849                                           "configuration cannot be null");
1850         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1851                 return rte_flow_error_set(error, EINVAL,
1852                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1853                                           &mark->id,
1854                                           "mark id exceeds the limit");
1855         if (action_flags & MLX5_FLOW_ACTION_DROP)
1856                 return rte_flow_error_set(error, EINVAL,
1857                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1858                                           "can't drop and mark in same flow");
1859         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1860                 return rte_flow_error_set(error, EINVAL,
1861                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1862                                           "can't flag and mark in same flow");
1863         if (action_flags & MLX5_FLOW_ACTION_MARK)
1864                 return rte_flow_error_set(error, EINVAL,
1865                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1866                                           "can't have 2 mark actions in same"
1867                                           " flow");
1868         return 0;
1869 }
1870
1871 /**
1872  * Validate SET_META action.
1873  *
1874  * @param[in] dev
1875  *   Pointer to the rte_eth_dev structure.
1876  * @param[in] action
1877  *   Pointer to the encap action.
1878  * @param[in] action_flags
1879  *   Holds the actions detected until now.
1880  * @param[in] attr
1881  *   Pointer to flow attributes
1882  * @param[out] error
1883  *   Pointer to error structure.
1884  *
1885  * @return
1886  *   0 on success, a negative errno value otherwise and rte_errno is set.
1887  */
1888 static int
1889 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
1890                                  const struct rte_flow_action *action,
1891                                  uint64_t action_flags __rte_unused,
1892                                  const struct rte_flow_attr *attr,
1893                                  struct rte_flow_error *error)
1894 {
1895         const struct rte_flow_action_set_meta *conf;
1896         uint32_t nic_mask = UINT32_MAX;
1897         enum modify_reg reg;
1898
1899         if (!mlx5_flow_ext_mreg_supported(dev))
1900                 return rte_flow_error_set(error, ENOTSUP,
1901                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1902                                           "extended metadata register"
1903                                           " isn't supported");
1904         reg = flow_dv_get_metadata_reg(dev, attr, error);
1905         if (reg < 0)
1906                 return reg;
1907         if (reg != REG_A && reg != REG_B) {
1908                 struct mlx5_priv *priv = dev->data->dev_private;
1909
1910                 nic_mask = priv->sh->dv_meta_mask;
1911         }
1912         if (!(action->conf))
1913                 return rte_flow_error_set(error, EINVAL,
1914                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1915                                           "configuration cannot be null");
1916         conf = (const struct rte_flow_action_set_meta *)action->conf;
1917         if (!conf->mask)
1918                 return rte_flow_error_set(error, EINVAL,
1919                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1920                                           "zero mask doesn't have any effect");
1921         if (conf->mask & ~nic_mask)
1922                 return rte_flow_error_set(error, EINVAL,
1923                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1924                                           "meta data must be within reg C0");
1925         if (!(conf->data & conf->mask))
1926                 return rte_flow_error_set(error, EINVAL,
1927                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1928                                           "zero value has no effect");
1929         return 0;
1930 }
1931
1932 /**
1933  * Validate SET_TAG action.
1934  *
1935  * @param[in] dev
1936  *   Pointer to the rte_eth_dev structure.
1937  * @param[in] action
1938  *   Pointer to the encap action.
1939  * @param[in] action_flags
1940  *   Holds the actions detected until now.
1941  * @param[in] attr
1942  *   Pointer to flow attributes
1943  * @param[out] error
1944  *   Pointer to error structure.
1945  *
1946  * @return
1947  *   0 on success, a negative errno value otherwise and rte_errno is set.
1948  */
1949 static int
1950 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
1951                                 const struct rte_flow_action *action,
1952                                 uint64_t action_flags,
1953                                 const struct rte_flow_attr *attr,
1954                                 struct rte_flow_error *error)
1955 {
1956         const struct rte_flow_action_set_tag *conf;
1957         const uint64_t terminal_action_flags =
1958                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
1959                 MLX5_FLOW_ACTION_RSS;
1960         int ret;
1961
1962         if (!mlx5_flow_ext_mreg_supported(dev))
1963                 return rte_flow_error_set(error, ENOTSUP,
1964                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1965                                           "extensive metadata register"
1966                                           " isn't supported");
1967         if (!(action->conf))
1968                 return rte_flow_error_set(error, EINVAL,
1969                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1970                                           "configuration cannot be null");
1971         conf = (const struct rte_flow_action_set_tag *)action->conf;
1972         if (!conf->mask)
1973                 return rte_flow_error_set(error, EINVAL,
1974                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1975                                           "zero mask doesn't have any effect");
1976         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1977         if (ret < 0)
1978                 return ret;
1979         if (!attr->transfer && attr->ingress &&
1980             (action_flags & terminal_action_flags))
1981                 return rte_flow_error_set(error, EINVAL,
1982                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1983                                           "set_tag has no effect"
1984                                           " with terminal actions");
1985         return 0;
1986 }
1987
1988 /**
1989  * Validate count action.
1990  *
1991  * @param[in] dev
1992  *   device otr.
1993  * @param[out] error
1994  *   Pointer to error structure.
1995  *
1996  * @return
1997  *   0 on success, a negative errno value otherwise and rte_errno is set.
1998  */
1999 static int
2000 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2001                               struct rte_flow_error *error)
2002 {
2003         struct mlx5_priv *priv = dev->data->dev_private;
2004
2005         if (!priv->config.devx)
2006                 goto notsup_err;
2007 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2008         return 0;
2009 #endif
2010 notsup_err:
2011         return rte_flow_error_set
2012                       (error, ENOTSUP,
2013                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2014                        NULL,
2015                        "count action not supported");
2016 }
2017
2018 /**
2019  * Validate the L2 encap action.
2020  *
2021  * @param[in] action_flags
2022  *   Holds the actions detected until now.
2023  * @param[in] action
2024  *   Pointer to the encap action.
2025  * @param[in] attr
2026  *   Pointer to flow attributes
2027  * @param[out] error
2028  *   Pointer to error structure.
2029  *
2030  * @return
2031  *   0 on success, a negative errno value otherwise and rte_errno is set.
2032  */
2033 static int
2034 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2035                                  const struct rte_flow_action *action,
2036                                  const struct rte_flow_attr *attr,
2037                                  struct rte_flow_error *error)
2038 {
2039         if (!(action->conf))
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2042                                           "configuration cannot be null");
2043         if (action_flags & MLX5_FLOW_ACTION_DROP)
2044                 return rte_flow_error_set(error, EINVAL,
2045                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2046                                           "can't drop and encap in same flow");
2047         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2048                 return rte_flow_error_set(error, EINVAL,
2049                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2050                                           "can only have a single encap or"
2051                                           " decap action in a flow");
2052         if (!attr->transfer && attr->ingress)
2053                 return rte_flow_error_set(error, ENOTSUP,
2054                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2055                                           NULL,
2056                                           "encap action not supported for "
2057                                           "ingress");
2058         return 0;
2059 }
2060
2061 /**
2062  * Validate the L2 decap action.
2063  *
2064  * @param[in] action_flags
2065  *   Holds the actions detected until now.
2066  * @param[in] attr
2067  *   Pointer to flow attributes
2068  * @param[out] error
2069  *   Pointer to error structure.
2070  *
2071  * @return
2072  *   0 on success, a negative errno value otherwise and rte_errno is set.
2073  */
2074 static int
2075 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2076                                  const struct rte_flow_attr *attr,
2077                                  struct rte_flow_error *error)
2078 {
2079         if (action_flags & MLX5_FLOW_ACTION_DROP)
2080                 return rte_flow_error_set(error, EINVAL,
2081                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2082                                           "can't drop and decap in same flow");
2083         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2084                 return rte_flow_error_set(error, EINVAL,
2085                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2086                                           "can only have a single encap or"
2087                                           " decap action in a flow");
2088         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2089                 return rte_flow_error_set(error, EINVAL,
2090                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2091                                           "can't have decap action after"
2092                                           " modify action");
2093         if (attr->egress)
2094                 return rte_flow_error_set(error, ENOTSUP,
2095                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2096                                           NULL,
2097                                           "decap action not supported for "
2098                                           "egress");
2099         return 0;
2100 }
2101
2102 /**
2103  * Validate the raw encap action.
2104  *
2105  * @param[in] action_flags
2106  *   Holds the actions detected until now.
2107  * @param[in] action
2108  *   Pointer to the encap action.
2109  * @param[in] attr
2110  *   Pointer to flow attributes
2111  * @param[out] error
2112  *   Pointer to error structure.
2113  *
2114  * @return
2115  *   0 on success, a negative errno value otherwise and rte_errno is set.
2116  */
2117 static int
2118 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2119                                   const struct rte_flow_action *action,
2120                                   const struct rte_flow_attr *attr,
2121                                   struct rte_flow_error *error)
2122 {
2123         const struct rte_flow_action_raw_encap *raw_encap =
2124                 (const struct rte_flow_action_raw_encap *)action->conf;
2125         if (!(action->conf))
2126                 return rte_flow_error_set(error, EINVAL,
2127                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2128                                           "configuration cannot be null");
2129         if (action_flags & MLX5_FLOW_ACTION_DROP)
2130                 return rte_flow_error_set(error, EINVAL,
2131                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2132                                           "can't drop and encap in same flow");
2133         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2134                 return rte_flow_error_set(error, EINVAL,
2135                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2136                                           "can only have a single encap"
2137                                           " action in a flow");
2138         /* encap without preceding decap is not supported for ingress */
2139         if (!attr->transfer &&  attr->ingress &&
2140             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2141                 return rte_flow_error_set(error, ENOTSUP,
2142                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2143                                           NULL,
2144                                           "encap action not supported for "
2145                                           "ingress");
2146         if (!raw_encap->size || !raw_encap->data)
2147                 return rte_flow_error_set(error, EINVAL,
2148                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2149                                           "raw encap data cannot be empty");
2150         return 0;
2151 }
2152
2153 /**
2154  * Validate the raw decap action.
2155  *
2156  * @param[in] action_flags
2157  *   Holds the actions detected until now.
2158  * @param[in] action
2159  *   Pointer to the encap action.
2160  * @param[in] attr
2161  *   Pointer to flow attributes
2162  * @param[out] error
2163  *   Pointer to error structure.
2164  *
2165  * @return
2166  *   0 on success, a negative errno value otherwise and rte_errno is set.
2167  */
2168 static int
2169 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2170                                   const struct rte_flow_action *action,
2171                                   const struct rte_flow_attr *attr,
2172                                   struct rte_flow_error *error)
2173 {
2174         if (action_flags & MLX5_FLOW_ACTION_DROP)
2175                 return rte_flow_error_set(error, EINVAL,
2176                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2177                                           "can't drop and decap in same flow");
2178         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2179                 return rte_flow_error_set(error, EINVAL,
2180                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2181                                           "can't have encap action before"
2182                                           " decap action");
2183         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2184                 return rte_flow_error_set(error, EINVAL,
2185                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2186                                           "can only have a single decap"
2187                                           " action in a flow");
2188         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2189                 return rte_flow_error_set(error, EINVAL,
2190                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2191                                           "can't have decap action after"
2192                                           " modify action");
2193         /* decap action is valid on egress only if it is followed by encap */
2194         if (attr->egress) {
2195                 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
2196                        action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
2197                        action++) {
2198                 }
2199                 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
2200                         return rte_flow_error_set
2201                                         (error, ENOTSUP,
2202                                          RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2203                                          NULL, "decap action not supported"
2204                                          " for egress");
2205         }
2206         return 0;
2207 }
2208
2209 /**
2210  * Find existing encap/decap resource or create and register a new one.
2211  *
2212  * @param dev[in, out]
2213  *   Pointer to rte_eth_dev structure.
2214  * @param[in, out] resource
2215  *   Pointer to encap/decap resource.
2216  * @parm[in, out] dev_flow
2217  *   Pointer to the dev_flow.
2218  * @param[out] error
2219  *   pointer to error structure.
2220  *
2221  * @return
2222  *   0 on success otherwise -errno and errno is set.
2223  */
2224 static int
2225 flow_dv_encap_decap_resource_register
2226                         (struct rte_eth_dev *dev,
2227                          struct mlx5_flow_dv_encap_decap_resource *resource,
2228                          struct mlx5_flow *dev_flow,
2229                          struct rte_flow_error *error)
2230 {
2231         struct mlx5_priv *priv = dev->data->dev_private;
2232         struct mlx5_ibv_shared *sh = priv->sh;
2233         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2234         struct mlx5dv_dr_domain *domain;
2235
2236         resource->flags = dev_flow->group ? 0 : 1;
2237         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2238                 domain = sh->fdb_domain;
2239         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2240                 domain = sh->rx_domain;
2241         else
2242                 domain = sh->tx_domain;
2243
2244         /* Lookup a matching resource from cache. */
2245         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2246                 if (resource->reformat_type == cache_resource->reformat_type &&
2247                     resource->ft_type == cache_resource->ft_type &&
2248                     resource->flags == cache_resource->flags &&
2249                     resource->size == cache_resource->size &&
2250                     !memcmp((const void *)resource->buf,
2251                             (const void *)cache_resource->buf,
2252                             resource->size)) {
2253                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2254                                 (void *)cache_resource,
2255                                 rte_atomic32_read(&cache_resource->refcnt));
2256                         rte_atomic32_inc(&cache_resource->refcnt);
2257                         dev_flow->dv.encap_decap = cache_resource;
2258                         return 0;
2259                 }
2260         }
2261         /* Register new encap/decap resource. */
2262         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2263         if (!cache_resource)
2264                 return rte_flow_error_set(error, ENOMEM,
2265                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2266                                           "cannot allocate resource memory");
2267         *cache_resource = *resource;
2268         cache_resource->verbs_action =
2269                 mlx5_glue->dv_create_flow_action_packet_reformat
2270                         (sh->ctx, cache_resource->reformat_type,
2271                          cache_resource->ft_type, domain, cache_resource->flags,
2272                          cache_resource->size,
2273                          (cache_resource->size ? cache_resource->buf : NULL));
2274         if (!cache_resource->verbs_action) {
2275                 rte_free(cache_resource);
2276                 return rte_flow_error_set(error, ENOMEM,
2277                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2278                                           NULL, "cannot create action");
2279         }
2280         rte_atomic32_init(&cache_resource->refcnt);
2281         rte_atomic32_inc(&cache_resource->refcnt);
2282         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2283         dev_flow->dv.encap_decap = cache_resource;
2284         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2285                 (void *)cache_resource,
2286                 rte_atomic32_read(&cache_resource->refcnt));
2287         return 0;
2288 }
2289
2290 /**
2291  * Find existing table jump resource or create and register a new one.
2292  *
2293  * @param dev[in, out]
2294  *   Pointer to rte_eth_dev structure.
2295  * @param[in, out] resource
2296  *   Pointer to jump table resource.
2297  * @parm[in, out] dev_flow
2298  *   Pointer to the dev_flow.
2299  * @param[out] error
2300  *   pointer to error structure.
2301  *
2302  * @return
2303  *   0 on success otherwise -errno and errno is set.
2304  */
2305 static int
2306 flow_dv_jump_tbl_resource_register
2307                         (struct rte_eth_dev *dev,
2308                          struct mlx5_flow_dv_jump_tbl_resource *resource,
2309                          struct mlx5_flow *dev_flow,
2310                          struct rte_flow_error *error)
2311 {
2312         struct mlx5_priv *priv = dev->data->dev_private;
2313         struct mlx5_ibv_shared *sh = priv->sh;
2314         struct mlx5_flow_dv_jump_tbl_resource *cache_resource;
2315
2316         /* Lookup a matching resource from cache. */
2317         LIST_FOREACH(cache_resource, &sh->jump_tbl, next) {
2318                 if (resource->tbl == cache_resource->tbl) {
2319                         DRV_LOG(DEBUG, "jump table resource resource %p: refcnt %d++",
2320                                 (void *)cache_resource,
2321                                 rte_atomic32_read(&cache_resource->refcnt));
2322                         rte_atomic32_inc(&cache_resource->refcnt);
2323                         dev_flow->dv.jump = cache_resource;
2324                         return 0;
2325                 }
2326         }
2327         /* Register new jump table resource. */
2328         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2329         if (!cache_resource)
2330                 return rte_flow_error_set(error, ENOMEM,
2331                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2332                                           "cannot allocate resource memory");
2333         *cache_resource = *resource;
2334         cache_resource->action =
2335                 mlx5_glue->dr_create_flow_action_dest_flow_tbl
2336                 (resource->tbl->obj);
2337         if (!cache_resource->action) {
2338                 rte_free(cache_resource);
2339                 return rte_flow_error_set(error, ENOMEM,
2340                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2341                                           NULL, "cannot create action");
2342         }
2343         rte_atomic32_init(&cache_resource->refcnt);
2344         rte_atomic32_inc(&cache_resource->refcnt);
2345         LIST_INSERT_HEAD(&sh->jump_tbl, cache_resource, next);
2346         dev_flow->dv.jump = cache_resource;
2347         DRV_LOG(DEBUG, "new jump table  resource %p: refcnt %d++",
2348                 (void *)cache_resource,
2349                 rte_atomic32_read(&cache_resource->refcnt));
2350         return 0;
2351 }
2352
2353 /**
2354  * Find existing table port ID resource or create and register a new one.
2355  *
2356  * @param dev[in, out]
2357  *   Pointer to rte_eth_dev structure.
2358  * @param[in, out] resource
2359  *   Pointer to port ID action resource.
2360  * @parm[in, out] dev_flow
2361  *   Pointer to the dev_flow.
2362  * @param[out] error
2363  *   pointer to error structure.
2364  *
2365  * @return
2366  *   0 on success otherwise -errno and errno is set.
2367  */
2368 static int
2369 flow_dv_port_id_action_resource_register
2370                         (struct rte_eth_dev *dev,
2371                          struct mlx5_flow_dv_port_id_action_resource *resource,
2372                          struct mlx5_flow *dev_flow,
2373                          struct rte_flow_error *error)
2374 {
2375         struct mlx5_priv *priv = dev->data->dev_private;
2376         struct mlx5_ibv_shared *sh = priv->sh;
2377         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2378
2379         /* Lookup a matching resource from cache. */
2380         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2381                 if (resource->port_id == cache_resource->port_id) {
2382                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2383                                 "refcnt %d++",
2384                                 (void *)cache_resource,
2385                                 rte_atomic32_read(&cache_resource->refcnt));
2386                         rte_atomic32_inc(&cache_resource->refcnt);
2387                         dev_flow->dv.port_id_action = cache_resource;
2388                         return 0;
2389                 }
2390         }
2391         /* Register new port id action resource. */
2392         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2393         if (!cache_resource)
2394                 return rte_flow_error_set(error, ENOMEM,
2395                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2396                                           "cannot allocate resource memory");
2397         *cache_resource = *resource;
2398         cache_resource->action =
2399                 mlx5_glue->dr_create_flow_action_dest_vport
2400                         (priv->sh->fdb_domain, resource->port_id);
2401         if (!cache_resource->action) {
2402                 rte_free(cache_resource);
2403                 return rte_flow_error_set(error, ENOMEM,
2404                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2405                                           NULL, "cannot create action");
2406         }
2407         rte_atomic32_init(&cache_resource->refcnt);
2408         rte_atomic32_inc(&cache_resource->refcnt);
2409         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2410         dev_flow->dv.port_id_action = cache_resource;
2411         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2412                 (void *)cache_resource,
2413                 rte_atomic32_read(&cache_resource->refcnt));
2414         return 0;
2415 }
2416
2417 /**
2418  * Find existing push vlan resource or create and register a new one.
2419  *
2420  * @param dev[in, out]
2421  *   Pointer to rte_eth_dev structure.
2422  * @param[in, out] resource
2423  *   Pointer to port ID action resource.
2424  * @parm[in, out] dev_flow
2425  *   Pointer to the dev_flow.
2426  * @param[out] error
2427  *   pointer to error structure.
2428  *
2429  * @return
2430  *   0 on success otherwise -errno and errno is set.
2431  */
2432 static int
2433 flow_dv_push_vlan_action_resource_register
2434                        (struct rte_eth_dev *dev,
2435                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2436                         struct mlx5_flow *dev_flow,
2437                         struct rte_flow_error *error)
2438 {
2439         struct mlx5_priv *priv = dev->data->dev_private;
2440         struct mlx5_ibv_shared *sh = priv->sh;
2441         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2442         struct mlx5dv_dr_domain *domain;
2443
2444         /* Lookup a matching resource from cache. */
2445         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2446                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2447                     resource->ft_type == cache_resource->ft_type) {
2448                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2449                                 "refcnt %d++",
2450                                 (void *)cache_resource,
2451                                 rte_atomic32_read(&cache_resource->refcnt));
2452                         rte_atomic32_inc(&cache_resource->refcnt);
2453                         dev_flow->dv.push_vlan_res = cache_resource;
2454                         return 0;
2455                 }
2456         }
2457         /* Register new push_vlan action resource. */
2458         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2459         if (!cache_resource)
2460                 return rte_flow_error_set(error, ENOMEM,
2461                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2462                                           "cannot allocate resource memory");
2463         *cache_resource = *resource;
2464         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2465                 domain = sh->fdb_domain;
2466         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2467                 domain = sh->rx_domain;
2468         else
2469                 domain = sh->tx_domain;
2470         cache_resource->action =
2471                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2472                                                            resource->vlan_tag);
2473         if (!cache_resource->action) {
2474                 rte_free(cache_resource);
2475                 return rte_flow_error_set(error, ENOMEM,
2476                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2477                                           NULL, "cannot create action");
2478         }
2479         rte_atomic32_init(&cache_resource->refcnt);
2480         rte_atomic32_inc(&cache_resource->refcnt);
2481         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2482         dev_flow->dv.push_vlan_res = cache_resource;
2483         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2484                 (void *)cache_resource,
2485                 rte_atomic32_read(&cache_resource->refcnt));
2486         return 0;
2487 }
2488 /**
2489  * Get the size of specific rte_flow_item_type
2490  *
2491  * @param[in] item_type
2492  *   Tested rte_flow_item_type.
2493  *
2494  * @return
2495  *   sizeof struct item_type, 0 if void or irrelevant.
2496  */
2497 static size_t
2498 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2499 {
2500         size_t retval;
2501
2502         switch (item_type) {
2503         case RTE_FLOW_ITEM_TYPE_ETH:
2504                 retval = sizeof(struct rte_flow_item_eth);
2505                 break;
2506         case RTE_FLOW_ITEM_TYPE_VLAN:
2507                 retval = sizeof(struct rte_flow_item_vlan);
2508                 break;
2509         case RTE_FLOW_ITEM_TYPE_IPV4:
2510                 retval = sizeof(struct rte_flow_item_ipv4);
2511                 break;
2512         case RTE_FLOW_ITEM_TYPE_IPV6:
2513                 retval = sizeof(struct rte_flow_item_ipv6);
2514                 break;
2515         case RTE_FLOW_ITEM_TYPE_UDP:
2516                 retval = sizeof(struct rte_flow_item_udp);
2517                 break;
2518         case RTE_FLOW_ITEM_TYPE_TCP:
2519                 retval = sizeof(struct rte_flow_item_tcp);
2520                 break;
2521         case RTE_FLOW_ITEM_TYPE_VXLAN:
2522                 retval = sizeof(struct rte_flow_item_vxlan);
2523                 break;
2524         case RTE_FLOW_ITEM_TYPE_GRE:
2525                 retval = sizeof(struct rte_flow_item_gre);
2526                 break;
2527         case RTE_FLOW_ITEM_TYPE_NVGRE:
2528                 retval = sizeof(struct rte_flow_item_nvgre);
2529                 break;
2530         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2531                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2532                 break;
2533         case RTE_FLOW_ITEM_TYPE_MPLS:
2534                 retval = sizeof(struct rte_flow_item_mpls);
2535                 break;
2536         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2537         default:
2538                 retval = 0;
2539                 break;
2540         }
2541         return retval;
2542 }
2543
2544 #define MLX5_ENCAP_IPV4_VERSION         0x40
2545 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2546 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2547 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2548 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2549 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2550 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2551
2552 /**
2553  * Convert the encap action data from list of rte_flow_item to raw buffer
2554  *
2555  * @param[in] items
2556  *   Pointer to rte_flow_item objects list.
2557  * @param[out] buf
2558  *   Pointer to the output buffer.
2559  * @param[out] size
2560  *   Pointer to the output buffer size.
2561  * @param[out] error
2562  *   Pointer to the error structure.
2563  *
2564  * @return
2565  *   0 on success, a negative errno value otherwise and rte_errno is set.
2566  */
2567 static int
2568 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2569                            size_t *size, struct rte_flow_error *error)
2570 {
2571         struct rte_ether_hdr *eth = NULL;
2572         struct rte_vlan_hdr *vlan = NULL;
2573         struct rte_ipv4_hdr *ipv4 = NULL;
2574         struct rte_ipv6_hdr *ipv6 = NULL;
2575         struct rte_udp_hdr *udp = NULL;
2576         struct rte_vxlan_hdr *vxlan = NULL;
2577         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2578         struct rte_gre_hdr *gre = NULL;
2579         size_t len;
2580         size_t temp_size = 0;
2581
2582         if (!items)
2583                 return rte_flow_error_set(error, EINVAL,
2584                                           RTE_FLOW_ERROR_TYPE_ACTION,
2585                                           NULL, "invalid empty data");
2586         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2587                 len = flow_dv_get_item_len(items->type);
2588                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2589                         return rte_flow_error_set(error, EINVAL,
2590                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2591                                                   (void *)items->type,
2592                                                   "items total size is too big"
2593                                                   " for encap action");
2594                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2595                 switch (items->type) {
2596                 case RTE_FLOW_ITEM_TYPE_ETH:
2597                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2598                         break;
2599                 case RTE_FLOW_ITEM_TYPE_VLAN:
2600                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2601                         if (!eth)
2602                                 return rte_flow_error_set(error, EINVAL,
2603                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2604                                                 (void *)items->type,
2605                                                 "eth header not found");
2606                         if (!eth->ether_type)
2607                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2608                         break;
2609                 case RTE_FLOW_ITEM_TYPE_IPV4:
2610                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2611                         if (!vlan && !eth)
2612                                 return rte_flow_error_set(error, EINVAL,
2613                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2614                                                 (void *)items->type,
2615                                                 "neither eth nor vlan"
2616                                                 " header found");
2617                         if (vlan && !vlan->eth_proto)
2618                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2619                         else if (eth && !eth->ether_type)
2620                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2621                         if (!ipv4->version_ihl)
2622                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2623                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2624                         if (!ipv4->time_to_live)
2625                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2626                         break;
2627                 case RTE_FLOW_ITEM_TYPE_IPV6:
2628                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2629                         if (!vlan && !eth)
2630                                 return rte_flow_error_set(error, EINVAL,
2631                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2632                                                 (void *)items->type,
2633                                                 "neither eth nor vlan"
2634                                                 " header found");
2635                         if (vlan && !vlan->eth_proto)
2636                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2637                         else if (eth && !eth->ether_type)
2638                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2639                         if (!ipv6->vtc_flow)
2640                                 ipv6->vtc_flow =
2641                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2642                         if (!ipv6->hop_limits)
2643                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2644                         break;
2645                 case RTE_FLOW_ITEM_TYPE_UDP:
2646                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2647                         if (!ipv4 && !ipv6)
2648                                 return rte_flow_error_set(error, EINVAL,
2649                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2650                                                 (void *)items->type,
2651                                                 "ip header not found");
2652                         if (ipv4 && !ipv4->next_proto_id)
2653                                 ipv4->next_proto_id = IPPROTO_UDP;
2654                         else if (ipv6 && !ipv6->proto)
2655                                 ipv6->proto = IPPROTO_UDP;
2656                         break;
2657                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2658                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2659                         if (!udp)
2660                                 return rte_flow_error_set(error, EINVAL,
2661                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2662                                                 (void *)items->type,
2663                                                 "udp header not found");
2664                         if (!udp->dst_port)
2665                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2666                         if (!vxlan->vx_flags)
2667                                 vxlan->vx_flags =
2668                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2669                         break;
2670                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2671                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2672                         if (!udp)
2673                                 return rte_flow_error_set(error, EINVAL,
2674                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2675                                                 (void *)items->type,
2676                                                 "udp header not found");
2677                         if (!vxlan_gpe->proto)
2678                                 return rte_flow_error_set(error, EINVAL,
2679                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2680                                                 (void *)items->type,
2681                                                 "next protocol not found");
2682                         if (!udp->dst_port)
2683                                 udp->dst_port =
2684                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2685                         if (!vxlan_gpe->vx_flags)
2686                                 vxlan_gpe->vx_flags =
2687                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2688                         break;
2689                 case RTE_FLOW_ITEM_TYPE_GRE:
2690                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2691                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2692                         if (!gre->proto)
2693                                 return rte_flow_error_set(error, EINVAL,
2694                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2695                                                 (void *)items->type,
2696                                                 "next protocol not found");
2697                         if (!ipv4 && !ipv6)
2698                                 return rte_flow_error_set(error, EINVAL,
2699                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2700                                                 (void *)items->type,
2701                                                 "ip header not found");
2702                         if (ipv4 && !ipv4->next_proto_id)
2703                                 ipv4->next_proto_id = IPPROTO_GRE;
2704                         else if (ipv6 && !ipv6->proto)
2705                                 ipv6->proto = IPPROTO_GRE;
2706                         break;
2707                 case RTE_FLOW_ITEM_TYPE_VOID:
2708                         break;
2709                 default:
2710                         return rte_flow_error_set(error, EINVAL,
2711                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2712                                                   (void *)items->type,
2713                                                   "unsupported item type");
2714                         break;
2715                 }
2716                 temp_size += len;
2717         }
2718         *size = temp_size;
2719         return 0;
2720 }
2721
2722 static int
2723 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2724 {
2725         struct rte_ether_hdr *eth = NULL;
2726         struct rte_vlan_hdr *vlan = NULL;
2727         struct rte_ipv6_hdr *ipv6 = NULL;
2728         struct rte_udp_hdr *udp = NULL;
2729         char *next_hdr;
2730         uint16_t proto;
2731
2732         eth = (struct rte_ether_hdr *)data;
2733         next_hdr = (char *)(eth + 1);
2734         proto = RTE_BE16(eth->ether_type);
2735
2736         /* VLAN skipping */
2737         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2738                 vlan = (struct rte_vlan_hdr *)next_hdr;
2739                 proto = RTE_BE16(vlan->eth_proto);
2740                 next_hdr += sizeof(struct rte_vlan_hdr);
2741         }
2742
2743         /* HW calculates IPv4 csum. no need to proceed */
2744         if (proto == RTE_ETHER_TYPE_IPV4)
2745                 return 0;
2746
2747         /* non IPv4/IPv6 header. not supported */
2748         if (proto != RTE_ETHER_TYPE_IPV6) {
2749                 return rte_flow_error_set(error, ENOTSUP,
2750                                           RTE_FLOW_ERROR_TYPE_ACTION,
2751                                           NULL, "Cannot offload non IPv4/IPv6");
2752         }
2753
2754         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2755
2756         /* ignore non UDP */
2757         if (ipv6->proto != IPPROTO_UDP)
2758                 return 0;
2759
2760         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2761         udp->dgram_cksum = 0;
2762
2763         return 0;
2764 }
2765
2766 /**
2767  * Convert L2 encap action to DV specification.
2768  *
2769  * @param[in] dev
2770  *   Pointer to rte_eth_dev structure.
2771  * @param[in] action
2772  *   Pointer to action structure.
2773  * @param[in, out] dev_flow
2774  *   Pointer to the mlx5_flow.
2775  * @param[in] transfer
2776  *   Mark if the flow is E-Switch flow.
2777  * @param[out] error
2778  *   Pointer to the error structure.
2779  *
2780  * @return
2781  *   0 on success, a negative errno value otherwise and rte_errno is set.
2782  */
2783 static int
2784 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2785                                const struct rte_flow_action *action,
2786                                struct mlx5_flow *dev_flow,
2787                                uint8_t transfer,
2788                                struct rte_flow_error *error)
2789 {
2790         const struct rte_flow_item *encap_data;
2791         const struct rte_flow_action_raw_encap *raw_encap_data;
2792         struct mlx5_flow_dv_encap_decap_resource res = {
2793                 .reformat_type =
2794                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2795                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2796                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2797         };
2798
2799         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2800                 raw_encap_data =
2801                         (const struct rte_flow_action_raw_encap *)action->conf;
2802                 res.size = raw_encap_data->size;
2803                 memcpy(res.buf, raw_encap_data->data, res.size);
2804                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2805                         return -rte_errno;
2806         } else {
2807                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2808                         encap_data =
2809                                 ((const struct rte_flow_action_vxlan_encap *)
2810                                                 action->conf)->definition;
2811                 else
2812                         encap_data =
2813                                 ((const struct rte_flow_action_nvgre_encap *)
2814                                                 action->conf)->definition;
2815                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2816                                                &res.size, error))
2817                         return -rte_errno;
2818         }
2819         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2820                 return rte_flow_error_set(error, EINVAL,
2821                                           RTE_FLOW_ERROR_TYPE_ACTION,
2822                                           NULL, "can't create L2 encap action");
2823         return 0;
2824 }
2825
2826 /**
2827  * Convert L2 decap action to DV specification.
2828  *
2829  * @param[in] dev
2830  *   Pointer to rte_eth_dev structure.
2831  * @param[in, out] dev_flow
2832  *   Pointer to the mlx5_flow.
2833  * @param[in] transfer
2834  *   Mark if the flow is E-Switch flow.
2835  * @param[out] error
2836  *   Pointer to the error structure.
2837  *
2838  * @return
2839  *   0 on success, a negative errno value otherwise and rte_errno is set.
2840  */
2841 static int
2842 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2843                                struct mlx5_flow *dev_flow,
2844                                uint8_t transfer,
2845                                struct rte_flow_error *error)
2846 {
2847         struct mlx5_flow_dv_encap_decap_resource res = {
2848                 .size = 0,
2849                 .reformat_type =
2850                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2851                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2852                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2853         };
2854
2855         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2856                 return rte_flow_error_set(error, EINVAL,
2857                                           RTE_FLOW_ERROR_TYPE_ACTION,
2858                                           NULL, "can't create L2 decap action");
2859         return 0;
2860 }
2861
2862 /**
2863  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2864  *
2865  * @param[in] dev
2866  *   Pointer to rte_eth_dev structure.
2867  * @param[in] action
2868  *   Pointer to action structure.
2869  * @param[in, out] dev_flow
2870  *   Pointer to the mlx5_flow.
2871  * @param[in] attr
2872  *   Pointer to the flow attributes.
2873  * @param[out] error
2874  *   Pointer to the error structure.
2875  *
2876  * @return
2877  *   0 on success, a negative errno value otherwise and rte_errno is set.
2878  */
2879 static int
2880 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2881                                 const struct rte_flow_action *action,
2882                                 struct mlx5_flow *dev_flow,
2883                                 const struct rte_flow_attr *attr,
2884                                 struct rte_flow_error *error)
2885 {
2886         const struct rte_flow_action_raw_encap *encap_data;
2887         struct mlx5_flow_dv_encap_decap_resource res;
2888
2889         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2890         res.size = encap_data->size;
2891         memcpy(res.buf, encap_data->data, res.size);
2892         res.reformat_type = attr->egress ?
2893                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL :
2894                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
2895         if (attr->transfer)
2896                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2897         else
2898                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2899                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2900         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2901                 return rte_flow_error_set(error, EINVAL,
2902                                           RTE_FLOW_ERROR_TYPE_ACTION,
2903                                           NULL, "can't create encap action");
2904         return 0;
2905 }
2906
2907 /**
2908  * Create action push VLAN.
2909  *
2910  * @param[in] dev
2911  *   Pointer to rte_eth_dev structure.
2912  * @param[in] vlan_tag
2913  *   the vlan tag to push to the Ethernet header.
2914  * @param[in, out] dev_flow
2915  *   Pointer to the mlx5_flow.
2916  * @param[in] attr
2917  *   Pointer to the flow attributes.
2918  * @param[out] error
2919  *   Pointer to the error structure.
2920  *
2921  * @return
2922  *   0 on success, a negative errno value otherwise and rte_errno is set.
2923  */
2924 static int
2925 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
2926                                 const struct rte_flow_attr *attr,
2927                                 const struct rte_vlan_hdr *vlan,
2928                                 struct mlx5_flow *dev_flow,
2929                                 struct rte_flow_error *error)
2930 {
2931         struct mlx5_flow_dv_push_vlan_action_resource res;
2932
2933         res.vlan_tag =
2934                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
2935                                  vlan->vlan_tci);
2936         if (attr->transfer)
2937                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2938         else
2939                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2940                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2941         return flow_dv_push_vlan_action_resource_register
2942                                             (dev, &res, dev_flow, error);
2943 }
2944
2945 /**
2946  * Validate the modify-header actions.
2947  *
2948  * @param[in] action_flags
2949  *   Holds the actions detected until now.
2950  * @param[in] action
2951  *   Pointer to the modify action.
2952  * @param[out] error
2953  *   Pointer to error structure.
2954  *
2955  * @return
2956  *   0 on success, a negative errno value otherwise and rte_errno is set.
2957  */
2958 static int
2959 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
2960                                    const struct rte_flow_action *action,
2961                                    struct rte_flow_error *error)
2962 {
2963         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
2964                 return rte_flow_error_set(error, EINVAL,
2965                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2966                                           NULL, "action configuration not set");
2967         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2968                 return rte_flow_error_set(error, EINVAL,
2969                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2970                                           "can't have encap action before"
2971                                           " modify action");
2972         return 0;
2973 }
2974
2975 /**
2976  * Validate the modify-header MAC address actions.
2977  *
2978  * @param[in] action_flags
2979  *   Holds the actions detected until now.
2980  * @param[in] action
2981  *   Pointer to the modify action.
2982  * @param[in] item_flags
2983  *   Holds the items detected.
2984  * @param[out] error
2985  *   Pointer to error structure.
2986  *
2987  * @return
2988  *   0 on success, a negative errno value otherwise and rte_errno is set.
2989  */
2990 static int
2991 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
2992                                    const struct rte_flow_action *action,
2993                                    const uint64_t item_flags,
2994                                    struct rte_flow_error *error)
2995 {
2996         int ret = 0;
2997
2998         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2999         if (!ret) {
3000                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3001                         return rte_flow_error_set(error, EINVAL,
3002                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3003                                                   NULL,
3004                                                   "no L2 item in pattern");
3005         }
3006         return ret;
3007 }
3008
3009 /**
3010  * Validate the modify-header IPv4 address actions.
3011  *
3012  * @param[in] action_flags
3013  *   Holds the actions detected until now.
3014  * @param[in] action
3015  *   Pointer to the modify action.
3016  * @param[in] item_flags
3017  *   Holds the items detected.
3018  * @param[out] error
3019  *   Pointer to error structure.
3020  *
3021  * @return
3022  *   0 on success, a negative errno value otherwise and rte_errno is set.
3023  */
3024 static int
3025 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3026                                     const struct rte_flow_action *action,
3027                                     const uint64_t item_flags,
3028                                     struct rte_flow_error *error)
3029 {
3030         int ret = 0;
3031
3032         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3033         if (!ret) {
3034                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3035                         return rte_flow_error_set(error, EINVAL,
3036                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3037                                                   NULL,
3038                                                   "no ipv4 item in pattern");
3039         }
3040         return ret;
3041 }
3042
3043 /**
3044  * Validate the modify-header IPv6 address actions.
3045  *
3046  * @param[in] action_flags
3047  *   Holds the actions detected until now.
3048  * @param[in] action
3049  *   Pointer to the modify action.
3050  * @param[in] item_flags
3051  *   Holds the items detected.
3052  * @param[out] error
3053  *   Pointer to error structure.
3054  *
3055  * @return
3056  *   0 on success, a negative errno value otherwise and rte_errno is set.
3057  */
3058 static int
3059 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3060                                     const struct rte_flow_action *action,
3061                                     const uint64_t item_flags,
3062                                     struct rte_flow_error *error)
3063 {
3064         int ret = 0;
3065
3066         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3067         if (!ret) {
3068                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3069                         return rte_flow_error_set(error, EINVAL,
3070                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3071                                                   NULL,
3072                                                   "no ipv6 item in pattern");
3073         }
3074         return ret;
3075 }
3076
3077 /**
3078  * Validate the modify-header TP actions.
3079  *
3080  * @param[in] action_flags
3081  *   Holds the actions detected until now.
3082  * @param[in] action
3083  *   Pointer to the modify action.
3084  * @param[in] item_flags
3085  *   Holds the items detected.
3086  * @param[out] error
3087  *   Pointer to error structure.
3088  *
3089  * @return
3090  *   0 on success, a negative errno value otherwise and rte_errno is set.
3091  */
3092 static int
3093 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3094                                   const struct rte_flow_action *action,
3095                                   const uint64_t item_flags,
3096                                   struct rte_flow_error *error)
3097 {
3098         int ret = 0;
3099
3100         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3101         if (!ret) {
3102                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3103                         return rte_flow_error_set(error, EINVAL,
3104                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3105                                                   NULL, "no transport layer "
3106                                                   "in pattern");
3107         }
3108         return ret;
3109 }
3110
3111 /**
3112  * Validate the modify-header actions of increment/decrement
3113  * TCP Sequence-number.
3114  *
3115  * @param[in] action_flags
3116  *   Holds the actions detected until now.
3117  * @param[in] action
3118  *   Pointer to the modify action.
3119  * @param[in] item_flags
3120  *   Holds the items detected.
3121  * @param[out] error
3122  *   Pointer to error structure.
3123  *
3124  * @return
3125  *   0 on success, a negative errno value otherwise and rte_errno is set.
3126  */
3127 static int
3128 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3129                                        const struct rte_flow_action *action,
3130                                        const uint64_t item_flags,
3131                                        struct rte_flow_error *error)
3132 {
3133         int ret = 0;
3134
3135         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3136         if (!ret) {
3137                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3138                         return rte_flow_error_set(error, EINVAL,
3139                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3140                                                   NULL, "no TCP item in"
3141                                                   " pattern");
3142                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3143                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3144                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3145                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3146                         return rte_flow_error_set(error, EINVAL,
3147                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3148                                                   NULL,
3149                                                   "cannot decrease and increase"
3150                                                   " TCP sequence number"
3151                                                   " at the same time");
3152         }
3153         return ret;
3154 }
3155
3156 /**
3157  * Validate the modify-header actions of increment/decrement
3158  * TCP Acknowledgment number.
3159  *
3160  * @param[in] action_flags
3161  *   Holds the actions detected until now.
3162  * @param[in] action
3163  *   Pointer to the modify action.
3164  * @param[in] item_flags
3165  *   Holds the items detected.
3166  * @param[out] error
3167  *   Pointer to error structure.
3168  *
3169  * @return
3170  *   0 on success, a negative errno value otherwise and rte_errno is set.
3171  */
3172 static int
3173 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3174                                        const struct rte_flow_action *action,
3175                                        const uint64_t item_flags,
3176                                        struct rte_flow_error *error)
3177 {
3178         int ret = 0;
3179
3180         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3181         if (!ret) {
3182                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3183                         return rte_flow_error_set(error, EINVAL,
3184                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3185                                                   NULL, "no TCP item in"
3186                                                   " pattern");
3187                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3188                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3189                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3190                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3191                         return rte_flow_error_set(error, EINVAL,
3192                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3193                                                   NULL,
3194                                                   "cannot decrease and increase"
3195                                                   " TCP acknowledgment number"
3196                                                   " at the same time");
3197         }
3198         return ret;
3199 }
3200
3201 /**
3202  * Validate the modify-header TTL actions.
3203  *
3204  * @param[in] action_flags
3205  *   Holds the actions detected until now.
3206  * @param[in] action
3207  *   Pointer to the modify action.
3208  * @param[in] item_flags
3209  *   Holds the items detected.
3210  * @param[out] error
3211  *   Pointer to error structure.
3212  *
3213  * @return
3214  *   0 on success, a negative errno value otherwise and rte_errno is set.
3215  */
3216 static int
3217 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3218                                    const struct rte_flow_action *action,
3219                                    const uint64_t item_flags,
3220                                    struct rte_flow_error *error)
3221 {
3222         int ret = 0;
3223
3224         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3225         if (!ret) {
3226                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3227                         return rte_flow_error_set(error, EINVAL,
3228                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3229                                                   NULL,
3230                                                   "no IP protocol in pattern");
3231         }
3232         return ret;
3233 }
3234
3235 /**
3236  * Validate jump action.
3237  *
3238  * @param[in] action
3239  *   Pointer to the jump action.
3240  * @param[in] action_flags
3241  *   Holds the actions detected until now.
3242  * @param[in] attributes
3243  *   Pointer to flow attributes
3244  * @param[in] external
3245  *   Action belongs to flow rule created by request external to PMD.
3246  * @param[out] error
3247  *   Pointer to error structure.
3248  *
3249  * @return
3250  *   0 on success, a negative errno value otherwise and rte_errno is set.
3251  */
3252 static int
3253 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3254                              uint64_t action_flags,
3255                              const struct rte_flow_attr *attributes,
3256                              bool external, struct rte_flow_error *error)
3257 {
3258         uint32_t max_group = attributes->transfer ? MLX5_MAX_TABLES_FDB :
3259                                                     MLX5_MAX_TABLES;
3260         uint32_t target_group, table;
3261         int ret = 0;
3262
3263         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3264                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3265                 return rte_flow_error_set(error, EINVAL,
3266                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3267                                           "can't have 2 fate actions in"
3268                                           " same flow");
3269         if (!action->conf)
3270                 return rte_flow_error_set(error, EINVAL,
3271                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3272                                           NULL, "action configuration not set");
3273         target_group =
3274                 ((const struct rte_flow_action_jump *)action->conf)->group;
3275         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3276                                        &table, error);
3277         if (ret)
3278                 return ret;
3279         if (table >= max_group)
3280                 return rte_flow_error_set(error, EINVAL,
3281                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
3282                                           "target group index out of range");
3283         if (attributes->group == target_group)
3284                 return rte_flow_error_set(error, EINVAL,
3285                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3286                                           "target group must be other than"
3287                                           " the current flow group");
3288         return 0;
3289 }
3290
3291 /*
3292  * Validate the port_id action.
3293  *
3294  * @param[in] dev
3295  *   Pointer to rte_eth_dev structure.
3296  * @param[in] action_flags
3297  *   Bit-fields that holds the actions detected until now.
3298  * @param[in] action
3299  *   Port_id RTE action structure.
3300  * @param[in] attr
3301  *   Attributes of flow that includes this action.
3302  * @param[out] error
3303  *   Pointer to error structure.
3304  *
3305  * @return
3306  *   0 on success, a negative errno value otherwise and rte_errno is set.
3307  */
3308 static int
3309 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3310                                 uint64_t action_flags,
3311                                 const struct rte_flow_action *action,
3312                                 const struct rte_flow_attr *attr,
3313                                 struct rte_flow_error *error)
3314 {
3315         const struct rte_flow_action_port_id *port_id;
3316         struct mlx5_priv *act_priv;
3317         struct mlx5_priv *dev_priv;
3318         uint16_t port;
3319
3320         if (!attr->transfer)
3321                 return rte_flow_error_set(error, ENOTSUP,
3322                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3323                                           NULL,
3324                                           "port id action is valid in transfer"
3325                                           " mode only");
3326         if (!action || !action->conf)
3327                 return rte_flow_error_set(error, ENOTSUP,
3328                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3329                                           NULL,
3330                                           "port id action parameters must be"
3331                                           " specified");
3332         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3333                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3334                 return rte_flow_error_set(error, EINVAL,
3335                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3336                                           "can have only one fate actions in"
3337                                           " a flow");
3338         dev_priv = mlx5_dev_to_eswitch_info(dev);
3339         if (!dev_priv)
3340                 return rte_flow_error_set(error, rte_errno,
3341                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3342                                           NULL,
3343                                           "failed to obtain E-Switch info");
3344         port_id = action->conf;
3345         port = port_id->original ? dev->data->port_id : port_id->id;
3346         act_priv = mlx5_port_to_eswitch_info(port, false);
3347         if (!act_priv)
3348                 return rte_flow_error_set
3349                                 (error, rte_errno,
3350                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3351                                  "failed to obtain E-Switch port id for port");
3352         if (act_priv->domain_id != dev_priv->domain_id)
3353                 return rte_flow_error_set
3354                                 (error, EINVAL,
3355                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3356                                  "port does not belong to"
3357                                  " E-Switch being configured");
3358         return 0;
3359 }
3360
3361 /**
3362  * Get the maximum number of modify header actions.
3363  *
3364  * @param dev
3365  *   Pointer to rte_eth_dev structure.
3366  *
3367  * @return
3368  *   Max number of modify header actions device can support.
3369  */
3370 static unsigned int
3371 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev)
3372 {
3373         /*
3374          * There's no way to directly query the max cap. Although it has to be
3375          * acquried by iterative trial, it is a safe assumption that more
3376          * actions are supported by FW if extensive metadata register is
3377          * supported.
3378          */
3379         return mlx5_flow_ext_mreg_supported(dev) ? MLX5_MODIFY_NUM :
3380                                                    MLX5_MODIFY_NUM_NO_MREG;
3381 }
3382 /**
3383  * Find existing modify-header resource or create and register a new one.
3384  *
3385  * @param dev[in, out]
3386  *   Pointer to rte_eth_dev structure.
3387  * @param[in, out] resource
3388  *   Pointer to modify-header resource.
3389  * @parm[in, out] dev_flow
3390  *   Pointer to the dev_flow.
3391  * @param[out] error
3392  *   pointer to error structure.
3393  *
3394  * @return
3395  *   0 on success otherwise -errno and errno is set.
3396  */
3397 static int
3398 flow_dv_modify_hdr_resource_register
3399                         (struct rte_eth_dev *dev,
3400                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3401                          struct mlx5_flow *dev_flow,
3402                          struct rte_flow_error *error)
3403 {
3404         struct mlx5_priv *priv = dev->data->dev_private;
3405         struct mlx5_ibv_shared *sh = priv->sh;
3406         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3407         struct mlx5dv_dr_domain *ns;
3408
3409         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev))
3410                 return rte_flow_error_set(error, EOVERFLOW,
3411                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3412                                           "too many modify header items");
3413         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3414                 ns = sh->fdb_domain;
3415         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3416                 ns = sh->tx_domain;
3417         else
3418                 ns = sh->rx_domain;
3419         resource->flags =
3420                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3421         /* Lookup a matching resource from cache. */
3422         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3423                 if (resource->ft_type == cache_resource->ft_type &&
3424                     resource->actions_num == cache_resource->actions_num &&
3425                     resource->flags == cache_resource->flags &&
3426                     !memcmp((const void *)resource->actions,
3427                             (const void *)cache_resource->actions,
3428                             (resource->actions_num *
3429                                             sizeof(resource->actions[0])))) {
3430                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3431                                 (void *)cache_resource,
3432                                 rte_atomic32_read(&cache_resource->refcnt));
3433                         rte_atomic32_inc(&cache_resource->refcnt);
3434                         dev_flow->dv.modify_hdr = cache_resource;
3435                         return 0;
3436                 }
3437         }
3438         /* Register new modify-header resource. */
3439         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
3440         if (!cache_resource)
3441                 return rte_flow_error_set(error, ENOMEM,
3442                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3443                                           "cannot allocate resource memory");
3444         *cache_resource = *resource;
3445         cache_resource->verbs_action =
3446                 mlx5_glue->dv_create_flow_action_modify_header
3447                                         (sh->ctx, cache_resource->ft_type,
3448                                          ns, cache_resource->flags,
3449                                          cache_resource->actions_num *
3450                                          sizeof(cache_resource->actions[0]),
3451                                          (uint64_t *)cache_resource->actions);
3452         if (!cache_resource->verbs_action) {
3453                 rte_free(cache_resource);
3454                 return rte_flow_error_set(error, ENOMEM,
3455                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3456                                           NULL, "cannot create action");
3457         }
3458         rte_atomic32_init(&cache_resource->refcnt);
3459         rte_atomic32_inc(&cache_resource->refcnt);
3460         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3461         dev_flow->dv.modify_hdr = cache_resource;
3462         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3463                 (void *)cache_resource,
3464                 rte_atomic32_read(&cache_resource->refcnt));
3465         return 0;
3466 }
3467
3468 #define MLX5_CNT_CONTAINER_RESIZE 64
3469
3470 /**
3471  * Get or create a flow counter.
3472  *
3473  * @param[in] dev
3474  *   Pointer to the Ethernet device structure.
3475  * @param[in] shared
3476  *   Indicate if this counter is shared with other flows.
3477  * @param[in] id
3478  *   Counter identifier.
3479  *
3480  * @return
3481  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3482  */
3483 static struct mlx5_flow_counter *
3484 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3485                                uint32_t id)
3486 {
3487         struct mlx5_priv *priv = dev->data->dev_private;
3488         struct mlx5_flow_counter *cnt = NULL;
3489         struct mlx5_devx_obj *dcs = NULL;
3490
3491         if (!priv->config.devx) {
3492                 rte_errno = ENOTSUP;
3493                 return NULL;
3494         }
3495         if (shared) {
3496                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3497                         if (cnt->shared && cnt->id == id) {
3498                                 cnt->ref_cnt++;
3499                                 return cnt;
3500                         }
3501                 }
3502         }
3503         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3504         if (!dcs)
3505                 return NULL;
3506         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3507         if (!cnt) {
3508                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3509                 rte_errno = ENOMEM;
3510                 return NULL;
3511         }
3512         struct mlx5_flow_counter tmpl = {
3513                 .shared = shared,
3514                 .ref_cnt = 1,
3515                 .id = id,
3516                 .dcs = dcs,
3517         };
3518         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3519         if (!tmpl.action) {
3520                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3521                 rte_errno = errno;
3522                 rte_free(cnt);
3523                 return NULL;
3524         }
3525         *cnt = tmpl;
3526         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3527         return cnt;
3528 }
3529
3530 /**
3531  * Release a flow counter.
3532  *
3533  * @param[in] dev
3534  *   Pointer to the Ethernet device structure.
3535  * @param[in] counter
3536  *   Pointer to the counter handler.
3537  */
3538 static void
3539 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3540                                  struct mlx5_flow_counter *counter)
3541 {
3542         struct mlx5_priv *priv = dev->data->dev_private;
3543
3544         if (!counter)
3545                 return;
3546         if (--counter->ref_cnt == 0) {
3547                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3548                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3549                 rte_free(counter);
3550         }
3551 }
3552
3553 /**
3554  * Query a devx flow counter.
3555  *
3556  * @param[in] dev
3557  *   Pointer to the Ethernet device structure.
3558  * @param[in] cnt
3559  *   Pointer to the flow counter.
3560  * @param[out] pkts
3561  *   The statistics value of packets.
3562  * @param[out] bytes
3563  *   The statistics value of bytes.
3564  *
3565  * @return
3566  *   0 on success, otherwise a negative errno value and rte_errno is set.
3567  */
3568 static inline int
3569 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3570                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3571                      uint64_t *bytes)
3572 {
3573         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3574                                                 0, NULL, NULL, 0);
3575 }
3576
3577 /**
3578  * Get a pool by a counter.
3579  *
3580  * @param[in] cnt
3581  *   Pointer to the counter.
3582  *
3583  * @return
3584  *   The counter pool.
3585  */
3586 static struct mlx5_flow_counter_pool *
3587 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3588 {
3589         if (!cnt->batch) {
3590                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3591                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3592         }
3593         return cnt->pool;
3594 }
3595
3596 /**
3597  * Get a pool by devx counter ID.
3598  *
3599  * @param[in] cont
3600  *   Pointer to the counter container.
3601  * @param[in] id
3602  *   The counter devx ID.
3603  *
3604  * @return
3605  *   The counter pool pointer if exists, NULL otherwise,
3606  */
3607 static struct mlx5_flow_counter_pool *
3608 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3609 {
3610         struct mlx5_flow_counter_pool *pool;
3611
3612         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3613                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3614                                 MLX5_COUNTERS_PER_POOL;
3615
3616                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3617                         return pool;
3618         };
3619         return NULL;
3620 }
3621
3622 /**
3623  * Allocate a new memory for the counter values wrapped by all the needed
3624  * management.
3625  *
3626  * @param[in] dev
3627  *   Pointer to the Ethernet device structure.
3628  * @param[in] raws_n
3629  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3630  *
3631  * @return
3632  *   The new memory management pointer on success, otherwise NULL and rte_errno
3633  *   is set.
3634  */
3635 static struct mlx5_counter_stats_mem_mng *
3636 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3637 {
3638         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3639                                         (dev->data->dev_private))->sh;
3640         struct mlx5_devx_mkey_attr mkey_attr;
3641         struct mlx5_counter_stats_mem_mng *mem_mng;
3642         volatile struct flow_counter_stats *raw_data;
3643         int size = (sizeof(struct flow_counter_stats) *
3644                         MLX5_COUNTERS_PER_POOL +
3645                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3646                         sizeof(struct mlx5_counter_stats_mem_mng);
3647         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3648         int i;
3649
3650         if (!mem) {
3651                 rte_errno = ENOMEM;
3652                 return NULL;
3653         }
3654         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3655         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3656         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3657                                                  IBV_ACCESS_LOCAL_WRITE);
3658         if (!mem_mng->umem) {
3659                 rte_errno = errno;
3660                 rte_free(mem);
3661                 return NULL;
3662         }
3663         mkey_attr.addr = (uintptr_t)mem;
3664         mkey_attr.size = size;
3665         mkey_attr.umem_id = mem_mng->umem->umem_id;
3666         mkey_attr.pd = sh->pdn;
3667         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3668         if (!mem_mng->dm) {
3669                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3670                 rte_errno = errno;
3671                 rte_free(mem);
3672                 return NULL;
3673         }
3674         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3675         raw_data = (volatile struct flow_counter_stats *)mem;
3676         for (i = 0; i < raws_n; ++i) {
3677                 mem_mng->raws[i].mem_mng = mem_mng;
3678                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3679         }
3680         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3681         return mem_mng;
3682 }
3683
3684 /**
3685  * Resize a counter container.
3686  *
3687  * @param[in] dev
3688  *   Pointer to the Ethernet device structure.
3689  * @param[in] batch
3690  *   Whether the pool is for counter that was allocated by batch command.
3691  *
3692  * @return
3693  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3694  */
3695 static struct mlx5_pools_container *
3696 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3697 {
3698         struct mlx5_priv *priv = dev->data->dev_private;
3699         struct mlx5_pools_container *cont =
3700                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3701         struct mlx5_pools_container *new_cont =
3702                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3703         struct mlx5_counter_stats_mem_mng *mem_mng;
3704         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3705         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3706         int i;
3707
3708         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3709                 /* The last resize still hasn't detected by the host thread. */
3710                 rte_errno = EAGAIN;
3711                 return NULL;
3712         }
3713         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3714         if (!new_cont->pools) {
3715                 rte_errno = ENOMEM;
3716                 return NULL;
3717         }
3718         if (cont->n)
3719                 memcpy(new_cont->pools, cont->pools, cont->n *
3720                        sizeof(struct mlx5_flow_counter_pool *));
3721         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3722                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3723         if (!mem_mng) {
3724                 rte_free(new_cont->pools);
3725                 return NULL;
3726         }
3727         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3728                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3729                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3730                                  i, next);
3731         new_cont->n = resize;
3732         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3733         TAILQ_INIT(&new_cont->pool_list);
3734         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3735         new_cont->init_mem_mng = mem_mng;
3736         rte_cio_wmb();
3737          /* Flip the master container. */
3738         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3739         return new_cont;
3740 }
3741
3742 /**
3743  * Query a devx flow counter.
3744  *
3745  * @param[in] dev
3746  *   Pointer to the Ethernet device structure.
3747  * @param[in] cnt
3748  *   Pointer to the flow counter.
3749  * @param[out] pkts
3750  *   The statistics value of packets.
3751  * @param[out] bytes
3752  *   The statistics value of bytes.
3753  *
3754  * @return
3755  *   0 on success, otherwise a negative errno value and rte_errno is set.
3756  */
3757 static inline int
3758 _flow_dv_query_count(struct rte_eth_dev *dev,
3759                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3760                      uint64_t *bytes)
3761 {
3762         struct mlx5_priv *priv = dev->data->dev_private;
3763         struct mlx5_flow_counter_pool *pool =
3764                         flow_dv_counter_pool_get(cnt);
3765         int offset = cnt - &pool->counters_raw[0];
3766
3767         if (priv->counter_fallback)
3768                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3769
3770         rte_spinlock_lock(&pool->sl);
3771         /*
3772          * The single counters allocation may allocate smaller ID than the
3773          * current allocated in parallel to the host reading.
3774          * In this case the new counter values must be reported as 0.
3775          */
3776         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
3777                 *pkts = 0;
3778                 *bytes = 0;
3779         } else {
3780                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
3781                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
3782         }
3783         rte_spinlock_unlock(&pool->sl);
3784         return 0;
3785 }
3786
3787 /**
3788  * Create and initialize a new counter pool.
3789  *
3790  * @param[in] dev
3791  *   Pointer to the Ethernet device structure.
3792  * @param[out] dcs
3793  *   The devX counter handle.
3794  * @param[in] batch
3795  *   Whether the pool is for counter that was allocated by batch command.
3796  *
3797  * @return
3798  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
3799  */
3800 static struct mlx5_flow_counter_pool *
3801 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
3802                     uint32_t batch)
3803 {
3804         struct mlx5_priv *priv = dev->data->dev_private;
3805         struct mlx5_flow_counter_pool *pool;
3806         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
3807                                                                0);
3808         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
3809         uint32_t size;
3810
3811         if (cont->n == n_valid) {
3812                 cont = flow_dv_container_resize(dev, batch);
3813                 if (!cont)
3814                         return NULL;
3815         }
3816         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
3817                         sizeof(struct mlx5_flow_counter);
3818         pool = rte_calloc(__func__, 1, size, 0);
3819         if (!pool) {
3820                 rte_errno = ENOMEM;
3821                 return NULL;
3822         }
3823         pool->min_dcs = dcs;
3824         pool->raw = cont->init_mem_mng->raws + n_valid %
3825                                                      MLX5_CNT_CONTAINER_RESIZE;
3826         pool->raw_hw = NULL;
3827         rte_spinlock_init(&pool->sl);
3828         /*
3829          * The generation of the new allocated counters in this pool is 0, 2 in
3830          * the pool generation makes all the counters valid for allocation.
3831          */
3832         rte_atomic64_set(&pool->query_gen, 0x2);
3833         TAILQ_INIT(&pool->counters);
3834         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
3835         cont->pools[n_valid] = pool;
3836         /* Pool initialization must be updated before host thread access. */
3837         rte_cio_wmb();
3838         rte_atomic16_add(&cont->n_valid, 1);
3839         return pool;
3840 }
3841
3842 /**
3843  * Prepare a new counter and/or a new counter pool.
3844  *
3845  * @param[in] dev
3846  *   Pointer to the Ethernet device structure.
3847  * @param[out] cnt_free
3848  *   Where to put the pointer of a new counter.
3849  * @param[in] batch
3850  *   Whether the pool is for counter that was allocated by batch command.
3851  *
3852  * @return
3853  *   The free counter pool pointer and @p cnt_free is set on success,
3854  *   NULL otherwise and rte_errno is set.
3855  */
3856 static struct mlx5_flow_counter_pool *
3857 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
3858                              struct mlx5_flow_counter **cnt_free,
3859                              uint32_t batch)
3860 {
3861         struct mlx5_priv *priv = dev->data->dev_private;
3862         struct mlx5_flow_counter_pool *pool;
3863         struct mlx5_devx_obj *dcs = NULL;
3864         struct mlx5_flow_counter *cnt;
3865         uint32_t i;
3866
3867         if (!batch) {
3868                 /* bulk_bitmap must be 0 for single counter allocation. */
3869                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3870                 if (!dcs)
3871                         return NULL;
3872                 pool = flow_dv_find_pool_by_id
3873                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
3874                 if (!pool) {
3875                         pool = flow_dv_pool_create(dev, dcs, batch);
3876                         if (!pool) {
3877                                 mlx5_devx_cmd_destroy(dcs);
3878                                 return NULL;
3879                         }
3880                 } else if (dcs->id < pool->min_dcs->id) {
3881                         rte_atomic64_set(&pool->a64_dcs,
3882                                          (int64_t)(uintptr_t)dcs);
3883                 }
3884                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
3885                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3886                 cnt->dcs = dcs;
3887                 *cnt_free = cnt;
3888                 return pool;
3889         }
3890         /* bulk_bitmap is in 128 counters units. */
3891         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
3892                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
3893         if (!dcs) {
3894                 rte_errno = ENODATA;
3895                 return NULL;
3896         }
3897         pool = flow_dv_pool_create(dev, dcs, batch);
3898         if (!pool) {
3899                 mlx5_devx_cmd_destroy(dcs);
3900                 return NULL;
3901         }
3902         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3903                 cnt = &pool->counters_raw[i];
3904                 cnt->pool = pool;
3905                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3906         }
3907         *cnt_free = &pool->counters_raw[0];
3908         return pool;
3909 }
3910
3911 /**
3912  * Search for existed shared counter.
3913  *
3914  * @param[in] cont
3915  *   Pointer to the relevant counter pool container.
3916  * @param[in] id
3917  *   The shared counter ID to search.
3918  *
3919  * @return
3920  *   NULL if not existed, otherwise pointer to the shared counter.
3921  */
3922 static struct mlx5_flow_counter *
3923 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
3924                               uint32_t id)
3925 {
3926         static struct mlx5_flow_counter *cnt;
3927         struct mlx5_flow_counter_pool *pool;
3928         int i;
3929
3930         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3931                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3932                         cnt = &pool->counters_raw[i];
3933                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
3934                                 return cnt;
3935                 }
3936         }
3937         return NULL;
3938 }
3939
3940 /**
3941  * Allocate a flow counter.
3942  *
3943  * @param[in] dev
3944  *   Pointer to the Ethernet device structure.
3945  * @param[in] shared
3946  *   Indicate if this counter is shared with other flows.
3947  * @param[in] id
3948  *   Counter identifier.
3949  * @param[in] group
3950  *   Counter flow group.
3951  *
3952  * @return
3953  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3954  */
3955 static struct mlx5_flow_counter *
3956 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
3957                       uint16_t group)
3958 {
3959         struct mlx5_priv *priv = dev->data->dev_private;
3960         struct mlx5_flow_counter_pool *pool = NULL;
3961         struct mlx5_flow_counter *cnt_free = NULL;
3962         /*
3963          * Currently group 0 flow counter cannot be assigned to a flow if it is
3964          * not the first one in the batch counter allocation, so it is better
3965          * to allocate counters one by one for these flows in a separate
3966          * container.
3967          * A counter can be shared between different groups so need to take
3968          * shared counters from the single container.
3969          */
3970         uint32_t batch = (group && !shared) ? 1 : 0;
3971         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
3972                                                                0);
3973
3974         if (priv->counter_fallback)
3975                 return flow_dv_counter_alloc_fallback(dev, shared, id);
3976         if (!priv->config.devx) {
3977                 rte_errno = ENOTSUP;
3978                 return NULL;
3979         }
3980         if (shared) {
3981                 cnt_free = flow_dv_counter_shared_search(cont, id);
3982                 if (cnt_free) {
3983                         if (cnt_free->ref_cnt + 1 == 0) {
3984                                 rte_errno = E2BIG;
3985                                 return NULL;
3986                         }
3987                         cnt_free->ref_cnt++;
3988                         return cnt_free;
3989                 }
3990         }
3991         /* Pools which has a free counters are in the start. */
3992         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3993                 /*
3994                  * The free counter reset values must be updated between the
3995                  * counter release to the counter allocation, so, at least one
3996                  * query must be done in this time. ensure it by saving the
3997                  * query generation in the release time.
3998                  * The free list is sorted according to the generation - so if
3999                  * the first one is not updated, all the others are not
4000                  * updated too.
4001                  */
4002                 cnt_free = TAILQ_FIRST(&pool->counters);
4003                 if (cnt_free && cnt_free->query_gen + 1 <
4004                     rte_atomic64_read(&pool->query_gen))
4005                         break;
4006                 cnt_free = NULL;
4007         }
4008         if (!cnt_free) {
4009                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4010                 if (!pool)
4011                         return NULL;
4012         }
4013         cnt_free->batch = batch;
4014         /* Create a DV counter action only in the first time usage. */
4015         if (!cnt_free->action) {
4016                 uint16_t offset;
4017                 struct mlx5_devx_obj *dcs;
4018
4019                 if (batch) {
4020                         offset = cnt_free - &pool->counters_raw[0];
4021                         dcs = pool->min_dcs;
4022                 } else {
4023                         offset = 0;
4024                         dcs = cnt_free->dcs;
4025                 }
4026                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4027                                         (dcs->obj, offset);
4028                 if (!cnt_free->action) {
4029                         rte_errno = errno;
4030                         return NULL;
4031                 }
4032         }
4033         /* Update the counter reset values. */
4034         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4035                                  &cnt_free->bytes))
4036                 return NULL;
4037         cnt_free->shared = shared;
4038         cnt_free->ref_cnt = 1;
4039         cnt_free->id = id;
4040         if (!priv->sh->cmng.query_thread_on)
4041                 /* Start the asynchronous batch query by the host thread. */
4042                 mlx5_set_query_alarm(priv->sh);
4043         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4044         if (TAILQ_EMPTY(&pool->counters)) {
4045                 /* Move the pool to the end of the container pool list. */
4046                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4047                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4048         }
4049         return cnt_free;
4050 }
4051
4052 /**
4053  * Release a flow counter.
4054  *
4055  * @param[in] dev
4056  *   Pointer to the Ethernet device structure.
4057  * @param[in] counter
4058  *   Pointer to the counter handler.
4059  */
4060 static void
4061 flow_dv_counter_release(struct rte_eth_dev *dev,
4062                         struct mlx5_flow_counter *counter)
4063 {
4064         struct mlx5_priv *priv = dev->data->dev_private;
4065
4066         if (!counter)
4067                 return;
4068         if (priv->counter_fallback) {
4069                 flow_dv_counter_release_fallback(dev, counter);
4070                 return;
4071         }
4072         if (--counter->ref_cnt == 0) {
4073                 struct mlx5_flow_counter_pool *pool =
4074                                 flow_dv_counter_pool_get(counter);
4075
4076                 /* Put the counter in the end - the last updated one. */
4077                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4078                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4079         }
4080 }
4081
4082 /**
4083  * Verify the @p attributes will be correctly understood by the NIC and store
4084  * them in the @p flow if everything is correct.
4085  *
4086  * @param[in] dev
4087  *   Pointer to dev struct.
4088  * @param[in] attributes
4089  *   Pointer to flow attributes
4090  * @param[in] external
4091  *   This flow rule is created by request external to PMD.
4092  * @param[out] error
4093  *   Pointer to error structure.
4094  *
4095  * @return
4096  *   0 on success, a negative errno value otherwise and rte_errno is set.
4097  */
4098 static int
4099 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4100                             const struct rte_flow_attr *attributes,
4101                             bool external __rte_unused,
4102                             struct rte_flow_error *error)
4103 {
4104         struct mlx5_priv *priv = dev->data->dev_private;
4105         uint32_t priority_max = priv->config.flow_prio - 1;
4106
4107 #ifndef HAVE_MLX5DV_DR
4108         if (attributes->group)
4109                 return rte_flow_error_set(error, ENOTSUP,
4110                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4111                                           NULL,
4112                                           "groups are not supported");
4113 #else
4114         uint32_t max_group = attributes->transfer ?
4115                              MLX5_MAX_TABLES_FDB :
4116                                 external ?
4117                                 MLX5_MAX_TABLES_EXTERNAL :
4118                                 MLX5_MAX_TABLES;
4119         uint32_t table;
4120         int ret;
4121
4122         ret = mlx5_flow_group_to_table(attributes, external,
4123                                        attributes->group,
4124                                        &table, error);
4125         if (ret)
4126                 return ret;
4127         if (table >= max_group)
4128                 return rte_flow_error_set(error, EINVAL,
4129                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
4130                                           "group index out of range");
4131 #endif
4132         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4133             attributes->priority >= priority_max)
4134                 return rte_flow_error_set(error, ENOTSUP,
4135                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4136                                           NULL,
4137                                           "priority out of range");
4138         if (attributes->transfer) {
4139                 if (!priv->config.dv_esw_en)
4140                         return rte_flow_error_set
4141                                 (error, ENOTSUP,
4142                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4143                                  "E-Switch dr is not supported");
4144                 if (!(priv->representor || priv->master))
4145                         return rte_flow_error_set
4146                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4147                                  NULL, "E-Switch configuration can only be"
4148                                  " done by a master or a representor device");
4149                 if (attributes->egress)
4150                         return rte_flow_error_set
4151                                 (error, ENOTSUP,
4152                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4153                                  "egress is not supported");
4154         }
4155         if (!(attributes->egress ^ attributes->ingress))
4156                 return rte_flow_error_set(error, ENOTSUP,
4157                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4158                                           "must specify exactly one of "
4159                                           "ingress or egress");
4160         return 0;
4161 }
4162
4163 /**
4164  * Internal validation function. For validating both actions and items.
4165  *
4166  * @param[in] dev
4167  *   Pointer to the rte_eth_dev structure.
4168  * @param[in] attr
4169  *   Pointer to the flow attributes.
4170  * @param[in] items
4171  *   Pointer to the list of items.
4172  * @param[in] actions
4173  *   Pointer to the list of actions.
4174  * @param[in] external
4175  *   This flow rule is created by request external to PMD.
4176  * @param[out] error
4177  *   Pointer to the error structure.
4178  *
4179  * @return
4180  *   0 on success, a negative errno value otherwise and rte_errno is set.
4181  */
4182 static int
4183 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4184                  const struct rte_flow_item items[],
4185                  const struct rte_flow_action actions[],
4186                  bool external, struct rte_flow_error *error)
4187 {
4188         int ret;
4189         uint64_t action_flags = 0;
4190         uint64_t item_flags = 0;
4191         uint64_t last_item = 0;
4192         uint8_t next_protocol = 0xff;
4193         uint16_t ether_type = 0;
4194         int actions_n = 0;
4195         const struct rte_flow_item *gre_item = NULL;
4196         struct rte_flow_item_tcp nic_tcp_mask = {
4197                 .hdr = {
4198                         .tcp_flags = 0xFF,
4199                         .src_port = RTE_BE16(UINT16_MAX),
4200                         .dst_port = RTE_BE16(UINT16_MAX),
4201                 }
4202         };
4203         struct mlx5_priv *priv = dev->data->dev_private;
4204         struct mlx5_dev_config *dev_conf = &priv->config;
4205
4206         if (items == NULL)
4207                 return -1;
4208         ret = flow_dv_validate_attributes(dev, attr, external, error);
4209         if (ret < 0)
4210                 return ret;
4211         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4212                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4213                 int type = items->type;
4214
4215                 switch (type) {
4216                 case RTE_FLOW_ITEM_TYPE_VOID:
4217                         break;
4218                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4219                         ret = flow_dv_validate_item_port_id
4220                                         (dev, items, attr, item_flags, error);
4221                         if (ret < 0)
4222                                 return ret;
4223                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4224                         break;
4225                 case RTE_FLOW_ITEM_TYPE_ETH:
4226                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4227                                                           error);
4228                         if (ret < 0)
4229                                 return ret;
4230                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4231                                              MLX5_FLOW_LAYER_OUTER_L2;
4232                         if (items->mask != NULL && items->spec != NULL) {
4233                                 ether_type =
4234                                         ((const struct rte_flow_item_eth *)
4235                                          items->spec)->type;
4236                                 ether_type &=
4237                                         ((const struct rte_flow_item_eth *)
4238                                          items->mask)->type;
4239                                 ether_type = rte_be_to_cpu_16(ether_type);
4240                         } else {
4241                                 ether_type = 0;
4242                         }
4243                         break;
4244                 case RTE_FLOW_ITEM_TYPE_VLAN:
4245                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4246                                                            dev, error);
4247                         if (ret < 0)
4248                                 return ret;
4249                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4250                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4251                         if (items->mask != NULL && items->spec != NULL) {
4252                                 ether_type =
4253                                         ((const struct rte_flow_item_vlan *)
4254                                          items->spec)->inner_type;
4255                                 ether_type &=
4256                                         ((const struct rte_flow_item_vlan *)
4257                                          items->mask)->inner_type;
4258                                 ether_type = rte_be_to_cpu_16(ether_type);
4259                         } else {
4260                                 ether_type = 0;
4261                         }
4262                         break;
4263                 case RTE_FLOW_ITEM_TYPE_IPV4:
4264                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4265                                                   &item_flags, &tunnel);
4266                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4267                                                            last_item,
4268                                                            ether_type, NULL,
4269                                                            error);
4270                         if (ret < 0)
4271                                 return ret;
4272                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4273                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4274                         if (items->mask != NULL &&
4275                             ((const struct rte_flow_item_ipv4 *)
4276                              items->mask)->hdr.next_proto_id) {
4277                                 next_protocol =
4278                                         ((const struct rte_flow_item_ipv4 *)
4279                                          (items->spec))->hdr.next_proto_id;
4280                                 next_protocol &=
4281                                         ((const struct rte_flow_item_ipv4 *)
4282                                          (items->mask))->hdr.next_proto_id;
4283                         } else {
4284                                 /* Reset for inner layer. */
4285                                 next_protocol = 0xff;
4286                         }
4287                         break;
4288                 case RTE_FLOW_ITEM_TYPE_IPV6:
4289                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4290                                                   &item_flags, &tunnel);
4291                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4292                                                            last_item,
4293                                                            ether_type, NULL,
4294                                                            error);
4295                         if (ret < 0)
4296                                 return ret;
4297                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4298                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4299                         if (items->mask != NULL &&
4300                             ((const struct rte_flow_item_ipv6 *)
4301                              items->mask)->hdr.proto) {
4302                                 next_protocol =
4303                                         ((const struct rte_flow_item_ipv6 *)
4304                                          items->spec)->hdr.proto;
4305                                 next_protocol &=
4306                                         ((const struct rte_flow_item_ipv6 *)
4307                                          items->mask)->hdr.proto;
4308                         } else {
4309                                 /* Reset for inner layer. */
4310                                 next_protocol = 0xff;
4311                         }
4312                         break;
4313                 case RTE_FLOW_ITEM_TYPE_TCP:
4314                         ret = mlx5_flow_validate_item_tcp
4315                                                 (items, item_flags,
4316                                                  next_protocol,
4317                                                  &nic_tcp_mask,
4318                                                  error);
4319                         if (ret < 0)
4320                                 return ret;
4321                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4322                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4323                         break;
4324                 case RTE_FLOW_ITEM_TYPE_UDP:
4325                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4326                                                           next_protocol,
4327                                                           error);
4328                         if (ret < 0)
4329                                 return ret;
4330                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4331                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4332                         break;
4333                 case RTE_FLOW_ITEM_TYPE_GRE:
4334                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4335                                                           next_protocol, error);
4336                         if (ret < 0)
4337                                 return ret;
4338                         gre_item = items;
4339                         last_item = MLX5_FLOW_LAYER_GRE;
4340                         break;
4341                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4342                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4343                                                             next_protocol,
4344                                                             error);
4345                         if (ret < 0)
4346                                 return ret;
4347                         last_item = MLX5_FLOW_LAYER_NVGRE;
4348                         break;
4349                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4350                         ret = mlx5_flow_validate_item_gre_key
4351                                 (items, item_flags, gre_item, error);
4352                         if (ret < 0)
4353                                 return ret;
4354                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4355                         break;
4356                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4357                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4358                                                             error);
4359                         if (ret < 0)
4360                                 return ret;
4361                         last_item = MLX5_FLOW_LAYER_VXLAN;
4362                         break;
4363                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4364                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4365                                                                 item_flags, dev,
4366                                                                 error);
4367                         if (ret < 0)
4368                                 return ret;
4369                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4370                         break;
4371                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4372                         ret = mlx5_flow_validate_item_geneve(items,
4373                                                              item_flags, dev,
4374                                                              error);
4375                         if (ret < 0)
4376                                 return ret;
4377                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4378                         break;
4379                 case RTE_FLOW_ITEM_TYPE_MPLS:
4380                         ret = mlx5_flow_validate_item_mpls(dev, items,
4381                                                            item_flags,
4382                                                            last_item, error);
4383                         if (ret < 0)
4384                                 return ret;
4385                         last_item = MLX5_FLOW_LAYER_MPLS;
4386                         break;
4387
4388                 case RTE_FLOW_ITEM_TYPE_MARK:
4389                         ret = flow_dv_validate_item_mark(dev, items, attr,
4390                                                          error);
4391                         if (ret < 0)
4392                                 return ret;
4393                         last_item = MLX5_FLOW_ITEM_MARK;
4394                         break;
4395                 case RTE_FLOW_ITEM_TYPE_META:
4396                         ret = flow_dv_validate_item_meta(dev, items, attr,
4397                                                          error);
4398                         if (ret < 0)
4399                                 return ret;
4400                         last_item = MLX5_FLOW_ITEM_METADATA;
4401                         break;
4402                 case RTE_FLOW_ITEM_TYPE_ICMP:
4403                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4404                                                            next_protocol,
4405                                                            error);
4406                         if (ret < 0)
4407                                 return ret;
4408                         last_item = MLX5_FLOW_LAYER_ICMP;
4409                         break;
4410                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4411                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4412                                                             next_protocol,
4413                                                             error);
4414                         if (ret < 0)
4415                                 return ret;
4416                         last_item = MLX5_FLOW_LAYER_ICMP6;
4417                         break;
4418                 case RTE_FLOW_ITEM_TYPE_TAG:
4419                         ret = flow_dv_validate_item_tag(dev, items,
4420                                                         attr, error);
4421                         if (ret < 0)
4422                                 return ret;
4423                         last_item = MLX5_FLOW_ITEM_TAG;
4424                         break;
4425                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4426                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4427                         break;
4428                 default:
4429                         return rte_flow_error_set(error, ENOTSUP,
4430                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4431                                                   NULL, "item not supported");
4432                 }
4433                 item_flags |= last_item;
4434         }
4435         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4436                 int type = actions->type;
4437                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4438                         return rte_flow_error_set(error, ENOTSUP,
4439                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4440                                                   actions, "too many actions");
4441                 switch (type) {
4442                 case RTE_FLOW_ACTION_TYPE_VOID:
4443                         break;
4444                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4445                         ret = flow_dv_validate_action_port_id(dev,
4446                                                               action_flags,
4447                                                               actions,
4448                                                               attr,
4449                                                               error);
4450                         if (ret)
4451                                 return ret;
4452                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4453                         ++actions_n;
4454                         break;
4455                 case RTE_FLOW_ACTION_TYPE_FLAG:
4456                         ret = flow_dv_validate_action_flag(dev, action_flags,
4457                                                            attr, error);
4458                         if (ret < 0)
4459                                 return ret;
4460                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4461                                 /* Count all modify-header actions as one. */
4462                                 if (!(action_flags &
4463                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4464                                         ++actions_n;
4465                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4466                                                 MLX5_FLOW_ACTION_MARK_EXT;
4467                         } else {
4468                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4469                                 ++actions_n;
4470                         }
4471                         break;
4472                 case RTE_FLOW_ACTION_TYPE_MARK:
4473                         ret = flow_dv_validate_action_mark(dev, actions,
4474                                                            action_flags,
4475                                                            attr, error);
4476                         if (ret < 0)
4477                                 return ret;
4478                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4479                                 /* Count all modify-header actions as one. */
4480                                 if (!(action_flags &
4481                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4482                                         ++actions_n;
4483                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4484                                                 MLX5_FLOW_ACTION_MARK_EXT;
4485                         } else {
4486                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4487                                 ++actions_n;
4488                         }
4489                         break;
4490                 case RTE_FLOW_ACTION_TYPE_SET_META:
4491                         ret = flow_dv_validate_action_set_meta(dev, actions,
4492                                                                action_flags,
4493                                                                attr, error);
4494                         if (ret < 0)
4495                                 return ret;
4496                         /* Count all modify-header actions as one action. */
4497                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4498                                 ++actions_n;
4499                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4500                         break;
4501                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4502                         ret = flow_dv_validate_action_set_tag(dev, actions,
4503                                                               action_flags,
4504                                                               attr, error);
4505                         if (ret < 0)
4506                                 return ret;
4507                         /* Count all modify-header actions as one action. */
4508                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4509                                 ++actions_n;
4510                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4511                         break;
4512                 case RTE_FLOW_ACTION_TYPE_DROP:
4513                         ret = mlx5_flow_validate_action_drop(action_flags,
4514                                                              attr, error);
4515                         if (ret < 0)
4516                                 return ret;
4517                         action_flags |= MLX5_FLOW_ACTION_DROP;
4518                         ++actions_n;
4519                         break;
4520                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4521                         ret = mlx5_flow_validate_action_queue(actions,
4522                                                               action_flags, dev,
4523                                                               attr, error);
4524                         if (ret < 0)
4525                                 return ret;
4526                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4527                         ++actions_n;
4528                         break;
4529                 case RTE_FLOW_ACTION_TYPE_RSS:
4530                         ret = mlx5_flow_validate_action_rss(actions,
4531                                                             action_flags, dev,
4532                                                             attr, item_flags,
4533                                                             error);
4534                         if (ret < 0)
4535                                 return ret;
4536                         action_flags |= MLX5_FLOW_ACTION_RSS;
4537                         ++actions_n;
4538                         break;
4539                 case RTE_FLOW_ACTION_TYPE_COUNT:
4540                         ret = flow_dv_validate_action_count(dev, error);
4541                         if (ret < 0)
4542                                 return ret;
4543                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4544                         ++actions_n;
4545                         break;
4546                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4547                         if (flow_dv_validate_action_pop_vlan(dev,
4548                                                              action_flags,
4549                                                              actions,
4550                                                              item_flags, attr,
4551                                                              error))
4552                                 return -rte_errno;
4553                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4554                         ++actions_n;
4555                         break;
4556                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4557                         ret = flow_dv_validate_action_push_vlan(action_flags,
4558                                                                 item_flags,
4559                                                                 actions, attr,
4560                                                                 error);
4561                         if (ret < 0)
4562                                 return ret;
4563                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4564                         ++actions_n;
4565                         break;
4566                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4567                         ret = flow_dv_validate_action_set_vlan_pcp
4568                                                 (action_flags, actions, error);
4569                         if (ret < 0)
4570                                 return ret;
4571                         /* Count PCP with push_vlan command. */
4572                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4573                         break;
4574                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4575                         ret = flow_dv_validate_action_set_vlan_vid
4576                                                 (item_flags, action_flags,
4577                                                  actions, error);
4578                         if (ret < 0)
4579                                 return ret;
4580                         /* Count VID with push_vlan command. */
4581                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4582                         break;
4583                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4584                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4585                         ret = flow_dv_validate_action_l2_encap(action_flags,
4586                                                                actions, attr,
4587                                                                error);
4588                         if (ret < 0)
4589                                 return ret;
4590                         action_flags |= actions->type ==
4591                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4592                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4593                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4594                         ++actions_n;
4595                         break;
4596                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4597                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4598                         ret = flow_dv_validate_action_l2_decap(action_flags,
4599                                                                attr, error);
4600                         if (ret < 0)
4601                                 return ret;
4602                         action_flags |= actions->type ==
4603                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4604                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4605                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4606                         ++actions_n;
4607                         break;
4608                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4609                         ret = flow_dv_validate_action_raw_encap(action_flags,
4610                                                                 actions, attr,
4611                                                                 error);
4612                         if (ret < 0)
4613                                 return ret;
4614                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4615                         ++actions_n;
4616                         break;
4617                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4618                         ret = flow_dv_validate_action_raw_decap(action_flags,
4619                                                                 actions, attr,
4620                                                                 error);
4621                         if (ret < 0)
4622                                 return ret;
4623                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4624                         ++actions_n;
4625                         break;
4626                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4627                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4628                         ret = flow_dv_validate_action_modify_mac(action_flags,
4629                                                                  actions,
4630                                                                  item_flags,
4631                                                                  error);
4632                         if (ret < 0)
4633                                 return ret;
4634                         /* Count all modify-header actions as one action. */
4635                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4636                                 ++actions_n;
4637                         action_flags |= actions->type ==
4638                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4639                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4640                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4641                         break;
4642
4643                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4644                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4645                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4646                                                                   actions,
4647                                                                   item_flags,
4648                                                                   error);
4649                         if (ret < 0)
4650                                 return ret;
4651                         /* Count all modify-header actions as one action. */
4652                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4653                                 ++actions_n;
4654                         action_flags |= actions->type ==
4655                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4656                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4657                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4658                         break;
4659                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4660                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4661                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4662                                                                   actions,
4663                                                                   item_flags,
4664                                                                   error);
4665                         if (ret < 0)
4666                                 return ret;
4667                         /* Count all modify-header actions as one action. */
4668                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4669                                 ++actions_n;
4670                         action_flags |= actions->type ==
4671                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4672                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4673                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4674                         break;
4675                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4676                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4677                         ret = flow_dv_validate_action_modify_tp(action_flags,
4678                                                                 actions,
4679                                                                 item_flags,
4680                                                                 error);
4681                         if (ret < 0)
4682                                 return ret;
4683                         /* Count all modify-header actions as one action. */
4684                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4685                                 ++actions_n;
4686                         action_flags |= actions->type ==
4687                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4688                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4689                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4690                         break;
4691                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4692                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4693                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4694                                                                  actions,
4695                                                                  item_flags,
4696                                                                  error);
4697                         if (ret < 0)
4698                                 return ret;
4699                         /* Count all modify-header actions as one action. */
4700                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4701                                 ++actions_n;
4702                         action_flags |= actions->type ==
4703                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4704                                                 MLX5_FLOW_ACTION_SET_TTL :
4705                                                 MLX5_FLOW_ACTION_DEC_TTL;
4706                         break;
4707                 case RTE_FLOW_ACTION_TYPE_JUMP:
4708                         ret = flow_dv_validate_action_jump(actions,
4709                                                            action_flags,
4710                                                            attr, external,
4711                                                            error);
4712                         if (ret)
4713                                 return ret;
4714                         ++actions_n;
4715                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4716                         break;
4717                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4718                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4719                         ret = flow_dv_validate_action_modify_tcp_seq
4720                                                                 (action_flags,
4721                                                                  actions,
4722                                                                  item_flags,
4723                                                                  error);
4724                         if (ret < 0)
4725                                 return ret;
4726                         /* Count all modify-header actions as one action. */
4727                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4728                                 ++actions_n;
4729                         action_flags |= actions->type ==
4730                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4731                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4732                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4733                         break;
4734                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4735                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4736                         ret = flow_dv_validate_action_modify_tcp_ack
4737                                                                 (action_flags,
4738                                                                  actions,
4739                                                                  item_flags,
4740                                                                  error);
4741                         if (ret < 0)
4742                                 return ret;
4743                         /* Count all modify-header actions as one action. */
4744                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4745                                 ++actions_n;
4746                         action_flags |= actions->type ==
4747                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4748                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4749                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4750                         break;
4751                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4752                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4753                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4754                         break;
4755                 default:
4756                         return rte_flow_error_set(error, ENOTSUP,
4757                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4758                                                   actions,
4759                                                   "action not supported");
4760                 }
4761         }
4762         if ((action_flags & MLX5_FLOW_LAYER_TUNNEL) &&
4763             (action_flags & MLX5_FLOW_VLAN_ACTIONS))
4764                 return rte_flow_error_set(error, ENOTSUP,
4765                                           RTE_FLOW_ERROR_TYPE_ACTION,
4766                                           actions,
4767                                           "can't have vxlan and vlan"
4768                                           " actions in the same rule");
4769         /* Eswitch has few restrictions on using items and actions */
4770         if (attr->transfer) {
4771                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4772                     action_flags & MLX5_FLOW_ACTION_FLAG)
4773                         return rte_flow_error_set(error, ENOTSUP,
4774                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4775                                                   NULL,
4776                                                   "unsupported action FLAG");
4777                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4778                     action_flags & MLX5_FLOW_ACTION_MARK)
4779                         return rte_flow_error_set(error, ENOTSUP,
4780                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4781                                                   NULL,
4782                                                   "unsupported action MARK");
4783                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
4784                         return rte_flow_error_set(error, ENOTSUP,
4785                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4786                                                   NULL,
4787                                                   "unsupported action QUEUE");
4788                 if (action_flags & MLX5_FLOW_ACTION_RSS)
4789                         return rte_flow_error_set(error, ENOTSUP,
4790                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4791                                                   NULL,
4792                                                   "unsupported action RSS");
4793                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4794                         return rte_flow_error_set(error, EINVAL,
4795                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4796                                                   actions,
4797                                                   "no fate action is found");
4798         } else {
4799                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
4800                         return rte_flow_error_set(error, EINVAL,
4801                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4802                                                   actions,
4803                                                   "no fate action is found");
4804         }
4805         return 0;
4806 }
4807
4808 /**
4809  * Internal preparation function. Allocates the DV flow size,
4810  * this size is constant.
4811  *
4812  * @param[in] attr
4813  *   Pointer to the flow attributes.
4814  * @param[in] items
4815  *   Pointer to the list of items.
4816  * @param[in] actions
4817  *   Pointer to the list of actions.
4818  * @param[out] error
4819  *   Pointer to the error structure.
4820  *
4821  * @return
4822  *   Pointer to mlx5_flow object on success,
4823  *   otherwise NULL and rte_errno is set.
4824  */
4825 static struct mlx5_flow *
4826 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
4827                 const struct rte_flow_item items[] __rte_unused,
4828                 const struct rte_flow_action actions[] __rte_unused,
4829                 struct rte_flow_error *error)
4830 {
4831         size_t size = sizeof(struct mlx5_flow);
4832         struct mlx5_flow *dev_flow;
4833
4834         dev_flow = rte_calloc(__func__, 1, size, 0);
4835         if (!dev_flow) {
4836                 rte_flow_error_set(error, ENOMEM,
4837                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4838                                    "not enough memory to create flow");
4839                 return NULL;
4840         }
4841         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
4842         dev_flow->ingress = attr->ingress;
4843         dev_flow->transfer = attr->transfer;
4844         return dev_flow;
4845 }
4846
4847 #ifndef NDEBUG
4848 /**
4849  * Sanity check for match mask and value. Similar to check_valid_spec() in
4850  * kernel driver. If unmasked bit is present in value, it returns failure.
4851  *
4852  * @param match_mask
4853  *   pointer to match mask buffer.
4854  * @param match_value
4855  *   pointer to match value buffer.
4856  *
4857  * @return
4858  *   0 if valid, -EINVAL otherwise.
4859  */
4860 static int
4861 flow_dv_check_valid_spec(void *match_mask, void *match_value)
4862 {
4863         uint8_t *m = match_mask;
4864         uint8_t *v = match_value;
4865         unsigned int i;
4866
4867         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
4868                 if (v[i] & ~m[i]) {
4869                         DRV_LOG(ERR,
4870                                 "match_value differs from match_criteria"
4871                                 " %p[%u] != %p[%u]",
4872                                 match_value, i, match_mask, i);
4873                         return -EINVAL;
4874                 }
4875         }
4876         return 0;
4877 }
4878 #endif
4879
4880 /**
4881  * Add Ethernet item to matcher and to the value.
4882  *
4883  * @param[in, out] matcher
4884  *   Flow matcher.
4885  * @param[in, out] key
4886  *   Flow matcher value.
4887  * @param[in] item
4888  *   Flow pattern to translate.
4889  * @param[in] inner
4890  *   Item is inner pattern.
4891  */
4892 static void
4893 flow_dv_translate_item_eth(void *matcher, void *key,
4894                            const struct rte_flow_item *item, int inner)
4895 {
4896         const struct rte_flow_item_eth *eth_m = item->mask;
4897         const struct rte_flow_item_eth *eth_v = item->spec;
4898         const struct rte_flow_item_eth nic_mask = {
4899                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4900                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4901                 .type = RTE_BE16(0xffff),
4902         };
4903         void *headers_m;
4904         void *headers_v;
4905         char *l24_v;
4906         unsigned int i;
4907
4908         if (!eth_v)
4909                 return;
4910         if (!eth_m)
4911                 eth_m = &nic_mask;
4912         if (inner) {
4913                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4914                                          inner_headers);
4915                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4916         } else {
4917                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4918                                          outer_headers);
4919                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4920         }
4921         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
4922                &eth_m->dst, sizeof(eth_m->dst));
4923         /* The value must be in the range of the mask. */
4924         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
4925         for (i = 0; i < sizeof(eth_m->dst); ++i)
4926                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
4927         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
4928                &eth_m->src, sizeof(eth_m->src));
4929         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
4930         /* The value must be in the range of the mask. */
4931         for (i = 0; i < sizeof(eth_m->dst); ++i)
4932                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
4933         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
4934                  rte_be_to_cpu_16(eth_m->type));
4935         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
4936         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
4937 }
4938
4939 /**
4940  * Add VLAN item to matcher and to the value.
4941  *
4942  * @param[in, out] dev_flow
4943  *   Flow descriptor.
4944  * @param[in, out] matcher
4945  *   Flow matcher.
4946  * @param[in, out] key
4947  *   Flow matcher value.
4948  * @param[in] item
4949  *   Flow pattern to translate.
4950  * @param[in] inner
4951  *   Item is inner pattern.
4952  */
4953 static void
4954 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
4955                             void *matcher, void *key,
4956                             const struct rte_flow_item *item,
4957                             int inner)
4958 {
4959         const struct rte_flow_item_vlan *vlan_m = item->mask;
4960         const struct rte_flow_item_vlan *vlan_v = item->spec;
4961         void *headers_m;
4962         void *headers_v;
4963         uint16_t tci_m;
4964         uint16_t tci_v;
4965
4966         if (!vlan_v)
4967                 return;
4968         if (!vlan_m)
4969                 vlan_m = &rte_flow_item_vlan_mask;
4970         if (inner) {
4971                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4972                                          inner_headers);
4973                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4974         } else {
4975                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4976                                          outer_headers);
4977                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4978                 /*
4979                  * This is workaround, masks are not supported,
4980                  * and pre-validated.
4981                  */
4982                 dev_flow->dv.vf_vlan.tag =
4983                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
4984         }
4985         tci_m = rte_be_to_cpu_16(vlan_m->tci);
4986         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
4987         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
4988         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
4989         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
4990         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
4991         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
4992         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
4993         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
4994         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
4995         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
4996                  rte_be_to_cpu_16(vlan_m->inner_type));
4997         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
4998                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
4999 }
5000
5001 /**
5002  * Add IPV4 item to matcher and to the value.
5003  *
5004  * @param[in, out] matcher
5005  *   Flow matcher.
5006  * @param[in, out] key
5007  *   Flow matcher value.
5008  * @param[in] item
5009  *   Flow pattern to translate.
5010  * @param[in] inner
5011  *   Item is inner pattern.
5012  * @param[in] group
5013  *   The group to insert the rule.
5014  */
5015 static void
5016 flow_dv_translate_item_ipv4(void *matcher, void *key,
5017                             const struct rte_flow_item *item,
5018                             int inner, uint32_t group)
5019 {
5020         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5021         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5022         const struct rte_flow_item_ipv4 nic_mask = {
5023                 .hdr = {
5024                         .src_addr = RTE_BE32(0xffffffff),
5025                         .dst_addr = RTE_BE32(0xffffffff),
5026                         .type_of_service = 0xff,
5027                         .next_proto_id = 0xff,
5028                 },
5029         };
5030         void *headers_m;
5031         void *headers_v;
5032         char *l24_m;
5033         char *l24_v;
5034         uint8_t tos;
5035
5036         if (inner) {
5037                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5038                                          inner_headers);
5039                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5040         } else {
5041                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5042                                          outer_headers);
5043                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5044         }
5045         if (group == 0)
5046                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5047         else
5048                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5049         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5050         if (!ipv4_v)
5051                 return;
5052         if (!ipv4_m)
5053                 ipv4_m = &nic_mask;
5054         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5055                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5056         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5057                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5058         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5059         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5060         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5061                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5062         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5063                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5064         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5065         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5066         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5067         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5068                  ipv4_m->hdr.type_of_service);
5069         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5070         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5071                  ipv4_m->hdr.type_of_service >> 2);
5072         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5073         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5074                  ipv4_m->hdr.next_proto_id);
5075         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5076                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5077 }
5078
5079 /**
5080  * Add IPV6 item to matcher and to the value.
5081  *
5082  * @param[in, out] matcher
5083  *   Flow matcher.
5084  * @param[in, out] key
5085  *   Flow matcher value.
5086  * @param[in] item
5087  *   Flow pattern to translate.
5088  * @param[in] inner
5089  *   Item is inner pattern.
5090  * @param[in] group
5091  *   The group to insert the rule.
5092  */
5093 static void
5094 flow_dv_translate_item_ipv6(void *matcher, void *key,
5095                             const struct rte_flow_item *item,
5096                             int inner, uint32_t group)
5097 {
5098         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5099         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5100         const struct rte_flow_item_ipv6 nic_mask = {
5101                 .hdr = {
5102                         .src_addr =
5103                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5104                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5105                         .dst_addr =
5106                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5107                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5108                         .vtc_flow = RTE_BE32(0xffffffff),
5109                         .proto = 0xff,
5110                         .hop_limits = 0xff,
5111                 },
5112         };
5113         void *headers_m;
5114         void *headers_v;
5115         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5116         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5117         char *l24_m;
5118         char *l24_v;
5119         uint32_t vtc_m;
5120         uint32_t vtc_v;
5121         int i;
5122         int size;
5123
5124         if (inner) {
5125                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5126                                          inner_headers);
5127                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5128         } else {
5129                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5130                                          outer_headers);
5131                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5132         }
5133         if (group == 0)
5134                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5135         else
5136                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5137         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5138         if (!ipv6_v)
5139                 return;
5140         if (!ipv6_m)
5141                 ipv6_m = &nic_mask;
5142         size = sizeof(ipv6_m->hdr.dst_addr);
5143         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5144                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5145         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5146                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5147         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5148         for (i = 0; i < size; ++i)
5149                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5150         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5151                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5152         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5153                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5154         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5155         for (i = 0; i < size; ++i)
5156                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5157         /* TOS. */
5158         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5159         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5160         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5161         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5162         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5163         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5164         /* Label. */
5165         if (inner) {
5166                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5167                          vtc_m);
5168                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5169                          vtc_v);
5170         } else {
5171                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5172                          vtc_m);
5173                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5174                          vtc_v);
5175         }
5176         /* Protocol. */
5177         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5178                  ipv6_m->hdr.proto);
5179         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5180                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5181 }
5182
5183 /**
5184  * Add TCP item to matcher and to the value.
5185  *
5186  * @param[in, out] matcher
5187  *   Flow matcher.
5188  * @param[in, out] key
5189  *   Flow matcher value.
5190  * @param[in] item
5191  *   Flow pattern to translate.
5192  * @param[in] inner
5193  *   Item is inner pattern.
5194  */
5195 static void
5196 flow_dv_translate_item_tcp(void *matcher, void *key,
5197                            const struct rte_flow_item *item,
5198                            int inner)
5199 {
5200         const struct rte_flow_item_tcp *tcp_m = item->mask;
5201         const struct rte_flow_item_tcp *tcp_v = item->spec;
5202         void *headers_m;
5203         void *headers_v;
5204
5205         if (inner) {
5206                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5207                                          inner_headers);
5208                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5209         } else {
5210                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5211                                          outer_headers);
5212                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5213         }
5214         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5215         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5216         if (!tcp_v)
5217                 return;
5218         if (!tcp_m)
5219                 tcp_m = &rte_flow_item_tcp_mask;
5220         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5221                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5222         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5223                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5224         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5225                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5226         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5227                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5228         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5229                  tcp_m->hdr.tcp_flags);
5230         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5231                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5232 }
5233
5234 /**
5235  * Add UDP item to matcher and to the value.
5236  *
5237  * @param[in, out] matcher
5238  *   Flow matcher.
5239  * @param[in, out] key
5240  *   Flow matcher value.
5241  * @param[in] item
5242  *   Flow pattern to translate.
5243  * @param[in] inner
5244  *   Item is inner pattern.
5245  */
5246 static void
5247 flow_dv_translate_item_udp(void *matcher, void *key,
5248                            const struct rte_flow_item *item,
5249                            int inner)
5250 {
5251         const struct rte_flow_item_udp *udp_m = item->mask;
5252         const struct rte_flow_item_udp *udp_v = item->spec;
5253         void *headers_m;
5254         void *headers_v;
5255
5256         if (inner) {
5257                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5258                                          inner_headers);
5259                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5260         } else {
5261                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5262                                          outer_headers);
5263                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5264         }
5265         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5266         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5267         if (!udp_v)
5268                 return;
5269         if (!udp_m)
5270                 udp_m = &rte_flow_item_udp_mask;
5271         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5272                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5273         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5274                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5275         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5276                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5277         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5278                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5279 }
5280
5281 /**
5282  * Add GRE optional Key item to matcher and to the value.
5283  *
5284  * @param[in, out] matcher
5285  *   Flow matcher.
5286  * @param[in, out] key
5287  *   Flow matcher value.
5288  * @param[in] item
5289  *   Flow pattern to translate.
5290  * @param[in] inner
5291  *   Item is inner pattern.
5292  */
5293 static void
5294 flow_dv_translate_item_gre_key(void *matcher, void *key,
5295                                    const struct rte_flow_item *item)
5296 {
5297         const rte_be32_t *key_m = item->mask;
5298         const rte_be32_t *key_v = item->spec;
5299         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5300         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5301         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5302
5303         if (!key_v)
5304                 return;
5305         if (!key_m)
5306                 key_m = &gre_key_default_mask;
5307         /* GRE K bit must be on and should already be validated */
5308         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5309         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5310         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5311                  rte_be_to_cpu_32(*key_m) >> 8);
5312         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5313                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5314         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5315                  rte_be_to_cpu_32(*key_m) & 0xFF);
5316         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5317                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5318 }
5319
5320 /**
5321  * Add GRE item to matcher and to the value.
5322  *
5323  * @param[in, out] matcher
5324  *   Flow matcher.
5325  * @param[in, out] key
5326  *   Flow matcher value.
5327  * @param[in] item
5328  *   Flow pattern to translate.
5329  * @param[in] inner
5330  *   Item is inner pattern.
5331  */
5332 static void
5333 flow_dv_translate_item_gre(void *matcher, void *key,
5334                            const struct rte_flow_item *item,
5335                            int inner)
5336 {
5337         const struct rte_flow_item_gre *gre_m = item->mask;
5338         const struct rte_flow_item_gre *gre_v = item->spec;
5339         void *headers_m;
5340         void *headers_v;
5341         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5342         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5343         struct {
5344                 union {
5345                         __extension__
5346                         struct {
5347                                 uint16_t version:3;
5348                                 uint16_t rsvd0:9;
5349                                 uint16_t s_present:1;
5350                                 uint16_t k_present:1;
5351                                 uint16_t rsvd_bit1:1;
5352                                 uint16_t c_present:1;
5353                         };
5354                         uint16_t value;
5355                 };
5356         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5357
5358         if (inner) {
5359                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5360                                          inner_headers);
5361                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5362         } else {
5363                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5364                                          outer_headers);
5365                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5366         }
5367         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5368         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5369         if (!gre_v)
5370                 return;
5371         if (!gre_m)
5372                 gre_m = &rte_flow_item_gre_mask;
5373         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5374                  rte_be_to_cpu_16(gre_m->protocol));
5375         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5376                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5377         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5378         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5379         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5380                  gre_crks_rsvd0_ver_m.c_present);
5381         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5382                  gre_crks_rsvd0_ver_v.c_present &
5383                  gre_crks_rsvd0_ver_m.c_present);
5384         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5385                  gre_crks_rsvd0_ver_m.k_present);
5386         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5387                  gre_crks_rsvd0_ver_v.k_present &
5388                  gre_crks_rsvd0_ver_m.k_present);
5389         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5390                  gre_crks_rsvd0_ver_m.s_present);
5391         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5392                  gre_crks_rsvd0_ver_v.s_present &
5393                  gre_crks_rsvd0_ver_m.s_present);
5394 }
5395
5396 /**
5397  * Add NVGRE item to matcher and to the value.
5398  *
5399  * @param[in, out] matcher
5400  *   Flow matcher.
5401  * @param[in, out] key
5402  *   Flow matcher value.
5403  * @param[in] item
5404  *   Flow pattern to translate.
5405  * @param[in] inner
5406  *   Item is inner pattern.
5407  */
5408 static void
5409 flow_dv_translate_item_nvgre(void *matcher, void *key,
5410                              const struct rte_flow_item *item,
5411                              int inner)
5412 {
5413         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5414         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5415         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5416         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5417         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5418         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5419         char *gre_key_m;
5420         char *gre_key_v;
5421         int size;
5422         int i;
5423
5424         /* For NVGRE, GRE header fields must be set with defined values. */
5425         const struct rte_flow_item_gre gre_spec = {
5426                 .c_rsvd0_ver = RTE_BE16(0x2000),
5427                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5428         };
5429         const struct rte_flow_item_gre gre_mask = {
5430                 .c_rsvd0_ver = RTE_BE16(0xB000),
5431                 .protocol = RTE_BE16(UINT16_MAX),
5432         };
5433         const struct rte_flow_item gre_item = {
5434                 .spec = &gre_spec,
5435                 .mask = &gre_mask,
5436                 .last = NULL,
5437         };
5438         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5439         if (!nvgre_v)
5440                 return;
5441         if (!nvgre_m)
5442                 nvgre_m = &rte_flow_item_nvgre_mask;
5443         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5444         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5445         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5446         memcpy(gre_key_m, tni_flow_id_m, size);
5447         for (i = 0; i < size; ++i)
5448                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5449 }
5450
5451 /**
5452  * Add VXLAN item to matcher and to the value.
5453  *
5454  * @param[in, out] matcher
5455  *   Flow matcher.
5456  * @param[in, out] key
5457  *   Flow matcher value.
5458  * @param[in] item
5459  *   Flow pattern to translate.
5460  * @param[in] inner
5461  *   Item is inner pattern.
5462  */
5463 static void
5464 flow_dv_translate_item_vxlan(void *matcher, void *key,
5465                              const struct rte_flow_item *item,
5466                              int inner)
5467 {
5468         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5469         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5470         void *headers_m;
5471         void *headers_v;
5472         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5473         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5474         char *vni_m;
5475         char *vni_v;
5476         uint16_t dport;
5477         int size;
5478         int i;
5479
5480         if (inner) {
5481                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5482                                          inner_headers);
5483                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5484         } else {
5485                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5486                                          outer_headers);
5487                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5488         }
5489         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5490                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5491         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5492                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5493                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5494         }
5495         if (!vxlan_v)
5496                 return;
5497         if (!vxlan_m)
5498                 vxlan_m = &rte_flow_item_vxlan_mask;
5499         size = sizeof(vxlan_m->vni);
5500         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5501         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5502         memcpy(vni_m, vxlan_m->vni, size);
5503         for (i = 0; i < size; ++i)
5504                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5505 }
5506
5507 /**
5508  * Add Geneve item to matcher and to the value.
5509  *
5510  * @param[in, out] matcher
5511  *   Flow matcher.
5512  * @param[in, out] key
5513  *   Flow matcher value.
5514  * @param[in] item
5515  *   Flow pattern to translate.
5516  * @param[in] inner
5517  *   Item is inner pattern.
5518  */
5519
5520 static void
5521 flow_dv_translate_item_geneve(void *matcher, void *key,
5522                               const struct rte_flow_item *item, int inner)
5523 {
5524         const struct rte_flow_item_geneve *geneve_m = item->mask;
5525         const struct rte_flow_item_geneve *geneve_v = item->spec;
5526         void *headers_m;
5527         void *headers_v;
5528         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5529         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5530         uint16_t dport;
5531         uint16_t gbhdr_m;
5532         uint16_t gbhdr_v;
5533         char *vni_m;
5534         char *vni_v;
5535         size_t size, i;
5536
5537         if (inner) {
5538                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5539                                          inner_headers);
5540                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5541         } else {
5542                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5543                                          outer_headers);
5544                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5545         }
5546         dport = MLX5_UDP_PORT_GENEVE;
5547         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5548                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5549                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5550         }
5551         if (!geneve_v)
5552                 return;
5553         if (!geneve_m)
5554                 geneve_m = &rte_flow_item_geneve_mask;
5555         size = sizeof(geneve_m->vni);
5556         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5557         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5558         memcpy(vni_m, geneve_m->vni, size);
5559         for (i = 0; i < size; ++i)
5560                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5561         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5562                  rte_be_to_cpu_16(geneve_m->protocol));
5563         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5564                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5565         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5566         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5567         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5568                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5569         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5570                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5571         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5572                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5573         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5574                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5575                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5576 }
5577
5578 /**
5579  * Add MPLS item to matcher and to the value.
5580  *
5581  * @param[in, out] matcher
5582  *   Flow matcher.
5583  * @param[in, out] key
5584  *   Flow matcher value.
5585  * @param[in] item
5586  *   Flow pattern to translate.
5587  * @param[in] prev_layer
5588  *   The protocol layer indicated in previous item.
5589  * @param[in] inner
5590  *   Item is inner pattern.
5591  */
5592 static void
5593 flow_dv_translate_item_mpls(void *matcher, void *key,
5594                             const struct rte_flow_item *item,
5595                             uint64_t prev_layer,
5596                             int inner)
5597 {
5598         const uint32_t *in_mpls_m = item->mask;
5599         const uint32_t *in_mpls_v = item->spec;
5600         uint32_t *out_mpls_m = 0;
5601         uint32_t *out_mpls_v = 0;
5602         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5603         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5604         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5605                                      misc_parameters_2);
5606         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5607         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5608         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5609
5610         switch (prev_layer) {
5611         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5612                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5613                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5614                          MLX5_UDP_PORT_MPLS);
5615                 break;
5616         case MLX5_FLOW_LAYER_GRE:
5617                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5618                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5619                          RTE_ETHER_TYPE_MPLS);
5620                 break;
5621         default:
5622                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5623                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5624                          IPPROTO_MPLS);
5625                 break;
5626         }
5627         if (!in_mpls_v)
5628                 return;
5629         if (!in_mpls_m)
5630                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5631         switch (prev_layer) {
5632         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5633                 out_mpls_m =
5634                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5635                                                  outer_first_mpls_over_udp);
5636                 out_mpls_v =
5637                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5638                                                  outer_first_mpls_over_udp);
5639                 break;
5640         case MLX5_FLOW_LAYER_GRE:
5641                 out_mpls_m =
5642                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5643                                                  outer_first_mpls_over_gre);
5644                 out_mpls_v =
5645                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5646                                                  outer_first_mpls_over_gre);
5647                 break;
5648         default:
5649                 /* Inner MPLS not over GRE is not supported. */
5650                 if (!inner) {
5651                         out_mpls_m =
5652                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5653                                                          misc2_m,
5654                                                          outer_first_mpls);
5655                         out_mpls_v =
5656                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5657                                                          misc2_v,
5658                                                          outer_first_mpls);
5659                 }
5660                 break;
5661         }
5662         if (out_mpls_m && out_mpls_v) {
5663                 *out_mpls_m = *in_mpls_m;
5664                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5665         }
5666 }
5667
5668 /**
5669  * Add metadata register item to matcher
5670  *
5671  * @param[in, out] matcher
5672  *   Flow matcher.
5673  * @param[in, out] key
5674  *   Flow matcher value.
5675  * @param[in] reg_type
5676  *   Type of device metadata register
5677  * @param[in] value
5678  *   Register value
5679  * @param[in] mask
5680  *   Register mask
5681  */
5682 static void
5683 flow_dv_match_meta_reg(void *matcher, void *key,
5684                        enum modify_reg reg_type,
5685                        uint32_t data, uint32_t mask)
5686 {
5687         void *misc2_m =
5688                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5689         void *misc2_v =
5690                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5691
5692         data &= mask;
5693         switch (reg_type) {
5694         case REG_A:
5695                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5696                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5697                 break;
5698         case REG_B:
5699                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5700                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5701                 break;
5702         case REG_C_0:
5703                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, mask);
5704                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, data);
5705                 break;
5706         case REG_C_1:
5707                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5708                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5709                 break;
5710         case REG_C_2:
5711                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5712                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5713                 break;
5714         case REG_C_3:
5715                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
5716                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
5717                 break;
5718         case REG_C_4:
5719                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
5720                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
5721                 break;
5722         case REG_C_5:
5723                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
5724                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
5725                 break;
5726         case REG_C_6:
5727                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
5728                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
5729                 break;
5730         case REG_C_7:
5731                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
5732                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
5733                 break;
5734         default:
5735                 assert(false);
5736                 break;
5737         }
5738 }
5739
5740 /**
5741  * Add MARK item to matcher
5742  *
5743  * @param[in] dev
5744  *   The device to configure through.
5745  * @param[in, out] matcher
5746  *   Flow matcher.
5747  * @param[in, out] key
5748  *   Flow matcher value.
5749  * @param[in] item
5750  *   Flow pattern to translate.
5751  */
5752 static void
5753 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
5754                             void *matcher, void *key,
5755                             const struct rte_flow_item *item)
5756 {
5757         struct mlx5_priv *priv = dev->data->dev_private;
5758         const struct rte_flow_item_mark *mark;
5759         uint32_t value;
5760         uint32_t mask;
5761
5762         mark = item->mask ? (const void *)item->mask :
5763                             &rte_flow_item_mark_mask;
5764         mask = mark->id & priv->sh->dv_mark_mask;
5765         mark = (const void *)item->spec;
5766         assert(mark);
5767         value = mark->id & priv->sh->dv_mark_mask & mask;
5768         if (mask) {
5769                 enum modify_reg reg;
5770
5771                 /* Get the metadata register index for the mark. */
5772                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
5773                 assert(reg > 0);
5774                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5775         }
5776 }
5777
5778 /**
5779  * Add META item to matcher
5780  *
5781  * @param[in] dev
5782  *   The devich to configure through.
5783  * @param[in, out] matcher
5784  *   Flow matcher.
5785  * @param[in, out] key
5786  *   Flow matcher value.
5787  * @param[in] attr
5788  *   Attributes of flow that includes this item.
5789  * @param[in] item
5790  *   Flow pattern to translate.
5791  */
5792 static void
5793 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
5794                             void *matcher, void *key,
5795                             const struct rte_flow_attr *attr,
5796                             const struct rte_flow_item *item)
5797 {
5798         const struct rte_flow_item_meta *meta_m;
5799         const struct rte_flow_item_meta *meta_v;
5800
5801         meta_m = (const void *)item->mask;
5802         if (!meta_m)
5803                 meta_m = &rte_flow_item_meta_mask;
5804         meta_v = (const void *)item->spec;
5805         if (meta_v) {
5806                 enum modify_reg reg;
5807                 uint32_t value = meta_v->data;
5808                 uint32_t mask = meta_m->data;
5809
5810                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
5811                 if (reg < 0)
5812                         return;
5813                 /*
5814                  * In datapath code there is no endianness
5815                  * coversions for perfromance reasons, all
5816                  * pattern conversions are done in rte_flow.
5817                  */
5818                 value = rte_cpu_to_be_32(value);
5819                 mask = rte_cpu_to_be_32(mask);
5820                 if (reg == REG_C_0) {
5821                         struct mlx5_priv *priv = dev->data->dev_private;
5822                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
5823                         uint32_t shl_c0 = rte_bsf32(msk_c0);
5824
5825                         msk_c0 = rte_cpu_to_be_32(msk_c0);
5826                         value <<= shl_c0;
5827                         mask <<= shl_c0;
5828                         assert(msk_c0);
5829                         assert(!(~msk_c0 & mask));
5830                 }
5831                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5832         }
5833 }
5834
5835 /**
5836  * Add vport metadata Reg C0 item to matcher
5837  *
5838  * @param[in, out] matcher
5839  *   Flow matcher.
5840  * @param[in, out] key
5841  *   Flow matcher value.
5842  * @param[in] reg
5843  *   Flow pattern to translate.
5844  */
5845 static void
5846 flow_dv_translate_item_meta_vport(void *matcher, void *key,
5847                                   uint32_t value, uint32_t mask)
5848 {
5849         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
5850 }
5851
5852 /**
5853  * Add tag item to matcher
5854  *
5855  * @param[in, out] matcher
5856  *   Flow matcher.
5857  * @param[in, out] key
5858  *   Flow matcher value.
5859  * @param[in] item
5860  *   Flow pattern to translate.
5861  */
5862 static void
5863 flow_dv_translate_mlx5_item_tag(void *matcher, void *key,
5864                                 const struct rte_flow_item *item)
5865 {
5866         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
5867         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
5868
5869         assert(tag_v);
5870         flow_dv_match_meta_reg(matcher, key, tag_v->id, tag_v->data,
5871                                tag_m ? tag_m->data : UINT32_MAX);
5872 }
5873
5874 /**
5875  * Add TAG item to matcher
5876  *
5877  * @param[in] dev
5878  *   The devich to configure through.
5879  * @param[in, out] matcher
5880  *   Flow matcher.
5881  * @param[in, out] key
5882  *   Flow matcher value.
5883  * @param[in] item
5884  *   Flow pattern to translate.
5885  */
5886 static void
5887 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
5888                            void *matcher, void *key,
5889                            const struct rte_flow_item *item)
5890 {
5891         const struct rte_flow_item_tag *tag_v = item->spec;
5892         const struct rte_flow_item_tag *tag_m = item->mask;
5893         enum modify_reg reg;
5894
5895         assert(tag_v);
5896         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
5897         /* Get the metadata register index for the tag. */
5898         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
5899         assert(reg > 0);
5900         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
5901 }
5902
5903 /**
5904  * Add source vport match to the specified matcher.
5905  *
5906  * @param[in, out] matcher
5907  *   Flow matcher.
5908  * @param[in, out] key
5909  *   Flow matcher value.
5910  * @param[in] port
5911  *   Source vport value to match
5912  * @param[in] mask
5913  *   Mask
5914  */
5915 static void
5916 flow_dv_translate_item_source_vport(void *matcher, void *key,
5917                                     int16_t port, uint16_t mask)
5918 {
5919         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5920         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5921
5922         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
5923         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
5924 }
5925
5926 /**
5927  * Translate port-id item to eswitch match on  port-id.
5928  *
5929  * @param[in] dev
5930  *   The devich to configure through.
5931  * @param[in, out] matcher
5932  *   Flow matcher.
5933  * @param[in, out] key
5934  *   Flow matcher value.
5935  * @param[in] item
5936  *   Flow pattern to translate.
5937  *
5938  * @return
5939  *   0 on success, a negative errno value otherwise.
5940  */
5941 static int
5942 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
5943                                void *key, const struct rte_flow_item *item)
5944 {
5945         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
5946         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
5947         struct mlx5_priv *priv;
5948         uint16_t mask, id;
5949
5950         mask = pid_m ? pid_m->id : 0xffff;
5951         id = pid_v ? pid_v->id : dev->data->port_id;
5952         priv = mlx5_port_to_eswitch_info(id, item == NULL);
5953         if (!priv)
5954                 return -rte_errno;
5955         /* Translate to vport field or to metadata, depending on mode. */
5956         if (priv->vport_meta_mask)
5957                 flow_dv_translate_item_meta_vport(matcher, key,
5958                                                   priv->vport_meta_tag,
5959                                                   priv->vport_meta_mask);
5960         else
5961                 flow_dv_translate_item_source_vport(matcher, key,
5962                                                     priv->vport_id, mask);
5963         return 0;
5964 }
5965
5966 /**
5967  * Add ICMP6 item to matcher and to the value.
5968  *
5969  * @param[in, out] matcher
5970  *   Flow matcher.
5971  * @param[in, out] key
5972  *   Flow matcher value.
5973  * @param[in] item
5974  *   Flow pattern to translate.
5975  * @param[in] inner
5976  *   Item is inner pattern.
5977  */
5978 static void
5979 flow_dv_translate_item_icmp6(void *matcher, void *key,
5980                               const struct rte_flow_item *item,
5981                               int inner)
5982 {
5983         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
5984         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
5985         void *headers_m;
5986         void *headers_v;
5987         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
5988                                      misc_parameters_3);
5989         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
5990         if (inner) {
5991                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5992                                          inner_headers);
5993                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5994         } else {
5995                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5996                                          outer_headers);
5997                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5998         }
5999         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6000         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6001         if (!icmp6_v)
6002                 return;
6003         if (!icmp6_m)
6004                 icmp6_m = &rte_flow_item_icmp6_mask;
6005         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6006         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6007                  icmp6_v->type & icmp6_m->type);
6008         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6009         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6010                  icmp6_v->code & icmp6_m->code);
6011 }
6012
6013 /**
6014  * Add ICMP item to matcher and to the value.
6015  *
6016  * @param[in, out] matcher
6017  *   Flow matcher.
6018  * @param[in, out] key
6019  *   Flow matcher value.
6020  * @param[in] item
6021  *   Flow pattern to translate.
6022  * @param[in] inner
6023  *   Item is inner pattern.
6024  */
6025 static void
6026 flow_dv_translate_item_icmp(void *matcher, void *key,
6027                             const struct rte_flow_item *item,
6028                             int inner)
6029 {
6030         const struct rte_flow_item_icmp *icmp_m = item->mask;
6031         const struct rte_flow_item_icmp *icmp_v = item->spec;
6032         void *headers_m;
6033         void *headers_v;
6034         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6035                                      misc_parameters_3);
6036         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6037         if (inner) {
6038                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6039                                          inner_headers);
6040                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6041         } else {
6042                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6043                                          outer_headers);
6044                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6045         }
6046         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6047         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6048         if (!icmp_v)
6049                 return;
6050         if (!icmp_m)
6051                 icmp_m = &rte_flow_item_icmp_mask;
6052         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6053                  icmp_m->hdr.icmp_type);
6054         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6055                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6056         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6057                  icmp_m->hdr.icmp_code);
6058         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6059                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6060 }
6061
6062 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6063
6064 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6065         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6066                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6067
6068 /**
6069  * Calculate flow matcher enable bitmap.
6070  *
6071  * @param match_criteria
6072  *   Pointer to flow matcher criteria.
6073  *
6074  * @return
6075  *   Bitmap of enabled fields.
6076  */
6077 static uint8_t
6078 flow_dv_matcher_enable(uint32_t *match_criteria)
6079 {
6080         uint8_t match_criteria_enable;
6081
6082         match_criteria_enable =
6083                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6084                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6085         match_criteria_enable |=
6086                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6087                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6088         match_criteria_enable |=
6089                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6090                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6091         match_criteria_enable |=
6092                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6093                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6094         match_criteria_enable |=
6095                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6096                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6097         return match_criteria_enable;
6098 }
6099
6100
6101 /**
6102  * Get a flow table.
6103  *
6104  * @param dev[in, out]
6105  *   Pointer to rte_eth_dev structure.
6106  * @param[in] table_id
6107  *   Table id to use.
6108  * @param[in] egress
6109  *   Direction of the table.
6110  * @param[in] transfer
6111  *   E-Switch or NIC flow.
6112  * @param[out] error
6113  *   pointer to error structure.
6114  *
6115  * @return
6116  *   Returns tables resource based on the index, NULL in case of failed.
6117  */
6118 static struct mlx5_flow_tbl_resource *
6119 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6120                          uint32_t table_id, uint8_t egress,
6121                          uint8_t transfer,
6122                          struct rte_flow_error *error)
6123 {
6124         struct mlx5_priv *priv = dev->data->dev_private;
6125         struct mlx5_ibv_shared *sh = priv->sh;
6126         struct mlx5_flow_tbl_resource *tbl;
6127
6128 #ifdef HAVE_MLX5DV_DR
6129         if (transfer) {
6130                 tbl = &sh->fdb_tbl[table_id];
6131                 if (!tbl->obj)
6132                         tbl->obj = mlx5_glue->dr_create_flow_tbl
6133                                 (sh->fdb_domain, table_id);
6134         } else if (egress) {
6135                 tbl = &sh->tx_tbl[table_id];
6136                 if (!tbl->obj)
6137                         tbl->obj = mlx5_glue->dr_create_flow_tbl
6138                                 (sh->tx_domain, table_id);
6139         } else {
6140                 tbl = &sh->rx_tbl[table_id];
6141                 if (!tbl->obj)
6142                         tbl->obj = mlx5_glue->dr_create_flow_tbl
6143                                 (sh->rx_domain, table_id);
6144         }
6145         if (!tbl->obj) {
6146                 rte_flow_error_set(error, ENOMEM,
6147                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6148                                    NULL, "cannot create table");
6149                 return NULL;
6150         }
6151         rte_atomic32_inc(&tbl->refcnt);
6152         return tbl;
6153 #else
6154         (void)error;
6155         (void)tbl;
6156         if (transfer)
6157                 return &sh->fdb_tbl[table_id];
6158         else if (egress)
6159                 return &sh->tx_tbl[table_id];
6160         else
6161                 return &sh->rx_tbl[table_id];
6162 #endif
6163 }
6164
6165 /**
6166  * Release a flow table.
6167  *
6168  * @param[in] tbl
6169  *   Table resource to be released.
6170  *
6171  * @return
6172  *   Returns 0 if table was released, else return 1;
6173  */
6174 static int
6175 flow_dv_tbl_resource_release(struct mlx5_flow_tbl_resource *tbl)
6176 {
6177         if (!tbl)
6178                 return 0;
6179         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6180                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6181                 tbl->obj = NULL;
6182                 return 0;
6183         }
6184         return 1;
6185 }
6186
6187 /**
6188  * Register the flow matcher.
6189  *
6190  * @param dev[in, out]
6191  *   Pointer to rte_eth_dev structure.
6192  * @param[in, out] matcher
6193  *   Pointer to flow matcher.
6194  * @parm[in, out] dev_flow
6195  *   Pointer to the dev_flow.
6196  * @param[out] error
6197  *   pointer to error structure.
6198  *
6199  * @return
6200  *   0 on success otherwise -errno and errno is set.
6201  */
6202 static int
6203 flow_dv_matcher_register(struct rte_eth_dev *dev,
6204                          struct mlx5_flow_dv_matcher *matcher,
6205                          struct mlx5_flow *dev_flow,
6206                          struct rte_flow_error *error)
6207 {
6208         struct mlx5_priv *priv = dev->data->dev_private;
6209         struct mlx5_ibv_shared *sh = priv->sh;
6210         struct mlx5_flow_dv_matcher *cache_matcher;
6211         struct mlx5dv_flow_matcher_attr dv_attr = {
6212                 .type = IBV_FLOW_ATTR_NORMAL,
6213                 .match_mask = (void *)&matcher->mask,
6214         };
6215         struct mlx5_flow_tbl_resource *tbl = NULL;
6216
6217         /* Lookup from cache. */
6218         LIST_FOREACH(cache_matcher, &sh->matchers, next) {
6219                 if (matcher->crc == cache_matcher->crc &&
6220                     matcher->priority == cache_matcher->priority &&
6221                     matcher->egress == cache_matcher->egress &&
6222                     matcher->group == cache_matcher->group &&
6223                     matcher->transfer == cache_matcher->transfer &&
6224                     !memcmp((const void *)matcher->mask.buf,
6225                             (const void *)cache_matcher->mask.buf,
6226                             cache_matcher->mask.size)) {
6227                         DRV_LOG(DEBUG,
6228                                 "priority %hd use %s matcher %p: refcnt %d++",
6229                                 cache_matcher->priority,
6230                                 cache_matcher->egress ? "tx" : "rx",
6231                                 (void *)cache_matcher,
6232                                 rte_atomic32_read(&cache_matcher->refcnt));
6233                         rte_atomic32_inc(&cache_matcher->refcnt);
6234                         dev_flow->dv.matcher = cache_matcher;
6235                         return 0;
6236                 }
6237         }
6238         /* Register new matcher. */
6239         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6240         if (!cache_matcher)
6241                 return rte_flow_error_set(error, ENOMEM,
6242                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6243                                           "cannot allocate matcher memory");
6244         tbl = flow_dv_tbl_resource_get(dev, matcher->group,
6245                                        matcher->egress, matcher->transfer,
6246                                        error);
6247         if (!tbl) {
6248                 rte_free(cache_matcher);
6249                 return rte_flow_error_set(error, ENOMEM,
6250                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6251                                           NULL, "cannot create table");
6252         }
6253         *cache_matcher = *matcher;
6254         dv_attr.match_criteria_enable =
6255                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6256         dv_attr.priority = matcher->priority;
6257         if (matcher->egress)
6258                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6259         cache_matcher->matcher_object =
6260                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6261         if (!cache_matcher->matcher_object) {
6262                 rte_free(cache_matcher);
6263 #ifdef HAVE_MLX5DV_DR
6264                 flow_dv_tbl_resource_release(tbl);
6265 #endif
6266                 return rte_flow_error_set(error, ENOMEM,
6267                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6268                                           NULL, "cannot create matcher");
6269         }
6270         rte_atomic32_inc(&cache_matcher->refcnt);
6271         LIST_INSERT_HEAD(&sh->matchers, cache_matcher, next);
6272         dev_flow->dv.matcher = cache_matcher;
6273         DRV_LOG(DEBUG, "priority %hd new %s matcher %p: refcnt %d",
6274                 cache_matcher->priority,
6275                 cache_matcher->egress ? "tx" : "rx", (void *)cache_matcher,
6276                 rte_atomic32_read(&cache_matcher->refcnt));
6277         rte_atomic32_inc(&tbl->refcnt);
6278         return 0;
6279 }
6280
6281 /**
6282  * Find existing tag resource or create and register a new one.
6283  *
6284  * @param dev[in, out]
6285  *   Pointer to rte_eth_dev structure.
6286  * @param[in, out] resource
6287  *   Pointer to tag resource.
6288  * @parm[in, out] dev_flow
6289  *   Pointer to the dev_flow.
6290  * @param[out] error
6291  *   pointer to error structure.
6292  *
6293  * @return
6294  *   0 on success otherwise -errno and errno is set.
6295  */
6296 static int
6297 flow_dv_tag_resource_register
6298                         (struct rte_eth_dev *dev,
6299                          struct mlx5_flow_dv_tag_resource *resource,
6300                          struct mlx5_flow *dev_flow,
6301                          struct rte_flow_error *error)
6302 {
6303         struct mlx5_priv *priv = dev->data->dev_private;
6304         struct mlx5_ibv_shared *sh = priv->sh;
6305         struct mlx5_flow_dv_tag_resource *cache_resource;
6306
6307         /* Lookup a matching resource from cache. */
6308         LIST_FOREACH(cache_resource, &sh->tags, next) {
6309                 if (resource->tag == cache_resource->tag) {
6310                         DRV_LOG(DEBUG, "tag resource %p: refcnt %d++",
6311                                 (void *)cache_resource,
6312                                 rte_atomic32_read(&cache_resource->refcnt));
6313                         rte_atomic32_inc(&cache_resource->refcnt);
6314                         dev_flow->dv.tag_resource = cache_resource;
6315                         return 0;
6316                 }
6317         }
6318         /* Register new  resource. */
6319         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6320         if (!cache_resource)
6321                 return rte_flow_error_set(error, ENOMEM,
6322                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6323                                           "cannot allocate resource memory");
6324         *cache_resource = *resource;
6325         cache_resource->action = mlx5_glue->dv_create_flow_action_tag
6326                 (resource->tag);
6327         if (!cache_resource->action) {
6328                 rte_free(cache_resource);
6329                 return rte_flow_error_set(error, ENOMEM,
6330                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6331                                           NULL, "cannot create action");
6332         }
6333         rte_atomic32_init(&cache_resource->refcnt);
6334         rte_atomic32_inc(&cache_resource->refcnt);
6335         LIST_INSERT_HEAD(&sh->tags, cache_resource, next);
6336         dev_flow->dv.tag_resource = cache_resource;
6337         DRV_LOG(DEBUG, "new tag resource %p: refcnt %d++",
6338                 (void *)cache_resource,
6339                 rte_atomic32_read(&cache_resource->refcnt));
6340         return 0;
6341 }
6342
6343 /**
6344  * Release the tag.
6345  *
6346  * @param dev
6347  *   Pointer to Ethernet device.
6348  * @param flow
6349  *   Pointer to mlx5_flow.
6350  *
6351  * @return
6352  *   1 while a reference on it exists, 0 when freed.
6353  */
6354 static int
6355 flow_dv_tag_release(struct rte_eth_dev *dev,
6356                     struct mlx5_flow_dv_tag_resource *tag)
6357 {
6358         assert(tag);
6359         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6360                 dev->data->port_id, (void *)tag,
6361                 rte_atomic32_read(&tag->refcnt));
6362         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6363                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6364                 LIST_REMOVE(tag, next);
6365                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6366                         dev->data->port_id, (void *)tag);
6367                 rte_free(tag);
6368                 return 0;
6369         }
6370         return 1;
6371 }
6372
6373 /**
6374  * Translate port ID action to vport.
6375  *
6376  * @param[in] dev
6377  *   Pointer to rte_eth_dev structure.
6378  * @param[in] action
6379  *   Pointer to the port ID action.
6380  * @param[out] dst_port_id
6381  *   The target port ID.
6382  * @param[out] error
6383  *   Pointer to the error structure.
6384  *
6385  * @return
6386  *   0 on success, a negative errno value otherwise and rte_errno is set.
6387  */
6388 static int
6389 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6390                                  const struct rte_flow_action *action,
6391                                  uint32_t *dst_port_id,
6392                                  struct rte_flow_error *error)
6393 {
6394         uint32_t port;
6395         struct mlx5_priv *priv;
6396         const struct rte_flow_action_port_id *conf =
6397                         (const struct rte_flow_action_port_id *)action->conf;
6398
6399         port = conf->original ? dev->data->port_id : conf->id;
6400         priv = mlx5_port_to_eswitch_info(port, false);
6401         if (!priv)
6402                 return rte_flow_error_set(error, -rte_errno,
6403                                           RTE_FLOW_ERROR_TYPE_ACTION,
6404                                           NULL,
6405                                           "No eswitch info was found for port");
6406         if (priv->vport_meta_mask)
6407                 *dst_port_id = priv->vport_meta_tag;
6408         else
6409                 *dst_port_id = priv->vport_id;
6410         return 0;
6411 }
6412
6413 /**
6414  * Add Tx queue matcher
6415  *
6416  * @param[in] dev
6417  *   Pointer to the dev struct.
6418  * @param[in, out] matcher
6419  *   Flow matcher.
6420  * @param[in, out] key
6421  *   Flow matcher value.
6422  * @param[in] item
6423  *   Flow pattern to translate.
6424  * @param[in] inner
6425  *   Item is inner pattern.
6426  */
6427 static void
6428 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6429                                 void *matcher, void *key,
6430                                 const struct rte_flow_item *item)
6431 {
6432         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6433         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6434         void *misc_m =
6435                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6436         void *misc_v =
6437                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6438         struct mlx5_txq_ctrl *txq;
6439         uint32_t queue;
6440
6441
6442         queue_m = (const void *)item->mask;
6443         if (!queue_m)
6444                 return;
6445         queue_v = (const void *)item->spec;
6446         if (!queue_v)
6447                 return;
6448         txq = mlx5_txq_get(dev, queue_v->queue);
6449         if (!txq)
6450                 return;
6451         queue = txq->obj->sq->id;
6452         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6453         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6454                  queue & queue_m->queue);
6455         mlx5_txq_release(dev, queue_v->queue);
6456 }
6457
6458 /**
6459  * Fill the flow with DV spec, lock free
6460  * (mutex should be acquired by caller).
6461  *
6462  * @param[in] dev
6463  *   Pointer to rte_eth_dev structure.
6464  * @param[in, out] dev_flow
6465  *   Pointer to the sub flow.
6466  * @param[in] attr
6467  *   Pointer to the flow attributes.
6468  * @param[in] items
6469  *   Pointer to the list of items.
6470  * @param[in] actions
6471  *   Pointer to the list of actions.
6472  * @param[out] error
6473  *   Pointer to the error structure.
6474  *
6475  * @return
6476  *   0 on success, a negative errno value otherwise and rte_errno is set.
6477  */
6478 static int
6479 __flow_dv_translate(struct rte_eth_dev *dev,
6480                     struct mlx5_flow *dev_flow,
6481                     const struct rte_flow_attr *attr,
6482                     const struct rte_flow_item items[],
6483                     const struct rte_flow_action actions[],
6484                     struct rte_flow_error *error)
6485 {
6486         struct mlx5_priv *priv = dev->data->dev_private;
6487         struct mlx5_dev_config *dev_conf = &priv->config;
6488         struct rte_flow *flow = dev_flow->flow;
6489         uint64_t item_flags = 0;
6490         uint64_t last_item = 0;
6491         uint64_t action_flags = 0;
6492         uint64_t priority = attr->priority;
6493         struct mlx5_flow_dv_matcher matcher = {
6494                 .mask = {
6495                         .size = sizeof(matcher.mask.buf),
6496                 },
6497         };
6498         int actions_n = 0;
6499         bool actions_end = false;
6500         struct mlx5_flow_dv_modify_hdr_resource mhdr_res = {
6501                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
6502                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
6503         };
6504         union flow_dv_attr flow_attr = { .attr = 0 };
6505         struct mlx5_flow_dv_tag_resource tag_resource;
6506         uint32_t modify_action_position = UINT32_MAX;
6507         void *match_mask = matcher.mask.buf;
6508         void *match_value = dev_flow->dv.value.buf;
6509         uint8_t next_protocol = 0xff;
6510         struct rte_vlan_hdr vlan = { 0 };
6511         uint32_t table;
6512         int ret = 0;
6513
6514         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
6515                                        &table, error);
6516         if (ret)
6517                 return ret;
6518         dev_flow->group = table;
6519         if (attr->transfer)
6520                 mhdr_res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
6521         if (priority == MLX5_FLOW_PRIO_RSVD)
6522                 priority = dev_conf->flow_prio - 1;
6523         for (; !actions_end ; actions++) {
6524                 const struct rte_flow_action_queue *queue;
6525                 const struct rte_flow_action_rss *rss;
6526                 const struct rte_flow_action *action = actions;
6527                 const struct rte_flow_action_count *count = action->conf;
6528                 const uint8_t *rss_key;
6529                 const struct rte_flow_action_jump *jump_data;
6530                 struct mlx5_flow_dv_jump_tbl_resource jump_tbl_resource;
6531                 struct mlx5_flow_tbl_resource *tbl;
6532                 uint32_t port_id = 0;
6533                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
6534                 int action_type = actions->type;
6535                 const struct rte_flow_action *found_action = NULL;
6536
6537                 switch (action_type) {
6538                 case RTE_FLOW_ACTION_TYPE_VOID:
6539                         break;
6540                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
6541                         if (flow_dv_translate_action_port_id(dev, action,
6542                                                              &port_id, error))
6543                                 return -rte_errno;
6544                         port_id_resource.port_id = port_id;
6545                         if (flow_dv_port_id_action_resource_register
6546                             (dev, &port_id_resource, dev_flow, error))
6547                                 return -rte_errno;
6548                         dev_flow->dv.actions[actions_n++] =
6549                                 dev_flow->dv.port_id_action->action;
6550                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
6551                         break;
6552                 case RTE_FLOW_ACTION_TYPE_FLAG:
6553                         action_flags |= MLX5_FLOW_ACTION_FLAG;
6554                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6555                                 struct rte_flow_action_mark mark = {
6556                                         .id = MLX5_FLOW_MARK_DEFAULT,
6557                                 };
6558
6559                                 if (flow_dv_convert_action_mark(dev, &mark,
6560                                                                 &mhdr_res,
6561                                                                 error))
6562                                         return -rte_errno;
6563                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6564                                 break;
6565                         }
6566                         tag_resource.tag =
6567                                 mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
6568                         if (!dev_flow->dv.tag_resource)
6569                                 if (flow_dv_tag_resource_register
6570                                     (dev, &tag_resource, dev_flow, error))
6571                                         return errno;
6572                         dev_flow->dv.actions[actions_n++] =
6573                                 dev_flow->dv.tag_resource->action;
6574                         break;
6575                 case RTE_FLOW_ACTION_TYPE_MARK:
6576                         action_flags |= MLX5_FLOW_ACTION_MARK;
6577                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6578                                 const struct rte_flow_action_mark *mark =
6579                                         (const struct rte_flow_action_mark *)
6580                                                 actions->conf;
6581
6582                                 if (flow_dv_convert_action_mark(dev, mark,
6583                                                                 &mhdr_res,
6584                                                                 error))
6585                                         return -rte_errno;
6586                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6587                                 break;
6588                         }
6589                         /* Fall-through */
6590                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
6591                         /* Legacy (non-extensive) MARK action. */
6592                         tag_resource.tag = mlx5_flow_mark_set
6593                               (((const struct rte_flow_action_mark *)
6594                                (actions->conf))->id);
6595                         if (!dev_flow->dv.tag_resource)
6596                                 if (flow_dv_tag_resource_register
6597                                     (dev, &tag_resource, dev_flow, error))
6598                                         return errno;
6599                         dev_flow->dv.actions[actions_n++] =
6600                                 dev_flow->dv.tag_resource->action;
6601                         break;
6602                 case RTE_FLOW_ACTION_TYPE_SET_META:
6603                         if (flow_dv_convert_action_set_meta
6604                                 (dev, &mhdr_res, attr,
6605                                  (const struct rte_flow_action_set_meta *)
6606                                   actions->conf, error))
6607                                 return -rte_errno;
6608                         action_flags |= MLX5_FLOW_ACTION_SET_META;
6609                         break;
6610                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
6611                         if (flow_dv_convert_action_set_tag
6612                                 (dev, &mhdr_res,
6613                                  (const struct rte_flow_action_set_tag *)
6614                                   actions->conf, error))
6615                                 return -rte_errno;
6616                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6617                         break;
6618                 case RTE_FLOW_ACTION_TYPE_DROP:
6619                         action_flags |= MLX5_FLOW_ACTION_DROP;
6620                         break;
6621                 case RTE_FLOW_ACTION_TYPE_QUEUE:
6622                         assert(flow->rss.queue);
6623                         queue = actions->conf;
6624                         flow->rss.queue_num = 1;
6625                         (*flow->rss.queue)[0] = queue->index;
6626                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
6627                         break;
6628                 case RTE_FLOW_ACTION_TYPE_RSS:
6629                         assert(flow->rss.queue);
6630                         rss = actions->conf;
6631                         if (flow->rss.queue)
6632                                 memcpy((*flow->rss.queue), rss->queue,
6633                                        rss->queue_num * sizeof(uint16_t));
6634                         flow->rss.queue_num = rss->queue_num;
6635                         /* NULL RSS key indicates default RSS key. */
6636                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
6637                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
6638                         /*
6639                          * rss->level and rss.types should be set in advance
6640                          * when expanding items for RSS.
6641                          */
6642                         action_flags |= MLX5_FLOW_ACTION_RSS;
6643                         break;
6644                 case RTE_FLOW_ACTION_TYPE_COUNT:
6645                         if (!dev_conf->devx) {
6646                                 rte_errno = ENOTSUP;
6647                                 goto cnt_err;
6648                         }
6649                         flow->counter = flow_dv_counter_alloc(dev,
6650                                                               count->shared,
6651                                                               count->id,
6652                                                               dev_flow->group);
6653                         if (flow->counter == NULL)
6654                                 goto cnt_err;
6655                         dev_flow->dv.actions[actions_n++] =
6656                                 flow->counter->action;
6657                         action_flags |= MLX5_FLOW_ACTION_COUNT;
6658                         break;
6659 cnt_err:
6660                         if (rte_errno == ENOTSUP)
6661                                 return rte_flow_error_set
6662                                               (error, ENOTSUP,
6663                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6664                                                NULL,
6665                                                "count action not supported");
6666                         else
6667                                 return rte_flow_error_set
6668                                                 (error, rte_errno,
6669                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6670                                                  action,
6671                                                  "cannot create counter"
6672                                                   " object.");
6673                         break;
6674                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
6675                         dev_flow->dv.actions[actions_n++] =
6676                                                 priv->sh->pop_vlan_action;
6677                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
6678                         break;
6679                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
6680                         flow_dev_get_vlan_info_from_items(items, &vlan);
6681                         vlan.eth_proto = rte_be_to_cpu_16
6682                              ((((const struct rte_flow_action_of_push_vlan *)
6683                                                    actions->conf)->ethertype));
6684                         found_action = mlx5_flow_find_action
6685                                         (actions + 1,
6686                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
6687                         if (found_action)
6688                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6689                         found_action = mlx5_flow_find_action
6690                                         (actions + 1,
6691                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
6692                         if (found_action)
6693                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6694                         if (flow_dv_create_action_push_vlan
6695                                             (dev, attr, &vlan, dev_flow, error))
6696                                 return -rte_errno;
6697                         dev_flow->dv.actions[actions_n++] =
6698                                            dev_flow->dv.push_vlan_res->action;
6699                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
6700                         break;
6701                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
6702                         /* of_vlan_push action handled this action */
6703                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
6704                         break;
6705                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
6706                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
6707                                 break;
6708                         flow_dev_get_vlan_info_from_items(items, &vlan);
6709                         mlx5_update_vlan_vid_pcp(actions, &vlan);
6710                         /* If no VLAN push - this is a modify header action */
6711                         if (flow_dv_convert_action_modify_vlan_vid
6712                                                 (&mhdr_res, actions, error))
6713                                 return -rte_errno;
6714                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
6715                         break;
6716                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
6717                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
6718                         if (flow_dv_create_action_l2_encap(dev, actions,
6719                                                            dev_flow,
6720                                                            attr->transfer,
6721                                                            error))
6722                                 return -rte_errno;
6723                         dev_flow->dv.actions[actions_n++] =
6724                                 dev_flow->dv.encap_decap->verbs_action;
6725                         action_flags |= actions->type ==
6726                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
6727                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
6728                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
6729                         break;
6730                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
6731                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
6732                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
6733                                                            attr->transfer,
6734                                                            error))
6735                                 return -rte_errno;
6736                         dev_flow->dv.actions[actions_n++] =
6737                                 dev_flow->dv.encap_decap->verbs_action;
6738                         action_flags |= actions->type ==
6739                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
6740                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
6741                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
6742                         break;
6743                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
6744                         /* Handle encap with preceding decap. */
6745                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
6746                                 if (flow_dv_create_action_raw_encap
6747                                         (dev, actions, dev_flow, attr, error))
6748                                         return -rte_errno;
6749                                 dev_flow->dv.actions[actions_n++] =
6750                                         dev_flow->dv.encap_decap->verbs_action;
6751                         } else {
6752                                 /* Handle encap without preceding decap. */
6753                                 if (flow_dv_create_action_l2_encap
6754                                     (dev, actions, dev_flow, attr->transfer,
6755                                      error))
6756                                         return -rte_errno;
6757                                 dev_flow->dv.actions[actions_n++] =
6758                                         dev_flow->dv.encap_decap->verbs_action;
6759                         }
6760                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
6761                         break;
6762                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
6763                         /* Check if this decap is followed by encap. */
6764                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
6765                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
6766                                action++) {
6767                         }
6768                         /* Handle decap only if it isn't followed by encap. */
6769                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
6770                                 if (flow_dv_create_action_l2_decap
6771                                     (dev, dev_flow, attr->transfer, error))
6772                                         return -rte_errno;
6773                                 dev_flow->dv.actions[actions_n++] =
6774                                         dev_flow->dv.encap_decap->verbs_action;
6775                         }
6776                         /* If decap is followed by encap, handle it at encap. */
6777                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
6778                         break;
6779                 case RTE_FLOW_ACTION_TYPE_JUMP:
6780                         jump_data = action->conf;
6781                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
6782                                                        jump_data->group, &table,
6783                                                        error);
6784                         if (ret)
6785                                 return ret;
6786                         tbl = flow_dv_tbl_resource_get(dev, table,
6787                                                        attr->egress,
6788                                                        attr->transfer, error);
6789                         if (!tbl)
6790                                 return rte_flow_error_set
6791                                                 (error, errno,
6792                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6793                                                  NULL,
6794                                                  "cannot create jump action.");
6795                         jump_tbl_resource.tbl = tbl;
6796                         if (flow_dv_jump_tbl_resource_register
6797                             (dev, &jump_tbl_resource, dev_flow, error)) {
6798                                 flow_dv_tbl_resource_release(tbl);
6799                                 return rte_flow_error_set
6800                                                 (error, errno,
6801                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6802                                                  NULL,
6803                                                  "cannot create jump action.");
6804                         }
6805                         dev_flow->dv.actions[actions_n++] =
6806                                 dev_flow->dv.jump->action;
6807                         action_flags |= MLX5_FLOW_ACTION_JUMP;
6808                         break;
6809                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
6810                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
6811                         if (flow_dv_convert_action_modify_mac
6812                                         (&mhdr_res, actions, error))
6813                                 return -rte_errno;
6814                         action_flags |= actions->type ==
6815                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
6816                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
6817                                         MLX5_FLOW_ACTION_SET_MAC_DST;
6818                         break;
6819                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
6820                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
6821                         if (flow_dv_convert_action_modify_ipv4
6822                                         (&mhdr_res, actions, error))
6823                                 return -rte_errno;
6824                         action_flags |= actions->type ==
6825                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
6826                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
6827                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
6828                         break;
6829                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
6830                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
6831                         if (flow_dv_convert_action_modify_ipv6
6832                                         (&mhdr_res, actions, error))
6833                                 return -rte_errno;
6834                         action_flags |= actions->type ==
6835                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
6836                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
6837                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
6838                         break;
6839                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
6840                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
6841                         if (flow_dv_convert_action_modify_tp
6842                                         (&mhdr_res, actions, items,
6843                                          &flow_attr, error))
6844                                 return -rte_errno;
6845                         action_flags |= actions->type ==
6846                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
6847                                         MLX5_FLOW_ACTION_SET_TP_SRC :
6848                                         MLX5_FLOW_ACTION_SET_TP_DST;
6849                         break;
6850                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
6851                         if (flow_dv_convert_action_modify_dec_ttl
6852                                         (&mhdr_res, items, &flow_attr, error))
6853                                 return -rte_errno;
6854                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
6855                         break;
6856                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
6857                         if (flow_dv_convert_action_modify_ttl
6858                                         (&mhdr_res, actions, items,
6859                                          &flow_attr, error))
6860                                 return -rte_errno;
6861                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
6862                         break;
6863                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
6864                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
6865                         if (flow_dv_convert_action_modify_tcp_seq
6866                                         (&mhdr_res, actions, error))
6867                                 return -rte_errno;
6868                         action_flags |= actions->type ==
6869                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
6870                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
6871                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
6872                         break;
6873
6874                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
6875                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
6876                         if (flow_dv_convert_action_modify_tcp_ack
6877                                         (&mhdr_res, actions, error))
6878                                 return -rte_errno;
6879                         action_flags |= actions->type ==
6880                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
6881                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
6882                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
6883                         break;
6884                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
6885                         if (flow_dv_convert_action_set_reg
6886                                         (&mhdr_res, actions, error))
6887                                 return -rte_errno;
6888                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6889                         break;
6890                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
6891                         if (flow_dv_convert_action_copy_mreg
6892                                         (dev, &mhdr_res, actions, error))
6893                                 return -rte_errno;
6894                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6895                         break;
6896                 case RTE_FLOW_ACTION_TYPE_END:
6897                         actions_end = true;
6898                         if (mhdr_res.actions_num) {
6899                                 /* create modify action if needed. */
6900                                 if (flow_dv_modify_hdr_resource_register
6901                                         (dev, &mhdr_res, dev_flow, error))
6902                                         return -rte_errno;
6903                                 dev_flow->dv.actions[modify_action_position] =
6904                                         dev_flow->dv.modify_hdr->verbs_action;
6905                         }
6906                         break;
6907                 default:
6908                         break;
6909                 }
6910                 if (mhdr_res.actions_num &&
6911                     modify_action_position == UINT32_MAX)
6912                         modify_action_position = actions_n++;
6913         }
6914         dev_flow->dv.actions_n = actions_n;
6915         dev_flow->actions = action_flags;
6916         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6917                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6918                 int item_type = items->type;
6919
6920                 switch (item_type) {
6921                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6922                         flow_dv_translate_item_port_id(dev, match_mask,
6923                                                        match_value, items);
6924                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6925                         break;
6926                 case RTE_FLOW_ITEM_TYPE_ETH:
6927                         flow_dv_translate_item_eth(match_mask, match_value,
6928                                                    items, tunnel);
6929                         matcher.priority = MLX5_PRIORITY_MAP_L2;
6930                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6931                                              MLX5_FLOW_LAYER_OUTER_L2;
6932                         break;
6933                 case RTE_FLOW_ITEM_TYPE_VLAN:
6934                         flow_dv_translate_item_vlan(dev_flow,
6935                                                     match_mask, match_value,
6936                                                     items, tunnel);
6937                         matcher.priority = MLX5_PRIORITY_MAP_L2;
6938                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
6939                                               MLX5_FLOW_LAYER_INNER_VLAN) :
6940                                              (MLX5_FLOW_LAYER_OUTER_L2 |
6941                                               MLX5_FLOW_LAYER_OUTER_VLAN);
6942                         break;
6943                 case RTE_FLOW_ITEM_TYPE_IPV4:
6944                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6945                                                   &item_flags, &tunnel);
6946                         flow_dv_translate_item_ipv4(match_mask, match_value,
6947                                                     items, tunnel,
6948                                                     dev_flow->group);
6949                         matcher.priority = MLX5_PRIORITY_MAP_L3;
6950                         dev_flow->hash_fields |=
6951                                 mlx5_flow_hashfields_adjust
6952                                         (dev_flow, tunnel,
6953                                          MLX5_IPV4_LAYER_TYPES,
6954                                          MLX5_IPV4_IBV_RX_HASH);
6955                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6956                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6957                         if (items->mask != NULL &&
6958                             ((const struct rte_flow_item_ipv4 *)
6959                              items->mask)->hdr.next_proto_id) {
6960                                 next_protocol =
6961                                         ((const struct rte_flow_item_ipv4 *)
6962                                          (items->spec))->hdr.next_proto_id;
6963                                 next_protocol &=
6964                                         ((const struct rte_flow_item_ipv4 *)
6965                                          (items->mask))->hdr.next_proto_id;
6966                         } else {
6967                                 /* Reset for inner layer. */
6968                                 next_protocol = 0xff;
6969                         }
6970                         break;
6971                 case RTE_FLOW_ITEM_TYPE_IPV6:
6972                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6973                                                   &item_flags, &tunnel);
6974                         flow_dv_translate_item_ipv6(match_mask, match_value,
6975                                                     items, tunnel,
6976                                                     dev_flow->group);
6977                         matcher.priority = MLX5_PRIORITY_MAP_L3;
6978                         dev_flow->hash_fields |=
6979                                 mlx5_flow_hashfields_adjust
6980                                         (dev_flow, tunnel,
6981                                          MLX5_IPV6_LAYER_TYPES,
6982                                          MLX5_IPV6_IBV_RX_HASH);
6983                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
6984                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
6985                         if (items->mask != NULL &&
6986                             ((const struct rte_flow_item_ipv6 *)
6987                              items->mask)->hdr.proto) {
6988                                 next_protocol =
6989                                         ((const struct rte_flow_item_ipv6 *)
6990                                          items->spec)->hdr.proto;
6991                                 next_protocol &=
6992                                         ((const struct rte_flow_item_ipv6 *)
6993                                          items->mask)->hdr.proto;
6994                         } else {
6995                                 /* Reset for inner layer. */
6996                                 next_protocol = 0xff;
6997                         }
6998                         break;
6999                 case RTE_FLOW_ITEM_TYPE_TCP:
7000                         flow_dv_translate_item_tcp(match_mask, match_value,
7001                                                    items, tunnel);
7002                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7003                         dev_flow->hash_fields |=
7004                                 mlx5_flow_hashfields_adjust
7005                                         (dev_flow, tunnel, ETH_RSS_TCP,
7006                                          IBV_RX_HASH_SRC_PORT_TCP |
7007                                          IBV_RX_HASH_DST_PORT_TCP);
7008                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7009                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7010                         break;
7011                 case RTE_FLOW_ITEM_TYPE_UDP:
7012                         flow_dv_translate_item_udp(match_mask, match_value,
7013                                                    items, tunnel);
7014                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7015                         dev_flow->hash_fields |=
7016                                 mlx5_flow_hashfields_adjust
7017                                         (dev_flow, tunnel, ETH_RSS_UDP,
7018                                          IBV_RX_HASH_SRC_PORT_UDP |
7019                                          IBV_RX_HASH_DST_PORT_UDP);
7020                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7021                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7022                         break;
7023                 case RTE_FLOW_ITEM_TYPE_GRE:
7024                         flow_dv_translate_item_gre(match_mask, match_value,
7025                                                    items, tunnel);
7026                         last_item = MLX5_FLOW_LAYER_GRE;
7027                         break;
7028                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7029                         flow_dv_translate_item_gre_key(match_mask,
7030                                                        match_value, items);
7031                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7032                         break;
7033                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7034                         flow_dv_translate_item_nvgre(match_mask, match_value,
7035                                                      items, tunnel);
7036                         last_item = MLX5_FLOW_LAYER_GRE;
7037                         break;
7038                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7039                         flow_dv_translate_item_vxlan(match_mask, match_value,
7040                                                      items, tunnel);
7041                         last_item = MLX5_FLOW_LAYER_VXLAN;
7042                         break;
7043                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7044                         flow_dv_translate_item_vxlan(match_mask, match_value,
7045                                                      items, tunnel);
7046                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7047                         break;
7048                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7049                         flow_dv_translate_item_geneve(match_mask, match_value,
7050                                                       items, tunnel);
7051                         last_item = MLX5_FLOW_LAYER_GENEVE;
7052                         break;
7053                 case RTE_FLOW_ITEM_TYPE_MPLS:
7054                         flow_dv_translate_item_mpls(match_mask, match_value,
7055                                                     items, last_item, tunnel);
7056                         last_item = MLX5_FLOW_LAYER_MPLS;
7057                         break;
7058                 case RTE_FLOW_ITEM_TYPE_MARK:
7059                         flow_dv_translate_item_mark(dev, match_mask,
7060                                                     match_value, items);
7061                         last_item = MLX5_FLOW_ITEM_MARK;
7062                         break;
7063                 case RTE_FLOW_ITEM_TYPE_META:
7064                         flow_dv_translate_item_meta(dev, match_mask,
7065                                                     match_value, attr, items);
7066                         last_item = MLX5_FLOW_ITEM_METADATA;
7067                         break;
7068                 case RTE_FLOW_ITEM_TYPE_ICMP:
7069                         flow_dv_translate_item_icmp(match_mask, match_value,
7070                                                     items, tunnel);
7071                         last_item = MLX5_FLOW_LAYER_ICMP;
7072                         break;
7073                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7074                         flow_dv_translate_item_icmp6(match_mask, match_value,
7075                                                       items, tunnel);
7076                         last_item = MLX5_FLOW_LAYER_ICMP6;
7077                         break;
7078                 case RTE_FLOW_ITEM_TYPE_TAG:
7079                         flow_dv_translate_item_tag(dev, match_mask,
7080                                                    match_value, items);
7081                         last_item = MLX5_FLOW_ITEM_TAG;
7082                         break;
7083                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7084                         flow_dv_translate_mlx5_item_tag(match_mask,
7085                                                         match_value, items);
7086                         last_item = MLX5_FLOW_ITEM_TAG;
7087                         break;
7088                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7089                         flow_dv_translate_item_tx_queue(dev, match_mask,
7090                                                         match_value,
7091                                                         items);
7092                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7093                         break;
7094                 default:
7095                         break;
7096                 }
7097                 item_flags |= last_item;
7098         }
7099         /*
7100          * In case of ingress traffic when E-Switch mode is enabled,
7101          * we have two cases where we need to set the source port manually.
7102          * The first one, is in case of Nic steering rule, and the second is
7103          * E-Switch rule where no port_id item was found. In both cases
7104          * the source port is set according the current port in use.
7105          */
7106         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7107             (priv->representor || priv->master)) {
7108                 if (flow_dv_translate_item_port_id(dev, match_mask,
7109                                                    match_value, NULL))
7110                         return -rte_errno;
7111         }
7112         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7113                                          dev_flow->dv.value.buf));
7114         dev_flow->layers = item_flags;
7115         /* Register matcher. */
7116         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7117                                     matcher.mask.size);
7118         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7119                                                      matcher.priority);
7120         matcher.egress = attr->egress;
7121         matcher.group = dev_flow->group;
7122         matcher.transfer = attr->transfer;
7123         if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
7124                 return -rte_errno;
7125         return 0;
7126 }
7127
7128 /**
7129  * Apply the flow to the NIC, lock free,
7130  * (mutex should be acquired by caller).
7131  *
7132  * @param[in] dev
7133  *   Pointer to the Ethernet device structure.
7134  * @param[in, out] flow
7135  *   Pointer to flow structure.
7136  * @param[out] error
7137  *   Pointer to error structure.
7138  *
7139  * @return
7140  *   0 on success, a negative errno value otherwise and rte_errno is set.
7141  */
7142 static int
7143 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7144                 struct rte_flow_error *error)
7145 {
7146         struct mlx5_flow_dv *dv;
7147         struct mlx5_flow *dev_flow;
7148         struct mlx5_priv *priv = dev->data->dev_private;
7149         int n;
7150         int err;
7151
7152         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7153                 dv = &dev_flow->dv;
7154                 n = dv->actions_n;
7155                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7156                         if (dev_flow->transfer) {
7157                                 dv->actions[n++] = priv->sh->esw_drop_action;
7158                         } else {
7159                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7160                                 if (!dv->hrxq) {
7161                                         rte_flow_error_set
7162                                                 (error, errno,
7163                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7164                                                  NULL,
7165                                                  "cannot get drop hash queue");
7166                                         goto error;
7167                                 }
7168                                 dv->actions[n++] = dv->hrxq->action;
7169                         }
7170                 } else if (dev_flow->actions &
7171                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7172                         struct mlx5_hrxq *hrxq;
7173
7174                         assert(flow->rss.queue);
7175                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7176                                              MLX5_RSS_HASH_KEY_LEN,
7177                                              dev_flow->hash_fields,
7178                                              (*flow->rss.queue),
7179                                              flow->rss.queue_num);
7180                         if (!hrxq) {
7181                                 hrxq = mlx5_hrxq_new
7182                                         (dev, flow->rss.key,
7183                                          MLX5_RSS_HASH_KEY_LEN,
7184                                          dev_flow->hash_fields,
7185                                          (*flow->rss.queue),
7186                                          flow->rss.queue_num,
7187                                          !!(dev_flow->layers &
7188                                             MLX5_FLOW_LAYER_TUNNEL));
7189                         }
7190                         if (!hrxq) {
7191                                 rte_flow_error_set
7192                                         (error, rte_errno,
7193                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7194                                          "cannot get hash queue");
7195                                 goto error;
7196                         }
7197                         dv->hrxq = hrxq;
7198                         dv->actions[n++] = dv->hrxq->action;
7199                 }
7200                 dv->flow =
7201                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7202                                                   (void *)&dv->value, n,
7203                                                   dv->actions);
7204                 if (!dv->flow) {
7205                         rte_flow_error_set(error, errno,
7206                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7207                                            NULL,
7208                                            "hardware refuses to create flow");
7209                         goto error;
7210                 }
7211                 if (priv->vmwa_context &&
7212                     dev_flow->dv.vf_vlan.tag &&
7213                     !dev_flow->dv.vf_vlan.created) {
7214                         /*
7215                          * The rule contains the VLAN pattern.
7216                          * For VF we are going to create VLAN
7217                          * interface to make hypervisor set correct
7218                          * e-Switch vport context.
7219                          */
7220                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7221                 }
7222         }
7223         return 0;
7224 error:
7225         err = rte_errno; /* Save rte_errno before cleanup. */
7226         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7227                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7228                 if (dv->hrxq) {
7229                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7230                                 mlx5_hrxq_drop_release(dev);
7231                         else
7232                                 mlx5_hrxq_release(dev, dv->hrxq);
7233                         dv->hrxq = NULL;
7234                 }
7235                 if (dev_flow->dv.vf_vlan.tag &&
7236                     dev_flow->dv.vf_vlan.created)
7237                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7238         }
7239         rte_errno = err; /* Restore rte_errno. */
7240         return -rte_errno;
7241 }
7242
7243 /**
7244  * Release the flow matcher.
7245  *
7246  * @param dev
7247  *   Pointer to Ethernet device.
7248  * @param flow
7249  *   Pointer to mlx5_flow.
7250  *
7251  * @return
7252  *   1 while a reference on it exists, 0 when freed.
7253  */
7254 static int
7255 flow_dv_matcher_release(struct rte_eth_dev *dev,
7256                         struct mlx5_flow *flow)
7257 {
7258         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7259         struct mlx5_priv *priv = dev->data->dev_private;
7260         struct mlx5_ibv_shared *sh = priv->sh;
7261         struct mlx5_flow_tbl_resource *tbl;
7262
7263         assert(matcher->matcher_object);
7264         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7265                 dev->data->port_id, (void *)matcher,
7266                 rte_atomic32_read(&matcher->refcnt));
7267         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7268                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7269                            (matcher->matcher_object));
7270                 LIST_REMOVE(matcher, next);
7271                 if (matcher->egress)
7272                         tbl = &sh->tx_tbl[matcher->group];
7273                 else
7274                         tbl = &sh->rx_tbl[matcher->group];
7275                 flow_dv_tbl_resource_release(tbl);
7276                 rte_free(matcher);
7277                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7278                         dev->data->port_id, (void *)matcher);
7279                 return 0;
7280         }
7281         return 1;
7282 }
7283
7284 /**
7285  * Release an encap/decap resource.
7286  *
7287  * @param flow
7288  *   Pointer to mlx5_flow.
7289  *
7290  * @return
7291  *   1 while a reference on it exists, 0 when freed.
7292  */
7293 static int
7294 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7295 {
7296         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7297                                                 flow->dv.encap_decap;
7298
7299         assert(cache_resource->verbs_action);
7300         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7301                 (void *)cache_resource,
7302                 rte_atomic32_read(&cache_resource->refcnt));
7303         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7304                 claim_zero(mlx5_glue->destroy_flow_action
7305                                 (cache_resource->verbs_action));
7306                 LIST_REMOVE(cache_resource, next);
7307                 rte_free(cache_resource);
7308                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7309                         (void *)cache_resource);
7310                 return 0;
7311         }
7312         return 1;
7313 }
7314
7315 /**
7316  * Release an jump to table action resource.
7317  *
7318  * @param flow
7319  *   Pointer to mlx5_flow.
7320  *
7321  * @return
7322  *   1 while a reference on it exists, 0 when freed.
7323  */
7324 static int
7325 flow_dv_jump_tbl_resource_release(struct mlx5_flow *flow)
7326 {
7327         struct mlx5_flow_dv_jump_tbl_resource *cache_resource =
7328                                                 flow->dv.jump;
7329
7330         assert(cache_resource->action);
7331         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7332                 (void *)cache_resource,
7333                 rte_atomic32_read(&cache_resource->refcnt));
7334         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7335                 claim_zero(mlx5_glue->destroy_flow_action
7336                                 (cache_resource->action));
7337                 LIST_REMOVE(cache_resource, next);
7338                 flow_dv_tbl_resource_release(cache_resource->tbl);
7339                 rte_free(cache_resource);
7340                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7341                         (void *)cache_resource);
7342                 return 0;
7343         }
7344         return 1;
7345 }
7346
7347 /**
7348  * Release a modify-header resource.
7349  *
7350  * @param flow
7351  *   Pointer to mlx5_flow.
7352  *
7353  * @return
7354  *   1 while a reference on it exists, 0 when freed.
7355  */
7356 static int
7357 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7358 {
7359         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7360                                                 flow->dv.modify_hdr;
7361
7362         assert(cache_resource->verbs_action);
7363         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7364                 (void *)cache_resource,
7365                 rte_atomic32_read(&cache_resource->refcnt));
7366         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7367                 claim_zero(mlx5_glue->destroy_flow_action
7368                                 (cache_resource->verbs_action));
7369                 LIST_REMOVE(cache_resource, next);
7370                 rte_free(cache_resource);
7371                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7372                         (void *)cache_resource);
7373                 return 0;
7374         }
7375         return 1;
7376 }
7377
7378 /**
7379  * Release port ID action resource.
7380  *
7381  * @param flow
7382  *   Pointer to mlx5_flow.
7383  *
7384  * @return
7385  *   1 while a reference on it exists, 0 when freed.
7386  */
7387 static int
7388 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7389 {
7390         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7391                 flow->dv.port_id_action;
7392
7393         assert(cache_resource->action);
7394         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7395                 (void *)cache_resource,
7396                 rte_atomic32_read(&cache_resource->refcnt));
7397         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7398                 claim_zero(mlx5_glue->destroy_flow_action
7399                                 (cache_resource->action));
7400                 LIST_REMOVE(cache_resource, next);
7401                 rte_free(cache_resource);
7402                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7403                         (void *)cache_resource);
7404                 return 0;
7405         }
7406         return 1;
7407 }
7408
7409 /**
7410  * Release push vlan action resource.
7411  *
7412  * @param flow
7413  *   Pointer to mlx5_flow.
7414  *
7415  * @return
7416  *   1 while a reference on it exists, 0 when freed.
7417  */
7418 static int
7419 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7420 {
7421         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7422                 flow->dv.push_vlan_res;
7423
7424         assert(cache_resource->action);
7425         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7426                 (void *)cache_resource,
7427                 rte_atomic32_read(&cache_resource->refcnt));
7428         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7429                 claim_zero(mlx5_glue->destroy_flow_action
7430                                 (cache_resource->action));
7431                 LIST_REMOVE(cache_resource, next);
7432                 rte_free(cache_resource);
7433                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7434                         (void *)cache_resource);
7435                 return 0;
7436         }
7437         return 1;
7438 }
7439
7440 /**
7441  * Remove the flow from the NIC but keeps it in memory.
7442  * Lock free, (mutex should be acquired by caller).
7443  *
7444  * @param[in] dev
7445  *   Pointer to Ethernet device.
7446  * @param[in, out] flow
7447  *   Pointer to flow structure.
7448  */
7449 static void
7450 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7451 {
7452         struct mlx5_flow_dv *dv;
7453         struct mlx5_flow *dev_flow;
7454
7455         if (!flow)
7456                 return;
7457         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7458                 dv = &dev_flow->dv;
7459                 if (dv->flow) {
7460                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7461                         dv->flow = NULL;
7462                 }
7463                 if (dv->hrxq) {
7464                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7465                                 mlx5_hrxq_drop_release(dev);
7466                         else
7467                                 mlx5_hrxq_release(dev, dv->hrxq);
7468                         dv->hrxq = NULL;
7469                 }
7470                 if (dev_flow->dv.vf_vlan.tag &&
7471                     dev_flow->dv.vf_vlan.created)
7472                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7473         }
7474 }
7475
7476 /**
7477  * Remove the flow from the NIC and the memory.
7478  * Lock free, (mutex should be acquired by caller).
7479  *
7480  * @param[in] dev
7481  *   Pointer to the Ethernet device structure.
7482  * @param[in, out] flow
7483  *   Pointer to flow structure.
7484  */
7485 static void
7486 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
7487 {
7488         struct mlx5_flow *dev_flow;
7489
7490         if (!flow)
7491                 return;
7492         __flow_dv_remove(dev, flow);
7493         if (flow->counter) {
7494                 flow_dv_counter_release(dev, flow->counter);
7495                 flow->counter = NULL;
7496         }
7497         while (!LIST_EMPTY(&flow->dev_flows)) {
7498                 dev_flow = LIST_FIRST(&flow->dev_flows);
7499                 LIST_REMOVE(dev_flow, next);
7500                 if (dev_flow->dv.matcher)
7501                         flow_dv_matcher_release(dev, dev_flow);
7502                 if (dev_flow->dv.encap_decap)
7503                         flow_dv_encap_decap_resource_release(dev_flow);
7504                 if (dev_flow->dv.modify_hdr)
7505                         flow_dv_modify_hdr_resource_release(dev_flow);
7506                 if (dev_flow->dv.jump)
7507                         flow_dv_jump_tbl_resource_release(dev_flow);
7508                 if (dev_flow->dv.port_id_action)
7509                         flow_dv_port_id_action_resource_release(dev_flow);
7510                 if (dev_flow->dv.push_vlan_res)
7511                         flow_dv_push_vlan_action_resource_release(dev_flow);
7512                 if (dev_flow->dv.tag_resource)
7513                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
7514                 rte_free(dev_flow);
7515         }
7516 }
7517
7518 /**
7519  * Query a dv flow  rule for its statistics via devx.
7520  *
7521  * @param[in] dev
7522  *   Pointer to Ethernet device.
7523  * @param[in] flow
7524  *   Pointer to the sub flow.
7525  * @param[out] data
7526  *   data retrieved by the query.
7527  * @param[out] error
7528  *   Perform verbose error reporting if not NULL.
7529  *
7530  * @return
7531  *   0 on success, a negative errno value otherwise and rte_errno is set.
7532  */
7533 static int
7534 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
7535                     void *data, struct rte_flow_error *error)
7536 {
7537         struct mlx5_priv *priv = dev->data->dev_private;
7538         struct rte_flow_query_count *qc = data;
7539
7540         if (!priv->config.devx)
7541                 return rte_flow_error_set(error, ENOTSUP,
7542                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7543                                           NULL,
7544                                           "counters are not supported");
7545         if (flow->counter) {
7546                 uint64_t pkts, bytes;
7547                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
7548                                                &bytes);
7549
7550                 if (err)
7551                         return rte_flow_error_set(error, -err,
7552                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7553                                         NULL, "cannot read counters");
7554                 qc->hits_set = 1;
7555                 qc->bytes_set = 1;
7556                 qc->hits = pkts - flow->counter->hits;
7557                 qc->bytes = bytes - flow->counter->bytes;
7558                 if (qc->reset) {
7559                         flow->counter->hits = pkts;
7560                         flow->counter->bytes = bytes;
7561                 }
7562                 return 0;
7563         }
7564         return rte_flow_error_set(error, EINVAL,
7565                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7566                                   NULL,
7567                                   "counters are not available");
7568 }
7569
7570 /**
7571  * Query a flow.
7572  *
7573  * @see rte_flow_query()
7574  * @see rte_flow_ops
7575  */
7576 static int
7577 flow_dv_query(struct rte_eth_dev *dev,
7578               struct rte_flow *flow __rte_unused,
7579               const struct rte_flow_action *actions __rte_unused,
7580               void *data __rte_unused,
7581               struct rte_flow_error *error __rte_unused)
7582 {
7583         int ret = -EINVAL;
7584
7585         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7586                 switch (actions->type) {
7587                 case RTE_FLOW_ACTION_TYPE_VOID:
7588                         break;
7589                 case RTE_FLOW_ACTION_TYPE_COUNT:
7590                         ret = flow_dv_query_count(dev, flow, data, error);
7591                         break;
7592                 default:
7593                         return rte_flow_error_set(error, ENOTSUP,
7594                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7595                                                   actions,
7596                                                   "action not supported");
7597                 }
7598         }
7599         return ret;
7600 }
7601
7602 /**
7603  * Destroy the meter table set.
7604  * Lock free, (mutex should be acquired by caller).
7605  *
7606  * @param[in] dev
7607  *   Pointer to Ethernet device.
7608  * @param[in] tbl
7609  *   Pointer to the meter table set.
7610  *
7611  * @return
7612  *   Always 0.
7613  */
7614 static int
7615 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
7616                         struct mlx5_meter_domains_infos *tbl)
7617 {
7618         struct mlx5_priv *priv = dev->data->dev_private;
7619         struct mlx5_meter_domains_infos *mtd =
7620                                 (struct mlx5_meter_domains_infos *)tbl;
7621
7622         if (!mtd || !priv->config.dv_flow_en)
7623                 return 0;
7624         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
7625                 claim_zero(mlx5_glue->dv_destroy_flow
7626                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
7627         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
7628                 claim_zero(mlx5_glue->dv_destroy_flow
7629                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
7630         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
7631                 claim_zero(mlx5_glue->dv_destroy_flow
7632                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
7633         if (mtd->egress.color_matcher)
7634                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7635                           (mtd->egress.color_matcher));
7636         if (mtd->egress.any_matcher)
7637                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7638                           (mtd->egress.any_matcher));
7639         if (mtd->egress.tbl)
7640                 claim_zero(flow_dv_tbl_resource_release(mtd->egress.tbl));
7641         if (mtd->ingress.color_matcher)
7642                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7643                           (mtd->ingress.color_matcher));
7644         if (mtd->ingress.any_matcher)
7645                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7646                           (mtd->ingress.any_matcher));
7647         if (mtd->ingress.tbl)
7648                 claim_zero(flow_dv_tbl_resource_release(mtd->ingress.tbl));
7649         if (mtd->transfer.color_matcher)
7650                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7651                           (mtd->transfer.color_matcher));
7652         if (mtd->transfer.any_matcher)
7653                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7654                           (mtd->transfer.any_matcher));
7655         if (mtd->transfer.tbl)
7656                 claim_zero(flow_dv_tbl_resource_release(mtd->transfer.tbl));
7657         if (mtd->drop_actn)
7658                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
7659         rte_free(mtd);
7660         return 0;
7661 }
7662
7663 /**
7664  * Create specify domain meter table and suffix table.
7665  *
7666  * @param[in] dev
7667  *   Pointer to Ethernet device.
7668  * @param[in,out] mtb
7669  *   Pointer to DV meter table set.
7670  * @param[in] egress
7671  *   Table attribute.
7672  * @param[in] transfer
7673  *   Table attribute.
7674  * @param[in] color_reg_c_idx
7675  *   Reg C index for color match.
7676  *
7677  * @return
7678  *   0 on success, -1 otherwise and rte_errno is set.
7679  */
7680 static int
7681 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
7682                            struct mlx5_meter_domains_infos *mtb,
7683                            uint8_t egress, uint8_t transfer,
7684                            uint32_t color_reg_c_idx)
7685 {
7686         struct mlx5_priv *priv = dev->data->dev_private;
7687         struct mlx5_ibv_shared *sh = priv->sh;
7688         struct mlx5_flow_dv_match_params mask = {
7689                 .size = sizeof(mask.buf),
7690         };
7691         struct mlx5_flow_dv_match_params value = {
7692                 .size = sizeof(value.buf),
7693         };
7694         struct mlx5dv_flow_matcher_attr dv_attr = {
7695                 .type = IBV_FLOW_ATTR_NORMAL,
7696                 .priority = 0,
7697                 .match_criteria_enable = 0,
7698                 .match_mask = (void *)&mask,
7699         };
7700         /*
7701          * Need reserve two actions here. As for the meter flow, the action
7702          * to be performed will be jump or drop. The other reserve action is
7703          * for count.
7704          */
7705 #define METER_ACTIONS 2
7706         void *actions[METER_ACTIONS];
7707         struct mlx5_flow_tbl_resource **sfx_tbl;
7708         struct mlx5_meter_domain_info *dtb;
7709         struct rte_flow_error error;
7710         int i = 0;
7711
7712         if (transfer) {
7713                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
7714                 dtb = &mtb->transfer;
7715         } else if (egress) {
7716                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
7717                 dtb = &mtb->egress;
7718         } else {
7719                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
7720                 dtb = &mtb->ingress;
7721         }
7722         /* If the suffix table in missing, create it. */
7723         if (!(*sfx_tbl)) {
7724                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
7725                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
7726                                                 egress, transfer, &error);
7727                 if (!(*sfx_tbl)) {
7728                         DRV_LOG(ERR, "Failed to create meter suffix table.");
7729                         return -1;
7730                 }
7731         }
7732         /* Create the meter table with METER level. */
7733         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
7734                                             egress, transfer, &error);
7735         if (!dtb->tbl) {
7736                 DRV_LOG(ERR, "Failed to create meter policer table.");
7737                 return -1;
7738         }
7739         /* Create matchers, Any and Color. */
7740         dv_attr.priority = 3;
7741         dv_attr.match_criteria_enable = 0;
7742         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7743                                                              &dv_attr,
7744                                                              dtb->tbl->obj);
7745         if (!dtb->any_matcher) {
7746                 DRV_LOG(ERR, "Failed to create meter"
7747                              " policer default matcher.");
7748                 goto error_exit;
7749         }
7750         dv_attr.priority = 0;
7751         dv_attr.match_criteria_enable =
7752                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
7753         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
7754                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
7755         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7756                                                                &dv_attr,
7757                                                                dtb->tbl->obj);
7758         if (!dtb->color_matcher) {
7759                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
7760                 goto error_exit;
7761         }
7762         actions[i++] = mtb->drop_actn;
7763         /* Default rule: lowest priority, match any, actions: drop. */
7764         dtb->policer_rules[RTE_MTR_DROPPED] =
7765                         mlx5_glue->dv_create_flow(dtb->any_matcher,
7766                                                  (void *)&value, i, actions);
7767         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
7768                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
7769                 goto error_exit;
7770         }
7771         return 0;
7772 error_exit:
7773         return -1;
7774 }
7775
7776 /**
7777  * Create the needed meter and suffix tables.
7778  * Lock free, (mutex should be acquired by caller).
7779  *
7780  * @param[in] dev
7781  *   Pointer to Ethernet device.
7782  *
7783  * @return
7784  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
7785  */
7786 static struct mlx5_meter_domains_infos *
7787 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev)
7788 {
7789         struct mlx5_priv *priv = dev->data->dev_private;
7790         struct mlx5_meter_domains_infos *mtb;
7791         int ret;
7792
7793         if (!priv->mtr_en) {
7794                 rte_errno = ENOTSUP;
7795                 return NULL;
7796         }
7797         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
7798         if (!mtb) {
7799                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
7800                 return NULL;
7801         }
7802         /* Create drop action. */
7803         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
7804         if (!mtb->drop_actn) {
7805                 DRV_LOG(ERR, "Failed to create drop action.");
7806                 goto error_exit;
7807         }
7808         /* Egress meter table. */
7809         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
7810         if (ret) {
7811                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
7812                 goto error_exit;
7813         }
7814         /* Ingress meter table. */
7815         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
7816         if (ret) {
7817                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
7818                 goto error_exit;
7819         }
7820         /* FDB meter table. */
7821         if (priv->config.dv_esw_en) {
7822                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
7823                                                  priv->mtr_color_reg);
7824                 if (ret) {
7825                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
7826                         goto error_exit;
7827                 }
7828         }
7829         return mtb;
7830 error_exit:
7831         flow_dv_destroy_mtr_tbl(dev, mtb);
7832         return NULL;
7833 }
7834
7835 /*
7836  * Mutex-protected thunk to lock-free  __flow_dv_translate().
7837  */
7838 static int
7839 flow_dv_translate(struct rte_eth_dev *dev,
7840                   struct mlx5_flow *dev_flow,
7841                   const struct rte_flow_attr *attr,
7842                   const struct rte_flow_item items[],
7843                   const struct rte_flow_action actions[],
7844                   struct rte_flow_error *error)
7845 {
7846         int ret;
7847
7848         flow_dv_shared_lock(dev);
7849         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
7850         flow_dv_shared_unlock(dev);
7851         return ret;
7852 }
7853
7854 /*
7855  * Mutex-protected thunk to lock-free  __flow_dv_apply().
7856  */
7857 static int
7858 flow_dv_apply(struct rte_eth_dev *dev,
7859               struct rte_flow *flow,
7860               struct rte_flow_error *error)
7861 {
7862         int ret;
7863
7864         flow_dv_shared_lock(dev);
7865         ret = __flow_dv_apply(dev, flow, error);
7866         flow_dv_shared_unlock(dev);
7867         return ret;
7868 }
7869
7870 /*
7871  * Mutex-protected thunk to lock-free __flow_dv_remove().
7872  */
7873 static void
7874 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7875 {
7876         flow_dv_shared_lock(dev);
7877         __flow_dv_remove(dev, flow);
7878         flow_dv_shared_unlock(dev);
7879 }
7880
7881 /*
7882  * Mutex-protected thunk to lock-free __flow_dv_destroy().
7883  */
7884 static void
7885 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
7886 {
7887         flow_dv_shared_lock(dev);
7888         __flow_dv_destroy(dev, flow);
7889         flow_dv_shared_unlock(dev);
7890 }
7891
7892 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
7893         .validate = flow_dv_validate,
7894         .prepare = flow_dv_prepare,
7895         .translate = flow_dv_translate,
7896         .apply = flow_dv_apply,
7897         .remove = flow_dv_remove,
7898         .destroy = flow_dv_destroy,
7899         .query = flow_dv_query,
7900         .create_mtr_tbls = flow_dv_create_mtr_tbl,
7901         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
7902 };
7903
7904 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */