drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include "mlx5.h"
  33 #include "mlx5_defs.h"
  34 #include "mlx5_glue.h"
  35 #include "mlx5_flow.h"
  36 #include "mlx5_prm.h"
  37 #include "mlx5_rxtx.h"
  38
  39 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  40
  41 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  42 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  43 #endif
  44
  45 #ifndef HAVE_MLX5DV_DR_ESWITCH
  46 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  47 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  48 #endif
  49 #endif
  50
  51 #ifndef HAVE_MLX5DV_DR
  52 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  53 #endif
  54
  55 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  56                                           sizeof(struct rte_flow_item_ipv4))
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 /**
  77  * Initialize flow attributes structure according to flow items' types.
  78  *
  79  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  80  * mode. For tunnel mode, the items to be modified are the outermost ones.
  81  *
  82  * @param[in] item
  83  *   Pointer to item specification.
  84  * @param[out] attr
  85  *   Pointer to flow attributes structure.
  86  */
  87 static void
  88 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  89 {
  90         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  91                 switch (item->type) {
  92                 case RTE_FLOW_ITEM_TYPE_IPV4:
  93                         if (!attr->ipv6)
  94                                 attr->ipv4 = 1;
  95                         break;
  96                 case RTE_FLOW_ITEM_TYPE_IPV6:
  97                         if (!attr->ipv4)
  98                                 attr->ipv6 = 1;
  99                         break;
 100                 case RTE_FLOW_ITEM_TYPE_UDP:
 101                         if (!attr->tcp)
 102                                 attr->udp = 1;
 103                         break;
 104                 case RTE_FLOW_ITEM_TYPE_TCP:
 105                         if (!attr->udp)
 106                                 attr->tcp = 1;
 107                         break;
 108                 default:
 109                         break;
 110                 }
 111         }
 112         attr->valid = 1;
 113 }
 114
 115 /**
 116  * Convert rte_mtr_color to mlx5 color.
 117  *
 118  * @param[in] rcol
 119  *   rte_mtr_color.
 120  *
 121  * @return
 122  *   mlx5 color.
 123  */
 124 static int
 125 rte_col_2_mlx5_col(enum rte_color rcol)
 126 {
 127         switch (rcol) {
 128         case RTE_COLOR_GREEN:
 129                 return MLX5_FLOW_COLOR_GREEN;
 130         case RTE_COLOR_YELLOW:
 131                 return MLX5_FLOW_COLOR_YELLOW;
 132         case RTE_COLOR_RED:
 133                 return MLX5_FLOW_COLOR_RED;
 134         default:
 135                 break;
 136         }
 137         return MLX5_FLOW_COLOR_UNDEFINED;
 138 }
 139
 140 struct field_modify_info {
 141         uint32_t size; /* Size of field in protocol header, in bytes. */
 142         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 143         enum mlx5_modification_field id;
 144 };
 145
 146 struct field_modify_info modify_eth[] = {
 147         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 148         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 149         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 150         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 151         {0, 0, 0},
 152 };
 153
 154 struct field_modify_info modify_vlan_out_first_vid[] = {
 155         /* Size in bits !!! */
 156         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 157         {0, 0, 0},
 158 };
 159
 160 struct field_modify_info modify_ipv4[] = {
 161         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 162         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 163         {4, 12, MLX5_MODI_OUT_SIPV4},
 164         {4, 16, MLX5_MODI_OUT_DIPV4},
 165         {0, 0, 0},
 166 };
 167
 168 struct field_modify_info modify_ipv6[] = {
 169         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 170         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 171         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 172         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 173         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 174         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 175         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 176         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 177         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 178         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 179         {0, 0, 0},
 180 };
 181
 182 struct field_modify_info modify_udp[] = {
 183         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 184         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 185         {0, 0, 0},
 186 };
 187
 188 struct field_modify_info modify_tcp[] = {
 189         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 190         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 191         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 192         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 193         {0, 0, 0},
 194 };
 195
 196 static void
 197 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 198                           uint8_t next_protocol, uint64_t *item_flags,
 199                           int *tunnel)
 200 {
 201         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 202                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 203         if (next_protocol == IPPROTO_IPIP) {
 204                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 205                 *tunnel = 1;
 206         }
 207         if (next_protocol == IPPROTO_IPV6) {
 208                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 209                 *tunnel = 1;
 210         }
 211 }
 212
 213 /**
 214  * Acquire the synchronizing object to protect multithreaded access
 215  * to shared dv context. Lock occurs only if context is actually
 216  * shared, i.e. we have multiport IB device and representors are
 217  * created.
 218  *
 219  * @param[in] dev
 220  *   Pointer to the rte_eth_dev structure.
 221  */
 222 static void
 223 flow_dv_shared_lock(struct rte_eth_dev *dev)
 224 {
 225         struct mlx5_priv *priv = dev->data->dev_private;
 226         struct mlx5_ibv_shared *sh = priv->sh;
 227
 228         if (sh->dv_refcnt > 1) {
 229                 int ret;
 230
 231                 ret = pthread_mutex_lock(&sh->dv_mutex);
 232                 assert(!ret);
 233                 (void)ret;
 234         }
 235 }
 236
 237 static void
 238 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 239 {
 240         struct mlx5_priv *priv = dev->data->dev_private;
 241         struct mlx5_ibv_shared *sh = priv->sh;
 242
 243         if (sh->dv_refcnt > 1) {
 244                 int ret;
 245
 246                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 247                 assert(!ret);
 248                 (void)ret;
 249         }
 250 }
 251
 252 /* Update VLAN's VID/PCP based on input rte_flow_action.
 253  *
 254  * @param[in] action
 255  *   Pointer to struct rte_flow_action.
 256  * @param[out] vlan
 257  *   Pointer to struct rte_vlan_hdr.
 258  */
 259 static void
 260 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 261                          struct rte_vlan_hdr *vlan)
 262 {
 263         uint16_t vlan_tci;
 264         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 265                 vlan_tci =
 266                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 267                                                action->conf)->vlan_pcp;
 268                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 269                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 270                 vlan->vlan_tci |= vlan_tci;
 271         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 272                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 273                 vlan->vlan_tci |= rte_be_to_cpu_16
 274                     (((const struct rte_flow_action_of_set_vlan_vid *)
 275                                              action->conf)->vlan_vid);
 276         }
 277 }
 278
 279 /**
 280  * Fetch 1, 2, 3 or 4 byte field from the byte array
 281  * and return as unsigned integer in host-endian format.
 282  *
 283  * @param[in] data
 284  *   Pointer to data array.
 285  * @param[in] size
 286  *   Size of field to extract.
 287  *
 288  * @return
 289  *   converted field in host endian format.
 290  */
 291 static inline uint32_t
 292 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 293 {
 294         uint32_t ret;
 295
 296         switch (size) {
 297         case 1:
 298                 ret = *data;
 299                 break;
 300         case 2:
 301                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 302                 break;
 303         case 3:
 304                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 305                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 306                 break;
 307         case 4:
 308                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 309                 break;
 310         default:
 311                 assert(false);
 312                 ret = 0;
 313                 break;
 314         }
 315         return ret;
 316 }
 317
 318 /**
 319  * Convert modify-header action to DV specification.
 320  *
 321  * Data length of each action is determined by provided field description
 322  * and the item mask. Data bit offset and width of each action is determined
 323  * by provided item mask.
 324  *
 325  * @param[in] item
 326  *   Pointer to item specification.
 327  * @param[in] field
 328  *   Pointer to field modification information.
 329  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 330  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 331  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 332  * @param[in] dcopy
 333  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 334  *   Negative offset value sets the same offset as source offset.
 335  *   size field is ignored, value is taken from source field.
 336  * @param[in,out] resource
 337  *   Pointer to the modify-header resource.
 338  * @param[in] type
 339  *   Type of modification.
 340  * @param[out] error
 341  *   Pointer to the error structure.
 342  *
 343  * @return
 344  *   0 on success, a negative errno value otherwise and rte_errno is set.
 345  */
 346 static int
 347 flow_dv_convert_modify_action(struct rte_flow_item *item,
 348                               struct field_modify_info *field,
 349                               struct field_modify_info *dcopy,
 350                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 351                               uint32_t type, struct rte_flow_error *error)
 352 {
 353         uint32_t i = resource->actions_num;
 354         struct mlx5_modification_cmd *actions = resource->actions;
 355
 356         /*
 357          * The item and mask are provided in big-endian format.
 358          * The fields should be presented as in big-endian format either.
 359          * Mask must be always present, it defines the actual field width.
 360          */
 361         assert(item->mask);
 362         assert(field->size);
 363         do {
 364                 unsigned int size_b;
 365                 unsigned int off_b;
 366                 uint32_t mask;
 367                 uint32_t data;
 368
 369                 if (i >= MLX5_MAX_MODIFY_NUM)
 370                         return rte_flow_error_set(error, EINVAL,
 371                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 372                                  "too many items to modify");
 373                 /* Fetch variable byte size mask from the array. */
 374                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 375                                            field->offset, field->size);
 376                 if (!mask) {
 377                         ++field;
 378                         continue;
 379                 }
 380                 /* Deduce actual data width in bits from mask value. */
 381                 off_b = rte_bsf32(mask);
 382                 size_b = sizeof(uint32_t) * CHAR_BIT -
 383                          off_b - __builtin_clz(mask);
 384                 assert(size_b);
 385                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 386                 actions[i].action_type = type;
 387                 actions[i].field = field->id;
 388                 actions[i].offset = off_b;
 389                 actions[i].length = size_b;
 390                 /* Convert entire record to expected big-endian format. */
 391                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 392                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 393                         assert(dcopy);
 394                         actions[i].dst_field = dcopy->id;
 395                         actions[i].dst_offset =
 396                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 397                         /* Convert entire record to big-endian format. */
 398                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 399                 } else {
 400                         assert(item->spec);
 401                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 402                                                    field->offset, field->size);
 403                         /* Shift out the trailing masked bits from data. */
 404                         data = (data & mask) >> off_b;
 405                         actions[i].data1 = rte_cpu_to_be_32(data);
 406                 }
 407                 ++i;
 408                 ++field;
 409         } while (field->size);
 410         if (resource->actions_num == i)
 411                 return rte_flow_error_set(error, EINVAL,
 412                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 413                                           "invalid modification flow item");
 414         resource->actions_num = i;
 415         return 0;
 416 }
 417
 418 /**
 419  * Convert modify-header set IPv4 address action to DV specification.
 420  *
 421  * @param[in,out] resource
 422  *   Pointer to the modify-header resource.
 423  * @param[in] action
 424  *   Pointer to action specification.
 425  * @param[out] error
 426  *   Pointer to the error structure.
 427  *
 428  * @return
 429  *   0 on success, a negative errno value otherwise and rte_errno is set.
 430  */
 431 static int
 432 flow_dv_convert_action_modify_ipv4
 433                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 434                          const struct rte_flow_action *action,
 435                          struct rte_flow_error *error)
 436 {
 437         const struct rte_flow_action_set_ipv4 *conf =
 438                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 439         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 440         struct rte_flow_item_ipv4 ipv4;
 441         struct rte_flow_item_ipv4 ipv4_mask;
 442
 443         memset(&ipv4, 0, sizeof(ipv4));
 444         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 445         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 446                 ipv4.hdr.src_addr = conf->ipv4_addr;
 447                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 448         } else {
 449                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 450                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 451         }
 452         item.spec = &ipv4;
 453         item.mask = &ipv4_mask;
 454         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 455                                              MLX5_MODIFICATION_TYPE_SET, error);
 456 }
 457
 458 /**
 459  * Convert modify-header set IPv6 address action to DV specification.
 460  *
 461  * @param[in,out] resource
 462  *   Pointer to the modify-header resource.
 463  * @param[in] action
 464  *   Pointer to action specification.
 465  * @param[out] error
 466  *   Pointer to the error structure.
 467  *
 468  * @return
 469  *   0 on success, a negative errno value otherwise and rte_errno is set.
 470  */
 471 static int
 472 flow_dv_convert_action_modify_ipv6
 473                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 474                          const struct rte_flow_action *action,
 475                          struct rte_flow_error *error)
 476 {
 477         const struct rte_flow_action_set_ipv6 *conf =
 478                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 479         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 480         struct rte_flow_item_ipv6 ipv6;
 481         struct rte_flow_item_ipv6 ipv6_mask;
 482
 483         memset(&ipv6, 0, sizeof(ipv6));
 484         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 485         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 486                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 487                        sizeof(ipv6.hdr.src_addr));
 488                 memcpy(&ipv6_mask.hdr.src_addr,
 489                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 490                        sizeof(ipv6.hdr.src_addr));
 491         } else {
 492                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 493                        sizeof(ipv6.hdr.dst_addr));
 494                 memcpy(&ipv6_mask.hdr.dst_addr,
 495                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 496                        sizeof(ipv6.hdr.dst_addr));
 497         }
 498         item.spec = &ipv6;
 499         item.mask = &ipv6_mask;
 500         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 501                                              MLX5_MODIFICATION_TYPE_SET, error);
 502 }
 503
 504 /**
 505  * Convert modify-header set MAC address action to DV specification.
 506  *
 507  * @param[in,out] resource
 508  *   Pointer to the modify-header resource.
 509  * @param[in] action
 510  *   Pointer to action specification.
 511  * @param[out] error
 512  *   Pointer to the error structure.
 513  *
 514  * @return
 515  *   0 on success, a negative errno value otherwise and rte_errno is set.
 516  */
 517 static int
 518 flow_dv_convert_action_modify_mac
 519                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 520                          const struct rte_flow_action *action,
 521                          struct rte_flow_error *error)
 522 {
 523         const struct rte_flow_action_set_mac *conf =
 524                 (const struct rte_flow_action_set_mac *)(action->conf);
 525         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 526         struct rte_flow_item_eth eth;
 527         struct rte_flow_item_eth eth_mask;
 528
 529         memset(&eth, 0, sizeof(eth));
 530         memset(&eth_mask, 0, sizeof(eth_mask));
 531         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 532                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 533                        sizeof(eth.src.addr_bytes));
 534                 memcpy(&eth_mask.src.addr_bytes,
 535                        &rte_flow_item_eth_mask.src.addr_bytes,
 536                        sizeof(eth_mask.src.addr_bytes));
 537         } else {
 538                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 539                        sizeof(eth.dst.addr_bytes));
 540                 memcpy(&eth_mask.dst.addr_bytes,
 541                        &rte_flow_item_eth_mask.dst.addr_bytes,
 542                        sizeof(eth_mask.dst.addr_bytes));
 543         }
 544         item.spec = &eth;
 545         item.mask = &eth_mask;
 546         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 547                                              MLX5_MODIFICATION_TYPE_SET, error);
 548 }
 549
 550 /**
 551  * Convert modify-header set VLAN VID action to DV specification.
 552  *
 553  * @param[in,out] resource
 554  *   Pointer to the modify-header resource.
 555  * @param[in] action
 556  *   Pointer to action specification.
 557  * @param[out] error
 558  *   Pointer to the error structure.
 559  *
 560  * @return
 561  *   0 on success, a negative errno value otherwise and rte_errno is set.
 562  */
 563 static int
 564 flow_dv_convert_action_modify_vlan_vid
 565                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 566                          const struct rte_flow_action *action,
 567                          struct rte_flow_error *error)
 568 {
 569         const struct rte_flow_action_of_set_vlan_vid *conf =
 570                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 571         int i = resource->actions_num;
 572         struct mlx5_modification_cmd *actions = &resource->actions[i];
 573         struct field_modify_info *field = modify_vlan_out_first_vid;
 574
 575         if (i >= MLX5_MAX_MODIFY_NUM)
 576                 return rte_flow_error_set(error, EINVAL,
 577                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 578                          "too many items to modify");
 579         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 580         actions[i].field = field->id;
 581         actions[i].length = field->size;
 582         actions[i].offset = field->offset;
 583         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 584         actions[i].data1 = conf->vlan_vid;
 585         actions[i].data1 = actions[i].data1 << 16;
 586         resource->actions_num = ++i;
 587         return 0;
 588 }
 589
 590 /**
 591  * Convert modify-header set TP action to DV specification.
 592  *
 593  * @param[in,out] resource
 594  *   Pointer to the modify-header resource.
 595  * @param[in] action
 596  *   Pointer to action specification.
 597  * @param[in] items
 598  *   Pointer to rte_flow_item objects list.
 599  * @param[in] attr
 600  *   Pointer to flow attributes structure.
 601  * @param[out] error
 602  *   Pointer to the error structure.
 603  *
 604  * @return
 605  *   0 on success, a negative errno value otherwise and rte_errno is set.
 606  */
 607 static int
 608 flow_dv_convert_action_modify_tp
 609                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 610                          const struct rte_flow_action *action,
 611                          const struct rte_flow_item *items,
 612                          union flow_dv_attr *attr,
 613                          struct rte_flow_error *error)
 614 {
 615         const struct rte_flow_action_set_tp *conf =
 616                 (const struct rte_flow_action_set_tp *)(action->conf);
 617         struct rte_flow_item item;
 618         struct rte_flow_item_udp udp;
 619         struct rte_flow_item_udp udp_mask;
 620         struct rte_flow_item_tcp tcp;
 621         struct rte_flow_item_tcp tcp_mask;
 622         struct field_modify_info *field;
 623
 624         if (!attr->valid)
 625                 flow_dv_attr_init(items, attr);
 626         if (attr->udp) {
 627                 memset(&udp, 0, sizeof(udp));
 628                 memset(&udp_mask, 0, sizeof(udp_mask));
 629                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 630                         udp.hdr.src_port = conf->port;
 631                         udp_mask.hdr.src_port =
 632                                         rte_flow_item_udp_mask.hdr.src_port;
 633                 } else {
 634                         udp.hdr.dst_port = conf->port;
 635                         udp_mask.hdr.dst_port =
 636                                         rte_flow_item_udp_mask.hdr.dst_port;
 637                 }
 638                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 639                 item.spec = &udp;
 640                 item.mask = &udp_mask;
 641                 field = modify_udp;
 642         }
 643         if (attr->tcp) {
 644                 memset(&tcp, 0, sizeof(tcp));
 645                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 646                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 647                         tcp.hdr.src_port = conf->port;
 648                         tcp_mask.hdr.src_port =
 649                                         rte_flow_item_tcp_mask.hdr.src_port;
 650                 } else {
 651                         tcp.hdr.dst_port = conf->port;
 652                         tcp_mask.hdr.dst_port =
 653                                         rte_flow_item_tcp_mask.hdr.dst_port;
 654                 }
 655                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 656                 item.spec = &tcp;
 657                 item.mask = &tcp_mask;
 658                 field = modify_tcp;
 659         }
 660         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 661                                              MLX5_MODIFICATION_TYPE_SET, error);
 662 }
 663
 664 /**
 665  * Convert modify-header set TTL action to DV specification.
 666  *
 667  * @param[in,out] resource
 668  *   Pointer to the modify-header resource.
 669  * @param[in] action
 670  *   Pointer to action specification.
 671  * @param[in] items
 672  *   Pointer to rte_flow_item objects list.
 673  * @param[in] attr
 674  *   Pointer to flow attributes structure.
 675  * @param[out] error
 676  *   Pointer to the error structure.
 677  *
 678  * @return
 679  *   0 on success, a negative errno value otherwise and rte_errno is set.
 680  */
 681 static int
 682 flow_dv_convert_action_modify_ttl
 683                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 684                          const struct rte_flow_action *action,
 685                          const struct rte_flow_item *items,
 686                          union flow_dv_attr *attr,
 687                          struct rte_flow_error *error)
 688 {
 689         const struct rte_flow_action_set_ttl *conf =
 690                 (const struct rte_flow_action_set_ttl *)(action->conf);
 691         struct rte_flow_item item;
 692         struct rte_flow_item_ipv4 ipv4;
 693         struct rte_flow_item_ipv4 ipv4_mask;
 694         struct rte_flow_item_ipv6 ipv6;
 695         struct rte_flow_item_ipv6 ipv6_mask;
 696         struct field_modify_info *field;
 697
 698         if (!attr->valid)
 699                 flow_dv_attr_init(items, attr);
 700         if (attr->ipv4) {
 701                 memset(&ipv4, 0, sizeof(ipv4));
 702                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 703                 ipv4.hdr.time_to_live = conf->ttl_value;
 704                 ipv4_mask.hdr.time_to_live = 0xFF;
 705                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 706                 item.spec = &ipv4;
 707                 item.mask = &ipv4_mask;
 708                 field = modify_ipv4;
 709         }
 710         if (attr->ipv6) {
 711                 memset(&ipv6, 0, sizeof(ipv6));
 712                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 713                 ipv6.hdr.hop_limits = conf->ttl_value;
 714                 ipv6_mask.hdr.hop_limits = 0xFF;
 715                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 716                 item.spec = &ipv6;
 717                 item.mask = &ipv6_mask;
 718                 field = modify_ipv6;
 719         }
 720         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 721                                              MLX5_MODIFICATION_TYPE_SET, error);
 722 }
 723
 724 /**
 725  * Convert modify-header decrement TTL action to DV specification.
 726  *
 727  * @param[in,out] resource
 728  *   Pointer to the modify-header resource.
 729  * @param[in] action
 730  *   Pointer to action specification.
 731  * @param[in] items
 732  *   Pointer to rte_flow_item objects list.
 733  * @param[in] attr
 734  *   Pointer to flow attributes structure.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_dec_ttl
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_item *items,
 745                          union flow_dv_attr *attr,
 746                          struct rte_flow_error *error)
 747 {
 748         struct rte_flow_item item;
 749         struct rte_flow_item_ipv4 ipv4;
 750         struct rte_flow_item_ipv4 ipv4_mask;
 751         struct rte_flow_item_ipv6 ipv6;
 752         struct rte_flow_item_ipv6 ipv6_mask;
 753         struct field_modify_info *field;
 754
 755         if (!attr->valid)
 756                 flow_dv_attr_init(items, attr);
 757         if (attr->ipv4) {
 758                 memset(&ipv4, 0, sizeof(ipv4));
 759                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 760                 ipv4.hdr.time_to_live = 0xFF;
 761                 ipv4_mask.hdr.time_to_live = 0xFF;
 762                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 763                 item.spec = &ipv4;
 764                 item.mask = &ipv4_mask;
 765                 field = modify_ipv4;
 766         }
 767         if (attr->ipv6) {
 768                 memset(&ipv6, 0, sizeof(ipv6));
 769                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 770                 ipv6.hdr.hop_limits = 0xFF;
 771                 ipv6_mask.hdr.hop_limits = 0xFF;
 772                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 773                 item.spec = &ipv6;
 774                 item.mask = &ipv6_mask;
 775                 field = modify_ipv6;
 776         }
 777         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 778                                              MLX5_MODIFICATION_TYPE_ADD, error);
 779 }
 780
 781 /**
 782  * Convert modify-header increment/decrement TCP Sequence number
 783  * to DV specification.
 784  *
 785  * @param[in,out] resource
 786  *   Pointer to the modify-header resource.
 787  * @param[in] action
 788  *   Pointer to action specification.
 789  * @param[out] error
 790  *   Pointer to the error structure.
 791  *
 792  * @return
 793  *   0 on success, a negative errno value otherwise and rte_errno is set.
 794  */
 795 static int
 796 flow_dv_convert_action_modify_tcp_seq
 797                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 798                          const struct rte_flow_action *action,
 799                          struct rte_flow_error *error)
 800 {
 801         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 802         uint64_t value = rte_be_to_cpu_32(*conf);
 803         struct rte_flow_item item;
 804         struct rte_flow_item_tcp tcp;
 805         struct rte_flow_item_tcp tcp_mask;
 806
 807         memset(&tcp, 0, sizeof(tcp));
 808         memset(&tcp_mask, 0, sizeof(tcp_mask));
 809         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 810                 /*
 811                  * The HW has no decrement operation, only increment operation.
 812                  * To simulate decrement X from Y using increment operation
 813                  * we need to add UINT32_MAX X times to Y.
 814                  * Each adding of UINT32_MAX decrements Y by 1.
 815                  */
 816                 value *= UINT32_MAX;
 817         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 818         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 819         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 820         item.spec = &tcp;
 821         item.mask = &tcp_mask;
 822         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 823                                              MLX5_MODIFICATION_TYPE_ADD, error);
 824 }
 825
 826 /**
 827  * Convert modify-header increment/decrement TCP Acknowledgment number
 828  * to DV specification.
 829  *
 830  * @param[in,out] resource
 831  *   Pointer to the modify-header resource.
 832  * @param[in] action
 833  *   Pointer to action specification.
 834  * @param[out] error
 835  *   Pointer to the error structure.
 836  *
 837  * @return
 838  *   0 on success, a negative errno value otherwise and rte_errno is set.
 839  */
 840 static int
 841 flow_dv_convert_action_modify_tcp_ack
 842                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 843                          const struct rte_flow_action *action,
 844                          struct rte_flow_error *error)
 845 {
 846         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 847         uint64_t value = rte_be_to_cpu_32(*conf);
 848         struct rte_flow_item item;
 849         struct rte_flow_item_tcp tcp;
 850         struct rte_flow_item_tcp tcp_mask;
 851
 852         memset(&tcp, 0, sizeof(tcp));
 853         memset(&tcp_mask, 0, sizeof(tcp_mask));
 854         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 855                 /*
 856                  * The HW has no decrement operation, only increment operation.
 857                  * To simulate decrement X from Y using increment operation
 858                  * we need to add UINT32_MAX X times to Y.
 859                  * Each adding of UINT32_MAX decrements Y by 1.
 860                  */
 861                 value *= UINT32_MAX;
 862         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 863         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 864         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 865         item.spec = &tcp;
 866         item.mask = &tcp_mask;
 867         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 868                                              MLX5_MODIFICATION_TYPE_ADD, error);
 869 }
 870
 871 static enum mlx5_modification_field reg_to_field[] = {
 872         [REG_NONE] = MLX5_MODI_OUT_NONE,
 873         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 874         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 875         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 876         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 877         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 878         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 879         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 880         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 881         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 882         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 883 };
 884
 885 /**
 886  * Convert register set to DV specification.
 887  *
 888  * @param[in,out] resource
 889  *   Pointer to the modify-header resource.
 890  * @param[in] action
 891  *   Pointer to action specification.
 892  * @param[out] error
 893  *   Pointer to the error structure.
 894  *
 895  * @return
 896  *   0 on success, a negative errno value otherwise and rte_errno is set.
 897  */
 898 static int
 899 flow_dv_convert_action_set_reg
 900                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 901                          const struct rte_flow_action *action,
 902                          struct rte_flow_error *error)
 903 {
 904         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 905         struct mlx5_modification_cmd *actions = resource->actions;
 906         uint32_t i = resource->actions_num;
 907
 908         if (i >= MLX5_MAX_MODIFY_NUM)
 909                 return rte_flow_error_set(error, EINVAL,
 910                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 911                                           "too many items to modify");
 912         assert(conf->id != REG_NONE);
 913         assert(conf->id < RTE_DIM(reg_to_field));
 914         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 915         actions[i].field = reg_to_field[conf->id];
 916         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 917         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 918         ++i;
 919         resource->actions_num = i;
 920         return 0;
 921 }
 922
 923 /**
 924  * Convert SET_TAG action to DV specification.
 925  *
 926  * @param[in] dev
 927  *   Pointer to the rte_eth_dev structure.
 928  * @param[in,out] resource
 929  *   Pointer to the modify-header resource.
 930  * @param[in] conf
 931  *   Pointer to action specification.
 932  * @param[out] error
 933  *   Pointer to the error structure.
 934  *
 935  * @return
 936  *   0 on success, a negative errno value otherwise and rte_errno is set.
 937  */
 938 static int
 939 flow_dv_convert_action_set_tag
 940                         (struct rte_eth_dev *dev,
 941                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 942                          const struct rte_flow_action_set_tag *conf,
 943                          struct rte_flow_error *error)
 944 {
 945         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 946         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 947         struct rte_flow_item item = {
 948                 .spec = &data,
 949                 .mask = &mask,
 950         };
 951         struct field_modify_info reg_c_x[] = {
 952                 [1] = {0, 0, 0},
 953         };
 954         enum mlx5_modification_field reg_type;
 955         int ret;
 956
 957         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 958         if (ret < 0)
 959                 return ret;
 960         assert(ret != REG_NONE);
 961         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 962         reg_type = reg_to_field[ret];
 963         assert(reg_type > 0);
 964         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 965         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 966                                              MLX5_MODIFICATION_TYPE_SET, error);
 967 }
 968
 969 /**
 970  * Convert internal COPY_REG action to DV specification.
 971  *
 972  * @param[in] dev
 973  *   Pointer to the rte_eth_dev structure.
 974  * @param[in,out] res
 975  *   Pointer to the modify-header resource.
 976  * @param[in] action
 977  *   Pointer to action specification.
 978  * @param[out] error
 979  *   Pointer to the error structure.
 980  *
 981  * @return
 982  *   0 on success, a negative errno value otherwise and rte_errno is set.
 983  */
 984 static int
 985 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 986                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 987                                  const struct rte_flow_action *action,
 988                                  struct rte_flow_error *error)
 989 {
 990         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 991         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 992         struct rte_flow_item item = {
 993                 .spec = NULL,
 994                 .mask = &mask,
 995         };
 996         struct field_modify_info reg_src[] = {
 997                 {4, 0, reg_to_field[conf->src]},
 998                 {0, 0, 0},
 999         };
1000         struct field_modify_info reg_dst = {
1001                 .offset = 0,
1002                 .id = reg_to_field[conf->dst],
1003         };
1004         /* Adjust reg_c[0] usage according to reported mask. */
1005         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1006                 struct mlx5_priv *priv = dev->data->dev_private;
1007                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1008
1009                 assert(reg_c0);
1010                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1011                 if (conf->dst == REG_C_0) {
1012                         /* Copy to reg_c[0], within mask only. */
1013                         reg_dst.offset = rte_bsf32(reg_c0);
1014                         /*
1015                          * Mask is ignoring the enianness, because
1016                          * there is no conversion in datapath.
1017                          */
1018 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1019                         /* Copy from destination lower bits to reg_c[0]. */
1020                         mask = reg_c0 >> reg_dst.offset;
1021 #else
1022                         /* Copy from destination upper bits to reg_c[0]. */
1023                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1024                                           rte_fls_u32(reg_c0));
1025 #endif
1026                 } else {
1027                         mask = rte_cpu_to_be_32(reg_c0);
1028 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1029                         /* Copy from reg_c[0] to destination lower bits. */
1030                         reg_dst.offset = 0;
1031 #else
1032                         /* Copy from reg_c[0] to destination upper bits. */
1033                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1034                                          (rte_fls_u32(reg_c0) -
1035                                           rte_bsf32(reg_c0));
1036 #endif
1037                 }
1038         }
1039         return flow_dv_convert_modify_action(&item,
1040                                              reg_src, &reg_dst, res,
1041                                              MLX5_MODIFICATION_TYPE_COPY,
1042                                              error);
1043 }
1044
1045 /**
1046  * Convert MARK action to DV specification. This routine is used
1047  * in extensive metadata only and requires metadata register to be
1048  * handled. In legacy mode hardware tag resource is engaged.
1049  *
1050  * @param[in] dev
1051  *   Pointer to the rte_eth_dev structure.
1052  * @param[in] conf
1053  *   Pointer to MARK action specification.
1054  * @param[in,out] resource
1055  *   Pointer to the modify-header resource.
1056  * @param[out] error
1057  *   Pointer to the error structure.
1058  *
1059  * @return
1060  *   0 on success, a negative errno value otherwise and rte_errno is set.
1061  */
1062 static int
1063 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1064                             const struct rte_flow_action_mark *conf,
1065                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1066                             struct rte_flow_error *error)
1067 {
1068         struct mlx5_priv *priv = dev->data->dev_private;
1069         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1070                                            priv->sh->dv_mark_mask);
1071         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1072         struct rte_flow_item item = {
1073                 .spec = &data,
1074                 .mask = &mask,
1075         };
1076         struct field_modify_info reg_c_x[] = {
1077                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1078                 {0, 0, 0},
1079         };
1080         int reg;
1081
1082         if (!mask)
1083                 return rte_flow_error_set(error, EINVAL,
1084                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1085                                           NULL, "zero mark action mask");
1086         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1087         if (reg < 0)
1088                 return reg;
1089         assert(reg > 0);
1090         if (reg == REG_C_0) {
1091                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1092                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1093
1094                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1095                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1096                 mask = rte_cpu_to_be_32(mask << shl_c0);
1097         }
1098         reg_c_x[0].id = reg_to_field[reg];
1099         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1100                                              MLX5_MODIFICATION_TYPE_SET, error);
1101 }
1102
1103 /**
1104  * Get metadata register index for specified steering domain.
1105  *
1106  * @param[in] dev
1107  *   Pointer to the rte_eth_dev structure.
1108  * @param[in] attr
1109  *   Attributes of flow to determine steering domain.
1110  * @param[out] error
1111  *   Pointer to the error structure.
1112  *
1113  * @return
1114  *   positive index on success, a negative errno value otherwise
1115  *   and rte_errno is set.
1116  */
1117 static enum modify_reg
1118 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1119                          const struct rte_flow_attr *attr,
1120                          struct rte_flow_error *error)
1121 {
1122         int reg =
1123                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1124                                           MLX5_METADATA_FDB :
1125                                             attr->egress ?
1126                                             MLX5_METADATA_TX :
1127                                             MLX5_METADATA_RX, 0, error);
1128         if (reg < 0)
1129                 return rte_flow_error_set(error,
1130                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1131                                           NULL, "unavailable "
1132                                           "metadata register");
1133         return reg;
1134 }
1135
1136 /**
1137  * Convert SET_META action to DV specification.
1138  *
1139  * @param[in] dev
1140  *   Pointer to the rte_eth_dev structure.
1141  * @param[in,out] resource
1142  *   Pointer to the modify-header resource.
1143  * @param[in] attr
1144  *   Attributes of flow that includes this item.
1145  * @param[in] conf
1146  *   Pointer to action specification.
1147  * @param[out] error
1148  *   Pointer to the error structure.
1149  *
1150  * @return
1151  *   0 on success, a negative errno value otherwise and rte_errno is set.
1152  */
1153 static int
1154 flow_dv_convert_action_set_meta
1155                         (struct rte_eth_dev *dev,
1156                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1157                          const struct rte_flow_attr *attr,
1158                          const struct rte_flow_action_set_meta *conf,
1159                          struct rte_flow_error *error)
1160 {
1161         uint32_t data = conf->data;
1162         uint32_t mask = conf->mask;
1163         struct rte_flow_item item = {
1164                 .spec = &data,
1165                 .mask = &mask,
1166         };
1167         struct field_modify_info reg_c_x[] = {
1168                 [1] = {0, 0, 0},
1169         };
1170         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1171
1172         if (reg < 0)
1173                 return reg;
1174         /*
1175          * In datapath code there is no endianness
1176          * coversions for perfromance reasons, all
1177          * pattern conversions are done in rte_flow.
1178          */
1179         if (reg == REG_C_0) {
1180                 struct mlx5_priv *priv = dev->data->dev_private;
1181                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1182                 uint32_t shl_c0;
1183
1184                 assert(msk_c0);
1185 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1186                 shl_c0 = rte_bsf32(msk_c0);
1187 #else
1188                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1189 #endif
1190                 mask <<= shl_c0;
1191                 data <<= shl_c0;
1192                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1193         }
1194         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1195         /* The routine expects parameters in memory as big-endian ones. */
1196         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1197                                              MLX5_MODIFICATION_TYPE_SET, error);
1198 }
1199
1200 /**
1201  * Convert modify-header set IPv4 DSCP action to DV specification.
1202  *
1203  * @param[in,out] resource
1204  *   Pointer to the modify-header resource.
1205  * @param[in] action
1206  *   Pointer to action specification.
1207  * @param[out] error
1208  *   Pointer to the error structure.
1209  *
1210  * @return
1211  *   0 on success, a negative errno value otherwise and rte_errno is set.
1212  */
1213 static int
1214 flow_dv_convert_action_modify_ipv4_dscp
1215                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1216                          const struct rte_flow_action *action,
1217                          struct rte_flow_error *error)
1218 {
1219         const struct rte_flow_action_set_dscp *conf =
1220                 (const struct rte_flow_action_set_dscp *)(action->conf);
1221         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1222         struct rte_flow_item_ipv4 ipv4;
1223         struct rte_flow_item_ipv4 ipv4_mask;
1224
1225         memset(&ipv4, 0, sizeof(ipv4));
1226         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1227         ipv4.hdr.type_of_service = conf->dscp;
1228         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1229         item.spec = &ipv4;
1230         item.mask = &ipv4_mask;
1231         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1232                                              MLX5_MODIFICATION_TYPE_SET, error);
1233 }
1234
1235 /**
1236  * Convert modify-header set IPv6 DSCP action to DV specification.
1237  *
1238  * @param[in,out] resource
1239  *   Pointer to the modify-header resource.
1240  * @param[in] action
1241  *   Pointer to action specification.
1242  * @param[out] error
1243  *   Pointer to the error structure.
1244  *
1245  * @return
1246  *   0 on success, a negative errno value otherwise and rte_errno is set.
1247  */
1248 static int
1249 flow_dv_convert_action_modify_ipv6_dscp
1250                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1251                          const struct rte_flow_action *action,
1252                          struct rte_flow_error *error)
1253 {
1254         const struct rte_flow_action_set_dscp *conf =
1255                 (const struct rte_flow_action_set_dscp *)(action->conf);
1256         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1257         struct rte_flow_item_ipv6 ipv6;
1258         struct rte_flow_item_ipv6 ipv6_mask;
1259
1260         memset(&ipv6, 0, sizeof(ipv6));
1261         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1262         /*
1263          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1264          * rdma-core only accept the DSCP bits byte aligned start from
1265          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1266          * bits in IPv6 case as rdma-core requires byte aligned value.
1267          */
1268         ipv6.hdr.vtc_flow = conf->dscp;
1269         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1270         item.spec = &ipv6;
1271         item.mask = &ipv6_mask;
1272         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1273                                              MLX5_MODIFICATION_TYPE_SET, error);
1274 }
1275
1276 /**
1277  * Validate MARK item.
1278  *
1279  * @param[in] dev
1280  *   Pointer to the rte_eth_dev structure.
1281  * @param[in] item
1282  *   Item specification.
1283  * @param[in] attr
1284  *   Attributes of flow that includes this item.
1285  * @param[out] error
1286  *   Pointer to error structure.
1287  *
1288  * @return
1289  *   0 on success, a negative errno value otherwise and rte_errno is set.
1290  */
1291 static int
1292 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1293                            const struct rte_flow_item *item,
1294                            const struct rte_flow_attr *attr __rte_unused,
1295                            struct rte_flow_error *error)
1296 {
1297         struct mlx5_priv *priv = dev->data->dev_private;
1298         struct mlx5_dev_config *config = &priv->config;
1299         const struct rte_flow_item_mark *spec = item->spec;
1300         const struct rte_flow_item_mark *mask = item->mask;
1301         const struct rte_flow_item_mark nic_mask = {
1302                 .id = priv->sh->dv_mark_mask,
1303         };
1304         int ret;
1305
1306         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1307                 return rte_flow_error_set(error, ENOTSUP,
1308                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1309                                           "extended metadata feature"
1310                                           " isn't enabled");
1311         if (!mlx5_flow_ext_mreg_supported(dev))
1312                 return rte_flow_error_set(error, ENOTSUP,
1313                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1314                                           "extended metadata register"
1315                                           " isn't supported");
1316         if (!nic_mask.id)
1317                 return rte_flow_error_set(error, ENOTSUP,
1318                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1319                                           "extended metadata register"
1320                                           " isn't available");
1321         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1322         if (ret < 0)
1323                 return ret;
1324         if (!spec)
1325                 return rte_flow_error_set(error, EINVAL,
1326                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1327                                           item->spec,
1328                                           "data cannot be empty");
1329         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1330                 return rte_flow_error_set(error, EINVAL,
1331                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1332                                           &spec->id,
1333                                           "mark id exceeds the limit");
1334         if (!mask)
1335                 mask = &nic_mask;
1336         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1337                                         (const uint8_t *)&nic_mask,
1338                                         sizeof(struct rte_flow_item_mark),
1339                                         error);
1340         if (ret < 0)
1341                 return ret;
1342         return 0;
1343 }
1344
1345 /**
1346  * Validate META item.
1347  *
1348  * @param[in] dev
1349  *   Pointer to the rte_eth_dev structure.
1350  * @param[in] item
1351  *   Item specification.
1352  * @param[in] attr
1353  *   Attributes of flow that includes this item.
1354  * @param[out] error
1355  *   Pointer to error structure.
1356  *
1357  * @return
1358  *   0 on success, a negative errno value otherwise and rte_errno is set.
1359  */
1360 static int
1361 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1362                            const struct rte_flow_item *item,
1363                            const struct rte_flow_attr *attr,
1364                            struct rte_flow_error *error)
1365 {
1366         struct mlx5_priv *priv = dev->data->dev_private;
1367         struct mlx5_dev_config *config = &priv->config;
1368         const struct rte_flow_item_meta *spec = item->spec;
1369         const struct rte_flow_item_meta *mask = item->mask;
1370         struct rte_flow_item_meta nic_mask = {
1371                 .data = UINT32_MAX
1372         };
1373         int reg;
1374         int ret;
1375
1376         if (!spec)
1377                 return rte_flow_error_set(error, EINVAL,
1378                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1379                                           item->spec,
1380                                           "data cannot be empty");
1381         if (!spec->data)
1382                 return rte_flow_error_set(error, EINVAL,
1383                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1384                                           "data cannot be zero");
1385         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1386                 if (!mlx5_flow_ext_mreg_supported(dev))
1387                         return rte_flow_error_set(error, ENOTSUP,
1388                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1389                                           "extended metadata register"
1390                                           " isn't supported");
1391                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1392                 if (reg < 0)
1393                         return reg;
1394                 if (reg == REG_B)
1395                         return rte_flow_error_set(error, ENOTSUP,
1396                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1397                                           "match on reg_b "
1398                                           "isn't supported");
1399                 if (reg != REG_A)
1400                         nic_mask.data = priv->sh->dv_meta_mask;
1401         }
1402         if (!mask)
1403                 mask = &rte_flow_item_meta_mask;
1404         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1405                                         (const uint8_t *)&nic_mask,
1406                                         sizeof(struct rte_flow_item_meta),
1407                                         error);
1408         return ret;
1409 }
1410
1411 /**
1412  * Validate TAG item.
1413  *
1414  * @param[in] dev
1415  *   Pointer to the rte_eth_dev structure.
1416  * @param[in] item
1417  *   Item specification.
1418  * @param[in] attr
1419  *   Attributes of flow that includes this item.
1420  * @param[out] error
1421  *   Pointer to error structure.
1422  *
1423  * @return
1424  *   0 on success, a negative errno value otherwise and rte_errno is set.
1425  */
1426 static int
1427 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1428                           const struct rte_flow_item *item,
1429                           const struct rte_flow_attr *attr __rte_unused,
1430                           struct rte_flow_error *error)
1431 {
1432         const struct rte_flow_item_tag *spec = item->spec;
1433         const struct rte_flow_item_tag *mask = item->mask;
1434         const struct rte_flow_item_tag nic_mask = {
1435                 .data = RTE_BE32(UINT32_MAX),
1436                 .index = 0xff,
1437         };
1438         int ret;
1439
1440         if (!mlx5_flow_ext_mreg_supported(dev))
1441                 return rte_flow_error_set(error, ENOTSUP,
1442                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1443                                           "extensive metadata register"
1444                                           " isn't supported");
1445         if (!spec)
1446                 return rte_flow_error_set(error, EINVAL,
1447                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1448                                           item->spec,
1449                                           "data cannot be empty");
1450         if (!mask)
1451                 mask = &rte_flow_item_tag_mask;
1452         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1453                                         (const uint8_t *)&nic_mask,
1454                                         sizeof(struct rte_flow_item_tag),
1455                                         error);
1456         if (ret < 0)
1457                 return ret;
1458         if (mask->index != 0xff)
1459                 return rte_flow_error_set(error, EINVAL,
1460                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1461                                           "partial mask for tag index"
1462                                           " is not supported");
1463         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1464         if (ret < 0)
1465                 return ret;
1466         assert(ret != REG_NONE);
1467         return 0;
1468 }
1469
1470 /**
1471  * Validate vport item.
1472  *
1473  * @param[in] dev
1474  *   Pointer to the rte_eth_dev structure.
1475  * @param[in] item
1476  *   Item specification.
1477  * @param[in] attr
1478  *   Attributes of flow that includes this item.
1479  * @param[in] item_flags
1480  *   Bit-fields that holds the items detected until now.
1481  * @param[out] error
1482  *   Pointer to error structure.
1483  *
1484  * @return
1485  *   0 on success, a negative errno value otherwise and rte_errno is set.
1486  */
1487 static int
1488 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1489                               const struct rte_flow_item *item,
1490                               const struct rte_flow_attr *attr,
1491                               uint64_t item_flags,
1492                               struct rte_flow_error *error)
1493 {
1494         const struct rte_flow_item_port_id *spec = item->spec;
1495         const struct rte_flow_item_port_id *mask = item->mask;
1496         const struct rte_flow_item_port_id switch_mask = {
1497                         .id = 0xffffffff,
1498         };
1499         struct mlx5_priv *esw_priv;
1500         struct mlx5_priv *dev_priv;
1501         int ret;
1502
1503         if (!attr->transfer)
1504                 return rte_flow_error_set(error, EINVAL,
1505                                           RTE_FLOW_ERROR_TYPE_ITEM,
1506                                           NULL,
1507                                           "match on port id is valid only"
1508                                           " when transfer flag is enabled");
1509         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1510                 return rte_flow_error_set(error, ENOTSUP,
1511                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1512                                           "multiple source ports are not"
1513                                           " supported");
1514         if (!mask)
1515                 mask = &switch_mask;
1516         if (mask->id != 0xffffffff)
1517                 return rte_flow_error_set(error, ENOTSUP,
1518                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1519                                            mask,
1520                                            "no support for partial mask on"
1521                                            " \"id\" field");
1522         ret = mlx5_flow_item_acceptable
1523                                 (item, (const uint8_t *)mask,
1524                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1525                                  sizeof(struct rte_flow_item_port_id),
1526                                  error);
1527         if (ret)
1528                 return ret;
1529         if (!spec)
1530                 return 0;
1531         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1532         if (!esw_priv)
1533                 return rte_flow_error_set(error, rte_errno,
1534                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1535                                           "failed to obtain E-Switch info for"
1536                                           " port");
1537         dev_priv = mlx5_dev_to_eswitch_info(dev);
1538         if (!dev_priv)
1539                 return rte_flow_error_set(error, rte_errno,
1540                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1541                                           NULL,
1542                                           "failed to obtain E-Switch info");
1543         if (esw_priv->domain_id != dev_priv->domain_id)
1544                 return rte_flow_error_set(error, EINVAL,
1545                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1546                                           "cannot match on a port from a"
1547                                           " different E-Switch");
1548         return 0;
1549 }
1550
1551 /**
1552  * Validate GTP item.
1553  *
1554  * @param[in] dev
1555  *   Pointer to the rte_eth_dev structure.
1556  * @param[in] item
1557  *   Item specification.
1558  * @param[in] item_flags
1559  *   Bit-fields that holds the items detected until now.
1560  * @param[out] error
1561  *   Pointer to error structure.
1562  *
1563  * @return
1564  *   0 on success, a negative errno value otherwise and rte_errno is set.
1565  */
1566 static int
1567 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1568                           const struct rte_flow_item *item,
1569                           uint64_t item_flags,
1570                           struct rte_flow_error *error)
1571 {
1572         struct mlx5_priv *priv = dev->data->dev_private;
1573         const struct rte_flow_item_gtp *mask = item->mask;
1574         const struct rte_flow_item_gtp nic_mask = {
1575                 .msg_type = 0xff,
1576                 .teid = RTE_BE32(0xffffffff),
1577         };
1578
1579         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1580                 return rte_flow_error_set(error, ENOTSUP,
1581                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1582                                           "GTP support is not enabled");
1583         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1584                 return rte_flow_error_set(error, ENOTSUP,
1585                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1586                                           "multiple tunnel layers not"
1587                                           " supported");
1588         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1589                 return rte_flow_error_set(error, EINVAL,
1590                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1591                                           "no outer UDP layer found");
1592         if (!mask)
1593                 mask = &rte_flow_item_gtp_mask;
1594         return mlx5_flow_item_acceptable
1595                 (item, (const uint8_t *)mask,
1596                  (const uint8_t *)&nic_mask,
1597                  sizeof(struct rte_flow_item_gtp),
1598                  error);
1599 }
1600
1601 /**
1602  * Validate the pop VLAN action.
1603  *
1604  * @param[in] dev
1605  *   Pointer to the rte_eth_dev structure.
1606  * @param[in] action_flags
1607  *   Holds the actions detected until now.
1608  * @param[in] action
1609  *   Pointer to the pop vlan action.
1610  * @param[in] item_flags
1611  *   The items found in this flow rule.
1612  * @param[in] attr
1613  *   Pointer to flow attributes.
1614  * @param[out] error
1615  *   Pointer to error structure.
1616  *
1617  * @return
1618  *   0 on success, a negative errno value otherwise and rte_errno is set.
1619  */
1620 static int
1621 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1622                                  uint64_t action_flags,
1623                                  const struct rte_flow_action *action,
1624                                  uint64_t item_flags,
1625                                  const struct rte_flow_attr *attr,
1626                                  struct rte_flow_error *error)
1627 {
1628         struct mlx5_priv *priv = dev->data->dev_private;
1629
1630         (void)action;
1631         (void)attr;
1632         if (!priv->sh->pop_vlan_action)
1633                 return rte_flow_error_set(error, ENOTSUP,
1634                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1635                                           NULL,
1636                                           "pop vlan action is not supported");
1637         if (attr->egress)
1638                 return rte_flow_error_set(error, ENOTSUP,
1639                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1640                                           NULL,
1641                                           "pop vlan action not supported for "
1642                                           "egress");
1643         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1644                 return rte_flow_error_set(error, ENOTSUP,
1645                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1646                                           "no support for multiple VLAN "
1647                                           "actions");
1648         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1649                 return rte_flow_error_set(error, ENOTSUP,
1650                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1651                                           NULL,
1652                                           "cannot pop vlan without a "
1653                                           "match on (outer) vlan in the flow");
1654         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1655                 return rte_flow_error_set(error, EINVAL,
1656                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1657                                           "wrong action order, port_id should "
1658                                           "be after pop VLAN action");
1659         return 0;
1660 }
1661
1662 /**
1663  * Get VLAN default info from vlan match info.
1664  *
1665  * @param[in] items
1666  *   the list of item specifications.
1667  * @param[out] vlan
1668  *   pointer VLAN info to fill to.
1669  *
1670  * @return
1671  *   0 on success, a negative errno value otherwise and rte_errno is set.
1672  */
1673 static void
1674 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1675                                   struct rte_vlan_hdr *vlan)
1676 {
1677         const struct rte_flow_item_vlan nic_mask = {
1678                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1679                                 MLX5DV_FLOW_VLAN_VID_MASK),
1680                 .inner_type = RTE_BE16(0xffff),
1681         };
1682
1683         if (items == NULL)
1684                 return;
1685         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1686                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1687                 ;
1688         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1689                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1690                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1691
1692                 if (!vlan_m)
1693                         vlan_m = &nic_mask;
1694                 /* Only full match values are accepted */
1695                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1696                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1697                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1698                         vlan->vlan_tci |=
1699                                 rte_be_to_cpu_16(vlan_v->tci &
1700                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1701                 }
1702                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1703                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1704                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1705                         vlan->vlan_tci |=
1706                                 rte_be_to_cpu_16(vlan_v->tci &
1707                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1708                 }
1709                 if (vlan_m->inner_type == nic_mask.inner_type)
1710                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1711                                                            vlan_m->inner_type);
1712         }
1713 }
1714
1715 /**
1716  * Validate the push VLAN action.
1717  *
1718  * @param[in] action_flags
1719  *   Holds the actions detected until now.
1720  * @param[in] item_flags
1721  *   The items found in this flow rule.
1722  * @param[in] action
1723  *   Pointer to the action structure.
1724  * @param[in] attr
1725  *   Pointer to flow attributes
1726  * @param[out] error
1727  *   Pointer to error structure.
1728  *
1729  * @return
1730  *   0 on success, a negative errno value otherwise and rte_errno is set.
1731  */
1732 static int
1733 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1734                                   uint64_t item_flags __rte_unused,
1735                                   const struct rte_flow_action *action,
1736                                   const struct rte_flow_attr *attr,
1737                                   struct rte_flow_error *error)
1738 {
1739         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1740
1741         if (attr->ingress)
1742                 return rte_flow_error_set(error, ENOTSUP,
1743                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1744                                           NULL,
1745                                           "push VLAN action not supported for "
1746                                           "ingress");
1747         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1748             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1749                 return rte_flow_error_set(error, EINVAL,
1750                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1751                                           "invalid vlan ethertype");
1752         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1753                 return rte_flow_error_set(error, ENOTSUP,
1754                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1755                                           "no support for multiple VLAN "
1756                                           "actions");
1757         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1758                 return rte_flow_error_set(error, EINVAL,
1759                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1760                                           "wrong action order, port_id should "
1761                                           "be after push VLAN");
1762         (void)attr;
1763         return 0;
1764 }
1765
1766 /**
1767  * Validate the set VLAN PCP.
1768  *
1769  * @param[in] action_flags
1770  *   Holds the actions detected until now.
1771  * @param[in] actions
1772  *   Pointer to the list of actions remaining in the flow rule.
1773  * @param[out] error
1774  *   Pointer to error structure.
1775  *
1776  * @return
1777  *   0 on success, a negative errno value otherwise and rte_errno is set.
1778  */
1779 static int
1780 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1781                                      const struct rte_flow_action actions[],
1782                                      struct rte_flow_error *error)
1783 {
1784         const struct rte_flow_action *action = actions;
1785         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1786
1787         if (conf->vlan_pcp > 7)
1788                 return rte_flow_error_set(error, EINVAL,
1789                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1790                                           "VLAN PCP value is too big");
1791         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1792                 return rte_flow_error_set(error, ENOTSUP,
1793                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1794                                           "set VLAN PCP action must follow "
1795                                           "the push VLAN action");
1796         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1797                 return rte_flow_error_set(error, ENOTSUP,
1798                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1799                                           "Multiple VLAN PCP modification are "
1800                                           "not supported");
1801         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1802                 return rte_flow_error_set(error, EINVAL,
1803                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1804                                           "wrong action order, port_id should "
1805                                           "be after set VLAN PCP");
1806         return 0;
1807 }
1808
1809 /**
1810  * Validate the set VLAN VID.
1811  *
1812  * @param[in] item_flags
1813  *   Holds the items detected in this rule.
1814  * @param[in] action_flags
1815  *   Holds the actions detected until now.
1816  * @param[in] actions
1817  *   Pointer to the list of actions remaining in the flow rule.
1818  * @param[out] error
1819  *   Pointer to error structure.
1820  *
1821  * @return
1822  *   0 on success, a negative errno value otherwise and rte_errno is set.
1823  */
1824 static int
1825 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1826                                      uint64_t action_flags,
1827                                      const struct rte_flow_action actions[],
1828                                      struct rte_flow_error *error)
1829 {
1830         const struct rte_flow_action *action = actions;
1831         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1832
1833         if (conf->vlan_vid > RTE_BE16(0xFFE))
1834                 return rte_flow_error_set(error, EINVAL,
1835                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1836                                           "VLAN VID value is too big");
1837         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1838             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1839                 return rte_flow_error_set(error, ENOTSUP,
1840                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1841                                           "set VLAN VID action must follow push"
1842                                           " VLAN action or match on VLAN item");
1843         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1844                 return rte_flow_error_set(error, ENOTSUP,
1845                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1846                                           "Multiple VLAN VID modifications are "
1847                                           "not supported");
1848         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1849                 return rte_flow_error_set(error, EINVAL,
1850                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1851                                           "wrong action order, port_id should "
1852                                           "be after set VLAN VID");
1853         return 0;
1854 }
1855
1856 /*
1857  * Validate the FLAG action.
1858  *
1859  * @param[in] dev
1860  *   Pointer to the rte_eth_dev structure.
1861  * @param[in] action_flags
1862  *   Holds the actions detected until now.
1863  * @param[in] attr
1864  *   Pointer to flow attributes
1865  * @param[out] error
1866  *   Pointer to error structure.
1867  *
1868  * @return
1869  *   0 on success, a negative errno value otherwise and rte_errno is set.
1870  */
1871 static int
1872 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1873                              uint64_t action_flags,
1874                              const struct rte_flow_attr *attr,
1875                              struct rte_flow_error *error)
1876 {
1877         struct mlx5_priv *priv = dev->data->dev_private;
1878         struct mlx5_dev_config *config = &priv->config;
1879         int ret;
1880
1881         /* Fall back if no extended metadata register support. */
1882         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1883                 return mlx5_flow_validate_action_flag(action_flags, attr,
1884                                                       error);
1885         /* Extensive metadata mode requires registers. */
1886         if (!mlx5_flow_ext_mreg_supported(dev))
1887                 return rte_flow_error_set(error, ENOTSUP,
1888                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1889                                           "no metadata registers "
1890                                           "to support flag action");
1891         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1892                 return rte_flow_error_set(error, ENOTSUP,
1893                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1894                                           "extended metadata register"
1895                                           " isn't available");
1896         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1897         if (ret < 0)
1898                 return ret;
1899         assert(ret > 0);
1900         if (action_flags & MLX5_FLOW_ACTION_MARK)
1901                 return rte_flow_error_set(error, EINVAL,
1902                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1903                                           "can't mark and flag in same flow");
1904         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1905                 return rte_flow_error_set(error, EINVAL,
1906                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1907                                           "can't have 2 flag"
1908                                           " actions in same flow");
1909         return 0;
1910 }
1911
1912 /**
1913  * Validate MARK action.
1914  *
1915  * @param[in] dev
1916  *   Pointer to the rte_eth_dev structure.
1917  * @param[in] action
1918  *   Pointer to action.
1919  * @param[in] action_flags
1920  *   Holds the actions detected until now.
1921  * @param[in] attr
1922  *   Pointer to flow attributes
1923  * @param[out] error
1924  *   Pointer to error structure.
1925  *
1926  * @return
1927  *   0 on success, a negative errno value otherwise and rte_errno is set.
1928  */
1929 static int
1930 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1931                              const struct rte_flow_action *action,
1932                              uint64_t action_flags,
1933                              const struct rte_flow_attr *attr,
1934                              struct rte_flow_error *error)
1935 {
1936         struct mlx5_priv *priv = dev->data->dev_private;
1937         struct mlx5_dev_config *config = &priv->config;
1938         const struct rte_flow_action_mark *mark = action->conf;
1939         int ret;
1940
1941         /* Fall back if no extended metadata register support. */
1942         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1943                 return mlx5_flow_validate_action_mark(action, action_flags,
1944                                                       attr, error);
1945         /* Extensive metadata mode requires registers. */
1946         if (!mlx5_flow_ext_mreg_supported(dev))
1947                 return rte_flow_error_set(error, ENOTSUP,
1948                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1949                                           "no metadata registers "
1950                                           "to support mark action");
1951         if (!priv->sh->dv_mark_mask)
1952                 return rte_flow_error_set(error, ENOTSUP,
1953                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1954                                           "extended metadata register"
1955                                           " isn't available");
1956         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1957         if (ret < 0)
1958                 return ret;
1959         assert(ret > 0);
1960         if (!mark)
1961                 return rte_flow_error_set(error, EINVAL,
1962                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1963                                           "configuration cannot be null");
1964         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1965                 return rte_flow_error_set(error, EINVAL,
1966                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1967                                           &mark->id,
1968                                           "mark id exceeds the limit");
1969         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1970                 return rte_flow_error_set(error, EINVAL,
1971                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1972                                           "can't flag and mark in same flow");
1973         if (action_flags & MLX5_FLOW_ACTION_MARK)
1974                 return rte_flow_error_set(error, EINVAL,
1975                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1976                                           "can't have 2 mark actions in same"
1977                                           " flow");
1978         return 0;
1979 }
1980
1981 /**
1982  * Validate SET_META action.
1983  *
1984  * @param[in] dev
1985  *   Pointer to the rte_eth_dev structure.
1986  * @param[in] action
1987  *   Pointer to the action structure.
1988  * @param[in] action_flags
1989  *   Holds the actions detected until now.
1990  * @param[in] attr
1991  *   Pointer to flow attributes
1992  * @param[out] error
1993  *   Pointer to error structure.
1994  *
1995  * @return
1996  *   0 on success, a negative errno value otherwise and rte_errno is set.
1997  */
1998 static int
1999 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2000                                  const struct rte_flow_action *action,
2001                                  uint64_t action_flags __rte_unused,
2002                                  const struct rte_flow_attr *attr,
2003                                  struct rte_flow_error *error)
2004 {
2005         const struct rte_flow_action_set_meta *conf;
2006         uint32_t nic_mask = UINT32_MAX;
2007         int reg;
2008
2009         if (!mlx5_flow_ext_mreg_supported(dev))
2010                 return rte_flow_error_set(error, ENOTSUP,
2011                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2012                                           "extended metadata register"
2013                                           " isn't supported");
2014         reg = flow_dv_get_metadata_reg(dev, attr, error);
2015         if (reg < 0)
2016                 return reg;
2017         if (reg != REG_A && reg != REG_B) {
2018                 struct mlx5_priv *priv = dev->data->dev_private;
2019
2020                 nic_mask = priv->sh->dv_meta_mask;
2021         }
2022         if (!(action->conf))
2023                 return rte_flow_error_set(error, EINVAL,
2024                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2025                                           "configuration cannot be null");
2026         conf = (const struct rte_flow_action_set_meta *)action->conf;
2027         if (!conf->mask)
2028                 return rte_flow_error_set(error, EINVAL,
2029                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2030                                           "zero mask doesn't have any effect");
2031         if (conf->mask & ~nic_mask)
2032                 return rte_flow_error_set(error, EINVAL,
2033                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2034                                           "meta data must be within reg C0");
2035         if (!(conf->data & conf->mask))
2036                 return rte_flow_error_set(error, EINVAL,
2037                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2038                                           "zero value has no effect");
2039         return 0;
2040 }
2041
2042 /**
2043  * Validate SET_TAG action.
2044  *
2045  * @param[in] dev
2046  *   Pointer to the rte_eth_dev structure.
2047  * @param[in] action
2048  *   Pointer to the action structure.
2049  * @param[in] action_flags
2050  *   Holds the actions detected until now.
2051  * @param[in] attr
2052  *   Pointer to flow attributes
2053  * @param[out] error
2054  *   Pointer to error structure.
2055  *
2056  * @return
2057  *   0 on success, a negative errno value otherwise and rte_errno is set.
2058  */
2059 static int
2060 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2061                                 const struct rte_flow_action *action,
2062                                 uint64_t action_flags,
2063                                 const struct rte_flow_attr *attr,
2064                                 struct rte_flow_error *error)
2065 {
2066         const struct rte_flow_action_set_tag *conf;
2067         const uint64_t terminal_action_flags =
2068                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2069                 MLX5_FLOW_ACTION_RSS;
2070         int ret;
2071
2072         if (!mlx5_flow_ext_mreg_supported(dev))
2073                 return rte_flow_error_set(error, ENOTSUP,
2074                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2075                                           "extensive metadata register"
2076                                           " isn't supported");
2077         if (!(action->conf))
2078                 return rte_flow_error_set(error, EINVAL,
2079                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2080                                           "configuration cannot be null");
2081         conf = (const struct rte_flow_action_set_tag *)action->conf;
2082         if (!conf->mask)
2083                 return rte_flow_error_set(error, EINVAL,
2084                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2085                                           "zero mask doesn't have any effect");
2086         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2087         if (ret < 0)
2088                 return ret;
2089         if (!attr->transfer && attr->ingress &&
2090             (action_flags & terminal_action_flags))
2091                 return rte_flow_error_set(error, EINVAL,
2092                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2093                                           "set_tag has no effect"
2094                                           " with terminal actions");
2095         return 0;
2096 }
2097
2098 /**
2099  * Validate count action.
2100  *
2101  * @param[in] dev
2102  *   Pointer to rte_eth_dev structure.
2103  * @param[out] error
2104  *   Pointer to error structure.
2105  *
2106  * @return
2107  *   0 on success, a negative errno value otherwise and rte_errno is set.
2108  */
2109 static int
2110 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2111                               struct rte_flow_error *error)
2112 {
2113         struct mlx5_priv *priv = dev->data->dev_private;
2114
2115         if (!priv->config.devx)
2116                 goto notsup_err;
2117 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2118         return 0;
2119 #endif
2120 notsup_err:
2121         return rte_flow_error_set
2122                       (error, ENOTSUP,
2123                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2124                        NULL,
2125                        "count action not supported");
2126 }
2127
2128 /**
2129  * Validate the L2 encap action.
2130  *
2131  * @param[in] action_flags
2132  *   Holds the actions detected until now.
2133  * @param[in] action
2134  *   Pointer to the action structure.
2135  * @param[in] attr
2136  *   Pointer to flow attributes
2137  * @param[out] error
2138  *   Pointer to error structure.
2139  *
2140  * @return
2141  *   0 on success, a negative errno value otherwise and rte_errno is set.
2142  */
2143 static int
2144 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2145                                  const struct rte_flow_action *action,
2146                                  const struct rte_flow_attr *attr,
2147                                  struct rte_flow_error *error)
2148 {
2149         if (!(action->conf))
2150                 return rte_flow_error_set(error, EINVAL,
2151                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2152                                           "configuration cannot be null");
2153         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2154                 return rte_flow_error_set(error, EINVAL,
2155                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2156                                           "can only have a single encap or"
2157                                           " decap action in a flow");
2158         if (!attr->transfer && attr->ingress)
2159                 return rte_flow_error_set(error, ENOTSUP,
2160                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2161                                           NULL,
2162                                           "encap action not supported for "
2163                                           "ingress");
2164         return 0;
2165 }
2166
2167 /**
2168  * Validate the L2 decap action.
2169  *
2170  * @param[in] action_flags
2171  *   Holds the actions detected until now.
2172  * @param[in] attr
2173  *   Pointer to flow attributes
2174  * @param[out] error
2175  *   Pointer to error structure.
2176  *
2177  * @return
2178  *   0 on success, a negative errno value otherwise and rte_errno is set.
2179  */
2180 static int
2181 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2182                                  const struct rte_flow_attr *attr,
2183                                  struct rte_flow_error *error)
2184 {
2185         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2186                 return rte_flow_error_set(error, EINVAL,
2187                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2188                                           "can only have a single encap or"
2189                                           " decap action in a flow");
2190         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2191                 return rte_flow_error_set(error, EINVAL,
2192                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2193                                           "can't have decap action after"
2194                                           " modify action");
2195         if (attr->egress)
2196                 return rte_flow_error_set(error, ENOTSUP,
2197                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2198                                           NULL,
2199                                           "decap action not supported for "
2200                                           "egress");
2201         return 0;
2202 }
2203
2204 /**
2205  * Validate the raw encap action.
2206  *
2207  * @param[in] action_flags
2208  *   Holds the actions detected until now.
2209  * @param[in] action
2210  *   Pointer to the encap action.
2211  * @param[in] attr
2212  *   Pointer to flow attributes
2213  * @param[out] error
2214  *   Pointer to error structure.
2215  *
2216  * @return
2217  *   0 on success, a negative errno value otherwise and rte_errno is set.
2218  */
2219 static int
2220 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2221                                   const struct rte_flow_action *action,
2222                                   const struct rte_flow_attr *attr,
2223                                   struct rte_flow_error *error)
2224 {
2225         const struct rte_flow_action_raw_encap *raw_encap =
2226                 (const struct rte_flow_action_raw_encap *)action->conf;
2227         if (!(action->conf))
2228                 return rte_flow_error_set(error, EINVAL,
2229                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2230                                           "configuration cannot be null");
2231         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2232                 return rte_flow_error_set(error, EINVAL,
2233                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2234                                           "can only have a single encap"
2235                                           " action in a flow");
2236         /* encap without preceding decap is not supported for ingress */
2237         if (!attr->transfer &&  attr->ingress &&
2238             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2239                 return rte_flow_error_set(error, ENOTSUP,
2240                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2241                                           NULL,
2242                                           "encap action not supported for "
2243                                           "ingress");
2244         if (!raw_encap->size || !raw_encap->data)
2245                 return rte_flow_error_set(error, EINVAL,
2246                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2247                                           "raw encap data cannot be empty");
2248         return 0;
2249 }
2250
2251 /**
2252  * Validate the raw decap action.
2253  *
2254  * @param[in] action_flags
2255  *   Holds the actions detected until now.
2256  * @param[in] action
2257  *   Pointer to the encap action.
2258  * @param[in] attr
2259  *   Pointer to flow attributes
2260  * @param[out] error
2261  *   Pointer to error structure.
2262  *
2263  * @return
2264  *   0 on success, a negative errno value otherwise and rte_errno is set.
2265  */
2266 static int
2267 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2268                                   const struct rte_flow_action *action,
2269                                   const struct rte_flow_attr *attr,
2270                                   struct rte_flow_error *error)
2271 {
2272         const struct rte_flow_action_raw_decap *decap   = action->conf;
2273
2274         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2275                 return rte_flow_error_set(error, EINVAL,
2276                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2277                                           "can't have encap action before"
2278                                           " decap action");
2279         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2280                 return rte_flow_error_set(error, EINVAL,
2281                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2282                                           "can only have a single decap"
2283                                           " action in a flow");
2284         /* decap action is valid on egress only if it is followed by encap */
2285         if (attr->egress && decap &&
2286             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2287                 return rte_flow_error_set(error, ENOTSUP,
2288                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2289                                           NULL, "decap action not supported"
2290                                           " for egress");
2291         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2292                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2293                 return rte_flow_error_set(error, EINVAL,
2294                                           RTE_FLOW_ERROR_TYPE_ACTION,
2295                                           NULL,
2296                                           "can't have decap action "
2297                                           "after modify action");
2298         }
2299         return 0;
2300 }
2301
2302 /**
2303  * Find existing encap/decap resource or create and register a new one.
2304  *
2305  * @param[in, out] dev
2306  *   Pointer to rte_eth_dev structure.
2307  * @param[in, out] resource
2308  *   Pointer to encap/decap resource.
2309  * @parm[in, out] dev_flow
2310  *   Pointer to the dev_flow.
2311  * @param[out] error
2312  *   pointer to error structure.
2313  *
2314  * @return
2315  *   0 on success otherwise -errno and errno is set.
2316  */
2317 static int
2318 flow_dv_encap_decap_resource_register
2319                         (struct rte_eth_dev *dev,
2320                          struct mlx5_flow_dv_encap_decap_resource *resource,
2321                          struct mlx5_flow *dev_flow,
2322                          struct rte_flow_error *error)
2323 {
2324         struct mlx5_priv *priv = dev->data->dev_private;
2325         struct mlx5_ibv_shared *sh = priv->sh;
2326         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2327         struct mlx5dv_dr_domain *domain;
2328
2329         resource->flags = dev_flow->group ? 0 : 1;
2330         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2331                 domain = sh->fdb_domain;
2332         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2333                 domain = sh->rx_domain;
2334         else
2335                 domain = sh->tx_domain;
2336         /* Lookup a matching resource from cache. */
2337         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2338                 if (resource->reformat_type == cache_resource->reformat_type &&
2339                     resource->ft_type == cache_resource->ft_type &&
2340                     resource->flags == cache_resource->flags &&
2341                     resource->size == cache_resource->size &&
2342                     !memcmp((const void *)resource->buf,
2343                             (const void *)cache_resource->buf,
2344                             resource->size)) {
2345                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2346                                 (void *)cache_resource,
2347                                 rte_atomic32_read(&cache_resource->refcnt));
2348                         rte_atomic32_inc(&cache_resource->refcnt);
2349                         dev_flow->dv.encap_decap = cache_resource;
2350                         return 0;
2351                 }
2352         }
2353         /* Register new encap/decap resource. */
2354         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2355         if (!cache_resource)
2356                 return rte_flow_error_set(error, ENOMEM,
2357                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2358                                           "cannot allocate resource memory");
2359         *cache_resource = *resource;
2360         cache_resource->verbs_action =
2361                 mlx5_glue->dv_create_flow_action_packet_reformat
2362                         (sh->ctx, cache_resource->reformat_type,
2363                          cache_resource->ft_type, domain, cache_resource->flags,
2364                          cache_resource->size,
2365                          (cache_resource->size ? cache_resource->buf : NULL));
2366         if (!cache_resource->verbs_action) {
2367                 rte_free(cache_resource);
2368                 return rte_flow_error_set(error, ENOMEM,
2369                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2370                                           NULL, "cannot create action");
2371         }
2372         rte_atomic32_init(&cache_resource->refcnt);
2373         rte_atomic32_inc(&cache_resource->refcnt);
2374         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2375         dev_flow->dv.encap_decap = cache_resource;
2376         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2377                 (void *)cache_resource,
2378                 rte_atomic32_read(&cache_resource->refcnt));
2379         return 0;
2380 }
2381
2382 /**
2383  * Find existing table jump resource or create and register a new one.
2384  *
2385  * @param[in, out] dev
2386  *   Pointer to rte_eth_dev structure.
2387  * @param[in, out] tbl
2388  *   Pointer to flow table resource.
2389  * @parm[in, out] dev_flow
2390  *   Pointer to the dev_flow.
2391  * @param[out] error
2392  *   pointer to error structure.
2393  *
2394  * @return
2395  *   0 on success otherwise -errno and errno is set.
2396  */
2397 static int
2398 flow_dv_jump_tbl_resource_register
2399                         (struct rte_eth_dev *dev __rte_unused,
2400                          struct mlx5_flow_tbl_resource *tbl,
2401                          struct mlx5_flow *dev_flow,
2402                          struct rte_flow_error *error)
2403 {
2404         struct mlx5_flow_tbl_data_entry *tbl_data =
2405                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2406         int cnt;
2407
2408         assert(tbl);
2409         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2410         if (!cnt) {
2411                 tbl_data->jump.action =
2412                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2413                         (tbl->obj);
2414                 if (!tbl_data->jump.action)
2415                         return rte_flow_error_set(error, ENOMEM,
2416                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2417                                         NULL, "cannot create jump action");
2418                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2419                         (void *)&tbl_data->jump, cnt);
2420         } else {
2421                 assert(tbl_data->jump.action);
2422                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2423                         (void *)&tbl_data->jump, cnt);
2424         }
2425         rte_atomic32_inc(&tbl_data->jump.refcnt);
2426         dev_flow->dv.jump = &tbl_data->jump;
2427         return 0;
2428 }
2429
2430 /**
2431  * Find existing table port ID resource or create and register a new one.
2432  *
2433  * @param[in, out] dev
2434  *   Pointer to rte_eth_dev structure.
2435  * @param[in, out] resource
2436  *   Pointer to port ID action resource.
2437  * @parm[in, out] dev_flow
2438  *   Pointer to the dev_flow.
2439  * @param[out] error
2440  *   pointer to error structure.
2441  *
2442  * @return
2443  *   0 on success otherwise -errno and errno is set.
2444  */
2445 static int
2446 flow_dv_port_id_action_resource_register
2447                         (struct rte_eth_dev *dev,
2448                          struct mlx5_flow_dv_port_id_action_resource *resource,
2449                          struct mlx5_flow *dev_flow,
2450                          struct rte_flow_error *error)
2451 {
2452         struct mlx5_priv *priv = dev->data->dev_private;
2453         struct mlx5_ibv_shared *sh = priv->sh;
2454         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2455
2456         /* Lookup a matching resource from cache. */
2457         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2458                 if (resource->port_id == cache_resource->port_id) {
2459                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2460                                 "refcnt %d++",
2461                                 (void *)cache_resource,
2462                                 rte_atomic32_read(&cache_resource->refcnt));
2463                         rte_atomic32_inc(&cache_resource->refcnt);
2464                         dev_flow->dv.port_id_action = cache_resource;
2465                         return 0;
2466                 }
2467         }
2468         /* Register new port id action resource. */
2469         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2470         if (!cache_resource)
2471                 return rte_flow_error_set(error, ENOMEM,
2472                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2473                                           "cannot allocate resource memory");
2474         *cache_resource = *resource;
2475         /*
2476          * Depending on rdma_core version the glue routine calls
2477          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2478          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2479          */
2480         cache_resource->action =
2481                 mlx5_glue->dr_create_flow_action_dest_port
2482                         (priv->sh->fdb_domain, resource->port_id);
2483         if (!cache_resource->action) {
2484                 rte_free(cache_resource);
2485                 return rte_flow_error_set(error, ENOMEM,
2486                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2487                                           NULL, "cannot create action");
2488         }
2489         rte_atomic32_init(&cache_resource->refcnt);
2490         rte_atomic32_inc(&cache_resource->refcnt);
2491         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2492         dev_flow->dv.port_id_action = cache_resource;
2493         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2494                 (void *)cache_resource,
2495                 rte_atomic32_read(&cache_resource->refcnt));
2496         return 0;
2497 }
2498
2499 /**
2500  * Find existing push vlan resource or create and register a new one.
2501  *
2502  * @param [in, out] dev
2503  *   Pointer to rte_eth_dev structure.
2504  * @param[in, out] resource
2505  *   Pointer to port ID action resource.
2506  * @parm[in, out] dev_flow
2507  *   Pointer to the dev_flow.
2508  * @param[out] error
2509  *   pointer to error structure.
2510  *
2511  * @return
2512  *   0 on success otherwise -errno and errno is set.
2513  */
2514 static int
2515 flow_dv_push_vlan_action_resource_register
2516                        (struct rte_eth_dev *dev,
2517                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2518                         struct mlx5_flow *dev_flow,
2519                         struct rte_flow_error *error)
2520 {
2521         struct mlx5_priv *priv = dev->data->dev_private;
2522         struct mlx5_ibv_shared *sh = priv->sh;
2523         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2524         struct mlx5dv_dr_domain *domain;
2525
2526         /* Lookup a matching resource from cache. */
2527         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2528                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2529                     resource->ft_type == cache_resource->ft_type) {
2530                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2531                                 "refcnt %d++",
2532                                 (void *)cache_resource,
2533                                 rte_atomic32_read(&cache_resource->refcnt));
2534                         rte_atomic32_inc(&cache_resource->refcnt);
2535                         dev_flow->dv.push_vlan_res = cache_resource;
2536                         return 0;
2537                 }
2538         }
2539         /* Register new push_vlan action resource. */
2540         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2541         if (!cache_resource)
2542                 return rte_flow_error_set(error, ENOMEM,
2543                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2544                                           "cannot allocate resource memory");
2545         *cache_resource = *resource;
2546         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2547                 domain = sh->fdb_domain;
2548         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2549                 domain = sh->rx_domain;
2550         else
2551                 domain = sh->tx_domain;
2552         cache_resource->action =
2553                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2554                                                            resource->vlan_tag);
2555         if (!cache_resource->action) {
2556                 rte_free(cache_resource);
2557                 return rte_flow_error_set(error, ENOMEM,
2558                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2559                                           NULL, "cannot create action");
2560         }
2561         rte_atomic32_init(&cache_resource->refcnt);
2562         rte_atomic32_inc(&cache_resource->refcnt);
2563         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2564         dev_flow->dv.push_vlan_res = cache_resource;
2565         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2566                 (void *)cache_resource,
2567                 rte_atomic32_read(&cache_resource->refcnt));
2568         return 0;
2569 }
2570 /**
2571  * Get the size of specific rte_flow_item_type
2572  *
2573  * @param[in] item_type
2574  *   Tested rte_flow_item_type.
2575  *
2576  * @return
2577  *   sizeof struct item_type, 0 if void or irrelevant.
2578  */
2579 static size_t
2580 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2581 {
2582         size_t retval;
2583
2584         switch (item_type) {
2585         case RTE_FLOW_ITEM_TYPE_ETH:
2586                 retval = sizeof(struct rte_flow_item_eth);
2587                 break;
2588         case RTE_FLOW_ITEM_TYPE_VLAN:
2589                 retval = sizeof(struct rte_flow_item_vlan);
2590                 break;
2591         case RTE_FLOW_ITEM_TYPE_IPV4:
2592                 retval = sizeof(struct rte_flow_item_ipv4);
2593                 break;
2594         case RTE_FLOW_ITEM_TYPE_IPV6:
2595                 retval = sizeof(struct rte_flow_item_ipv6);
2596                 break;
2597         case RTE_FLOW_ITEM_TYPE_UDP:
2598                 retval = sizeof(struct rte_flow_item_udp);
2599                 break;
2600         case RTE_FLOW_ITEM_TYPE_TCP:
2601                 retval = sizeof(struct rte_flow_item_tcp);
2602                 break;
2603         case RTE_FLOW_ITEM_TYPE_VXLAN:
2604                 retval = sizeof(struct rte_flow_item_vxlan);
2605                 break;
2606         case RTE_FLOW_ITEM_TYPE_GRE:
2607                 retval = sizeof(struct rte_flow_item_gre);
2608                 break;
2609         case RTE_FLOW_ITEM_TYPE_NVGRE:
2610                 retval = sizeof(struct rte_flow_item_nvgre);
2611                 break;
2612         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2613                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2614                 break;
2615         case RTE_FLOW_ITEM_TYPE_MPLS:
2616                 retval = sizeof(struct rte_flow_item_mpls);
2617                 break;
2618         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2619         default:
2620                 retval = 0;
2621                 break;
2622         }
2623         return retval;
2624 }
2625
2626 #define MLX5_ENCAP_IPV4_VERSION         0x40
2627 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2628 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2629 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2630 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2631 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2632 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2633
2634 /**
2635  * Convert the encap action data from list of rte_flow_item to raw buffer
2636  *
2637  * @param[in] items
2638  *   Pointer to rte_flow_item objects list.
2639  * @param[out] buf
2640  *   Pointer to the output buffer.
2641  * @param[out] size
2642  *   Pointer to the output buffer size.
2643  * @param[out] error
2644  *   Pointer to the error structure.
2645  *
2646  * @return
2647  *   0 on success, a negative errno value otherwise and rte_errno is set.
2648  */
2649 static int
2650 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2651                            size_t *size, struct rte_flow_error *error)
2652 {
2653         struct rte_ether_hdr *eth = NULL;
2654         struct rte_vlan_hdr *vlan = NULL;
2655         struct rte_ipv4_hdr *ipv4 = NULL;
2656         struct rte_ipv6_hdr *ipv6 = NULL;
2657         struct rte_udp_hdr *udp = NULL;
2658         struct rte_vxlan_hdr *vxlan = NULL;
2659         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2660         struct rte_gre_hdr *gre = NULL;
2661         size_t len;
2662         size_t temp_size = 0;
2663
2664         if (!items)
2665                 return rte_flow_error_set(error, EINVAL,
2666                                           RTE_FLOW_ERROR_TYPE_ACTION,
2667                                           NULL, "invalid empty data");
2668         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2669                 len = flow_dv_get_item_len(items->type);
2670                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2671                         return rte_flow_error_set(error, EINVAL,
2672                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2673                                                   (void *)items->type,
2674                                                   "items total size is too big"
2675                                                   " for encap action");
2676                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2677                 switch (items->type) {
2678                 case RTE_FLOW_ITEM_TYPE_ETH:
2679                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2680                         break;
2681                 case RTE_FLOW_ITEM_TYPE_VLAN:
2682                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2683                         if (!eth)
2684                                 return rte_flow_error_set(error, EINVAL,
2685                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2686                                                 (void *)items->type,
2687                                                 "eth header not found");
2688                         if (!eth->ether_type)
2689                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2690                         break;
2691                 case RTE_FLOW_ITEM_TYPE_IPV4:
2692                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2693                         if (!vlan && !eth)
2694                                 return rte_flow_error_set(error, EINVAL,
2695                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2696                                                 (void *)items->type,
2697                                                 "neither eth nor vlan"
2698                                                 " header found");
2699                         if (vlan && !vlan->eth_proto)
2700                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2701                         else if (eth && !eth->ether_type)
2702                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2703                         if (!ipv4->version_ihl)
2704                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2705                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2706                         if (!ipv4->time_to_live)
2707                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2708                         break;
2709                 case RTE_FLOW_ITEM_TYPE_IPV6:
2710                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2711                         if (!vlan && !eth)
2712                                 return rte_flow_error_set(error, EINVAL,
2713                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2714                                                 (void *)items->type,
2715                                                 "neither eth nor vlan"
2716                                                 " header found");
2717                         if (vlan && !vlan->eth_proto)
2718                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2719                         else if (eth && !eth->ether_type)
2720                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2721                         if (!ipv6->vtc_flow)
2722                                 ipv6->vtc_flow =
2723                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2724                         if (!ipv6->hop_limits)
2725                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2726                         break;
2727                 case RTE_FLOW_ITEM_TYPE_UDP:
2728                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2729                         if (!ipv4 && !ipv6)
2730                                 return rte_flow_error_set(error, EINVAL,
2731                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2732                                                 (void *)items->type,
2733                                                 "ip header not found");
2734                         if (ipv4 && !ipv4->next_proto_id)
2735                                 ipv4->next_proto_id = IPPROTO_UDP;
2736                         else if (ipv6 && !ipv6->proto)
2737                                 ipv6->proto = IPPROTO_UDP;
2738                         break;
2739                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2740                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2741                         if (!udp)
2742                                 return rte_flow_error_set(error, EINVAL,
2743                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2744                                                 (void *)items->type,
2745                                                 "udp header not found");
2746                         if (!udp->dst_port)
2747                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2748                         if (!vxlan->vx_flags)
2749                                 vxlan->vx_flags =
2750                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2751                         break;
2752                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2753                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2754                         if (!udp)
2755                                 return rte_flow_error_set(error, EINVAL,
2756                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2757                                                 (void *)items->type,
2758                                                 "udp header not found");
2759                         if (!vxlan_gpe->proto)
2760                                 return rte_flow_error_set(error, EINVAL,
2761                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2762                                                 (void *)items->type,
2763                                                 "next protocol not found");
2764                         if (!udp->dst_port)
2765                                 udp->dst_port =
2766                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2767                         if (!vxlan_gpe->vx_flags)
2768                                 vxlan_gpe->vx_flags =
2769                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2770                         break;
2771                 case RTE_FLOW_ITEM_TYPE_GRE:
2772                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2773                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2774                         if (!gre->proto)
2775                                 return rte_flow_error_set(error, EINVAL,
2776                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2777                                                 (void *)items->type,
2778                                                 "next protocol not found");
2779                         if (!ipv4 && !ipv6)
2780                                 return rte_flow_error_set(error, EINVAL,
2781                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2782                                                 (void *)items->type,
2783                                                 "ip header not found");
2784                         if (ipv4 && !ipv4->next_proto_id)
2785                                 ipv4->next_proto_id = IPPROTO_GRE;
2786                         else if (ipv6 && !ipv6->proto)
2787                                 ipv6->proto = IPPROTO_GRE;
2788                         break;
2789                 case RTE_FLOW_ITEM_TYPE_VOID:
2790                         break;
2791                 default:
2792                         return rte_flow_error_set(error, EINVAL,
2793                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2794                                                   (void *)items->type,
2795                                                   "unsupported item type");
2796                         break;
2797                 }
2798                 temp_size += len;
2799         }
2800         *size = temp_size;
2801         return 0;
2802 }
2803
2804 static int
2805 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2806 {
2807         struct rte_ether_hdr *eth = NULL;
2808         struct rte_vlan_hdr *vlan = NULL;
2809         struct rte_ipv6_hdr *ipv6 = NULL;
2810         struct rte_udp_hdr *udp = NULL;
2811         char *next_hdr;
2812         uint16_t proto;
2813
2814         eth = (struct rte_ether_hdr *)data;
2815         next_hdr = (char *)(eth + 1);
2816         proto = RTE_BE16(eth->ether_type);
2817
2818         /* VLAN skipping */
2819         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2820                 vlan = (struct rte_vlan_hdr *)next_hdr;
2821                 proto = RTE_BE16(vlan->eth_proto);
2822                 next_hdr += sizeof(struct rte_vlan_hdr);
2823         }
2824
2825         /* HW calculates IPv4 csum. no need to proceed */
2826         if (proto == RTE_ETHER_TYPE_IPV4)
2827                 return 0;
2828
2829         /* non IPv4/IPv6 header. not supported */
2830         if (proto != RTE_ETHER_TYPE_IPV6) {
2831                 return rte_flow_error_set(error, ENOTSUP,
2832                                           RTE_FLOW_ERROR_TYPE_ACTION,
2833                                           NULL, "Cannot offload non IPv4/IPv6");
2834         }
2835
2836         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2837
2838         /* ignore non UDP */
2839         if (ipv6->proto != IPPROTO_UDP)
2840                 return 0;
2841
2842         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2843         udp->dgram_cksum = 0;
2844
2845         return 0;
2846 }
2847
2848 /**
2849  * Convert L2 encap action to DV specification.
2850  *
2851  * @param[in] dev
2852  *   Pointer to rte_eth_dev structure.
2853  * @param[in] action
2854  *   Pointer to action structure.
2855  * @param[in, out] dev_flow
2856  *   Pointer to the mlx5_flow.
2857  * @param[in] transfer
2858  *   Mark if the flow is E-Switch flow.
2859  * @param[out] error
2860  *   Pointer to the error structure.
2861  *
2862  * @return
2863  *   0 on success, a negative errno value otherwise and rte_errno is set.
2864  */
2865 static int
2866 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2867                                const struct rte_flow_action *action,
2868                                struct mlx5_flow *dev_flow,
2869                                uint8_t transfer,
2870                                struct rte_flow_error *error)
2871 {
2872         const struct rte_flow_item *encap_data;
2873         const struct rte_flow_action_raw_encap *raw_encap_data;
2874         struct mlx5_flow_dv_encap_decap_resource res = {
2875                 .reformat_type =
2876                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2877                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2878                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2879         };
2880
2881         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2882                 raw_encap_data =
2883                         (const struct rte_flow_action_raw_encap *)action->conf;
2884                 res.size = raw_encap_data->size;
2885                 memcpy(res.buf, raw_encap_data->data, res.size);
2886         } else {
2887                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2888                         encap_data =
2889                                 ((const struct rte_flow_action_vxlan_encap *)
2890                                                 action->conf)->definition;
2891                 else
2892                         encap_data =
2893                                 ((const struct rte_flow_action_nvgre_encap *)
2894                                                 action->conf)->definition;
2895                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2896                                                &res.size, error))
2897                         return -rte_errno;
2898         }
2899         if (flow_dv_zero_encap_udp_csum(res.buf, error))
2900                 return -rte_errno;
2901         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2902                 return rte_flow_error_set(error, EINVAL,
2903                                           RTE_FLOW_ERROR_TYPE_ACTION,
2904                                           NULL, "can't create L2 encap action");
2905         return 0;
2906 }
2907
2908 /**
2909  * Convert L2 decap action to DV specification.
2910  *
2911  * @param[in] dev
2912  *   Pointer to rte_eth_dev structure.
2913  * @param[in, out] dev_flow
2914  *   Pointer to the mlx5_flow.
2915  * @param[in] transfer
2916  *   Mark if the flow is E-Switch flow.
2917  * @param[out] error
2918  *   Pointer to the error structure.
2919  *
2920  * @return
2921  *   0 on success, a negative errno value otherwise and rte_errno is set.
2922  */
2923 static int
2924 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2925                                struct mlx5_flow *dev_flow,
2926                                uint8_t transfer,
2927                                struct rte_flow_error *error)
2928 {
2929         struct mlx5_flow_dv_encap_decap_resource res = {
2930                 .size = 0,
2931                 .reformat_type =
2932                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2933                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2934                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2935         };
2936
2937         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2938                 return rte_flow_error_set(error, EINVAL,
2939                                           RTE_FLOW_ERROR_TYPE_ACTION,
2940                                           NULL, "can't create L2 decap action");
2941         return 0;
2942 }
2943
2944 /**
2945  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2946  *
2947  * @param[in] dev
2948  *   Pointer to rte_eth_dev structure.
2949  * @param[in] action
2950  *   Pointer to action structure.
2951  * @param[in, out] dev_flow
2952  *   Pointer to the mlx5_flow.
2953  * @param[in] attr
2954  *   Pointer to the flow attributes.
2955  * @param[out] error
2956  *   Pointer to the error structure.
2957  *
2958  * @return
2959  *   0 on success, a negative errno value otherwise and rte_errno is set.
2960  */
2961 static int
2962 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2963                                 const struct rte_flow_action *action,
2964                                 struct mlx5_flow *dev_flow,
2965                                 const struct rte_flow_attr *attr,
2966                                 struct rte_flow_error *error)
2967 {
2968         const struct rte_flow_action_raw_encap *encap_data;
2969         struct mlx5_flow_dv_encap_decap_resource res;
2970
2971         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2972         res.size = encap_data->size;
2973         memcpy(res.buf, encap_data->data, res.size);
2974         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
2975                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
2976                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
2977         if (attr->transfer)
2978                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2979         else
2980                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2981                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2982         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2983                 return rte_flow_error_set(error, EINVAL,
2984                                           RTE_FLOW_ERROR_TYPE_ACTION,
2985                                           NULL, "can't create encap action");
2986         return 0;
2987 }
2988
2989 /**
2990  * Create action push VLAN.
2991  *
2992  * @param[in] dev
2993  *   Pointer to rte_eth_dev structure.
2994  * @param[in] attr
2995  *   Pointer to the flow attributes.
2996  * @param[in] vlan
2997  *   Pointer to the vlan to push to the Ethernet header.
2998  * @param[in, out] dev_flow
2999  *   Pointer to the mlx5_flow.
3000  * @param[out] error
3001  *   Pointer to the error structure.
3002  *
3003  * @return
3004  *   0 on success, a negative errno value otherwise and rte_errno is set.
3005  */
3006 static int
3007 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3008                                 const struct rte_flow_attr *attr,
3009                                 const struct rte_vlan_hdr *vlan,
3010                                 struct mlx5_flow *dev_flow,
3011                                 struct rte_flow_error *error)
3012 {
3013         struct mlx5_flow_dv_push_vlan_action_resource res;
3014
3015         res.vlan_tag =
3016                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3017                                  vlan->vlan_tci);
3018         if (attr->transfer)
3019                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3020         else
3021                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3022                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3023         return flow_dv_push_vlan_action_resource_register
3024                                             (dev, &res, dev_flow, error);
3025 }
3026
3027 /**
3028  * Validate the modify-header actions.
3029  *
3030  * @param[in] action_flags
3031  *   Holds the actions detected until now.
3032  * @param[in] action
3033  *   Pointer to the modify action.
3034  * @param[out] error
3035  *   Pointer to error structure.
3036  *
3037  * @return
3038  *   0 on success, a negative errno value otherwise and rte_errno is set.
3039  */
3040 static int
3041 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3042                                    const struct rte_flow_action *action,
3043                                    struct rte_flow_error *error)
3044 {
3045         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3046                 return rte_flow_error_set(error, EINVAL,
3047                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3048                                           NULL, "action configuration not set");
3049         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
3050                 return rte_flow_error_set(error, EINVAL,
3051                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3052                                           "can't have encap action before"
3053                                           " modify action");
3054         return 0;
3055 }
3056
3057 /**
3058  * Validate the modify-header MAC address actions.
3059  *
3060  * @param[in] action_flags
3061  *   Holds the actions detected until now.
3062  * @param[in] action
3063  *   Pointer to the modify action.
3064  * @param[in] item_flags
3065  *   Holds the items detected.
3066  * @param[out] error
3067  *   Pointer to error structure.
3068  *
3069  * @return
3070  *   0 on success, a negative errno value otherwise and rte_errno is set.
3071  */
3072 static int
3073 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3074                                    const struct rte_flow_action *action,
3075                                    const uint64_t item_flags,
3076                                    struct rte_flow_error *error)
3077 {
3078         int ret = 0;
3079
3080         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3081         if (!ret) {
3082                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3083                         return rte_flow_error_set(error, EINVAL,
3084                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3085                                                   NULL,
3086                                                   "no L2 item in pattern");
3087         }
3088         return ret;
3089 }
3090
3091 /**
3092  * Validate the modify-header IPv4 address actions.
3093  *
3094  * @param[in] action_flags
3095  *   Holds the actions detected until now.
3096  * @param[in] action
3097  *   Pointer to the modify action.
3098  * @param[in] item_flags
3099  *   Holds the items detected.
3100  * @param[out] error
3101  *   Pointer to error structure.
3102  *
3103  * @return
3104  *   0 on success, a negative errno value otherwise and rte_errno is set.
3105  */
3106 static int
3107 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3108                                     const struct rte_flow_action *action,
3109                                     const uint64_t item_flags,
3110                                     struct rte_flow_error *error)
3111 {
3112         int ret = 0;
3113
3114         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3115         if (!ret) {
3116                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3117                         return rte_flow_error_set(error, EINVAL,
3118                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3119                                                   NULL,
3120                                                   "no ipv4 item in pattern");
3121         }
3122         return ret;
3123 }
3124
3125 /**
3126  * Validate the modify-header IPv6 address actions.
3127  *
3128  * @param[in] action_flags
3129  *   Holds the actions detected until now.
3130  * @param[in] action
3131  *   Pointer to the modify action.
3132  * @param[in] item_flags
3133  *   Holds the items detected.
3134  * @param[out] error
3135  *   Pointer to error structure.
3136  *
3137  * @return
3138  *   0 on success, a negative errno value otherwise and rte_errno is set.
3139  */
3140 static int
3141 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3142                                     const struct rte_flow_action *action,
3143                                     const uint64_t item_flags,
3144                                     struct rte_flow_error *error)
3145 {
3146         int ret = 0;
3147
3148         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3149         if (!ret) {
3150                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3151                         return rte_flow_error_set(error, EINVAL,
3152                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3153                                                   NULL,
3154                                                   "no ipv6 item in pattern");
3155         }
3156         return ret;
3157 }
3158
3159 /**
3160  * Validate the modify-header TP actions.
3161  *
3162  * @param[in] action_flags
3163  *   Holds the actions detected until now.
3164  * @param[in] action
3165  *   Pointer to the modify action.
3166  * @param[in] item_flags
3167  *   Holds the items detected.
3168  * @param[out] error
3169  *   Pointer to error structure.
3170  *
3171  * @return
3172  *   0 on success, a negative errno value otherwise and rte_errno is set.
3173  */
3174 static int
3175 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3176                                   const struct rte_flow_action *action,
3177                                   const uint64_t item_flags,
3178                                   struct rte_flow_error *error)
3179 {
3180         int ret = 0;
3181
3182         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3183         if (!ret) {
3184                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3185                         return rte_flow_error_set(error, EINVAL,
3186                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3187                                                   NULL, "no transport layer "
3188                                                   "in pattern");
3189         }
3190         return ret;
3191 }
3192
3193 /**
3194  * Validate the modify-header actions of increment/decrement
3195  * TCP Sequence-number.
3196  *
3197  * @param[in] action_flags
3198  *   Holds the actions detected until now.
3199  * @param[in] action
3200  *   Pointer to the modify action.
3201  * @param[in] item_flags
3202  *   Holds the items detected.
3203  * @param[out] error
3204  *   Pointer to error structure.
3205  *
3206  * @return
3207  *   0 on success, a negative errno value otherwise and rte_errno is set.
3208  */
3209 static int
3210 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3211                                        const struct rte_flow_action *action,
3212                                        const uint64_t item_flags,
3213                                        struct rte_flow_error *error)
3214 {
3215         int ret = 0;
3216
3217         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3218         if (!ret) {
3219                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3220                         return rte_flow_error_set(error, EINVAL,
3221                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3222                                                   NULL, "no TCP item in"
3223                                                   " pattern");
3224                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3225                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3226                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3227                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3228                         return rte_flow_error_set(error, EINVAL,
3229                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3230                                                   NULL,
3231                                                   "cannot decrease and increase"
3232                                                   " TCP sequence number"
3233                                                   " at the same time");
3234         }
3235         return ret;
3236 }
3237
3238 /**
3239  * Validate the modify-header actions of increment/decrement
3240  * TCP Acknowledgment number.
3241  *
3242  * @param[in] action_flags
3243  *   Holds the actions detected until now.
3244  * @param[in] action
3245  *   Pointer to the modify action.
3246  * @param[in] item_flags
3247  *   Holds the items detected.
3248  * @param[out] error
3249  *   Pointer to error structure.
3250  *
3251  * @return
3252  *   0 on success, a negative errno value otherwise and rte_errno is set.
3253  */
3254 static int
3255 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3256                                        const struct rte_flow_action *action,
3257                                        const uint64_t item_flags,
3258                                        struct rte_flow_error *error)
3259 {
3260         int ret = 0;
3261
3262         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3263         if (!ret) {
3264                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3265                         return rte_flow_error_set(error, EINVAL,
3266                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3267                                                   NULL, "no TCP item in"
3268                                                   " pattern");
3269                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3270                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3271                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3272                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3273                         return rte_flow_error_set(error, EINVAL,
3274                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3275                                                   NULL,
3276                                                   "cannot decrease and increase"
3277                                                   " TCP acknowledgment number"
3278                                                   " at the same time");
3279         }
3280         return ret;
3281 }
3282
3283 /**
3284  * Validate the modify-header TTL actions.
3285  *
3286  * @param[in] action_flags
3287  *   Holds the actions detected until now.
3288  * @param[in] action
3289  *   Pointer to the modify action.
3290  * @param[in] item_flags
3291  *   Holds the items detected.
3292  * @param[out] error
3293  *   Pointer to error structure.
3294  *
3295  * @return
3296  *   0 on success, a negative errno value otherwise and rte_errno is set.
3297  */
3298 static int
3299 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3300                                    const struct rte_flow_action *action,
3301                                    const uint64_t item_flags,
3302                                    struct rte_flow_error *error)
3303 {
3304         int ret = 0;
3305
3306         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3307         if (!ret) {
3308                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3309                         return rte_flow_error_set(error, EINVAL,
3310                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3311                                                   NULL,
3312                                                   "no IP protocol in pattern");
3313         }
3314         return ret;
3315 }
3316
3317 /**
3318  * Validate jump action.
3319  *
3320  * @param[in] action
3321  *   Pointer to the jump action.
3322  * @param[in] action_flags
3323  *   Holds the actions detected until now.
3324  * @param[in] attributes
3325  *   Pointer to flow attributes
3326  * @param[in] external
3327  *   Action belongs to flow rule created by request external to PMD.
3328  * @param[out] error
3329  *   Pointer to error structure.
3330  *
3331  * @return
3332  *   0 on success, a negative errno value otherwise and rte_errno is set.
3333  */
3334 static int
3335 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3336                              uint64_t action_flags,
3337                              const struct rte_flow_attr *attributes,
3338                              bool external, struct rte_flow_error *error)
3339 {
3340         uint32_t target_group, table;
3341         int ret = 0;
3342
3343         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3344                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3345                 return rte_flow_error_set(error, EINVAL,
3346                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3347                                           "can't have 2 fate actions in"
3348                                           " same flow");
3349         if (action_flags & MLX5_FLOW_ACTION_METER)
3350                 return rte_flow_error_set(error, ENOTSUP,
3351                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3352                                           "jump with meter not support");
3353         if (!action->conf)
3354                 return rte_flow_error_set(error, EINVAL,
3355                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3356                                           NULL, "action configuration not set");
3357         target_group =
3358                 ((const struct rte_flow_action_jump *)action->conf)->group;
3359         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3360                                        &table, error);
3361         if (ret)
3362                 return ret;
3363         if (attributes->group == target_group)
3364                 return rte_flow_error_set(error, EINVAL,
3365                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3366                                           "target group must be other than"
3367                                           " the current flow group");
3368         return 0;
3369 }
3370
3371 /*
3372  * Validate the port_id action.
3373  *
3374  * @param[in] dev
3375  *   Pointer to rte_eth_dev structure.
3376  * @param[in] action_flags
3377  *   Bit-fields that holds the actions detected until now.
3378  * @param[in] action
3379  *   Port_id RTE action structure.
3380  * @param[in] attr
3381  *   Attributes of flow that includes this action.
3382  * @param[out] error
3383  *   Pointer to error structure.
3384  *
3385  * @return
3386  *   0 on success, a negative errno value otherwise and rte_errno is set.
3387  */
3388 static int
3389 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3390                                 uint64_t action_flags,
3391                                 const struct rte_flow_action *action,
3392                                 const struct rte_flow_attr *attr,
3393                                 struct rte_flow_error *error)
3394 {
3395         const struct rte_flow_action_port_id *port_id;
3396         struct mlx5_priv *act_priv;
3397         struct mlx5_priv *dev_priv;
3398         uint16_t port;
3399
3400         if (!attr->transfer)
3401                 return rte_flow_error_set(error, ENOTSUP,
3402                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3403                                           NULL,
3404                                           "port id action is valid in transfer"
3405                                           " mode only");
3406         if (!action || !action->conf)
3407                 return rte_flow_error_set(error, ENOTSUP,
3408                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3409                                           NULL,
3410                                           "port id action parameters must be"
3411                                           " specified");
3412         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3413                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3414                 return rte_flow_error_set(error, EINVAL,
3415                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3416                                           "can have only one fate actions in"
3417                                           " a flow");
3418         dev_priv = mlx5_dev_to_eswitch_info(dev);
3419         if (!dev_priv)
3420                 return rte_flow_error_set(error, rte_errno,
3421                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3422                                           NULL,
3423                                           "failed to obtain E-Switch info");
3424         port_id = action->conf;
3425         port = port_id->original ? dev->data->port_id : port_id->id;
3426         act_priv = mlx5_port_to_eswitch_info(port, false);
3427         if (!act_priv)
3428                 return rte_flow_error_set
3429                                 (error, rte_errno,
3430                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3431                                  "failed to obtain E-Switch port id for port");
3432         if (act_priv->domain_id != dev_priv->domain_id)
3433                 return rte_flow_error_set
3434                                 (error, EINVAL,
3435                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3436                                  "port does not belong to"
3437                                  " E-Switch being configured");
3438         return 0;
3439 }
3440
3441 /**
3442  * Get the maximum number of modify header actions.
3443  *
3444  * @param dev
3445  *   Pointer to rte_eth_dev structure.
3446  * @param flags
3447  *   Flags bits to check if root level.
3448  *
3449  * @return
3450  *   Max number of modify header actions device can support.
3451  */
3452 static unsigned int
3453 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3454 {
3455         /*
3456          * There's no way to directly query the max cap. Although it has to be
3457          * acquried by iterative trial, it is a safe assumption that more
3458          * actions are supported by FW if extensive metadata register is
3459          * supported. (Only in the root table)
3460          */
3461         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3462                 return MLX5_MAX_MODIFY_NUM;
3463         else
3464                 return mlx5_flow_ext_mreg_supported(dev) ?
3465                                         MLX5_ROOT_TBL_MODIFY_NUM :
3466                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3467 }
3468
3469 /**
3470  * Validate the meter action.
3471  *
3472  * @param[in] dev
3473  *   Pointer to rte_eth_dev structure.
3474  * @param[in] action_flags
3475  *   Bit-fields that holds the actions detected until now.
3476  * @param[in] action
3477  *   Pointer to the meter action.
3478  * @param[in] attr
3479  *   Attributes of flow that includes this action.
3480  * @param[out] error
3481  *   Pointer to error structure.
3482  *
3483  * @return
3484  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3485  */
3486 static int
3487 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3488                                 uint64_t action_flags,
3489                                 const struct rte_flow_action *action,
3490                                 const struct rte_flow_attr *attr,
3491                                 struct rte_flow_error *error)
3492 {
3493         struct mlx5_priv *priv = dev->data->dev_private;
3494         const struct rte_flow_action_meter *am = action->conf;
3495         struct mlx5_flow_meter *fm;
3496
3497         if (!am)
3498                 return rte_flow_error_set(error, EINVAL,
3499                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3500                                           "meter action conf is NULL");
3501
3502         if (action_flags & MLX5_FLOW_ACTION_METER)
3503                 return rte_flow_error_set(error, ENOTSUP,
3504                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3505                                           "meter chaining not support");
3506         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3507                 return rte_flow_error_set(error, ENOTSUP,
3508                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3509                                           "meter with jump not support");
3510         if (!priv->mtr_en)
3511                 return rte_flow_error_set(error, ENOTSUP,
3512                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3513                                           NULL,
3514                                           "meter action not supported");
3515         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3516         if (!fm)
3517                 return rte_flow_error_set(error, EINVAL,
3518                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3519                                           "Meter not found");
3520         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3521               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3522               (!fm->attr.egress && !attr->egress && attr->ingress))))
3523                 return rte_flow_error_set(error, EINVAL,
3524                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3525                                           "Flow attributes are either invalid "
3526                                           "or have a conflict with current "
3527                                           "meter attributes");
3528         return 0;
3529 }
3530
3531 /**
3532  * Validate the modify-header IPv4 DSCP actions.
3533  *
3534  * @param[in] action_flags
3535  *   Holds the actions detected until now.
3536  * @param[in] action
3537  *   Pointer to the modify action.
3538  * @param[in] item_flags
3539  *   Holds the items detected.
3540  * @param[out] error
3541  *   Pointer to error structure.
3542  *
3543  * @return
3544  *   0 on success, a negative errno value otherwise and rte_errno is set.
3545  */
3546 static int
3547 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3548                                          const struct rte_flow_action *action,
3549                                          const uint64_t item_flags,
3550                                          struct rte_flow_error *error)
3551 {
3552         int ret = 0;
3553
3554         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3555         if (!ret) {
3556                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3557                         return rte_flow_error_set(error, EINVAL,
3558                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3559                                                   NULL,
3560                                                   "no ipv4 item in pattern");
3561         }
3562         return ret;
3563 }
3564
3565 /**
3566  * Validate the modify-header IPv6 DSCP actions.
3567  *
3568  * @param[in] action_flags
3569  *   Holds the actions detected until now.
3570  * @param[in] action
3571  *   Pointer to the modify action.
3572  * @param[in] item_flags
3573  *   Holds the items detected.
3574  * @param[out] error
3575  *   Pointer to error structure.
3576  *
3577  * @return
3578  *   0 on success, a negative errno value otherwise and rte_errno is set.
3579  */
3580 static int
3581 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3582                                          const struct rte_flow_action *action,
3583                                          const uint64_t item_flags,
3584                                          struct rte_flow_error *error)
3585 {
3586         int ret = 0;
3587
3588         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3589         if (!ret) {
3590                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3591                         return rte_flow_error_set(error, EINVAL,
3592                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3593                                                   NULL,
3594                                                   "no ipv6 item in pattern");
3595         }
3596         return ret;
3597 }
3598
3599 /**
3600  * Find existing modify-header resource or create and register a new one.
3601  *
3602  * @param dev[in, out]
3603  *   Pointer to rte_eth_dev structure.
3604  * @param[in, out] resource
3605  *   Pointer to modify-header resource.
3606  * @parm[in, out] dev_flow
3607  *   Pointer to the dev_flow.
3608  * @param[out] error
3609  *   pointer to error structure.
3610  *
3611  * @return
3612  *   0 on success otherwise -errno and errno is set.
3613  */
3614 static int
3615 flow_dv_modify_hdr_resource_register
3616                         (struct rte_eth_dev *dev,
3617                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3618                          struct mlx5_flow *dev_flow,
3619                          struct rte_flow_error *error)
3620 {
3621         struct mlx5_priv *priv = dev->data->dev_private;
3622         struct mlx5_ibv_shared *sh = priv->sh;
3623         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3624         struct mlx5dv_dr_domain *ns;
3625         uint32_t actions_len;
3626
3627         resource->flags =
3628                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3629         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3630                                     resource->flags))
3631                 return rte_flow_error_set(error, EOVERFLOW,
3632                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3633                                           "too many modify header items");
3634         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3635                 ns = sh->fdb_domain;
3636         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3637                 ns = sh->tx_domain;
3638         else
3639                 ns = sh->rx_domain;
3640         /* Lookup a matching resource from cache. */
3641         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3642         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3643                 if (resource->ft_type == cache_resource->ft_type &&
3644                     resource->actions_num == cache_resource->actions_num &&
3645                     resource->flags == cache_resource->flags &&
3646                     !memcmp((const void *)resource->actions,
3647                             (const void *)cache_resource->actions,
3648                             actions_len)) {
3649                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3650                                 (void *)cache_resource,
3651                                 rte_atomic32_read(&cache_resource->refcnt));
3652                         rte_atomic32_inc(&cache_resource->refcnt);
3653                         dev_flow->dv.modify_hdr = cache_resource;
3654                         return 0;
3655                 }
3656         }
3657         /* Register new modify-header resource. */
3658         cache_resource = rte_calloc(__func__, 1,
3659                                     sizeof(*cache_resource) + actions_len, 0);
3660         if (!cache_resource)
3661                 return rte_flow_error_set(error, ENOMEM,
3662                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3663                                           "cannot allocate resource memory");
3664         *cache_resource = *resource;
3665         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3666         cache_resource->verbs_action =
3667                 mlx5_glue->dv_create_flow_action_modify_header
3668                                         (sh->ctx, cache_resource->ft_type, ns,
3669                                          cache_resource->flags, actions_len,
3670                                          (uint64_t *)cache_resource->actions);
3671         if (!cache_resource->verbs_action) {
3672                 rte_free(cache_resource);
3673                 return rte_flow_error_set(error, ENOMEM,
3674                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3675                                           NULL, "cannot create action");
3676         }
3677         rte_atomic32_init(&cache_resource->refcnt);
3678         rte_atomic32_inc(&cache_resource->refcnt);
3679         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3680         dev_flow->dv.modify_hdr = cache_resource;
3681         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3682                 (void *)cache_resource,
3683                 rte_atomic32_read(&cache_resource->refcnt));
3684         return 0;
3685 }
3686
3687 #define MLX5_CNT_CONTAINER_RESIZE 64
3688
3689 /**
3690  * Get or create a flow counter.
3691  *
3692  * @param[in] dev
3693  *   Pointer to the Ethernet device structure.
3694  * @param[in] shared
3695  *   Indicate if this counter is shared with other flows.
3696  * @param[in] id
3697  *   Counter identifier.
3698  *
3699  * @return
3700  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3701  */
3702 static struct mlx5_flow_counter *
3703 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3704                                uint32_t id)
3705 {
3706         struct mlx5_priv *priv = dev->data->dev_private;
3707         struct mlx5_flow_counter *cnt = NULL;
3708         struct mlx5_devx_obj *dcs = NULL;
3709
3710         if (!priv->config.devx) {
3711                 rte_errno = ENOTSUP;
3712                 return NULL;
3713         }
3714         if (shared) {
3715                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3716                         if (cnt->shared && cnt->id == id) {
3717                                 cnt->ref_cnt++;
3718                                 return cnt;
3719                         }
3720                 }
3721         }
3722         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3723         if (!dcs)
3724                 return NULL;
3725         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3726         if (!cnt) {
3727                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3728                 rte_errno = ENOMEM;
3729                 return NULL;
3730         }
3731         struct mlx5_flow_counter tmpl = {
3732                 .shared = shared,
3733                 .ref_cnt = 1,
3734                 .id = id,
3735                 .dcs = dcs,
3736         };
3737         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3738         if (!tmpl.action) {
3739                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3740                 rte_errno = errno;
3741                 rte_free(cnt);
3742                 return NULL;
3743         }
3744         *cnt = tmpl;
3745         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3746         return cnt;
3747 }
3748
3749 /**
3750  * Release a flow counter.
3751  *
3752  * @param[in] dev
3753  *   Pointer to the Ethernet device structure.
3754  * @param[in] counter
3755  *   Pointer to the counter handler.
3756  */
3757 static void
3758 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3759                                  struct mlx5_flow_counter *counter)
3760 {
3761         struct mlx5_priv *priv = dev->data->dev_private;
3762
3763         if (!counter)
3764                 return;
3765         if (--counter->ref_cnt == 0) {
3766                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3767                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3768                 rte_free(counter);
3769         }
3770 }
3771
3772 /**
3773  * Query a devx flow counter.
3774  *
3775  * @param[in] dev
3776  *   Pointer to the Ethernet device structure.
3777  * @param[in] cnt
3778  *   Pointer to the flow counter.
3779  * @param[out] pkts
3780  *   The statistics value of packets.
3781  * @param[out] bytes
3782  *   The statistics value of bytes.
3783  *
3784  * @return
3785  *   0 on success, otherwise a negative errno value and rte_errno is set.
3786  */
3787 static inline int
3788 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3789                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3790                      uint64_t *bytes)
3791 {
3792         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3793                                                 0, NULL, NULL, 0);
3794 }
3795
3796 /**
3797  * Get a pool by a counter.
3798  *
3799  * @param[in] cnt
3800  *   Pointer to the counter.
3801  *
3802  * @return
3803  *   The counter pool.
3804  */
3805 static struct mlx5_flow_counter_pool *
3806 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3807 {
3808         if (!cnt->batch) {
3809                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3810                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3811         }
3812         return cnt->pool;
3813 }
3814
3815 /**
3816  * Get a pool by devx counter ID.
3817  *
3818  * @param[in] cont
3819  *   Pointer to the counter container.
3820  * @param[in] id
3821  *   The counter devx ID.
3822  *
3823  * @return
3824  *   The counter pool pointer if exists, NULL otherwise,
3825  */
3826 static struct mlx5_flow_counter_pool *
3827 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3828 {
3829         struct mlx5_flow_counter_pool *pool;
3830
3831         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3832                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3833                                 MLX5_COUNTERS_PER_POOL;
3834
3835                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3836                         return pool;
3837         };
3838         return NULL;
3839 }
3840
3841 /**
3842  * Allocate a new memory for the counter values wrapped by all the needed
3843  * management.
3844  *
3845  * @param[in] dev
3846  *   Pointer to the Ethernet device structure.
3847  * @param[in] raws_n
3848  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3849  *
3850  * @return
3851  *   The new memory management pointer on success, otherwise NULL and rte_errno
3852  *   is set.
3853  */
3854 static struct mlx5_counter_stats_mem_mng *
3855 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3856 {
3857         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3858                                         (dev->data->dev_private))->sh;
3859         struct mlx5_devx_mkey_attr mkey_attr;
3860         struct mlx5_counter_stats_mem_mng *mem_mng;
3861         volatile struct flow_counter_stats *raw_data;
3862         int size = (sizeof(struct flow_counter_stats) *
3863                         MLX5_COUNTERS_PER_POOL +
3864                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3865                         sizeof(struct mlx5_counter_stats_mem_mng);
3866         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3867         int i;
3868
3869         if (!mem) {
3870                 rte_errno = ENOMEM;
3871                 return NULL;
3872         }
3873         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3874         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3875         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3876                                                  IBV_ACCESS_LOCAL_WRITE);
3877         if (!mem_mng->umem) {
3878                 rte_errno = errno;
3879                 rte_free(mem);
3880                 return NULL;
3881         }
3882         mkey_attr.addr = (uintptr_t)mem;
3883         mkey_attr.size = size;
3884         mkey_attr.umem_id = mem_mng->umem->umem_id;
3885         mkey_attr.pd = sh->pdn;
3886         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3887         if (!mem_mng->dm) {
3888                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3889                 rte_errno = errno;
3890                 rte_free(mem);
3891                 return NULL;
3892         }
3893         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3894         raw_data = (volatile struct flow_counter_stats *)mem;
3895         for (i = 0; i < raws_n; ++i) {
3896                 mem_mng->raws[i].mem_mng = mem_mng;
3897                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3898         }
3899         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3900         return mem_mng;
3901 }
3902
3903 /**
3904  * Resize a counter container.
3905  *
3906  * @param[in] dev
3907  *   Pointer to the Ethernet device structure.
3908  * @param[in] batch
3909  *   Whether the pool is for counter that was allocated by batch command.
3910  *
3911  * @return
3912  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3913  */
3914 static struct mlx5_pools_container *
3915 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3916 {
3917         struct mlx5_priv *priv = dev->data->dev_private;
3918         struct mlx5_pools_container *cont =
3919                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3920         struct mlx5_pools_container *new_cont =
3921                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3922         struct mlx5_counter_stats_mem_mng *mem_mng;
3923         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3924         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3925         int i;
3926
3927         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3928                 /* The last resize still hasn't detected by the host thread. */
3929                 rte_errno = EAGAIN;
3930                 return NULL;
3931         }
3932         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3933         if (!new_cont->pools) {
3934                 rte_errno = ENOMEM;
3935                 return NULL;
3936         }
3937         if (cont->n)
3938                 memcpy(new_cont->pools, cont->pools, cont->n *
3939                        sizeof(struct mlx5_flow_counter_pool *));
3940         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3941                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3942         if (!mem_mng) {
3943                 rte_free(new_cont->pools);
3944                 return NULL;
3945         }
3946         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3947                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3948                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3949                                  i, next);
3950         new_cont->n = resize;
3951         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3952         TAILQ_INIT(&new_cont->pool_list);
3953         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3954         new_cont->init_mem_mng = mem_mng;
3955         rte_cio_wmb();
3956          /* Flip the master container. */
3957         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3958         return new_cont;
3959 }
3960
3961 /**
3962  * Query a devx flow counter.
3963  *
3964  * @param[in] dev
3965  *   Pointer to the Ethernet device structure.
3966  * @param[in] cnt
3967  *   Pointer to the flow counter.
3968  * @param[out] pkts
3969  *   The statistics value of packets.
3970  * @param[out] bytes
3971  *   The statistics value of bytes.
3972  *
3973  * @return
3974  *   0 on success, otherwise a negative errno value and rte_errno is set.
3975  */
3976 static inline int
3977 _flow_dv_query_count(struct rte_eth_dev *dev,
3978                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3979                      uint64_t *bytes)
3980 {
3981         struct mlx5_priv *priv = dev->data->dev_private;
3982         struct mlx5_flow_counter_pool *pool =
3983                         flow_dv_counter_pool_get(cnt);
3984         int offset = cnt - &pool->counters_raw[0];
3985
3986         if (priv->counter_fallback)
3987                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3988
3989         rte_spinlock_lock(&pool->sl);
3990         /*
3991          * The single counters allocation may allocate smaller ID than the
3992          * current allocated in parallel to the host reading.
3993          * In this case the new counter values must be reported as 0.
3994          */
3995         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
3996                 *pkts = 0;
3997                 *bytes = 0;
3998         } else {
3999                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4000                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4001         }
4002         rte_spinlock_unlock(&pool->sl);
4003         return 0;
4004 }
4005
4006 /**
4007  * Create and initialize a new counter pool.
4008  *
4009  * @param[in] dev
4010  *   Pointer to the Ethernet device structure.
4011  * @param[out] dcs
4012  *   The devX counter handle.
4013  * @param[in] batch
4014  *   Whether the pool is for counter that was allocated by batch command.
4015  *
4016  * @return
4017  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4018  */
4019 static struct mlx5_flow_counter_pool *
4020 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4021                     uint32_t batch)
4022 {
4023         struct mlx5_priv *priv = dev->data->dev_private;
4024         struct mlx5_flow_counter_pool *pool;
4025         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4026                                                                0);
4027         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4028         uint32_t size;
4029
4030         if (cont->n == n_valid) {
4031                 cont = flow_dv_container_resize(dev, batch);
4032                 if (!cont)
4033                         return NULL;
4034         }
4035         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4036                         sizeof(struct mlx5_flow_counter);
4037         pool = rte_calloc(__func__, 1, size, 0);
4038         if (!pool) {
4039                 rte_errno = ENOMEM;
4040                 return NULL;
4041         }
4042         pool->min_dcs = dcs;
4043         pool->raw = cont->init_mem_mng->raws + n_valid %
4044                                                      MLX5_CNT_CONTAINER_RESIZE;
4045         pool->raw_hw = NULL;
4046         rte_spinlock_init(&pool->sl);
4047         /*
4048          * The generation of the new allocated counters in this pool is 0, 2 in
4049          * the pool generation makes all the counters valid for allocation.
4050          */
4051         rte_atomic64_set(&pool->query_gen, 0x2);
4052         TAILQ_INIT(&pool->counters);
4053         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4054         cont->pools[n_valid] = pool;
4055         /* Pool initialization must be updated before host thread access. */
4056         rte_cio_wmb();
4057         rte_atomic16_add(&cont->n_valid, 1);
4058         return pool;
4059 }
4060
4061 /**
4062  * Prepare a new counter and/or a new counter pool.
4063  *
4064  * @param[in] dev
4065  *   Pointer to the Ethernet device structure.
4066  * @param[out] cnt_free
4067  *   Where to put the pointer of a new counter.
4068  * @param[in] batch
4069  *   Whether the pool is for counter that was allocated by batch command.
4070  *
4071  * @return
4072  *   The free counter pool pointer and @p cnt_free is set on success,
4073  *   NULL otherwise and rte_errno is set.
4074  */
4075 static struct mlx5_flow_counter_pool *
4076 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4077                              struct mlx5_flow_counter **cnt_free,
4078                              uint32_t batch)
4079 {
4080         struct mlx5_priv *priv = dev->data->dev_private;
4081         struct mlx5_flow_counter_pool *pool;
4082         struct mlx5_devx_obj *dcs = NULL;
4083         struct mlx5_flow_counter *cnt;
4084         uint32_t i;
4085
4086         if (!batch) {
4087                 /* bulk_bitmap must be 0 for single counter allocation. */
4088                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4089                 if (!dcs)
4090                         return NULL;
4091                 pool = flow_dv_find_pool_by_id
4092                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4093                 if (!pool) {
4094                         pool = flow_dv_pool_create(dev, dcs, batch);
4095                         if (!pool) {
4096                                 mlx5_devx_cmd_destroy(dcs);
4097                                 return NULL;
4098                         }
4099                 } else if (dcs->id < pool->min_dcs->id) {
4100                         rte_atomic64_set(&pool->a64_dcs,
4101                                          (int64_t)(uintptr_t)dcs);
4102                 }
4103                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4104                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4105                 cnt->dcs = dcs;
4106                 *cnt_free = cnt;
4107                 return pool;
4108         }
4109         /* bulk_bitmap is in 128 counters units. */
4110         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4111                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4112         if (!dcs) {
4113                 rte_errno = ENODATA;
4114                 return NULL;
4115         }
4116         pool = flow_dv_pool_create(dev, dcs, batch);
4117         if (!pool) {
4118                 mlx5_devx_cmd_destroy(dcs);
4119                 return NULL;
4120         }
4121         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4122                 cnt = &pool->counters_raw[i];
4123                 cnt->pool = pool;
4124                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4125         }
4126         *cnt_free = &pool->counters_raw[0];
4127         return pool;
4128 }
4129
4130 /**
4131  * Search for existed shared counter.
4132  *
4133  * @param[in] cont
4134  *   Pointer to the relevant counter pool container.
4135  * @param[in] id
4136  *   The shared counter ID to search.
4137  *
4138  * @return
4139  *   NULL if not existed, otherwise pointer to the shared counter.
4140  */
4141 static struct mlx5_flow_counter *
4142 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4143                               uint32_t id)
4144 {
4145         static struct mlx5_flow_counter *cnt;
4146         struct mlx5_flow_counter_pool *pool;
4147         int i;
4148
4149         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4150                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4151                         cnt = &pool->counters_raw[i];
4152                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4153                                 return cnt;
4154                 }
4155         }
4156         return NULL;
4157 }
4158
4159 /**
4160  * Allocate a flow counter.
4161  *
4162  * @param[in] dev
4163  *   Pointer to the Ethernet device structure.
4164  * @param[in] shared
4165  *   Indicate if this counter is shared with other flows.
4166  * @param[in] id
4167  *   Counter identifier.
4168  * @param[in] group
4169  *   Counter flow group.
4170  *
4171  * @return
4172  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4173  */
4174 static struct mlx5_flow_counter *
4175 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4176                       uint16_t group)
4177 {
4178         struct mlx5_priv *priv = dev->data->dev_private;
4179         struct mlx5_flow_counter_pool *pool = NULL;
4180         struct mlx5_flow_counter *cnt_free = NULL;
4181         /*
4182          * Currently group 0 flow counter cannot be assigned to a flow if it is
4183          * not the first one in the batch counter allocation, so it is better
4184          * to allocate counters one by one for these flows in a separate
4185          * container.
4186          * A counter can be shared between different groups so need to take
4187          * shared counters from the single container.
4188          */
4189         uint32_t batch = (group && !shared) ? 1 : 0;
4190         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4191                                                                0);
4192
4193         if (priv->counter_fallback)
4194                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4195         if (!priv->config.devx) {
4196                 rte_errno = ENOTSUP;
4197                 return NULL;
4198         }
4199         if (shared) {
4200                 cnt_free = flow_dv_counter_shared_search(cont, id);
4201                 if (cnt_free) {
4202                         if (cnt_free->ref_cnt + 1 == 0) {
4203                                 rte_errno = E2BIG;
4204                                 return NULL;
4205                         }
4206                         cnt_free->ref_cnt++;
4207                         return cnt_free;
4208                 }
4209         }
4210         /* Pools which has a free counters are in the start. */
4211         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4212                 /*
4213                  * The free counter reset values must be updated between the
4214                  * counter release to the counter allocation, so, at least one
4215                  * query must be done in this time. ensure it by saving the
4216                  * query generation in the release time.
4217                  * The free list is sorted according to the generation - so if
4218                  * the first one is not updated, all the others are not
4219                  * updated too.
4220                  */
4221                 cnt_free = TAILQ_FIRST(&pool->counters);
4222                 if (cnt_free && cnt_free->query_gen + 1 <
4223                     rte_atomic64_read(&pool->query_gen))
4224                         break;
4225                 cnt_free = NULL;
4226         }
4227         if (!cnt_free) {
4228                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4229                 if (!pool)
4230                         return NULL;
4231         }
4232         cnt_free->batch = batch;
4233         /* Create a DV counter action only in the first time usage. */
4234         if (!cnt_free->action) {
4235                 uint16_t offset;
4236                 struct mlx5_devx_obj *dcs;
4237
4238                 if (batch) {
4239                         offset = cnt_free - &pool->counters_raw[0];
4240                         dcs = pool->min_dcs;
4241                 } else {
4242                         offset = 0;
4243                         dcs = cnt_free->dcs;
4244                 }
4245                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4246                                         (dcs->obj, offset);
4247                 if (!cnt_free->action) {
4248                         rte_errno = errno;
4249                         return NULL;
4250                 }
4251         }
4252         /* Update the counter reset values. */
4253         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4254                                  &cnt_free->bytes))
4255                 return NULL;
4256         cnt_free->shared = shared;
4257         cnt_free->ref_cnt = 1;
4258         cnt_free->id = id;
4259         if (!priv->sh->cmng.query_thread_on)
4260                 /* Start the asynchronous batch query by the host thread. */
4261                 mlx5_set_query_alarm(priv->sh);
4262         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4263         if (TAILQ_EMPTY(&pool->counters)) {
4264                 /* Move the pool to the end of the container pool list. */
4265                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4266                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4267         }
4268         return cnt_free;
4269 }
4270
4271 /**
4272  * Release a flow counter.
4273  *
4274  * @param[in] dev
4275  *   Pointer to the Ethernet device structure.
4276  * @param[in] counter
4277  *   Pointer to the counter handler.
4278  */
4279 static void
4280 flow_dv_counter_release(struct rte_eth_dev *dev,
4281                         struct mlx5_flow_counter *counter)
4282 {
4283         struct mlx5_priv *priv = dev->data->dev_private;
4284
4285         if (!counter)
4286                 return;
4287         if (priv->counter_fallback) {
4288                 flow_dv_counter_release_fallback(dev, counter);
4289                 return;
4290         }
4291         if (--counter->ref_cnt == 0) {
4292                 struct mlx5_flow_counter_pool *pool =
4293                                 flow_dv_counter_pool_get(counter);
4294
4295                 /* Put the counter in the end - the last updated one. */
4296                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4297                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4298         }
4299 }
4300
4301 /**
4302  * Verify the @p attributes will be correctly understood by the NIC and store
4303  * them in the @p flow if everything is correct.
4304  *
4305  * @param[in] dev
4306  *   Pointer to dev struct.
4307  * @param[in] attributes
4308  *   Pointer to flow attributes
4309  * @param[in] external
4310  *   This flow rule is created by request external to PMD.
4311  * @param[out] error
4312  *   Pointer to error structure.
4313  *
4314  * @return
4315  *   0 on success, a negative errno value otherwise and rte_errno is set.
4316  */
4317 static int
4318 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4319                             const struct rte_flow_attr *attributes,
4320                             bool external __rte_unused,
4321                             struct rte_flow_error *error)
4322 {
4323         struct mlx5_priv *priv = dev->data->dev_private;
4324         uint32_t priority_max = priv->config.flow_prio - 1;
4325
4326 #ifndef HAVE_MLX5DV_DR
4327         if (attributes->group)
4328                 return rte_flow_error_set(error, ENOTSUP,
4329                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4330                                           NULL,
4331                                           "groups are not supported");
4332 #else
4333         uint32_t table;
4334         int ret;
4335
4336         ret = mlx5_flow_group_to_table(attributes, external,
4337                                        attributes->group,
4338                                        &table, error);
4339         if (ret)
4340                 return ret;
4341 #endif
4342         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4343             attributes->priority >= priority_max)
4344                 return rte_flow_error_set(error, ENOTSUP,
4345                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4346                                           NULL,
4347                                           "priority out of range");
4348         if (attributes->transfer) {
4349                 if (!priv->config.dv_esw_en)
4350                         return rte_flow_error_set
4351                                 (error, ENOTSUP,
4352                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4353                                  "E-Switch dr is not supported");
4354                 if (!(priv->representor || priv->master))
4355                         return rte_flow_error_set
4356                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4357                                  NULL, "E-Switch configuration can only be"
4358                                  " done by a master or a representor device");
4359                 if (attributes->egress)
4360                         return rte_flow_error_set
4361                                 (error, ENOTSUP,
4362                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4363                                  "egress is not supported");
4364         }
4365         if (!(attributes->egress ^ attributes->ingress))
4366                 return rte_flow_error_set(error, ENOTSUP,
4367                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4368                                           "must specify exactly one of "
4369                                           "ingress or egress");
4370         return 0;
4371 }
4372
4373 /**
4374  * Internal validation function. For validating both actions and items.
4375  *
4376  * @param[in] dev
4377  *   Pointer to the rte_eth_dev structure.
4378  * @param[in] attr
4379  *   Pointer to the flow attributes.
4380  * @param[in] items
4381  *   Pointer to the list of items.
4382  * @param[in] actions
4383  *   Pointer to the list of actions.
4384  * @param[in] external
4385  *   This flow rule is created by request external to PMD.
4386  * @param[out] error
4387  *   Pointer to the error structure.
4388  *
4389  * @return
4390  *   0 on success, a negative errno value otherwise and rte_errno is set.
4391  */
4392 static int
4393 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4394                  const struct rte_flow_item items[],
4395                  const struct rte_flow_action actions[],
4396                  bool external, struct rte_flow_error *error)
4397 {
4398         int ret;
4399         uint64_t action_flags = 0;
4400         uint64_t item_flags = 0;
4401         uint64_t last_item = 0;
4402         uint8_t next_protocol = 0xff;
4403         uint16_t ether_type = 0;
4404         int actions_n = 0;
4405         const struct rte_flow_item *gre_item = NULL;
4406         struct rte_flow_item_tcp nic_tcp_mask = {
4407                 .hdr = {
4408                         .tcp_flags = 0xFF,
4409                         .src_port = RTE_BE16(UINT16_MAX),
4410                         .dst_port = RTE_BE16(UINT16_MAX),
4411                 }
4412         };
4413         struct mlx5_priv *priv = dev->data->dev_private;
4414         struct mlx5_dev_config *dev_conf = &priv->config;
4415
4416         if (items == NULL)
4417                 return -1;
4418         ret = flow_dv_validate_attributes(dev, attr, external, error);
4419         if (ret < 0)
4420                 return ret;
4421         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4422                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4423                 int type = items->type;
4424
4425                 switch (type) {
4426                 case RTE_FLOW_ITEM_TYPE_VOID:
4427                         break;
4428                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4429                         ret = flow_dv_validate_item_port_id
4430                                         (dev, items, attr, item_flags, error);
4431                         if (ret < 0)
4432                                 return ret;
4433                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4434                         break;
4435                 case RTE_FLOW_ITEM_TYPE_ETH:
4436                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4437                                                           error);
4438                         if (ret < 0)
4439                                 return ret;
4440                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4441                                              MLX5_FLOW_LAYER_OUTER_L2;
4442                         if (items->mask != NULL && items->spec != NULL) {
4443                                 ether_type =
4444                                         ((const struct rte_flow_item_eth *)
4445                                          items->spec)->type;
4446                                 ether_type &=
4447                                         ((const struct rte_flow_item_eth *)
4448                                          items->mask)->type;
4449                                 ether_type = rte_be_to_cpu_16(ether_type);
4450                         } else {
4451                                 ether_type = 0;
4452                         }
4453                         break;
4454                 case RTE_FLOW_ITEM_TYPE_VLAN:
4455                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4456                                                            dev, error);
4457                         if (ret < 0)
4458                                 return ret;
4459                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4460                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4461                         if (items->mask != NULL && items->spec != NULL) {
4462                                 ether_type =
4463                                         ((const struct rte_flow_item_vlan *)
4464                                          items->spec)->inner_type;
4465                                 ether_type &=
4466                                         ((const struct rte_flow_item_vlan *)
4467                                          items->mask)->inner_type;
4468                                 ether_type = rte_be_to_cpu_16(ether_type);
4469                         } else {
4470                                 ether_type = 0;
4471                         }
4472                         break;
4473                 case RTE_FLOW_ITEM_TYPE_IPV4:
4474                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4475                                                   &item_flags, &tunnel);
4476                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4477                                                            last_item,
4478                                                            ether_type, NULL,
4479                                                            error);
4480                         if (ret < 0)
4481                                 return ret;
4482                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4483                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4484                         if (items->mask != NULL &&
4485                             ((const struct rte_flow_item_ipv4 *)
4486                              items->mask)->hdr.next_proto_id) {
4487                                 next_protocol =
4488                                         ((const struct rte_flow_item_ipv4 *)
4489                                          (items->spec))->hdr.next_proto_id;
4490                                 next_protocol &=
4491                                         ((const struct rte_flow_item_ipv4 *)
4492                                          (items->mask))->hdr.next_proto_id;
4493                         } else {
4494                                 /* Reset for inner layer. */
4495                                 next_protocol = 0xff;
4496                         }
4497                         break;
4498                 case RTE_FLOW_ITEM_TYPE_IPV6:
4499                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4500                                                   &item_flags, &tunnel);
4501                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4502                                                            last_item,
4503                                                            ether_type, NULL,
4504                                                            error);
4505                         if (ret < 0)
4506                                 return ret;
4507                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4508                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4509                         if (items->mask != NULL &&
4510                             ((const struct rte_flow_item_ipv6 *)
4511                              items->mask)->hdr.proto) {
4512                                 next_protocol =
4513                                         ((const struct rte_flow_item_ipv6 *)
4514                                          items->spec)->hdr.proto;
4515                                 next_protocol &=
4516                                         ((const struct rte_flow_item_ipv6 *)
4517                                          items->mask)->hdr.proto;
4518                         } else {
4519                                 /* Reset for inner layer. */
4520                                 next_protocol = 0xff;
4521                         }
4522                         break;
4523                 case RTE_FLOW_ITEM_TYPE_TCP:
4524                         ret = mlx5_flow_validate_item_tcp
4525                                                 (items, item_flags,
4526                                                  next_protocol,
4527                                                  &nic_tcp_mask,
4528                                                  error);
4529                         if (ret < 0)
4530                                 return ret;
4531                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4532                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4533                         break;
4534                 case RTE_FLOW_ITEM_TYPE_UDP:
4535                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4536                                                           next_protocol,
4537                                                           error);
4538                         if (ret < 0)
4539                                 return ret;
4540                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4541                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4542                         break;
4543                 case RTE_FLOW_ITEM_TYPE_GRE:
4544                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4545                                                           next_protocol, error);
4546                         if (ret < 0)
4547                                 return ret;
4548                         gre_item = items;
4549                         last_item = MLX5_FLOW_LAYER_GRE;
4550                         break;
4551                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4552                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4553                                                             next_protocol,
4554                                                             error);
4555                         if (ret < 0)
4556                                 return ret;
4557                         last_item = MLX5_FLOW_LAYER_NVGRE;
4558                         break;
4559                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4560                         ret = mlx5_flow_validate_item_gre_key
4561                                 (items, item_flags, gre_item, error);
4562                         if (ret < 0)
4563                                 return ret;
4564                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4565                         break;
4566                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4567                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4568                                                             error);
4569                         if (ret < 0)
4570                                 return ret;
4571                         last_item = MLX5_FLOW_LAYER_VXLAN;
4572                         break;
4573                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4574                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4575                                                                 item_flags, dev,
4576                                                                 error);
4577                         if (ret < 0)
4578                                 return ret;
4579                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4580                         break;
4581                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4582                         ret = mlx5_flow_validate_item_geneve(items,
4583                                                              item_flags, dev,
4584                                                              error);
4585                         if (ret < 0)
4586                                 return ret;
4587                         last_item = MLX5_FLOW_LAYER_GENEVE;
4588                         break;
4589                 case RTE_FLOW_ITEM_TYPE_MPLS:
4590                         ret = mlx5_flow_validate_item_mpls(dev, items,
4591                                                            item_flags,
4592                                                            last_item, error);
4593                         if (ret < 0)
4594                                 return ret;
4595                         last_item = MLX5_FLOW_LAYER_MPLS;
4596                         break;
4597
4598                 case RTE_FLOW_ITEM_TYPE_MARK:
4599                         ret = flow_dv_validate_item_mark(dev, items, attr,
4600                                                          error);
4601                         if (ret < 0)
4602                                 return ret;
4603                         last_item = MLX5_FLOW_ITEM_MARK;
4604                         break;
4605                 case RTE_FLOW_ITEM_TYPE_META:
4606                         ret = flow_dv_validate_item_meta(dev, items, attr,
4607                                                          error);
4608                         if (ret < 0)
4609                                 return ret;
4610                         last_item = MLX5_FLOW_ITEM_METADATA;
4611                         break;
4612                 case RTE_FLOW_ITEM_TYPE_ICMP:
4613                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4614                                                            next_protocol,
4615                                                            error);
4616                         if (ret < 0)
4617                                 return ret;
4618                         last_item = MLX5_FLOW_LAYER_ICMP;
4619                         break;
4620                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4621                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4622                                                             next_protocol,
4623                                                             error);
4624                         if (ret < 0)
4625                                 return ret;
4626                         last_item = MLX5_FLOW_LAYER_ICMP6;
4627                         break;
4628                 case RTE_FLOW_ITEM_TYPE_TAG:
4629                         ret = flow_dv_validate_item_tag(dev, items,
4630                                                         attr, error);
4631                         if (ret < 0)
4632                                 return ret;
4633                         last_item = MLX5_FLOW_ITEM_TAG;
4634                         break;
4635                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4636                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4637                         break;
4638                 case RTE_FLOW_ITEM_TYPE_GTP:
4639                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4640                                                         error);
4641                         if (ret < 0)
4642                                 return ret;
4643                         last_item = MLX5_FLOW_LAYER_GTP;
4644                         break;
4645                 default:
4646                         return rte_flow_error_set(error, ENOTSUP,
4647                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4648                                                   NULL, "item not supported");
4649                 }
4650                 item_flags |= last_item;
4651         }
4652         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4653                 int type = actions->type;
4654                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4655                         return rte_flow_error_set(error, ENOTSUP,
4656                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4657                                                   actions, "too many actions");
4658                 switch (type) {
4659                 case RTE_FLOW_ACTION_TYPE_VOID:
4660                         break;
4661                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4662                         ret = flow_dv_validate_action_port_id(dev,
4663                                                               action_flags,
4664                                                               actions,
4665                                                               attr,
4666                                                               error);
4667                         if (ret)
4668                                 return ret;
4669                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4670                         ++actions_n;
4671                         break;
4672                 case RTE_FLOW_ACTION_TYPE_FLAG:
4673                         ret = flow_dv_validate_action_flag(dev, action_flags,
4674                                                            attr, error);
4675                         if (ret < 0)
4676                                 return ret;
4677                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4678                                 /* Count all modify-header actions as one. */
4679                                 if (!(action_flags &
4680                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4681                                         ++actions_n;
4682                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4683                                                 MLX5_FLOW_ACTION_MARK_EXT;
4684                         } else {
4685                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4686                                 ++actions_n;
4687                         }
4688                         break;
4689                 case RTE_FLOW_ACTION_TYPE_MARK:
4690                         ret = flow_dv_validate_action_mark(dev, actions,
4691                                                            action_flags,
4692                                                            attr, error);
4693                         if (ret < 0)
4694                                 return ret;
4695                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4696                                 /* Count all modify-header actions as one. */
4697                                 if (!(action_flags &
4698                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4699                                         ++actions_n;
4700                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4701                                                 MLX5_FLOW_ACTION_MARK_EXT;
4702                         } else {
4703                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4704                                 ++actions_n;
4705                         }
4706                         break;
4707                 case RTE_FLOW_ACTION_TYPE_SET_META:
4708                         ret = flow_dv_validate_action_set_meta(dev, actions,
4709                                                                action_flags,
4710                                                                attr, error);
4711                         if (ret < 0)
4712                                 return ret;
4713                         /* Count all modify-header actions as one action. */
4714                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4715                                 ++actions_n;
4716                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4717                         break;
4718                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4719                         ret = flow_dv_validate_action_set_tag(dev, actions,
4720                                                               action_flags,
4721                                                               attr, error);
4722                         if (ret < 0)
4723                                 return ret;
4724                         /* Count all modify-header actions as one action. */
4725                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4726                                 ++actions_n;
4727                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4728                         break;
4729                 case RTE_FLOW_ACTION_TYPE_DROP:
4730                         ret = mlx5_flow_validate_action_drop(action_flags,
4731                                                              attr, error);
4732                         if (ret < 0)
4733                                 return ret;
4734                         action_flags |= MLX5_FLOW_ACTION_DROP;
4735                         ++actions_n;
4736                         break;
4737                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4738                         ret = mlx5_flow_validate_action_queue(actions,
4739                                                               action_flags, dev,
4740                                                               attr, error);
4741                         if (ret < 0)
4742                                 return ret;
4743                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4744                         ++actions_n;
4745                         break;
4746                 case RTE_FLOW_ACTION_TYPE_RSS:
4747                         ret = mlx5_flow_validate_action_rss(actions,
4748                                                             action_flags, dev,
4749                                                             attr, item_flags,
4750                                                             error);
4751                         if (ret < 0)
4752                                 return ret;
4753                         action_flags |= MLX5_FLOW_ACTION_RSS;
4754                         ++actions_n;
4755                         break;
4756                 case RTE_FLOW_ACTION_TYPE_COUNT:
4757                         ret = flow_dv_validate_action_count(dev, error);
4758                         if (ret < 0)
4759                                 return ret;
4760                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4761                         ++actions_n;
4762                         break;
4763                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4764                         if (flow_dv_validate_action_pop_vlan(dev,
4765                                                              action_flags,
4766                                                              actions,
4767                                                              item_flags, attr,
4768                                                              error))
4769                                 return -rte_errno;
4770                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4771                         ++actions_n;
4772                         break;
4773                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4774                         ret = flow_dv_validate_action_push_vlan(action_flags,
4775                                                                 item_flags,
4776                                                                 actions, attr,
4777                                                                 error);
4778                         if (ret < 0)
4779                                 return ret;
4780                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4781                         ++actions_n;
4782                         break;
4783                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4784                         ret = flow_dv_validate_action_set_vlan_pcp
4785                                                 (action_flags, actions, error);
4786                         if (ret < 0)
4787                                 return ret;
4788                         /* Count PCP with push_vlan command. */
4789                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4790                         break;
4791                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4792                         ret = flow_dv_validate_action_set_vlan_vid
4793                                                 (item_flags, action_flags,
4794                                                  actions, error);
4795                         if (ret < 0)
4796                                 return ret;
4797                         /* Count VID with push_vlan command. */
4798                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4799                         break;
4800                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4801                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4802                         ret = flow_dv_validate_action_l2_encap(action_flags,
4803                                                                actions, attr,
4804                                                                error);
4805                         if (ret < 0)
4806                                 return ret;
4807                         action_flags |= actions->type ==
4808                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4809                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4810                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4811                         ++actions_n;
4812                         break;
4813                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4814                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4815                         ret = flow_dv_validate_action_l2_decap(action_flags,
4816                                                                attr, error);
4817                         if (ret < 0)
4818                                 return ret;
4819                         action_flags |= actions->type ==
4820                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4821                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4822                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4823                         ++actions_n;
4824                         break;
4825                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4826                         ret = flow_dv_validate_action_raw_encap(action_flags,
4827                                                                 actions, attr,
4828                                                                 error);
4829                         if (ret < 0)
4830                                 return ret;
4831                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4832                         ++actions_n;
4833                         break;
4834                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4835                         ret = flow_dv_validate_action_raw_decap(action_flags,
4836                                                                 actions, attr,
4837                                                                 error);
4838                         if (ret < 0)
4839                                 return ret;
4840                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4841                         ++actions_n;
4842                         break;
4843                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4844                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4845                         ret = flow_dv_validate_action_modify_mac(action_flags,
4846                                                                  actions,
4847                                                                  item_flags,
4848                                                                  error);
4849                         if (ret < 0)
4850                                 return ret;
4851                         /* Count all modify-header actions as one action. */
4852                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4853                                 ++actions_n;
4854                         action_flags |= actions->type ==
4855                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4856                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4857                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4858                         break;
4859
4860                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4861                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4862                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4863                                                                   actions,
4864                                                                   item_flags,
4865                                                                   error);
4866                         if (ret < 0)
4867                                 return ret;
4868                         /* Count all modify-header actions as one action. */
4869                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4870                                 ++actions_n;
4871                         action_flags |= actions->type ==
4872                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4873                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4874                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4875                         break;
4876                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4877                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4878                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4879                                                                   actions,
4880                                                                   item_flags,
4881                                                                   error);
4882                         if (ret < 0)
4883                                 return ret;
4884                         /* Count all modify-header actions as one action. */
4885                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4886                                 ++actions_n;
4887                         action_flags |= actions->type ==
4888                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4889                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4890                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4891                         break;
4892                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4893                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4894                         ret = flow_dv_validate_action_modify_tp(action_flags,
4895                                                                 actions,
4896                                                                 item_flags,
4897                                                                 error);
4898                         if (ret < 0)
4899                                 return ret;
4900                         /* Count all modify-header actions as one action. */
4901                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4902                                 ++actions_n;
4903                         action_flags |= actions->type ==
4904                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4905                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4906                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4907                         break;
4908                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4909                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4910                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4911                                                                  actions,
4912                                                                  item_flags,
4913                                                                  error);
4914                         if (ret < 0)
4915                                 return ret;
4916                         /* Count all modify-header actions as one action. */
4917                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4918                                 ++actions_n;
4919                         action_flags |= actions->type ==
4920                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4921                                                 MLX5_FLOW_ACTION_SET_TTL :
4922                                                 MLX5_FLOW_ACTION_DEC_TTL;
4923                         break;
4924                 case RTE_FLOW_ACTION_TYPE_JUMP:
4925                         ret = flow_dv_validate_action_jump(actions,
4926                                                            action_flags,
4927                                                            attr, external,
4928                                                            error);
4929                         if (ret)
4930                                 return ret;
4931                         ++actions_n;
4932                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4933                         break;
4934                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4935                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4936                         ret = flow_dv_validate_action_modify_tcp_seq
4937                                                                 (action_flags,
4938                                                                  actions,
4939                                                                  item_flags,
4940                                                                  error);
4941                         if (ret < 0)
4942                                 return ret;
4943                         /* Count all modify-header actions as one action. */
4944                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4945                                 ++actions_n;
4946                         action_flags |= actions->type ==
4947                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4948                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4949                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4950                         break;
4951                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4952                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4953                         ret = flow_dv_validate_action_modify_tcp_ack
4954                                                                 (action_flags,
4955                                                                  actions,
4956                                                                  item_flags,
4957                                                                  error);
4958                         if (ret < 0)
4959                                 return ret;
4960                         /* Count all modify-header actions as one action. */
4961                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4962                                 ++actions_n;
4963                         action_flags |= actions->type ==
4964                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4965                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4966                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4967                         break;
4968                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4969                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4970                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4971                         break;
4972                 case RTE_FLOW_ACTION_TYPE_METER:
4973                         ret = mlx5_flow_validate_action_meter(dev,
4974                                                               action_flags,
4975                                                               actions, attr,
4976                                                               error);
4977                         if (ret < 0)
4978                                 return ret;
4979                         action_flags |= MLX5_FLOW_ACTION_METER;
4980                         ++actions_n;
4981                         break;
4982                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4983                         ret = flow_dv_validate_action_modify_ipv4_dscp
4984                                                          (action_flags,
4985                                                           actions,
4986                                                           item_flags,
4987                                                           error);
4988                         if (ret < 0)
4989                                 return ret;
4990                         /* Count all modify-header actions as one action. */
4991                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4992                                 ++actions_n;
4993                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
4994                         break;
4995                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
4996                         ret = flow_dv_validate_action_modify_ipv6_dscp
4997                                                                 (action_flags,
4998                                                                  actions,
4999                                                                  item_flags,
5000                                                                  error);
5001                         if (ret < 0)
5002                                 return ret;
5003                         /* Count all modify-header actions as one action. */
5004                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5005                                 ++actions_n;
5006                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5007                         break;
5008                 default:
5009                         return rte_flow_error_set(error, ENOTSUP,
5010                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5011                                                   actions,
5012                                                   "action not supported");
5013                 }
5014         }
5015         /*
5016          * Validate the drop action mutual exclusion with other actions.
5017          * Drop action is mutually-exclusive with any other action, except for
5018          * Count action.
5019          */
5020         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5021             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5022                 return rte_flow_error_set(error, EINVAL,
5023                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5024                                           "Drop action is mutually-exclusive "
5025                                           "with any other action, except for "
5026                                           "Count action");
5027         /* Eswitch has few restrictions on using items and actions */
5028         if (attr->transfer) {
5029                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5030                     action_flags & MLX5_FLOW_ACTION_FLAG)
5031                         return rte_flow_error_set(error, ENOTSUP,
5032                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5033                                                   NULL,
5034                                                   "unsupported action FLAG");
5035                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5036                     action_flags & MLX5_FLOW_ACTION_MARK)
5037                         return rte_flow_error_set(error, ENOTSUP,
5038                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5039                                                   NULL,
5040                                                   "unsupported action MARK");
5041                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5042                         return rte_flow_error_set(error, ENOTSUP,
5043                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5044                                                   NULL,
5045                                                   "unsupported action QUEUE");
5046                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5047                         return rte_flow_error_set(error, ENOTSUP,
5048                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5049                                                   NULL,
5050                                                   "unsupported action RSS");
5051                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5052                         return rte_flow_error_set(error, EINVAL,
5053                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5054                                                   actions,
5055                                                   "no fate action is found");
5056         } else {
5057                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5058                         return rte_flow_error_set(error, EINVAL,
5059                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5060                                                   actions,
5061                                                   "no fate action is found");
5062         }
5063         return 0;
5064 }
5065
5066 /**
5067  * Internal preparation function. Allocates the DV flow size,
5068  * this size is constant.
5069  *
5070  * @param[in] attr
5071  *   Pointer to the flow attributes.
5072  * @param[in] items
5073  *   Pointer to the list of items.
5074  * @param[in] actions
5075  *   Pointer to the list of actions.
5076  * @param[out] error
5077  *   Pointer to the error structure.
5078  *
5079  * @return
5080  *   Pointer to mlx5_flow object on success,
5081  *   otherwise NULL and rte_errno is set.
5082  */
5083 static struct mlx5_flow *
5084 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5085                 const struct rte_flow_item items[] __rte_unused,
5086                 const struct rte_flow_action actions[] __rte_unused,
5087                 struct rte_flow_error *error)
5088 {
5089         size_t size = sizeof(struct mlx5_flow);
5090         struct mlx5_flow *dev_flow;
5091
5092         dev_flow = rte_calloc(__func__, 1, size, 0);
5093         if (!dev_flow) {
5094                 rte_flow_error_set(error, ENOMEM,
5095                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5096                                    "not enough memory to create flow");
5097                 return NULL;
5098         }
5099         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5100         dev_flow->ingress = attr->ingress;
5101         dev_flow->transfer = attr->transfer;
5102         return dev_flow;
5103 }
5104
5105 #ifndef NDEBUG
5106 /**
5107  * Sanity check for match mask and value. Similar to check_valid_spec() in
5108  * kernel driver. If unmasked bit is present in value, it returns failure.
5109  *
5110  * @param match_mask
5111  *   pointer to match mask buffer.
5112  * @param match_value
5113  *   pointer to match value buffer.
5114  *
5115  * @return
5116  *   0 if valid, -EINVAL otherwise.
5117  */
5118 static int
5119 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5120 {
5121         uint8_t *m = match_mask;
5122         uint8_t *v = match_value;
5123         unsigned int i;
5124
5125         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5126                 if (v[i] & ~m[i]) {
5127                         DRV_LOG(ERR,
5128                                 "match_value differs from match_criteria"
5129                                 " %p[%u] != %p[%u]",
5130                                 match_value, i, match_mask, i);
5131                         return -EINVAL;
5132                 }
5133         }
5134         return 0;
5135 }
5136 #endif
5137
5138 /**
5139  * Add Ethernet item to matcher and to the value.
5140  *
5141  * @param[in, out] matcher
5142  *   Flow matcher.
5143  * @param[in, out] key
5144  *   Flow matcher value.
5145  * @param[in] item
5146  *   Flow pattern to translate.
5147  * @param[in] inner
5148  *   Item is inner pattern.
5149  */
5150 static void
5151 flow_dv_translate_item_eth(void *matcher, void *key,
5152                            const struct rte_flow_item *item, int inner)
5153 {
5154         const struct rte_flow_item_eth *eth_m = item->mask;
5155         const struct rte_flow_item_eth *eth_v = item->spec;
5156         const struct rte_flow_item_eth nic_mask = {
5157                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5158                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5159                 .type = RTE_BE16(0xffff),
5160         };
5161         void *headers_m;
5162         void *headers_v;
5163         char *l24_v;
5164         unsigned int i;
5165
5166         if (!eth_v)
5167                 return;
5168         if (!eth_m)
5169                 eth_m = &nic_mask;
5170         if (inner) {
5171                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5172                                          inner_headers);
5173                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5174         } else {
5175                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5176                                          outer_headers);
5177                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5178         }
5179         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5180                &eth_m->dst, sizeof(eth_m->dst));
5181         /* The value must be in the range of the mask. */
5182         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5183         for (i = 0; i < sizeof(eth_m->dst); ++i)
5184                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5185         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5186                &eth_m->src, sizeof(eth_m->src));
5187         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5188         /* The value must be in the range of the mask. */
5189         for (i = 0; i < sizeof(eth_m->dst); ++i)
5190                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5191         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5192                  rte_be_to_cpu_16(eth_m->type));
5193         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5194         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5195 }
5196
5197 /**
5198  * Add VLAN item to matcher and to the value.
5199  *
5200  * @param[in, out] dev_flow
5201  *   Flow descriptor.
5202  * @param[in, out] matcher
5203  *   Flow matcher.
5204  * @param[in, out] key
5205  *   Flow matcher value.
5206  * @param[in] item
5207  *   Flow pattern to translate.
5208  * @param[in] inner
5209  *   Item is inner pattern.
5210  */
5211 static void
5212 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5213                             void *matcher, void *key,
5214                             const struct rte_flow_item *item,
5215                             int inner)
5216 {
5217         const struct rte_flow_item_vlan *vlan_m = item->mask;
5218         const struct rte_flow_item_vlan *vlan_v = item->spec;
5219         void *headers_m;
5220         void *headers_v;
5221         uint16_t tci_m;
5222         uint16_t tci_v;
5223
5224         if (!vlan_v)
5225                 return;
5226         if (!vlan_m)
5227                 vlan_m = &rte_flow_item_vlan_mask;
5228         if (inner) {
5229                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5230                                          inner_headers);
5231                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5232         } else {
5233                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5234                                          outer_headers);
5235                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5236                 /*
5237                  * This is workaround, masks are not supported,
5238                  * and pre-validated.
5239                  */
5240                 dev_flow->dv.vf_vlan.tag =
5241                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5242         }
5243         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5244         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5245         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5246         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5247         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5248         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5249         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5250         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5251         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5252         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5253         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5254                  rte_be_to_cpu_16(vlan_m->inner_type));
5255         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5256                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5257 }
5258
5259 /**
5260  * Add IPV4 item to matcher and to the value.
5261  *
5262  * @param[in, out] matcher
5263  *   Flow matcher.
5264  * @param[in, out] key
5265  *   Flow matcher value.
5266  * @param[in] item
5267  *   Flow pattern to translate.
5268  * @param[in] inner
5269  *   Item is inner pattern.
5270  * @param[in] group
5271  *   The group to insert the rule.
5272  */
5273 static void
5274 flow_dv_translate_item_ipv4(void *matcher, void *key,
5275                             const struct rte_flow_item *item,
5276                             int inner, uint32_t group)
5277 {
5278         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5279         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5280         const struct rte_flow_item_ipv4 nic_mask = {
5281                 .hdr = {
5282                         .src_addr = RTE_BE32(0xffffffff),
5283                         .dst_addr = RTE_BE32(0xffffffff),
5284                         .type_of_service = 0xff,
5285                         .next_proto_id = 0xff,
5286                 },
5287         };
5288         void *headers_m;
5289         void *headers_v;
5290         char *l24_m;
5291         char *l24_v;
5292         uint8_t tos;
5293
5294         if (inner) {
5295                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5296                                          inner_headers);
5297                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5298         } else {
5299                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5300                                          outer_headers);
5301                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5302         }
5303         if (group == 0)
5304                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5305         else
5306                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5307         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5308         if (!ipv4_v)
5309                 return;
5310         if (!ipv4_m)
5311                 ipv4_m = &nic_mask;
5312         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5313                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5314         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5315                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5316         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5317         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5318         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5319                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5320         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5321                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5322         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5323         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5324         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5325         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5326                  ipv4_m->hdr.type_of_service);
5327         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5328         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5329                  ipv4_m->hdr.type_of_service >> 2);
5330         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5331         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5332                  ipv4_m->hdr.next_proto_id);
5333         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5334                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5335 }
5336
5337 /**
5338  * Add IPV6 item to matcher and to the value.
5339  *
5340  * @param[in, out] matcher
5341  *   Flow matcher.
5342  * @param[in, out] key
5343  *   Flow matcher value.
5344  * @param[in] item
5345  *   Flow pattern to translate.
5346  * @param[in] inner
5347  *   Item is inner pattern.
5348  * @param[in] group
5349  *   The group to insert the rule.
5350  */
5351 static void
5352 flow_dv_translate_item_ipv6(void *matcher, void *key,
5353                             const struct rte_flow_item *item,
5354                             int inner, uint32_t group)
5355 {
5356         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5357         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5358         const struct rte_flow_item_ipv6 nic_mask = {
5359                 .hdr = {
5360                         .src_addr =
5361                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5362                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5363                         .dst_addr =
5364                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5365                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5366                         .vtc_flow = RTE_BE32(0xffffffff),
5367                         .proto = 0xff,
5368                         .hop_limits = 0xff,
5369                 },
5370         };
5371         void *headers_m;
5372         void *headers_v;
5373         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5374         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5375         char *l24_m;
5376         char *l24_v;
5377         uint32_t vtc_m;
5378         uint32_t vtc_v;
5379         int i;
5380         int size;
5381
5382         if (inner) {
5383                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5384                                          inner_headers);
5385                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5386         } else {
5387                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5388                                          outer_headers);
5389                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5390         }
5391         if (group == 0)
5392                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5393         else
5394                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5395         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5396         if (!ipv6_v)
5397                 return;
5398         if (!ipv6_m)
5399                 ipv6_m = &nic_mask;
5400         size = sizeof(ipv6_m->hdr.dst_addr);
5401         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5402                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5403         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5404                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5405         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5406         for (i = 0; i < size; ++i)
5407                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5408         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5409                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5410         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5411                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5412         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5413         for (i = 0; i < size; ++i)
5414                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5415         /* TOS. */
5416         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5417         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5418         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5419         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5420         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5421         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5422         /* Label. */
5423         if (inner) {
5424                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5425                          vtc_m);
5426                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5427                          vtc_v);
5428         } else {
5429                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5430                          vtc_m);
5431                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5432                          vtc_v);
5433         }
5434         /* Protocol. */
5435         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5436                  ipv6_m->hdr.proto);
5437         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5438                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5439 }
5440
5441 /**
5442  * Add TCP item to matcher and to the value.
5443  *
5444  * @param[in, out] matcher
5445  *   Flow matcher.
5446  * @param[in, out] key
5447  *   Flow matcher value.
5448  * @param[in] item
5449  *   Flow pattern to translate.
5450  * @param[in] inner
5451  *   Item is inner pattern.
5452  */
5453 static void
5454 flow_dv_translate_item_tcp(void *matcher, void *key,
5455                            const struct rte_flow_item *item,
5456                            int inner)
5457 {
5458         const struct rte_flow_item_tcp *tcp_m = item->mask;
5459         const struct rte_flow_item_tcp *tcp_v = item->spec;
5460         void *headers_m;
5461         void *headers_v;
5462
5463         if (inner) {
5464                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5465                                          inner_headers);
5466                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5467         } else {
5468                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5469                                          outer_headers);
5470                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5471         }
5472         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5473         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5474         if (!tcp_v)
5475                 return;
5476         if (!tcp_m)
5477                 tcp_m = &rte_flow_item_tcp_mask;
5478         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5479                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5480         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5481                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5482         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5483                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5484         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5485                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5486         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5487                  tcp_m->hdr.tcp_flags);
5488         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5489                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5490 }
5491
5492 /**
5493  * Add UDP item to matcher and to the value.
5494  *
5495  * @param[in, out] matcher
5496  *   Flow matcher.
5497  * @param[in, out] key
5498  *   Flow matcher value.
5499  * @param[in] item
5500  *   Flow pattern to translate.
5501  * @param[in] inner
5502  *   Item is inner pattern.
5503  */
5504 static void
5505 flow_dv_translate_item_udp(void *matcher, void *key,
5506                            const struct rte_flow_item *item,
5507                            int inner)
5508 {
5509         const struct rte_flow_item_udp *udp_m = item->mask;
5510         const struct rte_flow_item_udp *udp_v = item->spec;
5511         void *headers_m;
5512         void *headers_v;
5513
5514         if (inner) {
5515                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5516                                          inner_headers);
5517                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5518         } else {
5519                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5520                                          outer_headers);
5521                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5522         }
5523         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5524         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5525         if (!udp_v)
5526                 return;
5527         if (!udp_m)
5528                 udp_m = &rte_flow_item_udp_mask;
5529         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5530                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5531         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5532                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5533         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5534                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5535         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5536                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5537 }
5538
5539 /**
5540  * Add GRE optional Key item to matcher and to the value.
5541  *
5542  * @param[in, out] matcher
5543  *   Flow matcher.
5544  * @param[in, out] key
5545  *   Flow matcher value.
5546  * @param[in] item
5547  *   Flow pattern to translate.
5548  * @param[in] inner
5549  *   Item is inner pattern.
5550  */
5551 static void
5552 flow_dv_translate_item_gre_key(void *matcher, void *key,
5553                                    const struct rte_flow_item *item)
5554 {
5555         const rte_be32_t *key_m = item->mask;
5556         const rte_be32_t *key_v = item->spec;
5557         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5558         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5559         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5560
5561         if (!key_v)
5562                 return;
5563         if (!key_m)
5564                 key_m = &gre_key_default_mask;
5565         /* GRE K bit must be on and should already be validated */
5566         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5567         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5568         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5569                  rte_be_to_cpu_32(*key_m) >> 8);
5570         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5571                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5572         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5573                  rte_be_to_cpu_32(*key_m) & 0xFF);
5574         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5575                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5576 }
5577
5578 /**
5579  * Add GRE item to matcher and to the value.
5580  *
5581  * @param[in, out] matcher
5582  *   Flow matcher.
5583  * @param[in, out] key
5584  *   Flow matcher value.
5585  * @param[in] item
5586  *   Flow pattern to translate.
5587  * @param[in] inner
5588  *   Item is inner pattern.
5589  */
5590 static void
5591 flow_dv_translate_item_gre(void *matcher, void *key,
5592                            const struct rte_flow_item *item,
5593                            int inner)
5594 {
5595         const struct rte_flow_item_gre *gre_m = item->mask;
5596         const struct rte_flow_item_gre *gre_v = item->spec;
5597         void *headers_m;
5598         void *headers_v;
5599         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5600         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5601         struct {
5602                 union {
5603                         __extension__
5604                         struct {
5605                                 uint16_t version:3;
5606                                 uint16_t rsvd0:9;
5607                                 uint16_t s_present:1;
5608                                 uint16_t k_present:1;
5609                                 uint16_t rsvd_bit1:1;
5610                                 uint16_t c_present:1;
5611                         };
5612                         uint16_t value;
5613                 };
5614         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5615
5616         if (inner) {
5617                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5618                                          inner_headers);
5619                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5620         } else {
5621                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5622                                          outer_headers);
5623                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5624         }
5625         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5626         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5627         if (!gre_v)
5628                 return;
5629         if (!gre_m)
5630                 gre_m = &rte_flow_item_gre_mask;
5631         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5632                  rte_be_to_cpu_16(gre_m->protocol));
5633         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5634                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5635         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5636         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5637         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5638                  gre_crks_rsvd0_ver_m.c_present);
5639         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5640                  gre_crks_rsvd0_ver_v.c_present &
5641                  gre_crks_rsvd0_ver_m.c_present);
5642         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5643                  gre_crks_rsvd0_ver_m.k_present);
5644         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5645                  gre_crks_rsvd0_ver_v.k_present &
5646                  gre_crks_rsvd0_ver_m.k_present);
5647         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5648                  gre_crks_rsvd0_ver_m.s_present);
5649         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5650                  gre_crks_rsvd0_ver_v.s_present &
5651                  gre_crks_rsvd0_ver_m.s_present);
5652 }
5653
5654 /**
5655  * Add NVGRE item to matcher and to the value.
5656  *
5657  * @param[in, out] matcher
5658  *   Flow matcher.
5659  * @param[in, out] key
5660  *   Flow matcher value.
5661  * @param[in] item
5662  *   Flow pattern to translate.
5663  * @param[in] inner
5664  *   Item is inner pattern.
5665  */
5666 static void
5667 flow_dv_translate_item_nvgre(void *matcher, void *key,
5668                              const struct rte_flow_item *item,
5669                              int inner)
5670 {
5671         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5672         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5673         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5674         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5675         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5676         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5677         char *gre_key_m;
5678         char *gre_key_v;
5679         int size;
5680         int i;
5681
5682         /* For NVGRE, GRE header fields must be set with defined values. */
5683         const struct rte_flow_item_gre gre_spec = {
5684                 .c_rsvd0_ver = RTE_BE16(0x2000),
5685                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5686         };
5687         const struct rte_flow_item_gre gre_mask = {
5688                 .c_rsvd0_ver = RTE_BE16(0xB000),
5689                 .protocol = RTE_BE16(UINT16_MAX),
5690         };
5691         const struct rte_flow_item gre_item = {
5692                 .spec = &gre_spec,
5693                 .mask = &gre_mask,
5694                 .last = NULL,
5695         };
5696         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5697         if (!nvgre_v)
5698                 return;
5699         if (!nvgre_m)
5700                 nvgre_m = &rte_flow_item_nvgre_mask;
5701         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5702         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5703         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5704         memcpy(gre_key_m, tni_flow_id_m, size);
5705         for (i = 0; i < size; ++i)
5706                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5707 }
5708
5709 /**
5710  * Add VXLAN item to matcher and to the value.
5711  *
5712  * @param[in, out] matcher
5713  *   Flow matcher.
5714  * @param[in, out] key
5715  *   Flow matcher value.
5716  * @param[in] item
5717  *   Flow pattern to translate.
5718  * @param[in] inner
5719  *   Item is inner pattern.
5720  */
5721 static void
5722 flow_dv_translate_item_vxlan(void *matcher, void *key,
5723                              const struct rte_flow_item *item,
5724                              int inner)
5725 {
5726         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5727         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5728         void *headers_m;
5729         void *headers_v;
5730         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5731         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5732         char *vni_m;
5733         char *vni_v;
5734         uint16_t dport;
5735         int size;
5736         int i;
5737
5738         if (inner) {
5739                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5740                                          inner_headers);
5741                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5742         } else {
5743                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5744                                          outer_headers);
5745                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5746         }
5747         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5748                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5749         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5750                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5751                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5752         }
5753         if (!vxlan_v)
5754                 return;
5755         if (!vxlan_m)
5756                 vxlan_m = &rte_flow_item_vxlan_mask;
5757         size = sizeof(vxlan_m->vni);
5758         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5759         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5760         memcpy(vni_m, vxlan_m->vni, size);
5761         for (i = 0; i < size; ++i)
5762                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5763 }
5764
5765 /**
5766  * Add Geneve item to matcher and to the value.
5767  *
5768  * @param[in, out] matcher
5769  *   Flow matcher.
5770  * @param[in, out] key
5771  *   Flow matcher value.
5772  * @param[in] item
5773  *   Flow pattern to translate.
5774  * @param[in] inner
5775  *   Item is inner pattern.
5776  */
5777
5778 static void
5779 flow_dv_translate_item_geneve(void *matcher, void *key,
5780                               const struct rte_flow_item *item, int inner)
5781 {
5782         const struct rte_flow_item_geneve *geneve_m = item->mask;
5783         const struct rte_flow_item_geneve *geneve_v = item->spec;
5784         void *headers_m;
5785         void *headers_v;
5786         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5787         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5788         uint16_t dport;
5789         uint16_t gbhdr_m;
5790         uint16_t gbhdr_v;
5791         char *vni_m;
5792         char *vni_v;
5793         size_t size, i;
5794
5795         if (inner) {
5796                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5797                                          inner_headers);
5798                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5799         } else {
5800                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5801                                          outer_headers);
5802                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5803         }
5804         dport = MLX5_UDP_PORT_GENEVE;
5805         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5806                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5807                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5808         }
5809         if (!geneve_v)
5810                 return;
5811         if (!geneve_m)
5812                 geneve_m = &rte_flow_item_geneve_mask;
5813         size = sizeof(geneve_m->vni);
5814         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5815         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5816         memcpy(vni_m, geneve_m->vni, size);
5817         for (i = 0; i < size; ++i)
5818                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5819         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5820                  rte_be_to_cpu_16(geneve_m->protocol));
5821         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5822                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5823         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5824         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5825         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5826                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5827         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5828                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5829         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5830                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5831         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5832                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5833                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5834 }
5835
5836 /**
5837  * Add MPLS item to matcher and to the value.
5838  *
5839  * @param[in, out] matcher
5840  *   Flow matcher.
5841  * @param[in, out] key
5842  *   Flow matcher value.
5843  * @param[in] item
5844  *   Flow pattern to translate.
5845  * @param[in] prev_layer
5846  *   The protocol layer indicated in previous item.
5847  * @param[in] inner
5848  *   Item is inner pattern.
5849  */
5850 static void
5851 flow_dv_translate_item_mpls(void *matcher, void *key,
5852                             const struct rte_flow_item *item,
5853                             uint64_t prev_layer,
5854                             int inner)
5855 {
5856         const uint32_t *in_mpls_m = item->mask;
5857         const uint32_t *in_mpls_v = item->spec;
5858         uint32_t *out_mpls_m = 0;
5859         uint32_t *out_mpls_v = 0;
5860         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5861         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5862         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5863                                      misc_parameters_2);
5864         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5865         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5866         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5867
5868         switch (prev_layer) {
5869         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5870                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5871                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5872                          MLX5_UDP_PORT_MPLS);
5873                 break;
5874         case MLX5_FLOW_LAYER_GRE:
5875                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5876                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5877                          RTE_ETHER_TYPE_MPLS);
5878                 break;
5879         default:
5880                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5881                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5882                          IPPROTO_MPLS);
5883                 break;
5884         }
5885         if (!in_mpls_v)
5886                 return;
5887         if (!in_mpls_m)
5888                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5889         switch (prev_layer) {
5890         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5891                 out_mpls_m =
5892                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5893                                                  outer_first_mpls_over_udp);
5894                 out_mpls_v =
5895                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5896                                                  outer_first_mpls_over_udp);
5897                 break;
5898         case MLX5_FLOW_LAYER_GRE:
5899                 out_mpls_m =
5900                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5901                                                  outer_first_mpls_over_gre);
5902                 out_mpls_v =
5903                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5904                                                  outer_first_mpls_over_gre);
5905                 break;
5906         default:
5907                 /* Inner MPLS not over GRE is not supported. */
5908                 if (!inner) {
5909                         out_mpls_m =
5910                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5911                                                          misc2_m,
5912                                                          outer_first_mpls);
5913                         out_mpls_v =
5914                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5915                                                          misc2_v,
5916                                                          outer_first_mpls);
5917                 }
5918                 break;
5919         }
5920         if (out_mpls_m && out_mpls_v) {
5921                 *out_mpls_m = *in_mpls_m;
5922                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5923         }
5924 }
5925
5926 /**
5927  * Add metadata register item to matcher
5928  *
5929  * @param[in, out] matcher
5930  *   Flow matcher.
5931  * @param[in, out] key
5932  *   Flow matcher value.
5933  * @param[in] reg_type
5934  *   Type of device metadata register
5935  * @param[in] value
5936  *   Register value
5937  * @param[in] mask
5938  *   Register mask
5939  */
5940 static void
5941 flow_dv_match_meta_reg(void *matcher, void *key,
5942                        enum modify_reg reg_type,
5943                        uint32_t data, uint32_t mask)
5944 {
5945         void *misc2_m =
5946                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5947         void *misc2_v =
5948                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5949         uint32_t temp;
5950
5951         data &= mask;
5952         switch (reg_type) {
5953         case REG_A:
5954                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5955                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5956                 break;
5957         case REG_B:
5958                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5959                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5960                 break;
5961         case REG_C_0:
5962                 /*
5963                  * The metadata register C0 field might be divided into
5964                  * source vport index and META item value, we should set
5965                  * this field according to specified mask, not as whole one.
5966                  */
5967                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
5968                 temp |= mask;
5969                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
5970                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
5971                 temp &= ~mask;
5972                 temp |= data;
5973                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
5974                 break;
5975         case REG_C_1:
5976                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5977                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5978                 break;
5979         case REG_C_2:
5980                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5981                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5982                 break;
5983         case REG_C_3:
5984                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
5985                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
5986                 break;
5987         case REG_C_4:
5988                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
5989                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
5990                 break;
5991         case REG_C_5:
5992                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
5993                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
5994                 break;
5995         case REG_C_6:
5996                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
5997                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
5998                 break;
5999         case REG_C_7:
6000                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6001                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6002                 break;
6003         default:
6004                 assert(false);
6005                 break;
6006         }
6007 }
6008
6009 /**
6010  * Add MARK item to matcher
6011  *
6012  * @param[in] dev
6013  *   The device to configure through.
6014  * @param[in, out] matcher
6015  *   Flow matcher.
6016  * @param[in, out] key
6017  *   Flow matcher value.
6018  * @param[in] item
6019  *   Flow pattern to translate.
6020  */
6021 static void
6022 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6023                             void *matcher, void *key,
6024                             const struct rte_flow_item *item)
6025 {
6026         struct mlx5_priv *priv = dev->data->dev_private;
6027         const struct rte_flow_item_mark *mark;
6028         uint32_t value;
6029         uint32_t mask;
6030
6031         mark = item->mask ? (const void *)item->mask :
6032                             &rte_flow_item_mark_mask;
6033         mask = mark->id & priv->sh->dv_mark_mask;
6034         mark = (const void *)item->spec;
6035         assert(mark);
6036         value = mark->id & priv->sh->dv_mark_mask & mask;
6037         if (mask) {
6038                 enum modify_reg reg;
6039
6040                 /* Get the metadata register index for the mark. */
6041                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6042                 assert(reg > 0);
6043                 if (reg == REG_C_0) {
6044                         struct mlx5_priv *priv = dev->data->dev_private;
6045                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6046                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6047
6048                         mask &= msk_c0;
6049                         mask <<= shl_c0;
6050                         value <<= shl_c0;
6051                 }
6052                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6053         }
6054 }
6055
6056 /**
6057  * Add META item to matcher
6058  *
6059  * @param[in] dev
6060  *   The devich to configure through.
6061  * @param[in, out] matcher
6062  *   Flow matcher.
6063  * @param[in, out] key
6064  *   Flow matcher value.
6065  * @param[in] attr
6066  *   Attributes of flow that includes this item.
6067  * @param[in] item
6068  *   Flow pattern to translate.
6069  */
6070 static void
6071 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6072                             void *matcher, void *key,
6073                             const struct rte_flow_attr *attr,
6074                             const struct rte_flow_item *item)
6075 {
6076         const struct rte_flow_item_meta *meta_m;
6077         const struct rte_flow_item_meta *meta_v;
6078
6079         meta_m = (const void *)item->mask;
6080         if (!meta_m)
6081                 meta_m = &rte_flow_item_meta_mask;
6082         meta_v = (const void *)item->spec;
6083         if (meta_v) {
6084                 int reg;
6085                 uint32_t value = meta_v->data;
6086                 uint32_t mask = meta_m->data;
6087
6088                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6089                 if (reg < 0)
6090                         return;
6091                 /*
6092                  * In datapath code there is no endianness
6093                  * coversions for perfromance reasons, all
6094                  * pattern conversions are done in rte_flow.
6095                  */
6096                 value = rte_cpu_to_be_32(value);
6097                 mask = rte_cpu_to_be_32(mask);
6098                 if (reg == REG_C_0) {
6099                         struct mlx5_priv *priv = dev->data->dev_private;
6100                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6101                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6102 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6103                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6104
6105                         value >>= shr_c0;
6106                         mask >>= shr_c0;
6107 #endif
6108                         value <<= shl_c0;
6109                         mask <<= shl_c0;
6110                         assert(msk_c0);
6111                         assert(!(~msk_c0 & mask));
6112                 }
6113                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6114         }
6115 }
6116
6117 /**
6118  * Add vport metadata Reg C0 item to matcher
6119  *
6120  * @param[in, out] matcher
6121  *   Flow matcher.
6122  * @param[in, out] key
6123  *   Flow matcher value.
6124  * @param[in] reg
6125  *   Flow pattern to translate.
6126  */
6127 static void
6128 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6129                                   uint32_t value, uint32_t mask)
6130 {
6131         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6132 }
6133
6134 /**
6135  * Add tag item to matcher
6136  *
6137  * @param[in] dev
6138  *   The devich to configure through.
6139  * @param[in, out] matcher
6140  *   Flow matcher.
6141  * @param[in, out] key
6142  *   Flow matcher value.
6143  * @param[in] item
6144  *   Flow pattern to translate.
6145  */
6146 static void
6147 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6148                                 void *matcher, void *key,
6149                                 const struct rte_flow_item *item)
6150 {
6151         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6152         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6153         uint32_t mask, value;
6154
6155         assert(tag_v);
6156         value = tag_v->data;
6157         mask = tag_m ? tag_m->data : UINT32_MAX;
6158         if (tag_v->id == REG_C_0) {
6159                 struct mlx5_priv *priv = dev->data->dev_private;
6160                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6161                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6162
6163                 mask &= msk_c0;
6164                 mask <<= shl_c0;
6165                 value <<= shl_c0;
6166         }
6167         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6168 }
6169
6170 /**
6171  * Add TAG item to matcher
6172  *
6173  * @param[in] dev
6174  *   The devich to configure through.
6175  * @param[in, out] matcher
6176  *   Flow matcher.
6177  * @param[in, out] key
6178  *   Flow matcher value.
6179  * @param[in] item
6180  *   Flow pattern to translate.
6181  */
6182 static void
6183 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6184                            void *matcher, void *key,
6185                            const struct rte_flow_item *item)
6186 {
6187         const struct rte_flow_item_tag *tag_v = item->spec;
6188         const struct rte_flow_item_tag *tag_m = item->mask;
6189         enum modify_reg reg;
6190
6191         assert(tag_v);
6192         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6193         /* Get the metadata register index for the tag. */
6194         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6195         assert(reg > 0);
6196         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6197 }
6198
6199 /**
6200  * Add source vport match to the specified matcher.
6201  *
6202  * @param[in, out] matcher
6203  *   Flow matcher.
6204  * @param[in, out] key
6205  *   Flow matcher value.
6206  * @param[in] port
6207  *   Source vport value to match
6208  * @param[in] mask
6209  *   Mask
6210  */
6211 static void
6212 flow_dv_translate_item_source_vport(void *matcher, void *key,
6213                                     int16_t port, uint16_t mask)
6214 {
6215         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6216         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6217
6218         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6219         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6220 }
6221
6222 /**
6223  * Translate port-id item to eswitch match on  port-id.
6224  *
6225  * @param[in] dev
6226  *   The devich to configure through.
6227  * @param[in, out] matcher
6228  *   Flow matcher.
6229  * @param[in, out] key
6230  *   Flow matcher value.
6231  * @param[in] item
6232  *   Flow pattern to translate.
6233  *
6234  * @return
6235  *   0 on success, a negative errno value otherwise.
6236  */
6237 static int
6238 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6239                                void *key, const struct rte_flow_item *item)
6240 {
6241         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6242         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6243         struct mlx5_priv *priv;
6244         uint16_t mask, id;
6245
6246         mask = pid_m ? pid_m->id : 0xffff;
6247         id = pid_v ? pid_v->id : dev->data->port_id;
6248         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6249         if (!priv)
6250                 return -rte_errno;
6251         /* Translate to vport field or to metadata, depending on mode. */
6252         if (priv->vport_meta_mask)
6253                 flow_dv_translate_item_meta_vport(matcher, key,
6254                                                   priv->vport_meta_tag,
6255                                                   priv->vport_meta_mask);
6256         else
6257                 flow_dv_translate_item_source_vport(matcher, key,
6258                                                     priv->vport_id, mask);
6259         return 0;
6260 }
6261
6262 /**
6263  * Add ICMP6 item to matcher and to the value.
6264  *
6265  * @param[in, out] matcher
6266  *   Flow matcher.
6267  * @param[in, out] key
6268  *   Flow matcher value.
6269  * @param[in] item
6270  *   Flow pattern to translate.
6271  * @param[in] inner
6272  *   Item is inner pattern.
6273  */
6274 static void
6275 flow_dv_translate_item_icmp6(void *matcher, void *key,
6276                               const struct rte_flow_item *item,
6277                               int inner)
6278 {
6279         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6280         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6281         void *headers_m;
6282         void *headers_v;
6283         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6284                                      misc_parameters_3);
6285         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6286         if (inner) {
6287                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6288                                          inner_headers);
6289                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6290         } else {
6291                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6292                                          outer_headers);
6293                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6294         }
6295         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6296         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6297         if (!icmp6_v)
6298                 return;
6299         if (!icmp6_m)
6300                 icmp6_m = &rte_flow_item_icmp6_mask;
6301         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6302         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6303                  icmp6_v->type & icmp6_m->type);
6304         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6305         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6306                  icmp6_v->code & icmp6_m->code);
6307 }
6308
6309 /**
6310  * Add ICMP item to matcher and to the value.
6311  *
6312  * @param[in, out] matcher
6313  *   Flow matcher.
6314  * @param[in, out] key
6315  *   Flow matcher value.
6316  * @param[in] item
6317  *   Flow pattern to translate.
6318  * @param[in] inner
6319  *   Item is inner pattern.
6320  */
6321 static void
6322 flow_dv_translate_item_icmp(void *matcher, void *key,
6323                             const struct rte_flow_item *item,
6324                             int inner)
6325 {
6326         const struct rte_flow_item_icmp *icmp_m = item->mask;
6327         const struct rte_flow_item_icmp *icmp_v = item->spec;
6328         void *headers_m;
6329         void *headers_v;
6330         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6331                                      misc_parameters_3);
6332         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6333         if (inner) {
6334                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6335                                          inner_headers);
6336                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6337         } else {
6338                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6339                                          outer_headers);
6340                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6341         }
6342         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6343         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6344         if (!icmp_v)
6345                 return;
6346         if (!icmp_m)
6347                 icmp_m = &rte_flow_item_icmp_mask;
6348         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6349                  icmp_m->hdr.icmp_type);
6350         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6351                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6352         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6353                  icmp_m->hdr.icmp_code);
6354         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6355                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6356 }
6357
6358 /**
6359  * Add GTP item to matcher and to the value.
6360  *
6361  * @param[in, out] matcher
6362  *   Flow matcher.
6363  * @param[in, out] key
6364  *   Flow matcher value.
6365  * @param[in] item
6366  *   Flow pattern to translate.
6367  * @param[in] inner
6368  *   Item is inner pattern.
6369  */
6370 static void
6371 flow_dv_translate_item_gtp(void *matcher, void *key,
6372                            const struct rte_flow_item *item, int inner)
6373 {
6374         const struct rte_flow_item_gtp *gtp_m = item->mask;
6375         const struct rte_flow_item_gtp *gtp_v = item->spec;
6376         void *headers_m;
6377         void *headers_v;
6378         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6379                                      misc_parameters_3);
6380         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6381         uint16_t dport = RTE_GTPU_UDP_PORT;
6382
6383         if (inner) {
6384                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6385                                          inner_headers);
6386                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6387         } else {
6388                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6389                                          outer_headers);
6390                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6391         }
6392         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6393                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6394                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6395         }
6396         if (!gtp_v)
6397                 return;
6398         if (!gtp_m)
6399                 gtp_m = &rte_flow_item_gtp_mask;
6400         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6401         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6402                  gtp_v->msg_type & gtp_m->msg_type);
6403         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6404                  rte_be_to_cpu_32(gtp_m->teid));
6405         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6406                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6407 }
6408
6409 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6410
6411 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6412         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6413                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6414
6415 /**
6416  * Calculate flow matcher enable bitmap.
6417  *
6418  * @param match_criteria
6419  *   Pointer to flow matcher criteria.
6420  *
6421  * @return
6422  *   Bitmap of enabled fields.
6423  */
6424 static uint8_t
6425 flow_dv_matcher_enable(uint32_t *match_criteria)
6426 {
6427         uint8_t match_criteria_enable;
6428
6429         match_criteria_enable =
6430                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6431                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6432         match_criteria_enable |=
6433                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6434                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6435         match_criteria_enable |=
6436                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6437                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6438         match_criteria_enable |=
6439                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6440                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6441         match_criteria_enable |=
6442                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6443                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6444         return match_criteria_enable;
6445 }
6446
6447
6448 /**
6449  * Get a flow table.
6450  *
6451  * @param[in, out] dev
6452  *   Pointer to rte_eth_dev structure.
6453  * @param[in] table_id
6454  *   Table id to use.
6455  * @param[in] egress
6456  *   Direction of the table.
6457  * @param[in] transfer
6458  *   E-Switch or NIC flow.
6459  * @param[out] error
6460  *   pointer to error structure.
6461  *
6462  * @return
6463  *   Returns tables resource based on the index, NULL in case of failed.
6464  */
6465 static struct mlx5_flow_tbl_resource *
6466 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6467                          uint32_t table_id, uint8_t egress,
6468                          uint8_t transfer,
6469                          struct rte_flow_error *error)
6470 {
6471         struct mlx5_priv *priv = dev->data->dev_private;
6472         struct mlx5_ibv_shared *sh = priv->sh;
6473         struct mlx5_flow_tbl_resource *tbl;
6474         union mlx5_flow_tbl_key table_key = {
6475                 {
6476                         .table_id = table_id,
6477                         .reserved = 0,
6478                         .domain = !!transfer,
6479                         .direction = !!egress,
6480                 }
6481         };
6482         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6483                                                          table_key.v64);
6484         struct mlx5_flow_tbl_data_entry *tbl_data;
6485         int ret;
6486         void *domain;
6487
6488         if (pos) {
6489                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6490                                         entry);
6491                 tbl = &tbl_data->tbl;
6492                 rte_atomic32_inc(&tbl->refcnt);
6493                 return tbl;
6494         }
6495         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6496         if (!tbl_data) {
6497                 rte_flow_error_set(error, ENOMEM,
6498                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6499                                    NULL,
6500                                    "cannot allocate flow table data entry");
6501                 return NULL;
6502         }
6503         tbl = &tbl_data->tbl;
6504         pos = &tbl_data->entry;
6505         if (transfer)
6506                 domain = sh->fdb_domain;
6507         else if (egress)
6508                 domain = sh->tx_domain;
6509         else
6510                 domain = sh->rx_domain;
6511         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6512         if (!tbl->obj) {
6513                 rte_flow_error_set(error, ENOMEM,
6514                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6515                                    NULL, "cannot create flow table object");
6516                 rte_free(tbl_data);
6517                 return NULL;
6518         }
6519         /*
6520          * No multi-threads now, but still better to initialize the reference
6521          * count before insert it into the hash list.
6522          */
6523         rte_atomic32_init(&tbl->refcnt);
6524         /* Jump action reference count is initialized here. */
6525         rte_atomic32_init(&tbl_data->jump.refcnt);
6526         pos->key = table_key.v64;
6527         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6528         if (ret < 0) {
6529                 rte_flow_error_set(error, -ret,
6530                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6531                                    "cannot insert flow table data entry");
6532                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6533                 rte_free(tbl_data);
6534         }
6535         rte_atomic32_inc(&tbl->refcnt);
6536         return tbl;
6537 }
6538
6539 /**
6540  * Release a flow table.
6541  *
6542  * @param[in] dev
6543  *   Pointer to rte_eth_dev structure.
6544  * @param[in] tbl
6545  *   Table resource to be released.
6546  *
6547  * @return
6548  *   Returns 0 if table was released, else return 1;
6549  */
6550 static int
6551 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6552                              struct mlx5_flow_tbl_resource *tbl)
6553 {
6554         struct mlx5_priv *priv = dev->data->dev_private;
6555         struct mlx5_ibv_shared *sh = priv->sh;
6556         struct mlx5_flow_tbl_data_entry *tbl_data =
6557                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6558
6559         if (!tbl)
6560                 return 0;
6561         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6562                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6563
6564                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6565                 tbl->obj = NULL;
6566                 /* remove the entry from the hash list and free memory. */
6567                 mlx5_hlist_remove(sh->flow_tbls, pos);
6568                 rte_free(tbl_data);
6569                 return 0;
6570         }
6571         return 1;
6572 }
6573
6574 /**
6575  * Register the flow matcher.
6576  *
6577  * @param[in, out] dev
6578  *   Pointer to rte_eth_dev structure.
6579  * @param[in, out] matcher
6580  *   Pointer to flow matcher.
6581  * @param[in, out] key
6582  *   Pointer to flow table key.
6583  * @parm[in, out] dev_flow
6584  *   Pointer to the dev_flow.
6585  * @param[out] error
6586  *   pointer to error structure.
6587  *
6588  * @return
6589  *   0 on success otherwise -errno and errno is set.
6590  */
6591 static int
6592 flow_dv_matcher_register(struct rte_eth_dev *dev,
6593                          struct mlx5_flow_dv_matcher *matcher,
6594                          union mlx5_flow_tbl_key *key,
6595                          struct mlx5_flow *dev_flow,
6596                          struct rte_flow_error *error)
6597 {
6598         struct mlx5_priv *priv = dev->data->dev_private;
6599         struct mlx5_ibv_shared *sh = priv->sh;
6600         struct mlx5_flow_dv_matcher *cache_matcher;
6601         struct mlx5dv_flow_matcher_attr dv_attr = {
6602                 .type = IBV_FLOW_ATTR_NORMAL,
6603                 .match_mask = (void *)&matcher->mask,
6604         };
6605         struct mlx5_flow_tbl_resource *tbl;
6606         struct mlx5_flow_tbl_data_entry *tbl_data;
6607
6608         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6609                                        key->domain, error);
6610         if (!tbl)
6611                 return -rte_errno;      /* No need to refill the error info */
6612         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6613         /* Lookup from cache. */
6614         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6615                 if (matcher->crc == cache_matcher->crc &&
6616                     matcher->priority == cache_matcher->priority &&
6617                     !memcmp((const void *)matcher->mask.buf,
6618                             (const void *)cache_matcher->mask.buf,
6619                             cache_matcher->mask.size)) {
6620                         DRV_LOG(DEBUG,
6621                                 "%s group %u priority %hd use %s "
6622                                 "matcher %p: refcnt %d++",
6623                                 key->domain ? "FDB" : "NIC", key->table_id,
6624                                 cache_matcher->priority,
6625                                 key->direction ? "tx" : "rx",
6626                                 (void *)cache_matcher,
6627                                 rte_atomic32_read(&cache_matcher->refcnt));
6628                         rte_atomic32_inc(&cache_matcher->refcnt);
6629                         dev_flow->dv.matcher = cache_matcher;
6630                         /* old matcher should not make the table ref++. */
6631                         flow_dv_tbl_resource_release(dev, tbl);
6632                         return 0;
6633                 }
6634         }
6635         /* Register new matcher. */
6636         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6637         if (!cache_matcher) {
6638                 flow_dv_tbl_resource_release(dev, tbl);
6639                 return rte_flow_error_set(error, ENOMEM,
6640                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6641                                           "cannot allocate matcher memory");
6642         }
6643         *cache_matcher = *matcher;
6644         dv_attr.match_criteria_enable =
6645                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6646         dv_attr.priority = matcher->priority;
6647         if (key->direction)
6648                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6649         cache_matcher->matcher_object =
6650                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6651         if (!cache_matcher->matcher_object) {
6652                 rte_free(cache_matcher);
6653 #ifdef HAVE_MLX5DV_DR
6654                 flow_dv_tbl_resource_release(dev, tbl);
6655 #endif
6656                 return rte_flow_error_set(error, ENOMEM,
6657                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6658                                           NULL, "cannot create matcher");
6659         }
6660         /* Save the table information */
6661         cache_matcher->tbl = tbl;
6662         rte_atomic32_init(&cache_matcher->refcnt);
6663         /* only matcher ref++, table ref++ already done above in get API. */
6664         rte_atomic32_inc(&cache_matcher->refcnt);
6665         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6666         dev_flow->dv.matcher = cache_matcher;
6667         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6668                 key->domain ? "FDB" : "NIC", key->table_id,
6669                 cache_matcher->priority,
6670                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6671                 rte_atomic32_read(&cache_matcher->refcnt));
6672         return 0;
6673 }
6674
6675 /**
6676  * Find existing tag resource or create and register a new one.
6677  *
6678  * @param dev[in, out]
6679  *   Pointer to rte_eth_dev structure.
6680  * @param[in, out] tag_be24
6681  *   Tag value in big endian then R-shift 8.
6682  * @parm[in, out] dev_flow
6683  *   Pointer to the dev_flow.
6684  * @param[out] error
6685  *   pointer to error structure.
6686  *
6687  * @return
6688  *   0 on success otherwise -errno and errno is set.
6689  */
6690 static int
6691 flow_dv_tag_resource_register
6692                         (struct rte_eth_dev *dev,
6693                          uint32_t tag_be24,
6694                          struct mlx5_flow *dev_flow,
6695                          struct rte_flow_error *error)
6696 {
6697         struct mlx5_priv *priv = dev->data->dev_private;
6698         struct mlx5_ibv_shared *sh = priv->sh;
6699         struct mlx5_flow_dv_tag_resource *cache_resource;
6700         struct mlx5_hlist_entry *entry;
6701
6702         /* Lookup a matching resource from cache. */
6703         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6704         if (entry) {
6705                 cache_resource = container_of
6706                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6707                 rte_atomic32_inc(&cache_resource->refcnt);
6708                 dev_flow->dv.tag_resource = cache_resource;
6709                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6710                         (void *)cache_resource,
6711                         rte_atomic32_read(&cache_resource->refcnt));
6712                 return 0;
6713         }
6714         /* Register new resource. */
6715         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6716         if (!cache_resource)
6717                 return rte_flow_error_set(error, ENOMEM,
6718                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6719                                           "cannot allocate resource memory");
6720         cache_resource->entry.key = (uint64_t)tag_be24;
6721         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6722         if (!cache_resource->action) {
6723                 rte_free(cache_resource);
6724                 return rte_flow_error_set(error, ENOMEM,
6725                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6726                                           NULL, "cannot create action");
6727         }
6728         rte_atomic32_init(&cache_resource->refcnt);
6729         rte_atomic32_inc(&cache_resource->refcnt);
6730         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6731                 mlx5_glue->destroy_flow_action(cache_resource->action);
6732                 rte_free(cache_resource);
6733                 return rte_flow_error_set(error, EEXIST,
6734                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6735                                           NULL, "cannot insert tag");
6736         }
6737         dev_flow->dv.tag_resource = cache_resource;
6738         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6739                 (void *)cache_resource,
6740                 rte_atomic32_read(&cache_resource->refcnt));
6741         return 0;
6742 }
6743
6744 /**
6745  * Release the tag.
6746  *
6747  * @param dev
6748  *   Pointer to Ethernet device.
6749  * @param flow
6750  *   Pointer to mlx5_flow.
6751  *
6752  * @return
6753  *   1 while a reference on it exists, 0 when freed.
6754  */
6755 static int
6756 flow_dv_tag_release(struct rte_eth_dev *dev,
6757                     struct mlx5_flow_dv_tag_resource *tag)
6758 {
6759         struct mlx5_priv *priv = dev->data->dev_private;
6760         struct mlx5_ibv_shared *sh = priv->sh;
6761
6762         assert(tag);
6763         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6764                 dev->data->port_id, (void *)tag,
6765                 rte_atomic32_read(&tag->refcnt));
6766         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6767                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6768                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6769                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6770                         dev->data->port_id, (void *)tag);
6771                 rte_free(tag);
6772                 return 0;
6773         }
6774         return 1;
6775 }
6776
6777 /**
6778  * Translate port ID action to vport.
6779  *
6780  * @param[in] dev
6781  *   Pointer to rte_eth_dev structure.
6782  * @param[in] action
6783  *   Pointer to the port ID action.
6784  * @param[out] dst_port_id
6785  *   The target port ID.
6786  * @param[out] error
6787  *   Pointer to the error structure.
6788  *
6789  * @return
6790  *   0 on success, a negative errno value otherwise and rte_errno is set.
6791  */
6792 static int
6793 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6794                                  const struct rte_flow_action *action,
6795                                  uint32_t *dst_port_id,
6796                                  struct rte_flow_error *error)
6797 {
6798         uint32_t port;
6799         struct mlx5_priv *priv;
6800         const struct rte_flow_action_port_id *conf =
6801                         (const struct rte_flow_action_port_id *)action->conf;
6802
6803         port = conf->original ? dev->data->port_id : conf->id;
6804         priv = mlx5_port_to_eswitch_info(port, false);
6805         if (!priv)
6806                 return rte_flow_error_set(error, -rte_errno,
6807                                           RTE_FLOW_ERROR_TYPE_ACTION,
6808                                           NULL,
6809                                           "No eswitch info was found for port");
6810 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6811         /*
6812          * This parameter is transferred to
6813          * mlx5dv_dr_action_create_dest_ib_port().
6814          */
6815         *dst_port_id = priv->ibv_port;
6816 #else
6817         /*
6818          * Legacy mode, no LAG configurations is supported.
6819          * This parameter is transferred to
6820          * mlx5dv_dr_action_create_dest_vport().
6821          */
6822         *dst_port_id = priv->vport_id;
6823 #endif
6824         return 0;
6825 }
6826
6827 /**
6828  * Add Tx queue matcher
6829  *
6830  * @param[in] dev
6831  *   Pointer to the dev struct.
6832  * @param[in, out] matcher
6833  *   Flow matcher.
6834  * @param[in, out] key
6835  *   Flow matcher value.
6836  * @param[in] item
6837  *   Flow pattern to translate.
6838  * @param[in] inner
6839  *   Item is inner pattern.
6840  */
6841 static void
6842 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6843                                 void *matcher, void *key,
6844                                 const struct rte_flow_item *item)
6845 {
6846         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6847         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6848         void *misc_m =
6849                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6850         void *misc_v =
6851                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6852         struct mlx5_txq_ctrl *txq;
6853         uint32_t queue;
6854
6855
6856         queue_m = (const void *)item->mask;
6857         if (!queue_m)
6858                 return;
6859         queue_v = (const void *)item->spec;
6860         if (!queue_v)
6861                 return;
6862         txq = mlx5_txq_get(dev, queue_v->queue);
6863         if (!txq)
6864                 return;
6865         queue = txq->obj->sq->id;
6866         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6867         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6868                  queue & queue_m->queue);
6869         mlx5_txq_release(dev, queue_v->queue);
6870 }
6871
6872 /**
6873  * Set the hash fields according to the @p flow information.
6874  *
6875  * @param[in] dev_flow
6876  *   Pointer to the mlx5_flow.
6877  */
6878 static void
6879 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6880 {
6881         struct rte_flow *flow = dev_flow->flow;
6882         uint64_t items = dev_flow->layers;
6883         int rss_inner = 0;
6884         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6885
6886         dev_flow->hash_fields = 0;
6887 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6888         if (flow->rss.level >= 2) {
6889                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6890                 rss_inner = 1;
6891         }
6892 #endif
6893         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6894             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6895                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6896                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6897                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6898                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6899                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6900                         else
6901                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6902                 }
6903         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6904                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6905                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6906                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6907                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
6908                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6909                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
6910                         else
6911                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
6912                 }
6913         }
6914         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
6915             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
6916                 if (rss_types & ETH_RSS_UDP) {
6917                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6918                                 dev_flow->hash_fields |=
6919                                                 IBV_RX_HASH_SRC_PORT_UDP;
6920                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6921                                 dev_flow->hash_fields |=
6922                                                 IBV_RX_HASH_DST_PORT_UDP;
6923                         else
6924                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
6925                 }
6926         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
6927                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
6928                 if (rss_types & ETH_RSS_TCP) {
6929                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6930                                 dev_flow->hash_fields |=
6931                                                 IBV_RX_HASH_SRC_PORT_TCP;
6932                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6933                                 dev_flow->hash_fields |=
6934                                                 IBV_RX_HASH_DST_PORT_TCP;
6935                         else
6936                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
6937                 }
6938         }
6939 }
6940
6941 /**
6942  * Fill the flow with DV spec, lock free
6943  * (mutex should be acquired by caller).
6944  *
6945  * @param[in] dev
6946  *   Pointer to rte_eth_dev structure.
6947  * @param[in, out] dev_flow
6948  *   Pointer to the sub flow.
6949  * @param[in] attr
6950  *   Pointer to the flow attributes.
6951  * @param[in] items
6952  *   Pointer to the list of items.
6953  * @param[in] actions
6954  *   Pointer to the list of actions.
6955  * @param[out] error
6956  *   Pointer to the error structure.
6957  *
6958  * @return
6959  *   0 on success, a negative errno value otherwise and rte_errno is set.
6960  */
6961 static int
6962 __flow_dv_translate(struct rte_eth_dev *dev,
6963                     struct mlx5_flow *dev_flow,
6964                     const struct rte_flow_attr *attr,
6965                     const struct rte_flow_item items[],
6966                     const struct rte_flow_action actions[],
6967                     struct rte_flow_error *error)
6968 {
6969         struct mlx5_priv *priv = dev->data->dev_private;
6970         struct mlx5_dev_config *dev_conf = &priv->config;
6971         struct rte_flow *flow = dev_flow->flow;
6972         uint64_t item_flags = 0;
6973         uint64_t last_item = 0;
6974         uint64_t action_flags = 0;
6975         uint64_t priority = attr->priority;
6976         struct mlx5_flow_dv_matcher matcher = {
6977                 .mask = {
6978                         .size = sizeof(matcher.mask.buf),
6979                 },
6980         };
6981         int actions_n = 0;
6982         bool actions_end = false;
6983         union {
6984                 struct mlx5_flow_dv_modify_hdr_resource res;
6985                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
6986                             sizeof(struct mlx5_modification_cmd) *
6987                             (MLX5_MAX_MODIFY_NUM + 1)];
6988         } mhdr_dummy;
6989         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
6990         union flow_dv_attr flow_attr = { .attr = 0 };
6991         uint32_t tag_be;
6992         union mlx5_flow_tbl_key tbl_key;
6993         uint32_t modify_action_position = UINT32_MAX;
6994         void *match_mask = matcher.mask.buf;
6995         void *match_value = dev_flow->dv.value.buf;
6996         uint8_t next_protocol = 0xff;
6997         struct rte_vlan_hdr vlan = { 0 };
6998         uint32_t table;
6999         int ret = 0;
7000
7001         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7002                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7003         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7004                                        &table, error);
7005         if (ret)
7006                 return ret;
7007         dev_flow->group = table;
7008         if (attr->transfer)
7009                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7010         if (priority == MLX5_FLOW_PRIO_RSVD)
7011                 priority = dev_conf->flow_prio - 1;
7012         /* number of actions must be set to 0 in case of dirty stack. */
7013         mhdr_res->actions_num = 0;
7014         for (; !actions_end ; actions++) {
7015                 const struct rte_flow_action_queue *queue;
7016                 const struct rte_flow_action_rss *rss;
7017                 const struct rte_flow_action *action = actions;
7018                 const struct rte_flow_action_count *count = action->conf;
7019                 const uint8_t *rss_key;
7020                 const struct rte_flow_action_jump *jump_data;
7021                 const struct rte_flow_action_meter *mtr;
7022                 struct mlx5_flow_tbl_resource *tbl;
7023                 uint32_t port_id = 0;
7024                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7025                 int action_type = actions->type;
7026                 const struct rte_flow_action *found_action = NULL;
7027
7028                 switch (action_type) {
7029                 case RTE_FLOW_ACTION_TYPE_VOID:
7030                         break;
7031                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7032                         if (flow_dv_translate_action_port_id(dev, action,
7033                                                              &port_id, error))
7034                                 return -rte_errno;
7035                         port_id_resource.port_id = port_id;
7036                         if (flow_dv_port_id_action_resource_register
7037                             (dev, &port_id_resource, dev_flow, error))
7038                                 return -rte_errno;
7039                         dev_flow->dv.actions[actions_n++] =
7040                                 dev_flow->dv.port_id_action->action;
7041                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7042                         break;
7043                 case RTE_FLOW_ACTION_TYPE_FLAG:
7044                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7045                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7046                                 struct rte_flow_action_mark mark = {
7047                                         .id = MLX5_FLOW_MARK_DEFAULT,
7048                                 };
7049
7050                                 if (flow_dv_convert_action_mark(dev, &mark,
7051                                                                 mhdr_res,
7052                                                                 error))
7053                                         return -rte_errno;
7054                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7055                                 break;
7056                         }
7057                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7058                         if (!dev_flow->dv.tag_resource)
7059                                 if (flow_dv_tag_resource_register
7060                                     (dev, tag_be, dev_flow, error))
7061                                         return -rte_errno;
7062                         dev_flow->dv.actions[actions_n++] =
7063                                 dev_flow->dv.tag_resource->action;
7064                         break;
7065                 case RTE_FLOW_ACTION_TYPE_MARK:
7066                         action_flags |= MLX5_FLOW_ACTION_MARK;
7067                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7068                                 const struct rte_flow_action_mark *mark =
7069                                         (const struct rte_flow_action_mark *)
7070                                                 actions->conf;
7071
7072                                 if (flow_dv_convert_action_mark(dev, mark,
7073                                                                 mhdr_res,
7074                                                                 error))
7075                                         return -rte_errno;
7076                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7077                                 break;
7078                         }
7079                         /* Fall-through */
7080                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7081                         /* Legacy (non-extensive) MARK action. */
7082                         tag_be = mlx5_flow_mark_set
7083                               (((const struct rte_flow_action_mark *)
7084                                (actions->conf))->id);
7085                         if (!dev_flow->dv.tag_resource)
7086                                 if (flow_dv_tag_resource_register
7087                                     (dev, tag_be, dev_flow, error))
7088                                         return -rte_errno;
7089                         dev_flow->dv.actions[actions_n++] =
7090                                 dev_flow->dv.tag_resource->action;
7091                         break;
7092                 case RTE_FLOW_ACTION_TYPE_SET_META:
7093                         if (flow_dv_convert_action_set_meta
7094                                 (dev, mhdr_res, attr,
7095                                  (const struct rte_flow_action_set_meta *)
7096                                   actions->conf, error))
7097                                 return -rte_errno;
7098                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7099                         break;
7100                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7101                         if (flow_dv_convert_action_set_tag
7102                                 (dev, mhdr_res,
7103                                  (const struct rte_flow_action_set_tag *)
7104                                   actions->conf, error))
7105                                 return -rte_errno;
7106                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7107                         break;
7108                 case RTE_FLOW_ACTION_TYPE_DROP:
7109                         action_flags |= MLX5_FLOW_ACTION_DROP;
7110                         break;
7111                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7112                         assert(flow->rss.queue);
7113                         queue = actions->conf;
7114                         flow->rss.queue_num = 1;
7115                         (*flow->rss.queue)[0] = queue->index;
7116                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7117                         break;
7118                 case RTE_FLOW_ACTION_TYPE_RSS:
7119                         assert(flow->rss.queue);
7120                         rss = actions->conf;
7121                         if (flow->rss.queue)
7122                                 memcpy((*flow->rss.queue), rss->queue,
7123                                        rss->queue_num * sizeof(uint16_t));
7124                         flow->rss.queue_num = rss->queue_num;
7125                         /* NULL RSS key indicates default RSS key. */
7126                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7127                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7128                         /*
7129                          * rss->level and rss.types should be set in advance
7130                          * when expanding items for RSS.
7131                          */
7132                         action_flags |= MLX5_FLOW_ACTION_RSS;
7133                         break;
7134                 case RTE_FLOW_ACTION_TYPE_COUNT:
7135                         if (!dev_conf->devx) {
7136                                 rte_errno = ENOTSUP;
7137                                 goto cnt_err;
7138                         }
7139                         flow->counter = flow_dv_counter_alloc(dev,
7140                                                               count->shared,
7141                                                               count->id,
7142                                                               dev_flow->group);
7143                         if (flow->counter == NULL)
7144                                 goto cnt_err;
7145                         dev_flow->dv.actions[actions_n++] =
7146                                 flow->counter->action;
7147                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7148                         break;
7149 cnt_err:
7150                         if (rte_errno == ENOTSUP)
7151                                 return rte_flow_error_set
7152                                               (error, ENOTSUP,
7153                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7154                                                NULL,
7155                                                "count action not supported");
7156                         else
7157                                 return rte_flow_error_set
7158                                                 (error, rte_errno,
7159                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7160                                                  action,
7161                                                  "cannot create counter"
7162                                                   " object.");
7163                         break;
7164                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7165                         dev_flow->dv.actions[actions_n++] =
7166                                                 priv->sh->pop_vlan_action;
7167                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7168                         break;
7169                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7170                         flow_dev_get_vlan_info_from_items(items, &vlan);
7171                         vlan.eth_proto = rte_be_to_cpu_16
7172                              ((((const struct rte_flow_action_of_push_vlan *)
7173                                                    actions->conf)->ethertype));
7174                         found_action = mlx5_flow_find_action
7175                                         (actions + 1,
7176                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7177                         if (found_action)
7178                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7179                         found_action = mlx5_flow_find_action
7180                                         (actions + 1,
7181                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7182                         if (found_action)
7183                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7184                         if (flow_dv_create_action_push_vlan
7185                                             (dev, attr, &vlan, dev_flow, error))
7186                                 return -rte_errno;
7187                         dev_flow->dv.actions[actions_n++] =
7188                                            dev_flow->dv.push_vlan_res->action;
7189                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7190                         break;
7191                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7192                         /* of_vlan_push action handled this action */
7193                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7194                         break;
7195                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7196                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7197                                 break;
7198                         flow_dev_get_vlan_info_from_items(items, &vlan);
7199                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7200                         /* If no VLAN push - this is a modify header action */
7201                         if (flow_dv_convert_action_modify_vlan_vid
7202                                                 (mhdr_res, actions, error))
7203                                 return -rte_errno;
7204                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7205                         break;
7206                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7207                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7208                         if (flow_dv_create_action_l2_encap(dev, actions,
7209                                                            dev_flow,
7210                                                            attr->transfer,
7211                                                            error))
7212                                 return -rte_errno;
7213                         dev_flow->dv.actions[actions_n++] =
7214                                 dev_flow->dv.encap_decap->verbs_action;
7215                         action_flags |= actions->type ==
7216                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
7217                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
7218                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
7219                         break;
7220                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7221                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7222                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7223                                                            attr->transfer,
7224                                                            error))
7225                                 return -rte_errno;
7226                         dev_flow->dv.actions[actions_n++] =
7227                                 dev_flow->dv.encap_decap->verbs_action;
7228                         action_flags |= actions->type ==
7229                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
7230                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
7231                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
7232                         break;
7233                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7234                         /* Handle encap with preceding decap. */
7235                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
7236                                 if (flow_dv_create_action_raw_encap
7237                                         (dev, actions, dev_flow, attr, error))
7238                                         return -rte_errno;
7239                                 dev_flow->dv.actions[actions_n++] =
7240                                         dev_flow->dv.encap_decap->verbs_action;
7241                         } else {
7242                                 /* Handle encap without preceding decap. */
7243                                 if (flow_dv_create_action_l2_encap
7244                                     (dev, actions, dev_flow, attr->transfer,
7245                                      error))
7246                                         return -rte_errno;
7247                                 dev_flow->dv.actions[actions_n++] =
7248                                         dev_flow->dv.encap_decap->verbs_action;
7249                         }
7250                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
7251                         break;
7252                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7253                         /* Check if this decap is followed by encap. */
7254                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
7255                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
7256                                action++) {
7257                         }
7258                         /* Handle decap only if it isn't followed by encap. */
7259                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7260                                 if (flow_dv_create_action_l2_decap
7261                                     (dev, dev_flow, attr->transfer, error))
7262                                         return -rte_errno;
7263                                 dev_flow->dv.actions[actions_n++] =
7264                                         dev_flow->dv.encap_decap->verbs_action;
7265                         }
7266                         /* If decap is followed by encap, handle it at encap. */
7267                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
7268                         break;
7269                 case RTE_FLOW_ACTION_TYPE_JUMP:
7270                         jump_data = action->conf;
7271                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7272                                                        jump_data->group, &table,
7273                                                        error);
7274                         if (ret)
7275                                 return ret;
7276                         tbl = flow_dv_tbl_resource_get(dev, table,
7277                                                        attr->egress,
7278                                                        attr->transfer, error);
7279                         if (!tbl)
7280                                 return rte_flow_error_set
7281                                                 (error, errno,
7282                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7283                                                  NULL,
7284                                                  "cannot create jump action.");
7285                         if (flow_dv_jump_tbl_resource_register
7286                             (dev, tbl, dev_flow, error)) {
7287                                 flow_dv_tbl_resource_release(dev, tbl);
7288                                 return rte_flow_error_set
7289                                                 (error, errno,
7290                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7291                                                  NULL,
7292                                                  "cannot create jump action.");
7293                         }
7294                         dev_flow->dv.actions[actions_n++] =
7295                                 dev_flow->dv.jump->action;
7296                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7297                         break;
7298                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7299                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7300                         if (flow_dv_convert_action_modify_mac
7301                                         (mhdr_res, actions, error))
7302                                 return -rte_errno;
7303                         action_flags |= actions->type ==
7304                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7305                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7306                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7307                         break;
7308                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7309                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7310                         if (flow_dv_convert_action_modify_ipv4
7311                                         (mhdr_res, actions, error))
7312                                 return -rte_errno;
7313                         action_flags |= actions->type ==
7314                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7315                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7316                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7317                         break;
7318                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7319                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7320                         if (flow_dv_convert_action_modify_ipv6
7321                                         (mhdr_res, actions, error))
7322                                 return -rte_errno;
7323                         action_flags |= actions->type ==
7324                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7325                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7326                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7327                         break;
7328                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7329                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7330                         if (flow_dv_convert_action_modify_tp
7331                                         (mhdr_res, actions, items,
7332                                          &flow_attr, error))
7333                                 return -rte_errno;
7334                         action_flags |= actions->type ==
7335                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7336                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7337                                         MLX5_FLOW_ACTION_SET_TP_DST;
7338                         break;
7339                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7340                         if (flow_dv_convert_action_modify_dec_ttl
7341                                         (mhdr_res, items, &flow_attr, error))
7342                                 return -rte_errno;
7343                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7344                         break;
7345                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7346                         if (flow_dv_convert_action_modify_ttl
7347                                         (mhdr_res, actions, items,
7348                                          &flow_attr, error))
7349                                 return -rte_errno;
7350                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7351                         break;
7352                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7353                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7354                         if (flow_dv_convert_action_modify_tcp_seq
7355                                         (mhdr_res, actions, error))
7356                                 return -rte_errno;
7357                         action_flags |= actions->type ==
7358                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7359                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7360                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7361                         break;
7362
7363                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7364                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7365                         if (flow_dv_convert_action_modify_tcp_ack
7366                                         (mhdr_res, actions, error))
7367                                 return -rte_errno;
7368                         action_flags |= actions->type ==
7369                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7370                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7371                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7372                         break;
7373                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7374                         if (flow_dv_convert_action_set_reg
7375                                         (mhdr_res, actions, error))
7376                                 return -rte_errno;
7377                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7378                         break;
7379                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7380                         if (flow_dv_convert_action_copy_mreg
7381                                         (dev, mhdr_res, actions, error))
7382                                 return -rte_errno;
7383                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7384                         break;
7385                 case RTE_FLOW_ACTION_TYPE_METER:
7386                         mtr = actions->conf;
7387                         if (!flow->meter) {
7388                                 flow->meter = mlx5_flow_meter_attach(priv,
7389                                                         mtr->mtr_id, attr,
7390                                                         error);
7391                                 if (!flow->meter)
7392                                         return rte_flow_error_set(error,
7393                                                 rte_errno,
7394                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7395                                                 NULL,
7396                                                 "meter not found "
7397                                                 "or invalid parameters");
7398                         }
7399                         /* Set the meter action. */
7400                         dev_flow->dv.actions[actions_n++] =
7401                                 flow->meter->mfts->meter_action;
7402                         action_flags |= MLX5_FLOW_ACTION_METER;
7403                         break;
7404                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7405                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7406                                                               actions, error))
7407                                 return -rte_errno;
7408                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7409                         break;
7410                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7411                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7412                                                               actions, error))
7413                                 return -rte_errno;
7414                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7415                         break;
7416                 case RTE_FLOW_ACTION_TYPE_END:
7417                         actions_end = true;
7418                         if (mhdr_res->actions_num) {
7419                                 /* create modify action if needed. */
7420                                 if (flow_dv_modify_hdr_resource_register
7421                                         (dev, mhdr_res, dev_flow, error))
7422                                         return -rte_errno;
7423                                 dev_flow->dv.actions[modify_action_position] =
7424                                         dev_flow->dv.modify_hdr->verbs_action;
7425                         }
7426                         break;
7427                 default:
7428                         break;
7429                 }
7430                 if (mhdr_res->actions_num &&
7431                     modify_action_position == UINT32_MAX)
7432                         modify_action_position = actions_n++;
7433         }
7434         dev_flow->dv.actions_n = actions_n;
7435         dev_flow->actions = action_flags;
7436         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7437                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7438                 int item_type = items->type;
7439
7440                 switch (item_type) {
7441                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7442                         flow_dv_translate_item_port_id(dev, match_mask,
7443                                                        match_value, items);
7444                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7445                         break;
7446                 case RTE_FLOW_ITEM_TYPE_ETH:
7447                         flow_dv_translate_item_eth(match_mask, match_value,
7448                                                    items, tunnel);
7449                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7450                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7451                                              MLX5_FLOW_LAYER_OUTER_L2;
7452                         break;
7453                 case RTE_FLOW_ITEM_TYPE_VLAN:
7454                         flow_dv_translate_item_vlan(dev_flow,
7455                                                     match_mask, match_value,
7456                                                     items, tunnel);
7457                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7458                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7459                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7460                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7461                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7462                         break;
7463                 case RTE_FLOW_ITEM_TYPE_IPV4:
7464                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7465                                                   &item_flags, &tunnel);
7466                         flow_dv_translate_item_ipv4(match_mask, match_value,
7467                                                     items, tunnel,
7468                                                     dev_flow->group);
7469                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7470                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7471                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7472                         if (items->mask != NULL &&
7473                             ((const struct rte_flow_item_ipv4 *)
7474                              items->mask)->hdr.next_proto_id) {
7475                                 next_protocol =
7476                                         ((const struct rte_flow_item_ipv4 *)
7477                                          (items->spec))->hdr.next_proto_id;
7478                                 next_protocol &=
7479                                         ((const struct rte_flow_item_ipv4 *)
7480                                          (items->mask))->hdr.next_proto_id;
7481                         } else {
7482                                 /* Reset for inner layer. */
7483                                 next_protocol = 0xff;
7484                         }
7485                         break;
7486                 case RTE_FLOW_ITEM_TYPE_IPV6:
7487                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7488                                                   &item_flags, &tunnel);
7489                         flow_dv_translate_item_ipv6(match_mask, match_value,
7490                                                     items, tunnel,
7491                                                     dev_flow->group);
7492                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7493                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7494                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7495                         if (items->mask != NULL &&
7496                             ((const struct rte_flow_item_ipv6 *)
7497                              items->mask)->hdr.proto) {
7498                                 next_protocol =
7499                                         ((const struct rte_flow_item_ipv6 *)
7500                                          items->spec)->hdr.proto;
7501                                 next_protocol &=
7502                                         ((const struct rte_flow_item_ipv6 *)
7503                                          items->mask)->hdr.proto;
7504                         } else {
7505                                 /* Reset for inner layer. */
7506                                 next_protocol = 0xff;
7507                         }
7508                         break;
7509                 case RTE_FLOW_ITEM_TYPE_TCP:
7510                         flow_dv_translate_item_tcp(match_mask, match_value,
7511                                                    items, tunnel);
7512                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7513                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7514                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7515                         break;
7516                 case RTE_FLOW_ITEM_TYPE_UDP:
7517                         flow_dv_translate_item_udp(match_mask, match_value,
7518                                                    items, tunnel);
7519                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7520                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7521                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7522                         break;
7523                 case RTE_FLOW_ITEM_TYPE_GRE:
7524                         flow_dv_translate_item_gre(match_mask, match_value,
7525                                                    items, tunnel);
7526                         last_item = MLX5_FLOW_LAYER_GRE;
7527                         break;
7528                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7529                         flow_dv_translate_item_gre_key(match_mask,
7530                                                        match_value, items);
7531                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7532                         break;
7533                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7534                         flow_dv_translate_item_nvgre(match_mask, match_value,
7535                                                      items, tunnel);
7536                         last_item = MLX5_FLOW_LAYER_GRE;
7537                         break;
7538                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7539                         flow_dv_translate_item_vxlan(match_mask, match_value,
7540                                                      items, tunnel);
7541                         last_item = MLX5_FLOW_LAYER_VXLAN;
7542                         break;
7543                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7544                         flow_dv_translate_item_vxlan(match_mask, match_value,
7545                                                      items, tunnel);
7546                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7547                         break;
7548                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7549                         flow_dv_translate_item_geneve(match_mask, match_value,
7550                                                       items, tunnel);
7551                         last_item = MLX5_FLOW_LAYER_GENEVE;
7552                         break;
7553                 case RTE_FLOW_ITEM_TYPE_MPLS:
7554                         flow_dv_translate_item_mpls(match_mask, match_value,
7555                                                     items, last_item, tunnel);
7556                         last_item = MLX5_FLOW_LAYER_MPLS;
7557                         break;
7558                 case RTE_FLOW_ITEM_TYPE_MARK:
7559                         flow_dv_translate_item_mark(dev, match_mask,
7560                                                     match_value, items);
7561                         last_item = MLX5_FLOW_ITEM_MARK;
7562                         break;
7563                 case RTE_FLOW_ITEM_TYPE_META:
7564                         flow_dv_translate_item_meta(dev, match_mask,
7565                                                     match_value, attr, items);
7566                         last_item = MLX5_FLOW_ITEM_METADATA;
7567                         break;
7568                 case RTE_FLOW_ITEM_TYPE_ICMP:
7569                         flow_dv_translate_item_icmp(match_mask, match_value,
7570                                                     items, tunnel);
7571                         last_item = MLX5_FLOW_LAYER_ICMP;
7572                         break;
7573                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7574                         flow_dv_translate_item_icmp6(match_mask, match_value,
7575                                                       items, tunnel);
7576                         last_item = MLX5_FLOW_LAYER_ICMP6;
7577                         break;
7578                 case RTE_FLOW_ITEM_TYPE_TAG:
7579                         flow_dv_translate_item_tag(dev, match_mask,
7580                                                    match_value, items);
7581                         last_item = MLX5_FLOW_ITEM_TAG;
7582                         break;
7583                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7584                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7585                                                         match_value, items);
7586                         last_item = MLX5_FLOW_ITEM_TAG;
7587                         break;
7588                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7589                         flow_dv_translate_item_tx_queue(dev, match_mask,
7590                                                         match_value,
7591                                                         items);
7592                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7593                         break;
7594                 case RTE_FLOW_ITEM_TYPE_GTP:
7595                         flow_dv_translate_item_gtp(match_mask, match_value,
7596                                                    items, tunnel);
7597                         last_item = MLX5_FLOW_LAYER_GTP;
7598                         break;
7599                 default:
7600                         break;
7601                 }
7602                 item_flags |= last_item;
7603         }
7604         /*
7605          * When E-Switch mode is enabled, we have two cases where we need to
7606          * set the source port manually.
7607          * The first one, is in case of Nic steering rule, and the second is
7608          * E-Switch rule where no port_id item was found. In both cases
7609          * the source port is set according the current port in use.
7610          */
7611         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
7612             (priv->representor || priv->master)) {
7613                 if (flow_dv_translate_item_port_id(dev, match_mask,
7614                                                    match_value, NULL))
7615                         return -rte_errno;
7616         }
7617         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7618                                          dev_flow->dv.value.buf));
7619         dev_flow->layers = item_flags;
7620         if (action_flags & MLX5_FLOW_ACTION_RSS)
7621                 flow_dv_hashfields_set(dev_flow);
7622         /* Register matcher. */
7623         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7624                                     matcher.mask.size);
7625         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7626                                                      matcher.priority);
7627         /* reserved field no needs to be set to 0 here. */
7628         tbl_key.domain = attr->transfer;
7629         tbl_key.direction = attr->egress;
7630         tbl_key.table_id = dev_flow->group;
7631         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7632                 return -rte_errno;
7633         return 0;
7634 }
7635
7636 /**
7637  * Apply the flow to the NIC, lock free,
7638  * (mutex should be acquired by caller).
7639  *
7640  * @param[in] dev
7641  *   Pointer to the Ethernet device structure.
7642  * @param[in, out] flow
7643  *   Pointer to flow structure.
7644  * @param[out] error
7645  *   Pointer to error structure.
7646  *
7647  * @return
7648  *   0 on success, a negative errno value otherwise and rte_errno is set.
7649  */
7650 static int
7651 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7652                 struct rte_flow_error *error)
7653 {
7654         struct mlx5_flow_dv *dv;
7655         struct mlx5_flow *dev_flow;
7656         struct mlx5_priv *priv = dev->data->dev_private;
7657         int n;
7658         int err;
7659
7660         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7661                 dv = &dev_flow->dv;
7662                 n = dv->actions_n;
7663                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7664                         if (dev_flow->transfer) {
7665                                 dv->actions[n++] = priv->sh->esw_drop_action;
7666                         } else {
7667                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7668                                 if (!dv->hrxq) {
7669                                         rte_flow_error_set
7670                                                 (error, errno,
7671                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7672                                                  NULL,
7673                                                  "cannot get drop hash queue");
7674                                         goto error;
7675                                 }
7676                                 dv->actions[n++] = dv->hrxq->action;
7677                         }
7678                 } else if (dev_flow->actions &
7679                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7680                         struct mlx5_hrxq *hrxq;
7681
7682                         assert(flow->rss.queue);
7683                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7684                                              MLX5_RSS_HASH_KEY_LEN,
7685                                              dev_flow->hash_fields,
7686                                              (*flow->rss.queue),
7687                                              flow->rss.queue_num);
7688                         if (!hrxq) {
7689                                 hrxq = mlx5_hrxq_new
7690                                         (dev, flow->rss.key,
7691                                          MLX5_RSS_HASH_KEY_LEN,
7692                                          dev_flow->hash_fields,
7693                                          (*flow->rss.queue),
7694                                          flow->rss.queue_num,
7695                                          !!(dev_flow->layers &
7696                                             MLX5_FLOW_LAYER_TUNNEL));
7697                         }
7698                         if (!hrxq) {
7699                                 rte_flow_error_set
7700                                         (error, rte_errno,
7701                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7702                                          "cannot get hash queue");
7703                                 goto error;
7704                         }
7705                         dv->hrxq = hrxq;
7706                         dv->actions[n++] = dv->hrxq->action;
7707                 }
7708                 dv->flow =
7709                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7710                                                   (void *)&dv->value, n,
7711                                                   dv->actions);
7712                 if (!dv->flow) {
7713                         rte_flow_error_set(error, errno,
7714                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7715                                            NULL,
7716                                            "hardware refuses to create flow");
7717                         goto error;
7718                 }
7719                 if (priv->vmwa_context &&
7720                     dev_flow->dv.vf_vlan.tag &&
7721                     !dev_flow->dv.vf_vlan.created) {
7722                         /*
7723                          * The rule contains the VLAN pattern.
7724                          * For VF we are going to create VLAN
7725                          * interface to make hypervisor set correct
7726                          * e-Switch vport context.
7727                          */
7728                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7729                 }
7730         }
7731         return 0;
7732 error:
7733         err = rte_errno; /* Save rte_errno before cleanup. */
7734         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7735                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7736                 if (dv->hrxq) {
7737                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7738                                 mlx5_hrxq_drop_release(dev);
7739                         else
7740                                 mlx5_hrxq_release(dev, dv->hrxq);
7741                         dv->hrxq = NULL;
7742                 }
7743                 if (dev_flow->dv.vf_vlan.tag &&
7744                     dev_flow->dv.vf_vlan.created)
7745                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7746         }
7747         rte_errno = err; /* Restore rte_errno. */
7748         return -rte_errno;
7749 }
7750
7751 /**
7752  * Release the flow matcher.
7753  *
7754  * @param dev
7755  *   Pointer to Ethernet device.
7756  * @param flow
7757  *   Pointer to mlx5_flow.
7758  *
7759  * @return
7760  *   1 while a reference on it exists, 0 when freed.
7761  */
7762 static int
7763 flow_dv_matcher_release(struct rte_eth_dev *dev,
7764                         struct mlx5_flow *flow)
7765 {
7766         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7767
7768         assert(matcher->matcher_object);
7769         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7770                 dev->data->port_id, (void *)matcher,
7771                 rte_atomic32_read(&matcher->refcnt));
7772         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7773                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7774                            (matcher->matcher_object));
7775                 LIST_REMOVE(matcher, next);
7776                 /* table ref-- in release interface. */
7777                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7778                 rte_free(matcher);
7779                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7780                         dev->data->port_id, (void *)matcher);
7781                 return 0;
7782         }
7783         return 1;
7784 }
7785
7786 /**
7787  * Release an encap/decap resource.
7788  *
7789  * @param flow
7790  *   Pointer to mlx5_flow.
7791  *
7792  * @return
7793  *   1 while a reference on it exists, 0 when freed.
7794  */
7795 static int
7796 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7797 {
7798         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7799                                                 flow->dv.encap_decap;
7800
7801         assert(cache_resource->verbs_action);
7802         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7803                 (void *)cache_resource,
7804                 rte_atomic32_read(&cache_resource->refcnt));
7805         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7806                 claim_zero(mlx5_glue->destroy_flow_action
7807                                 (cache_resource->verbs_action));
7808                 LIST_REMOVE(cache_resource, next);
7809                 rte_free(cache_resource);
7810                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7811                         (void *)cache_resource);
7812                 return 0;
7813         }
7814         return 1;
7815 }
7816
7817 /**
7818  * Release an jump to table action resource.
7819  *
7820  * @param dev
7821  *   Pointer to Ethernet device.
7822  * @param flow
7823  *   Pointer to mlx5_flow.
7824  *
7825  * @return
7826  *   1 while a reference on it exists, 0 when freed.
7827  */
7828 static int
7829 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7830                                   struct mlx5_flow *flow)
7831 {
7832         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7833         struct mlx5_flow_tbl_data_entry *tbl_data =
7834                         container_of(cache_resource,
7835                                      struct mlx5_flow_tbl_data_entry, jump);
7836
7837         assert(cache_resource->action);
7838         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7839                 (void *)cache_resource,
7840                 rte_atomic32_read(&cache_resource->refcnt));
7841         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7842                 claim_zero(mlx5_glue->destroy_flow_action
7843                                 (cache_resource->action));
7844                 /* jump action memory free is inside the table release. */
7845                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7846                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7847                         (void *)cache_resource);
7848                 return 0;
7849         }
7850         return 1;
7851 }
7852
7853 /**
7854  * Release a modify-header resource.
7855  *
7856  * @param flow
7857  *   Pointer to mlx5_flow.
7858  *
7859  * @return
7860  *   1 while a reference on it exists, 0 when freed.
7861  */
7862 static int
7863 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7864 {
7865         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7866                                                 flow->dv.modify_hdr;
7867
7868         assert(cache_resource->verbs_action);
7869         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7870                 (void *)cache_resource,
7871                 rte_atomic32_read(&cache_resource->refcnt));
7872         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7873                 claim_zero(mlx5_glue->destroy_flow_action
7874                                 (cache_resource->verbs_action));
7875                 LIST_REMOVE(cache_resource, next);
7876                 rte_free(cache_resource);
7877                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7878                         (void *)cache_resource);
7879                 return 0;
7880         }
7881         return 1;
7882 }
7883
7884 /**
7885  * Release port ID action resource.
7886  *
7887  * @param flow
7888  *   Pointer to mlx5_flow.
7889  *
7890  * @return
7891  *   1 while a reference on it exists, 0 when freed.
7892  */
7893 static int
7894 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7895 {
7896         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7897                 flow->dv.port_id_action;
7898
7899         assert(cache_resource->action);
7900         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7901                 (void *)cache_resource,
7902                 rte_atomic32_read(&cache_resource->refcnt));
7903         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7904                 claim_zero(mlx5_glue->destroy_flow_action
7905                                 (cache_resource->action));
7906                 LIST_REMOVE(cache_resource, next);
7907                 rte_free(cache_resource);
7908                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7909                         (void *)cache_resource);
7910                 return 0;
7911         }
7912         return 1;
7913 }
7914
7915 /**
7916  * Release push vlan action resource.
7917  *
7918  * @param flow
7919  *   Pointer to mlx5_flow.
7920  *
7921  * @return
7922  *   1 while a reference on it exists, 0 when freed.
7923  */
7924 static int
7925 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7926 {
7927         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7928                 flow->dv.push_vlan_res;
7929
7930         assert(cache_resource->action);
7931         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7932                 (void *)cache_resource,
7933                 rte_atomic32_read(&cache_resource->refcnt));
7934         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7935                 claim_zero(mlx5_glue->destroy_flow_action
7936                                 (cache_resource->action));
7937                 LIST_REMOVE(cache_resource, next);
7938                 rte_free(cache_resource);
7939                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7940                         (void *)cache_resource);
7941                 return 0;
7942         }
7943         return 1;
7944 }
7945
7946 /**
7947  * Remove the flow from the NIC but keeps it in memory.
7948  * Lock free, (mutex should be acquired by caller).
7949  *
7950  * @param[in] dev
7951  *   Pointer to Ethernet device.
7952  * @param[in, out] flow
7953  *   Pointer to flow structure.
7954  */
7955 static void
7956 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7957 {
7958         struct mlx5_flow_dv *dv;
7959         struct mlx5_flow *dev_flow;
7960
7961         if (!flow)
7962                 return;
7963         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7964                 dv = &dev_flow->dv;
7965                 if (dv->flow) {
7966                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7967                         dv->flow = NULL;
7968                 }
7969                 if (dv->hrxq) {
7970                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7971                                 mlx5_hrxq_drop_release(dev);
7972                         else
7973                                 mlx5_hrxq_release(dev, dv->hrxq);
7974                         dv->hrxq = NULL;
7975                 }
7976                 if (dev_flow->dv.vf_vlan.tag &&
7977                     dev_flow->dv.vf_vlan.created)
7978                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7979         }
7980 }
7981
7982 /**
7983  * Remove the flow from the NIC and the memory.
7984  * Lock free, (mutex should be acquired by caller).
7985  *
7986  * @param[in] dev
7987  *   Pointer to the Ethernet device structure.
7988  * @param[in, out] flow
7989  *   Pointer to flow structure.
7990  */
7991 static void
7992 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
7993 {
7994         struct mlx5_flow *dev_flow;
7995
7996         if (!flow)
7997                 return;
7998         __flow_dv_remove(dev, flow);
7999         if (flow->counter) {
8000                 flow_dv_counter_release(dev, flow->counter);
8001                 flow->counter = NULL;
8002         }
8003         if (flow->meter) {
8004                 mlx5_flow_meter_detach(flow->meter);
8005                 flow->meter = NULL;
8006         }
8007         while (!LIST_EMPTY(&flow->dev_flows)) {
8008                 dev_flow = LIST_FIRST(&flow->dev_flows);
8009                 LIST_REMOVE(dev_flow, next);
8010                 if (dev_flow->dv.matcher)
8011                         flow_dv_matcher_release(dev, dev_flow);
8012                 if (dev_flow->dv.encap_decap)
8013                         flow_dv_encap_decap_resource_release(dev_flow);
8014                 if (dev_flow->dv.modify_hdr)
8015                         flow_dv_modify_hdr_resource_release(dev_flow);
8016                 if (dev_flow->dv.jump)
8017                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8018                 if (dev_flow->dv.port_id_action)
8019                         flow_dv_port_id_action_resource_release(dev_flow);
8020                 if (dev_flow->dv.push_vlan_res)
8021                         flow_dv_push_vlan_action_resource_release(dev_flow);
8022                 if (dev_flow->dv.tag_resource)
8023                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8024                 rte_free(dev_flow);
8025         }
8026 }
8027
8028 /**
8029  * Query a dv flow  rule for its statistics via devx.
8030  *
8031  * @param[in] dev
8032  *   Pointer to Ethernet device.
8033  * @param[in] flow
8034  *   Pointer to the sub flow.
8035  * @param[out] data
8036  *   data retrieved by the query.
8037  * @param[out] error
8038  *   Perform verbose error reporting if not NULL.
8039  *
8040  * @return
8041  *   0 on success, a negative errno value otherwise and rte_errno is set.
8042  */
8043 static int
8044 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8045                     void *data, struct rte_flow_error *error)
8046 {
8047         struct mlx5_priv *priv = dev->data->dev_private;
8048         struct rte_flow_query_count *qc = data;
8049
8050         if (!priv->config.devx)
8051                 return rte_flow_error_set(error, ENOTSUP,
8052                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8053                                           NULL,
8054                                           "counters are not supported");
8055         if (flow->counter) {
8056                 uint64_t pkts, bytes;
8057                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8058                                                &bytes);
8059
8060                 if (err)
8061                         return rte_flow_error_set(error, -err,
8062                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8063                                         NULL, "cannot read counters");
8064                 qc->hits_set = 1;
8065                 qc->bytes_set = 1;
8066                 qc->hits = pkts - flow->counter->hits;
8067                 qc->bytes = bytes - flow->counter->bytes;
8068                 if (qc->reset) {
8069                         flow->counter->hits = pkts;
8070                         flow->counter->bytes = bytes;
8071                 }
8072                 return 0;
8073         }
8074         return rte_flow_error_set(error, EINVAL,
8075                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8076                                   NULL,
8077                                   "counters are not available");
8078 }
8079
8080 /**
8081  * Query a flow.
8082  *
8083  * @see rte_flow_query()
8084  * @see rte_flow_ops
8085  */
8086 static int
8087 flow_dv_query(struct rte_eth_dev *dev,
8088               struct rte_flow *flow __rte_unused,
8089               const struct rte_flow_action *actions __rte_unused,
8090               void *data __rte_unused,
8091               struct rte_flow_error *error __rte_unused)
8092 {
8093         int ret = -EINVAL;
8094
8095         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8096                 switch (actions->type) {
8097                 case RTE_FLOW_ACTION_TYPE_VOID:
8098                         break;
8099                 case RTE_FLOW_ACTION_TYPE_COUNT:
8100                         ret = flow_dv_query_count(dev, flow, data, error);
8101                         break;
8102                 default:
8103                         return rte_flow_error_set(error, ENOTSUP,
8104                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8105                                                   actions,
8106                                                   "action not supported");
8107                 }
8108         }
8109         return ret;
8110 }
8111
8112 /**
8113  * Destroy the meter table set.
8114  * Lock free, (mutex should be acquired by caller).
8115  *
8116  * @param[in] dev
8117  *   Pointer to Ethernet device.
8118  * @param[in] tbl
8119  *   Pointer to the meter table set.
8120  *
8121  * @return
8122  *   Always 0.
8123  */
8124 static int
8125 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8126                         struct mlx5_meter_domains_infos *tbl)
8127 {
8128         struct mlx5_priv *priv = dev->data->dev_private;
8129         struct mlx5_meter_domains_infos *mtd =
8130                                 (struct mlx5_meter_domains_infos *)tbl;
8131
8132         if (!mtd || !priv->config.dv_flow_en)
8133                 return 0;
8134         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8135                 claim_zero(mlx5_glue->dv_destroy_flow
8136                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8137         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8138                 claim_zero(mlx5_glue->dv_destroy_flow
8139                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8140         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8141                 claim_zero(mlx5_glue->dv_destroy_flow
8142                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8143         if (mtd->egress.color_matcher)
8144                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8145                           (mtd->egress.color_matcher));
8146         if (mtd->egress.any_matcher)
8147                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8148                           (mtd->egress.any_matcher));
8149         if (mtd->egress.tbl)
8150                 claim_zero(flow_dv_tbl_resource_release(dev,
8151                                                         mtd->egress.tbl));
8152         if (mtd->ingress.color_matcher)
8153                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8154                           (mtd->ingress.color_matcher));
8155         if (mtd->ingress.any_matcher)
8156                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8157                           (mtd->ingress.any_matcher));
8158         if (mtd->ingress.tbl)
8159                 claim_zero(flow_dv_tbl_resource_release(dev,
8160                                                         mtd->ingress.tbl));
8161         if (mtd->transfer.color_matcher)
8162                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8163                           (mtd->transfer.color_matcher));
8164         if (mtd->transfer.any_matcher)
8165                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8166                           (mtd->transfer.any_matcher));
8167         if (mtd->transfer.tbl)
8168                 claim_zero(flow_dv_tbl_resource_release(dev,
8169                                                         mtd->transfer.tbl));
8170         if (mtd->drop_actn)
8171                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8172         rte_free(mtd);
8173         return 0;
8174 }
8175
8176 /* Number of meter flow actions, count and jump or count and drop. */
8177 #define METER_ACTIONS 2
8178
8179 /**
8180  * Create specify domain meter table and suffix table.
8181  *
8182  * @param[in] dev
8183  *   Pointer to Ethernet device.
8184  * @param[in,out] mtb
8185  *   Pointer to DV meter table set.
8186  * @param[in] egress
8187  *   Table attribute.
8188  * @param[in] transfer
8189  *   Table attribute.
8190  * @param[in] color_reg_c_idx
8191  *   Reg C index for color match.
8192  *
8193  * @return
8194  *   0 on success, -1 otherwise and rte_errno is set.
8195  */
8196 static int
8197 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8198                            struct mlx5_meter_domains_infos *mtb,
8199                            uint8_t egress, uint8_t transfer,
8200                            uint32_t color_reg_c_idx)
8201 {
8202         struct mlx5_priv *priv = dev->data->dev_private;
8203         struct mlx5_ibv_shared *sh = priv->sh;
8204         struct mlx5_flow_dv_match_params mask = {
8205                 .size = sizeof(mask.buf),
8206         };
8207         struct mlx5_flow_dv_match_params value = {
8208                 .size = sizeof(value.buf),
8209         };
8210         struct mlx5dv_flow_matcher_attr dv_attr = {
8211                 .type = IBV_FLOW_ATTR_NORMAL,
8212                 .priority = 0,
8213                 .match_criteria_enable = 0,
8214                 .match_mask = (void *)&mask,
8215         };
8216         void *actions[METER_ACTIONS];
8217         struct mlx5_flow_tbl_resource **sfx_tbl;
8218         struct mlx5_meter_domain_info *dtb;
8219         struct rte_flow_error error;
8220         int i = 0;
8221
8222         if (transfer) {
8223                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8224                 dtb = &mtb->transfer;
8225         } else if (egress) {
8226                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8227                 dtb = &mtb->egress;
8228         } else {
8229                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8230                 dtb = &mtb->ingress;
8231         }
8232         /* If the suffix table in missing, create it. */
8233         if (!(*sfx_tbl)) {
8234                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8235                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8236                                                 egress, transfer, &error);
8237                 if (!(*sfx_tbl)) {
8238                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8239                         return -1;
8240                 }
8241         }
8242         /* Create the meter table with METER level. */
8243         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8244                                             egress, transfer, &error);
8245         if (!dtb->tbl) {
8246                 DRV_LOG(ERR, "Failed to create meter policer table.");
8247                 return -1;
8248         }
8249         /* Create matchers, Any and Color. */
8250         dv_attr.priority = 3;
8251         dv_attr.match_criteria_enable = 0;
8252         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8253                                                              &dv_attr,
8254                                                              dtb->tbl->obj);
8255         if (!dtb->any_matcher) {
8256                 DRV_LOG(ERR, "Failed to create meter"
8257                              " policer default matcher.");
8258                 goto error_exit;
8259         }
8260         dv_attr.priority = 0;
8261         dv_attr.match_criteria_enable =
8262                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8263         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8264                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
8265         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8266                                                                &dv_attr,
8267                                                                dtb->tbl->obj);
8268         if (!dtb->color_matcher) {
8269                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8270                 goto error_exit;
8271         }
8272         if (mtb->count_actns[RTE_MTR_DROPPED])
8273                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8274         actions[i++] = mtb->drop_actn;
8275         /* Default rule: lowest priority, match any, actions: drop. */
8276         dtb->policer_rules[RTE_MTR_DROPPED] =
8277                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8278                                                  (void *)&value, i, actions);
8279         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8280                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8281                 goto error_exit;
8282         }
8283         return 0;
8284 error_exit:
8285         return -1;
8286 }
8287
8288 /**
8289  * Create the needed meter and suffix tables.
8290  * Lock free, (mutex should be acquired by caller).
8291  *
8292  * @param[in] dev
8293  *   Pointer to Ethernet device.
8294  * @param[in] fm
8295  *   Pointer to the flow meter.
8296  *
8297  * @return
8298  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8299  */
8300 static struct mlx5_meter_domains_infos *
8301 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8302                        const struct mlx5_flow_meter *fm)
8303 {
8304         struct mlx5_priv *priv = dev->data->dev_private;
8305         struct mlx5_meter_domains_infos *mtb;
8306         int ret;
8307         int i;
8308
8309         if (!priv->mtr_en) {
8310                 rte_errno = ENOTSUP;
8311                 return NULL;
8312         }
8313         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8314         if (!mtb) {
8315                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8316                 return NULL;
8317         }
8318         /* Create meter count actions */
8319         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8320                 if (!fm->policer_stats.cnt[i])
8321                         continue;
8322                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8323         }
8324         /* Create drop action. */
8325         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8326         if (!mtb->drop_actn) {
8327                 DRV_LOG(ERR, "Failed to create drop action.");
8328                 goto error_exit;
8329         }
8330         /* Egress meter table. */
8331         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8332         if (ret) {
8333                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8334                 goto error_exit;
8335         }
8336         /* Ingress meter table. */
8337         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8338         if (ret) {
8339                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8340                 goto error_exit;
8341         }
8342         /* FDB meter table. */
8343         if (priv->config.dv_esw_en) {
8344                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8345                                                  priv->mtr_color_reg);
8346                 if (ret) {
8347                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8348                         goto error_exit;
8349                 }
8350         }
8351         return mtb;
8352 error_exit:
8353         flow_dv_destroy_mtr_tbl(dev, mtb);
8354         return NULL;
8355 }
8356
8357 /**
8358  * Destroy domain policer rule.
8359  *
8360  * @param[in] dt
8361  *   Pointer to domain table.
8362  */
8363 static void
8364 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8365 {
8366         int i;
8367
8368         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8369                 if (dt->policer_rules[i]) {
8370                         claim_zero(mlx5_glue->dv_destroy_flow
8371                                   (dt->policer_rules[i]));
8372                         dt->policer_rules[i] = NULL;
8373                 }
8374         }
8375         if (dt->jump_actn) {
8376                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8377                 dt->jump_actn = NULL;
8378         }
8379 }
8380
8381 /**
8382  * Destroy policer rules.
8383  *
8384  * @param[in] dev
8385  *   Pointer to Ethernet device.
8386  * @param[in] fm
8387  *   Pointer to flow meter structure.
8388  * @param[in] attr
8389  *   Pointer to flow attributes.
8390  *
8391  * @return
8392  *   Always 0.
8393  */
8394 static int
8395 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8396                               const struct mlx5_flow_meter *fm,
8397                               const struct rte_flow_attr *attr)
8398 {
8399         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8400
8401         if (!mtb)
8402                 return 0;
8403         if (attr->egress)
8404                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8405         if (attr->ingress)
8406                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8407         if (attr->transfer)
8408                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8409         return 0;
8410 }
8411
8412 /**
8413  * Create specify domain meter policer rule.
8414  *
8415  * @param[in] fm
8416  *   Pointer to flow meter structure.
8417  * @param[in] mtb
8418  *   Pointer to DV meter table set.
8419  * @param[in] sfx_tb
8420  *   Pointer to suffix table.
8421  * @param[in] mtr_reg_c
8422  *   Color match REG_C.
8423  *
8424  * @return
8425  *   0 on success, -1 otherwise.
8426  */
8427 static int
8428 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8429                                     struct mlx5_meter_domain_info *dtb,
8430                                     struct mlx5_flow_tbl_resource *sfx_tb,
8431                                     uint8_t mtr_reg_c)
8432 {
8433         struct mlx5_flow_dv_match_params matcher = {
8434                 .size = sizeof(matcher.buf),
8435         };
8436         struct mlx5_flow_dv_match_params value = {
8437                 .size = sizeof(value.buf),
8438         };
8439         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8440         void *actions[METER_ACTIONS];
8441         int i;
8442
8443         /* Create jump action. */
8444         if (!sfx_tb)
8445                 return -1;
8446         if (!dtb->jump_actn)
8447                 dtb->jump_actn =
8448                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8449                                                         (sfx_tb->obj);
8450         if (!dtb->jump_actn) {
8451                 DRV_LOG(ERR, "Failed to create policer jump action.");
8452                 goto error;
8453         }
8454         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8455                 int j = 0;
8456
8457                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8458                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8459                 if (mtb->count_actns[i])
8460                         actions[j++] = mtb->count_actns[i];
8461                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8462                         actions[j++] = mtb->drop_actn;
8463                 else
8464                         actions[j++] = dtb->jump_actn;
8465                 dtb->policer_rules[i] =
8466                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8467                                                  (void *)&value,
8468                                                   j, actions);
8469                 if (!dtb->policer_rules[i]) {
8470                         DRV_LOG(ERR, "Failed to create policer rule.");
8471                         goto error;
8472                 }
8473         }
8474         return 0;
8475 error:
8476         rte_errno = errno;
8477         return -1;
8478 }
8479
8480 /**
8481  * Create policer rules.
8482  *
8483  * @param[in] dev
8484  *   Pointer to Ethernet device.
8485  * @param[in] fm
8486  *   Pointer to flow meter structure.
8487  * @param[in] attr
8488  *   Pointer to flow attributes.
8489  *
8490  * @return
8491  *   0 on success, -1 otherwise.
8492  */
8493 static int
8494 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8495                              struct mlx5_flow_meter *fm,
8496                              const struct rte_flow_attr *attr)
8497 {
8498         struct mlx5_priv *priv = dev->data->dev_private;
8499         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8500         int ret;
8501
8502         if (attr->egress) {
8503                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8504                                                 priv->sh->tx_mtr_sfx_tbl,
8505                                                 priv->mtr_color_reg);
8506                 if (ret) {
8507                         DRV_LOG(ERR, "Failed to create egress policer.");
8508                         goto error;
8509                 }
8510         }
8511         if (attr->ingress) {
8512                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8513                                                 priv->sh->rx_mtr_sfx_tbl,
8514                                                 priv->mtr_color_reg);
8515                 if (ret) {
8516                         DRV_LOG(ERR, "Failed to create ingress policer.");
8517                         goto error;
8518                 }
8519         }
8520         if (attr->transfer) {
8521                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8522                                                 priv->sh->fdb_mtr_sfx_tbl,
8523                                                 priv->mtr_color_reg);
8524                 if (ret) {
8525                         DRV_LOG(ERR, "Failed to create transfer policer.");
8526                         goto error;
8527                 }
8528         }
8529         return 0;
8530 error:
8531         flow_dv_destroy_policer_rules(dev, fm, attr);
8532         return -1;
8533 }
8534
8535 /**
8536  * Query a devx counter.
8537  *
8538  * @param[in] dev
8539  *   Pointer to the Ethernet device structure.
8540  * @param[in] cnt
8541  *   Pointer to the flow counter.
8542  * @param[in] clear
8543  *   Set to clear the counter statistics.
8544  * @param[out] pkts
8545  *   The statistics value of packets.
8546  * @param[out] bytes
8547  *   The statistics value of bytes.
8548  *
8549  * @return
8550  *   0 on success, otherwise return -1.
8551  */
8552 static int
8553 flow_dv_counter_query(struct rte_eth_dev *dev,
8554                       struct mlx5_flow_counter *cnt, bool clear,
8555                       uint64_t *pkts, uint64_t *bytes)
8556 {
8557         struct mlx5_priv *priv = dev->data->dev_private;
8558         uint64_t inn_pkts, inn_bytes;
8559         int ret;
8560
8561         if (!priv->config.devx)
8562                 return -1;
8563         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8564         if (ret)
8565                 return -1;
8566         *pkts = inn_pkts - cnt->hits;
8567         *bytes = inn_bytes - cnt->bytes;
8568         if (clear) {
8569                 cnt->hits = inn_pkts;
8570                 cnt->bytes = inn_bytes;
8571         }
8572         return 0;
8573 }
8574
8575 /*
8576  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8577  */
8578 static int
8579 flow_dv_translate(struct rte_eth_dev *dev,
8580                   struct mlx5_flow *dev_flow,
8581                   const struct rte_flow_attr *attr,
8582                   const struct rte_flow_item items[],
8583                   const struct rte_flow_action actions[],
8584                   struct rte_flow_error *error)
8585 {
8586         int ret;
8587
8588         flow_dv_shared_lock(dev);
8589         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8590         flow_dv_shared_unlock(dev);
8591         return ret;
8592 }
8593
8594 /*
8595  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8596  */
8597 static int
8598 flow_dv_apply(struct rte_eth_dev *dev,
8599               struct rte_flow *flow,
8600               struct rte_flow_error *error)
8601 {
8602         int ret;
8603
8604         flow_dv_shared_lock(dev);
8605         ret = __flow_dv_apply(dev, flow, error);
8606         flow_dv_shared_unlock(dev);
8607         return ret;
8608 }
8609
8610 /*
8611  * Mutex-protected thunk to lock-free __flow_dv_remove().
8612  */
8613 static void
8614 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8615 {
8616         flow_dv_shared_lock(dev);
8617         __flow_dv_remove(dev, flow);
8618         flow_dv_shared_unlock(dev);
8619 }
8620
8621 /*
8622  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8623  */
8624 static void
8625 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8626 {
8627         flow_dv_shared_lock(dev);
8628         __flow_dv_destroy(dev, flow);
8629         flow_dv_shared_unlock(dev);
8630 }
8631
8632 /*
8633  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8634  */
8635 static struct mlx5_flow_counter *
8636 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8637 {
8638         struct mlx5_flow_counter *cnt;
8639
8640         flow_dv_shared_lock(dev);
8641         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8642         flow_dv_shared_unlock(dev);
8643         return cnt;
8644 }
8645
8646 /*
8647  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8648  */
8649 static void
8650 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8651 {
8652         flow_dv_shared_lock(dev);
8653         flow_dv_counter_release(dev, cnt);
8654         flow_dv_shared_unlock(dev);
8655 }
8656
8657 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8658         .validate = flow_dv_validate,
8659         .prepare = flow_dv_prepare,
8660         .translate = flow_dv_translate,
8661         .apply = flow_dv_apply,
8662         .remove = flow_dv_remove,
8663         .destroy = flow_dv_destroy,
8664         .query = flow_dv_query,
8665         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8666         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8667         .create_policer_rules = flow_dv_create_policer_rules,
8668         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8669         .counter_alloc = flow_dv_counter_allocate,
8670         .counter_free = flow_dv_counter_free,
8671         .counter_query = flow_dv_counter_query,
8672 };
8673
8674 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */