drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30
  31 #include "mlx5.h"
  32 #include "mlx5_defs.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_flow.h"
  35 #include "mlx5_prm.h"
  36 #include "mlx5_rxtx.h"
  37
  38 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  39
  40 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  41 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  42 #endif
  43
  44 #ifndef HAVE_MLX5DV_DR_ESWITCH
  45 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  46 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  47 #endif
  48 #endif
  49
  50 #ifndef HAVE_MLX5DV_DR
  51 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  52 #endif
  53
  54 /* VLAN header definitions */
  55 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  56 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  57 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  58 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  59 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  60
  61 union flow_dv_attr {
  62         struct {
  63                 uint32_t valid:1;
  64                 uint32_t ipv4:1;
  65                 uint32_t ipv6:1;
  66                 uint32_t tcp:1;
  67                 uint32_t udp:1;
  68                 uint32_t reserved:27;
  69         };
  70         uint32_t attr;
  71 };
  72
  73 /**
  74  * Initialize flow attributes structure according to flow items' types.
  75  *
  76  * @param[in] item
  77  *   Pointer to item specification.
  78  * @param[out] attr
  79  *   Pointer to flow attributes structure.
  80  */
  81 static void
  82 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  83 {
  84         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  85                 switch (item->type) {
  86                 case RTE_FLOW_ITEM_TYPE_IPV4:
  87                         attr->ipv4 = 1;
  88                         break;
  89                 case RTE_FLOW_ITEM_TYPE_IPV6:
  90                         attr->ipv6 = 1;
  91                         break;
  92                 case RTE_FLOW_ITEM_TYPE_UDP:
  93                         attr->udp = 1;
  94                         break;
  95                 case RTE_FLOW_ITEM_TYPE_TCP:
  96                         attr->tcp = 1;
  97                         break;
  98                 default:
  99                         break;
 100                 }
 101         }
 102         attr->valid = 1;
 103 }
 104
 105 /**
 106  * Convert rte_mtr_color to mlx5 color.
 107  *
 108  * @param[in] rcol
 109  *   rte_mtr_color.
 110  *
 111  * @return
 112  *   mlx5 color.
 113  */
 114 static int
 115 rte_col_2_mlx5_col(enum rte_color rcol)
 116 {
 117         switch (rcol) {
 118         case RTE_COLOR_GREEN:
 119                 return MLX5_FLOW_COLOR_GREEN;
 120         case RTE_COLOR_YELLOW:
 121                 return MLX5_FLOW_COLOR_YELLOW;
 122         case RTE_COLOR_RED:
 123                 return MLX5_FLOW_COLOR_RED;
 124         default:
 125                 break;
 126         }
 127         return MLX5_FLOW_COLOR_UNDEFINED;
 128 }
 129
 130 struct field_modify_info {
 131         uint32_t size; /* Size of field in protocol header, in bytes. */
 132         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 133         enum mlx5_modification_field id;
 134 };
 135
 136 struct field_modify_info modify_eth[] = {
 137         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 138         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 139         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 140         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 141         {0, 0, 0},
 142 };
 143
 144 struct field_modify_info modify_vlan_out_first_vid[] = {
 145         /* Size in bits !!! */
 146         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 147         {0, 0, 0},
 148 };
 149
 150 struct field_modify_info modify_ipv4[] = {
 151         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 152         {4, 12, MLX5_MODI_OUT_SIPV4},
 153         {4, 16, MLX5_MODI_OUT_DIPV4},
 154         {0, 0, 0},
 155 };
 156
 157 struct field_modify_info modify_ipv6[] = {
 158         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 159         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 160         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 161         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 162         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 163         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 164         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 165         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 166         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 167         {0, 0, 0},
 168 };
 169
 170 struct field_modify_info modify_udp[] = {
 171         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 172         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 173         {0, 0, 0},
 174 };
 175
 176 struct field_modify_info modify_tcp[] = {
 177         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 178         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 179         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 180         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 181         {0, 0, 0},
 182 };
 183
 184 static void
 185 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 186                           uint8_t next_protocol, uint64_t *item_flags,
 187                           int *tunnel)
 188 {
 189         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 190                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 191         if (next_protocol == IPPROTO_IPIP) {
 192                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 193                 *tunnel = 1;
 194         }
 195         if (next_protocol == IPPROTO_IPV6) {
 196                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 197                 *tunnel = 1;
 198         }
 199 }
 200
 201 /**
 202  * Acquire the synchronizing object to protect multithreaded access
 203  * to shared dv context. Lock occurs only if context is actually
 204  * shared, i.e. we have multiport IB device and representors are
 205  * created.
 206  *
 207  * @param[in] dev
 208  *   Pointer to the rte_eth_dev structure.
 209  */
 210 static void
 211 flow_dv_shared_lock(struct rte_eth_dev *dev)
 212 {
 213         struct mlx5_priv *priv = dev->data->dev_private;
 214         struct mlx5_ibv_shared *sh = priv->sh;
 215
 216         if (sh->dv_refcnt > 1) {
 217                 int ret;
 218
 219                 ret = pthread_mutex_lock(&sh->dv_mutex);
 220                 assert(!ret);
 221                 (void)ret;
 222         }
 223 }
 224
 225 static void
 226 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 227 {
 228         struct mlx5_priv *priv = dev->data->dev_private;
 229         struct mlx5_ibv_shared *sh = priv->sh;
 230
 231         if (sh->dv_refcnt > 1) {
 232                 int ret;
 233
 234                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 235                 assert(!ret);
 236                 (void)ret;
 237         }
 238 }
 239
 240 /* Update VLAN's VID/PCP based on input rte_flow_action.
 241  *
 242  * @param[in] action
 243  *   Pointer to struct rte_flow_action.
 244  * @param[out] vlan
 245  *   Pointer to struct rte_vlan_hdr.
 246  */
 247 static void
 248 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 249                          struct rte_vlan_hdr *vlan)
 250 {
 251         uint16_t vlan_tci;
 252         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 253                 vlan_tci =
 254                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 255                                                action->conf)->vlan_pcp;
 256                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 257                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 258                 vlan->vlan_tci |= vlan_tci;
 259         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 260                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 261                 vlan->vlan_tci |= rte_be_to_cpu_16
 262                     (((const struct rte_flow_action_of_set_vlan_vid *)
 263                                              action->conf)->vlan_vid);
 264         }
 265 }
 266
 267 /**
 268  * Fetch 1, 2, 3 or 4 byte field from the byte array
 269  * and return as unsigned integer in host-endian format.
 270  *
 271  * @param[in] data
 272  *   Pointer to data array.
 273  * @param[in] size
 274  *   Size of field to extract.
 275  *
 276  * @return
 277  *   converted field in host endian format.
 278  */
 279 static inline uint32_t
 280 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 281 {
 282         uint32_t ret;
 283
 284         switch (size) {
 285         case 1:
 286                 ret = *data;
 287                 break;
 288         case 2:
 289                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 290                 break;
 291         case 3:
 292                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 293                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 294                 break;
 295         case 4:
 296                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 297                 break;
 298         default:
 299                 assert(false);
 300                 ret = 0;
 301                 break;
 302         }
 303         return ret;
 304 }
 305
 306 /**
 307  * Convert modify-header action to DV specification.
 308  *
 309  * Data length of each action is determined by provided field description
 310  * and the item mask. Data bit offset and width of each action is determined
 311  * by provided item mask.
 312  *
 313  * @param[in] item
 314  *   Pointer to item specification.
 315  * @param[in] field
 316  *   Pointer to field modification information.
 317  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 318  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 319  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 320  * @param[in] dcopy
 321  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 322  *   Negative offset value sets the same offset as source offset.
 323  *   size field is ignored, value is taken from source field.
 324  * @param[in,out] resource
 325  *   Pointer to the modify-header resource.
 326  * @param[in] type
 327  *   Type of modification.
 328  * @param[out] error
 329  *   Pointer to the error structure.
 330  *
 331  * @return
 332  *   0 on success, a negative errno value otherwise and rte_errno is set.
 333  */
 334 static int
 335 flow_dv_convert_modify_action(struct rte_flow_item *item,
 336                               struct field_modify_info *field,
 337                               struct field_modify_info *dcopy,
 338                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 339                               uint32_t type, struct rte_flow_error *error)
 340 {
 341         uint32_t i = resource->actions_num;
 342         struct mlx5_modification_cmd *actions = resource->actions;
 343
 344         /*
 345          * The item and mask are provided in big-endian format.
 346          * The fields should be presented as in big-endian format either.
 347          * Mask must be always present, it defines the actual field width.
 348          */
 349         assert(item->mask);
 350         assert(field->size);
 351         do {
 352                 unsigned int size_b;
 353                 unsigned int off_b;
 354                 uint32_t mask;
 355                 uint32_t data;
 356
 357                 if (i >= MLX5_MODIFY_NUM)
 358                         return rte_flow_error_set(error, EINVAL,
 359                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 360                                  "too many items to modify");
 361                 /* Fetch variable byte size mask from the array. */
 362                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 363                                            field->offset, field->size);
 364                 if (!mask) {
 365                         ++field;
 366                         continue;
 367                 }
 368                 /* Deduce actual data width in bits from mask value. */
 369                 off_b = rte_bsf32(mask);
 370                 size_b = sizeof(uint32_t) * CHAR_BIT -
 371                          off_b - __builtin_clz(mask);
 372                 assert(size_b);
 373                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 374                 actions[i].action_type = type;
 375                 actions[i].field = field->id;
 376                 actions[i].offset = off_b;
 377                 actions[i].length = size_b;
 378                 /* Convert entire record to expected big-endian format. */
 379                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 380                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 381                         assert(dcopy);
 382                         actions[i].dst_field = dcopy->id;
 383                         actions[i].dst_offset =
 384                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 385                         /* Convert entire record to big-endian format. */
 386                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 387                 } else {
 388                         assert(item->spec);
 389                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 390                                                    field->offset, field->size);
 391                         /* Shift out the trailing masked bits from data. */
 392                         data = (data & mask) >> off_b;
 393                         actions[i].data1 = rte_cpu_to_be_32(data);
 394                 }
 395                 ++i;
 396                 ++field;
 397         } while (field->size);
 398         resource->actions_num = i;
 399         if (!resource->actions_num)
 400                 return rte_flow_error_set(error, EINVAL,
 401                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 402                                           "invalid modification flow item");
 403         return 0;
 404 }
 405
 406 /**
 407  * Convert modify-header set IPv4 address action to DV specification.
 408  *
 409  * @param[in,out] resource
 410  *   Pointer to the modify-header resource.
 411  * @param[in] action
 412  *   Pointer to action specification.
 413  * @param[out] error
 414  *   Pointer to the error structure.
 415  *
 416  * @return
 417  *   0 on success, a negative errno value otherwise and rte_errno is set.
 418  */
 419 static int
 420 flow_dv_convert_action_modify_ipv4
 421                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 422                          const struct rte_flow_action *action,
 423                          struct rte_flow_error *error)
 424 {
 425         const struct rte_flow_action_set_ipv4 *conf =
 426                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 427         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 428         struct rte_flow_item_ipv4 ipv4;
 429         struct rte_flow_item_ipv4 ipv4_mask;
 430
 431         memset(&ipv4, 0, sizeof(ipv4));
 432         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 433         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 434                 ipv4.hdr.src_addr = conf->ipv4_addr;
 435                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 436         } else {
 437                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 438                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 439         }
 440         item.spec = &ipv4;
 441         item.mask = &ipv4_mask;
 442         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 443                                              MLX5_MODIFICATION_TYPE_SET, error);
 444 }
 445
 446 /**
 447  * Convert modify-header set IPv6 address action to DV specification.
 448  *
 449  * @param[in,out] resource
 450  *   Pointer to the modify-header resource.
 451  * @param[in] action
 452  *   Pointer to action specification.
 453  * @param[out] error
 454  *   Pointer to the error structure.
 455  *
 456  * @return
 457  *   0 on success, a negative errno value otherwise and rte_errno is set.
 458  */
 459 static int
 460 flow_dv_convert_action_modify_ipv6
 461                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 462                          const struct rte_flow_action *action,
 463                          struct rte_flow_error *error)
 464 {
 465         const struct rte_flow_action_set_ipv6 *conf =
 466                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 467         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 468         struct rte_flow_item_ipv6 ipv6;
 469         struct rte_flow_item_ipv6 ipv6_mask;
 470
 471         memset(&ipv6, 0, sizeof(ipv6));
 472         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 473         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 474                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 475                        sizeof(ipv6.hdr.src_addr));
 476                 memcpy(&ipv6_mask.hdr.src_addr,
 477                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 478                        sizeof(ipv6.hdr.src_addr));
 479         } else {
 480                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 481                        sizeof(ipv6.hdr.dst_addr));
 482                 memcpy(&ipv6_mask.hdr.dst_addr,
 483                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 484                        sizeof(ipv6.hdr.dst_addr));
 485         }
 486         item.spec = &ipv6;
 487         item.mask = &ipv6_mask;
 488         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 489                                              MLX5_MODIFICATION_TYPE_SET, error);
 490 }
 491
 492 /**
 493  * Convert modify-header set MAC address action to DV specification.
 494  *
 495  * @param[in,out] resource
 496  *   Pointer to the modify-header resource.
 497  * @param[in] action
 498  *   Pointer to action specification.
 499  * @param[out] error
 500  *   Pointer to the error structure.
 501  *
 502  * @return
 503  *   0 on success, a negative errno value otherwise and rte_errno is set.
 504  */
 505 static int
 506 flow_dv_convert_action_modify_mac
 507                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 508                          const struct rte_flow_action *action,
 509                          struct rte_flow_error *error)
 510 {
 511         const struct rte_flow_action_set_mac *conf =
 512                 (const struct rte_flow_action_set_mac *)(action->conf);
 513         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 514         struct rte_flow_item_eth eth;
 515         struct rte_flow_item_eth eth_mask;
 516
 517         memset(&eth, 0, sizeof(eth));
 518         memset(&eth_mask, 0, sizeof(eth_mask));
 519         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 520                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 521                        sizeof(eth.src.addr_bytes));
 522                 memcpy(&eth_mask.src.addr_bytes,
 523                        &rte_flow_item_eth_mask.src.addr_bytes,
 524                        sizeof(eth_mask.src.addr_bytes));
 525         } else {
 526                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 527                        sizeof(eth.dst.addr_bytes));
 528                 memcpy(&eth_mask.dst.addr_bytes,
 529                        &rte_flow_item_eth_mask.dst.addr_bytes,
 530                        sizeof(eth_mask.dst.addr_bytes));
 531         }
 532         item.spec = &eth;
 533         item.mask = &eth_mask;
 534         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 535                                              MLX5_MODIFICATION_TYPE_SET, error);
 536 }
 537
 538 /**
 539  * Convert modify-header set VLAN VID action to DV specification.
 540  *
 541  * @param[in,out] resource
 542  *   Pointer to the modify-header resource.
 543  * @param[in] action
 544  *   Pointer to action specification.
 545  * @param[out] error
 546  *   Pointer to the error structure.
 547  *
 548  * @return
 549  *   0 on success, a negative errno value otherwise and rte_errno is set.
 550  */
 551 static int
 552 flow_dv_convert_action_modify_vlan_vid
 553                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 554                          const struct rte_flow_action *action,
 555                          struct rte_flow_error *error)
 556 {
 557         const struct rte_flow_action_of_set_vlan_vid *conf =
 558                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 559         int i = resource->actions_num;
 560         struct mlx5_modification_cmd *actions = &resource->actions[i];
 561         struct field_modify_info *field = modify_vlan_out_first_vid;
 562
 563         if (i >= MLX5_MODIFY_NUM)
 564                 return rte_flow_error_set(error, EINVAL,
 565                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 566                          "too many items to modify");
 567         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 568         actions[i].field = field->id;
 569         actions[i].length = field->size;
 570         actions[i].offset = field->offset;
 571         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 572         actions[i].data1 = conf->vlan_vid;
 573         actions[i].data1 = actions[i].data1 << 16;
 574         resource->actions_num = ++i;
 575         return 0;
 576 }
 577
 578 /**
 579  * Convert modify-header set TP action to DV specification.
 580  *
 581  * @param[in,out] resource
 582  *   Pointer to the modify-header resource.
 583  * @param[in] action
 584  *   Pointer to action specification.
 585  * @param[in] items
 586  *   Pointer to rte_flow_item objects list.
 587  * @param[in] attr
 588  *   Pointer to flow attributes structure.
 589  * @param[out] error
 590  *   Pointer to the error structure.
 591  *
 592  * @return
 593  *   0 on success, a negative errno value otherwise and rte_errno is set.
 594  */
 595 static int
 596 flow_dv_convert_action_modify_tp
 597                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 598                          const struct rte_flow_action *action,
 599                          const struct rte_flow_item *items,
 600                          union flow_dv_attr *attr,
 601                          struct rte_flow_error *error)
 602 {
 603         const struct rte_flow_action_set_tp *conf =
 604                 (const struct rte_flow_action_set_tp *)(action->conf);
 605         struct rte_flow_item item;
 606         struct rte_flow_item_udp udp;
 607         struct rte_flow_item_udp udp_mask;
 608         struct rte_flow_item_tcp tcp;
 609         struct rte_flow_item_tcp tcp_mask;
 610         struct field_modify_info *field;
 611
 612         if (!attr->valid)
 613                 flow_dv_attr_init(items, attr);
 614         if (attr->udp) {
 615                 memset(&udp, 0, sizeof(udp));
 616                 memset(&udp_mask, 0, sizeof(udp_mask));
 617                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 618                         udp.hdr.src_port = conf->port;
 619                         udp_mask.hdr.src_port =
 620                                         rte_flow_item_udp_mask.hdr.src_port;
 621                 } else {
 622                         udp.hdr.dst_port = conf->port;
 623                         udp_mask.hdr.dst_port =
 624                                         rte_flow_item_udp_mask.hdr.dst_port;
 625                 }
 626                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 627                 item.spec = &udp;
 628                 item.mask = &udp_mask;
 629                 field = modify_udp;
 630         }
 631         if (attr->tcp) {
 632                 memset(&tcp, 0, sizeof(tcp));
 633                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 634                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 635                         tcp.hdr.src_port = conf->port;
 636                         tcp_mask.hdr.src_port =
 637                                         rte_flow_item_tcp_mask.hdr.src_port;
 638                 } else {
 639                         tcp.hdr.dst_port = conf->port;
 640                         tcp_mask.hdr.dst_port =
 641                                         rte_flow_item_tcp_mask.hdr.dst_port;
 642                 }
 643                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 644                 item.spec = &tcp;
 645                 item.mask = &tcp_mask;
 646                 field = modify_tcp;
 647         }
 648         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 649                                              MLX5_MODIFICATION_TYPE_SET, error);
 650 }
 651
 652 /**
 653  * Convert modify-header set TTL action to DV specification.
 654  *
 655  * @param[in,out] resource
 656  *   Pointer to the modify-header resource.
 657  * @param[in] action
 658  *   Pointer to action specification.
 659  * @param[in] items
 660  *   Pointer to rte_flow_item objects list.
 661  * @param[in] attr
 662  *   Pointer to flow attributes structure.
 663  * @param[out] error
 664  *   Pointer to the error structure.
 665  *
 666  * @return
 667  *   0 on success, a negative errno value otherwise and rte_errno is set.
 668  */
 669 static int
 670 flow_dv_convert_action_modify_ttl
 671                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 672                          const struct rte_flow_action *action,
 673                          const struct rte_flow_item *items,
 674                          union flow_dv_attr *attr,
 675                          struct rte_flow_error *error)
 676 {
 677         const struct rte_flow_action_set_ttl *conf =
 678                 (const struct rte_flow_action_set_ttl *)(action->conf);
 679         struct rte_flow_item item;
 680         struct rte_flow_item_ipv4 ipv4;
 681         struct rte_flow_item_ipv4 ipv4_mask;
 682         struct rte_flow_item_ipv6 ipv6;
 683         struct rte_flow_item_ipv6 ipv6_mask;
 684         struct field_modify_info *field;
 685
 686         if (!attr->valid)
 687                 flow_dv_attr_init(items, attr);
 688         if (attr->ipv4) {
 689                 memset(&ipv4, 0, sizeof(ipv4));
 690                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 691                 ipv4.hdr.time_to_live = conf->ttl_value;
 692                 ipv4_mask.hdr.time_to_live = 0xFF;
 693                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 694                 item.spec = &ipv4;
 695                 item.mask = &ipv4_mask;
 696                 field = modify_ipv4;
 697         }
 698         if (attr->ipv6) {
 699                 memset(&ipv6, 0, sizeof(ipv6));
 700                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 701                 ipv6.hdr.hop_limits = conf->ttl_value;
 702                 ipv6_mask.hdr.hop_limits = 0xFF;
 703                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 704                 item.spec = &ipv6;
 705                 item.mask = &ipv6_mask;
 706                 field = modify_ipv6;
 707         }
 708         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 709                                              MLX5_MODIFICATION_TYPE_SET, error);
 710 }
 711
 712 /**
 713  * Convert modify-header decrement TTL action to DV specification.
 714  *
 715  * @param[in,out] resource
 716  *   Pointer to the modify-header resource.
 717  * @param[in] action
 718  *   Pointer to action specification.
 719  * @param[in] items
 720  *   Pointer to rte_flow_item objects list.
 721  * @param[in] attr
 722  *   Pointer to flow attributes structure.
 723  * @param[out] error
 724  *   Pointer to the error structure.
 725  *
 726  * @return
 727  *   0 on success, a negative errno value otherwise and rte_errno is set.
 728  */
 729 static int
 730 flow_dv_convert_action_modify_dec_ttl
 731                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 732                          const struct rte_flow_item *items,
 733                          union flow_dv_attr *attr,
 734                          struct rte_flow_error *error)
 735 {
 736         struct rte_flow_item item;
 737         struct rte_flow_item_ipv4 ipv4;
 738         struct rte_flow_item_ipv4 ipv4_mask;
 739         struct rte_flow_item_ipv6 ipv6;
 740         struct rte_flow_item_ipv6 ipv6_mask;
 741         struct field_modify_info *field;
 742
 743         if (!attr->valid)
 744                 flow_dv_attr_init(items, attr);
 745         if (attr->ipv4) {
 746                 memset(&ipv4, 0, sizeof(ipv4));
 747                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 748                 ipv4.hdr.time_to_live = 0xFF;
 749                 ipv4_mask.hdr.time_to_live = 0xFF;
 750                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 751                 item.spec = &ipv4;
 752                 item.mask = &ipv4_mask;
 753                 field = modify_ipv4;
 754         }
 755         if (attr->ipv6) {
 756                 memset(&ipv6, 0, sizeof(ipv6));
 757                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 758                 ipv6.hdr.hop_limits = 0xFF;
 759                 ipv6_mask.hdr.hop_limits = 0xFF;
 760                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 761                 item.spec = &ipv6;
 762                 item.mask = &ipv6_mask;
 763                 field = modify_ipv6;
 764         }
 765         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 766                                              MLX5_MODIFICATION_TYPE_ADD, error);
 767 }
 768
 769 /**
 770  * Convert modify-header increment/decrement TCP Sequence number
 771  * to DV specification.
 772  *
 773  * @param[in,out] resource
 774  *   Pointer to the modify-header resource.
 775  * @param[in] action
 776  *   Pointer to action specification.
 777  * @param[out] error
 778  *   Pointer to the error structure.
 779  *
 780  * @return
 781  *   0 on success, a negative errno value otherwise and rte_errno is set.
 782  */
 783 static int
 784 flow_dv_convert_action_modify_tcp_seq
 785                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 786                          const struct rte_flow_action *action,
 787                          struct rte_flow_error *error)
 788 {
 789         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 790         uint64_t value = rte_be_to_cpu_32(*conf);
 791         struct rte_flow_item item;
 792         struct rte_flow_item_tcp tcp;
 793         struct rte_flow_item_tcp tcp_mask;
 794
 795         memset(&tcp, 0, sizeof(tcp));
 796         memset(&tcp_mask, 0, sizeof(tcp_mask));
 797         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 798                 /*
 799                  * The HW has no decrement operation, only increment operation.
 800                  * To simulate decrement X from Y using increment operation
 801                  * we need to add UINT32_MAX X times to Y.
 802                  * Each adding of UINT32_MAX decrements Y by 1.
 803                  */
 804                 value *= UINT32_MAX;
 805         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 806         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 807         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 808         item.spec = &tcp;
 809         item.mask = &tcp_mask;
 810         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 811                                              MLX5_MODIFICATION_TYPE_ADD, error);
 812 }
 813
 814 /**
 815  * Convert modify-header increment/decrement TCP Acknowledgment number
 816  * to DV specification.
 817  *
 818  * @param[in,out] resource
 819  *   Pointer to the modify-header resource.
 820  * @param[in] action
 821  *   Pointer to action specification.
 822  * @param[out] error
 823  *   Pointer to the error structure.
 824  *
 825  * @return
 826  *   0 on success, a negative errno value otherwise and rte_errno is set.
 827  */
 828 static int
 829 flow_dv_convert_action_modify_tcp_ack
 830                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 831                          const struct rte_flow_action *action,
 832                          struct rte_flow_error *error)
 833 {
 834         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 835         uint64_t value = rte_be_to_cpu_32(*conf);
 836         struct rte_flow_item item;
 837         struct rte_flow_item_tcp tcp;
 838         struct rte_flow_item_tcp tcp_mask;
 839
 840         memset(&tcp, 0, sizeof(tcp));
 841         memset(&tcp_mask, 0, sizeof(tcp_mask));
 842         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 843                 /*
 844                  * The HW has no decrement operation, only increment operation.
 845                  * To simulate decrement X from Y using increment operation
 846                  * we need to add UINT32_MAX X times to Y.
 847                  * Each adding of UINT32_MAX decrements Y by 1.
 848                  */
 849                 value *= UINT32_MAX;
 850         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 851         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 852         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 853         item.spec = &tcp;
 854         item.mask = &tcp_mask;
 855         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 856                                              MLX5_MODIFICATION_TYPE_ADD, error);
 857 }
 858
 859 static enum mlx5_modification_field reg_to_field[] = {
 860         [REG_NONE] = MLX5_MODI_OUT_NONE,
 861         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 862         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 863         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 864         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 865         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 866         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 867         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 868         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 869         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 870         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 871 };
 872
 873 /**
 874  * Convert register set to DV specification.
 875  *
 876  * @param[in,out] resource
 877  *   Pointer to the modify-header resource.
 878  * @param[in] action
 879  *   Pointer to action specification.
 880  * @param[out] error
 881  *   Pointer to the error structure.
 882  *
 883  * @return
 884  *   0 on success, a negative errno value otherwise and rte_errno is set.
 885  */
 886 static int
 887 flow_dv_convert_action_set_reg
 888                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 889                          const struct rte_flow_action *action,
 890                          struct rte_flow_error *error)
 891 {
 892         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 893         struct mlx5_modification_cmd *actions = resource->actions;
 894         uint32_t i = resource->actions_num;
 895
 896         if (i >= MLX5_MODIFY_NUM)
 897                 return rte_flow_error_set(error, EINVAL,
 898                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 899                                           "too many items to modify");
 900         assert(conf->id != REG_NONE);
 901         assert(conf->id < RTE_DIM(reg_to_field));
 902         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 903         actions[i].field = reg_to_field[conf->id];
 904         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 905         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 906         ++i;
 907         resource->actions_num = i;
 908         if (!resource->actions_num)
 909                 return rte_flow_error_set(error, EINVAL,
 910                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 911                                           "invalid modification flow item");
 912         return 0;
 913 }
 914
 915 /**
 916  * Convert SET_TAG action to DV specification.
 917  *
 918  * @param[in] dev
 919  *   Pointer to the rte_eth_dev structure.
 920  * @param[in,out] resource
 921  *   Pointer to the modify-header resource.
 922  * @param[in] conf
 923  *   Pointer to action specification.
 924  * @param[out] error
 925  *   Pointer to the error structure.
 926  *
 927  * @return
 928  *   0 on success, a negative errno value otherwise and rte_errno is set.
 929  */
 930 static int
 931 flow_dv_convert_action_set_tag
 932                         (struct rte_eth_dev *dev,
 933                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 934                          const struct rte_flow_action_set_tag *conf,
 935                          struct rte_flow_error *error)
 936 {
 937         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 938         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 939         struct rte_flow_item item = {
 940                 .spec = &data,
 941                 .mask = &mask,
 942         };
 943         struct field_modify_info reg_c_x[] = {
 944                 [1] = {0, 0, 0},
 945         };
 946         enum mlx5_modification_field reg_type;
 947         int ret;
 948
 949         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 950         if (ret < 0)
 951                 return ret;
 952         assert(ret != REG_NONE);
 953         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 954         reg_type = reg_to_field[ret];
 955         assert(reg_type > 0);
 956         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 957         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 958                                              MLX5_MODIFICATION_TYPE_SET, error);
 959 }
 960
 961 /**
 962  * Convert internal COPY_REG action to DV specification.
 963  *
 964  * @param[in] dev
 965  *   Pointer to the rte_eth_dev structure.
 966  * @param[in,out] res
 967  *   Pointer to the modify-header resource.
 968  * @param[in] action
 969  *   Pointer to action specification.
 970  * @param[out] error
 971  *   Pointer to the error structure.
 972  *
 973  * @return
 974  *   0 on success, a negative errno value otherwise and rte_errno is set.
 975  */
 976 static int
 977 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 978                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 979                                  const struct rte_flow_action *action,
 980                                  struct rte_flow_error *error)
 981 {
 982         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 983         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 984         struct rte_flow_item item = {
 985                 .spec = NULL,
 986                 .mask = &mask,
 987         };
 988         struct field_modify_info reg_src[] = {
 989                 {4, 0, reg_to_field[conf->src]},
 990                 {0, 0, 0},
 991         };
 992         struct field_modify_info reg_dst = {
 993                 .offset = 0,
 994                 .id = reg_to_field[conf->dst],
 995         };
 996         /* Adjust reg_c[0] usage according to reported mask. */
 997         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
 998                 struct mlx5_priv *priv = dev->data->dev_private;
 999                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1000
1001                 assert(reg_c0);
1002                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1003                 if (conf->dst == REG_C_0) {
1004                         /* Copy to reg_c[0], within mask only. */
1005                         reg_dst.offset = rte_bsf32(reg_c0);
1006                         /*
1007                          * Mask is ignoring the enianness, because
1008                          * there is no conversion in datapath.
1009                          */
1010 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1011                         /* Copy from destination lower bits to reg_c[0]. */
1012                         mask = reg_c0 >> reg_dst.offset;
1013 #else
1014                         /* Copy from destination upper bits to reg_c[0]. */
1015                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1016                                           rte_fls_u32(reg_c0));
1017 #endif
1018                 } else {
1019                         mask = rte_cpu_to_be_32(reg_c0);
1020 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1021                         /* Copy from reg_c[0] to destination lower bits. */
1022                         reg_dst.offset = 0;
1023 #else
1024                         /* Copy from reg_c[0] to destination upper bits. */
1025                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1026                                          (rte_fls_u32(reg_c0) -
1027                                           rte_bsf32(reg_c0));
1028 #endif
1029                 }
1030         }
1031         return flow_dv_convert_modify_action(&item,
1032                                              reg_src, &reg_dst, res,
1033                                              MLX5_MODIFICATION_TYPE_COPY,
1034                                              error);
1035 }
1036
1037 /**
1038  * Convert MARK action to DV specification. This routine is used
1039  * in extensive metadata only and requires metadata register to be
1040  * handled. In legacy mode hardware tag resource is engaged.
1041  *
1042  * @param[in] dev
1043  *   Pointer to the rte_eth_dev structure.
1044  * @param[in] conf
1045  *   Pointer to MARK action specification.
1046  * @param[in,out] resource
1047  *   Pointer to the modify-header resource.
1048  * @param[out] error
1049  *   Pointer to the error structure.
1050  *
1051  * @return
1052  *   0 on success, a negative errno value otherwise and rte_errno is set.
1053  */
1054 static int
1055 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1056                             const struct rte_flow_action_mark *conf,
1057                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1058                             struct rte_flow_error *error)
1059 {
1060         struct mlx5_priv *priv = dev->data->dev_private;
1061         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1062                                            priv->sh->dv_mark_mask);
1063         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1064         struct rte_flow_item item = {
1065                 .spec = &data,
1066                 .mask = &mask,
1067         };
1068         struct field_modify_info reg_c_x[] = {
1069                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1070                 {0, 0, 0},
1071         };
1072         enum modify_reg reg;
1073
1074         if (!mask)
1075                 return rte_flow_error_set(error, EINVAL,
1076                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1077                                           NULL, "zero mark action mask");
1078         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1079         if (reg < 0)
1080                 return reg;
1081         assert(reg > 0);
1082         reg_c_x[0].id = reg_to_field[reg];
1083         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1084                                              MLX5_MODIFICATION_TYPE_SET, error);
1085 }
1086
1087 /**
1088  * Get metadata register index for specified steering domain.
1089  *
1090  * @param[in] dev
1091  *   Pointer to the rte_eth_dev structure.
1092  * @param[in] attr
1093  *   Attributes of flow to determine steering domain.
1094  * @param[out] error
1095  *   Pointer to the error structure.
1096  *
1097  * @return
1098  *   positive index on success, a negative errno value otherwise
1099  *   and rte_errno is set.
1100  */
1101 static enum modify_reg
1102 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1103                          const struct rte_flow_attr *attr,
1104                          struct rte_flow_error *error)
1105 {
1106         enum modify_reg reg =
1107                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1108                                           MLX5_METADATA_FDB :
1109                                             attr->egress ?
1110                                             MLX5_METADATA_TX :
1111                                             MLX5_METADATA_RX, 0, error);
1112         if (reg < 0)
1113                 return rte_flow_error_set(error,
1114                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1115                                           NULL, "unavailable "
1116                                           "metadata register");
1117         return reg;
1118 }
1119
1120 /**
1121  * Convert SET_META action to DV specification.
1122  *
1123  * @param[in] dev
1124  *   Pointer to the rte_eth_dev structure.
1125  * @param[in,out] resource
1126  *   Pointer to the modify-header resource.
1127  * @param[in] attr
1128  *   Attributes of flow that includes this item.
1129  * @param[in] conf
1130  *   Pointer to action specification.
1131  * @param[out] error
1132  *   Pointer to the error structure.
1133  *
1134  * @return
1135  *   0 on success, a negative errno value otherwise and rte_errno is set.
1136  */
1137 static int
1138 flow_dv_convert_action_set_meta
1139                         (struct rte_eth_dev *dev,
1140                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1141                          const struct rte_flow_attr *attr,
1142                          const struct rte_flow_action_set_meta *conf,
1143                          struct rte_flow_error *error)
1144 {
1145         uint32_t data = conf->data;
1146         uint32_t mask = conf->mask;
1147         struct rte_flow_item item = {
1148                 .spec = &data,
1149                 .mask = &mask,
1150         };
1151         struct field_modify_info reg_c_x[] = {
1152                 [1] = {0, 0, 0},
1153         };
1154         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1155
1156         if (reg < 0)
1157                 return reg;
1158         /*
1159          * In datapath code there is no endianness
1160          * coversions for perfromance reasons, all
1161          * pattern conversions are done in rte_flow.
1162          */
1163         if (reg == REG_C_0) {
1164                 struct mlx5_priv *priv = dev->data->dev_private;
1165                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1166                 uint32_t shl_c0;
1167
1168                 assert(msk_c0);
1169 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1170                 shl_c0 = rte_bsf32(msk_c0);
1171 #else
1172                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1173 #endif
1174                 mask <<= shl_c0;
1175                 data <<= shl_c0;
1176                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1177         }
1178         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1179         /* The routine expects parameters in memory as big-endian ones. */
1180         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1181                                              MLX5_MODIFICATION_TYPE_SET, error);
1182 }
1183
1184 /**
1185  * Validate MARK item.
1186  *
1187  * @param[in] dev
1188  *   Pointer to the rte_eth_dev structure.
1189  * @param[in] item
1190  *   Item specification.
1191  * @param[in] attr
1192  *   Attributes of flow that includes this item.
1193  * @param[out] error
1194  *   Pointer to error structure.
1195  *
1196  * @return
1197  *   0 on success, a negative errno value otherwise and rte_errno is set.
1198  */
1199 static int
1200 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1201                            const struct rte_flow_item *item,
1202                            const struct rte_flow_attr *attr __rte_unused,
1203                            struct rte_flow_error *error)
1204 {
1205         struct mlx5_priv *priv = dev->data->dev_private;
1206         struct mlx5_dev_config *config = &priv->config;
1207         const struct rte_flow_item_mark *spec = item->spec;
1208         const struct rte_flow_item_mark *mask = item->mask;
1209         const struct rte_flow_item_mark nic_mask = {
1210                 .id = priv->sh->dv_mark_mask,
1211         };
1212         int ret;
1213
1214         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1215                 return rte_flow_error_set(error, ENOTSUP,
1216                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1217                                           "extended metadata feature"
1218                                           " isn't enabled");
1219         if (!mlx5_flow_ext_mreg_supported(dev))
1220                 return rte_flow_error_set(error, ENOTSUP,
1221                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1222                                           "extended metadata register"
1223                                           " isn't supported");
1224         if (!nic_mask.id)
1225                 return rte_flow_error_set(error, ENOTSUP,
1226                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1227                                           "extended metadata register"
1228                                           " isn't available");
1229         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1230         if (ret < 0)
1231                 return ret;
1232         if (!spec)
1233                 return rte_flow_error_set(error, EINVAL,
1234                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1235                                           item->spec,
1236                                           "data cannot be empty");
1237         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1238                 return rte_flow_error_set(error, EINVAL,
1239                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1240                                           &spec->id,
1241                                           "mark id exceeds the limit");
1242         if (!mask)
1243                 mask = &nic_mask;
1244         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1245                                         (const uint8_t *)&nic_mask,
1246                                         sizeof(struct rte_flow_item_mark),
1247                                         error);
1248         if (ret < 0)
1249                 return ret;
1250         return 0;
1251 }
1252
1253 /**
1254  * Validate META item.
1255  *
1256  * @param[in] dev
1257  *   Pointer to the rte_eth_dev structure.
1258  * @param[in] item
1259  *   Item specification.
1260  * @param[in] attr
1261  *   Attributes of flow that includes this item.
1262  * @param[out] error
1263  *   Pointer to error structure.
1264  *
1265  * @return
1266  *   0 on success, a negative errno value otherwise and rte_errno is set.
1267  */
1268 static int
1269 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1270                            const struct rte_flow_item *item,
1271                            const struct rte_flow_attr *attr,
1272                            struct rte_flow_error *error)
1273 {
1274         struct mlx5_priv *priv = dev->data->dev_private;
1275         struct mlx5_dev_config *config = &priv->config;
1276         const struct rte_flow_item_meta *spec = item->spec;
1277         const struct rte_flow_item_meta *mask = item->mask;
1278         struct rte_flow_item_meta nic_mask = {
1279                 .data = UINT32_MAX
1280         };
1281         enum modify_reg reg;
1282         int ret;
1283
1284         if (!spec)
1285                 return rte_flow_error_set(error, EINVAL,
1286                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1287                                           item->spec,
1288                                           "data cannot be empty");
1289         if (!spec->data)
1290                 return rte_flow_error_set(error, EINVAL,
1291                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1292                                           "data cannot be zero");
1293         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1294                 if (!mlx5_flow_ext_mreg_supported(dev))
1295                         return rte_flow_error_set(error, ENOTSUP,
1296                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1297                                           "extended metadata register"
1298                                           " isn't supported");
1299                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1300                 if (reg < 0)
1301                         return reg;
1302                 if (reg == REG_B)
1303                         return rte_flow_error_set(error, ENOTSUP,
1304                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1305                                           "match on reg_b "
1306                                           "isn't supported");
1307                 if (reg != REG_A)
1308                         nic_mask.data = priv->sh->dv_meta_mask;
1309         }
1310         if (!mask)
1311                 mask = &rte_flow_item_meta_mask;
1312         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1313                                         (const uint8_t *)&nic_mask,
1314                                         sizeof(struct rte_flow_item_meta),
1315                                         error);
1316         return ret;
1317 }
1318
1319 /**
1320  * Validate TAG item.
1321  *
1322  * @param[in] dev
1323  *   Pointer to the rte_eth_dev structure.
1324  * @param[in] item
1325  *   Item specification.
1326  * @param[in] attr
1327  *   Attributes of flow that includes this item.
1328  * @param[out] error
1329  *   Pointer to error structure.
1330  *
1331  * @return
1332  *   0 on success, a negative errno value otherwise and rte_errno is set.
1333  */
1334 static int
1335 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1336                           const struct rte_flow_item *item,
1337                           const struct rte_flow_attr *attr __rte_unused,
1338                           struct rte_flow_error *error)
1339 {
1340         const struct rte_flow_item_tag *spec = item->spec;
1341         const struct rte_flow_item_tag *mask = item->mask;
1342         const struct rte_flow_item_tag nic_mask = {
1343                 .data = RTE_BE32(UINT32_MAX),
1344                 .index = 0xff,
1345         };
1346         int ret;
1347
1348         if (!mlx5_flow_ext_mreg_supported(dev))
1349                 return rte_flow_error_set(error, ENOTSUP,
1350                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1351                                           "extensive metadata register"
1352                                           " isn't supported");
1353         if (!spec)
1354                 return rte_flow_error_set(error, EINVAL,
1355                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1356                                           item->spec,
1357                                           "data cannot be empty");
1358         if (!mask)
1359                 mask = &rte_flow_item_tag_mask;
1360         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1361                                         (const uint8_t *)&nic_mask,
1362                                         sizeof(struct rte_flow_item_tag),
1363                                         error);
1364         if (ret < 0)
1365                 return ret;
1366         if (mask->index != 0xff)
1367                 return rte_flow_error_set(error, EINVAL,
1368                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1369                                           "partial mask for tag index"
1370                                           " is not supported");
1371         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1372         if (ret < 0)
1373                 return ret;
1374         assert(ret != REG_NONE);
1375         return 0;
1376 }
1377
1378 /**
1379  * Validate vport item.
1380  *
1381  * @param[in] dev
1382  *   Pointer to the rte_eth_dev structure.
1383  * @param[in] item
1384  *   Item specification.
1385  * @param[in] attr
1386  *   Attributes of flow that includes this item.
1387  * @param[in] item_flags
1388  *   Bit-fields that holds the items detected until now.
1389  * @param[out] error
1390  *   Pointer to error structure.
1391  *
1392  * @return
1393  *   0 on success, a negative errno value otherwise and rte_errno is set.
1394  */
1395 static int
1396 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1397                               const struct rte_flow_item *item,
1398                               const struct rte_flow_attr *attr,
1399                               uint64_t item_flags,
1400                               struct rte_flow_error *error)
1401 {
1402         const struct rte_flow_item_port_id *spec = item->spec;
1403         const struct rte_flow_item_port_id *mask = item->mask;
1404         const struct rte_flow_item_port_id switch_mask = {
1405                         .id = 0xffffffff,
1406         };
1407         struct mlx5_priv *esw_priv;
1408         struct mlx5_priv *dev_priv;
1409         int ret;
1410
1411         if (!attr->transfer)
1412                 return rte_flow_error_set(error, EINVAL,
1413                                           RTE_FLOW_ERROR_TYPE_ITEM,
1414                                           NULL,
1415                                           "match on port id is valid only"
1416                                           " when transfer flag is enabled");
1417         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1418                 return rte_flow_error_set(error, ENOTSUP,
1419                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1420                                           "multiple source ports are not"
1421                                           " supported");
1422         if (!mask)
1423                 mask = &switch_mask;
1424         if (mask->id != 0xffffffff)
1425                 return rte_flow_error_set(error, ENOTSUP,
1426                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1427                                            mask,
1428                                            "no support for partial mask on"
1429                                            " \"id\" field");
1430         ret = mlx5_flow_item_acceptable
1431                                 (item, (const uint8_t *)mask,
1432                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1433                                  sizeof(struct rte_flow_item_port_id),
1434                                  error);
1435         if (ret)
1436                 return ret;
1437         if (!spec)
1438                 return 0;
1439         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1440         if (!esw_priv)
1441                 return rte_flow_error_set(error, rte_errno,
1442                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1443                                           "failed to obtain E-Switch info for"
1444                                           " port");
1445         dev_priv = mlx5_dev_to_eswitch_info(dev);
1446         if (!dev_priv)
1447                 return rte_flow_error_set(error, rte_errno,
1448                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1449                                           NULL,
1450                                           "failed to obtain E-Switch info");
1451         if (esw_priv->domain_id != dev_priv->domain_id)
1452                 return rte_flow_error_set(error, EINVAL,
1453                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1454                                           "cannot match on a port from a"
1455                                           " different E-Switch");
1456         return 0;
1457 }
1458
1459 /**
1460  * Validate the pop VLAN action.
1461  *
1462  * @param[in] dev
1463  *   Pointer to the rte_eth_dev structure.
1464  * @param[in] action_flags
1465  *   Holds the actions detected until now.
1466  * @param[in] action
1467  *   Pointer to the pop vlan action.
1468  * @param[in] item_flags
1469  *   The items found in this flow rule.
1470  * @param[in] attr
1471  *   Pointer to flow attributes.
1472  * @param[out] error
1473  *   Pointer to error structure.
1474  *
1475  * @return
1476  *   0 on success, a negative errno value otherwise and rte_errno is set.
1477  */
1478 static int
1479 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1480                                  uint64_t action_flags,
1481                                  const struct rte_flow_action *action,
1482                                  uint64_t item_flags,
1483                                  const struct rte_flow_attr *attr,
1484                                  struct rte_flow_error *error)
1485 {
1486         struct mlx5_priv *priv = dev->data->dev_private;
1487
1488         (void)action;
1489         (void)attr;
1490         if (!priv->sh->pop_vlan_action)
1491                 return rte_flow_error_set(error, ENOTSUP,
1492                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1493                                           NULL,
1494                                           "pop vlan action is not supported");
1495         /*
1496          * Check for inconsistencies:
1497          *  fail strip_vlan in a flow that matches packets without VLAN tags.
1498          *  fail strip_vlan in a flow that matches packets without explicitly a
1499          *  matching on VLAN tag ?
1500          */
1501         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
1502                 return rte_flow_error_set(error, ENOTSUP,
1503                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1504                                           NULL,
1505                                           "no support for multiple vlan pop "
1506                                           "actions");
1507         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1508                 return rte_flow_error_set(error, ENOTSUP,
1509                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1510                                           NULL,
1511                                           "cannot pop vlan without a "
1512                                           "match on (outer) vlan in the flow");
1513         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1514                 return rte_flow_error_set(error, EINVAL,
1515                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1516                                           "wrong action order, port_id should "
1517                                           "be after pop VLAN action");
1518         return 0;
1519 }
1520
1521 /**
1522  * Get VLAN default info from vlan match info.
1523  *
1524  * @param[in] dev
1525  *   Pointer to the rte_eth_dev structure.
1526  * @param[in] item
1527  *   the list of item specifications.
1528  * @param[out] vlan
1529  *   pointer VLAN info to fill to.
1530  * @param[out] error
1531  *   Pointer to error structure.
1532  *
1533  * @return
1534  *   0 on success, a negative errno value otherwise and rte_errno is set.
1535  */
1536 static void
1537 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1538                                   struct rte_vlan_hdr *vlan)
1539 {
1540         const struct rte_flow_item_vlan nic_mask = {
1541                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1542                                 MLX5DV_FLOW_VLAN_VID_MASK),
1543                 .inner_type = RTE_BE16(0xffff),
1544         };
1545
1546         if (items == NULL)
1547                 return;
1548         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1549                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1550                 ;
1551         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1552                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1553                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1554
1555                 if (!vlan_m)
1556                         vlan_m = &nic_mask;
1557                 /* Only full match values are accepted */
1558                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1559                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1560                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1561                         vlan->vlan_tci |=
1562                                 rte_be_to_cpu_16(vlan_v->tci &
1563                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1564                 }
1565                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1566                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1567                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1568                         vlan->vlan_tci |=
1569                                 rte_be_to_cpu_16(vlan_v->tci &
1570                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1571                 }
1572                 if (vlan_m->inner_type == nic_mask.inner_type)
1573                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1574                                                            vlan_m->inner_type);
1575         }
1576 }
1577
1578 /**
1579  * Validate the push VLAN action.
1580  *
1581  * @param[in] action_flags
1582  *   Holds the actions detected until now.
1583  * @param[in] action
1584  *   Pointer to the encap action.
1585  * @param[in] attr
1586  *   Pointer to flow attributes
1587  * @param[out] error
1588  *   Pointer to error structure.
1589  *
1590  * @return
1591  *   0 on success, a negative errno value otherwise and rte_errno is set.
1592  */
1593 static int
1594 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1595                                   uint64_t item_flags,
1596                                   const struct rte_flow_action *action,
1597                                   const struct rte_flow_attr *attr,
1598                                   struct rte_flow_error *error)
1599 {
1600         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1601
1602         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1603             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1604                 return rte_flow_error_set(error, EINVAL,
1605                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1606                                           "invalid vlan ethertype");
1607         if (action_flags &
1608                 (MLX5_FLOW_ACTION_OF_POP_VLAN | MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1609                 return rte_flow_error_set(error, ENOTSUP,
1610                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1611                                           "no support for multiple VLAN "
1612                                           "actions");
1613         if (!mlx5_flow_find_action
1614                         (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) &&
1615             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1616                 return rte_flow_error_set(error, ENOTSUP,
1617                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
1618                                 "push VLAN needs to match on VLAN in order to "
1619                                 "get VLAN VID information because there is "
1620                                 "no followed set VLAN VID action");
1621         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1622                 return rte_flow_error_set(error, EINVAL,
1623                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1624                                           "wrong action order, port_id should "
1625                                           "be after push VLAN");
1626         (void)attr;
1627         return 0;
1628 }
1629
1630 /**
1631  * Validate the set VLAN PCP.
1632  *
1633  * @param[in] action_flags
1634  *   Holds the actions detected until now.
1635  * @param[in] actions
1636  *   Pointer to the list of actions remaining in the flow rule.
1637  * @param[in] attr
1638  *   Pointer to flow attributes
1639  * @param[out] error
1640  *   Pointer to error structure.
1641  *
1642  * @return
1643  *   0 on success, a negative errno value otherwise and rte_errno is set.
1644  */
1645 static int
1646 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1647                                      const struct rte_flow_action actions[],
1648                                      struct rte_flow_error *error)
1649 {
1650         const struct rte_flow_action *action = actions;
1651         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1652
1653         if (conf->vlan_pcp > 7)
1654                 return rte_flow_error_set(error, EINVAL,
1655                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1656                                           "VLAN PCP value is too big");
1657         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1658                 return rte_flow_error_set(error, ENOTSUP,
1659                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1660                                           "set VLAN PCP action must follow "
1661                                           "the push VLAN action");
1662         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1663                 return rte_flow_error_set(error, ENOTSUP,
1664                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1665                                           "Multiple VLAN PCP modification are "
1666                                           "not supported");
1667         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1668                 return rte_flow_error_set(error, EINVAL,
1669                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1670                                           "wrong action order, port_id should "
1671                                           "be after set VLAN PCP");
1672         return 0;
1673 }
1674
1675 /**
1676  * Validate the set VLAN VID.
1677  *
1678  * @param[in] item_flags
1679  *   Holds the items detected in this rule.
1680  * @param[in] actions
1681  *   Pointer to the list of actions remaining in the flow rule.
1682  * @param[in] attr
1683  *   Pointer to flow attributes
1684  * @param[out] error
1685  *   Pointer to error structure.
1686  *
1687  * @return
1688  *   0 on success, a negative errno value otherwise and rte_errno is set.
1689  */
1690 static int
1691 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1692                                      uint64_t action_flags,
1693                                      const struct rte_flow_action actions[],
1694                                      struct rte_flow_error *error)
1695 {
1696         const struct rte_flow_action *action = actions;
1697         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1698
1699         if (conf->vlan_vid > RTE_BE16(0xFFE))
1700                 return rte_flow_error_set(error, EINVAL,
1701                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1702                                           "VLAN VID value is too big");
1703         /* there is an of_push_vlan action before us */
1704         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1705                 if (mlx5_flow_find_action(actions + 1,
1706                                           RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1707                         return rte_flow_error_set(error, ENOTSUP,
1708                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
1709                                         "Multiple VLAN VID modifications are "
1710                                         "not supported");
1711                 else
1712                         return 0;
1713         }
1714
1715         /*
1716          * Action is on an existing VLAN header:
1717          *    Need to verify this is a single modify CID action.
1718          *   Rule mast include a match on outer VLAN.
1719          */
1720         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1721                 return rte_flow_error_set(error, ENOTSUP,
1722                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1723                                           "Multiple VLAN VID modifications are "
1724                                           "not supported");
1725         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1726                 return rte_flow_error_set(error, EINVAL,
1727                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1728                                           "match on VLAN is required in order "
1729                                           "to set VLAN VID");
1730         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1731                 return rte_flow_error_set(error, EINVAL,
1732                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1733                                           "wrong action order, port_id should "
1734                                           "be after set VLAN VID");
1735         return 0;
1736 }
1737
1738 /*
1739  * Validate the FLAG action.
1740  *
1741  * @param[in] dev
1742  *   Pointer to the rte_eth_dev structure.
1743  * @param[in] action_flags
1744  *   Holds the actions detected until now.
1745  * @param[in] attr
1746  *   Pointer to flow attributes
1747  * @param[out] error
1748  *   Pointer to error structure.
1749  *
1750  * @return
1751  *   0 on success, a negative errno value otherwise and rte_errno is set.
1752  */
1753 static int
1754 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1755                              uint64_t action_flags,
1756                              const struct rte_flow_attr *attr,
1757                              struct rte_flow_error *error)
1758 {
1759         struct mlx5_priv *priv = dev->data->dev_private;
1760         struct mlx5_dev_config *config = &priv->config;
1761         int ret;
1762
1763         /* Fall back if no extended metadata register support. */
1764         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1765                 return mlx5_flow_validate_action_flag(action_flags, attr,
1766                                                       error);
1767         /* Extensive metadata mode requires registers. */
1768         if (!mlx5_flow_ext_mreg_supported(dev))
1769                 return rte_flow_error_set(error, ENOTSUP,
1770                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1771                                           "no metadata registers "
1772                                           "to support flag action");
1773         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1774                 return rte_flow_error_set(error, ENOTSUP,
1775                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1776                                           "extended metadata register"
1777                                           " isn't available");
1778         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1779         if (ret < 0)
1780                 return ret;
1781         assert(ret > 0);
1782         if (action_flags & MLX5_FLOW_ACTION_DROP)
1783                 return rte_flow_error_set(error, EINVAL,
1784                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1785                                           "can't drop and flag in same flow");
1786         if (action_flags & MLX5_FLOW_ACTION_MARK)
1787                 return rte_flow_error_set(error, EINVAL,
1788                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1789                                           "can't mark and flag in same flow");
1790         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1791                 return rte_flow_error_set(error, EINVAL,
1792                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1793                                           "can't have 2 flag"
1794                                           " actions in same flow");
1795         return 0;
1796 }
1797
1798 /**
1799  * Validate MARK action.
1800  *
1801  * @param[in] dev
1802  *   Pointer to the rte_eth_dev structure.
1803  * @param[in] action
1804  *   Pointer to action.
1805  * @param[in] action_flags
1806  *   Holds the actions detected until now.
1807  * @param[in] attr
1808  *   Pointer to flow attributes
1809  * @param[out] error
1810  *   Pointer to error structure.
1811  *
1812  * @return
1813  *   0 on success, a negative errno value otherwise and rte_errno is set.
1814  */
1815 static int
1816 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1817                              const struct rte_flow_action *action,
1818                              uint64_t action_flags,
1819                              const struct rte_flow_attr *attr,
1820                              struct rte_flow_error *error)
1821 {
1822         struct mlx5_priv *priv = dev->data->dev_private;
1823         struct mlx5_dev_config *config = &priv->config;
1824         const struct rte_flow_action_mark *mark = action->conf;
1825         int ret;
1826
1827         /* Fall back if no extended metadata register support. */
1828         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1829                 return mlx5_flow_validate_action_mark(action, action_flags,
1830                                                       attr, error);
1831         /* Extensive metadata mode requires registers. */
1832         if (!mlx5_flow_ext_mreg_supported(dev))
1833                 return rte_flow_error_set(error, ENOTSUP,
1834                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1835                                           "no metadata registers "
1836                                           "to support mark action");
1837         if (!priv->sh->dv_mark_mask)
1838                 return rte_flow_error_set(error, ENOTSUP,
1839                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1840                                           "extended metadata register"
1841                                           " isn't available");
1842         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1843         if (ret < 0)
1844                 return ret;
1845         assert(ret > 0);
1846         if (!mark)
1847                 return rte_flow_error_set(error, EINVAL,
1848                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1849                                           "configuration cannot be null");
1850         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1851                 return rte_flow_error_set(error, EINVAL,
1852                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1853                                           &mark->id,
1854                                           "mark id exceeds the limit");
1855         if (action_flags & MLX5_FLOW_ACTION_DROP)
1856                 return rte_flow_error_set(error, EINVAL,
1857                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1858                                           "can't drop and mark in same flow");
1859         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1860                 return rte_flow_error_set(error, EINVAL,
1861                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1862                                           "can't flag and mark in same flow");
1863         if (action_flags & MLX5_FLOW_ACTION_MARK)
1864                 return rte_flow_error_set(error, EINVAL,
1865                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1866                                           "can't have 2 mark actions in same"
1867                                           " flow");
1868         return 0;
1869 }
1870
1871 /**
1872  * Validate SET_META action.
1873  *
1874  * @param[in] dev
1875  *   Pointer to the rte_eth_dev structure.
1876  * @param[in] action
1877  *   Pointer to the encap action.
1878  * @param[in] action_flags
1879  *   Holds the actions detected until now.
1880  * @param[in] attr
1881  *   Pointer to flow attributes
1882  * @param[out] error
1883  *   Pointer to error structure.
1884  *
1885  * @return
1886  *   0 on success, a negative errno value otherwise and rte_errno is set.
1887  */
1888 static int
1889 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
1890                                  const struct rte_flow_action *action,
1891                                  uint64_t action_flags __rte_unused,
1892                                  const struct rte_flow_attr *attr,
1893                                  struct rte_flow_error *error)
1894 {
1895         const struct rte_flow_action_set_meta *conf;
1896         uint32_t nic_mask = UINT32_MAX;
1897         enum modify_reg reg;
1898
1899         if (!mlx5_flow_ext_mreg_supported(dev))
1900                 return rte_flow_error_set(error, ENOTSUP,
1901                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1902                                           "extended metadata register"
1903                                           " isn't supported");
1904         reg = flow_dv_get_metadata_reg(dev, attr, error);
1905         if (reg < 0)
1906                 return reg;
1907         if (reg != REG_A && reg != REG_B) {
1908                 struct mlx5_priv *priv = dev->data->dev_private;
1909
1910                 nic_mask = priv->sh->dv_meta_mask;
1911         }
1912         if (!(action->conf))
1913                 return rte_flow_error_set(error, EINVAL,
1914                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1915                                           "configuration cannot be null");
1916         conf = (const struct rte_flow_action_set_meta *)action->conf;
1917         if (!conf->mask)
1918                 return rte_flow_error_set(error, EINVAL,
1919                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1920                                           "zero mask doesn't have any effect");
1921         if (conf->mask & ~nic_mask)
1922                 return rte_flow_error_set(error, EINVAL,
1923                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1924                                           "meta data must be within reg C0");
1925         if (!(conf->data & conf->mask))
1926                 return rte_flow_error_set(error, EINVAL,
1927                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1928                                           "zero value has no effect");
1929         return 0;
1930 }
1931
1932 /**
1933  * Validate SET_TAG action.
1934  *
1935  * @param[in] dev
1936  *   Pointer to the rte_eth_dev structure.
1937  * @param[in] action
1938  *   Pointer to the encap action.
1939  * @param[in] action_flags
1940  *   Holds the actions detected until now.
1941  * @param[in] attr
1942  *   Pointer to flow attributes
1943  * @param[out] error
1944  *   Pointer to error structure.
1945  *
1946  * @return
1947  *   0 on success, a negative errno value otherwise and rte_errno is set.
1948  */
1949 static int
1950 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
1951                                 const struct rte_flow_action *action,
1952                                 uint64_t action_flags,
1953                                 const struct rte_flow_attr *attr,
1954                                 struct rte_flow_error *error)
1955 {
1956         const struct rte_flow_action_set_tag *conf;
1957         const uint64_t terminal_action_flags =
1958                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
1959                 MLX5_FLOW_ACTION_RSS;
1960         int ret;
1961
1962         if (!mlx5_flow_ext_mreg_supported(dev))
1963                 return rte_flow_error_set(error, ENOTSUP,
1964                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1965                                           "extensive metadata register"
1966                                           " isn't supported");
1967         if (!(action->conf))
1968                 return rte_flow_error_set(error, EINVAL,
1969                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1970                                           "configuration cannot be null");
1971         conf = (const struct rte_flow_action_set_tag *)action->conf;
1972         if (!conf->mask)
1973                 return rte_flow_error_set(error, EINVAL,
1974                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1975                                           "zero mask doesn't have any effect");
1976         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1977         if (ret < 0)
1978                 return ret;
1979         if (!attr->transfer && attr->ingress &&
1980             (action_flags & terminal_action_flags))
1981                 return rte_flow_error_set(error, EINVAL,
1982                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1983                                           "set_tag has no effect"
1984                                           " with terminal actions");
1985         return 0;
1986 }
1987
1988 /**
1989  * Validate count action.
1990  *
1991  * @param[in] dev
1992  *   device otr.
1993  * @param[out] error
1994  *   Pointer to error structure.
1995  *
1996  * @return
1997  *   0 on success, a negative errno value otherwise and rte_errno is set.
1998  */
1999 static int
2000 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2001                               struct rte_flow_error *error)
2002 {
2003         struct mlx5_priv *priv = dev->data->dev_private;
2004
2005         if (!priv->config.devx)
2006                 goto notsup_err;
2007 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2008         return 0;
2009 #endif
2010 notsup_err:
2011         return rte_flow_error_set
2012                       (error, ENOTSUP,
2013                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2014                        NULL,
2015                        "count action not supported");
2016 }
2017
2018 /**
2019  * Validate the L2 encap action.
2020  *
2021  * @param[in] action_flags
2022  *   Holds the actions detected until now.
2023  * @param[in] action
2024  *   Pointer to the encap action.
2025  * @param[in] attr
2026  *   Pointer to flow attributes
2027  * @param[out] error
2028  *   Pointer to error structure.
2029  *
2030  * @return
2031  *   0 on success, a negative errno value otherwise and rte_errno is set.
2032  */
2033 static int
2034 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2035                                  const struct rte_flow_action *action,
2036                                  const struct rte_flow_attr *attr,
2037                                  struct rte_flow_error *error)
2038 {
2039         if (!(action->conf))
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2042                                           "configuration cannot be null");
2043         if (action_flags & MLX5_FLOW_ACTION_DROP)
2044                 return rte_flow_error_set(error, EINVAL,
2045                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2046                                           "can't drop and encap in same flow");
2047         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2048                 return rte_flow_error_set(error, EINVAL,
2049                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2050                                           "can only have a single encap or"
2051                                           " decap action in a flow");
2052         if (!attr->transfer && attr->ingress)
2053                 return rte_flow_error_set(error, ENOTSUP,
2054                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2055                                           NULL,
2056                                           "encap action not supported for "
2057                                           "ingress");
2058         return 0;
2059 }
2060
2061 /**
2062  * Validate the L2 decap action.
2063  *
2064  * @param[in] action_flags
2065  *   Holds the actions detected until now.
2066  * @param[in] attr
2067  *   Pointer to flow attributes
2068  * @param[out] error
2069  *   Pointer to error structure.
2070  *
2071  * @return
2072  *   0 on success, a negative errno value otherwise and rte_errno is set.
2073  */
2074 static int
2075 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2076                                  const struct rte_flow_attr *attr,
2077                                  struct rte_flow_error *error)
2078 {
2079         if (action_flags & MLX5_FLOW_ACTION_DROP)
2080                 return rte_flow_error_set(error, EINVAL,
2081                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2082                                           "can't drop and decap in same flow");
2083         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2084                 return rte_flow_error_set(error, EINVAL,
2085                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2086                                           "can only have a single encap or"
2087                                           " decap action in a flow");
2088         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2089                 return rte_flow_error_set(error, EINVAL,
2090                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2091                                           "can't have decap action after"
2092                                           " modify action");
2093         if (attr->egress)
2094                 return rte_flow_error_set(error, ENOTSUP,
2095                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2096                                           NULL,
2097                                           "decap action not supported for "
2098                                           "egress");
2099         return 0;
2100 }
2101
2102 /**
2103  * Validate the raw encap action.
2104  *
2105  * @param[in] action_flags
2106  *   Holds the actions detected until now.
2107  * @param[in] action
2108  *   Pointer to the encap action.
2109  * @param[in] attr
2110  *   Pointer to flow attributes
2111  * @param[out] error
2112  *   Pointer to error structure.
2113  *
2114  * @return
2115  *   0 on success, a negative errno value otherwise and rte_errno is set.
2116  */
2117 static int
2118 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2119                                   const struct rte_flow_action *action,
2120                                   const struct rte_flow_attr *attr,
2121                                   struct rte_flow_error *error)
2122 {
2123         const struct rte_flow_action_raw_encap *raw_encap =
2124                 (const struct rte_flow_action_raw_encap *)action->conf;
2125         if (!(action->conf))
2126                 return rte_flow_error_set(error, EINVAL,
2127                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2128                                           "configuration cannot be null");
2129         if (action_flags & MLX5_FLOW_ACTION_DROP)
2130                 return rte_flow_error_set(error, EINVAL,
2131                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2132                                           "can't drop and encap in same flow");
2133         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2134                 return rte_flow_error_set(error, EINVAL,
2135                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2136                                           "can only have a single encap"
2137                                           " action in a flow");
2138         /* encap without preceding decap is not supported for ingress */
2139         if (!attr->transfer &&  attr->ingress &&
2140             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2141                 return rte_flow_error_set(error, ENOTSUP,
2142                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2143                                           NULL,
2144                                           "encap action not supported for "
2145                                           "ingress");
2146         if (!raw_encap->size || !raw_encap->data)
2147                 return rte_flow_error_set(error, EINVAL,
2148                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2149                                           "raw encap data cannot be empty");
2150         return 0;
2151 }
2152
2153 /**
2154  * Validate the raw decap action.
2155  *
2156  * @param[in] action_flags
2157  *   Holds the actions detected until now.
2158  * @param[in] action
2159  *   Pointer to the encap action.
2160  * @param[in] attr
2161  *   Pointer to flow attributes
2162  * @param[out] error
2163  *   Pointer to error structure.
2164  *
2165  * @return
2166  *   0 on success, a negative errno value otherwise and rte_errno is set.
2167  */
2168 static int
2169 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2170                                   const struct rte_flow_action *action,
2171                                   const struct rte_flow_attr *attr,
2172                                   struct rte_flow_error *error)
2173 {
2174         if (action_flags & MLX5_FLOW_ACTION_DROP)
2175                 return rte_flow_error_set(error, EINVAL,
2176                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2177                                           "can't drop and decap in same flow");
2178         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2179                 return rte_flow_error_set(error, EINVAL,
2180                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2181                                           "can't have encap action before"
2182                                           " decap action");
2183         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2184                 return rte_flow_error_set(error, EINVAL,
2185                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2186                                           "can only have a single decap"
2187                                           " action in a flow");
2188         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2189                 return rte_flow_error_set(error, EINVAL,
2190                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2191                                           "can't have decap action after"
2192                                           " modify action");
2193         /* decap action is valid on egress only if it is followed by encap */
2194         if (attr->egress) {
2195                 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
2196                        action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
2197                        action++) {
2198                 }
2199                 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
2200                         return rte_flow_error_set
2201                                         (error, ENOTSUP,
2202                                          RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2203                                          NULL, "decap action not supported"
2204                                          " for egress");
2205         }
2206         return 0;
2207 }
2208
2209 /**
2210  * Find existing encap/decap resource or create and register a new one.
2211  *
2212  * @param[in, out] dev
2213  *   Pointer to rte_eth_dev structure.
2214  * @param[in, out] resource
2215  *   Pointer to encap/decap resource.
2216  * @parm[in, out] dev_flow
2217  *   Pointer to the dev_flow.
2218  * @param[out] error
2219  *   pointer to error structure.
2220  *
2221  * @return
2222  *   0 on success otherwise -errno and errno is set.
2223  */
2224 static int
2225 flow_dv_encap_decap_resource_register
2226                         (struct rte_eth_dev *dev,
2227                          struct mlx5_flow_dv_encap_decap_resource *resource,
2228                          struct mlx5_flow *dev_flow,
2229                          struct rte_flow_error *error)
2230 {
2231         struct mlx5_priv *priv = dev->data->dev_private;
2232         struct mlx5_ibv_shared *sh = priv->sh;
2233         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2234         struct mlx5dv_dr_domain *domain;
2235
2236         resource->flags = dev_flow->group ? 0 : 1;
2237         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2238                 domain = sh->fdb_domain;
2239         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2240                 domain = sh->rx_domain;
2241         else
2242                 domain = sh->tx_domain;
2243
2244         /* Lookup a matching resource from cache. */
2245         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2246                 if (resource->reformat_type == cache_resource->reformat_type &&
2247                     resource->ft_type == cache_resource->ft_type &&
2248                     resource->flags == cache_resource->flags &&
2249                     resource->size == cache_resource->size &&
2250                     !memcmp((const void *)resource->buf,
2251                             (const void *)cache_resource->buf,
2252                             resource->size)) {
2253                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2254                                 (void *)cache_resource,
2255                                 rte_atomic32_read(&cache_resource->refcnt));
2256                         rte_atomic32_inc(&cache_resource->refcnt);
2257                         dev_flow->dv.encap_decap = cache_resource;
2258                         return 0;
2259                 }
2260         }
2261         /* Register new encap/decap resource. */
2262         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2263         if (!cache_resource)
2264                 return rte_flow_error_set(error, ENOMEM,
2265                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2266                                           "cannot allocate resource memory");
2267         *cache_resource = *resource;
2268         cache_resource->verbs_action =
2269                 mlx5_glue->dv_create_flow_action_packet_reformat
2270                         (sh->ctx, cache_resource->reformat_type,
2271                          cache_resource->ft_type, domain, cache_resource->flags,
2272                          cache_resource->size,
2273                          (cache_resource->size ? cache_resource->buf : NULL));
2274         if (!cache_resource->verbs_action) {
2275                 rte_free(cache_resource);
2276                 return rte_flow_error_set(error, ENOMEM,
2277                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2278                                           NULL, "cannot create action");
2279         }
2280         rte_atomic32_init(&cache_resource->refcnt);
2281         rte_atomic32_inc(&cache_resource->refcnt);
2282         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2283         dev_flow->dv.encap_decap = cache_resource;
2284         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2285                 (void *)cache_resource,
2286                 rte_atomic32_read(&cache_resource->refcnt));
2287         return 0;
2288 }
2289
2290 /**
2291  * Find existing table jump resource or create and register a new one.
2292  *
2293  * @param[in, out] dev
2294  *   Pointer to rte_eth_dev structure.
2295  * @param[in, out] tbl
2296  *   Pointer to flow table resource.
2297  * @parm[in, out] dev_flow
2298  *   Pointer to the dev_flow.
2299  * @param[out] error
2300  *   pointer to error structure.
2301  *
2302  * @return
2303  *   0 on success otherwise -errno and errno is set.
2304  */
2305 static int
2306 flow_dv_jump_tbl_resource_register
2307                         (struct rte_eth_dev *dev __rte_unused,
2308                          struct mlx5_flow_tbl_resource *tbl,
2309                          struct mlx5_flow *dev_flow,
2310                          struct rte_flow_error *error)
2311 {
2312         struct mlx5_flow_tbl_data_entry *tbl_data =
2313                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2314         int cnt;
2315
2316         assert(tbl);
2317         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2318         if (!cnt) {
2319                 tbl_data->jump.action =
2320                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2321                         (tbl->obj);
2322                 if (!tbl_data->jump.action)
2323                         return rte_flow_error_set(error, ENOMEM,
2324                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2325                                         NULL, "cannot create jump action");
2326                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2327                         (void *)&tbl_data->jump, cnt);
2328         } else {
2329                 assert(tbl_data->jump.action);
2330                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2331                         (void *)&tbl_data->jump, cnt);
2332         }
2333         rte_atomic32_inc(&tbl_data->jump.refcnt);
2334         dev_flow->dv.jump = &tbl_data->jump;
2335         return 0;
2336 }
2337
2338 /**
2339  * Find existing table port ID resource or create and register a new one.
2340  *
2341  * @param[in, out] dev
2342  *   Pointer to rte_eth_dev structure.
2343  * @param[in, out] resource
2344  *   Pointer to port ID action resource.
2345  * @parm[in, out] dev_flow
2346  *   Pointer to the dev_flow.
2347  * @param[out] error
2348  *   pointer to error structure.
2349  *
2350  * @return
2351  *   0 on success otherwise -errno and errno is set.
2352  */
2353 static int
2354 flow_dv_port_id_action_resource_register
2355                         (struct rte_eth_dev *dev,
2356                          struct mlx5_flow_dv_port_id_action_resource *resource,
2357                          struct mlx5_flow *dev_flow,
2358                          struct rte_flow_error *error)
2359 {
2360         struct mlx5_priv *priv = dev->data->dev_private;
2361         struct mlx5_ibv_shared *sh = priv->sh;
2362         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2363
2364         /* Lookup a matching resource from cache. */
2365         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2366                 if (resource->port_id == cache_resource->port_id) {
2367                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2368                                 "refcnt %d++",
2369                                 (void *)cache_resource,
2370                                 rte_atomic32_read(&cache_resource->refcnt));
2371                         rte_atomic32_inc(&cache_resource->refcnt);
2372                         dev_flow->dv.port_id_action = cache_resource;
2373                         return 0;
2374                 }
2375         }
2376         /* Register new port id action resource. */
2377         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2378         if (!cache_resource)
2379                 return rte_flow_error_set(error, ENOMEM,
2380                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2381                                           "cannot allocate resource memory");
2382         *cache_resource = *resource;
2383         cache_resource->action =
2384                 mlx5_glue->dr_create_flow_action_dest_vport
2385                         (priv->sh->fdb_domain, resource->port_id);
2386         if (!cache_resource->action) {
2387                 rte_free(cache_resource);
2388                 return rte_flow_error_set(error, ENOMEM,
2389                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2390                                           NULL, "cannot create action");
2391         }
2392         rte_atomic32_init(&cache_resource->refcnt);
2393         rte_atomic32_inc(&cache_resource->refcnt);
2394         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2395         dev_flow->dv.port_id_action = cache_resource;
2396         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2397                 (void *)cache_resource,
2398                 rte_atomic32_read(&cache_resource->refcnt));
2399         return 0;
2400 }
2401
2402 /**
2403  * Find existing push vlan resource or create and register a new one.
2404  *
2405  * @param [in, out] dev
2406  *   Pointer to rte_eth_dev structure.
2407  * @param[in, out] resource
2408  *   Pointer to port ID action resource.
2409  * @parm[in, out] dev_flow
2410  *   Pointer to the dev_flow.
2411  * @param[out] error
2412  *   pointer to error structure.
2413  *
2414  * @return
2415  *   0 on success otherwise -errno and errno is set.
2416  */
2417 static int
2418 flow_dv_push_vlan_action_resource_register
2419                        (struct rte_eth_dev *dev,
2420                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2421                         struct mlx5_flow *dev_flow,
2422                         struct rte_flow_error *error)
2423 {
2424         struct mlx5_priv *priv = dev->data->dev_private;
2425         struct mlx5_ibv_shared *sh = priv->sh;
2426         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2427         struct mlx5dv_dr_domain *domain;
2428
2429         /* Lookup a matching resource from cache. */
2430         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2431                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2432                     resource->ft_type == cache_resource->ft_type) {
2433                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2434                                 "refcnt %d++",
2435                                 (void *)cache_resource,
2436                                 rte_atomic32_read(&cache_resource->refcnt));
2437                         rte_atomic32_inc(&cache_resource->refcnt);
2438                         dev_flow->dv.push_vlan_res = cache_resource;
2439                         return 0;
2440                 }
2441         }
2442         /* Register new push_vlan action resource. */
2443         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2444         if (!cache_resource)
2445                 return rte_flow_error_set(error, ENOMEM,
2446                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2447                                           "cannot allocate resource memory");
2448         *cache_resource = *resource;
2449         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2450                 domain = sh->fdb_domain;
2451         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2452                 domain = sh->rx_domain;
2453         else
2454                 domain = sh->tx_domain;
2455         cache_resource->action =
2456                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2457                                                            resource->vlan_tag);
2458         if (!cache_resource->action) {
2459                 rte_free(cache_resource);
2460                 return rte_flow_error_set(error, ENOMEM,
2461                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2462                                           NULL, "cannot create action");
2463         }
2464         rte_atomic32_init(&cache_resource->refcnt);
2465         rte_atomic32_inc(&cache_resource->refcnt);
2466         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2467         dev_flow->dv.push_vlan_res = cache_resource;
2468         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2469                 (void *)cache_resource,
2470                 rte_atomic32_read(&cache_resource->refcnt));
2471         return 0;
2472 }
2473 /**
2474  * Get the size of specific rte_flow_item_type
2475  *
2476  * @param[in] item_type
2477  *   Tested rte_flow_item_type.
2478  *
2479  * @return
2480  *   sizeof struct item_type, 0 if void or irrelevant.
2481  */
2482 static size_t
2483 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2484 {
2485         size_t retval;
2486
2487         switch (item_type) {
2488         case RTE_FLOW_ITEM_TYPE_ETH:
2489                 retval = sizeof(struct rte_flow_item_eth);
2490                 break;
2491         case RTE_FLOW_ITEM_TYPE_VLAN:
2492                 retval = sizeof(struct rte_flow_item_vlan);
2493                 break;
2494         case RTE_FLOW_ITEM_TYPE_IPV4:
2495                 retval = sizeof(struct rte_flow_item_ipv4);
2496                 break;
2497         case RTE_FLOW_ITEM_TYPE_IPV6:
2498                 retval = sizeof(struct rte_flow_item_ipv6);
2499                 break;
2500         case RTE_FLOW_ITEM_TYPE_UDP:
2501                 retval = sizeof(struct rte_flow_item_udp);
2502                 break;
2503         case RTE_FLOW_ITEM_TYPE_TCP:
2504                 retval = sizeof(struct rte_flow_item_tcp);
2505                 break;
2506         case RTE_FLOW_ITEM_TYPE_VXLAN:
2507                 retval = sizeof(struct rte_flow_item_vxlan);
2508                 break;
2509         case RTE_FLOW_ITEM_TYPE_GRE:
2510                 retval = sizeof(struct rte_flow_item_gre);
2511                 break;
2512         case RTE_FLOW_ITEM_TYPE_NVGRE:
2513                 retval = sizeof(struct rte_flow_item_nvgre);
2514                 break;
2515         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2516                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2517                 break;
2518         case RTE_FLOW_ITEM_TYPE_MPLS:
2519                 retval = sizeof(struct rte_flow_item_mpls);
2520                 break;
2521         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2522         default:
2523                 retval = 0;
2524                 break;
2525         }
2526         return retval;
2527 }
2528
2529 #define MLX5_ENCAP_IPV4_VERSION         0x40
2530 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2531 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2532 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2533 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2534 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2535 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2536
2537 /**
2538  * Convert the encap action data from list of rte_flow_item to raw buffer
2539  *
2540  * @param[in] items
2541  *   Pointer to rte_flow_item objects list.
2542  * @param[out] buf
2543  *   Pointer to the output buffer.
2544  * @param[out] size
2545  *   Pointer to the output buffer size.
2546  * @param[out] error
2547  *   Pointer to the error structure.
2548  *
2549  * @return
2550  *   0 on success, a negative errno value otherwise and rte_errno is set.
2551  */
2552 static int
2553 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2554                            size_t *size, struct rte_flow_error *error)
2555 {
2556         struct rte_ether_hdr *eth = NULL;
2557         struct rte_vlan_hdr *vlan = NULL;
2558         struct rte_ipv4_hdr *ipv4 = NULL;
2559         struct rte_ipv6_hdr *ipv6 = NULL;
2560         struct rte_udp_hdr *udp = NULL;
2561         struct rte_vxlan_hdr *vxlan = NULL;
2562         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2563         struct rte_gre_hdr *gre = NULL;
2564         size_t len;
2565         size_t temp_size = 0;
2566
2567         if (!items)
2568                 return rte_flow_error_set(error, EINVAL,
2569                                           RTE_FLOW_ERROR_TYPE_ACTION,
2570                                           NULL, "invalid empty data");
2571         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2572                 len = flow_dv_get_item_len(items->type);
2573                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2574                         return rte_flow_error_set(error, EINVAL,
2575                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2576                                                   (void *)items->type,
2577                                                   "items total size is too big"
2578                                                   " for encap action");
2579                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2580                 switch (items->type) {
2581                 case RTE_FLOW_ITEM_TYPE_ETH:
2582                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2583                         break;
2584                 case RTE_FLOW_ITEM_TYPE_VLAN:
2585                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2586                         if (!eth)
2587                                 return rte_flow_error_set(error, EINVAL,
2588                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2589                                                 (void *)items->type,
2590                                                 "eth header not found");
2591                         if (!eth->ether_type)
2592                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2593                         break;
2594                 case RTE_FLOW_ITEM_TYPE_IPV4:
2595                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2596                         if (!vlan && !eth)
2597                                 return rte_flow_error_set(error, EINVAL,
2598                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2599                                                 (void *)items->type,
2600                                                 "neither eth nor vlan"
2601                                                 " header found");
2602                         if (vlan && !vlan->eth_proto)
2603                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2604                         else if (eth && !eth->ether_type)
2605                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2606                         if (!ipv4->version_ihl)
2607                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2608                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2609                         if (!ipv4->time_to_live)
2610                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2611                         break;
2612                 case RTE_FLOW_ITEM_TYPE_IPV6:
2613                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2614                         if (!vlan && !eth)
2615                                 return rte_flow_error_set(error, EINVAL,
2616                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2617                                                 (void *)items->type,
2618                                                 "neither eth nor vlan"
2619                                                 " header found");
2620                         if (vlan && !vlan->eth_proto)
2621                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2622                         else if (eth && !eth->ether_type)
2623                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2624                         if (!ipv6->vtc_flow)
2625                                 ipv6->vtc_flow =
2626                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2627                         if (!ipv6->hop_limits)
2628                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2629                         break;
2630                 case RTE_FLOW_ITEM_TYPE_UDP:
2631                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2632                         if (!ipv4 && !ipv6)
2633                                 return rte_flow_error_set(error, EINVAL,
2634                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2635                                                 (void *)items->type,
2636                                                 "ip header not found");
2637                         if (ipv4 && !ipv4->next_proto_id)
2638                                 ipv4->next_proto_id = IPPROTO_UDP;
2639                         else if (ipv6 && !ipv6->proto)
2640                                 ipv6->proto = IPPROTO_UDP;
2641                         break;
2642                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2643                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2644                         if (!udp)
2645                                 return rte_flow_error_set(error, EINVAL,
2646                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2647                                                 (void *)items->type,
2648                                                 "udp header not found");
2649                         if (!udp->dst_port)
2650                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2651                         if (!vxlan->vx_flags)
2652                                 vxlan->vx_flags =
2653                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2654                         break;
2655                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2656                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2657                         if (!udp)
2658                                 return rte_flow_error_set(error, EINVAL,
2659                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2660                                                 (void *)items->type,
2661                                                 "udp header not found");
2662                         if (!vxlan_gpe->proto)
2663                                 return rte_flow_error_set(error, EINVAL,
2664                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2665                                                 (void *)items->type,
2666                                                 "next protocol not found");
2667                         if (!udp->dst_port)
2668                                 udp->dst_port =
2669                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2670                         if (!vxlan_gpe->vx_flags)
2671                                 vxlan_gpe->vx_flags =
2672                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2673                         break;
2674                 case RTE_FLOW_ITEM_TYPE_GRE:
2675                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2676                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2677                         if (!gre->proto)
2678                                 return rte_flow_error_set(error, EINVAL,
2679                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2680                                                 (void *)items->type,
2681                                                 "next protocol not found");
2682                         if (!ipv4 && !ipv6)
2683                                 return rte_flow_error_set(error, EINVAL,
2684                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2685                                                 (void *)items->type,
2686                                                 "ip header not found");
2687                         if (ipv4 && !ipv4->next_proto_id)
2688                                 ipv4->next_proto_id = IPPROTO_GRE;
2689                         else if (ipv6 && !ipv6->proto)
2690                                 ipv6->proto = IPPROTO_GRE;
2691                         break;
2692                 case RTE_FLOW_ITEM_TYPE_VOID:
2693                         break;
2694                 default:
2695                         return rte_flow_error_set(error, EINVAL,
2696                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2697                                                   (void *)items->type,
2698                                                   "unsupported item type");
2699                         break;
2700                 }
2701                 temp_size += len;
2702         }
2703         *size = temp_size;
2704         return 0;
2705 }
2706
2707 static int
2708 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2709 {
2710         struct rte_ether_hdr *eth = NULL;
2711         struct rte_vlan_hdr *vlan = NULL;
2712         struct rte_ipv6_hdr *ipv6 = NULL;
2713         struct rte_udp_hdr *udp = NULL;
2714         char *next_hdr;
2715         uint16_t proto;
2716
2717         eth = (struct rte_ether_hdr *)data;
2718         next_hdr = (char *)(eth + 1);
2719         proto = RTE_BE16(eth->ether_type);
2720
2721         /* VLAN skipping */
2722         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2723                 vlan = (struct rte_vlan_hdr *)next_hdr;
2724                 proto = RTE_BE16(vlan->eth_proto);
2725                 next_hdr += sizeof(struct rte_vlan_hdr);
2726         }
2727
2728         /* HW calculates IPv4 csum. no need to proceed */
2729         if (proto == RTE_ETHER_TYPE_IPV4)
2730                 return 0;
2731
2732         /* non IPv4/IPv6 header. not supported */
2733         if (proto != RTE_ETHER_TYPE_IPV6) {
2734                 return rte_flow_error_set(error, ENOTSUP,
2735                                           RTE_FLOW_ERROR_TYPE_ACTION,
2736                                           NULL, "Cannot offload non IPv4/IPv6");
2737         }
2738
2739         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2740
2741         /* ignore non UDP */
2742         if (ipv6->proto != IPPROTO_UDP)
2743                 return 0;
2744
2745         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2746         udp->dgram_cksum = 0;
2747
2748         return 0;
2749 }
2750
2751 /**
2752  * Convert L2 encap action to DV specification.
2753  *
2754  * @param[in] dev
2755  *   Pointer to rte_eth_dev structure.
2756  * @param[in] action
2757  *   Pointer to action structure.
2758  * @param[in, out] dev_flow
2759  *   Pointer to the mlx5_flow.
2760  * @param[in] transfer
2761  *   Mark if the flow is E-Switch flow.
2762  * @param[out] error
2763  *   Pointer to the error structure.
2764  *
2765  * @return
2766  *   0 on success, a negative errno value otherwise and rte_errno is set.
2767  */
2768 static int
2769 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2770                                const struct rte_flow_action *action,
2771                                struct mlx5_flow *dev_flow,
2772                                uint8_t transfer,
2773                                struct rte_flow_error *error)
2774 {
2775         const struct rte_flow_item *encap_data;
2776         const struct rte_flow_action_raw_encap *raw_encap_data;
2777         struct mlx5_flow_dv_encap_decap_resource res = {
2778                 .reformat_type =
2779                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2780                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2781                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2782         };
2783
2784         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2785                 raw_encap_data =
2786                         (const struct rte_flow_action_raw_encap *)action->conf;
2787                 res.size = raw_encap_data->size;
2788                 memcpy(res.buf, raw_encap_data->data, res.size);
2789                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2790                         return -rte_errno;
2791         } else {
2792                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2793                         encap_data =
2794                                 ((const struct rte_flow_action_vxlan_encap *)
2795                                                 action->conf)->definition;
2796                 else
2797                         encap_data =
2798                                 ((const struct rte_flow_action_nvgre_encap *)
2799                                                 action->conf)->definition;
2800                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2801                                                &res.size, error))
2802                         return -rte_errno;
2803         }
2804         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2805                 return rte_flow_error_set(error, EINVAL,
2806                                           RTE_FLOW_ERROR_TYPE_ACTION,
2807                                           NULL, "can't create L2 encap action");
2808         return 0;
2809 }
2810
2811 /**
2812  * Convert L2 decap action to DV specification.
2813  *
2814  * @param[in] dev
2815  *   Pointer to rte_eth_dev structure.
2816  * @param[in, out] dev_flow
2817  *   Pointer to the mlx5_flow.
2818  * @param[in] transfer
2819  *   Mark if the flow is E-Switch flow.
2820  * @param[out] error
2821  *   Pointer to the error structure.
2822  *
2823  * @return
2824  *   0 on success, a negative errno value otherwise and rte_errno is set.
2825  */
2826 static int
2827 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2828                                struct mlx5_flow *dev_flow,
2829                                uint8_t transfer,
2830                                struct rte_flow_error *error)
2831 {
2832         struct mlx5_flow_dv_encap_decap_resource res = {
2833                 .size = 0,
2834                 .reformat_type =
2835                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2836                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2837                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2838         };
2839
2840         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2841                 return rte_flow_error_set(error, EINVAL,
2842                                           RTE_FLOW_ERROR_TYPE_ACTION,
2843                                           NULL, "can't create L2 decap action");
2844         return 0;
2845 }
2846
2847 /**
2848  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2849  *
2850  * @param[in] dev
2851  *   Pointer to rte_eth_dev structure.
2852  * @param[in] action
2853  *   Pointer to action structure.
2854  * @param[in, out] dev_flow
2855  *   Pointer to the mlx5_flow.
2856  * @param[in] attr
2857  *   Pointer to the flow attributes.
2858  * @param[out] error
2859  *   Pointer to the error structure.
2860  *
2861  * @return
2862  *   0 on success, a negative errno value otherwise and rte_errno is set.
2863  */
2864 static int
2865 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2866                                 const struct rte_flow_action *action,
2867                                 struct mlx5_flow *dev_flow,
2868                                 const struct rte_flow_attr *attr,
2869                                 struct rte_flow_error *error)
2870 {
2871         const struct rte_flow_action_raw_encap *encap_data;
2872         struct mlx5_flow_dv_encap_decap_resource res;
2873
2874         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2875         res.size = encap_data->size;
2876         memcpy(res.buf, encap_data->data, res.size);
2877         res.reformat_type = attr->egress ?
2878                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL :
2879                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
2880         if (attr->transfer)
2881                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2882         else
2883                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2884                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2885         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2886                 return rte_flow_error_set(error, EINVAL,
2887                                           RTE_FLOW_ERROR_TYPE_ACTION,
2888                                           NULL, "can't create encap action");
2889         return 0;
2890 }
2891
2892 /**
2893  * Create action push VLAN.
2894  *
2895  * @param[in] dev
2896  *   Pointer to rte_eth_dev structure.
2897  * @param[in] vlan_tag
2898  *   the vlan tag to push to the Ethernet header.
2899  * @param[in, out] dev_flow
2900  *   Pointer to the mlx5_flow.
2901  * @param[in] attr
2902  *   Pointer to the flow attributes.
2903  * @param[out] error
2904  *   Pointer to the error structure.
2905  *
2906  * @return
2907  *   0 on success, a negative errno value otherwise and rte_errno is set.
2908  */
2909 static int
2910 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
2911                                 const struct rte_flow_attr *attr,
2912                                 const struct rte_vlan_hdr *vlan,
2913                                 struct mlx5_flow *dev_flow,
2914                                 struct rte_flow_error *error)
2915 {
2916         struct mlx5_flow_dv_push_vlan_action_resource res;
2917
2918         res.vlan_tag =
2919                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
2920                                  vlan->vlan_tci);
2921         if (attr->transfer)
2922                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2923         else
2924                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2925                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2926         return flow_dv_push_vlan_action_resource_register
2927                                             (dev, &res, dev_flow, error);
2928 }
2929
2930 /**
2931  * Validate the modify-header actions.
2932  *
2933  * @param[in] action_flags
2934  *   Holds the actions detected until now.
2935  * @param[in] action
2936  *   Pointer to the modify action.
2937  * @param[out] error
2938  *   Pointer to error structure.
2939  *
2940  * @return
2941  *   0 on success, a negative errno value otherwise and rte_errno is set.
2942  */
2943 static int
2944 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
2945                                    const struct rte_flow_action *action,
2946                                    struct rte_flow_error *error)
2947 {
2948         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
2949                 return rte_flow_error_set(error, EINVAL,
2950                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2951                                           NULL, "action configuration not set");
2952         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2953                 return rte_flow_error_set(error, EINVAL,
2954                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2955                                           "can't have encap action before"
2956                                           " modify action");
2957         return 0;
2958 }
2959
2960 /**
2961  * Validate the modify-header MAC address actions.
2962  *
2963  * @param[in] action_flags
2964  *   Holds the actions detected until now.
2965  * @param[in] action
2966  *   Pointer to the modify action.
2967  * @param[in] item_flags
2968  *   Holds the items detected.
2969  * @param[out] error
2970  *   Pointer to error structure.
2971  *
2972  * @return
2973  *   0 on success, a negative errno value otherwise and rte_errno is set.
2974  */
2975 static int
2976 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
2977                                    const struct rte_flow_action *action,
2978                                    const uint64_t item_flags,
2979                                    struct rte_flow_error *error)
2980 {
2981         int ret = 0;
2982
2983         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2984         if (!ret) {
2985                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
2986                         return rte_flow_error_set(error, EINVAL,
2987                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2988                                                   NULL,
2989                                                   "no L2 item in pattern");
2990         }
2991         return ret;
2992 }
2993
2994 /**
2995  * Validate the modify-header IPv4 address actions.
2996  *
2997  * @param[in] action_flags
2998  *   Holds the actions detected until now.
2999  * @param[in] action
3000  *   Pointer to the modify action.
3001  * @param[in] item_flags
3002  *   Holds the items detected.
3003  * @param[out] error
3004  *   Pointer to error structure.
3005  *
3006  * @return
3007  *   0 on success, a negative errno value otherwise and rte_errno is set.
3008  */
3009 static int
3010 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3011                                     const struct rte_flow_action *action,
3012                                     const uint64_t item_flags,
3013                                     struct rte_flow_error *error)
3014 {
3015         int ret = 0;
3016
3017         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3018         if (!ret) {
3019                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3020                         return rte_flow_error_set(error, EINVAL,
3021                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3022                                                   NULL,
3023                                                   "no ipv4 item in pattern");
3024         }
3025         return ret;
3026 }
3027
3028 /**
3029  * Validate the modify-header IPv6 address actions.
3030  *
3031  * @param[in] action_flags
3032  *   Holds the actions detected until now.
3033  * @param[in] action
3034  *   Pointer to the modify action.
3035  * @param[in] item_flags
3036  *   Holds the items detected.
3037  * @param[out] error
3038  *   Pointer to error structure.
3039  *
3040  * @return
3041  *   0 on success, a negative errno value otherwise and rte_errno is set.
3042  */
3043 static int
3044 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3045                                     const struct rte_flow_action *action,
3046                                     const uint64_t item_flags,
3047                                     struct rte_flow_error *error)
3048 {
3049         int ret = 0;
3050
3051         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3052         if (!ret) {
3053                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3054                         return rte_flow_error_set(error, EINVAL,
3055                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3056                                                   NULL,
3057                                                   "no ipv6 item in pattern");
3058         }
3059         return ret;
3060 }
3061
3062 /**
3063  * Validate the modify-header TP actions.
3064  *
3065  * @param[in] action_flags
3066  *   Holds the actions detected until now.
3067  * @param[in] action
3068  *   Pointer to the modify action.
3069  * @param[in] item_flags
3070  *   Holds the items detected.
3071  * @param[out] error
3072  *   Pointer to error structure.
3073  *
3074  * @return
3075  *   0 on success, a negative errno value otherwise and rte_errno is set.
3076  */
3077 static int
3078 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3079                                   const struct rte_flow_action *action,
3080                                   const uint64_t item_flags,
3081                                   struct rte_flow_error *error)
3082 {
3083         int ret = 0;
3084
3085         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3086         if (!ret) {
3087                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3088                         return rte_flow_error_set(error, EINVAL,
3089                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3090                                                   NULL, "no transport layer "
3091                                                   "in pattern");
3092         }
3093         return ret;
3094 }
3095
3096 /**
3097  * Validate the modify-header actions of increment/decrement
3098  * TCP Sequence-number.
3099  *
3100  * @param[in] action_flags
3101  *   Holds the actions detected until now.
3102  * @param[in] action
3103  *   Pointer to the modify action.
3104  * @param[in] item_flags
3105  *   Holds the items detected.
3106  * @param[out] error
3107  *   Pointer to error structure.
3108  *
3109  * @return
3110  *   0 on success, a negative errno value otherwise and rte_errno is set.
3111  */
3112 static int
3113 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3114                                        const struct rte_flow_action *action,
3115                                        const uint64_t item_flags,
3116                                        struct rte_flow_error *error)
3117 {
3118         int ret = 0;
3119
3120         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3121         if (!ret) {
3122                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3123                         return rte_flow_error_set(error, EINVAL,
3124                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3125                                                   NULL, "no TCP item in"
3126                                                   " pattern");
3127                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3128                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3129                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3130                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3131                         return rte_flow_error_set(error, EINVAL,
3132                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3133                                                   NULL,
3134                                                   "cannot decrease and increase"
3135                                                   " TCP sequence number"
3136                                                   " at the same time");
3137         }
3138         return ret;
3139 }
3140
3141 /**
3142  * Validate the modify-header actions of increment/decrement
3143  * TCP Acknowledgment number.
3144  *
3145  * @param[in] action_flags
3146  *   Holds the actions detected until now.
3147  * @param[in] action
3148  *   Pointer to the modify action.
3149  * @param[in] item_flags
3150  *   Holds the items detected.
3151  * @param[out] error
3152  *   Pointer to error structure.
3153  *
3154  * @return
3155  *   0 on success, a negative errno value otherwise and rte_errno is set.
3156  */
3157 static int
3158 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3159                                        const struct rte_flow_action *action,
3160                                        const uint64_t item_flags,
3161                                        struct rte_flow_error *error)
3162 {
3163         int ret = 0;
3164
3165         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3166         if (!ret) {
3167                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3168                         return rte_flow_error_set(error, EINVAL,
3169                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3170                                                   NULL, "no TCP item in"
3171                                                   " pattern");
3172                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3173                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3174                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3175                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3176                         return rte_flow_error_set(error, EINVAL,
3177                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3178                                                   NULL,
3179                                                   "cannot decrease and increase"
3180                                                   " TCP acknowledgment number"
3181                                                   " at the same time");
3182         }
3183         return ret;
3184 }
3185
3186 /**
3187  * Validate the modify-header TTL actions.
3188  *
3189  * @param[in] action_flags
3190  *   Holds the actions detected until now.
3191  * @param[in] action
3192  *   Pointer to the modify action.
3193  * @param[in] item_flags
3194  *   Holds the items detected.
3195  * @param[out] error
3196  *   Pointer to error structure.
3197  *
3198  * @return
3199  *   0 on success, a negative errno value otherwise and rte_errno is set.
3200  */
3201 static int
3202 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3203                                    const struct rte_flow_action *action,
3204                                    const uint64_t item_flags,
3205                                    struct rte_flow_error *error)
3206 {
3207         int ret = 0;
3208
3209         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3210         if (!ret) {
3211                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3212                         return rte_flow_error_set(error, EINVAL,
3213                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3214                                                   NULL,
3215                                                   "no IP protocol in pattern");
3216         }
3217         return ret;
3218 }
3219
3220 /**
3221  * Validate jump action.
3222  *
3223  * @param[in] action
3224  *   Pointer to the jump action.
3225  * @param[in] action_flags
3226  *   Holds the actions detected until now.
3227  * @param[in] attributes
3228  *   Pointer to flow attributes
3229  * @param[in] external
3230  *   Action belongs to flow rule created by request external to PMD.
3231  * @param[out] error
3232  *   Pointer to error structure.
3233  *
3234  * @return
3235  *   0 on success, a negative errno value otherwise and rte_errno is set.
3236  */
3237 static int
3238 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3239                              uint64_t action_flags,
3240                              const struct rte_flow_attr *attributes,
3241                              bool external, struct rte_flow_error *error)
3242 {
3243         uint32_t target_group, table;
3244         int ret = 0;
3245
3246         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3247                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3248                 return rte_flow_error_set(error, EINVAL,
3249                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3250                                           "can't have 2 fate actions in"
3251                                           " same flow");
3252         if (action_flags & MLX5_FLOW_ACTION_METER)
3253                 return rte_flow_error_set(error, ENOTSUP,
3254                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3255                                           "jump with meter not support");
3256         if (!action->conf)
3257                 return rte_flow_error_set(error, EINVAL,
3258                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3259                                           NULL, "action configuration not set");
3260         target_group =
3261                 ((const struct rte_flow_action_jump *)action->conf)->group;
3262         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3263                                        &table, error);
3264         if (ret)
3265                 return ret;
3266         if (attributes->group == target_group)
3267                 return rte_flow_error_set(error, EINVAL,
3268                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3269                                           "target group must be other than"
3270                                           " the current flow group");
3271         return 0;
3272 }
3273
3274 /*
3275  * Validate the port_id action.
3276  *
3277  * @param[in] dev
3278  *   Pointer to rte_eth_dev structure.
3279  * @param[in] action_flags
3280  *   Bit-fields that holds the actions detected until now.
3281  * @param[in] action
3282  *   Port_id RTE action structure.
3283  * @param[in] attr
3284  *   Attributes of flow that includes this action.
3285  * @param[out] error
3286  *   Pointer to error structure.
3287  *
3288  * @return
3289  *   0 on success, a negative errno value otherwise and rte_errno is set.
3290  */
3291 static int
3292 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3293                                 uint64_t action_flags,
3294                                 const struct rte_flow_action *action,
3295                                 const struct rte_flow_attr *attr,
3296                                 struct rte_flow_error *error)
3297 {
3298         const struct rte_flow_action_port_id *port_id;
3299         struct mlx5_priv *act_priv;
3300         struct mlx5_priv *dev_priv;
3301         uint16_t port;
3302
3303         if (!attr->transfer)
3304                 return rte_flow_error_set(error, ENOTSUP,
3305                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3306                                           NULL,
3307                                           "port id action is valid in transfer"
3308                                           " mode only");
3309         if (!action || !action->conf)
3310                 return rte_flow_error_set(error, ENOTSUP,
3311                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3312                                           NULL,
3313                                           "port id action parameters must be"
3314                                           " specified");
3315         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3316                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3317                 return rte_flow_error_set(error, EINVAL,
3318                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3319                                           "can have only one fate actions in"
3320                                           " a flow");
3321         dev_priv = mlx5_dev_to_eswitch_info(dev);
3322         if (!dev_priv)
3323                 return rte_flow_error_set(error, rte_errno,
3324                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3325                                           NULL,
3326                                           "failed to obtain E-Switch info");
3327         port_id = action->conf;
3328         port = port_id->original ? dev->data->port_id : port_id->id;
3329         act_priv = mlx5_port_to_eswitch_info(port, false);
3330         if (!act_priv)
3331                 return rte_flow_error_set
3332                                 (error, rte_errno,
3333                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3334                                  "failed to obtain E-Switch port id for port");
3335         if (act_priv->domain_id != dev_priv->domain_id)
3336                 return rte_flow_error_set
3337                                 (error, EINVAL,
3338                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3339                                  "port does not belong to"
3340                                  " E-Switch being configured");
3341         return 0;
3342 }
3343
3344 /**
3345  * Get the maximum number of modify header actions.
3346  *
3347  * @param dev
3348  *   Pointer to rte_eth_dev structure.
3349  *
3350  * @return
3351  *   Max number of modify header actions device can support.
3352  */
3353 static unsigned int
3354 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev)
3355 {
3356         /*
3357          * There's no way to directly query the max cap. Although it has to be
3358          * acquried by iterative trial, it is a safe assumption that more
3359          * actions are supported by FW if extensive metadata register is
3360          * supported.
3361          */
3362         return mlx5_flow_ext_mreg_supported(dev) ? MLX5_MODIFY_NUM :
3363                                                    MLX5_MODIFY_NUM_NO_MREG;
3364 }
3365
3366 /**
3367  * Validate the meter action.
3368  *
3369  * @param[in] dev
3370  *   Pointer to rte_eth_dev structure.
3371  * @param[in] action_flags
3372  *   Bit-fields that holds the actions detected until now.
3373  * @param[in] action
3374  *   Pointer to the meter action.
3375  * @param[in] attr
3376  *   Attributes of flow that includes this action.
3377  * @param[out] error
3378  *   Pointer to error structure.
3379  *
3380  * @return
3381  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3382  */
3383 static int
3384 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3385                                 uint64_t action_flags,
3386                                 const struct rte_flow_action *action,
3387                                 const struct rte_flow_attr *attr,
3388                                 struct rte_flow_error *error)
3389 {
3390         struct mlx5_priv *priv = dev->data->dev_private;
3391         const struct rte_flow_action_meter *am = action->conf;
3392         struct mlx5_flow_meter *fm = mlx5_flow_meter_find(priv, am->mtr_id);
3393
3394         if (action_flags & MLX5_FLOW_ACTION_METER)
3395                 return rte_flow_error_set(error, ENOTSUP,
3396                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3397                                           "meter chaining not support");
3398         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3399                 return rte_flow_error_set(error, ENOTSUP,
3400                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3401                                           "meter with jump not support");
3402         if (!priv->mtr_en)
3403                 return rte_flow_error_set(error, ENOTSUP,
3404                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3405                                           NULL,
3406                                           "meter action not supported");
3407         if (!fm)
3408                 return rte_flow_error_set(error, EINVAL,
3409                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3410                                           "Meter not found");
3411         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3412               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3413               (!fm->attr.egress && !attr->egress && attr->ingress))))
3414                 return rte_flow_error_set(error, EINVAL,
3415                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3416                                           "Flow attributes are either invalid "
3417                                           "or have a conflict with current "
3418                                           "meter attributes");
3419         return 0;
3420 }
3421
3422 /**
3423  * Find existing modify-header resource or create and register a new one.
3424  *
3425  * @param dev[in, out]
3426  *   Pointer to rte_eth_dev structure.
3427  * @param[in, out] resource
3428  *   Pointer to modify-header resource.
3429  * @parm[in, out] dev_flow
3430  *   Pointer to the dev_flow.
3431  * @param[out] error
3432  *   pointer to error structure.
3433  *
3434  * @return
3435  *   0 on success otherwise -errno and errno is set.
3436  */
3437 static int
3438 flow_dv_modify_hdr_resource_register
3439                         (struct rte_eth_dev *dev,
3440                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3441                          struct mlx5_flow *dev_flow,
3442                          struct rte_flow_error *error)
3443 {
3444         struct mlx5_priv *priv = dev->data->dev_private;
3445         struct mlx5_ibv_shared *sh = priv->sh;
3446         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3447         struct mlx5dv_dr_domain *ns;
3448
3449         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev))
3450                 return rte_flow_error_set(error, EOVERFLOW,
3451                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3452                                           "too many modify header items");
3453         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3454                 ns = sh->fdb_domain;
3455         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3456                 ns = sh->tx_domain;
3457         else
3458                 ns = sh->rx_domain;
3459         resource->flags =
3460                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3461         /* Lookup a matching resource from cache. */
3462         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3463                 if (resource->ft_type == cache_resource->ft_type &&
3464                     resource->actions_num == cache_resource->actions_num &&
3465                     resource->flags == cache_resource->flags &&
3466                     !memcmp((const void *)resource->actions,
3467                             (const void *)cache_resource->actions,
3468                             (resource->actions_num *
3469                                             sizeof(resource->actions[0])))) {
3470                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3471                                 (void *)cache_resource,
3472                                 rte_atomic32_read(&cache_resource->refcnt));
3473                         rte_atomic32_inc(&cache_resource->refcnt);
3474                         dev_flow->dv.modify_hdr = cache_resource;
3475                         return 0;
3476                 }
3477         }
3478         /* Register new modify-header resource. */
3479         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
3480         if (!cache_resource)
3481                 return rte_flow_error_set(error, ENOMEM,
3482                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3483                                           "cannot allocate resource memory");
3484         *cache_resource = *resource;
3485         cache_resource->verbs_action =
3486                 mlx5_glue->dv_create_flow_action_modify_header
3487                                         (sh->ctx, cache_resource->ft_type,
3488                                          ns, cache_resource->flags,
3489                                          cache_resource->actions_num *
3490                                          sizeof(cache_resource->actions[0]),
3491                                          (uint64_t *)cache_resource->actions);
3492         if (!cache_resource->verbs_action) {
3493                 rte_free(cache_resource);
3494                 return rte_flow_error_set(error, ENOMEM,
3495                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3496                                           NULL, "cannot create action");
3497         }
3498         rte_atomic32_init(&cache_resource->refcnt);
3499         rte_atomic32_inc(&cache_resource->refcnt);
3500         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3501         dev_flow->dv.modify_hdr = cache_resource;
3502         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3503                 (void *)cache_resource,
3504                 rte_atomic32_read(&cache_resource->refcnt));
3505         return 0;
3506 }
3507
3508 #define MLX5_CNT_CONTAINER_RESIZE 64
3509
3510 /**
3511  * Get or create a flow counter.
3512  *
3513  * @param[in] dev
3514  *   Pointer to the Ethernet device structure.
3515  * @param[in] shared
3516  *   Indicate if this counter is shared with other flows.
3517  * @param[in] id
3518  *   Counter identifier.
3519  *
3520  * @return
3521  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3522  */
3523 static struct mlx5_flow_counter *
3524 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3525                                uint32_t id)
3526 {
3527         struct mlx5_priv *priv = dev->data->dev_private;
3528         struct mlx5_flow_counter *cnt = NULL;
3529         struct mlx5_devx_obj *dcs = NULL;
3530
3531         if (!priv->config.devx) {
3532                 rte_errno = ENOTSUP;
3533                 return NULL;
3534         }
3535         if (shared) {
3536                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3537                         if (cnt->shared && cnt->id == id) {
3538                                 cnt->ref_cnt++;
3539                                 return cnt;
3540                         }
3541                 }
3542         }
3543         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3544         if (!dcs)
3545                 return NULL;
3546         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3547         if (!cnt) {
3548                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3549                 rte_errno = ENOMEM;
3550                 return NULL;
3551         }
3552         struct mlx5_flow_counter tmpl = {
3553                 .shared = shared,
3554                 .ref_cnt = 1,
3555                 .id = id,
3556                 .dcs = dcs,
3557         };
3558         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3559         if (!tmpl.action) {
3560                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3561                 rte_errno = errno;
3562                 rte_free(cnt);
3563                 return NULL;
3564         }
3565         *cnt = tmpl;
3566         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3567         return cnt;
3568 }
3569
3570 /**
3571  * Release a flow counter.
3572  *
3573  * @param[in] dev
3574  *   Pointer to the Ethernet device structure.
3575  * @param[in] counter
3576  *   Pointer to the counter handler.
3577  */
3578 static void
3579 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3580                                  struct mlx5_flow_counter *counter)
3581 {
3582         struct mlx5_priv *priv = dev->data->dev_private;
3583
3584         if (!counter)
3585                 return;
3586         if (--counter->ref_cnt == 0) {
3587                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3588                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3589                 rte_free(counter);
3590         }
3591 }
3592
3593 /**
3594  * Query a devx flow counter.
3595  *
3596  * @param[in] dev
3597  *   Pointer to the Ethernet device structure.
3598  * @param[in] cnt
3599  *   Pointer to the flow counter.
3600  * @param[out] pkts
3601  *   The statistics value of packets.
3602  * @param[out] bytes
3603  *   The statistics value of bytes.
3604  *
3605  * @return
3606  *   0 on success, otherwise a negative errno value and rte_errno is set.
3607  */
3608 static inline int
3609 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3610                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3611                      uint64_t *bytes)
3612 {
3613         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3614                                                 0, NULL, NULL, 0);
3615 }
3616
3617 /**
3618  * Get a pool by a counter.
3619  *
3620  * @param[in] cnt
3621  *   Pointer to the counter.
3622  *
3623  * @return
3624  *   The counter pool.
3625  */
3626 static struct mlx5_flow_counter_pool *
3627 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3628 {
3629         if (!cnt->batch) {
3630                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3631                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3632         }
3633         return cnt->pool;
3634 }
3635
3636 /**
3637  * Get a pool by devx counter ID.
3638  *
3639  * @param[in] cont
3640  *   Pointer to the counter container.
3641  * @param[in] id
3642  *   The counter devx ID.
3643  *
3644  * @return
3645  *   The counter pool pointer if exists, NULL otherwise,
3646  */
3647 static struct mlx5_flow_counter_pool *
3648 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3649 {
3650         struct mlx5_flow_counter_pool *pool;
3651
3652         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3653                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3654                                 MLX5_COUNTERS_PER_POOL;
3655
3656                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3657                         return pool;
3658         };
3659         return NULL;
3660 }
3661
3662 /**
3663  * Allocate a new memory for the counter values wrapped by all the needed
3664  * management.
3665  *
3666  * @param[in] dev
3667  *   Pointer to the Ethernet device structure.
3668  * @param[in] raws_n
3669  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3670  *
3671  * @return
3672  *   The new memory management pointer on success, otherwise NULL and rte_errno
3673  *   is set.
3674  */
3675 static struct mlx5_counter_stats_mem_mng *
3676 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3677 {
3678         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3679                                         (dev->data->dev_private))->sh;
3680         struct mlx5_devx_mkey_attr mkey_attr;
3681         struct mlx5_counter_stats_mem_mng *mem_mng;
3682         volatile struct flow_counter_stats *raw_data;
3683         int size = (sizeof(struct flow_counter_stats) *
3684                         MLX5_COUNTERS_PER_POOL +
3685                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3686                         sizeof(struct mlx5_counter_stats_mem_mng);
3687         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3688         int i;
3689
3690         if (!mem) {
3691                 rte_errno = ENOMEM;
3692                 return NULL;
3693         }
3694         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3695         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3696         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3697                                                  IBV_ACCESS_LOCAL_WRITE);
3698         if (!mem_mng->umem) {
3699                 rte_errno = errno;
3700                 rte_free(mem);
3701                 return NULL;
3702         }
3703         mkey_attr.addr = (uintptr_t)mem;
3704         mkey_attr.size = size;
3705         mkey_attr.umem_id = mem_mng->umem->umem_id;
3706         mkey_attr.pd = sh->pdn;
3707         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3708         if (!mem_mng->dm) {
3709                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3710                 rte_errno = errno;
3711                 rte_free(mem);
3712                 return NULL;
3713         }
3714         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3715         raw_data = (volatile struct flow_counter_stats *)mem;
3716         for (i = 0; i < raws_n; ++i) {
3717                 mem_mng->raws[i].mem_mng = mem_mng;
3718                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3719         }
3720         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3721         return mem_mng;
3722 }
3723
3724 /**
3725  * Resize a counter container.
3726  *
3727  * @param[in] dev
3728  *   Pointer to the Ethernet device structure.
3729  * @param[in] batch
3730  *   Whether the pool is for counter that was allocated by batch command.
3731  *
3732  * @return
3733  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3734  */
3735 static struct mlx5_pools_container *
3736 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3737 {
3738         struct mlx5_priv *priv = dev->data->dev_private;
3739         struct mlx5_pools_container *cont =
3740                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3741         struct mlx5_pools_container *new_cont =
3742                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3743         struct mlx5_counter_stats_mem_mng *mem_mng;
3744         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3745         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3746         int i;
3747
3748         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3749                 /* The last resize still hasn't detected by the host thread. */
3750                 rte_errno = EAGAIN;
3751                 return NULL;
3752         }
3753         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3754         if (!new_cont->pools) {
3755                 rte_errno = ENOMEM;
3756                 return NULL;
3757         }
3758         if (cont->n)
3759                 memcpy(new_cont->pools, cont->pools, cont->n *
3760                        sizeof(struct mlx5_flow_counter_pool *));
3761         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3762                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3763         if (!mem_mng) {
3764                 rte_free(new_cont->pools);
3765                 return NULL;
3766         }
3767         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3768                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3769                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3770                                  i, next);
3771         new_cont->n = resize;
3772         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3773         TAILQ_INIT(&new_cont->pool_list);
3774         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3775         new_cont->init_mem_mng = mem_mng;
3776         rte_cio_wmb();
3777          /* Flip the master container. */
3778         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3779         return new_cont;
3780 }
3781
3782 /**
3783  * Query a devx flow counter.
3784  *
3785  * @param[in] dev
3786  *   Pointer to the Ethernet device structure.
3787  * @param[in] cnt
3788  *   Pointer to the flow counter.
3789  * @param[out] pkts
3790  *   The statistics value of packets.
3791  * @param[out] bytes
3792  *   The statistics value of bytes.
3793  *
3794  * @return
3795  *   0 on success, otherwise a negative errno value and rte_errno is set.
3796  */
3797 static inline int
3798 _flow_dv_query_count(struct rte_eth_dev *dev,
3799                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3800                      uint64_t *bytes)
3801 {
3802         struct mlx5_priv *priv = dev->data->dev_private;
3803         struct mlx5_flow_counter_pool *pool =
3804                         flow_dv_counter_pool_get(cnt);
3805         int offset = cnt - &pool->counters_raw[0];
3806
3807         if (priv->counter_fallback)
3808                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3809
3810         rte_spinlock_lock(&pool->sl);
3811         /*
3812          * The single counters allocation may allocate smaller ID than the
3813          * current allocated in parallel to the host reading.
3814          * In this case the new counter values must be reported as 0.
3815          */
3816         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
3817                 *pkts = 0;
3818                 *bytes = 0;
3819         } else {
3820                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
3821                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
3822         }
3823         rte_spinlock_unlock(&pool->sl);
3824         return 0;
3825 }
3826
3827 /**
3828  * Create and initialize a new counter pool.
3829  *
3830  * @param[in] dev
3831  *   Pointer to the Ethernet device structure.
3832  * @param[out] dcs
3833  *   The devX counter handle.
3834  * @param[in] batch
3835  *   Whether the pool is for counter that was allocated by batch command.
3836  *
3837  * @return
3838  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
3839  */
3840 static struct mlx5_flow_counter_pool *
3841 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
3842                     uint32_t batch)
3843 {
3844         struct mlx5_priv *priv = dev->data->dev_private;
3845         struct mlx5_flow_counter_pool *pool;
3846         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
3847                                                                0);
3848         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
3849         uint32_t size;
3850
3851         if (cont->n == n_valid) {
3852                 cont = flow_dv_container_resize(dev, batch);
3853                 if (!cont)
3854                         return NULL;
3855         }
3856         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
3857                         sizeof(struct mlx5_flow_counter);
3858         pool = rte_calloc(__func__, 1, size, 0);
3859         if (!pool) {
3860                 rte_errno = ENOMEM;
3861                 return NULL;
3862         }
3863         pool->min_dcs = dcs;
3864         pool->raw = cont->init_mem_mng->raws + n_valid %
3865                                                      MLX5_CNT_CONTAINER_RESIZE;
3866         pool->raw_hw = NULL;
3867         rte_spinlock_init(&pool->sl);
3868         /*
3869          * The generation of the new allocated counters in this pool is 0, 2 in
3870          * the pool generation makes all the counters valid for allocation.
3871          */
3872         rte_atomic64_set(&pool->query_gen, 0x2);
3873         TAILQ_INIT(&pool->counters);
3874         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
3875         cont->pools[n_valid] = pool;
3876         /* Pool initialization must be updated before host thread access. */
3877         rte_cio_wmb();
3878         rte_atomic16_add(&cont->n_valid, 1);
3879         return pool;
3880 }
3881
3882 /**
3883  * Prepare a new counter and/or a new counter pool.
3884  *
3885  * @param[in] dev
3886  *   Pointer to the Ethernet device structure.
3887  * @param[out] cnt_free
3888  *   Where to put the pointer of a new counter.
3889  * @param[in] batch
3890  *   Whether the pool is for counter that was allocated by batch command.
3891  *
3892  * @return
3893  *   The free counter pool pointer and @p cnt_free is set on success,
3894  *   NULL otherwise and rte_errno is set.
3895  */
3896 static struct mlx5_flow_counter_pool *
3897 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
3898                              struct mlx5_flow_counter **cnt_free,
3899                              uint32_t batch)
3900 {
3901         struct mlx5_priv *priv = dev->data->dev_private;
3902         struct mlx5_flow_counter_pool *pool;
3903         struct mlx5_devx_obj *dcs = NULL;
3904         struct mlx5_flow_counter *cnt;
3905         uint32_t i;
3906
3907         if (!batch) {
3908                 /* bulk_bitmap must be 0 for single counter allocation. */
3909                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3910                 if (!dcs)
3911                         return NULL;
3912                 pool = flow_dv_find_pool_by_id
3913                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
3914                 if (!pool) {
3915                         pool = flow_dv_pool_create(dev, dcs, batch);
3916                         if (!pool) {
3917                                 mlx5_devx_cmd_destroy(dcs);
3918                                 return NULL;
3919                         }
3920                 } else if (dcs->id < pool->min_dcs->id) {
3921                         rte_atomic64_set(&pool->a64_dcs,
3922                                          (int64_t)(uintptr_t)dcs);
3923                 }
3924                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
3925                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3926                 cnt->dcs = dcs;
3927                 *cnt_free = cnt;
3928                 return pool;
3929         }
3930         /* bulk_bitmap is in 128 counters units. */
3931         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
3932                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
3933         if (!dcs) {
3934                 rte_errno = ENODATA;
3935                 return NULL;
3936         }
3937         pool = flow_dv_pool_create(dev, dcs, batch);
3938         if (!pool) {
3939                 mlx5_devx_cmd_destroy(dcs);
3940                 return NULL;
3941         }
3942         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3943                 cnt = &pool->counters_raw[i];
3944                 cnt->pool = pool;
3945                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3946         }
3947         *cnt_free = &pool->counters_raw[0];
3948         return pool;
3949 }
3950
3951 /**
3952  * Search for existed shared counter.
3953  *
3954  * @param[in] cont
3955  *   Pointer to the relevant counter pool container.
3956  * @param[in] id
3957  *   The shared counter ID to search.
3958  *
3959  * @return
3960  *   NULL if not existed, otherwise pointer to the shared counter.
3961  */
3962 static struct mlx5_flow_counter *
3963 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
3964                               uint32_t id)
3965 {
3966         static struct mlx5_flow_counter *cnt;
3967         struct mlx5_flow_counter_pool *pool;
3968         int i;
3969
3970         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3971                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3972                         cnt = &pool->counters_raw[i];
3973                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
3974                                 return cnt;
3975                 }
3976         }
3977         return NULL;
3978 }
3979
3980 /**
3981  * Allocate a flow counter.
3982  *
3983  * @param[in] dev
3984  *   Pointer to the Ethernet device structure.
3985  * @param[in] shared
3986  *   Indicate if this counter is shared with other flows.
3987  * @param[in] id
3988  *   Counter identifier.
3989  * @param[in] group
3990  *   Counter flow group.
3991  *
3992  * @return
3993  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3994  */
3995 static struct mlx5_flow_counter *
3996 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
3997                       uint16_t group)
3998 {
3999         struct mlx5_priv *priv = dev->data->dev_private;
4000         struct mlx5_flow_counter_pool *pool = NULL;
4001         struct mlx5_flow_counter *cnt_free = NULL;
4002         /*
4003          * Currently group 0 flow counter cannot be assigned to a flow if it is
4004          * not the first one in the batch counter allocation, so it is better
4005          * to allocate counters one by one for these flows in a separate
4006          * container.
4007          * A counter can be shared between different groups so need to take
4008          * shared counters from the single container.
4009          */
4010         uint32_t batch = (group && !shared) ? 1 : 0;
4011         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4012                                                                0);
4013
4014         if (priv->counter_fallback)
4015                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4016         if (!priv->config.devx) {
4017                 rte_errno = ENOTSUP;
4018                 return NULL;
4019         }
4020         if (shared) {
4021                 cnt_free = flow_dv_counter_shared_search(cont, id);
4022                 if (cnt_free) {
4023                         if (cnt_free->ref_cnt + 1 == 0) {
4024                                 rte_errno = E2BIG;
4025                                 return NULL;
4026                         }
4027                         cnt_free->ref_cnt++;
4028                         return cnt_free;
4029                 }
4030         }
4031         /* Pools which has a free counters are in the start. */
4032         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4033                 /*
4034                  * The free counter reset values must be updated between the
4035                  * counter release to the counter allocation, so, at least one
4036                  * query must be done in this time. ensure it by saving the
4037                  * query generation in the release time.
4038                  * The free list is sorted according to the generation - so if
4039                  * the first one is not updated, all the others are not
4040                  * updated too.
4041                  */
4042                 cnt_free = TAILQ_FIRST(&pool->counters);
4043                 if (cnt_free && cnt_free->query_gen + 1 <
4044                     rte_atomic64_read(&pool->query_gen))
4045                         break;
4046                 cnt_free = NULL;
4047         }
4048         if (!cnt_free) {
4049                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4050                 if (!pool)
4051                         return NULL;
4052         }
4053         cnt_free->batch = batch;
4054         /* Create a DV counter action only in the first time usage. */
4055         if (!cnt_free->action) {
4056                 uint16_t offset;
4057                 struct mlx5_devx_obj *dcs;
4058
4059                 if (batch) {
4060                         offset = cnt_free - &pool->counters_raw[0];
4061                         dcs = pool->min_dcs;
4062                 } else {
4063                         offset = 0;
4064                         dcs = cnt_free->dcs;
4065                 }
4066                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4067                                         (dcs->obj, offset);
4068                 if (!cnt_free->action) {
4069                         rte_errno = errno;
4070                         return NULL;
4071                 }
4072         }
4073         /* Update the counter reset values. */
4074         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4075                                  &cnt_free->bytes))
4076                 return NULL;
4077         cnt_free->shared = shared;
4078         cnt_free->ref_cnt = 1;
4079         cnt_free->id = id;
4080         if (!priv->sh->cmng.query_thread_on)
4081                 /* Start the asynchronous batch query by the host thread. */
4082                 mlx5_set_query_alarm(priv->sh);
4083         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4084         if (TAILQ_EMPTY(&pool->counters)) {
4085                 /* Move the pool to the end of the container pool list. */
4086                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4087                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4088         }
4089         return cnt_free;
4090 }
4091
4092 /**
4093  * Release a flow counter.
4094  *
4095  * @param[in] dev
4096  *   Pointer to the Ethernet device structure.
4097  * @param[in] counter
4098  *   Pointer to the counter handler.
4099  */
4100 static void
4101 flow_dv_counter_release(struct rte_eth_dev *dev,
4102                         struct mlx5_flow_counter *counter)
4103 {
4104         struct mlx5_priv *priv = dev->data->dev_private;
4105
4106         if (!counter)
4107                 return;
4108         if (priv->counter_fallback) {
4109                 flow_dv_counter_release_fallback(dev, counter);
4110                 return;
4111         }
4112         if (--counter->ref_cnt == 0) {
4113                 struct mlx5_flow_counter_pool *pool =
4114                                 flow_dv_counter_pool_get(counter);
4115
4116                 /* Put the counter in the end - the last updated one. */
4117                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4118                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4119         }
4120 }
4121
4122 /**
4123  * Verify the @p attributes will be correctly understood by the NIC and store
4124  * them in the @p flow if everything is correct.
4125  *
4126  * @param[in] dev
4127  *   Pointer to dev struct.
4128  * @param[in] attributes
4129  *   Pointer to flow attributes
4130  * @param[in] external
4131  *   This flow rule is created by request external to PMD.
4132  * @param[out] error
4133  *   Pointer to error structure.
4134  *
4135  * @return
4136  *   0 on success, a negative errno value otherwise and rte_errno is set.
4137  */
4138 static int
4139 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4140                             const struct rte_flow_attr *attributes,
4141                             bool external __rte_unused,
4142                             struct rte_flow_error *error)
4143 {
4144         struct mlx5_priv *priv = dev->data->dev_private;
4145         uint32_t priority_max = priv->config.flow_prio - 1;
4146
4147 #ifndef HAVE_MLX5DV_DR
4148         if (attributes->group)
4149                 return rte_flow_error_set(error, ENOTSUP,
4150                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4151                                           NULL,
4152                                           "groups are not supported");
4153 #else
4154         uint32_t table;
4155         int ret;
4156
4157         ret = mlx5_flow_group_to_table(attributes, external,
4158                                        attributes->group,
4159                                        &table, error);
4160         if (ret)
4161                 return ret;
4162 #endif
4163         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4164             attributes->priority >= priority_max)
4165                 return rte_flow_error_set(error, ENOTSUP,
4166                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4167                                           NULL,
4168                                           "priority out of range");
4169         if (attributes->transfer) {
4170                 if (!priv->config.dv_esw_en)
4171                         return rte_flow_error_set
4172                                 (error, ENOTSUP,
4173                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4174                                  "E-Switch dr is not supported");
4175                 if (!(priv->representor || priv->master))
4176                         return rte_flow_error_set
4177                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4178                                  NULL, "E-Switch configuration can only be"
4179                                  " done by a master or a representor device");
4180                 if (attributes->egress)
4181                         return rte_flow_error_set
4182                                 (error, ENOTSUP,
4183                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4184                                  "egress is not supported");
4185         }
4186         if (!(attributes->egress ^ attributes->ingress))
4187                 return rte_flow_error_set(error, ENOTSUP,
4188                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4189                                           "must specify exactly one of "
4190                                           "ingress or egress");
4191         return 0;
4192 }
4193
4194 /**
4195  * Internal validation function. For validating both actions and items.
4196  *
4197  * @param[in] dev
4198  *   Pointer to the rte_eth_dev structure.
4199  * @param[in] attr
4200  *   Pointer to the flow attributes.
4201  * @param[in] items
4202  *   Pointer to the list of items.
4203  * @param[in] actions
4204  *   Pointer to the list of actions.
4205  * @param[in] external
4206  *   This flow rule is created by request external to PMD.
4207  * @param[out] error
4208  *   Pointer to the error structure.
4209  *
4210  * @return
4211  *   0 on success, a negative errno value otherwise and rte_errno is set.
4212  */
4213 static int
4214 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4215                  const struct rte_flow_item items[],
4216                  const struct rte_flow_action actions[],
4217                  bool external, struct rte_flow_error *error)
4218 {
4219         int ret;
4220         uint64_t action_flags = 0;
4221         uint64_t item_flags = 0;
4222         uint64_t last_item = 0;
4223         uint8_t next_protocol = 0xff;
4224         uint16_t ether_type = 0;
4225         int actions_n = 0;
4226         const struct rte_flow_item *gre_item = NULL;
4227         struct rte_flow_item_tcp nic_tcp_mask = {
4228                 .hdr = {
4229                         .tcp_flags = 0xFF,
4230                         .src_port = RTE_BE16(UINT16_MAX),
4231                         .dst_port = RTE_BE16(UINT16_MAX),
4232                 }
4233         };
4234         struct mlx5_priv *priv = dev->data->dev_private;
4235         struct mlx5_dev_config *dev_conf = &priv->config;
4236
4237         if (items == NULL)
4238                 return -1;
4239         ret = flow_dv_validate_attributes(dev, attr, external, error);
4240         if (ret < 0)
4241                 return ret;
4242         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4243                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4244                 int type = items->type;
4245
4246                 switch (type) {
4247                 case RTE_FLOW_ITEM_TYPE_VOID:
4248                         break;
4249                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4250                         ret = flow_dv_validate_item_port_id
4251                                         (dev, items, attr, item_flags, error);
4252                         if (ret < 0)
4253                                 return ret;
4254                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4255                         break;
4256                 case RTE_FLOW_ITEM_TYPE_ETH:
4257                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4258                                                           error);
4259                         if (ret < 0)
4260                                 return ret;
4261                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4262                                              MLX5_FLOW_LAYER_OUTER_L2;
4263                         if (items->mask != NULL && items->spec != NULL) {
4264                                 ether_type =
4265                                         ((const struct rte_flow_item_eth *)
4266                                          items->spec)->type;
4267                                 ether_type &=
4268                                         ((const struct rte_flow_item_eth *)
4269                                          items->mask)->type;
4270                                 ether_type = rte_be_to_cpu_16(ether_type);
4271                         } else {
4272                                 ether_type = 0;
4273                         }
4274                         break;
4275                 case RTE_FLOW_ITEM_TYPE_VLAN:
4276                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4277                                                            dev, error);
4278                         if (ret < 0)
4279                                 return ret;
4280                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4281                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4282                         if (items->mask != NULL && items->spec != NULL) {
4283                                 ether_type =
4284                                         ((const struct rte_flow_item_vlan *)
4285                                          items->spec)->inner_type;
4286                                 ether_type &=
4287                                         ((const struct rte_flow_item_vlan *)
4288                                          items->mask)->inner_type;
4289                                 ether_type = rte_be_to_cpu_16(ether_type);
4290                         } else {
4291                                 ether_type = 0;
4292                         }
4293                         break;
4294                 case RTE_FLOW_ITEM_TYPE_IPV4:
4295                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4296                                                   &item_flags, &tunnel);
4297                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4298                                                            last_item,
4299                                                            ether_type, NULL,
4300                                                            error);
4301                         if (ret < 0)
4302                                 return ret;
4303                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4304                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4305                         if (items->mask != NULL &&
4306                             ((const struct rte_flow_item_ipv4 *)
4307                              items->mask)->hdr.next_proto_id) {
4308                                 next_protocol =
4309                                         ((const struct rte_flow_item_ipv4 *)
4310                                          (items->spec))->hdr.next_proto_id;
4311                                 next_protocol &=
4312                                         ((const struct rte_flow_item_ipv4 *)
4313                                          (items->mask))->hdr.next_proto_id;
4314                         } else {
4315                                 /* Reset for inner layer. */
4316                                 next_protocol = 0xff;
4317                         }
4318                         break;
4319                 case RTE_FLOW_ITEM_TYPE_IPV6:
4320                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4321                                                   &item_flags, &tunnel);
4322                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4323                                                            last_item,
4324                                                            ether_type, NULL,
4325                                                            error);
4326                         if (ret < 0)
4327                                 return ret;
4328                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4329                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4330                         if (items->mask != NULL &&
4331                             ((const struct rte_flow_item_ipv6 *)
4332                              items->mask)->hdr.proto) {
4333                                 next_protocol =
4334                                         ((const struct rte_flow_item_ipv6 *)
4335                                          items->spec)->hdr.proto;
4336                                 next_protocol &=
4337                                         ((const struct rte_flow_item_ipv6 *)
4338                                          items->mask)->hdr.proto;
4339                         } else {
4340                                 /* Reset for inner layer. */
4341                                 next_protocol = 0xff;
4342                         }
4343                         break;
4344                 case RTE_FLOW_ITEM_TYPE_TCP:
4345                         ret = mlx5_flow_validate_item_tcp
4346                                                 (items, item_flags,
4347                                                  next_protocol,
4348                                                  &nic_tcp_mask,
4349                                                  error);
4350                         if (ret < 0)
4351                                 return ret;
4352                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4353                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4354                         break;
4355                 case RTE_FLOW_ITEM_TYPE_UDP:
4356                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4357                                                           next_protocol,
4358                                                           error);
4359                         if (ret < 0)
4360                                 return ret;
4361                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4362                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4363                         break;
4364                 case RTE_FLOW_ITEM_TYPE_GRE:
4365                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4366                                                           next_protocol, error);
4367                         if (ret < 0)
4368                                 return ret;
4369                         gre_item = items;
4370                         last_item = MLX5_FLOW_LAYER_GRE;
4371                         break;
4372                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4373                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4374                                                             next_protocol,
4375                                                             error);
4376                         if (ret < 0)
4377                                 return ret;
4378                         last_item = MLX5_FLOW_LAYER_NVGRE;
4379                         break;
4380                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4381                         ret = mlx5_flow_validate_item_gre_key
4382                                 (items, item_flags, gre_item, error);
4383                         if (ret < 0)
4384                                 return ret;
4385                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4386                         break;
4387                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4388                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4389                                                             error);
4390                         if (ret < 0)
4391                                 return ret;
4392                         last_item = MLX5_FLOW_LAYER_VXLAN;
4393                         break;
4394                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4395                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4396                                                                 item_flags, dev,
4397                                                                 error);
4398                         if (ret < 0)
4399                                 return ret;
4400                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4401                         break;
4402                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4403                         ret = mlx5_flow_validate_item_geneve(items,
4404                                                              item_flags, dev,
4405                                                              error);
4406                         if (ret < 0)
4407                                 return ret;
4408                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4409                         break;
4410                 case RTE_FLOW_ITEM_TYPE_MPLS:
4411                         ret = mlx5_flow_validate_item_mpls(dev, items,
4412                                                            item_flags,
4413                                                            last_item, error);
4414                         if (ret < 0)
4415                                 return ret;
4416                         last_item = MLX5_FLOW_LAYER_MPLS;
4417                         break;
4418
4419                 case RTE_FLOW_ITEM_TYPE_MARK:
4420                         ret = flow_dv_validate_item_mark(dev, items, attr,
4421                                                          error);
4422                         if (ret < 0)
4423                                 return ret;
4424                         last_item = MLX5_FLOW_ITEM_MARK;
4425                         break;
4426                 case RTE_FLOW_ITEM_TYPE_META:
4427                         ret = flow_dv_validate_item_meta(dev, items, attr,
4428                                                          error);
4429                         if (ret < 0)
4430                                 return ret;
4431                         last_item = MLX5_FLOW_ITEM_METADATA;
4432                         break;
4433                 case RTE_FLOW_ITEM_TYPE_ICMP:
4434                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4435                                                            next_protocol,
4436                                                            error);
4437                         if (ret < 0)
4438                                 return ret;
4439                         last_item = MLX5_FLOW_LAYER_ICMP;
4440                         break;
4441                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4442                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4443                                                             next_protocol,
4444                                                             error);
4445                         if (ret < 0)
4446                                 return ret;
4447                         last_item = MLX5_FLOW_LAYER_ICMP6;
4448                         break;
4449                 case RTE_FLOW_ITEM_TYPE_TAG:
4450                         ret = flow_dv_validate_item_tag(dev, items,
4451                                                         attr, error);
4452                         if (ret < 0)
4453                                 return ret;
4454                         last_item = MLX5_FLOW_ITEM_TAG;
4455                         break;
4456                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4457                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4458                         break;
4459                 default:
4460                         return rte_flow_error_set(error, ENOTSUP,
4461                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4462                                                   NULL, "item not supported");
4463                 }
4464                 item_flags |= last_item;
4465         }
4466         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4467                 int type = actions->type;
4468                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4469                         return rte_flow_error_set(error, ENOTSUP,
4470                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4471                                                   actions, "too many actions");
4472                 switch (type) {
4473                 case RTE_FLOW_ACTION_TYPE_VOID:
4474                         break;
4475                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4476                         ret = flow_dv_validate_action_port_id(dev,
4477                                                               action_flags,
4478                                                               actions,
4479                                                               attr,
4480                                                               error);
4481                         if (ret)
4482                                 return ret;
4483                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4484                         ++actions_n;
4485                         break;
4486                 case RTE_FLOW_ACTION_TYPE_FLAG:
4487                         ret = flow_dv_validate_action_flag(dev, action_flags,
4488                                                            attr, error);
4489                         if (ret < 0)
4490                                 return ret;
4491                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4492                                 /* Count all modify-header actions as one. */
4493                                 if (!(action_flags &
4494                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4495                                         ++actions_n;
4496                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4497                                                 MLX5_FLOW_ACTION_MARK_EXT;
4498                         } else {
4499                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4500                                 ++actions_n;
4501                         }
4502                         break;
4503                 case RTE_FLOW_ACTION_TYPE_MARK:
4504                         ret = flow_dv_validate_action_mark(dev, actions,
4505                                                            action_flags,
4506                                                            attr, error);
4507                         if (ret < 0)
4508                                 return ret;
4509                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4510                                 /* Count all modify-header actions as one. */
4511                                 if (!(action_flags &
4512                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4513                                         ++actions_n;
4514                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4515                                                 MLX5_FLOW_ACTION_MARK_EXT;
4516                         } else {
4517                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4518                                 ++actions_n;
4519                         }
4520                         break;
4521                 case RTE_FLOW_ACTION_TYPE_SET_META:
4522                         ret = flow_dv_validate_action_set_meta(dev, actions,
4523                                                                action_flags,
4524                                                                attr, error);
4525                         if (ret < 0)
4526                                 return ret;
4527                         /* Count all modify-header actions as one action. */
4528                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4529                                 ++actions_n;
4530                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4531                         break;
4532                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4533                         ret = flow_dv_validate_action_set_tag(dev, actions,
4534                                                               action_flags,
4535                                                               attr, error);
4536                         if (ret < 0)
4537                                 return ret;
4538                         /* Count all modify-header actions as one action. */
4539                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4540                                 ++actions_n;
4541                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4542                         break;
4543                 case RTE_FLOW_ACTION_TYPE_DROP:
4544                         ret = mlx5_flow_validate_action_drop(action_flags,
4545                                                              attr, error);
4546                         if (ret < 0)
4547                                 return ret;
4548                         action_flags |= MLX5_FLOW_ACTION_DROP;
4549                         ++actions_n;
4550                         break;
4551                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4552                         ret = mlx5_flow_validate_action_queue(actions,
4553                                                               action_flags, dev,
4554                                                               attr, error);
4555                         if (ret < 0)
4556                                 return ret;
4557                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4558                         ++actions_n;
4559                         break;
4560                 case RTE_FLOW_ACTION_TYPE_RSS:
4561                         ret = mlx5_flow_validate_action_rss(actions,
4562                                                             action_flags, dev,
4563                                                             attr, item_flags,
4564                                                             error);
4565                         if (ret < 0)
4566                                 return ret;
4567                         action_flags |= MLX5_FLOW_ACTION_RSS;
4568                         ++actions_n;
4569                         break;
4570                 case RTE_FLOW_ACTION_TYPE_COUNT:
4571                         ret = flow_dv_validate_action_count(dev, error);
4572                         if (ret < 0)
4573                                 return ret;
4574                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4575                         ++actions_n;
4576                         break;
4577                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4578                         if (flow_dv_validate_action_pop_vlan(dev,
4579                                                              action_flags,
4580                                                              actions,
4581                                                              item_flags, attr,
4582                                                              error))
4583                                 return -rte_errno;
4584                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4585                         ++actions_n;
4586                         break;
4587                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4588                         ret = flow_dv_validate_action_push_vlan(action_flags,
4589                                                                 item_flags,
4590                                                                 actions, attr,
4591                                                                 error);
4592                         if (ret < 0)
4593                                 return ret;
4594                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4595                         ++actions_n;
4596                         break;
4597                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4598                         ret = flow_dv_validate_action_set_vlan_pcp
4599                                                 (action_flags, actions, error);
4600                         if (ret < 0)
4601                                 return ret;
4602                         /* Count PCP with push_vlan command. */
4603                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4604                         break;
4605                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4606                         ret = flow_dv_validate_action_set_vlan_vid
4607                                                 (item_flags, action_flags,
4608                                                  actions, error);
4609                         if (ret < 0)
4610                                 return ret;
4611                         /* Count VID with push_vlan command. */
4612                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4613                         break;
4614                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4615                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4616                         ret = flow_dv_validate_action_l2_encap(action_flags,
4617                                                                actions, attr,
4618                                                                error);
4619                         if (ret < 0)
4620                                 return ret;
4621                         action_flags |= actions->type ==
4622                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4623                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4624                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4625                         ++actions_n;
4626                         break;
4627                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4628                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4629                         ret = flow_dv_validate_action_l2_decap(action_flags,
4630                                                                attr, error);
4631                         if (ret < 0)
4632                                 return ret;
4633                         action_flags |= actions->type ==
4634                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4635                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4636                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4637                         ++actions_n;
4638                         break;
4639                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4640                         ret = flow_dv_validate_action_raw_encap(action_flags,
4641                                                                 actions, attr,
4642                                                                 error);
4643                         if (ret < 0)
4644                                 return ret;
4645                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4646                         ++actions_n;
4647                         break;
4648                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4649                         ret = flow_dv_validate_action_raw_decap(action_flags,
4650                                                                 actions, attr,
4651                                                                 error);
4652                         if (ret < 0)
4653                                 return ret;
4654                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4655                         ++actions_n;
4656                         break;
4657                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4658                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4659                         ret = flow_dv_validate_action_modify_mac(action_flags,
4660                                                                  actions,
4661                                                                  item_flags,
4662                                                                  error);
4663                         if (ret < 0)
4664                                 return ret;
4665                         /* Count all modify-header actions as one action. */
4666                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4667                                 ++actions_n;
4668                         action_flags |= actions->type ==
4669                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4670                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4671                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4672                         break;
4673
4674                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4675                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4676                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4677                                                                   actions,
4678                                                                   item_flags,
4679                                                                   error);
4680                         if (ret < 0)
4681                                 return ret;
4682                         /* Count all modify-header actions as one action. */
4683                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4684                                 ++actions_n;
4685                         action_flags |= actions->type ==
4686                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4687                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4688                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4689                         break;
4690                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4691                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4692                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4693                                                                   actions,
4694                                                                   item_flags,
4695                                                                   error);
4696                         if (ret < 0)
4697                                 return ret;
4698                         /* Count all modify-header actions as one action. */
4699                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4700                                 ++actions_n;
4701                         action_flags |= actions->type ==
4702                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4703                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4704                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4705                         break;
4706                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4707                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4708                         ret = flow_dv_validate_action_modify_tp(action_flags,
4709                                                                 actions,
4710                                                                 item_flags,
4711                                                                 error);
4712                         if (ret < 0)
4713                                 return ret;
4714                         /* Count all modify-header actions as one action. */
4715                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4716                                 ++actions_n;
4717                         action_flags |= actions->type ==
4718                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4719                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4720                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4721                         break;
4722                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4723                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4724                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4725                                                                  actions,
4726                                                                  item_flags,
4727                                                                  error);
4728                         if (ret < 0)
4729                                 return ret;
4730                         /* Count all modify-header actions as one action. */
4731                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4732                                 ++actions_n;
4733                         action_flags |= actions->type ==
4734                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4735                                                 MLX5_FLOW_ACTION_SET_TTL :
4736                                                 MLX5_FLOW_ACTION_DEC_TTL;
4737                         break;
4738                 case RTE_FLOW_ACTION_TYPE_JUMP:
4739                         ret = flow_dv_validate_action_jump(actions,
4740                                                            action_flags,
4741                                                            attr, external,
4742                                                            error);
4743                         if (ret)
4744                                 return ret;
4745                         ++actions_n;
4746                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4747                         break;
4748                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4749                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4750                         ret = flow_dv_validate_action_modify_tcp_seq
4751                                                                 (action_flags,
4752                                                                  actions,
4753                                                                  item_flags,
4754                                                                  error);
4755                         if (ret < 0)
4756                                 return ret;
4757                         /* Count all modify-header actions as one action. */
4758                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4759                                 ++actions_n;
4760                         action_flags |= actions->type ==
4761                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4762                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4763                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4764                         break;
4765                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4766                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4767                         ret = flow_dv_validate_action_modify_tcp_ack
4768                                                                 (action_flags,
4769                                                                  actions,
4770                                                                  item_flags,
4771                                                                  error);
4772                         if (ret < 0)
4773                                 return ret;
4774                         /* Count all modify-header actions as one action. */
4775                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4776                                 ++actions_n;
4777                         action_flags |= actions->type ==
4778                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4779                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4780                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4781                         break;
4782                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4783                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4784                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4785                         break;
4786                 case RTE_FLOW_ACTION_TYPE_METER:
4787                         ret = mlx5_flow_validate_action_meter(dev,
4788                                                               action_flags,
4789                                                               actions, attr,
4790                                                               error);
4791                         if (ret < 0)
4792                                 return ret;
4793                         action_flags |= MLX5_FLOW_ACTION_METER;
4794                         ++actions_n;
4795                         break;
4796                 default:
4797                         return rte_flow_error_set(error, ENOTSUP,
4798                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4799                                                   actions,
4800                                                   "action not supported");
4801                 }
4802         }
4803         if ((action_flags & MLX5_FLOW_LAYER_TUNNEL) &&
4804             (action_flags & MLX5_FLOW_VLAN_ACTIONS))
4805                 return rte_flow_error_set(error, ENOTSUP,
4806                                           RTE_FLOW_ERROR_TYPE_ACTION,
4807                                           actions,
4808                                           "can't have vxlan and vlan"
4809                                           " actions in the same rule");
4810         /* Eswitch has few restrictions on using items and actions */
4811         if (attr->transfer) {
4812                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4813                     action_flags & MLX5_FLOW_ACTION_FLAG)
4814                         return rte_flow_error_set(error, ENOTSUP,
4815                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4816                                                   NULL,
4817                                                   "unsupported action FLAG");
4818                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4819                     action_flags & MLX5_FLOW_ACTION_MARK)
4820                         return rte_flow_error_set(error, ENOTSUP,
4821                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4822                                                   NULL,
4823                                                   "unsupported action MARK");
4824                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
4825                         return rte_flow_error_set(error, ENOTSUP,
4826                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4827                                                   NULL,
4828                                                   "unsupported action QUEUE");
4829                 if (action_flags & MLX5_FLOW_ACTION_RSS)
4830                         return rte_flow_error_set(error, ENOTSUP,
4831                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4832                                                   NULL,
4833                                                   "unsupported action RSS");
4834                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4835                         return rte_flow_error_set(error, EINVAL,
4836                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4837                                                   actions,
4838                                                   "no fate action is found");
4839         } else {
4840                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
4841                         return rte_flow_error_set(error, EINVAL,
4842                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4843                                                   actions,
4844                                                   "no fate action is found");
4845         }
4846         return 0;
4847 }
4848
4849 /**
4850  * Internal preparation function. Allocates the DV flow size,
4851  * this size is constant.
4852  *
4853  * @param[in] attr
4854  *   Pointer to the flow attributes.
4855  * @param[in] items
4856  *   Pointer to the list of items.
4857  * @param[in] actions
4858  *   Pointer to the list of actions.
4859  * @param[out] error
4860  *   Pointer to the error structure.
4861  *
4862  * @return
4863  *   Pointer to mlx5_flow object on success,
4864  *   otherwise NULL and rte_errno is set.
4865  */
4866 static struct mlx5_flow *
4867 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
4868                 const struct rte_flow_item items[] __rte_unused,
4869                 const struct rte_flow_action actions[] __rte_unused,
4870                 struct rte_flow_error *error)
4871 {
4872         size_t size = sizeof(struct mlx5_flow);
4873         struct mlx5_flow *dev_flow;
4874
4875         dev_flow = rte_calloc(__func__, 1, size, 0);
4876         if (!dev_flow) {
4877                 rte_flow_error_set(error, ENOMEM,
4878                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4879                                    "not enough memory to create flow");
4880                 return NULL;
4881         }
4882         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
4883         dev_flow->ingress = attr->ingress;
4884         dev_flow->transfer = attr->transfer;
4885         return dev_flow;
4886 }
4887
4888 #ifndef NDEBUG
4889 /**
4890  * Sanity check for match mask and value. Similar to check_valid_spec() in
4891  * kernel driver. If unmasked bit is present in value, it returns failure.
4892  *
4893  * @param match_mask
4894  *   pointer to match mask buffer.
4895  * @param match_value
4896  *   pointer to match value buffer.
4897  *
4898  * @return
4899  *   0 if valid, -EINVAL otherwise.
4900  */
4901 static int
4902 flow_dv_check_valid_spec(void *match_mask, void *match_value)
4903 {
4904         uint8_t *m = match_mask;
4905         uint8_t *v = match_value;
4906         unsigned int i;
4907
4908         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
4909                 if (v[i] & ~m[i]) {
4910                         DRV_LOG(ERR,
4911                                 "match_value differs from match_criteria"
4912                                 " %p[%u] != %p[%u]",
4913                                 match_value, i, match_mask, i);
4914                         return -EINVAL;
4915                 }
4916         }
4917         return 0;
4918 }
4919 #endif
4920
4921 /**
4922  * Add Ethernet item to matcher and to the value.
4923  *
4924  * @param[in, out] matcher
4925  *   Flow matcher.
4926  * @param[in, out] key
4927  *   Flow matcher value.
4928  * @param[in] item
4929  *   Flow pattern to translate.
4930  * @param[in] inner
4931  *   Item is inner pattern.
4932  */
4933 static void
4934 flow_dv_translate_item_eth(void *matcher, void *key,
4935                            const struct rte_flow_item *item, int inner)
4936 {
4937         const struct rte_flow_item_eth *eth_m = item->mask;
4938         const struct rte_flow_item_eth *eth_v = item->spec;
4939         const struct rte_flow_item_eth nic_mask = {
4940                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4941                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4942                 .type = RTE_BE16(0xffff),
4943         };
4944         void *headers_m;
4945         void *headers_v;
4946         char *l24_v;
4947         unsigned int i;
4948
4949         if (!eth_v)
4950                 return;
4951         if (!eth_m)
4952                 eth_m = &nic_mask;
4953         if (inner) {
4954                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4955                                          inner_headers);
4956                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4957         } else {
4958                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4959                                          outer_headers);
4960                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4961         }
4962         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
4963                &eth_m->dst, sizeof(eth_m->dst));
4964         /* The value must be in the range of the mask. */
4965         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
4966         for (i = 0; i < sizeof(eth_m->dst); ++i)
4967                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
4968         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
4969                &eth_m->src, sizeof(eth_m->src));
4970         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
4971         /* The value must be in the range of the mask. */
4972         for (i = 0; i < sizeof(eth_m->dst); ++i)
4973                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
4974         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
4975                  rte_be_to_cpu_16(eth_m->type));
4976         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
4977         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
4978 }
4979
4980 /**
4981  * Add VLAN item to matcher and to the value.
4982  *
4983  * @param[in, out] dev_flow
4984  *   Flow descriptor.
4985  * @param[in, out] matcher
4986  *   Flow matcher.
4987  * @param[in, out] key
4988  *   Flow matcher value.
4989  * @param[in] item
4990  *   Flow pattern to translate.
4991  * @param[in] inner
4992  *   Item is inner pattern.
4993  */
4994 static void
4995 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
4996                             void *matcher, void *key,
4997                             const struct rte_flow_item *item,
4998                             int inner)
4999 {
5000         const struct rte_flow_item_vlan *vlan_m = item->mask;
5001         const struct rte_flow_item_vlan *vlan_v = item->spec;
5002         void *headers_m;
5003         void *headers_v;
5004         uint16_t tci_m;
5005         uint16_t tci_v;
5006
5007         if (!vlan_v)
5008                 return;
5009         if (!vlan_m)
5010                 vlan_m = &rte_flow_item_vlan_mask;
5011         if (inner) {
5012                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5013                                          inner_headers);
5014                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5015         } else {
5016                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5017                                          outer_headers);
5018                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5019                 /*
5020                  * This is workaround, masks are not supported,
5021                  * and pre-validated.
5022                  */
5023                 dev_flow->dv.vf_vlan.tag =
5024                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5025         }
5026         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5027         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5028         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5029         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5030         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5031         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5032         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5033         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5034         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5035         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5036         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5037                  rte_be_to_cpu_16(vlan_m->inner_type));
5038         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5039                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5040 }
5041
5042 /**
5043  * Add IPV4 item to matcher and to the value.
5044  *
5045  * @param[in, out] matcher
5046  *   Flow matcher.
5047  * @param[in, out] key
5048  *   Flow matcher value.
5049  * @param[in] item
5050  *   Flow pattern to translate.
5051  * @param[in] inner
5052  *   Item is inner pattern.
5053  * @param[in] group
5054  *   The group to insert the rule.
5055  */
5056 static void
5057 flow_dv_translate_item_ipv4(void *matcher, void *key,
5058                             const struct rte_flow_item *item,
5059                             int inner, uint32_t group)
5060 {
5061         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5062         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5063         const struct rte_flow_item_ipv4 nic_mask = {
5064                 .hdr = {
5065                         .src_addr = RTE_BE32(0xffffffff),
5066                         .dst_addr = RTE_BE32(0xffffffff),
5067                         .type_of_service = 0xff,
5068                         .next_proto_id = 0xff,
5069                 },
5070         };
5071         void *headers_m;
5072         void *headers_v;
5073         char *l24_m;
5074         char *l24_v;
5075         uint8_t tos;
5076
5077         if (inner) {
5078                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5079                                          inner_headers);
5080                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5081         } else {
5082                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5083                                          outer_headers);
5084                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5085         }
5086         if (group == 0)
5087                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5088         else
5089                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5090         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5091         if (!ipv4_v)
5092                 return;
5093         if (!ipv4_m)
5094                 ipv4_m = &nic_mask;
5095         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5096                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5097         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5098                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5099         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5100         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5101         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5102                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5103         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5104                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5105         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5106         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5107         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5108         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5109                  ipv4_m->hdr.type_of_service);
5110         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5111         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5112                  ipv4_m->hdr.type_of_service >> 2);
5113         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5114         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5115                  ipv4_m->hdr.next_proto_id);
5116         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5117                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5118 }
5119
5120 /**
5121  * Add IPV6 item to matcher and to the value.
5122  *
5123  * @param[in, out] matcher
5124  *   Flow matcher.
5125  * @param[in, out] key
5126  *   Flow matcher value.
5127  * @param[in] item
5128  *   Flow pattern to translate.
5129  * @param[in] inner
5130  *   Item is inner pattern.
5131  * @param[in] group
5132  *   The group to insert the rule.
5133  */
5134 static void
5135 flow_dv_translate_item_ipv6(void *matcher, void *key,
5136                             const struct rte_flow_item *item,
5137                             int inner, uint32_t group)
5138 {
5139         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5140         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5141         const struct rte_flow_item_ipv6 nic_mask = {
5142                 .hdr = {
5143                         .src_addr =
5144                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5145                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5146                         .dst_addr =
5147                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5148                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5149                         .vtc_flow = RTE_BE32(0xffffffff),
5150                         .proto = 0xff,
5151                         .hop_limits = 0xff,
5152                 },
5153         };
5154         void *headers_m;
5155         void *headers_v;
5156         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5157         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5158         char *l24_m;
5159         char *l24_v;
5160         uint32_t vtc_m;
5161         uint32_t vtc_v;
5162         int i;
5163         int size;
5164
5165         if (inner) {
5166                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5167                                          inner_headers);
5168                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5169         } else {
5170                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5171                                          outer_headers);
5172                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5173         }
5174         if (group == 0)
5175                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5176         else
5177                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5178         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5179         if (!ipv6_v)
5180                 return;
5181         if (!ipv6_m)
5182                 ipv6_m = &nic_mask;
5183         size = sizeof(ipv6_m->hdr.dst_addr);
5184         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5185                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5186         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5187                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5188         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5189         for (i = 0; i < size; ++i)
5190                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5191         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5192                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5193         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5194                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5195         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5196         for (i = 0; i < size; ++i)
5197                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5198         /* TOS. */
5199         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5200         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5201         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5202         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5203         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5204         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5205         /* Label. */
5206         if (inner) {
5207                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5208                          vtc_m);
5209                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5210                          vtc_v);
5211         } else {
5212                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5213                          vtc_m);
5214                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5215                          vtc_v);
5216         }
5217         /* Protocol. */
5218         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5219                  ipv6_m->hdr.proto);
5220         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5221                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5222 }
5223
5224 /**
5225  * Add TCP item to matcher and to the value.
5226  *
5227  * @param[in, out] matcher
5228  *   Flow matcher.
5229  * @param[in, out] key
5230  *   Flow matcher value.
5231  * @param[in] item
5232  *   Flow pattern to translate.
5233  * @param[in] inner
5234  *   Item is inner pattern.
5235  */
5236 static void
5237 flow_dv_translate_item_tcp(void *matcher, void *key,
5238                            const struct rte_flow_item *item,
5239                            int inner)
5240 {
5241         const struct rte_flow_item_tcp *tcp_m = item->mask;
5242         const struct rte_flow_item_tcp *tcp_v = item->spec;
5243         void *headers_m;
5244         void *headers_v;
5245
5246         if (inner) {
5247                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5248                                          inner_headers);
5249                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5250         } else {
5251                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5252                                          outer_headers);
5253                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5254         }
5255         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5256         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5257         if (!tcp_v)
5258                 return;
5259         if (!tcp_m)
5260                 tcp_m = &rte_flow_item_tcp_mask;
5261         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5262                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5263         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5264                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5265         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5266                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5267         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5268                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5269         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5270                  tcp_m->hdr.tcp_flags);
5271         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5272                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5273 }
5274
5275 /**
5276  * Add UDP item to matcher and to the value.
5277  *
5278  * @param[in, out] matcher
5279  *   Flow matcher.
5280  * @param[in, out] key
5281  *   Flow matcher value.
5282  * @param[in] item
5283  *   Flow pattern to translate.
5284  * @param[in] inner
5285  *   Item is inner pattern.
5286  */
5287 static void
5288 flow_dv_translate_item_udp(void *matcher, void *key,
5289                            const struct rte_flow_item *item,
5290                            int inner)
5291 {
5292         const struct rte_flow_item_udp *udp_m = item->mask;
5293         const struct rte_flow_item_udp *udp_v = item->spec;
5294         void *headers_m;
5295         void *headers_v;
5296
5297         if (inner) {
5298                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5299                                          inner_headers);
5300                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5301         } else {
5302                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5303                                          outer_headers);
5304                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5305         }
5306         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5307         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5308         if (!udp_v)
5309                 return;
5310         if (!udp_m)
5311                 udp_m = &rte_flow_item_udp_mask;
5312         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5313                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5314         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5315                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5316         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5317                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5318         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5319                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5320 }
5321
5322 /**
5323  * Add GRE optional Key item to matcher and to the value.
5324  *
5325  * @param[in, out] matcher
5326  *   Flow matcher.
5327  * @param[in, out] key
5328  *   Flow matcher value.
5329  * @param[in] item
5330  *   Flow pattern to translate.
5331  * @param[in] inner
5332  *   Item is inner pattern.
5333  */
5334 static void
5335 flow_dv_translate_item_gre_key(void *matcher, void *key,
5336                                    const struct rte_flow_item *item)
5337 {
5338         const rte_be32_t *key_m = item->mask;
5339         const rte_be32_t *key_v = item->spec;
5340         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5341         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5342         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5343
5344         if (!key_v)
5345                 return;
5346         if (!key_m)
5347                 key_m = &gre_key_default_mask;
5348         /* GRE K bit must be on and should already be validated */
5349         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5350         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5351         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5352                  rte_be_to_cpu_32(*key_m) >> 8);
5353         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5354                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5355         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5356                  rte_be_to_cpu_32(*key_m) & 0xFF);
5357         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5358                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5359 }
5360
5361 /**
5362  * Add GRE item to matcher and to the value.
5363  *
5364  * @param[in, out] matcher
5365  *   Flow matcher.
5366  * @param[in, out] key
5367  *   Flow matcher value.
5368  * @param[in] item
5369  *   Flow pattern to translate.
5370  * @param[in] inner
5371  *   Item is inner pattern.
5372  */
5373 static void
5374 flow_dv_translate_item_gre(void *matcher, void *key,
5375                            const struct rte_flow_item *item,
5376                            int inner)
5377 {
5378         const struct rte_flow_item_gre *gre_m = item->mask;
5379         const struct rte_flow_item_gre *gre_v = item->spec;
5380         void *headers_m;
5381         void *headers_v;
5382         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5383         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5384         struct {
5385                 union {
5386                         __extension__
5387                         struct {
5388                                 uint16_t version:3;
5389                                 uint16_t rsvd0:9;
5390                                 uint16_t s_present:1;
5391                                 uint16_t k_present:1;
5392                                 uint16_t rsvd_bit1:1;
5393                                 uint16_t c_present:1;
5394                         };
5395                         uint16_t value;
5396                 };
5397         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5398
5399         if (inner) {
5400                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5401                                          inner_headers);
5402                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5403         } else {
5404                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5405                                          outer_headers);
5406                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5407         }
5408         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5409         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5410         if (!gre_v)
5411                 return;
5412         if (!gre_m)
5413                 gre_m = &rte_flow_item_gre_mask;
5414         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5415                  rte_be_to_cpu_16(gre_m->protocol));
5416         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5417                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5418         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5419         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5420         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5421                  gre_crks_rsvd0_ver_m.c_present);
5422         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5423                  gre_crks_rsvd0_ver_v.c_present &
5424                  gre_crks_rsvd0_ver_m.c_present);
5425         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5426                  gre_crks_rsvd0_ver_m.k_present);
5427         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5428                  gre_crks_rsvd0_ver_v.k_present &
5429                  gre_crks_rsvd0_ver_m.k_present);
5430         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5431                  gre_crks_rsvd0_ver_m.s_present);
5432         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5433                  gre_crks_rsvd0_ver_v.s_present &
5434                  gre_crks_rsvd0_ver_m.s_present);
5435 }
5436
5437 /**
5438  * Add NVGRE item to matcher and to the value.
5439  *
5440  * @param[in, out] matcher
5441  *   Flow matcher.
5442  * @param[in, out] key
5443  *   Flow matcher value.
5444  * @param[in] item
5445  *   Flow pattern to translate.
5446  * @param[in] inner
5447  *   Item is inner pattern.
5448  */
5449 static void
5450 flow_dv_translate_item_nvgre(void *matcher, void *key,
5451                              const struct rte_flow_item *item,
5452                              int inner)
5453 {
5454         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5455         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5456         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5457         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5458         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5459         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5460         char *gre_key_m;
5461         char *gre_key_v;
5462         int size;
5463         int i;
5464
5465         /* For NVGRE, GRE header fields must be set with defined values. */
5466         const struct rte_flow_item_gre gre_spec = {
5467                 .c_rsvd0_ver = RTE_BE16(0x2000),
5468                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5469         };
5470         const struct rte_flow_item_gre gre_mask = {
5471                 .c_rsvd0_ver = RTE_BE16(0xB000),
5472                 .protocol = RTE_BE16(UINT16_MAX),
5473         };
5474         const struct rte_flow_item gre_item = {
5475                 .spec = &gre_spec,
5476                 .mask = &gre_mask,
5477                 .last = NULL,
5478         };
5479         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5480         if (!nvgre_v)
5481                 return;
5482         if (!nvgre_m)
5483                 nvgre_m = &rte_flow_item_nvgre_mask;
5484         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5485         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5486         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5487         memcpy(gre_key_m, tni_flow_id_m, size);
5488         for (i = 0; i < size; ++i)
5489                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5490 }
5491
5492 /**
5493  * Add VXLAN item to matcher and to the value.
5494  *
5495  * @param[in, out] matcher
5496  *   Flow matcher.
5497  * @param[in, out] key
5498  *   Flow matcher value.
5499  * @param[in] item
5500  *   Flow pattern to translate.
5501  * @param[in] inner
5502  *   Item is inner pattern.
5503  */
5504 static void
5505 flow_dv_translate_item_vxlan(void *matcher, void *key,
5506                              const struct rte_flow_item *item,
5507                              int inner)
5508 {
5509         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5510         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5511         void *headers_m;
5512         void *headers_v;
5513         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5514         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5515         char *vni_m;
5516         char *vni_v;
5517         uint16_t dport;
5518         int size;
5519         int i;
5520
5521         if (inner) {
5522                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5523                                          inner_headers);
5524                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5525         } else {
5526                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5527                                          outer_headers);
5528                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5529         }
5530         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5531                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5532         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5533                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5534                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5535         }
5536         if (!vxlan_v)
5537                 return;
5538         if (!vxlan_m)
5539                 vxlan_m = &rte_flow_item_vxlan_mask;
5540         size = sizeof(vxlan_m->vni);
5541         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5542         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5543         memcpy(vni_m, vxlan_m->vni, size);
5544         for (i = 0; i < size; ++i)
5545                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5546 }
5547
5548 /**
5549  * Add Geneve item to matcher and to the value.
5550  *
5551  * @param[in, out] matcher
5552  *   Flow matcher.
5553  * @param[in, out] key
5554  *   Flow matcher value.
5555  * @param[in] item
5556  *   Flow pattern to translate.
5557  * @param[in] inner
5558  *   Item is inner pattern.
5559  */
5560
5561 static void
5562 flow_dv_translate_item_geneve(void *matcher, void *key,
5563                               const struct rte_flow_item *item, int inner)
5564 {
5565         const struct rte_flow_item_geneve *geneve_m = item->mask;
5566         const struct rte_flow_item_geneve *geneve_v = item->spec;
5567         void *headers_m;
5568         void *headers_v;
5569         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5570         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5571         uint16_t dport;
5572         uint16_t gbhdr_m;
5573         uint16_t gbhdr_v;
5574         char *vni_m;
5575         char *vni_v;
5576         size_t size, i;
5577
5578         if (inner) {
5579                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5580                                          inner_headers);
5581                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5582         } else {
5583                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5584                                          outer_headers);
5585                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5586         }
5587         dport = MLX5_UDP_PORT_GENEVE;
5588         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5589                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5590                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5591         }
5592         if (!geneve_v)
5593                 return;
5594         if (!geneve_m)
5595                 geneve_m = &rte_flow_item_geneve_mask;
5596         size = sizeof(geneve_m->vni);
5597         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5598         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5599         memcpy(vni_m, geneve_m->vni, size);
5600         for (i = 0; i < size; ++i)
5601                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5602         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5603                  rte_be_to_cpu_16(geneve_m->protocol));
5604         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5605                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5606         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5607         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5608         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5609                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5610         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5611                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5612         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5613                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5614         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5615                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5616                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5617 }
5618
5619 /**
5620  * Add MPLS item to matcher and to the value.
5621  *
5622  * @param[in, out] matcher
5623  *   Flow matcher.
5624  * @param[in, out] key
5625  *   Flow matcher value.
5626  * @param[in] item
5627  *   Flow pattern to translate.
5628  * @param[in] prev_layer
5629  *   The protocol layer indicated in previous item.
5630  * @param[in] inner
5631  *   Item is inner pattern.
5632  */
5633 static void
5634 flow_dv_translate_item_mpls(void *matcher, void *key,
5635                             const struct rte_flow_item *item,
5636                             uint64_t prev_layer,
5637                             int inner)
5638 {
5639         const uint32_t *in_mpls_m = item->mask;
5640         const uint32_t *in_mpls_v = item->spec;
5641         uint32_t *out_mpls_m = 0;
5642         uint32_t *out_mpls_v = 0;
5643         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5644         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5645         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5646                                      misc_parameters_2);
5647         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5648         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5649         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5650
5651         switch (prev_layer) {
5652         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5653                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5654                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5655                          MLX5_UDP_PORT_MPLS);
5656                 break;
5657         case MLX5_FLOW_LAYER_GRE:
5658                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5659                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5660                          RTE_ETHER_TYPE_MPLS);
5661                 break;
5662         default:
5663                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5664                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5665                          IPPROTO_MPLS);
5666                 break;
5667         }
5668         if (!in_mpls_v)
5669                 return;
5670         if (!in_mpls_m)
5671                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5672         switch (prev_layer) {
5673         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5674                 out_mpls_m =
5675                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5676                                                  outer_first_mpls_over_udp);
5677                 out_mpls_v =
5678                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5679                                                  outer_first_mpls_over_udp);
5680                 break;
5681         case MLX5_FLOW_LAYER_GRE:
5682                 out_mpls_m =
5683                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5684                                                  outer_first_mpls_over_gre);
5685                 out_mpls_v =
5686                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5687                                                  outer_first_mpls_over_gre);
5688                 break;
5689         default:
5690                 /* Inner MPLS not over GRE is not supported. */
5691                 if (!inner) {
5692                         out_mpls_m =
5693                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5694                                                          misc2_m,
5695                                                          outer_first_mpls);
5696                         out_mpls_v =
5697                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5698                                                          misc2_v,
5699                                                          outer_first_mpls);
5700                 }
5701                 break;
5702         }
5703         if (out_mpls_m && out_mpls_v) {
5704                 *out_mpls_m = *in_mpls_m;
5705                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5706         }
5707 }
5708
5709 /**
5710  * Add metadata register item to matcher
5711  *
5712  * @param[in, out] matcher
5713  *   Flow matcher.
5714  * @param[in, out] key
5715  *   Flow matcher value.
5716  * @param[in] reg_type
5717  *   Type of device metadata register
5718  * @param[in] value
5719  *   Register value
5720  * @param[in] mask
5721  *   Register mask
5722  */
5723 static void
5724 flow_dv_match_meta_reg(void *matcher, void *key,
5725                        enum modify_reg reg_type,
5726                        uint32_t data, uint32_t mask)
5727 {
5728         void *misc2_m =
5729                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5730         void *misc2_v =
5731                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5732
5733         data &= mask;
5734         switch (reg_type) {
5735         case REG_A:
5736                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5737                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5738                 break;
5739         case REG_B:
5740                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5741                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5742                 break;
5743         case REG_C_0:
5744                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, mask);
5745                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, data);
5746                 break;
5747         case REG_C_1:
5748                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5749                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5750                 break;
5751         case REG_C_2:
5752                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5753                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5754                 break;
5755         case REG_C_3:
5756                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
5757                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
5758                 break;
5759         case REG_C_4:
5760                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
5761                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
5762                 break;
5763         case REG_C_5:
5764                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
5765                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
5766                 break;
5767         case REG_C_6:
5768                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
5769                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
5770                 break;
5771         case REG_C_7:
5772                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
5773                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
5774                 break;
5775         default:
5776                 assert(false);
5777                 break;
5778         }
5779 }
5780
5781 /**
5782  * Add MARK item to matcher
5783  *
5784  * @param[in] dev
5785  *   The device to configure through.
5786  * @param[in, out] matcher
5787  *   Flow matcher.
5788  * @param[in, out] key
5789  *   Flow matcher value.
5790  * @param[in] item
5791  *   Flow pattern to translate.
5792  */
5793 static void
5794 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
5795                             void *matcher, void *key,
5796                             const struct rte_flow_item *item)
5797 {
5798         struct mlx5_priv *priv = dev->data->dev_private;
5799         const struct rte_flow_item_mark *mark;
5800         uint32_t value;
5801         uint32_t mask;
5802
5803         mark = item->mask ? (const void *)item->mask :
5804                             &rte_flow_item_mark_mask;
5805         mask = mark->id & priv->sh->dv_mark_mask;
5806         mark = (const void *)item->spec;
5807         assert(mark);
5808         value = mark->id & priv->sh->dv_mark_mask & mask;
5809         if (mask) {
5810                 enum modify_reg reg;
5811
5812                 /* Get the metadata register index for the mark. */
5813                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
5814                 assert(reg > 0);
5815                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5816         }
5817 }
5818
5819 /**
5820  * Add META item to matcher
5821  *
5822  * @param[in] dev
5823  *   The devich to configure through.
5824  * @param[in, out] matcher
5825  *   Flow matcher.
5826  * @param[in, out] key
5827  *   Flow matcher value.
5828  * @param[in] attr
5829  *   Attributes of flow that includes this item.
5830  * @param[in] item
5831  *   Flow pattern to translate.
5832  */
5833 static void
5834 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
5835                             void *matcher, void *key,
5836                             const struct rte_flow_attr *attr,
5837                             const struct rte_flow_item *item)
5838 {
5839         const struct rte_flow_item_meta *meta_m;
5840         const struct rte_flow_item_meta *meta_v;
5841
5842         meta_m = (const void *)item->mask;
5843         if (!meta_m)
5844                 meta_m = &rte_flow_item_meta_mask;
5845         meta_v = (const void *)item->spec;
5846         if (meta_v) {
5847                 enum modify_reg reg;
5848                 uint32_t value = meta_v->data;
5849                 uint32_t mask = meta_m->data;
5850
5851                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
5852                 if (reg < 0)
5853                         return;
5854                 /*
5855                  * In datapath code there is no endianness
5856                  * coversions for perfromance reasons, all
5857                  * pattern conversions are done in rte_flow.
5858                  */
5859                 value = rte_cpu_to_be_32(value);
5860                 mask = rte_cpu_to_be_32(mask);
5861                 if (reg == REG_C_0) {
5862                         struct mlx5_priv *priv = dev->data->dev_private;
5863                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
5864                         uint32_t shl_c0 = rte_bsf32(msk_c0);
5865
5866                         msk_c0 = rte_cpu_to_be_32(msk_c0);
5867                         value <<= shl_c0;
5868                         mask <<= shl_c0;
5869                         assert(msk_c0);
5870                         assert(!(~msk_c0 & mask));
5871                 }
5872                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5873         }
5874 }
5875
5876 /**
5877  * Add vport metadata Reg C0 item to matcher
5878  *
5879  * @param[in, out] matcher
5880  *   Flow matcher.
5881  * @param[in, out] key
5882  *   Flow matcher value.
5883  * @param[in] reg
5884  *   Flow pattern to translate.
5885  */
5886 static void
5887 flow_dv_translate_item_meta_vport(void *matcher, void *key,
5888                                   uint32_t value, uint32_t mask)
5889 {
5890         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
5891 }
5892
5893 /**
5894  * Add tag item to matcher
5895  *
5896  * @param[in, out] matcher
5897  *   Flow matcher.
5898  * @param[in, out] key
5899  *   Flow matcher value.
5900  * @param[in] item
5901  *   Flow pattern to translate.
5902  */
5903 static void
5904 flow_dv_translate_mlx5_item_tag(void *matcher, void *key,
5905                                 const struct rte_flow_item *item)
5906 {
5907         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
5908         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
5909
5910         assert(tag_v);
5911         flow_dv_match_meta_reg(matcher, key, tag_v->id, tag_v->data,
5912                                tag_m ? tag_m->data : UINT32_MAX);
5913 }
5914
5915 /**
5916  * Add TAG item to matcher
5917  *
5918  * @param[in] dev
5919  *   The devich to configure through.
5920  * @param[in, out] matcher
5921  *   Flow matcher.
5922  * @param[in, out] key
5923  *   Flow matcher value.
5924  * @param[in] item
5925  *   Flow pattern to translate.
5926  */
5927 static void
5928 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
5929                            void *matcher, void *key,
5930                            const struct rte_flow_item *item)
5931 {
5932         const struct rte_flow_item_tag *tag_v = item->spec;
5933         const struct rte_flow_item_tag *tag_m = item->mask;
5934         enum modify_reg reg;
5935
5936         assert(tag_v);
5937         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
5938         /* Get the metadata register index for the tag. */
5939         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
5940         assert(reg > 0);
5941         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
5942 }
5943
5944 /**
5945  * Add source vport match to the specified matcher.
5946  *
5947  * @param[in, out] matcher
5948  *   Flow matcher.
5949  * @param[in, out] key
5950  *   Flow matcher value.
5951  * @param[in] port
5952  *   Source vport value to match
5953  * @param[in] mask
5954  *   Mask
5955  */
5956 static void
5957 flow_dv_translate_item_source_vport(void *matcher, void *key,
5958                                     int16_t port, uint16_t mask)
5959 {
5960         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5961         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5962
5963         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
5964         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
5965 }
5966
5967 /**
5968  * Translate port-id item to eswitch match on  port-id.
5969  *
5970  * @param[in] dev
5971  *   The devich to configure through.
5972  * @param[in, out] matcher
5973  *   Flow matcher.
5974  * @param[in, out] key
5975  *   Flow matcher value.
5976  * @param[in] item
5977  *   Flow pattern to translate.
5978  *
5979  * @return
5980  *   0 on success, a negative errno value otherwise.
5981  */
5982 static int
5983 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
5984                                void *key, const struct rte_flow_item *item)
5985 {
5986         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
5987         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
5988         struct mlx5_priv *priv;
5989         uint16_t mask, id;
5990
5991         mask = pid_m ? pid_m->id : 0xffff;
5992         id = pid_v ? pid_v->id : dev->data->port_id;
5993         priv = mlx5_port_to_eswitch_info(id, item == NULL);
5994         if (!priv)
5995                 return -rte_errno;
5996         /* Translate to vport field or to metadata, depending on mode. */
5997         if (priv->vport_meta_mask)
5998                 flow_dv_translate_item_meta_vport(matcher, key,
5999                                                   priv->vport_meta_tag,
6000                                                   priv->vport_meta_mask);
6001         else
6002                 flow_dv_translate_item_source_vport(matcher, key,
6003                                                     priv->vport_id, mask);
6004         return 0;
6005 }
6006
6007 /**
6008  * Add ICMP6 item to matcher and to the value.
6009  *
6010  * @param[in, out] matcher
6011  *   Flow matcher.
6012  * @param[in, out] key
6013  *   Flow matcher value.
6014  * @param[in] item
6015  *   Flow pattern to translate.
6016  * @param[in] inner
6017  *   Item is inner pattern.
6018  */
6019 static void
6020 flow_dv_translate_item_icmp6(void *matcher, void *key,
6021                               const struct rte_flow_item *item,
6022                               int inner)
6023 {
6024         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6025         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6026         void *headers_m;
6027         void *headers_v;
6028         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6029                                      misc_parameters_3);
6030         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6031         if (inner) {
6032                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6033                                          inner_headers);
6034                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6035         } else {
6036                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6037                                          outer_headers);
6038                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6039         }
6040         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6041         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6042         if (!icmp6_v)
6043                 return;
6044         if (!icmp6_m)
6045                 icmp6_m = &rte_flow_item_icmp6_mask;
6046         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6047         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6048                  icmp6_v->type & icmp6_m->type);
6049         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6050         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6051                  icmp6_v->code & icmp6_m->code);
6052 }
6053
6054 /**
6055  * Add ICMP item to matcher and to the value.
6056  *
6057  * @param[in, out] matcher
6058  *   Flow matcher.
6059  * @param[in, out] key
6060  *   Flow matcher value.
6061  * @param[in] item
6062  *   Flow pattern to translate.
6063  * @param[in] inner
6064  *   Item is inner pattern.
6065  */
6066 static void
6067 flow_dv_translate_item_icmp(void *matcher, void *key,
6068                             const struct rte_flow_item *item,
6069                             int inner)
6070 {
6071         const struct rte_flow_item_icmp *icmp_m = item->mask;
6072         const struct rte_flow_item_icmp *icmp_v = item->spec;
6073         void *headers_m;
6074         void *headers_v;
6075         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6076                                      misc_parameters_3);
6077         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6078         if (inner) {
6079                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6080                                          inner_headers);
6081                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6082         } else {
6083                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6084                                          outer_headers);
6085                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6086         }
6087         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6088         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6089         if (!icmp_v)
6090                 return;
6091         if (!icmp_m)
6092                 icmp_m = &rte_flow_item_icmp_mask;
6093         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6094                  icmp_m->hdr.icmp_type);
6095         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6096                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6097         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6098                  icmp_m->hdr.icmp_code);
6099         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6100                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6101 }
6102
6103 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6104
6105 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6106         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6107                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6108
6109 /**
6110  * Calculate flow matcher enable bitmap.
6111  *
6112  * @param match_criteria
6113  *   Pointer to flow matcher criteria.
6114  *
6115  * @return
6116  *   Bitmap of enabled fields.
6117  */
6118 static uint8_t
6119 flow_dv_matcher_enable(uint32_t *match_criteria)
6120 {
6121         uint8_t match_criteria_enable;
6122
6123         match_criteria_enable =
6124                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6125                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6126         match_criteria_enable |=
6127                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6128                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6129         match_criteria_enable |=
6130                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6131                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6132         match_criteria_enable |=
6133                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6134                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6135         match_criteria_enable |=
6136                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6137                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6138         return match_criteria_enable;
6139 }
6140
6141
6142 /**
6143  * Get a flow table.
6144  *
6145  * @param[in, out] dev
6146  *   Pointer to rte_eth_dev structure.
6147  * @param[in] table_id
6148  *   Table id to use.
6149  * @param[in] egress
6150  *   Direction of the table.
6151  * @param[in] transfer
6152  *   E-Switch or NIC flow.
6153  * @param[out] error
6154  *   pointer to error structure.
6155  *
6156  * @return
6157  *   Returns tables resource based on the index, NULL in case of failed.
6158  */
6159 static struct mlx5_flow_tbl_resource *
6160 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6161                          uint32_t table_id, uint8_t egress,
6162                          uint8_t transfer,
6163                          struct rte_flow_error *error)
6164 {
6165         struct mlx5_priv *priv = dev->data->dev_private;
6166         struct mlx5_ibv_shared *sh = priv->sh;
6167         struct mlx5_flow_tbl_resource *tbl;
6168         union mlx5_flow_tbl_key table_key = {
6169                 {
6170                         .table_id = table_id,
6171                         .reserved = 0,
6172                         .domain = !!transfer,
6173                         .direction = !!egress,
6174                 }
6175         };
6176         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6177                                                          table_key.v64);
6178         struct mlx5_flow_tbl_data_entry *tbl_data;
6179         int ret;
6180         void *domain;
6181
6182         if (pos) {
6183                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6184                                         entry);
6185                 tbl = &tbl_data->tbl;
6186                 rte_atomic32_inc(&tbl->refcnt);
6187                 return tbl;
6188         }
6189         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6190         if (!tbl_data) {
6191                 rte_flow_error_set(error, ENOMEM,
6192                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6193                                    NULL,
6194                                    "cannot allocate flow table data entry");
6195                 return NULL;
6196         }
6197         tbl = &tbl_data->tbl;
6198         pos = &tbl_data->entry;
6199         if (transfer)
6200                 domain = sh->fdb_domain;
6201         else if (egress)
6202                 domain = sh->tx_domain;
6203         else
6204                 domain = sh->rx_domain;
6205         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6206         if (!tbl->obj) {
6207                 rte_flow_error_set(error, ENOMEM,
6208                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6209                                    NULL, "cannot create flow table object");
6210                 rte_free(tbl_data);
6211                 return NULL;
6212         }
6213         /*
6214          * No multi-threads now, but still better to initialize the reference
6215          * count before insert it into the hash list.
6216          */
6217         rte_atomic32_init(&tbl->refcnt);
6218         /* Jump action reference count is initialized here. */
6219         rte_atomic32_init(&tbl_data->jump.refcnt);
6220         pos->key = table_key.v64;
6221         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6222         if (ret < 0) {
6223                 rte_flow_error_set(error, -ret,
6224                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6225                                    "cannot insert flow table data entry");
6226                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6227                 rte_free(tbl_data);
6228         }
6229         rte_atomic32_inc(&tbl->refcnt);
6230         return tbl;
6231 }
6232
6233 /**
6234  * Release a flow table.
6235  *
6236  * @param[in] dev
6237  *   Pointer to rte_eth_dev structure.
6238  * @param[in] tbl
6239  *   Table resource to be released.
6240  *
6241  * @return
6242  *   Returns 0 if table was released, else return 1;
6243  */
6244 static int
6245 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6246                              struct mlx5_flow_tbl_resource *tbl)
6247 {
6248         struct mlx5_priv *priv = dev->data->dev_private;
6249         struct mlx5_ibv_shared *sh = priv->sh;
6250         struct mlx5_flow_tbl_data_entry *tbl_data =
6251                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6252
6253         if (!tbl)
6254                 return 0;
6255         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6256                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6257
6258                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6259                 tbl->obj = NULL;
6260                 /* remove the entry from the hash list and free memory. */
6261                 mlx5_hlist_remove(sh->flow_tbls, pos);
6262                 rte_free(tbl_data);
6263                 return 0;
6264         }
6265         return 1;
6266 }
6267
6268 /**
6269  * Register the flow matcher.
6270  *
6271  * @param[in, out] dev
6272  *   Pointer to rte_eth_dev structure.
6273  * @param[in, out] matcher
6274  *   Pointer to flow matcher.
6275  * @param[in, out] key
6276  *   Pointer to flow table key.
6277  * @parm[in, out] dev_flow
6278  *   Pointer to the dev_flow.
6279  * @param[out] error
6280  *   pointer to error structure.
6281  *
6282  * @return
6283  *   0 on success otherwise -errno and errno is set.
6284  */
6285 static int
6286 flow_dv_matcher_register(struct rte_eth_dev *dev,
6287                          struct mlx5_flow_dv_matcher *matcher,
6288                          union mlx5_flow_tbl_key *key,
6289                          struct mlx5_flow *dev_flow,
6290                          struct rte_flow_error *error)
6291 {
6292         struct mlx5_priv *priv = dev->data->dev_private;
6293         struct mlx5_ibv_shared *sh = priv->sh;
6294         struct mlx5_flow_dv_matcher *cache_matcher;
6295         struct mlx5dv_flow_matcher_attr dv_attr = {
6296                 .type = IBV_FLOW_ATTR_NORMAL,
6297                 .match_mask = (void *)&matcher->mask,
6298         };
6299         struct mlx5_flow_tbl_resource *tbl;
6300         struct mlx5_flow_tbl_data_entry *tbl_data;
6301
6302         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6303                                        key->domain, error);
6304         if (!tbl)
6305                 return -rte_errno;      /* No need to refill the error info */
6306         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6307         /* Lookup from cache. */
6308         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6309                 if (matcher->crc == cache_matcher->crc &&
6310                     matcher->priority == cache_matcher->priority &&
6311                     !memcmp((const void *)matcher->mask.buf,
6312                             (const void *)cache_matcher->mask.buf,
6313                             cache_matcher->mask.size)) {
6314                         DRV_LOG(DEBUG,
6315                                 "%s group %u priority %hd use %s "
6316                                 "matcher %p: refcnt %d++",
6317                                 key->domain ? "FDB" : "NIC", key->table_id,
6318                                 cache_matcher->priority,
6319                                 key->direction ? "tx" : "rx",
6320                                 (void *)cache_matcher,
6321                                 rte_atomic32_read(&cache_matcher->refcnt));
6322                         rte_atomic32_inc(&cache_matcher->refcnt);
6323                         dev_flow->dv.matcher = cache_matcher;
6324                         /* old matcher should not make the table ref++. */
6325                         flow_dv_tbl_resource_release(dev, tbl);
6326                         return 0;
6327                 }
6328         }
6329         /* Register new matcher. */
6330         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6331         if (!cache_matcher) {
6332                 flow_dv_tbl_resource_release(dev, tbl);
6333                 return rte_flow_error_set(error, ENOMEM,
6334                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6335                                           "cannot allocate matcher memory");
6336         }
6337         *cache_matcher = *matcher;
6338         dv_attr.match_criteria_enable =
6339                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6340         dv_attr.priority = matcher->priority;
6341         if (key->direction)
6342                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6343         cache_matcher->matcher_object =
6344                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6345         if (!cache_matcher->matcher_object) {
6346                 rte_free(cache_matcher);
6347 #ifdef HAVE_MLX5DV_DR
6348                 flow_dv_tbl_resource_release(dev, tbl);
6349 #endif
6350                 return rte_flow_error_set(error, ENOMEM,
6351                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6352                                           NULL, "cannot create matcher");
6353         }
6354         /* Save the table information */
6355         cache_matcher->tbl = tbl;
6356         rte_atomic32_init(&cache_matcher->refcnt);
6357         /* only matcher ref++, table ref++ already done above in get API. */
6358         rte_atomic32_inc(&cache_matcher->refcnt);
6359         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6360         dev_flow->dv.matcher = cache_matcher;
6361         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6362                 key->domain ? "FDB" : "NIC", key->table_id,
6363                 cache_matcher->priority,
6364                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6365                 rte_atomic32_read(&cache_matcher->refcnt));
6366         return 0;
6367 }
6368
6369 /**
6370  * Find existing tag resource or create and register a new one.
6371  *
6372  * @param dev[in, out]
6373  *   Pointer to rte_eth_dev structure.
6374  * @param[in, out] tag_be24
6375  *   Tag value in big endian then R-shift 8.
6376  * @parm[in, out] dev_flow
6377  *   Pointer to the dev_flow.
6378  * @param[out] error
6379  *   pointer to error structure.
6380  *
6381  * @return
6382  *   0 on success otherwise -errno and errno is set.
6383  */
6384 static int
6385 flow_dv_tag_resource_register
6386                         (struct rte_eth_dev *dev,
6387                          uint32_t tag_be24,
6388                          struct mlx5_flow *dev_flow,
6389                          struct rte_flow_error *error)
6390 {
6391         struct mlx5_priv *priv = dev->data->dev_private;
6392         struct mlx5_ibv_shared *sh = priv->sh;
6393         struct mlx5_flow_dv_tag_resource *cache_resource;
6394         struct mlx5_hlist_entry *entry;
6395
6396         /* Lookup a matching resource from cache. */
6397         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6398         if (entry) {
6399                 cache_resource = container_of
6400                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6401                 rte_atomic32_inc(&cache_resource->refcnt);
6402                 dev_flow->dv.tag_resource = cache_resource;
6403                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6404                         (void *)cache_resource,
6405                         rte_atomic32_read(&cache_resource->refcnt));
6406                 return 0;
6407         }
6408         /* Register new resource. */
6409         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6410         if (!cache_resource)
6411                 return rte_flow_error_set(error, ENOMEM,
6412                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6413                                           "cannot allocate resource memory");
6414         cache_resource->entry.key = (uint64_t)tag_be24;
6415         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6416         if (!cache_resource->action) {
6417                 rte_free(cache_resource);
6418                 return rte_flow_error_set(error, ENOMEM,
6419                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6420                                           NULL, "cannot create action");
6421         }
6422         rte_atomic32_init(&cache_resource->refcnt);
6423         rte_atomic32_inc(&cache_resource->refcnt);
6424         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6425                 mlx5_glue->destroy_flow_action(cache_resource->action);
6426                 rte_free(cache_resource);
6427                 return rte_flow_error_set(error, EEXIST,
6428                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6429                                           NULL, "cannot insert tag");
6430         }
6431         dev_flow->dv.tag_resource = cache_resource;
6432         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6433                 (void *)cache_resource,
6434                 rte_atomic32_read(&cache_resource->refcnt));
6435         return 0;
6436 }
6437
6438 /**
6439  * Release the tag.
6440  *
6441  * @param dev
6442  *   Pointer to Ethernet device.
6443  * @param flow
6444  *   Pointer to mlx5_flow.
6445  *
6446  * @return
6447  *   1 while a reference on it exists, 0 when freed.
6448  */
6449 static int
6450 flow_dv_tag_release(struct rte_eth_dev *dev,
6451                     struct mlx5_flow_dv_tag_resource *tag)
6452 {
6453         struct mlx5_priv *priv = dev->data->dev_private;
6454         struct mlx5_ibv_shared *sh = priv->sh;
6455
6456         assert(tag);
6457         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6458                 dev->data->port_id, (void *)tag,
6459                 rte_atomic32_read(&tag->refcnt));
6460         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6461                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6462                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6463                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6464                         dev->data->port_id, (void *)tag);
6465                 rte_free(tag);
6466                 return 0;
6467         }
6468         return 1;
6469 }
6470
6471 /**
6472  * Translate port ID action to vport.
6473  *
6474  * @param[in] dev
6475  *   Pointer to rte_eth_dev structure.
6476  * @param[in] action
6477  *   Pointer to the port ID action.
6478  * @param[out] dst_port_id
6479  *   The target port ID.
6480  * @param[out] error
6481  *   Pointer to the error structure.
6482  *
6483  * @return
6484  *   0 on success, a negative errno value otherwise and rte_errno is set.
6485  */
6486 static int
6487 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6488                                  const struct rte_flow_action *action,
6489                                  uint32_t *dst_port_id,
6490                                  struct rte_flow_error *error)
6491 {
6492         uint32_t port;
6493         struct mlx5_priv *priv;
6494         const struct rte_flow_action_port_id *conf =
6495                         (const struct rte_flow_action_port_id *)action->conf;
6496
6497         port = conf->original ? dev->data->port_id : conf->id;
6498         priv = mlx5_port_to_eswitch_info(port, false);
6499         if (!priv)
6500                 return rte_flow_error_set(error, -rte_errno,
6501                                           RTE_FLOW_ERROR_TYPE_ACTION,
6502                                           NULL,
6503                                           "No eswitch info was found for port");
6504         *dst_port_id = priv->vport_id;
6505         return 0;
6506 }
6507
6508 /**
6509  * Add Tx queue matcher
6510  *
6511  * @param[in] dev
6512  *   Pointer to the dev struct.
6513  * @param[in, out] matcher
6514  *   Flow matcher.
6515  * @param[in, out] key
6516  *   Flow matcher value.
6517  * @param[in] item
6518  *   Flow pattern to translate.
6519  * @param[in] inner
6520  *   Item is inner pattern.
6521  */
6522 static void
6523 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6524                                 void *matcher, void *key,
6525                                 const struct rte_flow_item *item)
6526 {
6527         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6528         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6529         void *misc_m =
6530                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6531         void *misc_v =
6532                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6533         struct mlx5_txq_ctrl *txq;
6534         uint32_t queue;
6535
6536
6537         queue_m = (const void *)item->mask;
6538         if (!queue_m)
6539                 return;
6540         queue_v = (const void *)item->spec;
6541         if (!queue_v)
6542                 return;
6543         txq = mlx5_txq_get(dev, queue_v->queue);
6544         if (!txq)
6545                 return;
6546         queue = txq->obj->sq->id;
6547         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6548         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6549                  queue & queue_m->queue);
6550         mlx5_txq_release(dev, queue_v->queue);
6551 }
6552
6553 /**
6554  * Fill the flow with DV spec, lock free
6555  * (mutex should be acquired by caller).
6556  *
6557  * @param[in] dev
6558  *   Pointer to rte_eth_dev structure.
6559  * @param[in, out] dev_flow
6560  *   Pointer to the sub flow.
6561  * @param[in] attr
6562  *   Pointer to the flow attributes.
6563  * @param[in] items
6564  *   Pointer to the list of items.
6565  * @param[in] actions
6566  *   Pointer to the list of actions.
6567  * @param[out] error
6568  *   Pointer to the error structure.
6569  *
6570  * @return
6571  *   0 on success, a negative errno value otherwise and rte_errno is set.
6572  */
6573 static int
6574 __flow_dv_translate(struct rte_eth_dev *dev,
6575                     struct mlx5_flow *dev_flow,
6576                     const struct rte_flow_attr *attr,
6577                     const struct rte_flow_item items[],
6578                     const struct rte_flow_action actions[],
6579                     struct rte_flow_error *error)
6580 {
6581         struct mlx5_priv *priv = dev->data->dev_private;
6582         struct mlx5_dev_config *dev_conf = &priv->config;
6583         struct rte_flow *flow = dev_flow->flow;
6584         uint64_t item_flags = 0;
6585         uint64_t last_item = 0;
6586         uint64_t action_flags = 0;
6587         uint64_t priority = attr->priority;
6588         struct mlx5_flow_dv_matcher matcher = {
6589                 .mask = {
6590                         .size = sizeof(matcher.mask.buf),
6591                 },
6592         };
6593         int actions_n = 0;
6594         bool actions_end = false;
6595         struct mlx5_flow_dv_modify_hdr_resource mhdr_res = {
6596                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
6597                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
6598         };
6599         union flow_dv_attr flow_attr = { .attr = 0 };
6600         uint32_t tag_be;
6601         union mlx5_flow_tbl_key tbl_key;
6602         uint32_t modify_action_position = UINT32_MAX;
6603         void *match_mask = matcher.mask.buf;
6604         void *match_value = dev_flow->dv.value.buf;
6605         uint8_t next_protocol = 0xff;
6606         struct rte_vlan_hdr vlan = { 0 };
6607         uint32_t table;
6608         int ret = 0;
6609
6610         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
6611                                        &table, error);
6612         if (ret)
6613                 return ret;
6614         dev_flow->group = table;
6615         if (attr->transfer)
6616                 mhdr_res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
6617         if (priority == MLX5_FLOW_PRIO_RSVD)
6618                 priority = dev_conf->flow_prio - 1;
6619         for (; !actions_end ; actions++) {
6620                 const struct rte_flow_action_queue *queue;
6621                 const struct rte_flow_action_rss *rss;
6622                 const struct rte_flow_action *action = actions;
6623                 const struct rte_flow_action_count *count = action->conf;
6624                 const uint8_t *rss_key;
6625                 const struct rte_flow_action_jump *jump_data;
6626                 const struct rte_flow_action_meter *mtr;
6627                 struct mlx5_flow_tbl_resource *tbl;
6628                 uint32_t port_id = 0;
6629                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
6630                 int action_type = actions->type;
6631                 const struct rte_flow_action *found_action = NULL;
6632
6633                 switch (action_type) {
6634                 case RTE_FLOW_ACTION_TYPE_VOID:
6635                         break;
6636                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
6637                         if (flow_dv_translate_action_port_id(dev, action,
6638                                                              &port_id, error))
6639                                 return -rte_errno;
6640                         port_id_resource.port_id = port_id;
6641                         if (flow_dv_port_id_action_resource_register
6642                             (dev, &port_id_resource, dev_flow, error))
6643                                 return -rte_errno;
6644                         dev_flow->dv.actions[actions_n++] =
6645                                 dev_flow->dv.port_id_action->action;
6646                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
6647                         break;
6648                 case RTE_FLOW_ACTION_TYPE_FLAG:
6649                         action_flags |= MLX5_FLOW_ACTION_FLAG;
6650                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6651                                 struct rte_flow_action_mark mark = {
6652                                         .id = MLX5_FLOW_MARK_DEFAULT,
6653                                 };
6654
6655                                 if (flow_dv_convert_action_mark(dev, &mark,
6656                                                                 &mhdr_res,
6657                                                                 error))
6658                                         return -rte_errno;
6659                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6660                                 break;
6661                         }
6662                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
6663                         if (!dev_flow->dv.tag_resource)
6664                                 if (flow_dv_tag_resource_register
6665                                     (dev, tag_be, dev_flow, error))
6666                                         return -rte_errno;
6667                         dev_flow->dv.actions[actions_n++] =
6668                                 dev_flow->dv.tag_resource->action;
6669                         break;
6670                 case RTE_FLOW_ACTION_TYPE_MARK:
6671                         action_flags |= MLX5_FLOW_ACTION_MARK;
6672                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6673                                 const struct rte_flow_action_mark *mark =
6674                                         (const struct rte_flow_action_mark *)
6675                                                 actions->conf;
6676
6677                                 if (flow_dv_convert_action_mark(dev, mark,
6678                                                                 &mhdr_res,
6679                                                                 error))
6680                                         return -rte_errno;
6681                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6682                                 break;
6683                         }
6684                         /* Fall-through */
6685                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
6686                         /* Legacy (non-extensive) MARK action. */
6687                         tag_be = mlx5_flow_mark_set
6688                               (((const struct rte_flow_action_mark *)
6689                                (actions->conf))->id);
6690                         if (!dev_flow->dv.tag_resource)
6691                                 if (flow_dv_tag_resource_register
6692                                     (dev, tag_be, dev_flow, error))
6693                                         return -rte_errno;
6694                         dev_flow->dv.actions[actions_n++] =
6695                                 dev_flow->dv.tag_resource->action;
6696                         break;
6697                 case RTE_FLOW_ACTION_TYPE_SET_META:
6698                         if (flow_dv_convert_action_set_meta
6699                                 (dev, &mhdr_res, attr,
6700                                  (const struct rte_flow_action_set_meta *)
6701                                   actions->conf, error))
6702                                 return -rte_errno;
6703                         action_flags |= MLX5_FLOW_ACTION_SET_META;
6704                         break;
6705                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
6706                         if (flow_dv_convert_action_set_tag
6707                                 (dev, &mhdr_res,
6708                                  (const struct rte_flow_action_set_tag *)
6709                                   actions->conf, error))
6710                                 return -rte_errno;
6711                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6712                         break;
6713                 case RTE_FLOW_ACTION_TYPE_DROP:
6714                         action_flags |= MLX5_FLOW_ACTION_DROP;
6715                         break;
6716                 case RTE_FLOW_ACTION_TYPE_QUEUE:
6717                         assert(flow->rss.queue);
6718                         queue = actions->conf;
6719                         flow->rss.queue_num = 1;
6720                         (*flow->rss.queue)[0] = queue->index;
6721                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
6722                         break;
6723                 case RTE_FLOW_ACTION_TYPE_RSS:
6724                         assert(flow->rss.queue);
6725                         rss = actions->conf;
6726                         if (flow->rss.queue)
6727                                 memcpy((*flow->rss.queue), rss->queue,
6728                                        rss->queue_num * sizeof(uint16_t));
6729                         flow->rss.queue_num = rss->queue_num;
6730                         /* NULL RSS key indicates default RSS key. */
6731                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
6732                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
6733                         /*
6734                          * rss->level and rss.types should be set in advance
6735                          * when expanding items for RSS.
6736                          */
6737                         action_flags |= MLX5_FLOW_ACTION_RSS;
6738                         break;
6739                 case RTE_FLOW_ACTION_TYPE_COUNT:
6740                         if (!dev_conf->devx) {
6741                                 rte_errno = ENOTSUP;
6742                                 goto cnt_err;
6743                         }
6744                         flow->counter = flow_dv_counter_alloc(dev,
6745                                                               count->shared,
6746                                                               count->id,
6747                                                               dev_flow->group);
6748                         if (flow->counter == NULL)
6749                                 goto cnt_err;
6750                         dev_flow->dv.actions[actions_n++] =
6751                                 flow->counter->action;
6752                         action_flags |= MLX5_FLOW_ACTION_COUNT;
6753                         break;
6754 cnt_err:
6755                         if (rte_errno == ENOTSUP)
6756                                 return rte_flow_error_set
6757                                               (error, ENOTSUP,
6758                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6759                                                NULL,
6760                                                "count action not supported");
6761                         else
6762                                 return rte_flow_error_set
6763                                                 (error, rte_errno,
6764                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6765                                                  action,
6766                                                  "cannot create counter"
6767                                                   " object.");
6768                         break;
6769                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
6770                         dev_flow->dv.actions[actions_n++] =
6771                                                 priv->sh->pop_vlan_action;
6772                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
6773                         break;
6774                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
6775                         flow_dev_get_vlan_info_from_items(items, &vlan);
6776                         vlan.eth_proto = rte_be_to_cpu_16
6777                              ((((const struct rte_flow_action_of_push_vlan *)
6778                                                    actions->conf)->ethertype));
6779                         found_action = mlx5_flow_find_action
6780                                         (actions + 1,
6781                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
6782                         if (found_action)
6783                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6784                         found_action = mlx5_flow_find_action
6785                                         (actions + 1,
6786                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
6787                         if (found_action)
6788                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6789                         if (flow_dv_create_action_push_vlan
6790                                             (dev, attr, &vlan, dev_flow, error))
6791                                 return -rte_errno;
6792                         dev_flow->dv.actions[actions_n++] =
6793                                            dev_flow->dv.push_vlan_res->action;
6794                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
6795                         break;
6796                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
6797                         /* of_vlan_push action handled this action */
6798                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
6799                         break;
6800                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
6801                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
6802                                 break;
6803                         flow_dev_get_vlan_info_from_items(items, &vlan);
6804                         mlx5_update_vlan_vid_pcp(actions, &vlan);
6805                         /* If no VLAN push - this is a modify header action */
6806                         if (flow_dv_convert_action_modify_vlan_vid
6807                                                 (&mhdr_res, actions, error))
6808                                 return -rte_errno;
6809                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
6810                         break;
6811                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
6812                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
6813                         if (flow_dv_create_action_l2_encap(dev, actions,
6814                                                            dev_flow,
6815                                                            attr->transfer,
6816                                                            error))
6817                                 return -rte_errno;
6818                         dev_flow->dv.actions[actions_n++] =
6819                                 dev_flow->dv.encap_decap->verbs_action;
6820                         action_flags |= actions->type ==
6821                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
6822                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
6823                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
6824                         break;
6825                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
6826                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
6827                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
6828                                                            attr->transfer,
6829                                                            error))
6830                                 return -rte_errno;
6831                         dev_flow->dv.actions[actions_n++] =
6832                                 dev_flow->dv.encap_decap->verbs_action;
6833                         action_flags |= actions->type ==
6834                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
6835                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
6836                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
6837                         break;
6838                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
6839                         /* Handle encap with preceding decap. */
6840                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
6841                                 if (flow_dv_create_action_raw_encap
6842                                         (dev, actions, dev_flow, attr, error))
6843                                         return -rte_errno;
6844                                 dev_flow->dv.actions[actions_n++] =
6845                                         dev_flow->dv.encap_decap->verbs_action;
6846                         } else {
6847                                 /* Handle encap without preceding decap. */
6848                                 if (flow_dv_create_action_l2_encap
6849                                     (dev, actions, dev_flow, attr->transfer,
6850                                      error))
6851                                         return -rte_errno;
6852                                 dev_flow->dv.actions[actions_n++] =
6853                                         dev_flow->dv.encap_decap->verbs_action;
6854                         }
6855                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
6856                         break;
6857                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
6858                         /* Check if this decap is followed by encap. */
6859                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
6860                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
6861                                action++) {
6862                         }
6863                         /* Handle decap only if it isn't followed by encap. */
6864                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
6865                                 if (flow_dv_create_action_l2_decap
6866                                     (dev, dev_flow, attr->transfer, error))
6867                                         return -rte_errno;
6868                                 dev_flow->dv.actions[actions_n++] =
6869                                         dev_flow->dv.encap_decap->verbs_action;
6870                         }
6871                         /* If decap is followed by encap, handle it at encap. */
6872                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
6873                         break;
6874                 case RTE_FLOW_ACTION_TYPE_JUMP:
6875                         jump_data = action->conf;
6876                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
6877                                                        jump_data->group, &table,
6878                                                        error);
6879                         if (ret)
6880                                 return ret;
6881                         tbl = flow_dv_tbl_resource_get(dev, table,
6882                                                        attr->egress,
6883                                                        attr->transfer, error);
6884                         if (!tbl)
6885                                 return rte_flow_error_set
6886                                                 (error, errno,
6887                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6888                                                  NULL,
6889                                                  "cannot create jump action.");
6890                         if (flow_dv_jump_tbl_resource_register
6891                             (dev, tbl, dev_flow, error)) {
6892                                 flow_dv_tbl_resource_release(dev, tbl);
6893                                 return rte_flow_error_set
6894                                                 (error, errno,
6895                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6896                                                  NULL,
6897                                                  "cannot create jump action.");
6898                         }
6899                         dev_flow->dv.actions[actions_n++] =
6900                                 dev_flow->dv.jump->action;
6901                         action_flags |= MLX5_FLOW_ACTION_JUMP;
6902                         break;
6903                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
6904                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
6905                         if (flow_dv_convert_action_modify_mac
6906                                         (&mhdr_res, actions, error))
6907                                 return -rte_errno;
6908                         action_flags |= actions->type ==
6909                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
6910                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
6911                                         MLX5_FLOW_ACTION_SET_MAC_DST;
6912                         break;
6913                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
6914                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
6915                         if (flow_dv_convert_action_modify_ipv4
6916                                         (&mhdr_res, actions, error))
6917                                 return -rte_errno;
6918                         action_flags |= actions->type ==
6919                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
6920                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
6921                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
6922                         break;
6923                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
6924                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
6925                         if (flow_dv_convert_action_modify_ipv6
6926                                         (&mhdr_res, actions, error))
6927                                 return -rte_errno;
6928                         action_flags |= actions->type ==
6929                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
6930                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
6931                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
6932                         break;
6933                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
6934                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
6935                         if (flow_dv_convert_action_modify_tp
6936                                         (&mhdr_res, actions, items,
6937                                          &flow_attr, error))
6938                                 return -rte_errno;
6939                         action_flags |= actions->type ==
6940                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
6941                                         MLX5_FLOW_ACTION_SET_TP_SRC :
6942                                         MLX5_FLOW_ACTION_SET_TP_DST;
6943                         break;
6944                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
6945                         if (flow_dv_convert_action_modify_dec_ttl
6946                                         (&mhdr_res, items, &flow_attr, error))
6947                                 return -rte_errno;
6948                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
6949                         break;
6950                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
6951                         if (flow_dv_convert_action_modify_ttl
6952                                         (&mhdr_res, actions, items,
6953                                          &flow_attr, error))
6954                                 return -rte_errno;
6955                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
6956                         break;
6957                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
6958                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
6959                         if (flow_dv_convert_action_modify_tcp_seq
6960                                         (&mhdr_res, actions, error))
6961                                 return -rte_errno;
6962                         action_flags |= actions->type ==
6963                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
6964                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
6965                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
6966                         break;
6967
6968                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
6969                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
6970                         if (flow_dv_convert_action_modify_tcp_ack
6971                                         (&mhdr_res, actions, error))
6972                                 return -rte_errno;
6973                         action_flags |= actions->type ==
6974                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
6975                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
6976                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
6977                         break;
6978                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
6979                         if (flow_dv_convert_action_set_reg
6980                                         (&mhdr_res, actions, error))
6981                                 return -rte_errno;
6982                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6983                         break;
6984                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
6985                         if (flow_dv_convert_action_copy_mreg
6986                                         (dev, &mhdr_res, actions, error))
6987                                 return -rte_errno;
6988                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6989                         break;
6990                 case RTE_FLOW_ACTION_TYPE_METER:
6991                         mtr = actions->conf;
6992                         if (!flow->meter) {
6993                                 flow->meter = mlx5_flow_meter_attach(priv,
6994                                                         mtr->mtr_id, attr,
6995                                                         error);
6996                                 if (!flow->meter)
6997                                         return rte_flow_error_set(error,
6998                                                 rte_errno,
6999                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7000                                                 NULL,
7001                                                 "meter not found "
7002                                                 "or invalid parameters");
7003                         }
7004                         /* Set the meter action. */
7005                         dev_flow->dv.actions[actions_n++] =
7006                                 flow->meter->mfts->meter_action;
7007                         action_flags |= MLX5_FLOW_ACTION_METER;
7008                         break;
7009                 case RTE_FLOW_ACTION_TYPE_END:
7010                         actions_end = true;
7011                         if (mhdr_res.actions_num) {
7012                                 /* create modify action if needed. */
7013                                 if (flow_dv_modify_hdr_resource_register
7014                                         (dev, &mhdr_res, dev_flow, error))
7015                                         return -rte_errno;
7016                                 dev_flow->dv.actions[modify_action_position] =
7017                                         dev_flow->dv.modify_hdr->verbs_action;
7018                         }
7019                         break;
7020                 default:
7021                         break;
7022                 }
7023                 if (mhdr_res.actions_num &&
7024                     modify_action_position == UINT32_MAX)
7025                         modify_action_position = actions_n++;
7026         }
7027         dev_flow->dv.actions_n = actions_n;
7028         dev_flow->actions = action_flags;
7029         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7030                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7031                 int item_type = items->type;
7032
7033                 switch (item_type) {
7034                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7035                         flow_dv_translate_item_port_id(dev, match_mask,
7036                                                        match_value, items);
7037                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7038                         break;
7039                 case RTE_FLOW_ITEM_TYPE_ETH:
7040                         flow_dv_translate_item_eth(match_mask, match_value,
7041                                                    items, tunnel);
7042                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7043                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7044                                              MLX5_FLOW_LAYER_OUTER_L2;
7045                         break;
7046                 case RTE_FLOW_ITEM_TYPE_VLAN:
7047                         flow_dv_translate_item_vlan(dev_flow,
7048                                                     match_mask, match_value,
7049                                                     items, tunnel);
7050                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7051                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7052                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7053                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7054                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7055                         break;
7056                 case RTE_FLOW_ITEM_TYPE_IPV4:
7057                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7058                                                   &item_flags, &tunnel);
7059                         flow_dv_translate_item_ipv4(match_mask, match_value,
7060                                                     items, tunnel,
7061                                                     dev_flow->group);
7062                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7063                         dev_flow->hash_fields |=
7064                                 mlx5_flow_hashfields_adjust
7065                                         (dev_flow, tunnel,
7066                                          MLX5_IPV4_LAYER_TYPES,
7067                                          MLX5_IPV4_IBV_RX_HASH);
7068                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7069                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7070                         if (items->mask != NULL &&
7071                             ((const struct rte_flow_item_ipv4 *)
7072                              items->mask)->hdr.next_proto_id) {
7073                                 next_protocol =
7074                                         ((const struct rte_flow_item_ipv4 *)
7075                                          (items->spec))->hdr.next_proto_id;
7076                                 next_protocol &=
7077                                         ((const struct rte_flow_item_ipv4 *)
7078                                          (items->mask))->hdr.next_proto_id;
7079                         } else {
7080                                 /* Reset for inner layer. */
7081                                 next_protocol = 0xff;
7082                         }
7083                         break;
7084                 case RTE_FLOW_ITEM_TYPE_IPV6:
7085                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7086                                                   &item_flags, &tunnel);
7087                         flow_dv_translate_item_ipv6(match_mask, match_value,
7088                                                     items, tunnel,
7089                                                     dev_flow->group);
7090                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7091                         dev_flow->hash_fields |=
7092                                 mlx5_flow_hashfields_adjust
7093                                         (dev_flow, tunnel,
7094                                          MLX5_IPV6_LAYER_TYPES,
7095                                          MLX5_IPV6_IBV_RX_HASH);
7096                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7097                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7098                         if (items->mask != NULL &&
7099                             ((const struct rte_flow_item_ipv6 *)
7100                              items->mask)->hdr.proto) {
7101                                 next_protocol =
7102                                         ((const struct rte_flow_item_ipv6 *)
7103                                          items->spec)->hdr.proto;
7104                                 next_protocol &=
7105                                         ((const struct rte_flow_item_ipv6 *)
7106                                          items->mask)->hdr.proto;
7107                         } else {
7108                                 /* Reset for inner layer. */
7109                                 next_protocol = 0xff;
7110                         }
7111                         break;
7112                 case RTE_FLOW_ITEM_TYPE_TCP:
7113                         flow_dv_translate_item_tcp(match_mask, match_value,
7114                                                    items, tunnel);
7115                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7116                         dev_flow->hash_fields |=
7117                                 mlx5_flow_hashfields_adjust
7118                                         (dev_flow, tunnel, ETH_RSS_TCP,
7119                                          IBV_RX_HASH_SRC_PORT_TCP |
7120                                          IBV_RX_HASH_DST_PORT_TCP);
7121                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7122                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7123                         break;
7124                 case RTE_FLOW_ITEM_TYPE_UDP:
7125                         flow_dv_translate_item_udp(match_mask, match_value,
7126                                                    items, tunnel);
7127                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7128                         dev_flow->hash_fields |=
7129                                 mlx5_flow_hashfields_adjust
7130                                         (dev_flow, tunnel, ETH_RSS_UDP,
7131                                          IBV_RX_HASH_SRC_PORT_UDP |
7132                                          IBV_RX_HASH_DST_PORT_UDP);
7133                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7134                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7135                         break;
7136                 case RTE_FLOW_ITEM_TYPE_GRE:
7137                         flow_dv_translate_item_gre(match_mask, match_value,
7138                                                    items, tunnel);
7139                         last_item = MLX5_FLOW_LAYER_GRE;
7140                         break;
7141                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7142                         flow_dv_translate_item_gre_key(match_mask,
7143                                                        match_value, items);
7144                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7145                         break;
7146                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7147                         flow_dv_translate_item_nvgre(match_mask, match_value,
7148                                                      items, tunnel);
7149                         last_item = MLX5_FLOW_LAYER_GRE;
7150                         break;
7151                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7152                         flow_dv_translate_item_vxlan(match_mask, match_value,
7153                                                      items, tunnel);
7154                         last_item = MLX5_FLOW_LAYER_VXLAN;
7155                         break;
7156                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7157                         flow_dv_translate_item_vxlan(match_mask, match_value,
7158                                                      items, tunnel);
7159                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7160                         break;
7161                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7162                         flow_dv_translate_item_geneve(match_mask, match_value,
7163                                                       items, tunnel);
7164                         last_item = MLX5_FLOW_LAYER_GENEVE;
7165                         break;
7166                 case RTE_FLOW_ITEM_TYPE_MPLS:
7167                         flow_dv_translate_item_mpls(match_mask, match_value,
7168                                                     items, last_item, tunnel);
7169                         last_item = MLX5_FLOW_LAYER_MPLS;
7170                         break;
7171                 case RTE_FLOW_ITEM_TYPE_MARK:
7172                         flow_dv_translate_item_mark(dev, match_mask,
7173                                                     match_value, items);
7174                         last_item = MLX5_FLOW_ITEM_MARK;
7175                         break;
7176                 case RTE_FLOW_ITEM_TYPE_META:
7177                         flow_dv_translate_item_meta(dev, match_mask,
7178                                                     match_value, attr, items);
7179                         last_item = MLX5_FLOW_ITEM_METADATA;
7180                         break;
7181                 case RTE_FLOW_ITEM_TYPE_ICMP:
7182                         flow_dv_translate_item_icmp(match_mask, match_value,
7183                                                     items, tunnel);
7184                         last_item = MLX5_FLOW_LAYER_ICMP;
7185                         break;
7186                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7187                         flow_dv_translate_item_icmp6(match_mask, match_value,
7188                                                       items, tunnel);
7189                         last_item = MLX5_FLOW_LAYER_ICMP6;
7190                         break;
7191                 case RTE_FLOW_ITEM_TYPE_TAG:
7192                         flow_dv_translate_item_tag(dev, match_mask,
7193                                                    match_value, items);
7194                         last_item = MLX5_FLOW_ITEM_TAG;
7195                         break;
7196                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7197                         flow_dv_translate_mlx5_item_tag(match_mask,
7198                                                         match_value, items);
7199                         last_item = MLX5_FLOW_ITEM_TAG;
7200                         break;
7201                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7202                         flow_dv_translate_item_tx_queue(dev, match_mask,
7203                                                         match_value,
7204                                                         items);
7205                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7206                         break;
7207                 default:
7208                         break;
7209                 }
7210                 item_flags |= last_item;
7211         }
7212         /*
7213          * In case of ingress traffic when E-Switch mode is enabled,
7214          * we have two cases where we need to set the source port manually.
7215          * The first one, is in case of Nic steering rule, and the second is
7216          * E-Switch rule where no port_id item was found. In both cases
7217          * the source port is set according the current port in use.
7218          */
7219         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7220             (priv->representor || priv->master)) {
7221                 if (flow_dv_translate_item_port_id(dev, match_mask,
7222                                                    match_value, NULL))
7223                         return -rte_errno;
7224         }
7225         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7226                                          dev_flow->dv.value.buf));
7227         dev_flow->layers = item_flags;
7228         /* Register matcher. */
7229         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7230                                     matcher.mask.size);
7231         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7232                                                      matcher.priority);
7233         /* reserved field no needs to be set to 0 here. */
7234         tbl_key.domain = attr->transfer;
7235         tbl_key.direction = attr->egress;
7236         tbl_key.table_id = dev_flow->group;
7237         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7238                 return -rte_errno;
7239         return 0;
7240 }
7241
7242 /**
7243  * Apply the flow to the NIC, lock free,
7244  * (mutex should be acquired by caller).
7245  *
7246  * @param[in] dev
7247  *   Pointer to the Ethernet device structure.
7248  * @param[in, out] flow
7249  *   Pointer to flow structure.
7250  * @param[out] error
7251  *   Pointer to error structure.
7252  *
7253  * @return
7254  *   0 on success, a negative errno value otherwise and rte_errno is set.
7255  */
7256 static int
7257 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7258                 struct rte_flow_error *error)
7259 {
7260         struct mlx5_flow_dv *dv;
7261         struct mlx5_flow *dev_flow;
7262         struct mlx5_priv *priv = dev->data->dev_private;
7263         int n;
7264         int err;
7265
7266         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7267                 dv = &dev_flow->dv;
7268                 n = dv->actions_n;
7269                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7270                         if (dev_flow->transfer) {
7271                                 dv->actions[n++] = priv->sh->esw_drop_action;
7272                         } else {
7273                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7274                                 if (!dv->hrxq) {
7275                                         rte_flow_error_set
7276                                                 (error, errno,
7277                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7278                                                  NULL,
7279                                                  "cannot get drop hash queue");
7280                                         goto error;
7281                                 }
7282                                 dv->actions[n++] = dv->hrxq->action;
7283                         }
7284                 } else if (dev_flow->actions &
7285                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7286                         struct mlx5_hrxq *hrxq;
7287
7288                         assert(flow->rss.queue);
7289                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7290                                              MLX5_RSS_HASH_KEY_LEN,
7291                                              dev_flow->hash_fields,
7292                                              (*flow->rss.queue),
7293                                              flow->rss.queue_num);
7294                         if (!hrxq) {
7295                                 hrxq = mlx5_hrxq_new
7296                                         (dev, flow->rss.key,
7297                                          MLX5_RSS_HASH_KEY_LEN,
7298                                          dev_flow->hash_fields,
7299                                          (*flow->rss.queue),
7300                                          flow->rss.queue_num,
7301                                          !!(dev_flow->layers &
7302                                             MLX5_FLOW_LAYER_TUNNEL));
7303                         }
7304                         if (!hrxq) {
7305                                 rte_flow_error_set
7306                                         (error, rte_errno,
7307                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7308                                          "cannot get hash queue");
7309                                 goto error;
7310                         }
7311                         dv->hrxq = hrxq;
7312                         dv->actions[n++] = dv->hrxq->action;
7313                 }
7314                 dv->flow =
7315                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7316                                                   (void *)&dv->value, n,
7317                                                   dv->actions);
7318                 if (!dv->flow) {
7319                         rte_flow_error_set(error, errno,
7320                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7321                                            NULL,
7322                                            "hardware refuses to create flow");
7323                         goto error;
7324                 }
7325                 if (priv->vmwa_context &&
7326                     dev_flow->dv.vf_vlan.tag &&
7327                     !dev_flow->dv.vf_vlan.created) {
7328                         /*
7329                          * The rule contains the VLAN pattern.
7330                          * For VF we are going to create VLAN
7331                          * interface to make hypervisor set correct
7332                          * e-Switch vport context.
7333                          */
7334                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7335                 }
7336         }
7337         return 0;
7338 error:
7339         err = rte_errno; /* Save rte_errno before cleanup. */
7340         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7341                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7342                 if (dv->hrxq) {
7343                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7344                                 mlx5_hrxq_drop_release(dev);
7345                         else
7346                                 mlx5_hrxq_release(dev, dv->hrxq);
7347                         dv->hrxq = NULL;
7348                 }
7349                 if (dev_flow->dv.vf_vlan.tag &&
7350                     dev_flow->dv.vf_vlan.created)
7351                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7352         }
7353         rte_errno = err; /* Restore rte_errno. */
7354         return -rte_errno;
7355 }
7356
7357 /**
7358  * Release the flow matcher.
7359  *
7360  * @param dev
7361  *   Pointer to Ethernet device.
7362  * @param flow
7363  *   Pointer to mlx5_flow.
7364  *
7365  * @return
7366  *   1 while a reference on it exists, 0 when freed.
7367  */
7368 static int
7369 flow_dv_matcher_release(struct rte_eth_dev *dev,
7370                         struct mlx5_flow *flow)
7371 {
7372         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7373
7374         assert(matcher->matcher_object);
7375         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7376                 dev->data->port_id, (void *)matcher,
7377                 rte_atomic32_read(&matcher->refcnt));
7378         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7379                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7380                            (matcher->matcher_object));
7381                 LIST_REMOVE(matcher, next);
7382                 /* table ref-- in release interface. */
7383                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7384                 rte_free(matcher);
7385                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7386                         dev->data->port_id, (void *)matcher);
7387                 return 0;
7388         }
7389         return 1;
7390 }
7391
7392 /**
7393  * Release an encap/decap resource.
7394  *
7395  * @param flow
7396  *   Pointer to mlx5_flow.
7397  *
7398  * @return
7399  *   1 while a reference on it exists, 0 when freed.
7400  */
7401 static int
7402 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7403 {
7404         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7405                                                 flow->dv.encap_decap;
7406
7407         assert(cache_resource->verbs_action);
7408         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7409                 (void *)cache_resource,
7410                 rte_atomic32_read(&cache_resource->refcnt));
7411         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7412                 claim_zero(mlx5_glue->destroy_flow_action
7413                                 (cache_resource->verbs_action));
7414                 LIST_REMOVE(cache_resource, next);
7415                 rte_free(cache_resource);
7416                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7417                         (void *)cache_resource);
7418                 return 0;
7419         }
7420         return 1;
7421 }
7422
7423 /**
7424  * Release an jump to table action resource.
7425  *
7426  * @param dev
7427  *   Pointer to Ethernet device.
7428  * @param flow
7429  *   Pointer to mlx5_flow.
7430  *
7431  * @return
7432  *   1 while a reference on it exists, 0 when freed.
7433  */
7434 static int
7435 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7436                                   struct mlx5_flow *flow)
7437 {
7438         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7439         struct mlx5_flow_tbl_data_entry *tbl_data =
7440                         container_of(cache_resource,
7441                                      struct mlx5_flow_tbl_data_entry, jump);
7442
7443         assert(cache_resource->action);
7444         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7445                 (void *)cache_resource,
7446                 rte_atomic32_read(&cache_resource->refcnt));
7447         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7448                 claim_zero(mlx5_glue->destroy_flow_action
7449                                 (cache_resource->action));
7450                 /* jump action memory free is inside the table release. */
7451                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7452                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7453                         (void *)cache_resource);
7454                 return 0;
7455         }
7456         return 1;
7457 }
7458
7459 /**
7460  * Release a modify-header resource.
7461  *
7462  * @param flow
7463  *   Pointer to mlx5_flow.
7464  *
7465  * @return
7466  *   1 while a reference on it exists, 0 when freed.
7467  */
7468 static int
7469 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7470 {
7471         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7472                                                 flow->dv.modify_hdr;
7473
7474         assert(cache_resource->verbs_action);
7475         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7476                 (void *)cache_resource,
7477                 rte_atomic32_read(&cache_resource->refcnt));
7478         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7479                 claim_zero(mlx5_glue->destroy_flow_action
7480                                 (cache_resource->verbs_action));
7481                 LIST_REMOVE(cache_resource, next);
7482                 rte_free(cache_resource);
7483                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7484                         (void *)cache_resource);
7485                 return 0;
7486         }
7487         return 1;
7488 }
7489
7490 /**
7491  * Release port ID action resource.
7492  *
7493  * @param flow
7494  *   Pointer to mlx5_flow.
7495  *
7496  * @return
7497  *   1 while a reference on it exists, 0 when freed.
7498  */
7499 static int
7500 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7501 {
7502         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7503                 flow->dv.port_id_action;
7504
7505         assert(cache_resource->action);
7506         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7507                 (void *)cache_resource,
7508                 rte_atomic32_read(&cache_resource->refcnt));
7509         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7510                 claim_zero(mlx5_glue->destroy_flow_action
7511                                 (cache_resource->action));
7512                 LIST_REMOVE(cache_resource, next);
7513                 rte_free(cache_resource);
7514                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7515                         (void *)cache_resource);
7516                 return 0;
7517         }
7518         return 1;
7519 }
7520
7521 /**
7522  * Release push vlan action resource.
7523  *
7524  * @param flow
7525  *   Pointer to mlx5_flow.
7526  *
7527  * @return
7528  *   1 while a reference on it exists, 0 when freed.
7529  */
7530 static int
7531 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7532 {
7533         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7534                 flow->dv.push_vlan_res;
7535
7536         assert(cache_resource->action);
7537         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7538                 (void *)cache_resource,
7539                 rte_atomic32_read(&cache_resource->refcnt));
7540         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7541                 claim_zero(mlx5_glue->destroy_flow_action
7542                                 (cache_resource->action));
7543                 LIST_REMOVE(cache_resource, next);
7544                 rte_free(cache_resource);
7545                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7546                         (void *)cache_resource);
7547                 return 0;
7548         }
7549         return 1;
7550 }
7551
7552 /**
7553  * Remove the flow from the NIC but keeps it in memory.
7554  * Lock free, (mutex should be acquired by caller).
7555  *
7556  * @param[in] dev
7557  *   Pointer to Ethernet device.
7558  * @param[in, out] flow
7559  *   Pointer to flow structure.
7560  */
7561 static void
7562 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7563 {
7564         struct mlx5_flow_dv *dv;
7565         struct mlx5_flow *dev_flow;
7566
7567         if (!flow)
7568                 return;
7569         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7570                 dv = &dev_flow->dv;
7571                 if (dv->flow) {
7572                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7573                         dv->flow = NULL;
7574                 }
7575                 if (dv->hrxq) {
7576                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7577                                 mlx5_hrxq_drop_release(dev);
7578                         else
7579                                 mlx5_hrxq_release(dev, dv->hrxq);
7580                         dv->hrxq = NULL;
7581                 }
7582                 if (dev_flow->dv.vf_vlan.tag &&
7583                     dev_flow->dv.vf_vlan.created)
7584                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7585         }
7586 }
7587
7588 /**
7589  * Remove the flow from the NIC and the memory.
7590  * Lock free, (mutex should be acquired by caller).
7591  *
7592  * @param[in] dev
7593  *   Pointer to the Ethernet device structure.
7594  * @param[in, out] flow
7595  *   Pointer to flow structure.
7596  */
7597 static void
7598 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
7599 {
7600         struct mlx5_flow *dev_flow;
7601
7602         if (!flow)
7603                 return;
7604         __flow_dv_remove(dev, flow);
7605         if (flow->counter) {
7606                 flow_dv_counter_release(dev, flow->counter);
7607                 flow->counter = NULL;
7608         }
7609         if (flow->meter) {
7610                 mlx5_flow_meter_detach(flow->meter);
7611                 flow->meter = NULL;
7612         }
7613         while (!LIST_EMPTY(&flow->dev_flows)) {
7614                 dev_flow = LIST_FIRST(&flow->dev_flows);
7615                 LIST_REMOVE(dev_flow, next);
7616                 if (dev_flow->dv.matcher)
7617                         flow_dv_matcher_release(dev, dev_flow);
7618                 if (dev_flow->dv.encap_decap)
7619                         flow_dv_encap_decap_resource_release(dev_flow);
7620                 if (dev_flow->dv.modify_hdr)
7621                         flow_dv_modify_hdr_resource_release(dev_flow);
7622                 if (dev_flow->dv.jump)
7623                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
7624                 if (dev_flow->dv.port_id_action)
7625                         flow_dv_port_id_action_resource_release(dev_flow);
7626                 if (dev_flow->dv.push_vlan_res)
7627                         flow_dv_push_vlan_action_resource_release(dev_flow);
7628                 if (dev_flow->dv.tag_resource)
7629                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
7630                 rte_free(dev_flow);
7631         }
7632 }
7633
7634 /**
7635  * Query a dv flow  rule for its statistics via devx.
7636  *
7637  * @param[in] dev
7638  *   Pointer to Ethernet device.
7639  * @param[in] flow
7640  *   Pointer to the sub flow.
7641  * @param[out] data
7642  *   data retrieved by the query.
7643  * @param[out] error
7644  *   Perform verbose error reporting if not NULL.
7645  *
7646  * @return
7647  *   0 on success, a negative errno value otherwise and rte_errno is set.
7648  */
7649 static int
7650 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
7651                     void *data, struct rte_flow_error *error)
7652 {
7653         struct mlx5_priv *priv = dev->data->dev_private;
7654         struct rte_flow_query_count *qc = data;
7655
7656         if (!priv->config.devx)
7657                 return rte_flow_error_set(error, ENOTSUP,
7658                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7659                                           NULL,
7660                                           "counters are not supported");
7661         if (flow->counter) {
7662                 uint64_t pkts, bytes;
7663                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
7664                                                &bytes);
7665
7666                 if (err)
7667                         return rte_flow_error_set(error, -err,
7668                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7669                                         NULL, "cannot read counters");
7670                 qc->hits_set = 1;
7671                 qc->bytes_set = 1;
7672                 qc->hits = pkts - flow->counter->hits;
7673                 qc->bytes = bytes - flow->counter->bytes;
7674                 if (qc->reset) {
7675                         flow->counter->hits = pkts;
7676                         flow->counter->bytes = bytes;
7677                 }
7678                 return 0;
7679         }
7680         return rte_flow_error_set(error, EINVAL,
7681                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7682                                   NULL,
7683                                   "counters are not available");
7684 }
7685
7686 /**
7687  * Query a flow.
7688  *
7689  * @see rte_flow_query()
7690  * @see rte_flow_ops
7691  */
7692 static int
7693 flow_dv_query(struct rte_eth_dev *dev,
7694               struct rte_flow *flow __rte_unused,
7695               const struct rte_flow_action *actions __rte_unused,
7696               void *data __rte_unused,
7697               struct rte_flow_error *error __rte_unused)
7698 {
7699         int ret = -EINVAL;
7700
7701         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7702                 switch (actions->type) {
7703                 case RTE_FLOW_ACTION_TYPE_VOID:
7704                         break;
7705                 case RTE_FLOW_ACTION_TYPE_COUNT:
7706                         ret = flow_dv_query_count(dev, flow, data, error);
7707                         break;
7708                 default:
7709                         return rte_flow_error_set(error, ENOTSUP,
7710                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7711                                                   actions,
7712                                                   "action not supported");
7713                 }
7714         }
7715         return ret;
7716 }
7717
7718 /**
7719  * Destroy the meter table set.
7720  * Lock free, (mutex should be acquired by caller).
7721  *
7722  * @param[in] dev
7723  *   Pointer to Ethernet device.
7724  * @param[in] tbl
7725  *   Pointer to the meter table set.
7726  *
7727  * @return
7728  *   Always 0.
7729  */
7730 static int
7731 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
7732                         struct mlx5_meter_domains_infos *tbl)
7733 {
7734         struct mlx5_priv *priv = dev->data->dev_private;
7735         struct mlx5_meter_domains_infos *mtd =
7736                                 (struct mlx5_meter_domains_infos *)tbl;
7737
7738         if (!mtd || !priv->config.dv_flow_en)
7739                 return 0;
7740         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
7741                 claim_zero(mlx5_glue->dv_destroy_flow
7742                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
7743         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
7744                 claim_zero(mlx5_glue->dv_destroy_flow
7745                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
7746         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
7747                 claim_zero(mlx5_glue->dv_destroy_flow
7748                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
7749         if (mtd->egress.color_matcher)
7750                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7751                           (mtd->egress.color_matcher));
7752         if (mtd->egress.any_matcher)
7753                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7754                           (mtd->egress.any_matcher));
7755         if (mtd->egress.tbl)
7756                 claim_zero(flow_dv_tbl_resource_release(dev,
7757                                                         mtd->egress.tbl));
7758         if (mtd->ingress.color_matcher)
7759                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7760                           (mtd->ingress.color_matcher));
7761         if (mtd->ingress.any_matcher)
7762                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7763                           (mtd->ingress.any_matcher));
7764         if (mtd->ingress.tbl)
7765                 claim_zero(flow_dv_tbl_resource_release(dev,
7766                                                         mtd->ingress.tbl));
7767         if (mtd->transfer.color_matcher)
7768                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7769                           (mtd->transfer.color_matcher));
7770         if (mtd->transfer.any_matcher)
7771                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7772                           (mtd->transfer.any_matcher));
7773         if (mtd->transfer.tbl)
7774                 claim_zero(flow_dv_tbl_resource_release(dev,
7775                                                         mtd->transfer.tbl));
7776         if (mtd->drop_actn)
7777                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
7778         rte_free(mtd);
7779         return 0;
7780 }
7781
7782 /* Number of meter flow actions, count and jump or count and drop. */
7783 #define METER_ACTIONS 2
7784
7785 /**
7786  * Create specify domain meter table and suffix table.
7787  *
7788  * @param[in] dev
7789  *   Pointer to Ethernet device.
7790  * @param[in,out] mtb
7791  *   Pointer to DV meter table set.
7792  * @param[in] egress
7793  *   Table attribute.
7794  * @param[in] transfer
7795  *   Table attribute.
7796  * @param[in] color_reg_c_idx
7797  *   Reg C index for color match.
7798  *
7799  * @return
7800  *   0 on success, -1 otherwise and rte_errno is set.
7801  */
7802 static int
7803 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
7804                            struct mlx5_meter_domains_infos *mtb,
7805                            uint8_t egress, uint8_t transfer,
7806                            uint32_t color_reg_c_idx)
7807 {
7808         struct mlx5_priv *priv = dev->data->dev_private;
7809         struct mlx5_ibv_shared *sh = priv->sh;
7810         struct mlx5_flow_dv_match_params mask = {
7811                 .size = sizeof(mask.buf),
7812         };
7813         struct mlx5_flow_dv_match_params value = {
7814                 .size = sizeof(value.buf),
7815         };
7816         struct mlx5dv_flow_matcher_attr dv_attr = {
7817                 .type = IBV_FLOW_ATTR_NORMAL,
7818                 .priority = 0,
7819                 .match_criteria_enable = 0,
7820                 .match_mask = (void *)&mask,
7821         };
7822         void *actions[METER_ACTIONS];
7823         struct mlx5_flow_tbl_resource **sfx_tbl;
7824         struct mlx5_meter_domain_info *dtb;
7825         struct rte_flow_error error;
7826         int i = 0;
7827
7828         if (transfer) {
7829                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
7830                 dtb = &mtb->transfer;
7831         } else if (egress) {
7832                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
7833                 dtb = &mtb->egress;
7834         } else {
7835                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
7836                 dtb = &mtb->ingress;
7837         }
7838         /* If the suffix table in missing, create it. */
7839         if (!(*sfx_tbl)) {
7840                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
7841                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
7842                                                 egress, transfer, &error);
7843                 if (!(*sfx_tbl)) {
7844                         DRV_LOG(ERR, "Failed to create meter suffix table.");
7845                         return -1;
7846                 }
7847         }
7848         /* Create the meter table with METER level. */
7849         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
7850                                             egress, transfer, &error);
7851         if (!dtb->tbl) {
7852                 DRV_LOG(ERR, "Failed to create meter policer table.");
7853                 return -1;
7854         }
7855         /* Create matchers, Any and Color. */
7856         dv_attr.priority = 3;
7857         dv_attr.match_criteria_enable = 0;
7858         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7859                                                              &dv_attr,
7860                                                              dtb->tbl->obj);
7861         if (!dtb->any_matcher) {
7862                 DRV_LOG(ERR, "Failed to create meter"
7863                              " policer default matcher.");
7864                 goto error_exit;
7865         }
7866         dv_attr.priority = 0;
7867         dv_attr.match_criteria_enable =
7868                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
7869         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
7870                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
7871         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7872                                                                &dv_attr,
7873                                                                dtb->tbl->obj);
7874         if (!dtb->color_matcher) {
7875                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
7876                 goto error_exit;
7877         }
7878         if (mtb->count_actns[RTE_MTR_DROPPED])
7879                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
7880         actions[i++] = mtb->drop_actn;
7881         /* Default rule: lowest priority, match any, actions: drop. */
7882         dtb->policer_rules[RTE_MTR_DROPPED] =
7883                         mlx5_glue->dv_create_flow(dtb->any_matcher,
7884                                                  (void *)&value, i, actions);
7885         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
7886                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
7887                 goto error_exit;
7888         }
7889         return 0;
7890 error_exit:
7891         return -1;
7892 }
7893
7894 /**
7895  * Create the needed meter and suffix tables.
7896  * Lock free, (mutex should be acquired by caller).
7897  *
7898  * @param[in] dev
7899  *   Pointer to Ethernet device.
7900  * @param[in] fm
7901  *   Pointer to the flow meter.
7902  *
7903  * @return
7904  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
7905  */
7906 static struct mlx5_meter_domains_infos *
7907 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
7908                        const struct mlx5_flow_meter *fm)
7909 {
7910         struct mlx5_priv *priv = dev->data->dev_private;
7911         struct mlx5_meter_domains_infos *mtb;
7912         int ret;
7913         int i;
7914
7915         if (!priv->mtr_en) {
7916                 rte_errno = ENOTSUP;
7917                 return NULL;
7918         }
7919         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
7920         if (!mtb) {
7921                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
7922                 return NULL;
7923         }
7924         /* Create meter count actions */
7925         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
7926                 if (!fm->policer_stats.cnt[i])
7927                         continue;
7928                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
7929         }
7930         /* Create drop action. */
7931         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
7932         if (!mtb->drop_actn) {
7933                 DRV_LOG(ERR, "Failed to create drop action.");
7934                 goto error_exit;
7935         }
7936         /* Egress meter table. */
7937         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
7938         if (ret) {
7939                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
7940                 goto error_exit;
7941         }
7942         /* Ingress meter table. */
7943         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
7944         if (ret) {
7945                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
7946                 goto error_exit;
7947         }
7948         /* FDB meter table. */
7949         if (priv->config.dv_esw_en) {
7950                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
7951                                                  priv->mtr_color_reg);
7952                 if (ret) {
7953                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
7954                         goto error_exit;
7955                 }
7956         }
7957         return mtb;
7958 error_exit:
7959         flow_dv_destroy_mtr_tbl(dev, mtb);
7960         return NULL;
7961 }
7962
7963 /**
7964  * Destroy domain policer rule.
7965  *
7966  * @param[in] dt
7967  *   Pointer to domain table.
7968  */
7969 static void
7970 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
7971 {
7972         int i;
7973
7974         for (i = 0; i < RTE_MTR_DROPPED; i++) {
7975                 if (dt->policer_rules[i]) {
7976                         claim_zero(mlx5_glue->dv_destroy_flow
7977                                   (dt->policer_rules[i]));
7978                         dt->policer_rules[i] = NULL;
7979                 }
7980         }
7981         if (dt->jump_actn) {
7982                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
7983                 dt->jump_actn = NULL;
7984         }
7985 }
7986
7987 /**
7988  * Destroy policer rules.
7989  *
7990  * @param[in] dev
7991  *   Pointer to Ethernet device.
7992  * @param[in] fm
7993  *   Pointer to flow meter structure.
7994  * @param[in] attr
7995  *   Pointer to flow attributes.
7996  *
7997  * @return
7998  *   Always 0.
7999  */
8000 static int
8001 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8002                               const struct mlx5_flow_meter *fm,
8003                               const struct rte_flow_attr *attr)
8004 {
8005         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8006
8007         if (!mtb)
8008                 return 0;
8009         if (attr->egress)
8010                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8011         if (attr->ingress)
8012                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8013         if (attr->transfer)
8014                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8015         return 0;
8016 }
8017
8018 /**
8019  * Create specify domain meter policer rule.
8020  *
8021  * @param[in] fm
8022  *   Pointer to flow meter structure.
8023  * @param[in] mtb
8024  *   Pointer to DV meter table set.
8025  * @param[in] sfx_tb
8026  *   Pointer to suffix table.
8027  * @param[in] mtr_reg_c
8028  *   Color match REG_C.
8029  *
8030  * @return
8031  *   0 on success, -1 otherwise.
8032  */
8033 static int
8034 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8035                                     struct mlx5_meter_domain_info *dtb,
8036                                     struct mlx5_flow_tbl_resource *sfx_tb,
8037                                     uint8_t mtr_reg_c)
8038 {
8039         struct mlx5_flow_dv_match_params matcher = {
8040                 .size = sizeof(matcher.buf),
8041         };
8042         struct mlx5_flow_dv_match_params value = {
8043                 .size = sizeof(value.buf),
8044         };
8045         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8046         void *actions[METER_ACTIONS];
8047         int i;
8048
8049         /* Create jump action. */
8050         if (!sfx_tb)
8051                 return -1;
8052         if (!dtb->jump_actn)
8053                 dtb->jump_actn =
8054                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8055                                                         (sfx_tb->obj);
8056         if (!dtb->jump_actn) {
8057                 DRV_LOG(ERR, "Failed to create policer jump action.");
8058                 goto error;
8059         }
8060         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8061                 int j = 0;
8062
8063                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8064                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8065                 if (mtb->count_actns[i])
8066                         actions[j++] = mtb->count_actns[i];
8067                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8068                         actions[j++] = mtb->drop_actn;
8069                 else
8070                         actions[j++] = dtb->jump_actn;
8071                 dtb->policer_rules[i] =
8072                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8073                                                  (void *)&value,
8074                                                   j, actions);
8075                 if (!dtb->policer_rules[i]) {
8076                         DRV_LOG(ERR, "Failed to create policer rule.");
8077                         goto error;
8078                 }
8079         }
8080         return 0;
8081 error:
8082         rte_errno = errno;
8083         return -1;
8084 }
8085
8086 /**
8087  * Create policer rules.
8088  *
8089  * @param[in] dev
8090  *   Pointer to Ethernet device.
8091  * @param[in] fm
8092  *   Pointer to flow meter structure.
8093  * @param[in] attr
8094  *   Pointer to flow attributes.
8095  *
8096  * @return
8097  *   0 on success, -1 otherwise.
8098  */
8099 static int
8100 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8101                              struct mlx5_flow_meter *fm,
8102                              const struct rte_flow_attr *attr)
8103 {
8104         struct mlx5_priv *priv = dev->data->dev_private;
8105         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8106         int ret;
8107
8108         if (attr->egress) {
8109                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8110                                                 priv->sh->tx_mtr_sfx_tbl,
8111                                                 priv->mtr_color_reg);
8112                 if (ret) {
8113                         DRV_LOG(ERR, "Failed to create egress policer.");
8114                         goto error;
8115                 }
8116         }
8117         if (attr->ingress) {
8118                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8119                                                 priv->sh->rx_mtr_sfx_tbl,
8120                                                 priv->mtr_color_reg);
8121                 if (ret) {
8122                         DRV_LOG(ERR, "Failed to create ingress policer.");
8123                         goto error;
8124                 }
8125         }
8126         if (attr->transfer) {
8127                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8128                                                 priv->sh->fdb_mtr_sfx_tbl,
8129                                                 priv->mtr_color_reg);
8130                 if (ret) {
8131                         DRV_LOG(ERR, "Failed to create transfer policer.");
8132                         goto error;
8133                 }
8134         }
8135         return 0;
8136 error:
8137         flow_dv_destroy_policer_rules(dev, fm, attr);
8138         return -1;
8139 }
8140
8141 /**
8142  * Query a devx counter.
8143  *
8144  * @param[in] dev
8145  *   Pointer to the Ethernet device structure.
8146  * @param[in] cnt
8147  *   Pointer to the flow counter.
8148  * @param[in] clear
8149  *   Set to clear the counter statistics.
8150  * @param[out] pkts
8151  *   The statistics value of packets.
8152  * @param[out] bytes
8153  *   The statistics value of bytes.
8154  *
8155  * @return
8156  *   0 on success, otherwise return -1.
8157  */
8158 static int
8159 flow_dv_counter_query(struct rte_eth_dev *dev,
8160                       struct mlx5_flow_counter *cnt, bool clear,
8161                       uint64_t *pkts, uint64_t *bytes)
8162 {
8163         struct mlx5_priv *priv = dev->data->dev_private;
8164         uint64_t inn_pkts, inn_bytes;
8165         int ret;
8166
8167         if (!priv->config.devx)
8168                 return -1;
8169         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8170         if (ret)
8171                 return -1;
8172         *pkts = inn_pkts - cnt->hits;
8173         *bytes = inn_bytes - cnt->bytes;
8174         if (clear) {
8175                 cnt->hits = inn_pkts;
8176                 cnt->bytes = inn_bytes;
8177         }
8178         return 0;
8179 }
8180
8181 /*
8182  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8183  */
8184 static int
8185 flow_dv_translate(struct rte_eth_dev *dev,
8186                   struct mlx5_flow *dev_flow,
8187                   const struct rte_flow_attr *attr,
8188                   const struct rte_flow_item items[],
8189                   const struct rte_flow_action actions[],
8190                   struct rte_flow_error *error)
8191 {
8192         int ret;
8193
8194         flow_dv_shared_lock(dev);
8195         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8196         flow_dv_shared_unlock(dev);
8197         return ret;
8198 }
8199
8200 /*
8201  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8202  */
8203 static int
8204 flow_dv_apply(struct rte_eth_dev *dev,
8205               struct rte_flow *flow,
8206               struct rte_flow_error *error)
8207 {
8208         int ret;
8209
8210         flow_dv_shared_lock(dev);
8211         ret = __flow_dv_apply(dev, flow, error);
8212         flow_dv_shared_unlock(dev);
8213         return ret;
8214 }
8215
8216 /*
8217  * Mutex-protected thunk to lock-free __flow_dv_remove().
8218  */
8219 static void
8220 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8221 {
8222         flow_dv_shared_lock(dev);
8223         __flow_dv_remove(dev, flow);
8224         flow_dv_shared_unlock(dev);
8225 }
8226
8227 /*
8228  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8229  */
8230 static void
8231 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8232 {
8233         flow_dv_shared_lock(dev);
8234         __flow_dv_destroy(dev, flow);
8235         flow_dv_shared_unlock(dev);
8236 }
8237
8238 /*
8239  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8240  */
8241 static struct mlx5_flow_counter *
8242 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8243 {
8244         struct mlx5_flow_counter *cnt;
8245
8246         flow_dv_shared_lock(dev);
8247         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8248         flow_dv_shared_unlock(dev);
8249         return cnt;
8250 }
8251
8252 /*
8253  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8254  */
8255 static void
8256 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8257 {
8258         flow_dv_shared_lock(dev);
8259         flow_dv_counter_release(dev, cnt);
8260         flow_dv_shared_unlock(dev);
8261 }
8262
8263 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8264         .validate = flow_dv_validate,
8265         .prepare = flow_dv_prepare,
8266         .translate = flow_dv_translate,
8267         .apply = flow_dv_apply,
8268         .remove = flow_dv_remove,
8269         .destroy = flow_dv_destroy,
8270         .query = flow_dv_query,
8271         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8272         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8273         .create_policer_rules = flow_dv_create_policer_rules,
8274         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8275         .counter_alloc = flow_dv_counter_allocate,
8276         .counter_free = flow_dv_counter_free,
8277         .counter_query = flow_dv_counter_query,
8278 };
8279
8280 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */