drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include "mlx5.h"
  33 #include "mlx5_defs.h"
  34 #include "mlx5_glue.h"
  35 #include "mlx5_flow.h"
  36 #include "mlx5_prm.h"
  37 #include "mlx5_rxtx.h"
  38
  39 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  40
  41 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  42 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  43 #endif
  44
  45 #ifndef HAVE_MLX5DV_DR_ESWITCH
  46 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  47 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  48 #endif
  49 #endif
  50
  51 #ifndef HAVE_MLX5DV_DR
  52 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  53 #endif
  54
  55 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  56                                           sizeof(struct rte_flow_item_ipv4))
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 /**
  77  * Initialize flow attributes structure according to flow items' types.
  78  *
  79  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  80  * mode. For tunnel mode, the items to be modified are the outermost ones.
  81  *
  82  * @param[in] item
  83  *   Pointer to item specification.
  84  * @param[out] attr
  85  *   Pointer to flow attributes structure.
  86  */
  87 static void
  88 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  89 {
  90         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  91                 switch (item->type) {
  92                 case RTE_FLOW_ITEM_TYPE_IPV4:
  93                         if (!attr->ipv6)
  94                                 attr->ipv4 = 1;
  95                         break;
  96                 case RTE_FLOW_ITEM_TYPE_IPV6:
  97                         if (!attr->ipv4)
  98                                 attr->ipv6 = 1;
  99                         break;
 100                 case RTE_FLOW_ITEM_TYPE_UDP:
 101                         if (!attr->tcp)
 102                                 attr->udp = 1;
 103                         break;
 104                 case RTE_FLOW_ITEM_TYPE_TCP:
 105                         if (!attr->udp)
 106                                 attr->tcp = 1;
 107                         break;
 108                 default:
 109                         break;
 110                 }
 111         }
 112         attr->valid = 1;
 113 }
 114
 115 /**
 116  * Convert rte_mtr_color to mlx5 color.
 117  *
 118  * @param[in] rcol
 119  *   rte_mtr_color.
 120  *
 121  * @return
 122  *   mlx5 color.
 123  */
 124 static int
 125 rte_col_2_mlx5_col(enum rte_color rcol)
 126 {
 127         switch (rcol) {
 128         case RTE_COLOR_GREEN:
 129                 return MLX5_FLOW_COLOR_GREEN;
 130         case RTE_COLOR_YELLOW:
 131                 return MLX5_FLOW_COLOR_YELLOW;
 132         case RTE_COLOR_RED:
 133                 return MLX5_FLOW_COLOR_RED;
 134         default:
 135                 break;
 136         }
 137         return MLX5_FLOW_COLOR_UNDEFINED;
 138 }
 139
 140 struct field_modify_info {
 141         uint32_t size; /* Size of field in protocol header, in bytes. */
 142         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 143         enum mlx5_modification_field id;
 144 };
 145
 146 struct field_modify_info modify_eth[] = {
 147         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 148         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 149         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 150         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 151         {0, 0, 0},
 152 };
 153
 154 struct field_modify_info modify_vlan_out_first_vid[] = {
 155         /* Size in bits !!! */
 156         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 157         {0, 0, 0},
 158 };
 159
 160 struct field_modify_info modify_ipv4[] = {
 161         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 162         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 163         {4, 12, MLX5_MODI_OUT_SIPV4},
 164         {4, 16, MLX5_MODI_OUT_DIPV4},
 165         {0, 0, 0},
 166 };
 167
 168 struct field_modify_info modify_ipv6[] = {
 169         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 170         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 171         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 172         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 173         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 174         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 175         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 176         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 177         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 178         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 179         {0, 0, 0},
 180 };
 181
 182 struct field_modify_info modify_udp[] = {
 183         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 184         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 185         {0, 0, 0},
 186 };
 187
 188 struct field_modify_info modify_tcp[] = {
 189         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 190         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 191         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 192         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 193         {0, 0, 0},
 194 };
 195
 196 static void
 197 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 198                           uint8_t next_protocol, uint64_t *item_flags,
 199                           int *tunnel)
 200 {
 201         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 202                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 203         if (next_protocol == IPPROTO_IPIP) {
 204                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 205                 *tunnel = 1;
 206         }
 207         if (next_protocol == IPPROTO_IPV6) {
 208                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 209                 *tunnel = 1;
 210         }
 211 }
 212
 213 /**
 214  * Acquire the synchronizing object to protect multithreaded access
 215  * to shared dv context. Lock occurs only if context is actually
 216  * shared, i.e. we have multiport IB device and representors are
 217  * created.
 218  *
 219  * @param[in] dev
 220  *   Pointer to the rte_eth_dev structure.
 221  */
 222 static void
 223 flow_dv_shared_lock(struct rte_eth_dev *dev)
 224 {
 225         struct mlx5_priv *priv = dev->data->dev_private;
 226         struct mlx5_ibv_shared *sh = priv->sh;
 227
 228         if (sh->dv_refcnt > 1) {
 229                 int ret;
 230
 231                 ret = pthread_mutex_lock(&sh->dv_mutex);
 232                 assert(!ret);
 233                 (void)ret;
 234         }
 235 }
 236
 237 static void
 238 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 239 {
 240         struct mlx5_priv *priv = dev->data->dev_private;
 241         struct mlx5_ibv_shared *sh = priv->sh;
 242
 243         if (sh->dv_refcnt > 1) {
 244                 int ret;
 245
 246                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 247                 assert(!ret);
 248                 (void)ret;
 249         }
 250 }
 251
 252 /* Update VLAN's VID/PCP based on input rte_flow_action.
 253  *
 254  * @param[in] action
 255  *   Pointer to struct rte_flow_action.
 256  * @param[out] vlan
 257  *   Pointer to struct rte_vlan_hdr.
 258  */
 259 static void
 260 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 261                          struct rte_vlan_hdr *vlan)
 262 {
 263         uint16_t vlan_tci;
 264         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 265                 vlan_tci =
 266                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 267                                                action->conf)->vlan_pcp;
 268                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 269                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 270                 vlan->vlan_tci |= vlan_tci;
 271         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 272                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 273                 vlan->vlan_tci |= rte_be_to_cpu_16
 274                     (((const struct rte_flow_action_of_set_vlan_vid *)
 275                                              action->conf)->vlan_vid);
 276         }
 277 }
 278
 279 /**
 280  * Fetch 1, 2, 3 or 4 byte field from the byte array
 281  * and return as unsigned integer in host-endian format.
 282  *
 283  * @param[in] data
 284  *   Pointer to data array.
 285  * @param[in] size
 286  *   Size of field to extract.
 287  *
 288  * @return
 289  *   converted field in host endian format.
 290  */
 291 static inline uint32_t
 292 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 293 {
 294         uint32_t ret;
 295
 296         switch (size) {
 297         case 1:
 298                 ret = *data;
 299                 break;
 300         case 2:
 301                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 302                 break;
 303         case 3:
 304                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 305                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 306                 break;
 307         case 4:
 308                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 309                 break;
 310         default:
 311                 assert(false);
 312                 ret = 0;
 313                 break;
 314         }
 315         return ret;
 316 }
 317
 318 /**
 319  * Convert modify-header action to DV specification.
 320  *
 321  * Data length of each action is determined by provided field description
 322  * and the item mask. Data bit offset and width of each action is determined
 323  * by provided item mask.
 324  *
 325  * @param[in] item
 326  *   Pointer to item specification.
 327  * @param[in] field
 328  *   Pointer to field modification information.
 329  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 330  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 331  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 332  * @param[in] dcopy
 333  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 334  *   Negative offset value sets the same offset as source offset.
 335  *   size field is ignored, value is taken from source field.
 336  * @param[in,out] resource
 337  *   Pointer to the modify-header resource.
 338  * @param[in] type
 339  *   Type of modification.
 340  * @param[out] error
 341  *   Pointer to the error structure.
 342  *
 343  * @return
 344  *   0 on success, a negative errno value otherwise and rte_errno is set.
 345  */
 346 static int
 347 flow_dv_convert_modify_action(struct rte_flow_item *item,
 348                               struct field_modify_info *field,
 349                               struct field_modify_info *dcopy,
 350                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 351                               uint32_t type, struct rte_flow_error *error)
 352 {
 353         uint32_t i = resource->actions_num;
 354         struct mlx5_modification_cmd *actions = resource->actions;
 355
 356         /*
 357          * The item and mask are provided in big-endian format.
 358          * The fields should be presented as in big-endian format either.
 359          * Mask must be always present, it defines the actual field width.
 360          */
 361         assert(item->mask);
 362         assert(field->size);
 363         do {
 364                 unsigned int size_b;
 365                 unsigned int off_b;
 366                 uint32_t mask;
 367                 uint32_t data;
 368
 369                 if (i >= MLX5_MAX_MODIFY_NUM)
 370                         return rte_flow_error_set(error, EINVAL,
 371                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 372                                  "too many items to modify");
 373                 /* Fetch variable byte size mask from the array. */
 374                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 375                                            field->offset, field->size);
 376                 if (!mask) {
 377                         ++field;
 378                         continue;
 379                 }
 380                 /* Deduce actual data width in bits from mask value. */
 381                 off_b = rte_bsf32(mask);
 382                 size_b = sizeof(uint32_t) * CHAR_BIT -
 383                          off_b - __builtin_clz(mask);
 384                 assert(size_b);
 385                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 386                 actions[i].action_type = type;
 387                 actions[i].field = field->id;
 388                 actions[i].offset = off_b;
 389                 actions[i].length = size_b;
 390                 /* Convert entire record to expected big-endian format. */
 391                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 392                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 393                         assert(dcopy);
 394                         actions[i].dst_field = dcopy->id;
 395                         actions[i].dst_offset =
 396                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 397                         /* Convert entire record to big-endian format. */
 398                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 399                 } else {
 400                         assert(item->spec);
 401                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 402                                                    field->offset, field->size);
 403                         /* Shift out the trailing masked bits from data. */
 404                         data = (data & mask) >> off_b;
 405                         actions[i].data1 = rte_cpu_to_be_32(data);
 406                 }
 407                 ++i;
 408                 ++field;
 409         } while (field->size);
 410         if (resource->actions_num == i)
 411                 return rte_flow_error_set(error, EINVAL,
 412                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 413                                           "invalid modification flow item");
 414         resource->actions_num = i;
 415         return 0;
 416 }
 417
 418 /**
 419  * Convert modify-header set IPv4 address action to DV specification.
 420  *
 421  * @param[in,out] resource
 422  *   Pointer to the modify-header resource.
 423  * @param[in] action
 424  *   Pointer to action specification.
 425  * @param[out] error
 426  *   Pointer to the error structure.
 427  *
 428  * @return
 429  *   0 on success, a negative errno value otherwise and rte_errno is set.
 430  */
 431 static int
 432 flow_dv_convert_action_modify_ipv4
 433                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 434                          const struct rte_flow_action *action,
 435                          struct rte_flow_error *error)
 436 {
 437         const struct rte_flow_action_set_ipv4 *conf =
 438                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 439         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 440         struct rte_flow_item_ipv4 ipv4;
 441         struct rte_flow_item_ipv4 ipv4_mask;
 442
 443         memset(&ipv4, 0, sizeof(ipv4));
 444         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 445         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 446                 ipv4.hdr.src_addr = conf->ipv4_addr;
 447                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 448         } else {
 449                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 450                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 451         }
 452         item.spec = &ipv4;
 453         item.mask = &ipv4_mask;
 454         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 455                                              MLX5_MODIFICATION_TYPE_SET, error);
 456 }
 457
 458 /**
 459  * Convert modify-header set IPv6 address action to DV specification.
 460  *
 461  * @param[in,out] resource
 462  *   Pointer to the modify-header resource.
 463  * @param[in] action
 464  *   Pointer to action specification.
 465  * @param[out] error
 466  *   Pointer to the error structure.
 467  *
 468  * @return
 469  *   0 on success, a negative errno value otherwise and rte_errno is set.
 470  */
 471 static int
 472 flow_dv_convert_action_modify_ipv6
 473                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 474                          const struct rte_flow_action *action,
 475                          struct rte_flow_error *error)
 476 {
 477         const struct rte_flow_action_set_ipv6 *conf =
 478                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 479         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 480         struct rte_flow_item_ipv6 ipv6;
 481         struct rte_flow_item_ipv6 ipv6_mask;
 482
 483         memset(&ipv6, 0, sizeof(ipv6));
 484         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 485         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 486                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 487                        sizeof(ipv6.hdr.src_addr));
 488                 memcpy(&ipv6_mask.hdr.src_addr,
 489                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 490                        sizeof(ipv6.hdr.src_addr));
 491         } else {
 492                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 493                        sizeof(ipv6.hdr.dst_addr));
 494                 memcpy(&ipv6_mask.hdr.dst_addr,
 495                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 496                        sizeof(ipv6.hdr.dst_addr));
 497         }
 498         item.spec = &ipv6;
 499         item.mask = &ipv6_mask;
 500         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 501                                              MLX5_MODIFICATION_TYPE_SET, error);
 502 }
 503
 504 /**
 505  * Convert modify-header set MAC address action to DV specification.
 506  *
 507  * @param[in,out] resource
 508  *   Pointer to the modify-header resource.
 509  * @param[in] action
 510  *   Pointer to action specification.
 511  * @param[out] error
 512  *   Pointer to the error structure.
 513  *
 514  * @return
 515  *   0 on success, a negative errno value otherwise and rte_errno is set.
 516  */
 517 static int
 518 flow_dv_convert_action_modify_mac
 519                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 520                          const struct rte_flow_action *action,
 521                          struct rte_flow_error *error)
 522 {
 523         const struct rte_flow_action_set_mac *conf =
 524                 (const struct rte_flow_action_set_mac *)(action->conf);
 525         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 526         struct rte_flow_item_eth eth;
 527         struct rte_flow_item_eth eth_mask;
 528
 529         memset(&eth, 0, sizeof(eth));
 530         memset(&eth_mask, 0, sizeof(eth_mask));
 531         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 532                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 533                        sizeof(eth.src.addr_bytes));
 534                 memcpy(&eth_mask.src.addr_bytes,
 535                        &rte_flow_item_eth_mask.src.addr_bytes,
 536                        sizeof(eth_mask.src.addr_bytes));
 537         } else {
 538                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 539                        sizeof(eth.dst.addr_bytes));
 540                 memcpy(&eth_mask.dst.addr_bytes,
 541                        &rte_flow_item_eth_mask.dst.addr_bytes,
 542                        sizeof(eth_mask.dst.addr_bytes));
 543         }
 544         item.spec = &eth;
 545         item.mask = &eth_mask;
 546         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 547                                              MLX5_MODIFICATION_TYPE_SET, error);
 548 }
 549
 550 /**
 551  * Convert modify-header set VLAN VID action to DV specification.
 552  *
 553  * @param[in,out] resource
 554  *   Pointer to the modify-header resource.
 555  * @param[in] action
 556  *   Pointer to action specification.
 557  * @param[out] error
 558  *   Pointer to the error structure.
 559  *
 560  * @return
 561  *   0 on success, a negative errno value otherwise and rte_errno is set.
 562  */
 563 static int
 564 flow_dv_convert_action_modify_vlan_vid
 565                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 566                          const struct rte_flow_action *action,
 567                          struct rte_flow_error *error)
 568 {
 569         const struct rte_flow_action_of_set_vlan_vid *conf =
 570                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 571         int i = resource->actions_num;
 572         struct mlx5_modification_cmd *actions = &resource->actions[i];
 573         struct field_modify_info *field = modify_vlan_out_first_vid;
 574
 575         if (i >= MLX5_MAX_MODIFY_NUM)
 576                 return rte_flow_error_set(error, EINVAL,
 577                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 578                          "too many items to modify");
 579         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 580         actions[i].field = field->id;
 581         actions[i].length = field->size;
 582         actions[i].offset = field->offset;
 583         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 584         actions[i].data1 = conf->vlan_vid;
 585         actions[i].data1 = actions[i].data1 << 16;
 586         resource->actions_num = ++i;
 587         return 0;
 588 }
 589
 590 /**
 591  * Convert modify-header set TP action to DV specification.
 592  *
 593  * @param[in,out] resource
 594  *   Pointer to the modify-header resource.
 595  * @param[in] action
 596  *   Pointer to action specification.
 597  * @param[in] items
 598  *   Pointer to rte_flow_item objects list.
 599  * @param[in] attr
 600  *   Pointer to flow attributes structure.
 601  * @param[out] error
 602  *   Pointer to the error structure.
 603  *
 604  * @return
 605  *   0 on success, a negative errno value otherwise and rte_errno is set.
 606  */
 607 static int
 608 flow_dv_convert_action_modify_tp
 609                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 610                          const struct rte_flow_action *action,
 611                          const struct rte_flow_item *items,
 612                          union flow_dv_attr *attr,
 613                          struct rte_flow_error *error)
 614 {
 615         const struct rte_flow_action_set_tp *conf =
 616                 (const struct rte_flow_action_set_tp *)(action->conf);
 617         struct rte_flow_item item;
 618         struct rte_flow_item_udp udp;
 619         struct rte_flow_item_udp udp_mask;
 620         struct rte_flow_item_tcp tcp;
 621         struct rte_flow_item_tcp tcp_mask;
 622         struct field_modify_info *field;
 623
 624         if (!attr->valid)
 625                 flow_dv_attr_init(items, attr);
 626         if (attr->udp) {
 627                 memset(&udp, 0, sizeof(udp));
 628                 memset(&udp_mask, 0, sizeof(udp_mask));
 629                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 630                         udp.hdr.src_port = conf->port;
 631                         udp_mask.hdr.src_port =
 632                                         rte_flow_item_udp_mask.hdr.src_port;
 633                 } else {
 634                         udp.hdr.dst_port = conf->port;
 635                         udp_mask.hdr.dst_port =
 636                                         rte_flow_item_udp_mask.hdr.dst_port;
 637                 }
 638                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 639                 item.spec = &udp;
 640                 item.mask = &udp_mask;
 641                 field = modify_udp;
 642         }
 643         if (attr->tcp) {
 644                 memset(&tcp, 0, sizeof(tcp));
 645                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 646                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 647                         tcp.hdr.src_port = conf->port;
 648                         tcp_mask.hdr.src_port =
 649                                         rte_flow_item_tcp_mask.hdr.src_port;
 650                 } else {
 651                         tcp.hdr.dst_port = conf->port;
 652                         tcp_mask.hdr.dst_port =
 653                                         rte_flow_item_tcp_mask.hdr.dst_port;
 654                 }
 655                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 656                 item.spec = &tcp;
 657                 item.mask = &tcp_mask;
 658                 field = modify_tcp;
 659         }
 660         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 661                                              MLX5_MODIFICATION_TYPE_SET, error);
 662 }
 663
 664 /**
 665  * Convert modify-header set TTL action to DV specification.
 666  *
 667  * @param[in,out] resource
 668  *   Pointer to the modify-header resource.
 669  * @param[in] action
 670  *   Pointer to action specification.
 671  * @param[in] items
 672  *   Pointer to rte_flow_item objects list.
 673  * @param[in] attr
 674  *   Pointer to flow attributes structure.
 675  * @param[out] error
 676  *   Pointer to the error structure.
 677  *
 678  * @return
 679  *   0 on success, a negative errno value otherwise and rte_errno is set.
 680  */
 681 static int
 682 flow_dv_convert_action_modify_ttl
 683                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 684                          const struct rte_flow_action *action,
 685                          const struct rte_flow_item *items,
 686                          union flow_dv_attr *attr,
 687                          struct rte_flow_error *error)
 688 {
 689         const struct rte_flow_action_set_ttl *conf =
 690                 (const struct rte_flow_action_set_ttl *)(action->conf);
 691         struct rte_flow_item item;
 692         struct rte_flow_item_ipv4 ipv4;
 693         struct rte_flow_item_ipv4 ipv4_mask;
 694         struct rte_flow_item_ipv6 ipv6;
 695         struct rte_flow_item_ipv6 ipv6_mask;
 696         struct field_modify_info *field;
 697
 698         if (!attr->valid)
 699                 flow_dv_attr_init(items, attr);
 700         if (attr->ipv4) {
 701                 memset(&ipv4, 0, sizeof(ipv4));
 702                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 703                 ipv4.hdr.time_to_live = conf->ttl_value;
 704                 ipv4_mask.hdr.time_to_live = 0xFF;
 705                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 706                 item.spec = &ipv4;
 707                 item.mask = &ipv4_mask;
 708                 field = modify_ipv4;
 709         }
 710         if (attr->ipv6) {
 711                 memset(&ipv6, 0, sizeof(ipv6));
 712                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 713                 ipv6.hdr.hop_limits = conf->ttl_value;
 714                 ipv6_mask.hdr.hop_limits = 0xFF;
 715                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 716                 item.spec = &ipv6;
 717                 item.mask = &ipv6_mask;
 718                 field = modify_ipv6;
 719         }
 720         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 721                                              MLX5_MODIFICATION_TYPE_SET, error);
 722 }
 723
 724 /**
 725  * Convert modify-header decrement TTL action to DV specification.
 726  *
 727  * @param[in,out] resource
 728  *   Pointer to the modify-header resource.
 729  * @param[in] action
 730  *   Pointer to action specification.
 731  * @param[in] items
 732  *   Pointer to rte_flow_item objects list.
 733  * @param[in] attr
 734  *   Pointer to flow attributes structure.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_dec_ttl
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_item *items,
 745                          union flow_dv_attr *attr,
 746                          struct rte_flow_error *error)
 747 {
 748         struct rte_flow_item item;
 749         struct rte_flow_item_ipv4 ipv4;
 750         struct rte_flow_item_ipv4 ipv4_mask;
 751         struct rte_flow_item_ipv6 ipv6;
 752         struct rte_flow_item_ipv6 ipv6_mask;
 753         struct field_modify_info *field;
 754
 755         if (!attr->valid)
 756                 flow_dv_attr_init(items, attr);
 757         if (attr->ipv4) {
 758                 memset(&ipv4, 0, sizeof(ipv4));
 759                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 760                 ipv4.hdr.time_to_live = 0xFF;
 761                 ipv4_mask.hdr.time_to_live = 0xFF;
 762                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 763                 item.spec = &ipv4;
 764                 item.mask = &ipv4_mask;
 765                 field = modify_ipv4;
 766         }
 767         if (attr->ipv6) {
 768                 memset(&ipv6, 0, sizeof(ipv6));
 769                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 770                 ipv6.hdr.hop_limits = 0xFF;
 771                 ipv6_mask.hdr.hop_limits = 0xFF;
 772                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 773                 item.spec = &ipv6;
 774                 item.mask = &ipv6_mask;
 775                 field = modify_ipv6;
 776         }
 777         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 778                                              MLX5_MODIFICATION_TYPE_ADD, error);
 779 }
 780
 781 /**
 782  * Convert modify-header increment/decrement TCP Sequence number
 783  * to DV specification.
 784  *
 785  * @param[in,out] resource
 786  *   Pointer to the modify-header resource.
 787  * @param[in] action
 788  *   Pointer to action specification.
 789  * @param[out] error
 790  *   Pointer to the error structure.
 791  *
 792  * @return
 793  *   0 on success, a negative errno value otherwise and rte_errno is set.
 794  */
 795 static int
 796 flow_dv_convert_action_modify_tcp_seq
 797                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 798                          const struct rte_flow_action *action,
 799                          struct rte_flow_error *error)
 800 {
 801         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 802         uint64_t value = rte_be_to_cpu_32(*conf);
 803         struct rte_flow_item item;
 804         struct rte_flow_item_tcp tcp;
 805         struct rte_flow_item_tcp tcp_mask;
 806
 807         memset(&tcp, 0, sizeof(tcp));
 808         memset(&tcp_mask, 0, sizeof(tcp_mask));
 809         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 810                 /*
 811                  * The HW has no decrement operation, only increment operation.
 812                  * To simulate decrement X from Y using increment operation
 813                  * we need to add UINT32_MAX X times to Y.
 814                  * Each adding of UINT32_MAX decrements Y by 1.
 815                  */
 816                 value *= UINT32_MAX;
 817         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 818         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 819         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 820         item.spec = &tcp;
 821         item.mask = &tcp_mask;
 822         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 823                                              MLX5_MODIFICATION_TYPE_ADD, error);
 824 }
 825
 826 /**
 827  * Convert modify-header increment/decrement TCP Acknowledgment number
 828  * to DV specification.
 829  *
 830  * @param[in,out] resource
 831  *   Pointer to the modify-header resource.
 832  * @param[in] action
 833  *   Pointer to action specification.
 834  * @param[out] error
 835  *   Pointer to the error structure.
 836  *
 837  * @return
 838  *   0 on success, a negative errno value otherwise and rte_errno is set.
 839  */
 840 static int
 841 flow_dv_convert_action_modify_tcp_ack
 842                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 843                          const struct rte_flow_action *action,
 844                          struct rte_flow_error *error)
 845 {
 846         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 847         uint64_t value = rte_be_to_cpu_32(*conf);
 848         struct rte_flow_item item;
 849         struct rte_flow_item_tcp tcp;
 850         struct rte_flow_item_tcp tcp_mask;
 851
 852         memset(&tcp, 0, sizeof(tcp));
 853         memset(&tcp_mask, 0, sizeof(tcp_mask));
 854         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 855                 /*
 856                  * The HW has no decrement operation, only increment operation.
 857                  * To simulate decrement X from Y using increment operation
 858                  * we need to add UINT32_MAX X times to Y.
 859                  * Each adding of UINT32_MAX decrements Y by 1.
 860                  */
 861                 value *= UINT32_MAX;
 862         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 863         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 864         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 865         item.spec = &tcp;
 866         item.mask = &tcp_mask;
 867         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 868                                              MLX5_MODIFICATION_TYPE_ADD, error);
 869 }
 870
 871 static enum mlx5_modification_field reg_to_field[] = {
 872         [REG_NONE] = MLX5_MODI_OUT_NONE,
 873         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 874         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 875         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 876         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 877         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 878         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 879         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 880         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 881         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 882         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 883 };
 884
 885 /**
 886  * Convert register set to DV specification.
 887  *
 888  * @param[in,out] resource
 889  *   Pointer to the modify-header resource.
 890  * @param[in] action
 891  *   Pointer to action specification.
 892  * @param[out] error
 893  *   Pointer to the error structure.
 894  *
 895  * @return
 896  *   0 on success, a negative errno value otherwise and rte_errno is set.
 897  */
 898 static int
 899 flow_dv_convert_action_set_reg
 900                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 901                          const struct rte_flow_action *action,
 902                          struct rte_flow_error *error)
 903 {
 904         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 905         struct mlx5_modification_cmd *actions = resource->actions;
 906         uint32_t i = resource->actions_num;
 907
 908         if (i >= MLX5_MAX_MODIFY_NUM)
 909                 return rte_flow_error_set(error, EINVAL,
 910                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 911                                           "too many items to modify");
 912         assert(conf->id != REG_NONE);
 913         assert(conf->id < RTE_DIM(reg_to_field));
 914         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 915         actions[i].field = reg_to_field[conf->id];
 916         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 917         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 918         ++i;
 919         resource->actions_num = i;
 920         return 0;
 921 }
 922
 923 /**
 924  * Convert SET_TAG action to DV specification.
 925  *
 926  * @param[in] dev
 927  *   Pointer to the rte_eth_dev structure.
 928  * @param[in,out] resource
 929  *   Pointer to the modify-header resource.
 930  * @param[in] conf
 931  *   Pointer to action specification.
 932  * @param[out] error
 933  *   Pointer to the error structure.
 934  *
 935  * @return
 936  *   0 on success, a negative errno value otherwise and rte_errno is set.
 937  */
 938 static int
 939 flow_dv_convert_action_set_tag
 940                         (struct rte_eth_dev *dev,
 941                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 942                          const struct rte_flow_action_set_tag *conf,
 943                          struct rte_flow_error *error)
 944 {
 945         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 946         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 947         struct rte_flow_item item = {
 948                 .spec = &data,
 949                 .mask = &mask,
 950         };
 951         struct field_modify_info reg_c_x[] = {
 952                 [1] = {0, 0, 0},
 953         };
 954         enum mlx5_modification_field reg_type;
 955         int ret;
 956
 957         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 958         if (ret < 0)
 959                 return ret;
 960         assert(ret != REG_NONE);
 961         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 962         reg_type = reg_to_field[ret];
 963         assert(reg_type > 0);
 964         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 965         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 966                                              MLX5_MODIFICATION_TYPE_SET, error);
 967 }
 968
 969 /**
 970  * Convert internal COPY_REG action to DV specification.
 971  *
 972  * @param[in] dev
 973  *   Pointer to the rte_eth_dev structure.
 974  * @param[in,out] res
 975  *   Pointer to the modify-header resource.
 976  * @param[in] action
 977  *   Pointer to action specification.
 978  * @param[out] error
 979  *   Pointer to the error structure.
 980  *
 981  * @return
 982  *   0 on success, a negative errno value otherwise and rte_errno is set.
 983  */
 984 static int
 985 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 986                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 987                                  const struct rte_flow_action *action,
 988                                  struct rte_flow_error *error)
 989 {
 990         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 991         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 992         struct rte_flow_item item = {
 993                 .spec = NULL,
 994                 .mask = &mask,
 995         };
 996         struct field_modify_info reg_src[] = {
 997                 {4, 0, reg_to_field[conf->src]},
 998                 {0, 0, 0},
 999         };
1000         struct field_modify_info reg_dst = {
1001                 .offset = 0,
1002                 .id = reg_to_field[conf->dst],
1003         };
1004         /* Adjust reg_c[0] usage according to reported mask. */
1005         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1006                 struct mlx5_priv *priv = dev->data->dev_private;
1007                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1008
1009                 assert(reg_c0);
1010                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1011                 if (conf->dst == REG_C_0) {
1012                         /* Copy to reg_c[0], within mask only. */
1013                         reg_dst.offset = rte_bsf32(reg_c0);
1014                         /*
1015                          * Mask is ignoring the enianness, because
1016                          * there is no conversion in datapath.
1017                          */
1018 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1019                         /* Copy from destination lower bits to reg_c[0]. */
1020                         mask = reg_c0 >> reg_dst.offset;
1021 #else
1022                         /* Copy from destination upper bits to reg_c[0]. */
1023                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1024                                           rte_fls_u32(reg_c0));
1025 #endif
1026                 } else {
1027                         mask = rte_cpu_to_be_32(reg_c0);
1028 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1029                         /* Copy from reg_c[0] to destination lower bits. */
1030                         reg_dst.offset = 0;
1031 #else
1032                         /* Copy from reg_c[0] to destination upper bits. */
1033                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1034                                          (rte_fls_u32(reg_c0) -
1035                                           rte_bsf32(reg_c0));
1036 #endif
1037                 }
1038         }
1039         return flow_dv_convert_modify_action(&item,
1040                                              reg_src, &reg_dst, res,
1041                                              MLX5_MODIFICATION_TYPE_COPY,
1042                                              error);
1043 }
1044
1045 /**
1046  * Convert MARK action to DV specification. This routine is used
1047  * in extensive metadata only and requires metadata register to be
1048  * handled. In legacy mode hardware tag resource is engaged.
1049  *
1050  * @param[in] dev
1051  *   Pointer to the rte_eth_dev structure.
1052  * @param[in] conf
1053  *   Pointer to MARK action specification.
1054  * @param[in,out] resource
1055  *   Pointer to the modify-header resource.
1056  * @param[out] error
1057  *   Pointer to the error structure.
1058  *
1059  * @return
1060  *   0 on success, a negative errno value otherwise and rte_errno is set.
1061  */
1062 static int
1063 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1064                             const struct rte_flow_action_mark *conf,
1065                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1066                             struct rte_flow_error *error)
1067 {
1068         struct mlx5_priv *priv = dev->data->dev_private;
1069         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1070                                            priv->sh->dv_mark_mask);
1071         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1072         struct rte_flow_item item = {
1073                 .spec = &data,
1074                 .mask = &mask,
1075         };
1076         struct field_modify_info reg_c_x[] = {
1077                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1078                 {0, 0, 0},
1079         };
1080         enum modify_reg reg;
1081
1082         if (!mask)
1083                 return rte_flow_error_set(error, EINVAL,
1084                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1085                                           NULL, "zero mark action mask");
1086         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1087         if (reg < 0)
1088                 return reg;
1089         assert(reg > 0);
1090         if (reg == REG_C_0) {
1091                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1092                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1093
1094                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1095                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1096                 mask = rte_cpu_to_be_32(mask << shl_c0);
1097         }
1098         reg_c_x[0].id = reg_to_field[reg];
1099         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1100                                              MLX5_MODIFICATION_TYPE_SET, error);
1101 }
1102
1103 /**
1104  * Get metadata register index for specified steering domain.
1105  *
1106  * @param[in] dev
1107  *   Pointer to the rte_eth_dev structure.
1108  * @param[in] attr
1109  *   Attributes of flow to determine steering domain.
1110  * @param[out] error
1111  *   Pointer to the error structure.
1112  *
1113  * @return
1114  *   positive index on success, a negative errno value otherwise
1115  *   and rte_errno is set.
1116  */
1117 static enum modify_reg
1118 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1119                          const struct rte_flow_attr *attr,
1120                          struct rte_flow_error *error)
1121 {
1122         enum modify_reg reg =
1123                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1124                                           MLX5_METADATA_FDB :
1125                                             attr->egress ?
1126                                             MLX5_METADATA_TX :
1127                                             MLX5_METADATA_RX, 0, error);
1128         if (reg < 0)
1129                 return rte_flow_error_set(error,
1130                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1131                                           NULL, "unavailable "
1132                                           "metadata register");
1133         return reg;
1134 }
1135
1136 /**
1137  * Convert SET_META action to DV specification.
1138  *
1139  * @param[in] dev
1140  *   Pointer to the rte_eth_dev structure.
1141  * @param[in,out] resource
1142  *   Pointer to the modify-header resource.
1143  * @param[in] attr
1144  *   Attributes of flow that includes this item.
1145  * @param[in] conf
1146  *   Pointer to action specification.
1147  * @param[out] error
1148  *   Pointer to the error structure.
1149  *
1150  * @return
1151  *   0 on success, a negative errno value otherwise and rte_errno is set.
1152  */
1153 static int
1154 flow_dv_convert_action_set_meta
1155                         (struct rte_eth_dev *dev,
1156                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1157                          const struct rte_flow_attr *attr,
1158                          const struct rte_flow_action_set_meta *conf,
1159                          struct rte_flow_error *error)
1160 {
1161         uint32_t data = conf->data;
1162         uint32_t mask = conf->mask;
1163         struct rte_flow_item item = {
1164                 .spec = &data,
1165                 .mask = &mask,
1166         };
1167         struct field_modify_info reg_c_x[] = {
1168                 [1] = {0, 0, 0},
1169         };
1170         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1171
1172         if (reg < 0)
1173                 return reg;
1174         /*
1175          * In datapath code there is no endianness
1176          * coversions for perfromance reasons, all
1177          * pattern conversions are done in rte_flow.
1178          */
1179         if (reg == REG_C_0) {
1180                 struct mlx5_priv *priv = dev->data->dev_private;
1181                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1182                 uint32_t shl_c0;
1183
1184                 assert(msk_c0);
1185 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1186                 shl_c0 = rte_bsf32(msk_c0);
1187 #else
1188                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1189 #endif
1190                 mask <<= shl_c0;
1191                 data <<= shl_c0;
1192                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1193         }
1194         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1195         /* The routine expects parameters in memory as big-endian ones. */
1196         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1197                                              MLX5_MODIFICATION_TYPE_SET, error);
1198 }
1199
1200 /**
1201  * Convert modify-header set IPv4 DSCP action to DV specification.
1202  *
1203  * @param[in,out] resource
1204  *   Pointer to the modify-header resource.
1205  * @param[in] action
1206  *   Pointer to action specification.
1207  * @param[out] error
1208  *   Pointer to the error structure.
1209  *
1210  * @return
1211  *   0 on success, a negative errno value otherwise and rte_errno is set.
1212  */
1213 static int
1214 flow_dv_convert_action_modify_ipv4_dscp
1215                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1216                          const struct rte_flow_action *action,
1217                          struct rte_flow_error *error)
1218 {
1219         const struct rte_flow_action_set_dscp *conf =
1220                 (const struct rte_flow_action_set_dscp *)(action->conf);
1221         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1222         struct rte_flow_item_ipv4 ipv4;
1223         struct rte_flow_item_ipv4 ipv4_mask;
1224
1225         memset(&ipv4, 0, sizeof(ipv4));
1226         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1227         ipv4.hdr.type_of_service = conf->dscp;
1228         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1229         item.spec = &ipv4;
1230         item.mask = &ipv4_mask;
1231         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1232                                              MLX5_MODIFICATION_TYPE_SET, error);
1233 }
1234
1235 /**
1236  * Convert modify-header set IPv6 DSCP action to DV specification.
1237  *
1238  * @param[in,out] resource
1239  *   Pointer to the modify-header resource.
1240  * @param[in] action
1241  *   Pointer to action specification.
1242  * @param[out] error
1243  *   Pointer to the error structure.
1244  *
1245  * @return
1246  *   0 on success, a negative errno value otherwise and rte_errno is set.
1247  */
1248 static int
1249 flow_dv_convert_action_modify_ipv6_dscp
1250                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1251                          const struct rte_flow_action *action,
1252                          struct rte_flow_error *error)
1253 {
1254         const struct rte_flow_action_set_dscp *conf =
1255                 (const struct rte_flow_action_set_dscp *)(action->conf);
1256         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1257         struct rte_flow_item_ipv6 ipv6;
1258         struct rte_flow_item_ipv6 ipv6_mask;
1259
1260         memset(&ipv6, 0, sizeof(ipv6));
1261         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1262         /*
1263          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1264          * rdma-core only accept the DSCP bits byte aligned start from
1265          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1266          * bits in IPv6 case as rdma-core requires byte aligned value.
1267          */
1268         ipv6.hdr.vtc_flow = conf->dscp;
1269         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1270         item.spec = &ipv6;
1271         item.mask = &ipv6_mask;
1272         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1273                                              MLX5_MODIFICATION_TYPE_SET, error);
1274 }
1275
1276 /**
1277  * Validate MARK item.
1278  *
1279  * @param[in] dev
1280  *   Pointer to the rte_eth_dev structure.
1281  * @param[in] item
1282  *   Item specification.
1283  * @param[in] attr
1284  *   Attributes of flow that includes this item.
1285  * @param[out] error
1286  *   Pointer to error structure.
1287  *
1288  * @return
1289  *   0 on success, a negative errno value otherwise and rte_errno is set.
1290  */
1291 static int
1292 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1293                            const struct rte_flow_item *item,
1294                            const struct rte_flow_attr *attr __rte_unused,
1295                            struct rte_flow_error *error)
1296 {
1297         struct mlx5_priv *priv = dev->data->dev_private;
1298         struct mlx5_dev_config *config = &priv->config;
1299         const struct rte_flow_item_mark *spec = item->spec;
1300         const struct rte_flow_item_mark *mask = item->mask;
1301         const struct rte_flow_item_mark nic_mask = {
1302                 .id = priv->sh->dv_mark_mask,
1303         };
1304         int ret;
1305
1306         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1307                 return rte_flow_error_set(error, ENOTSUP,
1308                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1309                                           "extended metadata feature"
1310                                           " isn't enabled");
1311         if (!mlx5_flow_ext_mreg_supported(dev))
1312                 return rte_flow_error_set(error, ENOTSUP,
1313                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1314                                           "extended metadata register"
1315                                           " isn't supported");
1316         if (!nic_mask.id)
1317                 return rte_flow_error_set(error, ENOTSUP,
1318                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1319                                           "extended metadata register"
1320                                           " isn't available");
1321         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1322         if (ret < 0)
1323                 return ret;
1324         if (!spec)
1325                 return rte_flow_error_set(error, EINVAL,
1326                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1327                                           item->spec,
1328                                           "data cannot be empty");
1329         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1330                 return rte_flow_error_set(error, EINVAL,
1331                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1332                                           &spec->id,
1333                                           "mark id exceeds the limit");
1334         if (!mask)
1335                 mask = &nic_mask;
1336         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1337                                         (const uint8_t *)&nic_mask,
1338                                         sizeof(struct rte_flow_item_mark),
1339                                         error);
1340         if (ret < 0)
1341                 return ret;
1342         return 0;
1343 }
1344
1345 /**
1346  * Validate META item.
1347  *
1348  * @param[in] dev
1349  *   Pointer to the rte_eth_dev structure.
1350  * @param[in] item
1351  *   Item specification.
1352  * @param[in] attr
1353  *   Attributes of flow that includes this item.
1354  * @param[out] error
1355  *   Pointer to error structure.
1356  *
1357  * @return
1358  *   0 on success, a negative errno value otherwise and rte_errno is set.
1359  */
1360 static int
1361 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1362                            const struct rte_flow_item *item,
1363                            const struct rte_flow_attr *attr,
1364                            struct rte_flow_error *error)
1365 {
1366         struct mlx5_priv *priv = dev->data->dev_private;
1367         struct mlx5_dev_config *config = &priv->config;
1368         const struct rte_flow_item_meta *spec = item->spec;
1369         const struct rte_flow_item_meta *mask = item->mask;
1370         struct rte_flow_item_meta nic_mask = {
1371                 .data = UINT32_MAX
1372         };
1373         enum modify_reg reg;
1374         int ret;
1375
1376         if (!spec)
1377                 return rte_flow_error_set(error, EINVAL,
1378                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1379                                           item->spec,
1380                                           "data cannot be empty");
1381         if (!spec->data)
1382                 return rte_flow_error_set(error, EINVAL,
1383                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1384                                           "data cannot be zero");
1385         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1386                 if (!mlx5_flow_ext_mreg_supported(dev))
1387                         return rte_flow_error_set(error, ENOTSUP,
1388                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1389                                           "extended metadata register"
1390                                           " isn't supported");
1391                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1392                 if (reg < 0)
1393                         return reg;
1394                 if (reg == REG_B)
1395                         return rte_flow_error_set(error, ENOTSUP,
1396                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1397                                           "match on reg_b "
1398                                           "isn't supported");
1399                 if (reg != REG_A)
1400                         nic_mask.data = priv->sh->dv_meta_mask;
1401         }
1402         if (!mask)
1403                 mask = &rte_flow_item_meta_mask;
1404         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1405                                         (const uint8_t *)&nic_mask,
1406                                         sizeof(struct rte_flow_item_meta),
1407                                         error);
1408         return ret;
1409 }
1410
1411 /**
1412  * Validate TAG item.
1413  *
1414  * @param[in] dev
1415  *   Pointer to the rte_eth_dev structure.
1416  * @param[in] item
1417  *   Item specification.
1418  * @param[in] attr
1419  *   Attributes of flow that includes this item.
1420  * @param[out] error
1421  *   Pointer to error structure.
1422  *
1423  * @return
1424  *   0 on success, a negative errno value otherwise and rte_errno is set.
1425  */
1426 static int
1427 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1428                           const struct rte_flow_item *item,
1429                           const struct rte_flow_attr *attr __rte_unused,
1430                           struct rte_flow_error *error)
1431 {
1432         const struct rte_flow_item_tag *spec = item->spec;
1433         const struct rte_flow_item_tag *mask = item->mask;
1434         const struct rte_flow_item_tag nic_mask = {
1435                 .data = RTE_BE32(UINT32_MAX),
1436                 .index = 0xff,
1437         };
1438         int ret;
1439
1440         if (!mlx5_flow_ext_mreg_supported(dev))
1441                 return rte_flow_error_set(error, ENOTSUP,
1442                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1443                                           "extensive metadata register"
1444                                           " isn't supported");
1445         if (!spec)
1446                 return rte_flow_error_set(error, EINVAL,
1447                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1448                                           item->spec,
1449                                           "data cannot be empty");
1450         if (!mask)
1451                 mask = &rte_flow_item_tag_mask;
1452         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1453                                         (const uint8_t *)&nic_mask,
1454                                         sizeof(struct rte_flow_item_tag),
1455                                         error);
1456         if (ret < 0)
1457                 return ret;
1458         if (mask->index != 0xff)
1459                 return rte_flow_error_set(error, EINVAL,
1460                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1461                                           "partial mask for tag index"
1462                                           " is not supported");
1463         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1464         if (ret < 0)
1465                 return ret;
1466         assert(ret != REG_NONE);
1467         return 0;
1468 }
1469
1470 /**
1471  * Validate vport item.
1472  *
1473  * @param[in] dev
1474  *   Pointer to the rte_eth_dev structure.
1475  * @param[in] item
1476  *   Item specification.
1477  * @param[in] attr
1478  *   Attributes of flow that includes this item.
1479  * @param[in] item_flags
1480  *   Bit-fields that holds the items detected until now.
1481  * @param[out] error
1482  *   Pointer to error structure.
1483  *
1484  * @return
1485  *   0 on success, a negative errno value otherwise and rte_errno is set.
1486  */
1487 static int
1488 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1489                               const struct rte_flow_item *item,
1490                               const struct rte_flow_attr *attr,
1491                               uint64_t item_flags,
1492                               struct rte_flow_error *error)
1493 {
1494         const struct rte_flow_item_port_id *spec = item->spec;
1495         const struct rte_flow_item_port_id *mask = item->mask;
1496         const struct rte_flow_item_port_id switch_mask = {
1497                         .id = 0xffffffff,
1498         };
1499         struct mlx5_priv *esw_priv;
1500         struct mlx5_priv *dev_priv;
1501         int ret;
1502
1503         if (!attr->transfer)
1504                 return rte_flow_error_set(error, EINVAL,
1505                                           RTE_FLOW_ERROR_TYPE_ITEM,
1506                                           NULL,
1507                                           "match on port id is valid only"
1508                                           " when transfer flag is enabled");
1509         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1510                 return rte_flow_error_set(error, ENOTSUP,
1511                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1512                                           "multiple source ports are not"
1513                                           " supported");
1514         if (!mask)
1515                 mask = &switch_mask;
1516         if (mask->id != 0xffffffff)
1517                 return rte_flow_error_set(error, ENOTSUP,
1518                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1519                                            mask,
1520                                            "no support for partial mask on"
1521                                            " \"id\" field");
1522         ret = mlx5_flow_item_acceptable
1523                                 (item, (const uint8_t *)mask,
1524                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1525                                  sizeof(struct rte_flow_item_port_id),
1526                                  error);
1527         if (ret)
1528                 return ret;
1529         if (!spec)
1530                 return 0;
1531         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1532         if (!esw_priv)
1533                 return rte_flow_error_set(error, rte_errno,
1534                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1535                                           "failed to obtain E-Switch info for"
1536                                           " port");
1537         dev_priv = mlx5_dev_to_eswitch_info(dev);
1538         if (!dev_priv)
1539                 return rte_flow_error_set(error, rte_errno,
1540                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1541                                           NULL,
1542                                           "failed to obtain E-Switch info");
1543         if (esw_priv->domain_id != dev_priv->domain_id)
1544                 return rte_flow_error_set(error, EINVAL,
1545                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1546                                           "cannot match on a port from a"
1547                                           " different E-Switch");
1548         return 0;
1549 }
1550
1551 /**
1552  * Validate GTP item.
1553  *
1554  * @param[in] dev
1555  *   Pointer to the rte_eth_dev structure.
1556  * @param[in] item
1557  *   Item specification.
1558  * @param[in] item_flags
1559  *   Bit-fields that holds the items detected until now.
1560  * @param[out] error
1561  *   Pointer to error structure.
1562  *
1563  * @return
1564  *   0 on success, a negative errno value otherwise and rte_errno is set.
1565  */
1566 static int
1567 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1568                           const struct rte_flow_item *item,
1569                           uint64_t item_flags,
1570                           struct rte_flow_error *error)
1571 {
1572         struct mlx5_priv *priv = dev->data->dev_private;
1573         const struct rte_flow_item_gtp *mask = item->mask;
1574         const struct rte_flow_item_gtp nic_mask = {
1575                 .msg_type = 0xff,
1576                 .teid = RTE_BE32(0xffffffff),
1577         };
1578
1579         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1580                 return rte_flow_error_set(error, ENOTSUP,
1581                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1582                                           "GTP support is not enabled");
1583         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1584                 return rte_flow_error_set(error, ENOTSUP,
1585                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1586                                           "multiple tunnel layers not"
1587                                           " supported");
1588         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1589                 return rte_flow_error_set(error, EINVAL,
1590                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1591                                           "no outer UDP layer found");
1592         if (!mask)
1593                 mask = &rte_flow_item_gtp_mask;
1594         return mlx5_flow_item_acceptable
1595                 (item, (const uint8_t *)mask,
1596                  (const uint8_t *)&nic_mask,
1597                  sizeof(struct rte_flow_item_gtp),
1598                  error);
1599 }
1600
1601 /**
1602  * Validate the pop VLAN action.
1603  *
1604  * @param[in] dev
1605  *   Pointer to the rte_eth_dev structure.
1606  * @param[in] action_flags
1607  *   Holds the actions detected until now.
1608  * @param[in] action
1609  *   Pointer to the pop vlan action.
1610  * @param[in] item_flags
1611  *   The items found in this flow rule.
1612  * @param[in] attr
1613  *   Pointer to flow attributes.
1614  * @param[out] error
1615  *   Pointer to error structure.
1616  *
1617  * @return
1618  *   0 on success, a negative errno value otherwise and rte_errno is set.
1619  */
1620 static int
1621 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1622                                  uint64_t action_flags,
1623                                  const struct rte_flow_action *action,
1624                                  uint64_t item_flags,
1625                                  const struct rte_flow_attr *attr,
1626                                  struct rte_flow_error *error)
1627 {
1628         struct mlx5_priv *priv = dev->data->dev_private;
1629
1630         (void)action;
1631         (void)attr;
1632         if (!priv->sh->pop_vlan_action)
1633                 return rte_flow_error_set(error, ENOTSUP,
1634                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1635                                           NULL,
1636                                           "pop vlan action is not supported");
1637         /*
1638          * Check for inconsistencies:
1639          *  fail strip_vlan in a flow that matches packets without VLAN tags.
1640          *  fail strip_vlan in a flow that matches packets without explicitly a
1641          *  matching on VLAN tag ?
1642          */
1643         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
1644                 return rte_flow_error_set(error, ENOTSUP,
1645                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1646                                           NULL,
1647                                           "no support for multiple vlan pop "
1648                                           "actions");
1649         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1650                 return rte_flow_error_set(error, ENOTSUP,
1651                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1652                                           NULL,
1653                                           "cannot pop vlan without a "
1654                                           "match on (outer) vlan in the flow");
1655         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1656                 return rte_flow_error_set(error, EINVAL,
1657                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1658                                           "wrong action order, port_id should "
1659                                           "be after pop VLAN action");
1660         return 0;
1661 }
1662
1663 /**
1664  * Get VLAN default info from vlan match info.
1665  *
1666  * @param[in] dev
1667  *   Pointer to the rte_eth_dev structure.
1668  * @param[in] item
1669  *   the list of item specifications.
1670  * @param[out] vlan
1671  *   pointer VLAN info to fill to.
1672  * @param[out] error
1673  *   Pointer to error structure.
1674  *
1675  * @return
1676  *   0 on success, a negative errno value otherwise and rte_errno is set.
1677  */
1678 static void
1679 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1680                                   struct rte_vlan_hdr *vlan)
1681 {
1682         const struct rte_flow_item_vlan nic_mask = {
1683                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1684                                 MLX5DV_FLOW_VLAN_VID_MASK),
1685                 .inner_type = RTE_BE16(0xffff),
1686         };
1687
1688         if (items == NULL)
1689                 return;
1690         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1691                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1692                 ;
1693         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1694                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1695                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1696
1697                 if (!vlan_m)
1698                         vlan_m = &nic_mask;
1699                 /* Only full match values are accepted */
1700                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1701                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1702                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1703                         vlan->vlan_tci |=
1704                                 rte_be_to_cpu_16(vlan_v->tci &
1705                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1706                 }
1707                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1708                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1709                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1710                         vlan->vlan_tci |=
1711                                 rte_be_to_cpu_16(vlan_v->tci &
1712                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1713                 }
1714                 if (vlan_m->inner_type == nic_mask.inner_type)
1715                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1716                                                            vlan_m->inner_type);
1717         }
1718 }
1719
1720 /**
1721  * Validate the push VLAN action.
1722  *
1723  * @param[in] action_flags
1724  *   Holds the actions detected until now.
1725  * @param[in] action
1726  *   Pointer to the encap action.
1727  * @param[in] attr
1728  *   Pointer to flow attributes
1729  * @param[out] error
1730  *   Pointer to error structure.
1731  *
1732  * @return
1733  *   0 on success, a negative errno value otherwise and rte_errno is set.
1734  */
1735 static int
1736 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1737                                   uint64_t item_flags,
1738                                   const struct rte_flow_action *action,
1739                                   const struct rte_flow_attr *attr,
1740                                   struct rte_flow_error *error)
1741 {
1742         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1743
1744         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1745             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1746                 return rte_flow_error_set(error, EINVAL,
1747                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1748                                           "invalid vlan ethertype");
1749         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1750                 return rte_flow_error_set(error, ENOTSUP,
1751                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1752                                           "no support for multiple VLAN "
1753                                           "actions");
1754         if (!mlx5_flow_find_action
1755                         (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) &&
1756             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1757                 return rte_flow_error_set(error, ENOTSUP,
1758                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
1759                                 "push VLAN needs to match on VLAN in order to "
1760                                 "get VLAN VID information because there is "
1761                                 "no followed set VLAN VID action");
1762         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1763                 return rte_flow_error_set(error, EINVAL,
1764                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1765                                           "wrong action order, port_id should "
1766                                           "be after push VLAN");
1767         (void)attr;
1768         return 0;
1769 }
1770
1771 /**
1772  * Validate the set VLAN PCP.
1773  *
1774  * @param[in] action_flags
1775  *   Holds the actions detected until now.
1776  * @param[in] actions
1777  *   Pointer to the list of actions remaining in the flow rule.
1778  * @param[in] attr
1779  *   Pointer to flow attributes
1780  * @param[out] error
1781  *   Pointer to error structure.
1782  *
1783  * @return
1784  *   0 on success, a negative errno value otherwise and rte_errno is set.
1785  */
1786 static int
1787 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1788                                      const struct rte_flow_action actions[],
1789                                      struct rte_flow_error *error)
1790 {
1791         const struct rte_flow_action *action = actions;
1792         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1793
1794         if (conf->vlan_pcp > 7)
1795                 return rte_flow_error_set(error, EINVAL,
1796                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1797                                           "VLAN PCP value is too big");
1798         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1799                 return rte_flow_error_set(error, ENOTSUP,
1800                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1801                                           "set VLAN PCP action must follow "
1802                                           "the push VLAN action");
1803         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1804                 return rte_flow_error_set(error, ENOTSUP,
1805                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1806                                           "Multiple VLAN PCP modification are "
1807                                           "not supported");
1808         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1809                 return rte_flow_error_set(error, EINVAL,
1810                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1811                                           "wrong action order, port_id should "
1812                                           "be after set VLAN PCP");
1813         return 0;
1814 }
1815
1816 /**
1817  * Validate the set VLAN VID.
1818  *
1819  * @param[in] item_flags
1820  *   Holds the items detected in this rule.
1821  * @param[in] actions
1822  *   Pointer to the list of actions remaining in the flow rule.
1823  * @param[in] attr
1824  *   Pointer to flow attributes
1825  * @param[out] error
1826  *   Pointer to error structure.
1827  *
1828  * @return
1829  *   0 on success, a negative errno value otherwise and rte_errno is set.
1830  */
1831 static int
1832 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1833                                      uint64_t action_flags,
1834                                      const struct rte_flow_action actions[],
1835                                      struct rte_flow_error *error)
1836 {
1837         const struct rte_flow_action *action = actions;
1838         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1839
1840         if (conf->vlan_vid > RTE_BE16(0xFFE))
1841                 return rte_flow_error_set(error, EINVAL,
1842                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1843                                           "VLAN VID value is too big");
1844         /* there is an of_push_vlan action before us */
1845         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1846                 if (mlx5_flow_find_action(actions + 1,
1847                                           RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1848                         return rte_flow_error_set(error, ENOTSUP,
1849                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
1850                                         "Multiple VLAN VID modifications are "
1851                                         "not supported");
1852                 else
1853                         return 0;
1854         }
1855
1856         /*
1857          * Action is on an existing VLAN header:
1858          *    Need to verify this is a single modify CID action.
1859          *   Rule mast include a match on outer VLAN.
1860          */
1861         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1862                 return rte_flow_error_set(error, ENOTSUP,
1863                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1864                                           "Multiple VLAN VID modifications are "
1865                                           "not supported");
1866         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1867                 return rte_flow_error_set(error, EINVAL,
1868                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1869                                           "match on VLAN is required in order "
1870                                           "to set VLAN VID");
1871         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1872                 return rte_flow_error_set(error, EINVAL,
1873                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1874                                           "wrong action order, port_id should "
1875                                           "be after set VLAN VID");
1876         return 0;
1877 }
1878
1879 /*
1880  * Validate the FLAG action.
1881  *
1882  * @param[in] dev
1883  *   Pointer to the rte_eth_dev structure.
1884  * @param[in] action_flags
1885  *   Holds the actions detected until now.
1886  * @param[in] attr
1887  *   Pointer to flow attributes
1888  * @param[out] error
1889  *   Pointer to error structure.
1890  *
1891  * @return
1892  *   0 on success, a negative errno value otherwise and rte_errno is set.
1893  */
1894 static int
1895 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1896                              uint64_t action_flags,
1897                              const struct rte_flow_attr *attr,
1898                              struct rte_flow_error *error)
1899 {
1900         struct mlx5_priv *priv = dev->data->dev_private;
1901         struct mlx5_dev_config *config = &priv->config;
1902         int ret;
1903
1904         /* Fall back if no extended metadata register support. */
1905         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1906                 return mlx5_flow_validate_action_flag(action_flags, attr,
1907                                                       error);
1908         /* Extensive metadata mode requires registers. */
1909         if (!mlx5_flow_ext_mreg_supported(dev))
1910                 return rte_flow_error_set(error, ENOTSUP,
1911                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1912                                           "no metadata registers "
1913                                           "to support flag action");
1914         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1915                 return rte_flow_error_set(error, ENOTSUP,
1916                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1917                                           "extended metadata register"
1918                                           " isn't available");
1919         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1920         if (ret < 0)
1921                 return ret;
1922         assert(ret > 0);
1923         if (action_flags & MLX5_FLOW_ACTION_DROP)
1924                 return rte_flow_error_set(error, EINVAL,
1925                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1926                                           "can't drop and flag in same flow");
1927         if (action_flags & MLX5_FLOW_ACTION_MARK)
1928                 return rte_flow_error_set(error, EINVAL,
1929                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1930                                           "can't mark and flag in same flow");
1931         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1932                 return rte_flow_error_set(error, EINVAL,
1933                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1934                                           "can't have 2 flag"
1935                                           " actions in same flow");
1936         return 0;
1937 }
1938
1939 /**
1940  * Validate MARK action.
1941  *
1942  * @param[in] dev
1943  *   Pointer to the rte_eth_dev structure.
1944  * @param[in] action
1945  *   Pointer to action.
1946  * @param[in] action_flags
1947  *   Holds the actions detected until now.
1948  * @param[in] attr
1949  *   Pointer to flow attributes
1950  * @param[out] error
1951  *   Pointer to error structure.
1952  *
1953  * @return
1954  *   0 on success, a negative errno value otherwise and rte_errno is set.
1955  */
1956 static int
1957 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1958                              const struct rte_flow_action *action,
1959                              uint64_t action_flags,
1960                              const struct rte_flow_attr *attr,
1961                              struct rte_flow_error *error)
1962 {
1963         struct mlx5_priv *priv = dev->data->dev_private;
1964         struct mlx5_dev_config *config = &priv->config;
1965         const struct rte_flow_action_mark *mark = action->conf;
1966         int ret;
1967
1968         /* Fall back if no extended metadata register support. */
1969         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1970                 return mlx5_flow_validate_action_mark(action, action_flags,
1971                                                       attr, error);
1972         /* Extensive metadata mode requires registers. */
1973         if (!mlx5_flow_ext_mreg_supported(dev))
1974                 return rte_flow_error_set(error, ENOTSUP,
1975                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1976                                           "no metadata registers "
1977                                           "to support mark action");
1978         if (!priv->sh->dv_mark_mask)
1979                 return rte_flow_error_set(error, ENOTSUP,
1980                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1981                                           "extended metadata register"
1982                                           " isn't available");
1983         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1984         if (ret < 0)
1985                 return ret;
1986         assert(ret > 0);
1987         if (!mark)
1988                 return rte_flow_error_set(error, EINVAL,
1989                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1990                                           "configuration cannot be null");
1991         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1992                 return rte_flow_error_set(error, EINVAL,
1993                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1994                                           &mark->id,
1995                                           "mark id exceeds the limit");
1996         if (action_flags & MLX5_FLOW_ACTION_DROP)
1997                 return rte_flow_error_set(error, EINVAL,
1998                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1999                                           "can't drop and mark in same flow");
2000         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2001                 return rte_flow_error_set(error, EINVAL,
2002                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2003                                           "can't flag and mark in same flow");
2004         if (action_flags & MLX5_FLOW_ACTION_MARK)
2005                 return rte_flow_error_set(error, EINVAL,
2006                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2007                                           "can't have 2 mark actions in same"
2008                                           " flow");
2009         return 0;
2010 }
2011
2012 /**
2013  * Validate SET_META action.
2014  *
2015  * @param[in] dev
2016  *   Pointer to the rte_eth_dev structure.
2017  * @param[in] action
2018  *   Pointer to the encap action.
2019  * @param[in] action_flags
2020  *   Holds the actions detected until now.
2021  * @param[in] attr
2022  *   Pointer to flow attributes
2023  * @param[out] error
2024  *   Pointer to error structure.
2025  *
2026  * @return
2027  *   0 on success, a negative errno value otherwise and rte_errno is set.
2028  */
2029 static int
2030 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2031                                  const struct rte_flow_action *action,
2032                                  uint64_t action_flags __rte_unused,
2033                                  const struct rte_flow_attr *attr,
2034                                  struct rte_flow_error *error)
2035 {
2036         const struct rte_flow_action_set_meta *conf;
2037         uint32_t nic_mask = UINT32_MAX;
2038         enum modify_reg reg;
2039
2040         if (!mlx5_flow_ext_mreg_supported(dev))
2041                 return rte_flow_error_set(error, ENOTSUP,
2042                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2043                                           "extended metadata register"
2044                                           " isn't supported");
2045         reg = flow_dv_get_metadata_reg(dev, attr, error);
2046         if (reg < 0)
2047                 return reg;
2048         if (reg != REG_A && reg != REG_B) {
2049                 struct mlx5_priv *priv = dev->data->dev_private;
2050
2051                 nic_mask = priv->sh->dv_meta_mask;
2052         }
2053         if (!(action->conf))
2054                 return rte_flow_error_set(error, EINVAL,
2055                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2056                                           "configuration cannot be null");
2057         conf = (const struct rte_flow_action_set_meta *)action->conf;
2058         if (!conf->mask)
2059                 return rte_flow_error_set(error, EINVAL,
2060                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2061                                           "zero mask doesn't have any effect");
2062         if (conf->mask & ~nic_mask)
2063                 return rte_flow_error_set(error, EINVAL,
2064                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2065                                           "meta data must be within reg C0");
2066         if (!(conf->data & conf->mask))
2067                 return rte_flow_error_set(error, EINVAL,
2068                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2069                                           "zero value has no effect");
2070         return 0;
2071 }
2072
2073 /**
2074  * Validate SET_TAG action.
2075  *
2076  * @param[in] dev
2077  *   Pointer to the rte_eth_dev structure.
2078  * @param[in] action
2079  *   Pointer to the encap action.
2080  * @param[in] action_flags
2081  *   Holds the actions detected until now.
2082  * @param[in] attr
2083  *   Pointer to flow attributes
2084  * @param[out] error
2085  *   Pointer to error structure.
2086  *
2087  * @return
2088  *   0 on success, a negative errno value otherwise and rte_errno is set.
2089  */
2090 static int
2091 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2092                                 const struct rte_flow_action *action,
2093                                 uint64_t action_flags,
2094                                 const struct rte_flow_attr *attr,
2095                                 struct rte_flow_error *error)
2096 {
2097         const struct rte_flow_action_set_tag *conf;
2098         const uint64_t terminal_action_flags =
2099                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2100                 MLX5_FLOW_ACTION_RSS;
2101         int ret;
2102
2103         if (!mlx5_flow_ext_mreg_supported(dev))
2104                 return rte_flow_error_set(error, ENOTSUP,
2105                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2106                                           "extensive metadata register"
2107                                           " isn't supported");
2108         if (!(action->conf))
2109                 return rte_flow_error_set(error, EINVAL,
2110                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2111                                           "configuration cannot be null");
2112         conf = (const struct rte_flow_action_set_tag *)action->conf;
2113         if (!conf->mask)
2114                 return rte_flow_error_set(error, EINVAL,
2115                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2116                                           "zero mask doesn't have any effect");
2117         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2118         if (ret < 0)
2119                 return ret;
2120         if (!attr->transfer && attr->ingress &&
2121             (action_flags & terminal_action_flags))
2122                 return rte_flow_error_set(error, EINVAL,
2123                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2124                                           "set_tag has no effect"
2125                                           " with terminal actions");
2126         return 0;
2127 }
2128
2129 /**
2130  * Validate count action.
2131  *
2132  * @param[in] dev
2133  *   device otr.
2134  * @param[out] error
2135  *   Pointer to error structure.
2136  *
2137  * @return
2138  *   0 on success, a negative errno value otherwise and rte_errno is set.
2139  */
2140 static int
2141 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2142                               struct rte_flow_error *error)
2143 {
2144         struct mlx5_priv *priv = dev->data->dev_private;
2145
2146         if (!priv->config.devx)
2147                 goto notsup_err;
2148 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2149         return 0;
2150 #endif
2151 notsup_err:
2152         return rte_flow_error_set
2153                       (error, ENOTSUP,
2154                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2155                        NULL,
2156                        "count action not supported");
2157 }
2158
2159 /**
2160  * Validate the L2 encap action.
2161  *
2162  * @param[in] action_flags
2163  *   Holds the actions detected until now.
2164  * @param[in] action
2165  *   Pointer to the encap action.
2166  * @param[in] attr
2167  *   Pointer to flow attributes
2168  * @param[out] error
2169  *   Pointer to error structure.
2170  *
2171  * @return
2172  *   0 on success, a negative errno value otherwise and rte_errno is set.
2173  */
2174 static int
2175 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2176                                  const struct rte_flow_action *action,
2177                                  const struct rte_flow_attr *attr,
2178                                  struct rte_flow_error *error)
2179 {
2180         if (!(action->conf))
2181                 return rte_flow_error_set(error, EINVAL,
2182                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2183                                           "configuration cannot be null");
2184         if (action_flags & MLX5_FLOW_ACTION_DROP)
2185                 return rte_flow_error_set(error, EINVAL,
2186                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2187                                           "can't drop and encap in same flow");
2188         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2189                 return rte_flow_error_set(error, EINVAL,
2190                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2191                                           "can only have a single encap or"
2192                                           " decap action in a flow");
2193         if (!attr->transfer && attr->ingress)
2194                 return rte_flow_error_set(error, ENOTSUP,
2195                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2196                                           NULL,
2197                                           "encap action not supported for "
2198                                           "ingress");
2199         return 0;
2200 }
2201
2202 /**
2203  * Validate the L2 decap action.
2204  *
2205  * @param[in] action_flags
2206  *   Holds the actions detected until now.
2207  * @param[in] attr
2208  *   Pointer to flow attributes
2209  * @param[out] error
2210  *   Pointer to error structure.
2211  *
2212  * @return
2213  *   0 on success, a negative errno value otherwise and rte_errno is set.
2214  */
2215 static int
2216 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2217                                  const struct rte_flow_attr *attr,
2218                                  struct rte_flow_error *error)
2219 {
2220         if (action_flags & MLX5_FLOW_ACTION_DROP)
2221                 return rte_flow_error_set(error, EINVAL,
2222                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2223                                           "can't drop and decap in same flow");
2224         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2225                 return rte_flow_error_set(error, EINVAL,
2226                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2227                                           "can only have a single encap or"
2228                                           " decap action in a flow");
2229         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2230                 return rte_flow_error_set(error, EINVAL,
2231                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2232                                           "can't have decap action after"
2233                                           " modify action");
2234         if (attr->egress)
2235                 return rte_flow_error_set(error, ENOTSUP,
2236                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2237                                           NULL,
2238                                           "decap action not supported for "
2239                                           "egress");
2240         return 0;
2241 }
2242
2243 /**
2244  * Validate the raw encap action.
2245  *
2246  * @param[in] action_flags
2247  *   Holds the actions detected until now.
2248  * @param[in] action
2249  *   Pointer to the encap action.
2250  * @param[in] attr
2251  *   Pointer to flow attributes
2252  * @param[out] error
2253  *   Pointer to error structure.
2254  *
2255  * @return
2256  *   0 on success, a negative errno value otherwise and rte_errno is set.
2257  */
2258 static int
2259 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2260                                   const struct rte_flow_action *action,
2261                                   const struct rte_flow_attr *attr,
2262                                   struct rte_flow_error *error)
2263 {
2264         const struct rte_flow_action_raw_encap *raw_encap =
2265                 (const struct rte_flow_action_raw_encap *)action->conf;
2266         if (!(action->conf))
2267                 return rte_flow_error_set(error, EINVAL,
2268                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2269                                           "configuration cannot be null");
2270         if (action_flags & MLX5_FLOW_ACTION_DROP)
2271                 return rte_flow_error_set(error, EINVAL,
2272                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2273                                           "can't drop and encap in same flow");
2274         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2275                 return rte_flow_error_set(error, EINVAL,
2276                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2277                                           "can only have a single encap"
2278                                           " action in a flow");
2279         /* encap without preceding decap is not supported for ingress */
2280         if (!attr->transfer &&  attr->ingress &&
2281             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2282                 return rte_flow_error_set(error, ENOTSUP,
2283                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2284                                           NULL,
2285                                           "encap action not supported for "
2286                                           "ingress");
2287         if (!raw_encap->size || !raw_encap->data)
2288                 return rte_flow_error_set(error, EINVAL,
2289                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2290                                           "raw encap data cannot be empty");
2291         return 0;
2292 }
2293
2294 /**
2295  * Validate the raw decap action.
2296  *
2297  * @param[in] action_flags
2298  *   Holds the actions detected until now.
2299  * @param[in] action
2300  *   Pointer to the encap action.
2301  * @param[in] attr
2302  *   Pointer to flow attributes
2303  * @param[out] error
2304  *   Pointer to error structure.
2305  *
2306  * @return
2307  *   0 on success, a negative errno value otherwise and rte_errno is set.
2308  */
2309 static int
2310 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2311                                   const struct rte_flow_action *action,
2312                                   const struct rte_flow_attr *attr,
2313                                   struct rte_flow_error *error)
2314 {
2315         const struct rte_flow_action_raw_decap *decap   = action->conf;
2316
2317         if (action_flags & MLX5_FLOW_ACTION_DROP)
2318                 return rte_flow_error_set(error, EINVAL,
2319                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2320                                           "can't drop and decap in same flow");
2321         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2322                 return rte_flow_error_set(error, EINVAL,
2323                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2324                                           "can't have encap action before"
2325                                           " decap action");
2326         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2327                 return rte_flow_error_set(error, EINVAL,
2328                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2329                                           "can only have a single decap"
2330                                           " action in a flow");
2331         /* decap action is valid on egress only if it is followed by encap */
2332         if (attr->egress && decap &&
2333             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2334                 return rte_flow_error_set(error, ENOTSUP,
2335                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2336                                           NULL, "decap action not supported"
2337                                           " for egress");
2338         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2339                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2340                 return rte_flow_error_set(error, EINVAL,
2341                                           RTE_FLOW_ERROR_TYPE_ACTION,
2342                                           NULL,
2343                                           "can't have decap action "
2344                                           "after modify action");
2345         }
2346         return 0;
2347 }
2348
2349 /**
2350  * Find existing encap/decap resource or create and register a new one.
2351  *
2352  * @param[in, out] dev
2353  *   Pointer to rte_eth_dev structure.
2354  * @param[in, out] resource
2355  *   Pointer to encap/decap resource.
2356  * @parm[in, out] dev_flow
2357  *   Pointer to the dev_flow.
2358  * @param[out] error
2359  *   pointer to error structure.
2360  *
2361  * @return
2362  *   0 on success otherwise -errno and errno is set.
2363  */
2364 static int
2365 flow_dv_encap_decap_resource_register
2366                         (struct rte_eth_dev *dev,
2367                          struct mlx5_flow_dv_encap_decap_resource *resource,
2368                          struct mlx5_flow *dev_flow,
2369                          struct rte_flow_error *error)
2370 {
2371         struct mlx5_priv *priv = dev->data->dev_private;
2372         struct mlx5_ibv_shared *sh = priv->sh;
2373         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2374         struct mlx5dv_dr_domain *domain;
2375
2376         resource->flags = dev_flow->group ? 0 : 1;
2377         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2378                 domain = sh->fdb_domain;
2379         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2380                 domain = sh->rx_domain;
2381         else
2382                 domain = sh->tx_domain;
2383         /* Lookup a matching resource from cache. */
2384         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2385                 if (resource->reformat_type == cache_resource->reformat_type &&
2386                     resource->ft_type == cache_resource->ft_type &&
2387                     resource->flags == cache_resource->flags &&
2388                     resource->size == cache_resource->size &&
2389                     !memcmp((const void *)resource->buf,
2390                             (const void *)cache_resource->buf,
2391                             resource->size)) {
2392                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2393                                 (void *)cache_resource,
2394                                 rte_atomic32_read(&cache_resource->refcnt));
2395                         rte_atomic32_inc(&cache_resource->refcnt);
2396                         dev_flow->dv.encap_decap = cache_resource;
2397                         return 0;
2398                 }
2399         }
2400         /* Register new encap/decap resource. */
2401         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2402         if (!cache_resource)
2403                 return rte_flow_error_set(error, ENOMEM,
2404                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2405                                           "cannot allocate resource memory");
2406         *cache_resource = *resource;
2407         cache_resource->verbs_action =
2408                 mlx5_glue->dv_create_flow_action_packet_reformat
2409                         (sh->ctx, cache_resource->reformat_type,
2410                          cache_resource->ft_type, domain, cache_resource->flags,
2411                          cache_resource->size,
2412                          (cache_resource->size ? cache_resource->buf : NULL));
2413         if (!cache_resource->verbs_action) {
2414                 rte_free(cache_resource);
2415                 return rte_flow_error_set(error, ENOMEM,
2416                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2417                                           NULL, "cannot create action");
2418         }
2419         rte_atomic32_init(&cache_resource->refcnt);
2420         rte_atomic32_inc(&cache_resource->refcnt);
2421         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2422         dev_flow->dv.encap_decap = cache_resource;
2423         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2424                 (void *)cache_resource,
2425                 rte_atomic32_read(&cache_resource->refcnt));
2426         return 0;
2427 }
2428
2429 /**
2430  * Find existing table jump resource or create and register a new one.
2431  *
2432  * @param[in, out] dev
2433  *   Pointer to rte_eth_dev structure.
2434  * @param[in, out] tbl
2435  *   Pointer to flow table resource.
2436  * @parm[in, out] dev_flow
2437  *   Pointer to the dev_flow.
2438  * @param[out] error
2439  *   pointer to error structure.
2440  *
2441  * @return
2442  *   0 on success otherwise -errno and errno is set.
2443  */
2444 static int
2445 flow_dv_jump_tbl_resource_register
2446                         (struct rte_eth_dev *dev __rte_unused,
2447                          struct mlx5_flow_tbl_resource *tbl,
2448                          struct mlx5_flow *dev_flow,
2449                          struct rte_flow_error *error)
2450 {
2451         struct mlx5_flow_tbl_data_entry *tbl_data =
2452                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2453         int cnt;
2454
2455         assert(tbl);
2456         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2457         if (!cnt) {
2458                 tbl_data->jump.action =
2459                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2460                         (tbl->obj);
2461                 if (!tbl_data->jump.action)
2462                         return rte_flow_error_set(error, ENOMEM,
2463                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2464                                         NULL, "cannot create jump action");
2465                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2466                         (void *)&tbl_data->jump, cnt);
2467         } else {
2468                 assert(tbl_data->jump.action);
2469                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2470                         (void *)&tbl_data->jump, cnt);
2471         }
2472         rte_atomic32_inc(&tbl_data->jump.refcnt);
2473         dev_flow->dv.jump = &tbl_data->jump;
2474         return 0;
2475 }
2476
2477 /**
2478  * Find existing table port ID resource or create and register a new one.
2479  *
2480  * @param[in, out] dev
2481  *   Pointer to rte_eth_dev structure.
2482  * @param[in, out] resource
2483  *   Pointer to port ID action resource.
2484  * @parm[in, out] dev_flow
2485  *   Pointer to the dev_flow.
2486  * @param[out] error
2487  *   pointer to error structure.
2488  *
2489  * @return
2490  *   0 on success otherwise -errno and errno is set.
2491  */
2492 static int
2493 flow_dv_port_id_action_resource_register
2494                         (struct rte_eth_dev *dev,
2495                          struct mlx5_flow_dv_port_id_action_resource *resource,
2496                          struct mlx5_flow *dev_flow,
2497                          struct rte_flow_error *error)
2498 {
2499         struct mlx5_priv *priv = dev->data->dev_private;
2500         struct mlx5_ibv_shared *sh = priv->sh;
2501         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2502
2503         /* Lookup a matching resource from cache. */
2504         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2505                 if (resource->port_id == cache_resource->port_id) {
2506                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2507                                 "refcnt %d++",
2508                                 (void *)cache_resource,
2509                                 rte_atomic32_read(&cache_resource->refcnt));
2510                         rte_atomic32_inc(&cache_resource->refcnt);
2511                         dev_flow->dv.port_id_action = cache_resource;
2512                         return 0;
2513                 }
2514         }
2515         /* Register new port id action resource. */
2516         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2517         if (!cache_resource)
2518                 return rte_flow_error_set(error, ENOMEM,
2519                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2520                                           "cannot allocate resource memory");
2521         *cache_resource = *resource;
2522         /*
2523          * Depending on rdma_core version the glue routine calls
2524          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2525          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2526          */
2527         cache_resource->action =
2528                 mlx5_glue->dr_create_flow_action_dest_port
2529                         (priv->sh->fdb_domain, resource->port_id);
2530         if (!cache_resource->action) {
2531                 rte_free(cache_resource);
2532                 return rte_flow_error_set(error, ENOMEM,
2533                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2534                                           NULL, "cannot create action");
2535         }
2536         rte_atomic32_init(&cache_resource->refcnt);
2537         rte_atomic32_inc(&cache_resource->refcnt);
2538         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2539         dev_flow->dv.port_id_action = cache_resource;
2540         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2541                 (void *)cache_resource,
2542                 rte_atomic32_read(&cache_resource->refcnt));
2543         return 0;
2544 }
2545
2546 /**
2547  * Find existing push vlan resource or create and register a new one.
2548  *
2549  * @param [in, out] dev
2550  *   Pointer to rte_eth_dev structure.
2551  * @param[in, out] resource
2552  *   Pointer to port ID action resource.
2553  * @parm[in, out] dev_flow
2554  *   Pointer to the dev_flow.
2555  * @param[out] error
2556  *   pointer to error structure.
2557  *
2558  * @return
2559  *   0 on success otherwise -errno and errno is set.
2560  */
2561 static int
2562 flow_dv_push_vlan_action_resource_register
2563                        (struct rte_eth_dev *dev,
2564                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2565                         struct mlx5_flow *dev_flow,
2566                         struct rte_flow_error *error)
2567 {
2568         struct mlx5_priv *priv = dev->data->dev_private;
2569         struct mlx5_ibv_shared *sh = priv->sh;
2570         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2571         struct mlx5dv_dr_domain *domain;
2572
2573         /* Lookup a matching resource from cache. */
2574         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2575                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2576                     resource->ft_type == cache_resource->ft_type) {
2577                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2578                                 "refcnt %d++",
2579                                 (void *)cache_resource,
2580                                 rte_atomic32_read(&cache_resource->refcnt));
2581                         rte_atomic32_inc(&cache_resource->refcnt);
2582                         dev_flow->dv.push_vlan_res = cache_resource;
2583                         return 0;
2584                 }
2585         }
2586         /* Register new push_vlan action resource. */
2587         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2588         if (!cache_resource)
2589                 return rte_flow_error_set(error, ENOMEM,
2590                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2591                                           "cannot allocate resource memory");
2592         *cache_resource = *resource;
2593         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2594                 domain = sh->fdb_domain;
2595         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2596                 domain = sh->rx_domain;
2597         else
2598                 domain = sh->tx_domain;
2599         cache_resource->action =
2600                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2601                                                            resource->vlan_tag);
2602         if (!cache_resource->action) {
2603                 rte_free(cache_resource);
2604                 return rte_flow_error_set(error, ENOMEM,
2605                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2606                                           NULL, "cannot create action");
2607         }
2608         rte_atomic32_init(&cache_resource->refcnt);
2609         rte_atomic32_inc(&cache_resource->refcnt);
2610         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2611         dev_flow->dv.push_vlan_res = cache_resource;
2612         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2613                 (void *)cache_resource,
2614                 rte_atomic32_read(&cache_resource->refcnt));
2615         return 0;
2616 }
2617 /**
2618  * Get the size of specific rte_flow_item_type
2619  *
2620  * @param[in] item_type
2621  *   Tested rte_flow_item_type.
2622  *
2623  * @return
2624  *   sizeof struct item_type, 0 if void or irrelevant.
2625  */
2626 static size_t
2627 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2628 {
2629         size_t retval;
2630
2631         switch (item_type) {
2632         case RTE_FLOW_ITEM_TYPE_ETH:
2633                 retval = sizeof(struct rte_flow_item_eth);
2634                 break;
2635         case RTE_FLOW_ITEM_TYPE_VLAN:
2636                 retval = sizeof(struct rte_flow_item_vlan);
2637                 break;
2638         case RTE_FLOW_ITEM_TYPE_IPV4:
2639                 retval = sizeof(struct rte_flow_item_ipv4);
2640                 break;
2641         case RTE_FLOW_ITEM_TYPE_IPV6:
2642                 retval = sizeof(struct rte_flow_item_ipv6);
2643                 break;
2644         case RTE_FLOW_ITEM_TYPE_UDP:
2645                 retval = sizeof(struct rte_flow_item_udp);
2646                 break;
2647         case RTE_FLOW_ITEM_TYPE_TCP:
2648                 retval = sizeof(struct rte_flow_item_tcp);
2649                 break;
2650         case RTE_FLOW_ITEM_TYPE_VXLAN:
2651                 retval = sizeof(struct rte_flow_item_vxlan);
2652                 break;
2653         case RTE_FLOW_ITEM_TYPE_GRE:
2654                 retval = sizeof(struct rte_flow_item_gre);
2655                 break;
2656         case RTE_FLOW_ITEM_TYPE_NVGRE:
2657                 retval = sizeof(struct rte_flow_item_nvgre);
2658                 break;
2659         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2660                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2661                 break;
2662         case RTE_FLOW_ITEM_TYPE_MPLS:
2663                 retval = sizeof(struct rte_flow_item_mpls);
2664                 break;
2665         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2666         default:
2667                 retval = 0;
2668                 break;
2669         }
2670         return retval;
2671 }
2672
2673 #define MLX5_ENCAP_IPV4_VERSION         0x40
2674 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2675 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2676 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2677 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2678 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2679 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2680
2681 /**
2682  * Convert the encap action data from list of rte_flow_item to raw buffer
2683  *
2684  * @param[in] items
2685  *   Pointer to rte_flow_item objects list.
2686  * @param[out] buf
2687  *   Pointer to the output buffer.
2688  * @param[out] size
2689  *   Pointer to the output buffer size.
2690  * @param[out] error
2691  *   Pointer to the error structure.
2692  *
2693  * @return
2694  *   0 on success, a negative errno value otherwise and rte_errno is set.
2695  */
2696 static int
2697 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2698                            size_t *size, struct rte_flow_error *error)
2699 {
2700         struct rte_ether_hdr *eth = NULL;
2701         struct rte_vlan_hdr *vlan = NULL;
2702         struct rte_ipv4_hdr *ipv4 = NULL;
2703         struct rte_ipv6_hdr *ipv6 = NULL;
2704         struct rte_udp_hdr *udp = NULL;
2705         struct rte_vxlan_hdr *vxlan = NULL;
2706         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2707         struct rte_gre_hdr *gre = NULL;
2708         size_t len;
2709         size_t temp_size = 0;
2710
2711         if (!items)
2712                 return rte_flow_error_set(error, EINVAL,
2713                                           RTE_FLOW_ERROR_TYPE_ACTION,
2714                                           NULL, "invalid empty data");
2715         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2716                 len = flow_dv_get_item_len(items->type);
2717                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2718                         return rte_flow_error_set(error, EINVAL,
2719                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2720                                                   (void *)items->type,
2721                                                   "items total size is too big"
2722                                                   " for encap action");
2723                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2724                 switch (items->type) {
2725                 case RTE_FLOW_ITEM_TYPE_ETH:
2726                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2727                         break;
2728                 case RTE_FLOW_ITEM_TYPE_VLAN:
2729                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2730                         if (!eth)
2731                                 return rte_flow_error_set(error, EINVAL,
2732                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2733                                                 (void *)items->type,
2734                                                 "eth header not found");
2735                         if (!eth->ether_type)
2736                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2737                         break;
2738                 case RTE_FLOW_ITEM_TYPE_IPV4:
2739                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2740                         if (!vlan && !eth)
2741                                 return rte_flow_error_set(error, EINVAL,
2742                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2743                                                 (void *)items->type,
2744                                                 "neither eth nor vlan"
2745                                                 " header found");
2746                         if (vlan && !vlan->eth_proto)
2747                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2748                         else if (eth && !eth->ether_type)
2749                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2750                         if (!ipv4->version_ihl)
2751                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2752                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2753                         if (!ipv4->time_to_live)
2754                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2755                         break;
2756                 case RTE_FLOW_ITEM_TYPE_IPV6:
2757                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2758                         if (!vlan && !eth)
2759                                 return rte_flow_error_set(error, EINVAL,
2760                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2761                                                 (void *)items->type,
2762                                                 "neither eth nor vlan"
2763                                                 " header found");
2764                         if (vlan && !vlan->eth_proto)
2765                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2766                         else if (eth && !eth->ether_type)
2767                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2768                         if (!ipv6->vtc_flow)
2769                                 ipv6->vtc_flow =
2770                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2771                         if (!ipv6->hop_limits)
2772                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2773                         break;
2774                 case RTE_FLOW_ITEM_TYPE_UDP:
2775                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2776                         if (!ipv4 && !ipv6)
2777                                 return rte_flow_error_set(error, EINVAL,
2778                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2779                                                 (void *)items->type,
2780                                                 "ip header not found");
2781                         if (ipv4 && !ipv4->next_proto_id)
2782                                 ipv4->next_proto_id = IPPROTO_UDP;
2783                         else if (ipv6 && !ipv6->proto)
2784                                 ipv6->proto = IPPROTO_UDP;
2785                         break;
2786                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2787                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2788                         if (!udp)
2789                                 return rte_flow_error_set(error, EINVAL,
2790                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2791                                                 (void *)items->type,
2792                                                 "udp header not found");
2793                         if (!udp->dst_port)
2794                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2795                         if (!vxlan->vx_flags)
2796                                 vxlan->vx_flags =
2797                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2798                         break;
2799                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2800                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2801                         if (!udp)
2802                                 return rte_flow_error_set(error, EINVAL,
2803                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2804                                                 (void *)items->type,
2805                                                 "udp header not found");
2806                         if (!vxlan_gpe->proto)
2807                                 return rte_flow_error_set(error, EINVAL,
2808                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2809                                                 (void *)items->type,
2810                                                 "next protocol not found");
2811                         if (!udp->dst_port)
2812                                 udp->dst_port =
2813                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2814                         if (!vxlan_gpe->vx_flags)
2815                                 vxlan_gpe->vx_flags =
2816                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2817                         break;
2818                 case RTE_FLOW_ITEM_TYPE_GRE:
2819                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2820                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2821                         if (!gre->proto)
2822                                 return rte_flow_error_set(error, EINVAL,
2823                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2824                                                 (void *)items->type,
2825                                                 "next protocol not found");
2826                         if (!ipv4 && !ipv6)
2827                                 return rte_flow_error_set(error, EINVAL,
2828                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2829                                                 (void *)items->type,
2830                                                 "ip header not found");
2831                         if (ipv4 && !ipv4->next_proto_id)
2832                                 ipv4->next_proto_id = IPPROTO_GRE;
2833                         else if (ipv6 && !ipv6->proto)
2834                                 ipv6->proto = IPPROTO_GRE;
2835                         break;
2836                 case RTE_FLOW_ITEM_TYPE_VOID:
2837                         break;
2838                 default:
2839                         return rte_flow_error_set(error, EINVAL,
2840                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2841                                                   (void *)items->type,
2842                                                   "unsupported item type");
2843                         break;
2844                 }
2845                 temp_size += len;
2846         }
2847         *size = temp_size;
2848         return 0;
2849 }
2850
2851 static int
2852 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2853 {
2854         struct rte_ether_hdr *eth = NULL;
2855         struct rte_vlan_hdr *vlan = NULL;
2856         struct rte_ipv6_hdr *ipv6 = NULL;
2857         struct rte_udp_hdr *udp = NULL;
2858         char *next_hdr;
2859         uint16_t proto;
2860
2861         eth = (struct rte_ether_hdr *)data;
2862         next_hdr = (char *)(eth + 1);
2863         proto = RTE_BE16(eth->ether_type);
2864
2865         /* VLAN skipping */
2866         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2867                 vlan = (struct rte_vlan_hdr *)next_hdr;
2868                 proto = RTE_BE16(vlan->eth_proto);
2869                 next_hdr += sizeof(struct rte_vlan_hdr);
2870         }
2871
2872         /* HW calculates IPv4 csum. no need to proceed */
2873         if (proto == RTE_ETHER_TYPE_IPV4)
2874                 return 0;
2875
2876         /* non IPv4/IPv6 header. not supported */
2877         if (proto != RTE_ETHER_TYPE_IPV6) {
2878                 return rte_flow_error_set(error, ENOTSUP,
2879                                           RTE_FLOW_ERROR_TYPE_ACTION,
2880                                           NULL, "Cannot offload non IPv4/IPv6");
2881         }
2882
2883         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2884
2885         /* ignore non UDP */
2886         if (ipv6->proto != IPPROTO_UDP)
2887                 return 0;
2888
2889         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2890         udp->dgram_cksum = 0;
2891
2892         return 0;
2893 }
2894
2895 /**
2896  * Convert L2 encap action to DV specification.
2897  *
2898  * @param[in] dev
2899  *   Pointer to rte_eth_dev structure.
2900  * @param[in] action
2901  *   Pointer to action structure.
2902  * @param[in, out] dev_flow
2903  *   Pointer to the mlx5_flow.
2904  * @param[in] transfer
2905  *   Mark if the flow is E-Switch flow.
2906  * @param[out] error
2907  *   Pointer to the error structure.
2908  *
2909  * @return
2910  *   0 on success, a negative errno value otherwise and rte_errno is set.
2911  */
2912 static int
2913 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2914                                const struct rte_flow_action *action,
2915                                struct mlx5_flow *dev_flow,
2916                                uint8_t transfer,
2917                                struct rte_flow_error *error)
2918 {
2919         const struct rte_flow_item *encap_data;
2920         const struct rte_flow_action_raw_encap *raw_encap_data;
2921         struct mlx5_flow_dv_encap_decap_resource res = {
2922                 .reformat_type =
2923                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2924                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2925                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2926         };
2927
2928         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2929                 raw_encap_data =
2930                         (const struct rte_flow_action_raw_encap *)action->conf;
2931                 res.size = raw_encap_data->size;
2932                 memcpy(res.buf, raw_encap_data->data, res.size);
2933                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2934                         return -rte_errno;
2935         } else {
2936                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2937                         encap_data =
2938                                 ((const struct rte_flow_action_vxlan_encap *)
2939                                                 action->conf)->definition;
2940                 else
2941                         encap_data =
2942                                 ((const struct rte_flow_action_nvgre_encap *)
2943                                                 action->conf)->definition;
2944                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2945                                                &res.size, error))
2946                         return -rte_errno;
2947         }
2948         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2949                 return rte_flow_error_set(error, EINVAL,
2950                                           RTE_FLOW_ERROR_TYPE_ACTION,
2951                                           NULL, "can't create L2 encap action");
2952         return 0;
2953 }
2954
2955 /**
2956  * Convert L2 decap action to DV specification.
2957  *
2958  * @param[in] dev
2959  *   Pointer to rte_eth_dev structure.
2960  * @param[in, out] dev_flow
2961  *   Pointer to the mlx5_flow.
2962  * @param[in] transfer
2963  *   Mark if the flow is E-Switch flow.
2964  * @param[out] error
2965  *   Pointer to the error structure.
2966  *
2967  * @return
2968  *   0 on success, a negative errno value otherwise and rte_errno is set.
2969  */
2970 static int
2971 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2972                                struct mlx5_flow *dev_flow,
2973                                uint8_t transfer,
2974                                struct rte_flow_error *error)
2975 {
2976         struct mlx5_flow_dv_encap_decap_resource res = {
2977                 .size = 0,
2978                 .reformat_type =
2979                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2980                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2981                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2982         };
2983
2984         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2985                 return rte_flow_error_set(error, EINVAL,
2986                                           RTE_FLOW_ERROR_TYPE_ACTION,
2987                                           NULL, "can't create L2 decap action");
2988         return 0;
2989 }
2990
2991 /**
2992  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2993  *
2994  * @param[in] dev
2995  *   Pointer to rte_eth_dev structure.
2996  * @param[in] action
2997  *   Pointer to action structure.
2998  * @param[in, out] dev_flow
2999  *   Pointer to the mlx5_flow.
3000  * @param[in] attr
3001  *   Pointer to the flow attributes.
3002  * @param[out] error
3003  *   Pointer to the error structure.
3004  *
3005  * @return
3006  *   0 on success, a negative errno value otherwise and rte_errno is set.
3007  */
3008 static int
3009 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
3010                                 const struct rte_flow_action *action,
3011                                 struct mlx5_flow *dev_flow,
3012                                 const struct rte_flow_attr *attr,
3013                                 struct rte_flow_error *error)
3014 {
3015         const struct rte_flow_action_raw_encap *encap_data;
3016         struct mlx5_flow_dv_encap_decap_resource res;
3017
3018         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3019         res.size = encap_data->size;
3020         memcpy(res.buf, encap_data->data, res.size);
3021         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3022                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3023                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3024         if (attr->transfer)
3025                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3026         else
3027                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3028                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3029         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3030                 return rte_flow_error_set(error, EINVAL,
3031                                           RTE_FLOW_ERROR_TYPE_ACTION,
3032                                           NULL, "can't create encap action");
3033         return 0;
3034 }
3035
3036 /**
3037  * Create action push VLAN.
3038  *
3039  * @param[in] dev
3040  *   Pointer to rte_eth_dev structure.
3041  * @param[in] vlan_tag
3042  *   the vlan tag to push to the Ethernet header.
3043  * @param[in, out] dev_flow
3044  *   Pointer to the mlx5_flow.
3045  * @param[in] attr
3046  *   Pointer to the flow attributes.
3047  * @param[out] error
3048  *   Pointer to the error structure.
3049  *
3050  * @return
3051  *   0 on success, a negative errno value otherwise and rte_errno is set.
3052  */
3053 static int
3054 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3055                                 const struct rte_flow_attr *attr,
3056                                 const struct rte_vlan_hdr *vlan,
3057                                 struct mlx5_flow *dev_flow,
3058                                 struct rte_flow_error *error)
3059 {
3060         struct mlx5_flow_dv_push_vlan_action_resource res;
3061
3062         res.vlan_tag =
3063                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3064                                  vlan->vlan_tci);
3065         if (attr->transfer)
3066                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3067         else
3068                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3069                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3070         return flow_dv_push_vlan_action_resource_register
3071                                             (dev, &res, dev_flow, error);
3072 }
3073
3074 /**
3075  * Validate the modify-header actions.
3076  *
3077  * @param[in] action_flags
3078  *   Holds the actions detected until now.
3079  * @param[in] action
3080  *   Pointer to the modify action.
3081  * @param[out] error
3082  *   Pointer to error structure.
3083  *
3084  * @return
3085  *   0 on success, a negative errno value otherwise and rte_errno is set.
3086  */
3087 static int
3088 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3089                                    const struct rte_flow_action *action,
3090                                    struct rte_flow_error *error)
3091 {
3092         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3093                 return rte_flow_error_set(error, EINVAL,
3094                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3095                                           NULL, "action configuration not set");
3096         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
3097                 return rte_flow_error_set(error, EINVAL,
3098                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3099                                           "can't have encap action before"
3100                                           " modify action");
3101         return 0;
3102 }
3103
3104 /**
3105  * Validate the modify-header MAC address actions.
3106  *
3107  * @param[in] action_flags
3108  *   Holds the actions detected until now.
3109  * @param[in] action
3110  *   Pointer to the modify action.
3111  * @param[in] item_flags
3112  *   Holds the items detected.
3113  * @param[out] error
3114  *   Pointer to error structure.
3115  *
3116  * @return
3117  *   0 on success, a negative errno value otherwise and rte_errno is set.
3118  */
3119 static int
3120 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3121                                    const struct rte_flow_action *action,
3122                                    const uint64_t item_flags,
3123                                    struct rte_flow_error *error)
3124 {
3125         int ret = 0;
3126
3127         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3128         if (!ret) {
3129                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3130                         return rte_flow_error_set(error, EINVAL,
3131                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3132                                                   NULL,
3133                                                   "no L2 item in pattern");
3134         }
3135         return ret;
3136 }
3137
3138 /**
3139  * Validate the modify-header IPv4 address actions.
3140  *
3141  * @param[in] action_flags
3142  *   Holds the actions detected until now.
3143  * @param[in] action
3144  *   Pointer to the modify action.
3145  * @param[in] item_flags
3146  *   Holds the items detected.
3147  * @param[out] error
3148  *   Pointer to error structure.
3149  *
3150  * @return
3151  *   0 on success, a negative errno value otherwise and rte_errno is set.
3152  */
3153 static int
3154 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3155                                     const struct rte_flow_action *action,
3156                                     const uint64_t item_flags,
3157                                     struct rte_flow_error *error)
3158 {
3159         int ret = 0;
3160
3161         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3162         if (!ret) {
3163                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3164                         return rte_flow_error_set(error, EINVAL,
3165                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3166                                                   NULL,
3167                                                   "no ipv4 item in pattern");
3168         }
3169         return ret;
3170 }
3171
3172 /**
3173  * Validate the modify-header IPv6 address actions.
3174  *
3175  * @param[in] action_flags
3176  *   Holds the actions detected until now.
3177  * @param[in] action
3178  *   Pointer to the modify action.
3179  * @param[in] item_flags
3180  *   Holds the items detected.
3181  * @param[out] error
3182  *   Pointer to error structure.
3183  *
3184  * @return
3185  *   0 on success, a negative errno value otherwise and rte_errno is set.
3186  */
3187 static int
3188 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3189                                     const struct rte_flow_action *action,
3190                                     const uint64_t item_flags,
3191                                     struct rte_flow_error *error)
3192 {
3193         int ret = 0;
3194
3195         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3196         if (!ret) {
3197                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3198                         return rte_flow_error_set(error, EINVAL,
3199                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3200                                                   NULL,
3201                                                   "no ipv6 item in pattern");
3202         }
3203         return ret;
3204 }
3205
3206 /**
3207  * Validate the modify-header TP actions.
3208  *
3209  * @param[in] action_flags
3210  *   Holds the actions detected until now.
3211  * @param[in] action
3212  *   Pointer to the modify action.
3213  * @param[in] item_flags
3214  *   Holds the items detected.
3215  * @param[out] error
3216  *   Pointer to error structure.
3217  *
3218  * @return
3219  *   0 on success, a negative errno value otherwise and rte_errno is set.
3220  */
3221 static int
3222 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3223                                   const struct rte_flow_action *action,
3224                                   const uint64_t item_flags,
3225                                   struct rte_flow_error *error)
3226 {
3227         int ret = 0;
3228
3229         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3230         if (!ret) {
3231                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3232                         return rte_flow_error_set(error, EINVAL,
3233                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3234                                                   NULL, "no transport layer "
3235                                                   "in pattern");
3236         }
3237         return ret;
3238 }
3239
3240 /**
3241  * Validate the modify-header actions of increment/decrement
3242  * TCP Sequence-number.
3243  *
3244  * @param[in] action_flags
3245  *   Holds the actions detected until now.
3246  * @param[in] action
3247  *   Pointer to the modify action.
3248  * @param[in] item_flags
3249  *   Holds the items detected.
3250  * @param[out] error
3251  *   Pointer to error structure.
3252  *
3253  * @return
3254  *   0 on success, a negative errno value otherwise and rte_errno is set.
3255  */
3256 static int
3257 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3258                                        const struct rte_flow_action *action,
3259                                        const uint64_t item_flags,
3260                                        struct rte_flow_error *error)
3261 {
3262         int ret = 0;
3263
3264         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3265         if (!ret) {
3266                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3267                         return rte_flow_error_set(error, EINVAL,
3268                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3269                                                   NULL, "no TCP item in"
3270                                                   " pattern");
3271                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3272                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3273                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3274                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3275                         return rte_flow_error_set(error, EINVAL,
3276                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3277                                                   NULL,
3278                                                   "cannot decrease and increase"
3279                                                   " TCP sequence number"
3280                                                   " at the same time");
3281         }
3282         return ret;
3283 }
3284
3285 /**
3286  * Validate the modify-header actions of increment/decrement
3287  * TCP Acknowledgment number.
3288  *
3289  * @param[in] action_flags
3290  *   Holds the actions detected until now.
3291  * @param[in] action
3292  *   Pointer to the modify action.
3293  * @param[in] item_flags
3294  *   Holds the items detected.
3295  * @param[out] error
3296  *   Pointer to error structure.
3297  *
3298  * @return
3299  *   0 on success, a negative errno value otherwise and rte_errno is set.
3300  */
3301 static int
3302 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3303                                        const struct rte_flow_action *action,
3304                                        const uint64_t item_flags,
3305                                        struct rte_flow_error *error)
3306 {
3307         int ret = 0;
3308
3309         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3310         if (!ret) {
3311                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3312                         return rte_flow_error_set(error, EINVAL,
3313                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3314                                                   NULL, "no TCP item in"
3315                                                   " pattern");
3316                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3317                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3318                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3319                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3320                         return rte_flow_error_set(error, EINVAL,
3321                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3322                                                   NULL,
3323                                                   "cannot decrease and increase"
3324                                                   " TCP acknowledgment number"
3325                                                   " at the same time");
3326         }
3327         return ret;
3328 }
3329
3330 /**
3331  * Validate the modify-header TTL actions.
3332  *
3333  * @param[in] action_flags
3334  *   Holds the actions detected until now.
3335  * @param[in] action
3336  *   Pointer to the modify action.
3337  * @param[in] item_flags
3338  *   Holds the items detected.
3339  * @param[out] error
3340  *   Pointer to error structure.
3341  *
3342  * @return
3343  *   0 on success, a negative errno value otherwise and rte_errno is set.
3344  */
3345 static int
3346 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3347                                    const struct rte_flow_action *action,
3348                                    const uint64_t item_flags,
3349                                    struct rte_flow_error *error)
3350 {
3351         int ret = 0;
3352
3353         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3354         if (!ret) {
3355                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3356                         return rte_flow_error_set(error, EINVAL,
3357                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3358                                                   NULL,
3359                                                   "no IP protocol in pattern");
3360         }
3361         return ret;
3362 }
3363
3364 /**
3365  * Validate jump action.
3366  *
3367  * @param[in] action
3368  *   Pointer to the jump action.
3369  * @param[in] action_flags
3370  *   Holds the actions detected until now.
3371  * @param[in] attributes
3372  *   Pointer to flow attributes
3373  * @param[in] external
3374  *   Action belongs to flow rule created by request external to PMD.
3375  * @param[out] error
3376  *   Pointer to error structure.
3377  *
3378  * @return
3379  *   0 on success, a negative errno value otherwise and rte_errno is set.
3380  */
3381 static int
3382 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3383                              uint64_t action_flags,
3384                              const struct rte_flow_attr *attributes,
3385                              bool external, struct rte_flow_error *error)
3386 {
3387         uint32_t target_group, table;
3388         int ret = 0;
3389
3390         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3391                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3392                 return rte_flow_error_set(error, EINVAL,
3393                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3394                                           "can't have 2 fate actions in"
3395                                           " same flow");
3396         if (action_flags & MLX5_FLOW_ACTION_METER)
3397                 return rte_flow_error_set(error, ENOTSUP,
3398                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3399                                           "jump with meter not support");
3400         if (!action->conf)
3401                 return rte_flow_error_set(error, EINVAL,
3402                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3403                                           NULL, "action configuration not set");
3404         target_group =
3405                 ((const struct rte_flow_action_jump *)action->conf)->group;
3406         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3407                                        &table, error);
3408         if (ret)
3409                 return ret;
3410         if (attributes->group == target_group)
3411                 return rte_flow_error_set(error, EINVAL,
3412                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3413                                           "target group must be other than"
3414                                           " the current flow group");
3415         return 0;
3416 }
3417
3418 /*
3419  * Validate the port_id action.
3420  *
3421  * @param[in] dev
3422  *   Pointer to rte_eth_dev structure.
3423  * @param[in] action_flags
3424  *   Bit-fields that holds the actions detected until now.
3425  * @param[in] action
3426  *   Port_id RTE action structure.
3427  * @param[in] attr
3428  *   Attributes of flow that includes this action.
3429  * @param[out] error
3430  *   Pointer to error structure.
3431  *
3432  * @return
3433  *   0 on success, a negative errno value otherwise and rte_errno is set.
3434  */
3435 static int
3436 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3437                                 uint64_t action_flags,
3438                                 const struct rte_flow_action *action,
3439                                 const struct rte_flow_attr *attr,
3440                                 struct rte_flow_error *error)
3441 {
3442         const struct rte_flow_action_port_id *port_id;
3443         struct mlx5_priv *act_priv;
3444         struct mlx5_priv *dev_priv;
3445         uint16_t port;
3446
3447         if (!attr->transfer)
3448                 return rte_flow_error_set(error, ENOTSUP,
3449                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3450                                           NULL,
3451                                           "port id action is valid in transfer"
3452                                           " mode only");
3453         if (!action || !action->conf)
3454                 return rte_flow_error_set(error, ENOTSUP,
3455                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3456                                           NULL,
3457                                           "port id action parameters must be"
3458                                           " specified");
3459         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3460                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3461                 return rte_flow_error_set(error, EINVAL,
3462                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3463                                           "can have only one fate actions in"
3464                                           " a flow");
3465         dev_priv = mlx5_dev_to_eswitch_info(dev);
3466         if (!dev_priv)
3467                 return rte_flow_error_set(error, rte_errno,
3468                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3469                                           NULL,
3470                                           "failed to obtain E-Switch info");
3471         port_id = action->conf;
3472         port = port_id->original ? dev->data->port_id : port_id->id;
3473         act_priv = mlx5_port_to_eswitch_info(port, false);
3474         if (!act_priv)
3475                 return rte_flow_error_set
3476                                 (error, rte_errno,
3477                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3478                                  "failed to obtain E-Switch port id for port");
3479         if (act_priv->domain_id != dev_priv->domain_id)
3480                 return rte_flow_error_set
3481                                 (error, EINVAL,
3482                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3483                                  "port does not belong to"
3484                                  " E-Switch being configured");
3485         return 0;
3486 }
3487
3488 /**
3489  * Get the maximum number of modify header actions.
3490  *
3491  * @param dev
3492  *   Pointer to rte_eth_dev structure.
3493  * @param flags
3494  *   Flags bits to check if root level.
3495  *
3496  * @return
3497  *   Max number of modify header actions device can support.
3498  */
3499 static unsigned int
3500 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3501 {
3502         /*
3503          * There's no way to directly query the max cap. Although it has to be
3504          * acquried by iterative trial, it is a safe assumption that more
3505          * actions are supported by FW if extensive metadata register is
3506          * supported. (Only in the root table)
3507          */
3508         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3509                 return MLX5_MAX_MODIFY_NUM;
3510         else
3511                 return mlx5_flow_ext_mreg_supported(dev) ?
3512                                         MLX5_ROOT_TBL_MODIFY_NUM :
3513                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3514 }
3515
3516 /**
3517  * Validate the meter action.
3518  *
3519  * @param[in] dev
3520  *   Pointer to rte_eth_dev structure.
3521  * @param[in] action_flags
3522  *   Bit-fields that holds the actions detected until now.
3523  * @param[in] action
3524  *   Pointer to the meter action.
3525  * @param[in] attr
3526  *   Attributes of flow that includes this action.
3527  * @param[out] error
3528  *   Pointer to error structure.
3529  *
3530  * @return
3531  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3532  */
3533 static int
3534 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3535                                 uint64_t action_flags,
3536                                 const struct rte_flow_action *action,
3537                                 const struct rte_flow_attr *attr,
3538                                 struct rte_flow_error *error)
3539 {
3540         struct mlx5_priv *priv = dev->data->dev_private;
3541         const struct rte_flow_action_meter *am = action->conf;
3542         struct mlx5_flow_meter *fm;
3543
3544         if (!am)
3545                 return rte_flow_error_set(error, EINVAL,
3546                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3547                                           "meter action conf is NULL");
3548
3549         if (action_flags & MLX5_FLOW_ACTION_METER)
3550                 return rte_flow_error_set(error, ENOTSUP,
3551                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3552                                           "meter chaining not support");
3553         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3554                 return rte_flow_error_set(error, ENOTSUP,
3555                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3556                                           "meter with jump not support");
3557         if (!priv->mtr_en)
3558                 return rte_flow_error_set(error, ENOTSUP,
3559                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3560                                           NULL,
3561                                           "meter action not supported");
3562         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3563         if (!fm)
3564                 return rte_flow_error_set(error, EINVAL,
3565                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3566                                           "Meter not found");
3567         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3568               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3569               (!fm->attr.egress && !attr->egress && attr->ingress))))
3570                 return rte_flow_error_set(error, EINVAL,
3571                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3572                                           "Flow attributes are either invalid "
3573                                           "or have a conflict with current "
3574                                           "meter attributes");
3575         return 0;
3576 }
3577
3578 /**
3579  * Validate the modify-header IPv4 DSCP actions.
3580  *
3581  * @param[in] action_flags
3582  *   Holds the actions detected until now.
3583  * @param[in] action
3584  *   Pointer to the modify action.
3585  * @param[in] item_flags
3586  *   Holds the items detected.
3587  * @param[out] error
3588  *   Pointer to error structure.
3589  *
3590  * @return
3591  *   0 on success, a negative errno value otherwise and rte_errno is set.
3592  */
3593 static int
3594 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3595                                          const struct rte_flow_action *action,
3596                                          const uint64_t item_flags,
3597                                          struct rte_flow_error *error)
3598 {
3599         int ret = 0;
3600
3601         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3602         if (!ret) {
3603                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3604                         return rte_flow_error_set(error, EINVAL,
3605                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3606                                                   NULL,
3607                                                   "no ipv4 item in pattern");
3608         }
3609         return ret;
3610 }
3611
3612 /**
3613  * Validate the modify-header IPv6 DSCP actions.
3614  *
3615  * @param[in] action_flags
3616  *   Holds the actions detected until now.
3617  * @param[in] action
3618  *   Pointer to the modify action.
3619  * @param[in] item_flags
3620  *   Holds the items detected.
3621  * @param[out] error
3622  *   Pointer to error structure.
3623  *
3624  * @return
3625  *   0 on success, a negative errno value otherwise and rte_errno is set.
3626  */
3627 static int
3628 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3629                                          const struct rte_flow_action *action,
3630                                          const uint64_t item_flags,
3631                                          struct rte_flow_error *error)
3632 {
3633         int ret = 0;
3634
3635         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3636         if (!ret) {
3637                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3638                         return rte_flow_error_set(error, EINVAL,
3639                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3640                                                   NULL,
3641                                                   "no ipv6 item in pattern");
3642         }
3643         return ret;
3644 }
3645
3646 /**
3647  * Find existing modify-header resource or create and register a new one.
3648  *
3649  * @param dev[in, out]
3650  *   Pointer to rte_eth_dev structure.
3651  * @param[in, out] resource
3652  *   Pointer to modify-header resource.
3653  * @parm[in, out] dev_flow
3654  *   Pointer to the dev_flow.
3655  * @param[out] error
3656  *   pointer to error structure.
3657  *
3658  * @return
3659  *   0 on success otherwise -errno and errno is set.
3660  */
3661 static int
3662 flow_dv_modify_hdr_resource_register
3663                         (struct rte_eth_dev *dev,
3664                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3665                          struct mlx5_flow *dev_flow,
3666                          struct rte_flow_error *error)
3667 {
3668         struct mlx5_priv *priv = dev->data->dev_private;
3669         struct mlx5_ibv_shared *sh = priv->sh;
3670         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3671         struct mlx5dv_dr_domain *ns;
3672         uint32_t actions_len;
3673
3674         resource->flags =
3675                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3676         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3677                                     resource->flags))
3678                 return rte_flow_error_set(error, EOVERFLOW,
3679                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3680                                           "too many modify header items");
3681         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3682                 ns = sh->fdb_domain;
3683         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3684                 ns = sh->tx_domain;
3685         else
3686                 ns = sh->rx_domain;
3687         /* Lookup a matching resource from cache. */
3688         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3689         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3690                 if (resource->ft_type == cache_resource->ft_type &&
3691                     resource->actions_num == cache_resource->actions_num &&
3692                     resource->flags == cache_resource->flags &&
3693                     !memcmp((const void *)resource->actions,
3694                             (const void *)cache_resource->actions,
3695                             actions_len)) {
3696                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3697                                 (void *)cache_resource,
3698                                 rte_atomic32_read(&cache_resource->refcnt));
3699                         rte_atomic32_inc(&cache_resource->refcnt);
3700                         dev_flow->dv.modify_hdr = cache_resource;
3701                         return 0;
3702                 }
3703         }
3704         /* Register new modify-header resource. */
3705         cache_resource = rte_calloc(__func__, 1,
3706                                     sizeof(*cache_resource) + actions_len, 0);
3707         if (!cache_resource)
3708                 return rte_flow_error_set(error, ENOMEM,
3709                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3710                                           "cannot allocate resource memory");
3711         *cache_resource = *resource;
3712         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3713         cache_resource->verbs_action =
3714                 mlx5_glue->dv_create_flow_action_modify_header
3715                                         (sh->ctx, cache_resource->ft_type, ns,
3716                                          cache_resource->flags, actions_len,
3717                                          (uint64_t *)cache_resource->actions);
3718         if (!cache_resource->verbs_action) {
3719                 rte_free(cache_resource);
3720                 return rte_flow_error_set(error, ENOMEM,
3721                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3722                                           NULL, "cannot create action");
3723         }
3724         rte_atomic32_init(&cache_resource->refcnt);
3725         rte_atomic32_inc(&cache_resource->refcnt);
3726         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3727         dev_flow->dv.modify_hdr = cache_resource;
3728         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3729                 (void *)cache_resource,
3730                 rte_atomic32_read(&cache_resource->refcnt));
3731         return 0;
3732 }
3733
3734 #define MLX5_CNT_CONTAINER_RESIZE 64
3735
3736 /**
3737  * Get or create a flow counter.
3738  *
3739  * @param[in] dev
3740  *   Pointer to the Ethernet device structure.
3741  * @param[in] shared
3742  *   Indicate if this counter is shared with other flows.
3743  * @param[in] id
3744  *   Counter identifier.
3745  *
3746  * @return
3747  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3748  */
3749 static struct mlx5_flow_counter *
3750 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3751                                uint32_t id)
3752 {
3753         struct mlx5_priv *priv = dev->data->dev_private;
3754         struct mlx5_flow_counter *cnt = NULL;
3755         struct mlx5_devx_obj *dcs = NULL;
3756
3757         if (!priv->config.devx) {
3758                 rte_errno = ENOTSUP;
3759                 return NULL;
3760         }
3761         if (shared) {
3762                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3763                         if (cnt->shared && cnt->id == id) {
3764                                 cnt->ref_cnt++;
3765                                 return cnt;
3766                         }
3767                 }
3768         }
3769         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3770         if (!dcs)
3771                 return NULL;
3772         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3773         if (!cnt) {
3774                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3775                 rte_errno = ENOMEM;
3776                 return NULL;
3777         }
3778         struct mlx5_flow_counter tmpl = {
3779                 .shared = shared,
3780                 .ref_cnt = 1,
3781                 .id = id,
3782                 .dcs = dcs,
3783         };
3784         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3785         if (!tmpl.action) {
3786                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3787                 rte_errno = errno;
3788                 rte_free(cnt);
3789                 return NULL;
3790         }
3791         *cnt = tmpl;
3792         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3793         return cnt;
3794 }
3795
3796 /**
3797  * Release a flow counter.
3798  *
3799  * @param[in] dev
3800  *   Pointer to the Ethernet device structure.
3801  * @param[in] counter
3802  *   Pointer to the counter handler.
3803  */
3804 static void
3805 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3806                                  struct mlx5_flow_counter *counter)
3807 {
3808         struct mlx5_priv *priv = dev->data->dev_private;
3809
3810         if (!counter)
3811                 return;
3812         if (--counter->ref_cnt == 0) {
3813                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3814                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3815                 rte_free(counter);
3816         }
3817 }
3818
3819 /**
3820  * Query a devx flow counter.
3821  *
3822  * @param[in] dev
3823  *   Pointer to the Ethernet device structure.
3824  * @param[in] cnt
3825  *   Pointer to the flow counter.
3826  * @param[out] pkts
3827  *   The statistics value of packets.
3828  * @param[out] bytes
3829  *   The statistics value of bytes.
3830  *
3831  * @return
3832  *   0 on success, otherwise a negative errno value and rte_errno is set.
3833  */
3834 static inline int
3835 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3836                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3837                      uint64_t *bytes)
3838 {
3839         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3840                                                 0, NULL, NULL, 0);
3841 }
3842
3843 /**
3844  * Get a pool by a counter.
3845  *
3846  * @param[in] cnt
3847  *   Pointer to the counter.
3848  *
3849  * @return
3850  *   The counter pool.
3851  */
3852 static struct mlx5_flow_counter_pool *
3853 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3854 {
3855         if (!cnt->batch) {
3856                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3857                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3858         }
3859         return cnt->pool;
3860 }
3861
3862 /**
3863  * Get a pool by devx counter ID.
3864  *
3865  * @param[in] cont
3866  *   Pointer to the counter container.
3867  * @param[in] id
3868  *   The counter devx ID.
3869  *
3870  * @return
3871  *   The counter pool pointer if exists, NULL otherwise,
3872  */
3873 static struct mlx5_flow_counter_pool *
3874 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3875 {
3876         struct mlx5_flow_counter_pool *pool;
3877
3878         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3879                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3880                                 MLX5_COUNTERS_PER_POOL;
3881
3882                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3883                         return pool;
3884         };
3885         return NULL;
3886 }
3887
3888 /**
3889  * Allocate a new memory for the counter values wrapped by all the needed
3890  * management.
3891  *
3892  * @param[in] dev
3893  *   Pointer to the Ethernet device structure.
3894  * @param[in] raws_n
3895  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3896  *
3897  * @return
3898  *   The new memory management pointer on success, otherwise NULL and rte_errno
3899  *   is set.
3900  */
3901 static struct mlx5_counter_stats_mem_mng *
3902 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3903 {
3904         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3905                                         (dev->data->dev_private))->sh;
3906         struct mlx5_devx_mkey_attr mkey_attr;
3907         struct mlx5_counter_stats_mem_mng *mem_mng;
3908         volatile struct flow_counter_stats *raw_data;
3909         int size = (sizeof(struct flow_counter_stats) *
3910                         MLX5_COUNTERS_PER_POOL +
3911                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3912                         sizeof(struct mlx5_counter_stats_mem_mng);
3913         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3914         int i;
3915
3916         if (!mem) {
3917                 rte_errno = ENOMEM;
3918                 return NULL;
3919         }
3920         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3921         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3922         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3923                                                  IBV_ACCESS_LOCAL_WRITE);
3924         if (!mem_mng->umem) {
3925                 rte_errno = errno;
3926                 rte_free(mem);
3927                 return NULL;
3928         }
3929         mkey_attr.addr = (uintptr_t)mem;
3930         mkey_attr.size = size;
3931         mkey_attr.umem_id = mem_mng->umem->umem_id;
3932         mkey_attr.pd = sh->pdn;
3933         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3934         if (!mem_mng->dm) {
3935                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3936                 rte_errno = errno;
3937                 rte_free(mem);
3938                 return NULL;
3939         }
3940         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3941         raw_data = (volatile struct flow_counter_stats *)mem;
3942         for (i = 0; i < raws_n; ++i) {
3943                 mem_mng->raws[i].mem_mng = mem_mng;
3944                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3945         }
3946         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3947         return mem_mng;
3948 }
3949
3950 /**
3951  * Resize a counter container.
3952  *
3953  * @param[in] dev
3954  *   Pointer to the Ethernet device structure.
3955  * @param[in] batch
3956  *   Whether the pool is for counter that was allocated by batch command.
3957  *
3958  * @return
3959  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3960  */
3961 static struct mlx5_pools_container *
3962 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3963 {
3964         struct mlx5_priv *priv = dev->data->dev_private;
3965         struct mlx5_pools_container *cont =
3966                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3967         struct mlx5_pools_container *new_cont =
3968                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3969         struct mlx5_counter_stats_mem_mng *mem_mng;
3970         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3971         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3972         int i;
3973
3974         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3975                 /* The last resize still hasn't detected by the host thread. */
3976                 rte_errno = EAGAIN;
3977                 return NULL;
3978         }
3979         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3980         if (!new_cont->pools) {
3981                 rte_errno = ENOMEM;
3982                 return NULL;
3983         }
3984         if (cont->n)
3985                 memcpy(new_cont->pools, cont->pools, cont->n *
3986                        sizeof(struct mlx5_flow_counter_pool *));
3987         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3988                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3989         if (!mem_mng) {
3990                 rte_free(new_cont->pools);
3991                 return NULL;
3992         }
3993         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3994                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3995                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3996                                  i, next);
3997         new_cont->n = resize;
3998         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3999         TAILQ_INIT(&new_cont->pool_list);
4000         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
4001         new_cont->init_mem_mng = mem_mng;
4002         rte_cio_wmb();
4003          /* Flip the master container. */
4004         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
4005         return new_cont;
4006 }
4007
4008 /**
4009  * Query a devx flow counter.
4010  *
4011  * @param[in] dev
4012  *   Pointer to the Ethernet device structure.
4013  * @param[in] cnt
4014  *   Pointer to the flow counter.
4015  * @param[out] pkts
4016  *   The statistics value of packets.
4017  * @param[out] bytes
4018  *   The statistics value of bytes.
4019  *
4020  * @return
4021  *   0 on success, otherwise a negative errno value and rte_errno is set.
4022  */
4023 static inline int
4024 _flow_dv_query_count(struct rte_eth_dev *dev,
4025                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
4026                      uint64_t *bytes)
4027 {
4028         struct mlx5_priv *priv = dev->data->dev_private;
4029         struct mlx5_flow_counter_pool *pool =
4030                         flow_dv_counter_pool_get(cnt);
4031         int offset = cnt - &pool->counters_raw[0];
4032
4033         if (priv->counter_fallback)
4034                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4035
4036         rte_spinlock_lock(&pool->sl);
4037         /*
4038          * The single counters allocation may allocate smaller ID than the
4039          * current allocated in parallel to the host reading.
4040          * In this case the new counter values must be reported as 0.
4041          */
4042         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4043                 *pkts = 0;
4044                 *bytes = 0;
4045         } else {
4046                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4047                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4048         }
4049         rte_spinlock_unlock(&pool->sl);
4050         return 0;
4051 }
4052
4053 /**
4054  * Create and initialize a new counter pool.
4055  *
4056  * @param[in] dev
4057  *   Pointer to the Ethernet device structure.
4058  * @param[out] dcs
4059  *   The devX counter handle.
4060  * @param[in] batch
4061  *   Whether the pool is for counter that was allocated by batch command.
4062  *
4063  * @return
4064  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4065  */
4066 static struct mlx5_flow_counter_pool *
4067 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4068                     uint32_t batch)
4069 {
4070         struct mlx5_priv *priv = dev->data->dev_private;
4071         struct mlx5_flow_counter_pool *pool;
4072         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4073                                                                0);
4074         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4075         uint32_t size;
4076
4077         if (cont->n == n_valid) {
4078                 cont = flow_dv_container_resize(dev, batch);
4079                 if (!cont)
4080                         return NULL;
4081         }
4082         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4083                         sizeof(struct mlx5_flow_counter);
4084         pool = rte_calloc(__func__, 1, size, 0);
4085         if (!pool) {
4086                 rte_errno = ENOMEM;
4087                 return NULL;
4088         }
4089         pool->min_dcs = dcs;
4090         pool->raw = cont->init_mem_mng->raws + n_valid %
4091                                                      MLX5_CNT_CONTAINER_RESIZE;
4092         pool->raw_hw = NULL;
4093         rte_spinlock_init(&pool->sl);
4094         /*
4095          * The generation of the new allocated counters in this pool is 0, 2 in
4096          * the pool generation makes all the counters valid for allocation.
4097          */
4098         rte_atomic64_set(&pool->query_gen, 0x2);
4099         TAILQ_INIT(&pool->counters);
4100         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4101         cont->pools[n_valid] = pool;
4102         /* Pool initialization must be updated before host thread access. */
4103         rte_cio_wmb();
4104         rte_atomic16_add(&cont->n_valid, 1);
4105         return pool;
4106 }
4107
4108 /**
4109  * Prepare a new counter and/or a new counter pool.
4110  *
4111  * @param[in] dev
4112  *   Pointer to the Ethernet device structure.
4113  * @param[out] cnt_free
4114  *   Where to put the pointer of a new counter.
4115  * @param[in] batch
4116  *   Whether the pool is for counter that was allocated by batch command.
4117  *
4118  * @return
4119  *   The free counter pool pointer and @p cnt_free is set on success,
4120  *   NULL otherwise and rte_errno is set.
4121  */
4122 static struct mlx5_flow_counter_pool *
4123 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4124                              struct mlx5_flow_counter **cnt_free,
4125                              uint32_t batch)
4126 {
4127         struct mlx5_priv *priv = dev->data->dev_private;
4128         struct mlx5_flow_counter_pool *pool;
4129         struct mlx5_devx_obj *dcs = NULL;
4130         struct mlx5_flow_counter *cnt;
4131         uint32_t i;
4132
4133         if (!batch) {
4134                 /* bulk_bitmap must be 0 for single counter allocation. */
4135                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4136                 if (!dcs)
4137                         return NULL;
4138                 pool = flow_dv_find_pool_by_id
4139                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4140                 if (!pool) {
4141                         pool = flow_dv_pool_create(dev, dcs, batch);
4142                         if (!pool) {
4143                                 mlx5_devx_cmd_destroy(dcs);
4144                                 return NULL;
4145                         }
4146                 } else if (dcs->id < pool->min_dcs->id) {
4147                         rte_atomic64_set(&pool->a64_dcs,
4148                                          (int64_t)(uintptr_t)dcs);
4149                 }
4150                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4151                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4152                 cnt->dcs = dcs;
4153                 *cnt_free = cnt;
4154                 return pool;
4155         }
4156         /* bulk_bitmap is in 128 counters units. */
4157         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4158                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4159         if (!dcs) {
4160                 rte_errno = ENODATA;
4161                 return NULL;
4162         }
4163         pool = flow_dv_pool_create(dev, dcs, batch);
4164         if (!pool) {
4165                 mlx5_devx_cmd_destroy(dcs);
4166                 return NULL;
4167         }
4168         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4169                 cnt = &pool->counters_raw[i];
4170                 cnt->pool = pool;
4171                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4172         }
4173         *cnt_free = &pool->counters_raw[0];
4174         return pool;
4175 }
4176
4177 /**
4178  * Search for existed shared counter.
4179  *
4180  * @param[in] cont
4181  *   Pointer to the relevant counter pool container.
4182  * @param[in] id
4183  *   The shared counter ID to search.
4184  *
4185  * @return
4186  *   NULL if not existed, otherwise pointer to the shared counter.
4187  */
4188 static struct mlx5_flow_counter *
4189 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4190                               uint32_t id)
4191 {
4192         static struct mlx5_flow_counter *cnt;
4193         struct mlx5_flow_counter_pool *pool;
4194         int i;
4195
4196         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4197                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4198                         cnt = &pool->counters_raw[i];
4199                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4200                                 return cnt;
4201                 }
4202         }
4203         return NULL;
4204 }
4205
4206 /**
4207  * Allocate a flow counter.
4208  *
4209  * @param[in] dev
4210  *   Pointer to the Ethernet device structure.
4211  * @param[in] shared
4212  *   Indicate if this counter is shared with other flows.
4213  * @param[in] id
4214  *   Counter identifier.
4215  * @param[in] group
4216  *   Counter flow group.
4217  *
4218  * @return
4219  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4220  */
4221 static struct mlx5_flow_counter *
4222 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4223                       uint16_t group)
4224 {
4225         struct mlx5_priv *priv = dev->data->dev_private;
4226         struct mlx5_flow_counter_pool *pool = NULL;
4227         struct mlx5_flow_counter *cnt_free = NULL;
4228         /*
4229          * Currently group 0 flow counter cannot be assigned to a flow if it is
4230          * not the first one in the batch counter allocation, so it is better
4231          * to allocate counters one by one for these flows in a separate
4232          * container.
4233          * A counter can be shared between different groups so need to take
4234          * shared counters from the single container.
4235          */
4236         uint32_t batch = (group && !shared) ? 1 : 0;
4237         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4238                                                                0);
4239
4240         if (priv->counter_fallback)
4241                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4242         if (!priv->config.devx) {
4243                 rte_errno = ENOTSUP;
4244                 return NULL;
4245         }
4246         if (shared) {
4247                 cnt_free = flow_dv_counter_shared_search(cont, id);
4248                 if (cnt_free) {
4249                         if (cnt_free->ref_cnt + 1 == 0) {
4250                                 rte_errno = E2BIG;
4251                                 return NULL;
4252                         }
4253                         cnt_free->ref_cnt++;
4254                         return cnt_free;
4255                 }
4256         }
4257         /* Pools which has a free counters are in the start. */
4258         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4259                 /*
4260                  * The free counter reset values must be updated between the
4261                  * counter release to the counter allocation, so, at least one
4262                  * query must be done in this time. ensure it by saving the
4263                  * query generation in the release time.
4264                  * The free list is sorted according to the generation - so if
4265                  * the first one is not updated, all the others are not
4266                  * updated too.
4267                  */
4268                 cnt_free = TAILQ_FIRST(&pool->counters);
4269                 if (cnt_free && cnt_free->query_gen + 1 <
4270                     rte_atomic64_read(&pool->query_gen))
4271                         break;
4272                 cnt_free = NULL;
4273         }
4274         if (!cnt_free) {
4275                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4276                 if (!pool)
4277                         return NULL;
4278         }
4279         cnt_free->batch = batch;
4280         /* Create a DV counter action only in the first time usage. */
4281         if (!cnt_free->action) {
4282                 uint16_t offset;
4283                 struct mlx5_devx_obj *dcs;
4284
4285                 if (batch) {
4286                         offset = cnt_free - &pool->counters_raw[0];
4287                         dcs = pool->min_dcs;
4288                 } else {
4289                         offset = 0;
4290                         dcs = cnt_free->dcs;
4291                 }
4292                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4293                                         (dcs->obj, offset);
4294                 if (!cnt_free->action) {
4295                         rte_errno = errno;
4296                         return NULL;
4297                 }
4298         }
4299         /* Update the counter reset values. */
4300         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4301                                  &cnt_free->bytes))
4302                 return NULL;
4303         cnt_free->shared = shared;
4304         cnt_free->ref_cnt = 1;
4305         cnt_free->id = id;
4306         if (!priv->sh->cmng.query_thread_on)
4307                 /* Start the asynchronous batch query by the host thread. */
4308                 mlx5_set_query_alarm(priv->sh);
4309         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4310         if (TAILQ_EMPTY(&pool->counters)) {
4311                 /* Move the pool to the end of the container pool list. */
4312                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4313                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4314         }
4315         return cnt_free;
4316 }
4317
4318 /**
4319  * Release a flow counter.
4320  *
4321  * @param[in] dev
4322  *   Pointer to the Ethernet device structure.
4323  * @param[in] counter
4324  *   Pointer to the counter handler.
4325  */
4326 static void
4327 flow_dv_counter_release(struct rte_eth_dev *dev,
4328                         struct mlx5_flow_counter *counter)
4329 {
4330         struct mlx5_priv *priv = dev->data->dev_private;
4331
4332         if (!counter)
4333                 return;
4334         if (priv->counter_fallback) {
4335                 flow_dv_counter_release_fallback(dev, counter);
4336                 return;
4337         }
4338         if (--counter->ref_cnt == 0) {
4339                 struct mlx5_flow_counter_pool *pool =
4340                                 flow_dv_counter_pool_get(counter);
4341
4342                 /* Put the counter in the end - the last updated one. */
4343                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4344                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4345         }
4346 }
4347
4348 /**
4349  * Verify the @p attributes will be correctly understood by the NIC and store
4350  * them in the @p flow if everything is correct.
4351  *
4352  * @param[in] dev
4353  *   Pointer to dev struct.
4354  * @param[in] attributes
4355  *   Pointer to flow attributes
4356  * @param[in] external
4357  *   This flow rule is created by request external to PMD.
4358  * @param[out] error
4359  *   Pointer to error structure.
4360  *
4361  * @return
4362  *   0 on success, a negative errno value otherwise and rte_errno is set.
4363  */
4364 static int
4365 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4366                             const struct rte_flow_attr *attributes,
4367                             bool external __rte_unused,
4368                             struct rte_flow_error *error)
4369 {
4370         struct mlx5_priv *priv = dev->data->dev_private;
4371         uint32_t priority_max = priv->config.flow_prio - 1;
4372
4373 #ifndef HAVE_MLX5DV_DR
4374         if (attributes->group)
4375                 return rte_flow_error_set(error, ENOTSUP,
4376                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4377                                           NULL,
4378                                           "groups are not supported");
4379 #else
4380         uint32_t table;
4381         int ret;
4382
4383         ret = mlx5_flow_group_to_table(attributes, external,
4384                                        attributes->group,
4385                                        &table, error);
4386         if (ret)
4387                 return ret;
4388 #endif
4389         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4390             attributes->priority >= priority_max)
4391                 return rte_flow_error_set(error, ENOTSUP,
4392                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4393                                           NULL,
4394                                           "priority out of range");
4395         if (attributes->transfer) {
4396                 if (!priv->config.dv_esw_en)
4397                         return rte_flow_error_set
4398                                 (error, ENOTSUP,
4399                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4400                                  "E-Switch dr is not supported");
4401                 if (!(priv->representor || priv->master))
4402                         return rte_flow_error_set
4403                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4404                                  NULL, "E-Switch configuration can only be"
4405                                  " done by a master or a representor device");
4406                 if (attributes->egress)
4407                         return rte_flow_error_set
4408                                 (error, ENOTSUP,
4409                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4410                                  "egress is not supported");
4411         }
4412         if (!(attributes->egress ^ attributes->ingress))
4413                 return rte_flow_error_set(error, ENOTSUP,
4414                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4415                                           "must specify exactly one of "
4416                                           "ingress or egress");
4417         return 0;
4418 }
4419
4420 /**
4421  * Internal validation function. For validating both actions and items.
4422  *
4423  * @param[in] dev
4424  *   Pointer to the rte_eth_dev structure.
4425  * @param[in] attr
4426  *   Pointer to the flow attributes.
4427  * @param[in] items
4428  *   Pointer to the list of items.
4429  * @param[in] actions
4430  *   Pointer to the list of actions.
4431  * @param[in] external
4432  *   This flow rule is created by request external to PMD.
4433  * @param[out] error
4434  *   Pointer to the error structure.
4435  *
4436  * @return
4437  *   0 on success, a negative errno value otherwise and rte_errno is set.
4438  */
4439 static int
4440 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4441                  const struct rte_flow_item items[],
4442                  const struct rte_flow_action actions[],
4443                  bool external, struct rte_flow_error *error)
4444 {
4445         int ret;
4446         uint64_t action_flags = 0;
4447         uint64_t item_flags = 0;
4448         uint64_t last_item = 0;
4449         uint8_t next_protocol = 0xff;
4450         uint16_t ether_type = 0;
4451         int actions_n = 0;
4452         const struct rte_flow_item *gre_item = NULL;
4453         struct rte_flow_item_tcp nic_tcp_mask = {
4454                 .hdr = {
4455                         .tcp_flags = 0xFF,
4456                         .src_port = RTE_BE16(UINT16_MAX),
4457                         .dst_port = RTE_BE16(UINT16_MAX),
4458                 }
4459         };
4460         struct mlx5_priv *priv = dev->data->dev_private;
4461         struct mlx5_dev_config *dev_conf = &priv->config;
4462
4463         if (items == NULL)
4464                 return -1;
4465         ret = flow_dv_validate_attributes(dev, attr, external, error);
4466         if (ret < 0)
4467                 return ret;
4468         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4469                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4470                 int type = items->type;
4471
4472                 switch (type) {
4473                 case RTE_FLOW_ITEM_TYPE_VOID:
4474                         break;
4475                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4476                         ret = flow_dv_validate_item_port_id
4477                                         (dev, items, attr, item_flags, error);
4478                         if (ret < 0)
4479                                 return ret;
4480                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4481                         break;
4482                 case RTE_FLOW_ITEM_TYPE_ETH:
4483                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4484                                                           error);
4485                         if (ret < 0)
4486                                 return ret;
4487                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4488                                              MLX5_FLOW_LAYER_OUTER_L2;
4489                         if (items->mask != NULL && items->spec != NULL) {
4490                                 ether_type =
4491                                         ((const struct rte_flow_item_eth *)
4492                                          items->spec)->type;
4493                                 ether_type &=
4494                                         ((const struct rte_flow_item_eth *)
4495                                          items->mask)->type;
4496                                 ether_type = rte_be_to_cpu_16(ether_type);
4497                         } else {
4498                                 ether_type = 0;
4499                         }
4500                         break;
4501                 case RTE_FLOW_ITEM_TYPE_VLAN:
4502                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4503                                                            dev, error);
4504                         if (ret < 0)
4505                                 return ret;
4506                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4507                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4508                         if (items->mask != NULL && items->spec != NULL) {
4509                                 ether_type =
4510                                         ((const struct rte_flow_item_vlan *)
4511                                          items->spec)->inner_type;
4512                                 ether_type &=
4513                                         ((const struct rte_flow_item_vlan *)
4514                                          items->mask)->inner_type;
4515                                 ether_type = rte_be_to_cpu_16(ether_type);
4516                         } else {
4517                                 ether_type = 0;
4518                         }
4519                         break;
4520                 case RTE_FLOW_ITEM_TYPE_IPV4:
4521                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4522                                                   &item_flags, &tunnel);
4523                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4524                                                            last_item,
4525                                                            ether_type, NULL,
4526                                                            error);
4527                         if (ret < 0)
4528                                 return ret;
4529                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4530                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4531                         if (items->mask != NULL &&
4532                             ((const struct rte_flow_item_ipv4 *)
4533                              items->mask)->hdr.next_proto_id) {
4534                                 next_protocol =
4535                                         ((const struct rte_flow_item_ipv4 *)
4536                                          (items->spec))->hdr.next_proto_id;
4537                                 next_protocol &=
4538                                         ((const struct rte_flow_item_ipv4 *)
4539                                          (items->mask))->hdr.next_proto_id;
4540                         } else {
4541                                 /* Reset for inner layer. */
4542                                 next_protocol = 0xff;
4543                         }
4544                         break;
4545                 case RTE_FLOW_ITEM_TYPE_IPV6:
4546                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4547                                                   &item_flags, &tunnel);
4548                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4549                                                            last_item,
4550                                                            ether_type, NULL,
4551                                                            error);
4552                         if (ret < 0)
4553                                 return ret;
4554                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4555                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4556                         if (items->mask != NULL &&
4557                             ((const struct rte_flow_item_ipv6 *)
4558                              items->mask)->hdr.proto) {
4559                                 next_protocol =
4560                                         ((const struct rte_flow_item_ipv6 *)
4561                                          items->spec)->hdr.proto;
4562                                 next_protocol &=
4563                                         ((const struct rte_flow_item_ipv6 *)
4564                                          items->mask)->hdr.proto;
4565                         } else {
4566                                 /* Reset for inner layer. */
4567                                 next_protocol = 0xff;
4568                         }
4569                         break;
4570                 case RTE_FLOW_ITEM_TYPE_TCP:
4571                         ret = mlx5_flow_validate_item_tcp
4572                                                 (items, item_flags,
4573                                                  next_protocol,
4574                                                  &nic_tcp_mask,
4575                                                  error);
4576                         if (ret < 0)
4577                                 return ret;
4578                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4579                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4580                         break;
4581                 case RTE_FLOW_ITEM_TYPE_UDP:
4582                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4583                                                           next_protocol,
4584                                                           error);
4585                         if (ret < 0)
4586                                 return ret;
4587                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4588                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4589                         break;
4590                 case RTE_FLOW_ITEM_TYPE_GRE:
4591                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4592                                                           next_protocol, error);
4593                         if (ret < 0)
4594                                 return ret;
4595                         gre_item = items;
4596                         last_item = MLX5_FLOW_LAYER_GRE;
4597                         break;
4598                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4599                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4600                                                             next_protocol,
4601                                                             error);
4602                         if (ret < 0)
4603                                 return ret;
4604                         last_item = MLX5_FLOW_LAYER_NVGRE;
4605                         break;
4606                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4607                         ret = mlx5_flow_validate_item_gre_key
4608                                 (items, item_flags, gre_item, error);
4609                         if (ret < 0)
4610                                 return ret;
4611                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4612                         break;
4613                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4614                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4615                                                             error);
4616                         if (ret < 0)
4617                                 return ret;
4618                         last_item = MLX5_FLOW_LAYER_VXLAN;
4619                         break;
4620                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4621                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4622                                                                 item_flags, dev,
4623                                                                 error);
4624                         if (ret < 0)
4625                                 return ret;
4626                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4627                         break;
4628                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4629                         ret = mlx5_flow_validate_item_geneve(items,
4630                                                              item_flags, dev,
4631                                                              error);
4632                         if (ret < 0)
4633                                 return ret;
4634                         last_item = MLX5_FLOW_LAYER_GENEVE;
4635                         break;
4636                 case RTE_FLOW_ITEM_TYPE_MPLS:
4637                         ret = mlx5_flow_validate_item_mpls(dev, items,
4638                                                            item_flags,
4639                                                            last_item, error);
4640                         if (ret < 0)
4641                                 return ret;
4642                         last_item = MLX5_FLOW_LAYER_MPLS;
4643                         break;
4644
4645                 case RTE_FLOW_ITEM_TYPE_MARK:
4646                         ret = flow_dv_validate_item_mark(dev, items, attr,
4647                                                          error);
4648                         if (ret < 0)
4649                                 return ret;
4650                         last_item = MLX5_FLOW_ITEM_MARK;
4651                         break;
4652                 case RTE_FLOW_ITEM_TYPE_META:
4653                         ret = flow_dv_validate_item_meta(dev, items, attr,
4654                                                          error);
4655                         if (ret < 0)
4656                                 return ret;
4657                         last_item = MLX5_FLOW_ITEM_METADATA;
4658                         break;
4659                 case RTE_FLOW_ITEM_TYPE_ICMP:
4660                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4661                                                            next_protocol,
4662                                                            error);
4663                         if (ret < 0)
4664                                 return ret;
4665                         last_item = MLX5_FLOW_LAYER_ICMP;
4666                         break;
4667                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4668                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4669                                                             next_protocol,
4670                                                             error);
4671                         if (ret < 0)
4672                                 return ret;
4673                         last_item = MLX5_FLOW_LAYER_ICMP6;
4674                         break;
4675                 case RTE_FLOW_ITEM_TYPE_TAG:
4676                         ret = flow_dv_validate_item_tag(dev, items,
4677                                                         attr, error);
4678                         if (ret < 0)
4679                                 return ret;
4680                         last_item = MLX5_FLOW_ITEM_TAG;
4681                         break;
4682                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4683                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4684                         break;
4685                 case RTE_FLOW_ITEM_TYPE_GTP:
4686                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4687                                                         error);
4688                         if (ret < 0)
4689                                 return ret;
4690                         last_item = MLX5_FLOW_LAYER_GTP;
4691                         break;
4692                 default:
4693                         return rte_flow_error_set(error, ENOTSUP,
4694                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4695                                                   NULL, "item not supported");
4696                 }
4697                 item_flags |= last_item;
4698         }
4699         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4700                 int type = actions->type;
4701                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4702                         return rte_flow_error_set(error, ENOTSUP,
4703                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4704                                                   actions, "too many actions");
4705                 switch (type) {
4706                 case RTE_FLOW_ACTION_TYPE_VOID:
4707                         break;
4708                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4709                         ret = flow_dv_validate_action_port_id(dev,
4710                                                               action_flags,
4711                                                               actions,
4712                                                               attr,
4713                                                               error);
4714                         if (ret)
4715                                 return ret;
4716                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4717                         ++actions_n;
4718                         break;
4719                 case RTE_FLOW_ACTION_TYPE_FLAG:
4720                         ret = flow_dv_validate_action_flag(dev, action_flags,
4721                                                            attr, error);
4722                         if (ret < 0)
4723                                 return ret;
4724                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4725                                 /* Count all modify-header actions as one. */
4726                                 if (!(action_flags &
4727                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4728                                         ++actions_n;
4729                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4730                                                 MLX5_FLOW_ACTION_MARK_EXT;
4731                         } else {
4732                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4733                                 ++actions_n;
4734                         }
4735                         break;
4736                 case RTE_FLOW_ACTION_TYPE_MARK:
4737                         ret = flow_dv_validate_action_mark(dev, actions,
4738                                                            action_flags,
4739                                                            attr, error);
4740                         if (ret < 0)
4741                                 return ret;
4742                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4743                                 /* Count all modify-header actions as one. */
4744                                 if (!(action_flags &
4745                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4746                                         ++actions_n;
4747                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4748                                                 MLX5_FLOW_ACTION_MARK_EXT;
4749                         } else {
4750                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4751                                 ++actions_n;
4752                         }
4753                         break;
4754                 case RTE_FLOW_ACTION_TYPE_SET_META:
4755                         ret = flow_dv_validate_action_set_meta(dev, actions,
4756                                                                action_flags,
4757                                                                attr, error);
4758                         if (ret < 0)
4759                                 return ret;
4760                         /* Count all modify-header actions as one action. */
4761                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4762                                 ++actions_n;
4763                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4764                         break;
4765                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4766                         ret = flow_dv_validate_action_set_tag(dev, actions,
4767                                                               action_flags,
4768                                                               attr, error);
4769                         if (ret < 0)
4770                                 return ret;
4771                         /* Count all modify-header actions as one action. */
4772                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4773                                 ++actions_n;
4774                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4775                         break;
4776                 case RTE_FLOW_ACTION_TYPE_DROP:
4777                         ret = mlx5_flow_validate_action_drop(action_flags,
4778                                                              attr, error);
4779                         if (ret < 0)
4780                                 return ret;
4781                         action_flags |= MLX5_FLOW_ACTION_DROP;
4782                         ++actions_n;
4783                         break;
4784                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4785                         ret = mlx5_flow_validate_action_queue(actions,
4786                                                               action_flags, dev,
4787                                                               attr, error);
4788                         if (ret < 0)
4789                                 return ret;
4790                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4791                         ++actions_n;
4792                         break;
4793                 case RTE_FLOW_ACTION_TYPE_RSS:
4794                         ret = mlx5_flow_validate_action_rss(actions,
4795                                                             action_flags, dev,
4796                                                             attr, item_flags,
4797                                                             error);
4798                         if (ret < 0)
4799                                 return ret;
4800                         action_flags |= MLX5_FLOW_ACTION_RSS;
4801                         ++actions_n;
4802                         break;
4803                 case RTE_FLOW_ACTION_TYPE_COUNT:
4804                         ret = flow_dv_validate_action_count(dev, error);
4805                         if (ret < 0)
4806                                 return ret;
4807                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4808                         ++actions_n;
4809                         break;
4810                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4811                         if (flow_dv_validate_action_pop_vlan(dev,
4812                                                              action_flags,
4813                                                              actions,
4814                                                              item_flags, attr,
4815                                                              error))
4816                                 return -rte_errno;
4817                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4818                         ++actions_n;
4819                         break;
4820                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4821                         ret = flow_dv_validate_action_push_vlan(action_flags,
4822                                                                 item_flags,
4823                                                                 actions, attr,
4824                                                                 error);
4825                         if (ret < 0)
4826                                 return ret;
4827                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4828                         ++actions_n;
4829                         break;
4830                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4831                         ret = flow_dv_validate_action_set_vlan_pcp
4832                                                 (action_flags, actions, error);
4833                         if (ret < 0)
4834                                 return ret;
4835                         /* Count PCP with push_vlan command. */
4836                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4837                         break;
4838                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4839                         ret = flow_dv_validate_action_set_vlan_vid
4840                                                 (item_flags, action_flags,
4841                                                  actions, error);
4842                         if (ret < 0)
4843                                 return ret;
4844                         /* Count VID with push_vlan command. */
4845                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4846                         break;
4847                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4848                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4849                         ret = flow_dv_validate_action_l2_encap(action_flags,
4850                                                                actions, attr,
4851                                                                error);
4852                         if (ret < 0)
4853                                 return ret;
4854                         action_flags |= actions->type ==
4855                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4856                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4857                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4858                         ++actions_n;
4859                         break;
4860                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4861                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4862                         ret = flow_dv_validate_action_l2_decap(action_flags,
4863                                                                attr, error);
4864                         if (ret < 0)
4865                                 return ret;
4866                         action_flags |= actions->type ==
4867                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4868                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4869                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4870                         ++actions_n;
4871                         break;
4872                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4873                         ret = flow_dv_validate_action_raw_encap(action_flags,
4874                                                                 actions, attr,
4875                                                                 error);
4876                         if (ret < 0)
4877                                 return ret;
4878                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4879                         ++actions_n;
4880                         break;
4881                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4882                         ret = flow_dv_validate_action_raw_decap(action_flags,
4883                                                                 actions, attr,
4884                                                                 error);
4885                         if (ret < 0)
4886                                 return ret;
4887                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4888                         ++actions_n;
4889                         break;
4890                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4891                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4892                         ret = flow_dv_validate_action_modify_mac(action_flags,
4893                                                                  actions,
4894                                                                  item_flags,
4895                                                                  error);
4896                         if (ret < 0)
4897                                 return ret;
4898                         /* Count all modify-header actions as one action. */
4899                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4900                                 ++actions_n;
4901                         action_flags |= actions->type ==
4902                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4903                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4904                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4905                         break;
4906
4907                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4908                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4909                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4910                                                                   actions,
4911                                                                   item_flags,
4912                                                                   error);
4913                         if (ret < 0)
4914                                 return ret;
4915                         /* Count all modify-header actions as one action. */
4916                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4917                                 ++actions_n;
4918                         action_flags |= actions->type ==
4919                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4920                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4921                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4922                         break;
4923                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4924                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4925                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4926                                                                   actions,
4927                                                                   item_flags,
4928                                                                   error);
4929                         if (ret < 0)
4930                                 return ret;
4931                         /* Count all modify-header actions as one action. */
4932                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4933                                 ++actions_n;
4934                         action_flags |= actions->type ==
4935                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4936                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4937                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4938                         break;
4939                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4940                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4941                         ret = flow_dv_validate_action_modify_tp(action_flags,
4942                                                                 actions,
4943                                                                 item_flags,
4944                                                                 error);
4945                         if (ret < 0)
4946                                 return ret;
4947                         /* Count all modify-header actions as one action. */
4948                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4949                                 ++actions_n;
4950                         action_flags |= actions->type ==
4951                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4952                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4953                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4954                         break;
4955                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4956                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4957                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4958                                                                  actions,
4959                                                                  item_flags,
4960                                                                  error);
4961                         if (ret < 0)
4962                                 return ret;
4963                         /* Count all modify-header actions as one action. */
4964                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4965                                 ++actions_n;
4966                         action_flags |= actions->type ==
4967                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4968                                                 MLX5_FLOW_ACTION_SET_TTL :
4969                                                 MLX5_FLOW_ACTION_DEC_TTL;
4970                         break;
4971                 case RTE_FLOW_ACTION_TYPE_JUMP:
4972                         ret = flow_dv_validate_action_jump(actions,
4973                                                            action_flags,
4974                                                            attr, external,
4975                                                            error);
4976                         if (ret)
4977                                 return ret;
4978                         ++actions_n;
4979                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4980                         break;
4981                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4982                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4983                         ret = flow_dv_validate_action_modify_tcp_seq
4984                                                                 (action_flags,
4985                                                                  actions,
4986                                                                  item_flags,
4987                                                                  error);
4988                         if (ret < 0)
4989                                 return ret;
4990                         /* Count all modify-header actions as one action. */
4991                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4992                                 ++actions_n;
4993                         action_flags |= actions->type ==
4994                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4995                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4996                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4997                         break;
4998                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4999                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5000                         ret = flow_dv_validate_action_modify_tcp_ack
5001                                                                 (action_flags,
5002                                                                  actions,
5003                                                                  item_flags,
5004                                                                  error);
5005                         if (ret < 0)
5006                                 return ret;
5007                         /* Count all modify-header actions as one action. */
5008                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5009                                 ++actions_n;
5010                         action_flags |= actions->type ==
5011                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5012                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5013                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5014                         break;
5015                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5016                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5017                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5018                         break;
5019                 case RTE_FLOW_ACTION_TYPE_METER:
5020                         ret = mlx5_flow_validate_action_meter(dev,
5021                                                               action_flags,
5022                                                               actions, attr,
5023                                                               error);
5024                         if (ret < 0)
5025                                 return ret;
5026                         action_flags |= MLX5_FLOW_ACTION_METER;
5027                         ++actions_n;
5028                         break;
5029                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5030                         ret = flow_dv_validate_action_modify_ipv4_dscp
5031                                                          (action_flags,
5032                                                           actions,
5033                                                           item_flags,
5034                                                           error);
5035                         if (ret < 0)
5036                                 return ret;
5037                         /* Count all modify-header actions as one action. */
5038                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5039                                 ++actions_n;
5040                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5041                         break;
5042                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5043                         ret = flow_dv_validate_action_modify_ipv6_dscp
5044                                                                 (action_flags,
5045                                                                  actions,
5046                                                                  item_flags,
5047                                                                  error);
5048                         if (ret < 0)
5049                                 return ret;
5050                         /* Count all modify-header actions as one action. */
5051                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5052                                 ++actions_n;
5053                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5054                         break;
5055                 default:
5056                         return rte_flow_error_set(error, ENOTSUP,
5057                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5058                                                   actions,
5059                                                   "action not supported");
5060                 }
5061         }
5062         /* Eswitch has few restrictions on using items and actions */
5063         if (attr->transfer) {
5064                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5065                     action_flags & MLX5_FLOW_ACTION_FLAG)
5066                         return rte_flow_error_set(error, ENOTSUP,
5067                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5068                                                   NULL,
5069                                                   "unsupported action FLAG");
5070                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5071                     action_flags & MLX5_FLOW_ACTION_MARK)
5072                         return rte_flow_error_set(error, ENOTSUP,
5073                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5074                                                   NULL,
5075                                                   "unsupported action MARK");
5076                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5077                         return rte_flow_error_set(error, ENOTSUP,
5078                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5079                                                   NULL,
5080                                                   "unsupported action QUEUE");
5081                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5082                         return rte_flow_error_set(error, ENOTSUP,
5083                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5084                                                   NULL,
5085                                                   "unsupported action RSS");
5086                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5087                         return rte_flow_error_set(error, EINVAL,
5088                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5089                                                   actions,
5090                                                   "no fate action is found");
5091         } else {
5092                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5093                         return rte_flow_error_set(error, EINVAL,
5094                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5095                                                   actions,
5096                                                   "no fate action is found");
5097         }
5098         return 0;
5099 }
5100
5101 /**
5102  * Internal preparation function. Allocates the DV flow size,
5103  * this size is constant.
5104  *
5105  * @param[in] attr
5106  *   Pointer to the flow attributes.
5107  * @param[in] items
5108  *   Pointer to the list of items.
5109  * @param[in] actions
5110  *   Pointer to the list of actions.
5111  * @param[out] error
5112  *   Pointer to the error structure.
5113  *
5114  * @return
5115  *   Pointer to mlx5_flow object on success,
5116  *   otherwise NULL and rte_errno is set.
5117  */
5118 static struct mlx5_flow *
5119 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5120                 const struct rte_flow_item items[] __rte_unused,
5121                 const struct rte_flow_action actions[] __rte_unused,
5122                 struct rte_flow_error *error)
5123 {
5124         size_t size = sizeof(struct mlx5_flow);
5125         struct mlx5_flow *dev_flow;
5126
5127         dev_flow = rte_calloc(__func__, 1, size, 0);
5128         if (!dev_flow) {
5129                 rte_flow_error_set(error, ENOMEM,
5130                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5131                                    "not enough memory to create flow");
5132                 return NULL;
5133         }
5134         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5135         dev_flow->ingress = attr->ingress;
5136         dev_flow->transfer = attr->transfer;
5137         return dev_flow;
5138 }
5139
5140 #ifndef NDEBUG
5141 /**
5142  * Sanity check for match mask and value. Similar to check_valid_spec() in
5143  * kernel driver. If unmasked bit is present in value, it returns failure.
5144  *
5145  * @param match_mask
5146  *   pointer to match mask buffer.
5147  * @param match_value
5148  *   pointer to match value buffer.
5149  *
5150  * @return
5151  *   0 if valid, -EINVAL otherwise.
5152  */
5153 static int
5154 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5155 {
5156         uint8_t *m = match_mask;
5157         uint8_t *v = match_value;
5158         unsigned int i;
5159
5160         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5161                 if (v[i] & ~m[i]) {
5162                         DRV_LOG(ERR,
5163                                 "match_value differs from match_criteria"
5164                                 " %p[%u] != %p[%u]",
5165                                 match_value, i, match_mask, i);
5166                         return -EINVAL;
5167                 }
5168         }
5169         return 0;
5170 }
5171 #endif
5172
5173 /**
5174  * Add Ethernet item to matcher and to the value.
5175  *
5176  * @param[in, out] matcher
5177  *   Flow matcher.
5178  * @param[in, out] key
5179  *   Flow matcher value.
5180  * @param[in] item
5181  *   Flow pattern to translate.
5182  * @param[in] inner
5183  *   Item is inner pattern.
5184  */
5185 static void
5186 flow_dv_translate_item_eth(void *matcher, void *key,
5187                            const struct rte_flow_item *item, int inner)
5188 {
5189         const struct rte_flow_item_eth *eth_m = item->mask;
5190         const struct rte_flow_item_eth *eth_v = item->spec;
5191         const struct rte_flow_item_eth nic_mask = {
5192                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5193                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5194                 .type = RTE_BE16(0xffff),
5195         };
5196         void *headers_m;
5197         void *headers_v;
5198         char *l24_v;
5199         unsigned int i;
5200
5201         if (!eth_v)
5202                 return;
5203         if (!eth_m)
5204                 eth_m = &nic_mask;
5205         if (inner) {
5206                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5207                                          inner_headers);
5208                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5209         } else {
5210                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5211                                          outer_headers);
5212                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5213         }
5214         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5215                &eth_m->dst, sizeof(eth_m->dst));
5216         /* The value must be in the range of the mask. */
5217         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5218         for (i = 0; i < sizeof(eth_m->dst); ++i)
5219                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5220         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5221                &eth_m->src, sizeof(eth_m->src));
5222         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5223         /* The value must be in the range of the mask. */
5224         for (i = 0; i < sizeof(eth_m->dst); ++i)
5225                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5226         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5227                  rte_be_to_cpu_16(eth_m->type));
5228         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5229         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5230 }
5231
5232 /**
5233  * Add VLAN item to matcher and to the value.
5234  *
5235  * @param[in, out] dev_flow
5236  *   Flow descriptor.
5237  * @param[in, out] matcher
5238  *   Flow matcher.
5239  * @param[in, out] key
5240  *   Flow matcher value.
5241  * @param[in] item
5242  *   Flow pattern to translate.
5243  * @param[in] inner
5244  *   Item is inner pattern.
5245  */
5246 static void
5247 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5248                             void *matcher, void *key,
5249                             const struct rte_flow_item *item,
5250                             int inner)
5251 {
5252         const struct rte_flow_item_vlan *vlan_m = item->mask;
5253         const struct rte_flow_item_vlan *vlan_v = item->spec;
5254         void *headers_m;
5255         void *headers_v;
5256         uint16_t tci_m;
5257         uint16_t tci_v;
5258
5259         if (!vlan_v)
5260                 return;
5261         if (!vlan_m)
5262                 vlan_m = &rte_flow_item_vlan_mask;
5263         if (inner) {
5264                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5265                                          inner_headers);
5266                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5267         } else {
5268                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5269                                          outer_headers);
5270                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5271                 /*
5272                  * This is workaround, masks are not supported,
5273                  * and pre-validated.
5274                  */
5275                 dev_flow->dv.vf_vlan.tag =
5276                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5277         }
5278         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5279         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5280         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5281         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5282         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5283         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5284         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5285         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5286         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5287         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5288         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5289                  rte_be_to_cpu_16(vlan_m->inner_type));
5290         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5291                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5292 }
5293
5294 /**
5295  * Add IPV4 item to matcher and to the value.
5296  *
5297  * @param[in, out] matcher
5298  *   Flow matcher.
5299  * @param[in, out] key
5300  *   Flow matcher value.
5301  * @param[in] item
5302  *   Flow pattern to translate.
5303  * @param[in] inner
5304  *   Item is inner pattern.
5305  * @param[in] group
5306  *   The group to insert the rule.
5307  */
5308 static void
5309 flow_dv_translate_item_ipv4(void *matcher, void *key,
5310                             const struct rte_flow_item *item,
5311                             int inner, uint32_t group)
5312 {
5313         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5314         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5315         const struct rte_flow_item_ipv4 nic_mask = {
5316                 .hdr = {
5317                         .src_addr = RTE_BE32(0xffffffff),
5318                         .dst_addr = RTE_BE32(0xffffffff),
5319                         .type_of_service = 0xff,
5320                         .next_proto_id = 0xff,
5321                 },
5322         };
5323         void *headers_m;
5324         void *headers_v;
5325         char *l24_m;
5326         char *l24_v;
5327         uint8_t tos;
5328
5329         if (inner) {
5330                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5331                                          inner_headers);
5332                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5333         } else {
5334                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5335                                          outer_headers);
5336                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5337         }
5338         if (group == 0)
5339                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5340         else
5341                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5342         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5343         if (!ipv4_v)
5344                 return;
5345         if (!ipv4_m)
5346                 ipv4_m = &nic_mask;
5347         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5348                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5349         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5350                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5351         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5352         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5353         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5354                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5355         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5356                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5357         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5358         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5359         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5360         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5361                  ipv4_m->hdr.type_of_service);
5362         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5363         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5364                  ipv4_m->hdr.type_of_service >> 2);
5365         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5366         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5367                  ipv4_m->hdr.next_proto_id);
5368         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5369                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5370 }
5371
5372 /**
5373  * Add IPV6 item to matcher and to the value.
5374  *
5375  * @param[in, out] matcher
5376  *   Flow matcher.
5377  * @param[in, out] key
5378  *   Flow matcher value.
5379  * @param[in] item
5380  *   Flow pattern to translate.
5381  * @param[in] inner
5382  *   Item is inner pattern.
5383  * @param[in] group
5384  *   The group to insert the rule.
5385  */
5386 static void
5387 flow_dv_translate_item_ipv6(void *matcher, void *key,
5388                             const struct rte_flow_item *item,
5389                             int inner, uint32_t group)
5390 {
5391         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5392         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5393         const struct rte_flow_item_ipv6 nic_mask = {
5394                 .hdr = {
5395                         .src_addr =
5396                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5397                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5398                         .dst_addr =
5399                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5400                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5401                         .vtc_flow = RTE_BE32(0xffffffff),
5402                         .proto = 0xff,
5403                         .hop_limits = 0xff,
5404                 },
5405         };
5406         void *headers_m;
5407         void *headers_v;
5408         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5409         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5410         char *l24_m;
5411         char *l24_v;
5412         uint32_t vtc_m;
5413         uint32_t vtc_v;
5414         int i;
5415         int size;
5416
5417         if (inner) {
5418                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5419                                          inner_headers);
5420                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5421         } else {
5422                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5423                                          outer_headers);
5424                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5425         }
5426         if (group == 0)
5427                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5428         else
5429                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5430         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5431         if (!ipv6_v)
5432                 return;
5433         if (!ipv6_m)
5434                 ipv6_m = &nic_mask;
5435         size = sizeof(ipv6_m->hdr.dst_addr);
5436         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5437                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5438         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5439                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5440         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5441         for (i = 0; i < size; ++i)
5442                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5443         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5444                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5445         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5446                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5447         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5448         for (i = 0; i < size; ++i)
5449                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5450         /* TOS. */
5451         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5452         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5453         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5454         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5455         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5456         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5457         /* Label. */
5458         if (inner) {
5459                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5460                          vtc_m);
5461                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5462                          vtc_v);
5463         } else {
5464                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5465                          vtc_m);
5466                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5467                          vtc_v);
5468         }
5469         /* Protocol. */
5470         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5471                  ipv6_m->hdr.proto);
5472         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5473                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5474 }
5475
5476 /**
5477  * Add TCP item to matcher and to the value.
5478  *
5479  * @param[in, out] matcher
5480  *   Flow matcher.
5481  * @param[in, out] key
5482  *   Flow matcher value.
5483  * @param[in] item
5484  *   Flow pattern to translate.
5485  * @param[in] inner
5486  *   Item is inner pattern.
5487  */
5488 static void
5489 flow_dv_translate_item_tcp(void *matcher, void *key,
5490                            const struct rte_flow_item *item,
5491                            int inner)
5492 {
5493         const struct rte_flow_item_tcp *tcp_m = item->mask;
5494         const struct rte_flow_item_tcp *tcp_v = item->spec;
5495         void *headers_m;
5496         void *headers_v;
5497
5498         if (inner) {
5499                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5500                                          inner_headers);
5501                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5502         } else {
5503                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5504                                          outer_headers);
5505                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5506         }
5507         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5508         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5509         if (!tcp_v)
5510                 return;
5511         if (!tcp_m)
5512                 tcp_m = &rte_flow_item_tcp_mask;
5513         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5514                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5515         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5516                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5517         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5518                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5519         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5520                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5521         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5522                  tcp_m->hdr.tcp_flags);
5523         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5524                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5525 }
5526
5527 /**
5528  * Add UDP item to matcher and to the value.
5529  *
5530  * @param[in, out] matcher
5531  *   Flow matcher.
5532  * @param[in, out] key
5533  *   Flow matcher value.
5534  * @param[in] item
5535  *   Flow pattern to translate.
5536  * @param[in] inner
5537  *   Item is inner pattern.
5538  */
5539 static void
5540 flow_dv_translate_item_udp(void *matcher, void *key,
5541                            const struct rte_flow_item *item,
5542                            int inner)
5543 {
5544         const struct rte_flow_item_udp *udp_m = item->mask;
5545         const struct rte_flow_item_udp *udp_v = item->spec;
5546         void *headers_m;
5547         void *headers_v;
5548
5549         if (inner) {
5550                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5551                                          inner_headers);
5552                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5553         } else {
5554                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5555                                          outer_headers);
5556                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5557         }
5558         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5559         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5560         if (!udp_v)
5561                 return;
5562         if (!udp_m)
5563                 udp_m = &rte_flow_item_udp_mask;
5564         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5565                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5566         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5567                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5568         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5569                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5570         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5571                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5572 }
5573
5574 /**
5575  * Add GRE optional Key item to matcher and to the value.
5576  *
5577  * @param[in, out] matcher
5578  *   Flow matcher.
5579  * @param[in, out] key
5580  *   Flow matcher value.
5581  * @param[in] item
5582  *   Flow pattern to translate.
5583  * @param[in] inner
5584  *   Item is inner pattern.
5585  */
5586 static void
5587 flow_dv_translate_item_gre_key(void *matcher, void *key,
5588                                    const struct rte_flow_item *item)
5589 {
5590         const rte_be32_t *key_m = item->mask;
5591         const rte_be32_t *key_v = item->spec;
5592         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5593         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5594         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5595
5596         if (!key_v)
5597                 return;
5598         if (!key_m)
5599                 key_m = &gre_key_default_mask;
5600         /* GRE K bit must be on and should already be validated */
5601         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5602         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5603         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5604                  rte_be_to_cpu_32(*key_m) >> 8);
5605         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5606                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5607         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5608                  rte_be_to_cpu_32(*key_m) & 0xFF);
5609         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5610                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5611 }
5612
5613 /**
5614  * Add GRE item to matcher and to the value.
5615  *
5616  * @param[in, out] matcher
5617  *   Flow matcher.
5618  * @param[in, out] key
5619  *   Flow matcher value.
5620  * @param[in] item
5621  *   Flow pattern to translate.
5622  * @param[in] inner
5623  *   Item is inner pattern.
5624  */
5625 static void
5626 flow_dv_translate_item_gre(void *matcher, void *key,
5627                            const struct rte_flow_item *item,
5628                            int inner)
5629 {
5630         const struct rte_flow_item_gre *gre_m = item->mask;
5631         const struct rte_flow_item_gre *gre_v = item->spec;
5632         void *headers_m;
5633         void *headers_v;
5634         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5635         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5636         struct {
5637                 union {
5638                         __extension__
5639                         struct {
5640                                 uint16_t version:3;
5641                                 uint16_t rsvd0:9;
5642                                 uint16_t s_present:1;
5643                                 uint16_t k_present:1;
5644                                 uint16_t rsvd_bit1:1;
5645                                 uint16_t c_present:1;
5646                         };
5647                         uint16_t value;
5648                 };
5649         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5650
5651         if (inner) {
5652                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5653                                          inner_headers);
5654                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5655         } else {
5656                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5657                                          outer_headers);
5658                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5659         }
5660         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5661         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5662         if (!gre_v)
5663                 return;
5664         if (!gre_m)
5665                 gre_m = &rte_flow_item_gre_mask;
5666         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5667                  rte_be_to_cpu_16(gre_m->protocol));
5668         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5669                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5670         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5671         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5672         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5673                  gre_crks_rsvd0_ver_m.c_present);
5674         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5675                  gre_crks_rsvd0_ver_v.c_present &
5676                  gre_crks_rsvd0_ver_m.c_present);
5677         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5678                  gre_crks_rsvd0_ver_m.k_present);
5679         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5680                  gre_crks_rsvd0_ver_v.k_present &
5681                  gre_crks_rsvd0_ver_m.k_present);
5682         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5683                  gre_crks_rsvd0_ver_m.s_present);
5684         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5685                  gre_crks_rsvd0_ver_v.s_present &
5686                  gre_crks_rsvd0_ver_m.s_present);
5687 }
5688
5689 /**
5690  * Add NVGRE item to matcher and to the value.
5691  *
5692  * @param[in, out] matcher
5693  *   Flow matcher.
5694  * @param[in, out] key
5695  *   Flow matcher value.
5696  * @param[in] item
5697  *   Flow pattern to translate.
5698  * @param[in] inner
5699  *   Item is inner pattern.
5700  */
5701 static void
5702 flow_dv_translate_item_nvgre(void *matcher, void *key,
5703                              const struct rte_flow_item *item,
5704                              int inner)
5705 {
5706         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5707         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5708         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5709         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5710         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5711         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5712         char *gre_key_m;
5713         char *gre_key_v;
5714         int size;
5715         int i;
5716
5717         /* For NVGRE, GRE header fields must be set with defined values. */
5718         const struct rte_flow_item_gre gre_spec = {
5719                 .c_rsvd0_ver = RTE_BE16(0x2000),
5720                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5721         };
5722         const struct rte_flow_item_gre gre_mask = {
5723                 .c_rsvd0_ver = RTE_BE16(0xB000),
5724                 .protocol = RTE_BE16(UINT16_MAX),
5725         };
5726         const struct rte_flow_item gre_item = {
5727                 .spec = &gre_spec,
5728                 .mask = &gre_mask,
5729                 .last = NULL,
5730         };
5731         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5732         if (!nvgre_v)
5733                 return;
5734         if (!nvgre_m)
5735                 nvgre_m = &rte_flow_item_nvgre_mask;
5736         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5737         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5738         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5739         memcpy(gre_key_m, tni_flow_id_m, size);
5740         for (i = 0; i < size; ++i)
5741                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5742 }
5743
5744 /**
5745  * Add VXLAN item to matcher and to the value.
5746  *
5747  * @param[in, out] matcher
5748  *   Flow matcher.
5749  * @param[in, out] key
5750  *   Flow matcher value.
5751  * @param[in] item
5752  *   Flow pattern to translate.
5753  * @param[in] inner
5754  *   Item is inner pattern.
5755  */
5756 static void
5757 flow_dv_translate_item_vxlan(void *matcher, void *key,
5758                              const struct rte_flow_item *item,
5759                              int inner)
5760 {
5761         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5762         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5763         void *headers_m;
5764         void *headers_v;
5765         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5766         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5767         char *vni_m;
5768         char *vni_v;
5769         uint16_t dport;
5770         int size;
5771         int i;
5772
5773         if (inner) {
5774                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5775                                          inner_headers);
5776                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5777         } else {
5778                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5779                                          outer_headers);
5780                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5781         }
5782         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5783                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5784         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5785                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5786                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5787         }
5788         if (!vxlan_v)
5789                 return;
5790         if (!vxlan_m)
5791                 vxlan_m = &rte_flow_item_vxlan_mask;
5792         size = sizeof(vxlan_m->vni);
5793         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5794         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5795         memcpy(vni_m, vxlan_m->vni, size);
5796         for (i = 0; i < size; ++i)
5797                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5798 }
5799
5800 /**
5801  * Add Geneve item to matcher and to the value.
5802  *
5803  * @param[in, out] matcher
5804  *   Flow matcher.
5805  * @param[in, out] key
5806  *   Flow matcher value.
5807  * @param[in] item
5808  *   Flow pattern to translate.
5809  * @param[in] inner
5810  *   Item is inner pattern.
5811  */
5812
5813 static void
5814 flow_dv_translate_item_geneve(void *matcher, void *key,
5815                               const struct rte_flow_item *item, int inner)
5816 {
5817         const struct rte_flow_item_geneve *geneve_m = item->mask;
5818         const struct rte_flow_item_geneve *geneve_v = item->spec;
5819         void *headers_m;
5820         void *headers_v;
5821         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5822         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5823         uint16_t dport;
5824         uint16_t gbhdr_m;
5825         uint16_t gbhdr_v;
5826         char *vni_m;
5827         char *vni_v;
5828         size_t size, i;
5829
5830         if (inner) {
5831                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5832                                          inner_headers);
5833                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5834         } else {
5835                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5836                                          outer_headers);
5837                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5838         }
5839         dport = MLX5_UDP_PORT_GENEVE;
5840         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5841                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5842                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5843         }
5844         if (!geneve_v)
5845                 return;
5846         if (!geneve_m)
5847                 geneve_m = &rte_flow_item_geneve_mask;
5848         size = sizeof(geneve_m->vni);
5849         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5850         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5851         memcpy(vni_m, geneve_m->vni, size);
5852         for (i = 0; i < size; ++i)
5853                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5854         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5855                  rte_be_to_cpu_16(geneve_m->protocol));
5856         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5857                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5858         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5859         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5860         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5861                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5862         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5863                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5864         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5865                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5866         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5867                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5868                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5869 }
5870
5871 /**
5872  * Add MPLS item to matcher and to the value.
5873  *
5874  * @param[in, out] matcher
5875  *   Flow matcher.
5876  * @param[in, out] key
5877  *   Flow matcher value.
5878  * @param[in] item
5879  *   Flow pattern to translate.
5880  * @param[in] prev_layer
5881  *   The protocol layer indicated in previous item.
5882  * @param[in] inner
5883  *   Item is inner pattern.
5884  */
5885 static void
5886 flow_dv_translate_item_mpls(void *matcher, void *key,
5887                             const struct rte_flow_item *item,
5888                             uint64_t prev_layer,
5889                             int inner)
5890 {
5891         const uint32_t *in_mpls_m = item->mask;
5892         const uint32_t *in_mpls_v = item->spec;
5893         uint32_t *out_mpls_m = 0;
5894         uint32_t *out_mpls_v = 0;
5895         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5896         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5897         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5898                                      misc_parameters_2);
5899         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5900         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5901         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5902
5903         switch (prev_layer) {
5904         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5905                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5906                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5907                          MLX5_UDP_PORT_MPLS);
5908                 break;
5909         case MLX5_FLOW_LAYER_GRE:
5910                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5911                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5912                          RTE_ETHER_TYPE_MPLS);
5913                 break;
5914         default:
5915                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5916                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5917                          IPPROTO_MPLS);
5918                 break;
5919         }
5920         if (!in_mpls_v)
5921                 return;
5922         if (!in_mpls_m)
5923                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5924         switch (prev_layer) {
5925         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5926                 out_mpls_m =
5927                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5928                                                  outer_first_mpls_over_udp);
5929                 out_mpls_v =
5930                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5931                                                  outer_first_mpls_over_udp);
5932                 break;
5933         case MLX5_FLOW_LAYER_GRE:
5934                 out_mpls_m =
5935                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5936                                                  outer_first_mpls_over_gre);
5937                 out_mpls_v =
5938                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5939                                                  outer_first_mpls_over_gre);
5940                 break;
5941         default:
5942                 /* Inner MPLS not over GRE is not supported. */
5943                 if (!inner) {
5944                         out_mpls_m =
5945                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5946                                                          misc2_m,
5947                                                          outer_first_mpls);
5948                         out_mpls_v =
5949                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5950                                                          misc2_v,
5951                                                          outer_first_mpls);
5952                 }
5953                 break;
5954         }
5955         if (out_mpls_m && out_mpls_v) {
5956                 *out_mpls_m = *in_mpls_m;
5957                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5958         }
5959 }
5960
5961 /**
5962  * Add metadata register item to matcher
5963  *
5964  * @param[in, out] matcher
5965  *   Flow matcher.
5966  * @param[in, out] key
5967  *   Flow matcher value.
5968  * @param[in] reg_type
5969  *   Type of device metadata register
5970  * @param[in] value
5971  *   Register value
5972  * @param[in] mask
5973  *   Register mask
5974  */
5975 static void
5976 flow_dv_match_meta_reg(void *matcher, void *key,
5977                        enum modify_reg reg_type,
5978                        uint32_t data, uint32_t mask)
5979 {
5980         void *misc2_m =
5981                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5982         void *misc2_v =
5983                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5984         uint32_t temp;
5985
5986         data &= mask;
5987         switch (reg_type) {
5988         case REG_A:
5989                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5990                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5991                 break;
5992         case REG_B:
5993                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5994                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5995                 break;
5996         case REG_C_0:
5997                 /*
5998                  * The metadata register C0 field might be divided into
5999                  * source vport index and META item value, we should set
6000                  * this field according to specified mask, not as whole one.
6001                  */
6002                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
6003                 temp |= mask;
6004                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
6005                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
6006                 temp &= ~mask;
6007                 temp |= data;
6008                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
6009                 break;
6010         case REG_C_1:
6011                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
6012                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
6013                 break;
6014         case REG_C_2:
6015                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
6016                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
6017                 break;
6018         case REG_C_3:
6019                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6020                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6021                 break;
6022         case REG_C_4:
6023                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6024                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6025                 break;
6026         case REG_C_5:
6027                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6028                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6029                 break;
6030         case REG_C_6:
6031                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6032                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6033                 break;
6034         case REG_C_7:
6035                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6036                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6037                 break;
6038         default:
6039                 assert(false);
6040                 break;
6041         }
6042 }
6043
6044 /**
6045  * Add MARK item to matcher
6046  *
6047  * @param[in] dev
6048  *   The device to configure through.
6049  * @param[in, out] matcher
6050  *   Flow matcher.
6051  * @param[in, out] key
6052  *   Flow matcher value.
6053  * @param[in] item
6054  *   Flow pattern to translate.
6055  */
6056 static void
6057 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6058                             void *matcher, void *key,
6059                             const struct rte_flow_item *item)
6060 {
6061         struct mlx5_priv *priv = dev->data->dev_private;
6062         const struct rte_flow_item_mark *mark;
6063         uint32_t value;
6064         uint32_t mask;
6065
6066         mark = item->mask ? (const void *)item->mask :
6067                             &rte_flow_item_mark_mask;
6068         mask = mark->id & priv->sh->dv_mark_mask;
6069         mark = (const void *)item->spec;
6070         assert(mark);
6071         value = mark->id & priv->sh->dv_mark_mask & mask;
6072         if (mask) {
6073                 enum modify_reg reg;
6074
6075                 /* Get the metadata register index for the mark. */
6076                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6077                 assert(reg > 0);
6078                 if (reg == REG_C_0) {
6079                         struct mlx5_priv *priv = dev->data->dev_private;
6080                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6081                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6082
6083                         mask &= msk_c0;
6084                         mask <<= shl_c0;
6085                         value <<= shl_c0;
6086                 }
6087                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6088         }
6089 }
6090
6091 /**
6092  * Add META item to matcher
6093  *
6094  * @param[in] dev
6095  *   The devich to configure through.
6096  * @param[in, out] matcher
6097  *   Flow matcher.
6098  * @param[in, out] key
6099  *   Flow matcher value.
6100  * @param[in] attr
6101  *   Attributes of flow that includes this item.
6102  * @param[in] item
6103  *   Flow pattern to translate.
6104  */
6105 static void
6106 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6107                             void *matcher, void *key,
6108                             const struct rte_flow_attr *attr,
6109                             const struct rte_flow_item *item)
6110 {
6111         const struct rte_flow_item_meta *meta_m;
6112         const struct rte_flow_item_meta *meta_v;
6113
6114         meta_m = (const void *)item->mask;
6115         if (!meta_m)
6116                 meta_m = &rte_flow_item_meta_mask;
6117         meta_v = (const void *)item->spec;
6118         if (meta_v) {
6119                 enum modify_reg reg;
6120                 uint32_t value = meta_v->data;
6121                 uint32_t mask = meta_m->data;
6122
6123                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6124                 if (reg < 0)
6125                         return;
6126                 /*
6127                  * In datapath code there is no endianness
6128                  * coversions for perfromance reasons, all
6129                  * pattern conversions are done in rte_flow.
6130                  */
6131                 value = rte_cpu_to_be_32(value);
6132                 mask = rte_cpu_to_be_32(mask);
6133                 if (reg == REG_C_0) {
6134                         struct mlx5_priv *priv = dev->data->dev_private;
6135                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6136                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6137 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6138                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6139
6140                         value >>= shr_c0;
6141                         mask >>= shr_c0;
6142 #endif
6143                         value <<= shl_c0;
6144                         mask <<= shl_c0;
6145                         assert(msk_c0);
6146                         assert(!(~msk_c0 & mask));
6147                 }
6148                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6149         }
6150 }
6151
6152 /**
6153  * Add vport metadata Reg C0 item to matcher
6154  *
6155  * @param[in, out] matcher
6156  *   Flow matcher.
6157  * @param[in, out] key
6158  *   Flow matcher value.
6159  * @param[in] reg
6160  *   Flow pattern to translate.
6161  */
6162 static void
6163 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6164                                   uint32_t value, uint32_t mask)
6165 {
6166         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6167 }
6168
6169 /**
6170  * Add tag item to matcher
6171  *
6172  * @param[in] dev
6173  *   The devich to configure through.
6174  * @param[in, out] matcher
6175  *   Flow matcher.
6176  * @param[in, out] key
6177  *   Flow matcher value.
6178  * @param[in] item
6179  *   Flow pattern to translate.
6180  */
6181 static void
6182 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6183                                 void *matcher, void *key,
6184                                 const struct rte_flow_item *item)
6185 {
6186         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6187         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6188         uint32_t mask, value;
6189
6190         assert(tag_v);
6191         value = tag_v->data;
6192         mask = tag_m ? tag_m->data : UINT32_MAX;
6193         if (tag_v->id == REG_C_0) {
6194                 struct mlx5_priv *priv = dev->data->dev_private;
6195                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6196                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6197
6198                 mask &= msk_c0;
6199                 mask <<= shl_c0;
6200                 value <<= shl_c0;
6201         }
6202         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6203 }
6204
6205 /**
6206  * Add TAG item to matcher
6207  *
6208  * @param[in] dev
6209  *   The devich to configure through.
6210  * @param[in, out] matcher
6211  *   Flow matcher.
6212  * @param[in, out] key
6213  *   Flow matcher value.
6214  * @param[in] item
6215  *   Flow pattern to translate.
6216  */
6217 static void
6218 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6219                            void *matcher, void *key,
6220                            const struct rte_flow_item *item)
6221 {
6222         const struct rte_flow_item_tag *tag_v = item->spec;
6223         const struct rte_flow_item_tag *tag_m = item->mask;
6224         enum modify_reg reg;
6225
6226         assert(tag_v);
6227         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6228         /* Get the metadata register index for the tag. */
6229         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6230         assert(reg > 0);
6231         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6232 }
6233
6234 /**
6235  * Add source vport match to the specified matcher.
6236  *
6237  * @param[in, out] matcher
6238  *   Flow matcher.
6239  * @param[in, out] key
6240  *   Flow matcher value.
6241  * @param[in] port
6242  *   Source vport value to match
6243  * @param[in] mask
6244  *   Mask
6245  */
6246 static void
6247 flow_dv_translate_item_source_vport(void *matcher, void *key,
6248                                     int16_t port, uint16_t mask)
6249 {
6250         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6251         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6252
6253         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6254         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6255 }
6256
6257 /**
6258  * Translate port-id item to eswitch match on  port-id.
6259  *
6260  * @param[in] dev
6261  *   The devich to configure through.
6262  * @param[in, out] matcher
6263  *   Flow matcher.
6264  * @param[in, out] key
6265  *   Flow matcher value.
6266  * @param[in] item
6267  *   Flow pattern to translate.
6268  *
6269  * @return
6270  *   0 on success, a negative errno value otherwise.
6271  */
6272 static int
6273 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6274                                void *key, const struct rte_flow_item *item)
6275 {
6276         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6277         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6278         struct mlx5_priv *priv;
6279         uint16_t mask, id;
6280
6281         mask = pid_m ? pid_m->id : 0xffff;
6282         id = pid_v ? pid_v->id : dev->data->port_id;
6283         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6284         if (!priv)
6285                 return -rte_errno;
6286         /* Translate to vport field or to metadata, depending on mode. */
6287         if (priv->vport_meta_mask)
6288                 flow_dv_translate_item_meta_vport(matcher, key,
6289                                                   priv->vport_meta_tag,
6290                                                   priv->vport_meta_mask);
6291         else
6292                 flow_dv_translate_item_source_vport(matcher, key,
6293                                                     priv->vport_id, mask);
6294         return 0;
6295 }
6296
6297 /**
6298  * Add ICMP6 item to matcher and to the value.
6299  *
6300  * @param[in, out] matcher
6301  *   Flow matcher.
6302  * @param[in, out] key
6303  *   Flow matcher value.
6304  * @param[in] item
6305  *   Flow pattern to translate.
6306  * @param[in] inner
6307  *   Item is inner pattern.
6308  */
6309 static void
6310 flow_dv_translate_item_icmp6(void *matcher, void *key,
6311                               const struct rte_flow_item *item,
6312                               int inner)
6313 {
6314         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6315         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6316         void *headers_m;
6317         void *headers_v;
6318         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6319                                      misc_parameters_3);
6320         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6321         if (inner) {
6322                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6323                                          inner_headers);
6324                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6325         } else {
6326                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6327                                          outer_headers);
6328                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6329         }
6330         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6331         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6332         if (!icmp6_v)
6333                 return;
6334         if (!icmp6_m)
6335                 icmp6_m = &rte_flow_item_icmp6_mask;
6336         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6337         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6338                  icmp6_v->type & icmp6_m->type);
6339         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6340         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6341                  icmp6_v->code & icmp6_m->code);
6342 }
6343
6344 /**
6345  * Add ICMP item to matcher and to the value.
6346  *
6347  * @param[in, out] matcher
6348  *   Flow matcher.
6349  * @param[in, out] key
6350  *   Flow matcher value.
6351  * @param[in] item
6352  *   Flow pattern to translate.
6353  * @param[in] inner
6354  *   Item is inner pattern.
6355  */
6356 static void
6357 flow_dv_translate_item_icmp(void *matcher, void *key,
6358                             const struct rte_flow_item *item,
6359                             int inner)
6360 {
6361         const struct rte_flow_item_icmp *icmp_m = item->mask;
6362         const struct rte_flow_item_icmp *icmp_v = item->spec;
6363         void *headers_m;
6364         void *headers_v;
6365         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6366                                      misc_parameters_3);
6367         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6368         if (inner) {
6369                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6370                                          inner_headers);
6371                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6372         } else {
6373                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6374                                          outer_headers);
6375                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6376         }
6377         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6378         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6379         if (!icmp_v)
6380                 return;
6381         if (!icmp_m)
6382                 icmp_m = &rte_flow_item_icmp_mask;
6383         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6384                  icmp_m->hdr.icmp_type);
6385         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6386                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6387         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6388                  icmp_m->hdr.icmp_code);
6389         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6390                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6391 }
6392
6393 /**
6394  * Add GTP item to matcher and to the value.
6395  *
6396  * @param[in, out] matcher
6397  *   Flow matcher.
6398  * @param[in, out] key
6399  *   Flow matcher value.
6400  * @param[in] item
6401  *   Flow pattern to translate.
6402  * @param[in] inner
6403  *   Item is inner pattern.
6404  */
6405 static void
6406 flow_dv_translate_item_gtp(void *matcher, void *key,
6407                            const struct rte_flow_item *item, int inner)
6408 {
6409         const struct rte_flow_item_gtp *gtp_m = item->mask;
6410         const struct rte_flow_item_gtp *gtp_v = item->spec;
6411         void *headers_m;
6412         void *headers_v;
6413         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6414                                      misc_parameters_3);
6415         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6416         uint16_t dport = RTE_GTPU_UDP_PORT;
6417
6418         if (inner) {
6419                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6420                                          inner_headers);
6421                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6422         } else {
6423                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6424                                          outer_headers);
6425                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6426         }
6427         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6428                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6429                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6430         }
6431         if (!gtp_v)
6432                 return;
6433         if (!gtp_m)
6434                 gtp_m = &rte_flow_item_gtp_mask;
6435         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6436         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6437                  gtp_v->msg_type & gtp_m->msg_type);
6438         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6439                  rte_be_to_cpu_32(gtp_m->teid));
6440         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6441                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6442 }
6443
6444 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6445
6446 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6447         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6448                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6449
6450 /**
6451  * Calculate flow matcher enable bitmap.
6452  *
6453  * @param match_criteria
6454  *   Pointer to flow matcher criteria.
6455  *
6456  * @return
6457  *   Bitmap of enabled fields.
6458  */
6459 static uint8_t
6460 flow_dv_matcher_enable(uint32_t *match_criteria)
6461 {
6462         uint8_t match_criteria_enable;
6463
6464         match_criteria_enable =
6465                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6466                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6467         match_criteria_enable |=
6468                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6469                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6470         match_criteria_enable |=
6471                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6472                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6473         match_criteria_enable |=
6474                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6475                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6476         match_criteria_enable |=
6477                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6478                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6479         return match_criteria_enable;
6480 }
6481
6482
6483 /**
6484  * Get a flow table.
6485  *
6486  * @param[in, out] dev
6487  *   Pointer to rte_eth_dev structure.
6488  * @param[in] table_id
6489  *   Table id to use.
6490  * @param[in] egress
6491  *   Direction of the table.
6492  * @param[in] transfer
6493  *   E-Switch or NIC flow.
6494  * @param[out] error
6495  *   pointer to error structure.
6496  *
6497  * @return
6498  *   Returns tables resource based on the index, NULL in case of failed.
6499  */
6500 static struct mlx5_flow_tbl_resource *
6501 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6502                          uint32_t table_id, uint8_t egress,
6503                          uint8_t transfer,
6504                          struct rte_flow_error *error)
6505 {
6506         struct mlx5_priv *priv = dev->data->dev_private;
6507         struct mlx5_ibv_shared *sh = priv->sh;
6508         struct mlx5_flow_tbl_resource *tbl;
6509         union mlx5_flow_tbl_key table_key = {
6510                 {
6511                         .table_id = table_id,
6512                         .reserved = 0,
6513                         .domain = !!transfer,
6514                         .direction = !!egress,
6515                 }
6516         };
6517         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6518                                                          table_key.v64);
6519         struct mlx5_flow_tbl_data_entry *tbl_data;
6520         int ret;
6521         void *domain;
6522
6523         if (pos) {
6524                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6525                                         entry);
6526                 tbl = &tbl_data->tbl;
6527                 rte_atomic32_inc(&tbl->refcnt);
6528                 return tbl;
6529         }
6530         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6531         if (!tbl_data) {
6532                 rte_flow_error_set(error, ENOMEM,
6533                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6534                                    NULL,
6535                                    "cannot allocate flow table data entry");
6536                 return NULL;
6537         }
6538         tbl = &tbl_data->tbl;
6539         pos = &tbl_data->entry;
6540         if (transfer)
6541                 domain = sh->fdb_domain;
6542         else if (egress)
6543                 domain = sh->tx_domain;
6544         else
6545                 domain = sh->rx_domain;
6546         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6547         if (!tbl->obj) {
6548                 rte_flow_error_set(error, ENOMEM,
6549                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6550                                    NULL, "cannot create flow table object");
6551                 rte_free(tbl_data);
6552                 return NULL;
6553         }
6554         /*
6555          * No multi-threads now, but still better to initialize the reference
6556          * count before insert it into the hash list.
6557          */
6558         rte_atomic32_init(&tbl->refcnt);
6559         /* Jump action reference count is initialized here. */
6560         rte_atomic32_init(&tbl_data->jump.refcnt);
6561         pos->key = table_key.v64;
6562         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6563         if (ret < 0) {
6564                 rte_flow_error_set(error, -ret,
6565                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6566                                    "cannot insert flow table data entry");
6567                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6568                 rte_free(tbl_data);
6569         }
6570         rte_atomic32_inc(&tbl->refcnt);
6571         return tbl;
6572 }
6573
6574 /**
6575  * Release a flow table.
6576  *
6577  * @param[in] dev
6578  *   Pointer to rte_eth_dev structure.
6579  * @param[in] tbl
6580  *   Table resource to be released.
6581  *
6582  * @return
6583  *   Returns 0 if table was released, else return 1;
6584  */
6585 static int
6586 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6587                              struct mlx5_flow_tbl_resource *tbl)
6588 {
6589         struct mlx5_priv *priv = dev->data->dev_private;
6590         struct mlx5_ibv_shared *sh = priv->sh;
6591         struct mlx5_flow_tbl_data_entry *tbl_data =
6592                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6593
6594         if (!tbl)
6595                 return 0;
6596         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6597                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6598
6599                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6600                 tbl->obj = NULL;
6601                 /* remove the entry from the hash list and free memory. */
6602                 mlx5_hlist_remove(sh->flow_tbls, pos);
6603                 rte_free(tbl_data);
6604                 return 0;
6605         }
6606         return 1;
6607 }
6608
6609 /**
6610  * Register the flow matcher.
6611  *
6612  * @param[in, out] dev
6613  *   Pointer to rte_eth_dev structure.
6614  * @param[in, out] matcher
6615  *   Pointer to flow matcher.
6616  * @param[in, out] key
6617  *   Pointer to flow table key.
6618  * @parm[in, out] dev_flow
6619  *   Pointer to the dev_flow.
6620  * @param[out] error
6621  *   pointer to error structure.
6622  *
6623  * @return
6624  *   0 on success otherwise -errno and errno is set.
6625  */
6626 static int
6627 flow_dv_matcher_register(struct rte_eth_dev *dev,
6628                          struct mlx5_flow_dv_matcher *matcher,
6629                          union mlx5_flow_tbl_key *key,
6630                          struct mlx5_flow *dev_flow,
6631                          struct rte_flow_error *error)
6632 {
6633         struct mlx5_priv *priv = dev->data->dev_private;
6634         struct mlx5_ibv_shared *sh = priv->sh;
6635         struct mlx5_flow_dv_matcher *cache_matcher;
6636         struct mlx5dv_flow_matcher_attr dv_attr = {
6637                 .type = IBV_FLOW_ATTR_NORMAL,
6638                 .match_mask = (void *)&matcher->mask,
6639         };
6640         struct mlx5_flow_tbl_resource *tbl;
6641         struct mlx5_flow_tbl_data_entry *tbl_data;
6642
6643         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6644                                        key->domain, error);
6645         if (!tbl)
6646                 return -rte_errno;      /* No need to refill the error info */
6647         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6648         /* Lookup from cache. */
6649         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6650                 if (matcher->crc == cache_matcher->crc &&
6651                     matcher->priority == cache_matcher->priority &&
6652                     !memcmp((const void *)matcher->mask.buf,
6653                             (const void *)cache_matcher->mask.buf,
6654                             cache_matcher->mask.size)) {
6655                         DRV_LOG(DEBUG,
6656                                 "%s group %u priority %hd use %s "
6657                                 "matcher %p: refcnt %d++",
6658                                 key->domain ? "FDB" : "NIC", key->table_id,
6659                                 cache_matcher->priority,
6660                                 key->direction ? "tx" : "rx",
6661                                 (void *)cache_matcher,
6662                                 rte_atomic32_read(&cache_matcher->refcnt));
6663                         rte_atomic32_inc(&cache_matcher->refcnt);
6664                         dev_flow->dv.matcher = cache_matcher;
6665                         /* old matcher should not make the table ref++. */
6666                         flow_dv_tbl_resource_release(dev, tbl);
6667                         return 0;
6668                 }
6669         }
6670         /* Register new matcher. */
6671         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6672         if (!cache_matcher) {
6673                 flow_dv_tbl_resource_release(dev, tbl);
6674                 return rte_flow_error_set(error, ENOMEM,
6675                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6676                                           "cannot allocate matcher memory");
6677         }
6678         *cache_matcher = *matcher;
6679         dv_attr.match_criteria_enable =
6680                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6681         dv_attr.priority = matcher->priority;
6682         if (key->direction)
6683                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6684         cache_matcher->matcher_object =
6685                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6686         if (!cache_matcher->matcher_object) {
6687                 rte_free(cache_matcher);
6688 #ifdef HAVE_MLX5DV_DR
6689                 flow_dv_tbl_resource_release(dev, tbl);
6690 #endif
6691                 return rte_flow_error_set(error, ENOMEM,
6692                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6693                                           NULL, "cannot create matcher");
6694         }
6695         /* Save the table information */
6696         cache_matcher->tbl = tbl;
6697         rte_atomic32_init(&cache_matcher->refcnt);
6698         /* only matcher ref++, table ref++ already done above in get API. */
6699         rte_atomic32_inc(&cache_matcher->refcnt);
6700         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6701         dev_flow->dv.matcher = cache_matcher;
6702         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6703                 key->domain ? "FDB" : "NIC", key->table_id,
6704                 cache_matcher->priority,
6705                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6706                 rte_atomic32_read(&cache_matcher->refcnt));
6707         return 0;
6708 }
6709
6710 /**
6711  * Find existing tag resource or create and register a new one.
6712  *
6713  * @param dev[in, out]
6714  *   Pointer to rte_eth_dev structure.
6715  * @param[in, out] tag_be24
6716  *   Tag value in big endian then R-shift 8.
6717  * @parm[in, out] dev_flow
6718  *   Pointer to the dev_flow.
6719  * @param[out] error
6720  *   pointer to error structure.
6721  *
6722  * @return
6723  *   0 on success otherwise -errno and errno is set.
6724  */
6725 static int
6726 flow_dv_tag_resource_register
6727                         (struct rte_eth_dev *dev,
6728                          uint32_t tag_be24,
6729                          struct mlx5_flow *dev_flow,
6730                          struct rte_flow_error *error)
6731 {
6732         struct mlx5_priv *priv = dev->data->dev_private;
6733         struct mlx5_ibv_shared *sh = priv->sh;
6734         struct mlx5_flow_dv_tag_resource *cache_resource;
6735         struct mlx5_hlist_entry *entry;
6736
6737         /* Lookup a matching resource from cache. */
6738         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6739         if (entry) {
6740                 cache_resource = container_of
6741                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6742                 rte_atomic32_inc(&cache_resource->refcnt);
6743                 dev_flow->dv.tag_resource = cache_resource;
6744                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6745                         (void *)cache_resource,
6746                         rte_atomic32_read(&cache_resource->refcnt));
6747                 return 0;
6748         }
6749         /* Register new resource. */
6750         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6751         if (!cache_resource)
6752                 return rte_flow_error_set(error, ENOMEM,
6753                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6754                                           "cannot allocate resource memory");
6755         cache_resource->entry.key = (uint64_t)tag_be24;
6756         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6757         if (!cache_resource->action) {
6758                 rte_free(cache_resource);
6759                 return rte_flow_error_set(error, ENOMEM,
6760                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6761                                           NULL, "cannot create action");
6762         }
6763         rte_atomic32_init(&cache_resource->refcnt);
6764         rte_atomic32_inc(&cache_resource->refcnt);
6765         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6766                 mlx5_glue->destroy_flow_action(cache_resource->action);
6767                 rte_free(cache_resource);
6768                 return rte_flow_error_set(error, EEXIST,
6769                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6770                                           NULL, "cannot insert tag");
6771         }
6772         dev_flow->dv.tag_resource = cache_resource;
6773         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6774                 (void *)cache_resource,
6775                 rte_atomic32_read(&cache_resource->refcnt));
6776         return 0;
6777 }
6778
6779 /**
6780  * Release the tag.
6781  *
6782  * @param dev
6783  *   Pointer to Ethernet device.
6784  * @param flow
6785  *   Pointer to mlx5_flow.
6786  *
6787  * @return
6788  *   1 while a reference on it exists, 0 when freed.
6789  */
6790 static int
6791 flow_dv_tag_release(struct rte_eth_dev *dev,
6792                     struct mlx5_flow_dv_tag_resource *tag)
6793 {
6794         struct mlx5_priv *priv = dev->data->dev_private;
6795         struct mlx5_ibv_shared *sh = priv->sh;
6796
6797         assert(tag);
6798         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6799                 dev->data->port_id, (void *)tag,
6800                 rte_atomic32_read(&tag->refcnt));
6801         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6802                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6803                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6804                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6805                         dev->data->port_id, (void *)tag);
6806                 rte_free(tag);
6807                 return 0;
6808         }
6809         return 1;
6810 }
6811
6812 /**
6813  * Translate port ID action to vport.
6814  *
6815  * @param[in] dev
6816  *   Pointer to rte_eth_dev structure.
6817  * @param[in] action
6818  *   Pointer to the port ID action.
6819  * @param[out] dst_port_id
6820  *   The target port ID.
6821  * @param[out] error
6822  *   Pointer to the error structure.
6823  *
6824  * @return
6825  *   0 on success, a negative errno value otherwise and rte_errno is set.
6826  */
6827 static int
6828 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6829                                  const struct rte_flow_action *action,
6830                                  uint32_t *dst_port_id,
6831                                  struct rte_flow_error *error)
6832 {
6833         uint32_t port;
6834         struct mlx5_priv *priv;
6835         const struct rte_flow_action_port_id *conf =
6836                         (const struct rte_flow_action_port_id *)action->conf;
6837
6838         port = conf->original ? dev->data->port_id : conf->id;
6839         priv = mlx5_port_to_eswitch_info(port, false);
6840         if (!priv)
6841                 return rte_flow_error_set(error, -rte_errno,
6842                                           RTE_FLOW_ERROR_TYPE_ACTION,
6843                                           NULL,
6844                                           "No eswitch info was found for port");
6845 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6846         /*
6847          * This parameter is transferred to
6848          * mlx5dv_dr_action_create_dest_ib_port().
6849          */
6850         *dst_port_id = priv->ibv_port;
6851 #else
6852         /*
6853          * Legacy mode, no LAG configurations is supported.
6854          * This parameter is transferred to
6855          * mlx5dv_dr_action_create_dest_vport().
6856          */
6857         *dst_port_id = priv->vport_id;
6858 #endif
6859         return 0;
6860 }
6861
6862 /**
6863  * Add Tx queue matcher
6864  *
6865  * @param[in] dev
6866  *   Pointer to the dev struct.
6867  * @param[in, out] matcher
6868  *   Flow matcher.
6869  * @param[in, out] key
6870  *   Flow matcher value.
6871  * @param[in] item
6872  *   Flow pattern to translate.
6873  * @param[in] inner
6874  *   Item is inner pattern.
6875  */
6876 static void
6877 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6878                                 void *matcher, void *key,
6879                                 const struct rte_flow_item *item)
6880 {
6881         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6882         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6883         void *misc_m =
6884                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6885         void *misc_v =
6886                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6887         struct mlx5_txq_ctrl *txq;
6888         uint32_t queue;
6889
6890
6891         queue_m = (const void *)item->mask;
6892         if (!queue_m)
6893                 return;
6894         queue_v = (const void *)item->spec;
6895         if (!queue_v)
6896                 return;
6897         txq = mlx5_txq_get(dev, queue_v->queue);
6898         if (!txq)
6899                 return;
6900         queue = txq->obj->sq->id;
6901         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6902         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6903                  queue & queue_m->queue);
6904         mlx5_txq_release(dev, queue_v->queue);
6905 }
6906
6907 /**
6908  * Set the hash fields according to the @p flow information.
6909  *
6910  * @param[in] dev_flow
6911  *   Pointer to the mlx5_flow.
6912  */
6913 static void
6914 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6915 {
6916         struct rte_flow *flow = dev_flow->flow;
6917         uint64_t items = dev_flow->layers;
6918         int rss_inner = 0;
6919         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6920
6921         dev_flow->hash_fields = 0;
6922 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6923         if (flow->rss.level >= 2) {
6924                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6925                 rss_inner = 1;
6926         }
6927 #endif
6928         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6929             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6930                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6931                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6932                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6933                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6934                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6935                         else
6936                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6937                 }
6938         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6939                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6940                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6941                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6942                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
6943                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6944                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
6945                         else
6946                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
6947                 }
6948         }
6949         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
6950             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
6951                 if (rss_types & ETH_RSS_UDP) {
6952                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6953                                 dev_flow->hash_fields |=
6954                                                 IBV_RX_HASH_SRC_PORT_UDP;
6955                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6956                                 dev_flow->hash_fields |=
6957                                                 IBV_RX_HASH_DST_PORT_UDP;
6958                         else
6959                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
6960                 }
6961         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
6962                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
6963                 if (rss_types & ETH_RSS_TCP) {
6964                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6965                                 dev_flow->hash_fields |=
6966                                                 IBV_RX_HASH_SRC_PORT_TCP;
6967                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6968                                 dev_flow->hash_fields |=
6969                                                 IBV_RX_HASH_DST_PORT_TCP;
6970                         else
6971                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
6972                 }
6973         }
6974 }
6975
6976 /**
6977  * Fill the flow with DV spec, lock free
6978  * (mutex should be acquired by caller).
6979  *
6980  * @param[in] dev
6981  *   Pointer to rte_eth_dev structure.
6982  * @param[in, out] dev_flow
6983  *   Pointer to the sub flow.
6984  * @param[in] attr
6985  *   Pointer to the flow attributes.
6986  * @param[in] items
6987  *   Pointer to the list of items.
6988  * @param[in] actions
6989  *   Pointer to the list of actions.
6990  * @param[out] error
6991  *   Pointer to the error structure.
6992  *
6993  * @return
6994  *   0 on success, a negative errno value otherwise and rte_errno is set.
6995  */
6996 static int
6997 __flow_dv_translate(struct rte_eth_dev *dev,
6998                     struct mlx5_flow *dev_flow,
6999                     const struct rte_flow_attr *attr,
7000                     const struct rte_flow_item items[],
7001                     const struct rte_flow_action actions[],
7002                     struct rte_flow_error *error)
7003 {
7004         struct mlx5_priv *priv = dev->data->dev_private;
7005         struct mlx5_dev_config *dev_conf = &priv->config;
7006         struct rte_flow *flow = dev_flow->flow;
7007         uint64_t item_flags = 0;
7008         uint64_t last_item = 0;
7009         uint64_t action_flags = 0;
7010         uint64_t priority = attr->priority;
7011         struct mlx5_flow_dv_matcher matcher = {
7012                 .mask = {
7013                         .size = sizeof(matcher.mask.buf),
7014                 },
7015         };
7016         int actions_n = 0;
7017         bool actions_end = false;
7018         union {
7019                 struct mlx5_flow_dv_modify_hdr_resource res;
7020                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7021                             sizeof(struct mlx5_modification_cmd) *
7022                             (MLX5_MAX_MODIFY_NUM + 1)];
7023         } mhdr_dummy;
7024         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7025         union flow_dv_attr flow_attr = { .attr = 0 };
7026         uint32_t tag_be;
7027         union mlx5_flow_tbl_key tbl_key;
7028         uint32_t modify_action_position = UINT32_MAX;
7029         void *match_mask = matcher.mask.buf;
7030         void *match_value = dev_flow->dv.value.buf;
7031         uint8_t next_protocol = 0xff;
7032         struct rte_vlan_hdr vlan = { 0 };
7033         uint32_t table;
7034         int ret = 0;
7035
7036         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7037                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7038         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7039                                        &table, error);
7040         if (ret)
7041                 return ret;
7042         dev_flow->group = table;
7043         if (attr->transfer)
7044                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7045         if (priority == MLX5_FLOW_PRIO_RSVD)
7046                 priority = dev_conf->flow_prio - 1;
7047         /* number of actions must be set to 0 in case of dirty stack. */
7048         mhdr_res->actions_num = 0;
7049         for (; !actions_end ; actions++) {
7050                 const struct rte_flow_action_queue *queue;
7051                 const struct rte_flow_action_rss *rss;
7052                 const struct rte_flow_action *action = actions;
7053                 const struct rte_flow_action_count *count = action->conf;
7054                 const uint8_t *rss_key;
7055                 const struct rte_flow_action_jump *jump_data;
7056                 const struct rte_flow_action_meter *mtr;
7057                 struct mlx5_flow_tbl_resource *tbl;
7058                 uint32_t port_id = 0;
7059                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7060                 int action_type = actions->type;
7061                 const struct rte_flow_action *found_action = NULL;
7062
7063                 switch (action_type) {
7064                 case RTE_FLOW_ACTION_TYPE_VOID:
7065                         break;
7066                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7067                         if (flow_dv_translate_action_port_id(dev, action,
7068                                                              &port_id, error))
7069                                 return -rte_errno;
7070                         port_id_resource.port_id = port_id;
7071                         if (flow_dv_port_id_action_resource_register
7072                             (dev, &port_id_resource, dev_flow, error))
7073                                 return -rte_errno;
7074                         dev_flow->dv.actions[actions_n++] =
7075                                 dev_flow->dv.port_id_action->action;
7076                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7077                         break;
7078                 case RTE_FLOW_ACTION_TYPE_FLAG:
7079                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7080                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7081                                 struct rte_flow_action_mark mark = {
7082                                         .id = MLX5_FLOW_MARK_DEFAULT,
7083                                 };
7084
7085                                 if (flow_dv_convert_action_mark(dev, &mark,
7086                                                                 mhdr_res,
7087                                                                 error))
7088                                         return -rte_errno;
7089                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7090                                 break;
7091                         }
7092                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7093                         if (!dev_flow->dv.tag_resource)
7094                                 if (flow_dv_tag_resource_register
7095                                     (dev, tag_be, dev_flow, error))
7096                                         return -rte_errno;
7097                         dev_flow->dv.actions[actions_n++] =
7098                                 dev_flow->dv.tag_resource->action;
7099                         break;
7100                 case RTE_FLOW_ACTION_TYPE_MARK:
7101                         action_flags |= MLX5_FLOW_ACTION_MARK;
7102                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7103                                 const struct rte_flow_action_mark *mark =
7104                                         (const struct rte_flow_action_mark *)
7105                                                 actions->conf;
7106
7107                                 if (flow_dv_convert_action_mark(dev, mark,
7108                                                                 mhdr_res,
7109                                                                 error))
7110                                         return -rte_errno;
7111                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7112                                 break;
7113                         }
7114                         /* Fall-through */
7115                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7116                         /* Legacy (non-extensive) MARK action. */
7117                         tag_be = mlx5_flow_mark_set
7118                               (((const struct rte_flow_action_mark *)
7119                                (actions->conf))->id);
7120                         if (!dev_flow->dv.tag_resource)
7121                                 if (flow_dv_tag_resource_register
7122                                     (dev, tag_be, dev_flow, error))
7123                                         return -rte_errno;
7124                         dev_flow->dv.actions[actions_n++] =
7125                                 dev_flow->dv.tag_resource->action;
7126                         break;
7127                 case RTE_FLOW_ACTION_TYPE_SET_META:
7128                         if (flow_dv_convert_action_set_meta
7129                                 (dev, mhdr_res, attr,
7130                                  (const struct rte_flow_action_set_meta *)
7131                                   actions->conf, error))
7132                                 return -rte_errno;
7133                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7134                         break;
7135                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7136                         if (flow_dv_convert_action_set_tag
7137                                 (dev, mhdr_res,
7138                                  (const struct rte_flow_action_set_tag *)
7139                                   actions->conf, error))
7140                                 return -rte_errno;
7141                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7142                         break;
7143                 case RTE_FLOW_ACTION_TYPE_DROP:
7144                         action_flags |= MLX5_FLOW_ACTION_DROP;
7145                         break;
7146                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7147                         assert(flow->rss.queue);
7148                         queue = actions->conf;
7149                         flow->rss.queue_num = 1;
7150                         (*flow->rss.queue)[0] = queue->index;
7151                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7152                         break;
7153                 case RTE_FLOW_ACTION_TYPE_RSS:
7154                         assert(flow->rss.queue);
7155                         rss = actions->conf;
7156                         if (flow->rss.queue)
7157                                 memcpy((*flow->rss.queue), rss->queue,
7158                                        rss->queue_num * sizeof(uint16_t));
7159                         flow->rss.queue_num = rss->queue_num;
7160                         /* NULL RSS key indicates default RSS key. */
7161                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7162                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7163                         /*
7164                          * rss->level and rss.types should be set in advance
7165                          * when expanding items for RSS.
7166                          */
7167                         action_flags |= MLX5_FLOW_ACTION_RSS;
7168                         break;
7169                 case RTE_FLOW_ACTION_TYPE_COUNT:
7170                         if (!dev_conf->devx) {
7171                                 rte_errno = ENOTSUP;
7172                                 goto cnt_err;
7173                         }
7174                         flow->counter = flow_dv_counter_alloc(dev,
7175                                                               count->shared,
7176                                                               count->id,
7177                                                               dev_flow->group);
7178                         if (flow->counter == NULL)
7179                                 goto cnt_err;
7180                         dev_flow->dv.actions[actions_n++] =
7181                                 flow->counter->action;
7182                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7183                         break;
7184 cnt_err:
7185                         if (rte_errno == ENOTSUP)
7186                                 return rte_flow_error_set
7187                                               (error, ENOTSUP,
7188                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7189                                                NULL,
7190                                                "count action not supported");
7191                         else
7192                                 return rte_flow_error_set
7193                                                 (error, rte_errno,
7194                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7195                                                  action,
7196                                                  "cannot create counter"
7197                                                   " object.");
7198                         break;
7199                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7200                         dev_flow->dv.actions[actions_n++] =
7201                                                 priv->sh->pop_vlan_action;
7202                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7203                         break;
7204                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7205                         flow_dev_get_vlan_info_from_items(items, &vlan);
7206                         vlan.eth_proto = rte_be_to_cpu_16
7207                              ((((const struct rte_flow_action_of_push_vlan *)
7208                                                    actions->conf)->ethertype));
7209                         found_action = mlx5_flow_find_action
7210                                         (actions + 1,
7211                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7212                         if (found_action)
7213                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7214                         found_action = mlx5_flow_find_action
7215                                         (actions + 1,
7216                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7217                         if (found_action)
7218                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7219                         if (flow_dv_create_action_push_vlan
7220                                             (dev, attr, &vlan, dev_flow, error))
7221                                 return -rte_errno;
7222                         dev_flow->dv.actions[actions_n++] =
7223                                            dev_flow->dv.push_vlan_res->action;
7224                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7225                         break;
7226                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7227                         /* of_vlan_push action handled this action */
7228                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7229                         break;
7230                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7231                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7232                                 break;
7233                         flow_dev_get_vlan_info_from_items(items, &vlan);
7234                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7235                         /* If no VLAN push - this is a modify header action */
7236                         if (flow_dv_convert_action_modify_vlan_vid
7237                                                 (mhdr_res, actions, error))
7238                                 return -rte_errno;
7239                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7240                         break;
7241                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7242                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7243                         if (flow_dv_create_action_l2_encap(dev, actions,
7244                                                            dev_flow,
7245                                                            attr->transfer,
7246                                                            error))
7247                                 return -rte_errno;
7248                         dev_flow->dv.actions[actions_n++] =
7249                                 dev_flow->dv.encap_decap->verbs_action;
7250                         action_flags |= actions->type ==
7251                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
7252                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
7253                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
7254                         break;
7255                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7256                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7257                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7258                                                            attr->transfer,
7259                                                            error))
7260                                 return -rte_errno;
7261                         dev_flow->dv.actions[actions_n++] =
7262                                 dev_flow->dv.encap_decap->verbs_action;
7263                         action_flags |= actions->type ==
7264                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
7265                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
7266                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
7267                         break;
7268                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7269                         /* Handle encap with preceding decap. */
7270                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
7271                                 if (flow_dv_create_action_raw_encap
7272                                         (dev, actions, dev_flow, attr, error))
7273                                         return -rte_errno;
7274                                 dev_flow->dv.actions[actions_n++] =
7275                                         dev_flow->dv.encap_decap->verbs_action;
7276                         } else {
7277                                 /* Handle encap without preceding decap. */
7278                                 if (flow_dv_create_action_l2_encap
7279                                     (dev, actions, dev_flow, attr->transfer,
7280                                      error))
7281                                         return -rte_errno;
7282                                 dev_flow->dv.actions[actions_n++] =
7283                                         dev_flow->dv.encap_decap->verbs_action;
7284                         }
7285                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
7286                         break;
7287                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7288                         /* Check if this decap is followed by encap. */
7289                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
7290                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
7291                                action++) {
7292                         }
7293                         /* Handle decap only if it isn't followed by encap. */
7294                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7295                                 if (flow_dv_create_action_l2_decap
7296                                     (dev, dev_flow, attr->transfer, error))
7297                                         return -rte_errno;
7298                                 dev_flow->dv.actions[actions_n++] =
7299                                         dev_flow->dv.encap_decap->verbs_action;
7300                         }
7301                         /* If decap is followed by encap, handle it at encap. */
7302                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
7303                         break;
7304                 case RTE_FLOW_ACTION_TYPE_JUMP:
7305                         jump_data = action->conf;
7306                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7307                                                        jump_data->group, &table,
7308                                                        error);
7309                         if (ret)
7310                                 return ret;
7311                         tbl = flow_dv_tbl_resource_get(dev, table,
7312                                                        attr->egress,
7313                                                        attr->transfer, error);
7314                         if (!tbl)
7315                                 return rte_flow_error_set
7316                                                 (error, errno,
7317                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7318                                                  NULL,
7319                                                  "cannot create jump action.");
7320                         if (flow_dv_jump_tbl_resource_register
7321                             (dev, tbl, dev_flow, error)) {
7322                                 flow_dv_tbl_resource_release(dev, tbl);
7323                                 return rte_flow_error_set
7324                                                 (error, errno,
7325                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7326                                                  NULL,
7327                                                  "cannot create jump action.");
7328                         }
7329                         dev_flow->dv.actions[actions_n++] =
7330                                 dev_flow->dv.jump->action;
7331                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7332                         break;
7333                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7334                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7335                         if (flow_dv_convert_action_modify_mac
7336                                         (mhdr_res, actions, error))
7337                                 return -rte_errno;
7338                         action_flags |= actions->type ==
7339                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7340                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7341                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7342                         break;
7343                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7344                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7345                         if (flow_dv_convert_action_modify_ipv4
7346                                         (mhdr_res, actions, error))
7347                                 return -rte_errno;
7348                         action_flags |= actions->type ==
7349                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7350                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7351                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7352                         break;
7353                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7354                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7355                         if (flow_dv_convert_action_modify_ipv6
7356                                         (mhdr_res, actions, error))
7357                                 return -rte_errno;
7358                         action_flags |= actions->type ==
7359                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7360                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7361                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7362                         break;
7363                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7364                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7365                         if (flow_dv_convert_action_modify_tp
7366                                         (mhdr_res, actions, items,
7367                                          &flow_attr, error))
7368                                 return -rte_errno;
7369                         action_flags |= actions->type ==
7370                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7371                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7372                                         MLX5_FLOW_ACTION_SET_TP_DST;
7373                         break;
7374                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7375                         if (flow_dv_convert_action_modify_dec_ttl
7376                                         (mhdr_res, items, &flow_attr, error))
7377                                 return -rte_errno;
7378                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7379                         break;
7380                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7381                         if (flow_dv_convert_action_modify_ttl
7382                                         (mhdr_res, actions, items,
7383                                          &flow_attr, error))
7384                                 return -rte_errno;
7385                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7386                         break;
7387                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7388                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7389                         if (flow_dv_convert_action_modify_tcp_seq
7390                                         (mhdr_res, actions, error))
7391                                 return -rte_errno;
7392                         action_flags |= actions->type ==
7393                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7394                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7395                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7396                         break;
7397
7398                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7399                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7400                         if (flow_dv_convert_action_modify_tcp_ack
7401                                         (mhdr_res, actions, error))
7402                                 return -rte_errno;
7403                         action_flags |= actions->type ==
7404                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7405                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7406                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7407                         break;
7408                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7409                         if (flow_dv_convert_action_set_reg
7410                                         (mhdr_res, actions, error))
7411                                 return -rte_errno;
7412                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7413                         break;
7414                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7415                         if (flow_dv_convert_action_copy_mreg
7416                                         (dev, mhdr_res, actions, error))
7417                                 return -rte_errno;
7418                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7419                         break;
7420                 case RTE_FLOW_ACTION_TYPE_METER:
7421                         mtr = actions->conf;
7422                         if (!flow->meter) {
7423                                 flow->meter = mlx5_flow_meter_attach(priv,
7424                                                         mtr->mtr_id, attr,
7425                                                         error);
7426                                 if (!flow->meter)
7427                                         return rte_flow_error_set(error,
7428                                                 rte_errno,
7429                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7430                                                 NULL,
7431                                                 "meter not found "
7432                                                 "or invalid parameters");
7433                         }
7434                         /* Set the meter action. */
7435                         dev_flow->dv.actions[actions_n++] =
7436                                 flow->meter->mfts->meter_action;
7437                         action_flags |= MLX5_FLOW_ACTION_METER;
7438                         break;
7439                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7440                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7441                                                               actions, error))
7442                                 return -rte_errno;
7443                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7444                         break;
7445                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7446                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7447                                                               actions, error))
7448                                 return -rte_errno;
7449                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7450                         break;
7451                 case RTE_FLOW_ACTION_TYPE_END:
7452                         actions_end = true;
7453                         if (mhdr_res->actions_num) {
7454                                 /* create modify action if needed. */
7455                                 if (flow_dv_modify_hdr_resource_register
7456                                         (dev, mhdr_res, dev_flow, error))
7457                                         return -rte_errno;
7458                                 dev_flow->dv.actions[modify_action_position] =
7459                                         dev_flow->dv.modify_hdr->verbs_action;
7460                         }
7461                         break;
7462                 default:
7463                         break;
7464                 }
7465                 if (mhdr_res->actions_num &&
7466                     modify_action_position == UINT32_MAX)
7467                         modify_action_position = actions_n++;
7468         }
7469         dev_flow->dv.actions_n = actions_n;
7470         dev_flow->actions = action_flags;
7471         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7472                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7473                 int item_type = items->type;
7474
7475                 switch (item_type) {
7476                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7477                         flow_dv_translate_item_port_id(dev, match_mask,
7478                                                        match_value, items);
7479                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7480                         break;
7481                 case RTE_FLOW_ITEM_TYPE_ETH:
7482                         flow_dv_translate_item_eth(match_mask, match_value,
7483                                                    items, tunnel);
7484                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7485                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7486                                              MLX5_FLOW_LAYER_OUTER_L2;
7487                         break;
7488                 case RTE_FLOW_ITEM_TYPE_VLAN:
7489                         flow_dv_translate_item_vlan(dev_flow,
7490                                                     match_mask, match_value,
7491                                                     items, tunnel);
7492                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7493                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7494                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7495                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7496                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7497                         break;
7498                 case RTE_FLOW_ITEM_TYPE_IPV4:
7499                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7500                                                   &item_flags, &tunnel);
7501                         flow_dv_translate_item_ipv4(match_mask, match_value,
7502                                                     items, tunnel,
7503                                                     dev_flow->group);
7504                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7505                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7506                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7507                         if (items->mask != NULL &&
7508                             ((const struct rte_flow_item_ipv4 *)
7509                              items->mask)->hdr.next_proto_id) {
7510                                 next_protocol =
7511                                         ((const struct rte_flow_item_ipv4 *)
7512                                          (items->spec))->hdr.next_proto_id;
7513                                 next_protocol &=
7514                                         ((const struct rte_flow_item_ipv4 *)
7515                                          (items->mask))->hdr.next_proto_id;
7516                         } else {
7517                                 /* Reset for inner layer. */
7518                                 next_protocol = 0xff;
7519                         }
7520                         break;
7521                 case RTE_FLOW_ITEM_TYPE_IPV6:
7522                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7523                                                   &item_flags, &tunnel);
7524                         flow_dv_translate_item_ipv6(match_mask, match_value,
7525                                                     items, tunnel,
7526                                                     dev_flow->group);
7527                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7528                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7529                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7530                         if (items->mask != NULL &&
7531                             ((const struct rte_flow_item_ipv6 *)
7532                              items->mask)->hdr.proto) {
7533                                 next_protocol =
7534                                         ((const struct rte_flow_item_ipv6 *)
7535                                          items->spec)->hdr.proto;
7536                                 next_protocol &=
7537                                         ((const struct rte_flow_item_ipv6 *)
7538                                          items->mask)->hdr.proto;
7539                         } else {
7540                                 /* Reset for inner layer. */
7541                                 next_protocol = 0xff;
7542                         }
7543                         break;
7544                 case RTE_FLOW_ITEM_TYPE_TCP:
7545                         flow_dv_translate_item_tcp(match_mask, match_value,
7546                                                    items, tunnel);
7547                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7548                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7549                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7550                         break;
7551                 case RTE_FLOW_ITEM_TYPE_UDP:
7552                         flow_dv_translate_item_udp(match_mask, match_value,
7553                                                    items, tunnel);
7554                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7555                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7556                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7557                         break;
7558                 case RTE_FLOW_ITEM_TYPE_GRE:
7559                         flow_dv_translate_item_gre(match_mask, match_value,
7560                                                    items, tunnel);
7561                         last_item = MLX5_FLOW_LAYER_GRE;
7562                         break;
7563                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7564                         flow_dv_translate_item_gre_key(match_mask,
7565                                                        match_value, items);
7566                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7567                         break;
7568                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7569                         flow_dv_translate_item_nvgre(match_mask, match_value,
7570                                                      items, tunnel);
7571                         last_item = MLX5_FLOW_LAYER_GRE;
7572                         break;
7573                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7574                         flow_dv_translate_item_vxlan(match_mask, match_value,
7575                                                      items, tunnel);
7576                         last_item = MLX5_FLOW_LAYER_VXLAN;
7577                         break;
7578                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7579                         flow_dv_translate_item_vxlan(match_mask, match_value,
7580                                                      items, tunnel);
7581                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7582                         break;
7583                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7584                         flow_dv_translate_item_geneve(match_mask, match_value,
7585                                                       items, tunnel);
7586                         last_item = MLX5_FLOW_LAYER_GENEVE;
7587                         break;
7588                 case RTE_FLOW_ITEM_TYPE_MPLS:
7589                         flow_dv_translate_item_mpls(match_mask, match_value,
7590                                                     items, last_item, tunnel);
7591                         last_item = MLX5_FLOW_LAYER_MPLS;
7592                         break;
7593                 case RTE_FLOW_ITEM_TYPE_MARK:
7594                         flow_dv_translate_item_mark(dev, match_mask,
7595                                                     match_value, items);
7596                         last_item = MLX5_FLOW_ITEM_MARK;
7597                         break;
7598                 case RTE_FLOW_ITEM_TYPE_META:
7599                         flow_dv_translate_item_meta(dev, match_mask,
7600                                                     match_value, attr, items);
7601                         last_item = MLX5_FLOW_ITEM_METADATA;
7602                         break;
7603                 case RTE_FLOW_ITEM_TYPE_ICMP:
7604                         flow_dv_translate_item_icmp(match_mask, match_value,
7605                                                     items, tunnel);
7606                         last_item = MLX5_FLOW_LAYER_ICMP;
7607                         break;
7608                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7609                         flow_dv_translate_item_icmp6(match_mask, match_value,
7610                                                       items, tunnel);
7611                         last_item = MLX5_FLOW_LAYER_ICMP6;
7612                         break;
7613                 case RTE_FLOW_ITEM_TYPE_TAG:
7614                         flow_dv_translate_item_tag(dev, match_mask,
7615                                                    match_value, items);
7616                         last_item = MLX5_FLOW_ITEM_TAG;
7617                         break;
7618                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7619                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7620                                                         match_value, items);
7621                         last_item = MLX5_FLOW_ITEM_TAG;
7622                         break;
7623                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7624                         flow_dv_translate_item_tx_queue(dev, match_mask,
7625                                                         match_value,
7626                                                         items);
7627                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7628                         break;
7629                 case RTE_FLOW_ITEM_TYPE_GTP:
7630                         flow_dv_translate_item_gtp(match_mask, match_value,
7631                                                    items, tunnel);
7632                         last_item = MLX5_FLOW_LAYER_GTP;
7633                         break;
7634                 default:
7635                         break;
7636                 }
7637                 item_flags |= last_item;
7638         }
7639         /*
7640          * In case of ingress traffic when E-Switch mode is enabled,
7641          * we have two cases where we need to set the source port manually.
7642          * The first one, is in case of Nic steering rule, and the second is
7643          * E-Switch rule where no port_id item was found. In both cases
7644          * the source port is set according the current port in use.
7645          */
7646         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7647             (priv->representor || priv->master)) {
7648                 if (flow_dv_translate_item_port_id(dev, match_mask,
7649                                                    match_value, NULL))
7650                         return -rte_errno;
7651         }
7652         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7653                                          dev_flow->dv.value.buf));
7654         dev_flow->layers = item_flags;
7655         if (action_flags & MLX5_FLOW_ACTION_RSS)
7656                 flow_dv_hashfields_set(dev_flow);
7657         /* Register matcher. */
7658         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7659                                     matcher.mask.size);
7660         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7661                                                      matcher.priority);
7662         /* reserved field no needs to be set to 0 here. */
7663         tbl_key.domain = attr->transfer;
7664         tbl_key.direction = attr->egress;
7665         tbl_key.table_id = dev_flow->group;
7666         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7667                 return -rte_errno;
7668         return 0;
7669 }
7670
7671 /**
7672  * Apply the flow to the NIC, lock free,
7673  * (mutex should be acquired by caller).
7674  *
7675  * @param[in] dev
7676  *   Pointer to the Ethernet device structure.
7677  * @param[in, out] flow
7678  *   Pointer to flow structure.
7679  * @param[out] error
7680  *   Pointer to error structure.
7681  *
7682  * @return
7683  *   0 on success, a negative errno value otherwise and rte_errno is set.
7684  */
7685 static int
7686 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7687                 struct rte_flow_error *error)
7688 {
7689         struct mlx5_flow_dv *dv;
7690         struct mlx5_flow *dev_flow;
7691         struct mlx5_priv *priv = dev->data->dev_private;
7692         int n;
7693         int err;
7694
7695         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7696                 dv = &dev_flow->dv;
7697                 n = dv->actions_n;
7698                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7699                         if (dev_flow->transfer) {
7700                                 dv->actions[n++] = priv->sh->esw_drop_action;
7701                         } else {
7702                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7703                                 if (!dv->hrxq) {
7704                                         rte_flow_error_set
7705                                                 (error, errno,
7706                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7707                                                  NULL,
7708                                                  "cannot get drop hash queue");
7709                                         goto error;
7710                                 }
7711                                 dv->actions[n++] = dv->hrxq->action;
7712                         }
7713                 } else if (dev_flow->actions &
7714                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7715                         struct mlx5_hrxq *hrxq;
7716
7717                         assert(flow->rss.queue);
7718                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7719                                              MLX5_RSS_HASH_KEY_LEN,
7720                                              dev_flow->hash_fields,
7721                                              (*flow->rss.queue),
7722                                              flow->rss.queue_num);
7723                         if (!hrxq) {
7724                                 hrxq = mlx5_hrxq_new
7725                                         (dev, flow->rss.key,
7726                                          MLX5_RSS_HASH_KEY_LEN,
7727                                          dev_flow->hash_fields,
7728                                          (*flow->rss.queue),
7729                                          flow->rss.queue_num,
7730                                          !!(dev_flow->layers &
7731                                             MLX5_FLOW_LAYER_TUNNEL));
7732                         }
7733                         if (!hrxq) {
7734                                 rte_flow_error_set
7735                                         (error, rte_errno,
7736                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7737                                          "cannot get hash queue");
7738                                 goto error;
7739                         }
7740                         dv->hrxq = hrxq;
7741                         dv->actions[n++] = dv->hrxq->action;
7742                 }
7743                 dv->flow =
7744                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7745                                                   (void *)&dv->value, n,
7746                                                   dv->actions);
7747                 if (!dv->flow) {
7748                         rte_flow_error_set(error, errno,
7749                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7750                                            NULL,
7751                                            "hardware refuses to create flow");
7752                         goto error;
7753                 }
7754                 if (priv->vmwa_context &&
7755                     dev_flow->dv.vf_vlan.tag &&
7756                     !dev_flow->dv.vf_vlan.created) {
7757                         /*
7758                          * The rule contains the VLAN pattern.
7759                          * For VF we are going to create VLAN
7760                          * interface to make hypervisor set correct
7761                          * e-Switch vport context.
7762                          */
7763                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7764                 }
7765         }
7766         return 0;
7767 error:
7768         err = rte_errno; /* Save rte_errno before cleanup. */
7769         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7770                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7771                 if (dv->hrxq) {
7772                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7773                                 mlx5_hrxq_drop_release(dev);
7774                         else
7775                                 mlx5_hrxq_release(dev, dv->hrxq);
7776                         dv->hrxq = NULL;
7777                 }
7778                 if (dev_flow->dv.vf_vlan.tag &&
7779                     dev_flow->dv.vf_vlan.created)
7780                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7781         }
7782         rte_errno = err; /* Restore rte_errno. */
7783         return -rte_errno;
7784 }
7785
7786 /**
7787  * Release the flow matcher.
7788  *
7789  * @param dev
7790  *   Pointer to Ethernet device.
7791  * @param flow
7792  *   Pointer to mlx5_flow.
7793  *
7794  * @return
7795  *   1 while a reference on it exists, 0 when freed.
7796  */
7797 static int
7798 flow_dv_matcher_release(struct rte_eth_dev *dev,
7799                         struct mlx5_flow *flow)
7800 {
7801         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7802
7803         assert(matcher->matcher_object);
7804         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7805                 dev->data->port_id, (void *)matcher,
7806                 rte_atomic32_read(&matcher->refcnt));
7807         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7808                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7809                            (matcher->matcher_object));
7810                 LIST_REMOVE(matcher, next);
7811                 /* table ref-- in release interface. */
7812                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7813                 rte_free(matcher);
7814                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7815                         dev->data->port_id, (void *)matcher);
7816                 return 0;
7817         }
7818         return 1;
7819 }
7820
7821 /**
7822  * Release an encap/decap resource.
7823  *
7824  * @param flow
7825  *   Pointer to mlx5_flow.
7826  *
7827  * @return
7828  *   1 while a reference on it exists, 0 when freed.
7829  */
7830 static int
7831 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7832 {
7833         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7834                                                 flow->dv.encap_decap;
7835
7836         assert(cache_resource->verbs_action);
7837         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7838                 (void *)cache_resource,
7839                 rte_atomic32_read(&cache_resource->refcnt));
7840         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7841                 claim_zero(mlx5_glue->destroy_flow_action
7842                                 (cache_resource->verbs_action));
7843                 LIST_REMOVE(cache_resource, next);
7844                 rte_free(cache_resource);
7845                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7846                         (void *)cache_resource);
7847                 return 0;
7848         }
7849         return 1;
7850 }
7851
7852 /**
7853  * Release an jump to table action resource.
7854  *
7855  * @param dev
7856  *   Pointer to Ethernet device.
7857  * @param flow
7858  *   Pointer to mlx5_flow.
7859  *
7860  * @return
7861  *   1 while a reference on it exists, 0 when freed.
7862  */
7863 static int
7864 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7865                                   struct mlx5_flow *flow)
7866 {
7867         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7868         struct mlx5_flow_tbl_data_entry *tbl_data =
7869                         container_of(cache_resource,
7870                                      struct mlx5_flow_tbl_data_entry, jump);
7871
7872         assert(cache_resource->action);
7873         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7874                 (void *)cache_resource,
7875                 rte_atomic32_read(&cache_resource->refcnt));
7876         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7877                 claim_zero(mlx5_glue->destroy_flow_action
7878                                 (cache_resource->action));
7879                 /* jump action memory free is inside the table release. */
7880                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7881                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7882                         (void *)cache_resource);
7883                 return 0;
7884         }
7885         return 1;
7886 }
7887
7888 /**
7889  * Release a modify-header resource.
7890  *
7891  * @param flow
7892  *   Pointer to mlx5_flow.
7893  *
7894  * @return
7895  *   1 while a reference on it exists, 0 when freed.
7896  */
7897 static int
7898 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7899 {
7900         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7901                                                 flow->dv.modify_hdr;
7902
7903         assert(cache_resource->verbs_action);
7904         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7905                 (void *)cache_resource,
7906                 rte_atomic32_read(&cache_resource->refcnt));
7907         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7908                 claim_zero(mlx5_glue->destroy_flow_action
7909                                 (cache_resource->verbs_action));
7910                 LIST_REMOVE(cache_resource, next);
7911                 rte_free(cache_resource);
7912                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7913                         (void *)cache_resource);
7914                 return 0;
7915         }
7916         return 1;
7917 }
7918
7919 /**
7920  * Release port ID action resource.
7921  *
7922  * @param flow
7923  *   Pointer to mlx5_flow.
7924  *
7925  * @return
7926  *   1 while a reference on it exists, 0 when freed.
7927  */
7928 static int
7929 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7930 {
7931         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7932                 flow->dv.port_id_action;
7933
7934         assert(cache_resource->action);
7935         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7936                 (void *)cache_resource,
7937                 rte_atomic32_read(&cache_resource->refcnt));
7938         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7939                 claim_zero(mlx5_glue->destroy_flow_action
7940                                 (cache_resource->action));
7941                 LIST_REMOVE(cache_resource, next);
7942                 rte_free(cache_resource);
7943                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7944                         (void *)cache_resource);
7945                 return 0;
7946         }
7947         return 1;
7948 }
7949
7950 /**
7951  * Release push vlan action resource.
7952  *
7953  * @param flow
7954  *   Pointer to mlx5_flow.
7955  *
7956  * @return
7957  *   1 while a reference on it exists, 0 when freed.
7958  */
7959 static int
7960 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7961 {
7962         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7963                 flow->dv.push_vlan_res;
7964
7965         assert(cache_resource->action);
7966         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7967                 (void *)cache_resource,
7968                 rte_atomic32_read(&cache_resource->refcnt));
7969         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7970                 claim_zero(mlx5_glue->destroy_flow_action
7971                                 (cache_resource->action));
7972                 LIST_REMOVE(cache_resource, next);
7973                 rte_free(cache_resource);
7974                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7975                         (void *)cache_resource);
7976                 return 0;
7977         }
7978         return 1;
7979 }
7980
7981 /**
7982  * Remove the flow from the NIC but keeps it in memory.
7983  * Lock free, (mutex should be acquired by caller).
7984  *
7985  * @param[in] dev
7986  *   Pointer to Ethernet device.
7987  * @param[in, out] flow
7988  *   Pointer to flow structure.
7989  */
7990 static void
7991 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7992 {
7993         struct mlx5_flow_dv *dv;
7994         struct mlx5_flow *dev_flow;
7995
7996         if (!flow)
7997                 return;
7998         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7999                 dv = &dev_flow->dv;
8000                 if (dv->flow) {
8001                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
8002                         dv->flow = NULL;
8003                 }
8004                 if (dv->hrxq) {
8005                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8006                                 mlx5_hrxq_drop_release(dev);
8007                         else
8008                                 mlx5_hrxq_release(dev, dv->hrxq);
8009                         dv->hrxq = NULL;
8010                 }
8011                 if (dev_flow->dv.vf_vlan.tag &&
8012                     dev_flow->dv.vf_vlan.created)
8013                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8014         }
8015 }
8016
8017 /**
8018  * Remove the flow from the NIC and the memory.
8019  * Lock free, (mutex should be acquired by caller).
8020  *
8021  * @param[in] dev
8022  *   Pointer to the Ethernet device structure.
8023  * @param[in, out] flow
8024  *   Pointer to flow structure.
8025  */
8026 static void
8027 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8028 {
8029         struct mlx5_flow *dev_flow;
8030
8031         if (!flow)
8032                 return;
8033         __flow_dv_remove(dev, flow);
8034         if (flow->counter) {
8035                 flow_dv_counter_release(dev, flow->counter);
8036                 flow->counter = NULL;
8037         }
8038         if (flow->meter) {
8039                 mlx5_flow_meter_detach(flow->meter);
8040                 flow->meter = NULL;
8041         }
8042         while (!LIST_EMPTY(&flow->dev_flows)) {
8043                 dev_flow = LIST_FIRST(&flow->dev_flows);
8044                 LIST_REMOVE(dev_flow, next);
8045                 if (dev_flow->dv.matcher)
8046                         flow_dv_matcher_release(dev, dev_flow);
8047                 if (dev_flow->dv.encap_decap)
8048                         flow_dv_encap_decap_resource_release(dev_flow);
8049                 if (dev_flow->dv.modify_hdr)
8050                         flow_dv_modify_hdr_resource_release(dev_flow);
8051                 if (dev_flow->dv.jump)
8052                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8053                 if (dev_flow->dv.port_id_action)
8054                         flow_dv_port_id_action_resource_release(dev_flow);
8055                 if (dev_flow->dv.push_vlan_res)
8056                         flow_dv_push_vlan_action_resource_release(dev_flow);
8057                 if (dev_flow->dv.tag_resource)
8058                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8059                 rte_free(dev_flow);
8060         }
8061 }
8062
8063 /**
8064  * Query a dv flow  rule for its statistics via devx.
8065  *
8066  * @param[in] dev
8067  *   Pointer to Ethernet device.
8068  * @param[in] flow
8069  *   Pointer to the sub flow.
8070  * @param[out] data
8071  *   data retrieved by the query.
8072  * @param[out] error
8073  *   Perform verbose error reporting if not NULL.
8074  *
8075  * @return
8076  *   0 on success, a negative errno value otherwise and rte_errno is set.
8077  */
8078 static int
8079 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8080                     void *data, struct rte_flow_error *error)
8081 {
8082         struct mlx5_priv *priv = dev->data->dev_private;
8083         struct rte_flow_query_count *qc = data;
8084
8085         if (!priv->config.devx)
8086                 return rte_flow_error_set(error, ENOTSUP,
8087                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8088                                           NULL,
8089                                           "counters are not supported");
8090         if (flow->counter) {
8091                 uint64_t pkts, bytes;
8092                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8093                                                &bytes);
8094
8095                 if (err)
8096                         return rte_flow_error_set(error, -err,
8097                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8098                                         NULL, "cannot read counters");
8099                 qc->hits_set = 1;
8100                 qc->bytes_set = 1;
8101                 qc->hits = pkts - flow->counter->hits;
8102                 qc->bytes = bytes - flow->counter->bytes;
8103                 if (qc->reset) {
8104                         flow->counter->hits = pkts;
8105                         flow->counter->bytes = bytes;
8106                 }
8107                 return 0;
8108         }
8109         return rte_flow_error_set(error, EINVAL,
8110                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8111                                   NULL,
8112                                   "counters are not available");
8113 }
8114
8115 /**
8116  * Query a flow.
8117  *
8118  * @see rte_flow_query()
8119  * @see rte_flow_ops
8120  */
8121 static int
8122 flow_dv_query(struct rte_eth_dev *dev,
8123               struct rte_flow *flow __rte_unused,
8124               const struct rte_flow_action *actions __rte_unused,
8125               void *data __rte_unused,
8126               struct rte_flow_error *error __rte_unused)
8127 {
8128         int ret = -EINVAL;
8129
8130         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8131                 switch (actions->type) {
8132                 case RTE_FLOW_ACTION_TYPE_VOID:
8133                         break;
8134                 case RTE_FLOW_ACTION_TYPE_COUNT:
8135                         ret = flow_dv_query_count(dev, flow, data, error);
8136                         break;
8137                 default:
8138                         return rte_flow_error_set(error, ENOTSUP,
8139                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8140                                                   actions,
8141                                                   "action not supported");
8142                 }
8143         }
8144         return ret;
8145 }
8146
8147 /**
8148  * Destroy the meter table set.
8149  * Lock free, (mutex should be acquired by caller).
8150  *
8151  * @param[in] dev
8152  *   Pointer to Ethernet device.
8153  * @param[in] tbl
8154  *   Pointer to the meter table set.
8155  *
8156  * @return
8157  *   Always 0.
8158  */
8159 static int
8160 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8161                         struct mlx5_meter_domains_infos *tbl)
8162 {
8163         struct mlx5_priv *priv = dev->data->dev_private;
8164         struct mlx5_meter_domains_infos *mtd =
8165                                 (struct mlx5_meter_domains_infos *)tbl;
8166
8167         if (!mtd || !priv->config.dv_flow_en)
8168                 return 0;
8169         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8170                 claim_zero(mlx5_glue->dv_destroy_flow
8171                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8172         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8173                 claim_zero(mlx5_glue->dv_destroy_flow
8174                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8175         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8176                 claim_zero(mlx5_glue->dv_destroy_flow
8177                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8178         if (mtd->egress.color_matcher)
8179                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8180                           (mtd->egress.color_matcher));
8181         if (mtd->egress.any_matcher)
8182                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8183                           (mtd->egress.any_matcher));
8184         if (mtd->egress.tbl)
8185                 claim_zero(flow_dv_tbl_resource_release(dev,
8186                                                         mtd->egress.tbl));
8187         if (mtd->ingress.color_matcher)
8188                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8189                           (mtd->ingress.color_matcher));
8190         if (mtd->ingress.any_matcher)
8191                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8192                           (mtd->ingress.any_matcher));
8193         if (mtd->ingress.tbl)
8194                 claim_zero(flow_dv_tbl_resource_release(dev,
8195                                                         mtd->ingress.tbl));
8196         if (mtd->transfer.color_matcher)
8197                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8198                           (mtd->transfer.color_matcher));
8199         if (mtd->transfer.any_matcher)
8200                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8201                           (mtd->transfer.any_matcher));
8202         if (mtd->transfer.tbl)
8203                 claim_zero(flow_dv_tbl_resource_release(dev,
8204                                                         mtd->transfer.tbl));
8205         if (mtd->drop_actn)
8206                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8207         rte_free(mtd);
8208         return 0;
8209 }
8210
8211 /* Number of meter flow actions, count and jump or count and drop. */
8212 #define METER_ACTIONS 2
8213
8214 /**
8215  * Create specify domain meter table and suffix table.
8216  *
8217  * @param[in] dev
8218  *   Pointer to Ethernet device.
8219  * @param[in,out] mtb
8220  *   Pointer to DV meter table set.
8221  * @param[in] egress
8222  *   Table attribute.
8223  * @param[in] transfer
8224  *   Table attribute.
8225  * @param[in] color_reg_c_idx
8226  *   Reg C index for color match.
8227  *
8228  * @return
8229  *   0 on success, -1 otherwise and rte_errno is set.
8230  */
8231 static int
8232 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8233                            struct mlx5_meter_domains_infos *mtb,
8234                            uint8_t egress, uint8_t transfer,
8235                            uint32_t color_reg_c_idx)
8236 {
8237         struct mlx5_priv *priv = dev->data->dev_private;
8238         struct mlx5_ibv_shared *sh = priv->sh;
8239         struct mlx5_flow_dv_match_params mask = {
8240                 .size = sizeof(mask.buf),
8241         };
8242         struct mlx5_flow_dv_match_params value = {
8243                 .size = sizeof(value.buf),
8244         };
8245         struct mlx5dv_flow_matcher_attr dv_attr = {
8246                 .type = IBV_FLOW_ATTR_NORMAL,
8247                 .priority = 0,
8248                 .match_criteria_enable = 0,
8249                 .match_mask = (void *)&mask,
8250         };
8251         void *actions[METER_ACTIONS];
8252         struct mlx5_flow_tbl_resource **sfx_tbl;
8253         struct mlx5_meter_domain_info *dtb;
8254         struct rte_flow_error error;
8255         int i = 0;
8256
8257         if (transfer) {
8258                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8259                 dtb = &mtb->transfer;
8260         } else if (egress) {
8261                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8262                 dtb = &mtb->egress;
8263         } else {
8264                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8265                 dtb = &mtb->ingress;
8266         }
8267         /* If the suffix table in missing, create it. */
8268         if (!(*sfx_tbl)) {
8269                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8270                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8271                                                 egress, transfer, &error);
8272                 if (!(*sfx_tbl)) {
8273                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8274                         return -1;
8275                 }
8276         }
8277         /* Create the meter table with METER level. */
8278         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8279                                             egress, transfer, &error);
8280         if (!dtb->tbl) {
8281                 DRV_LOG(ERR, "Failed to create meter policer table.");
8282                 return -1;
8283         }
8284         /* Create matchers, Any and Color. */
8285         dv_attr.priority = 3;
8286         dv_attr.match_criteria_enable = 0;
8287         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8288                                                              &dv_attr,
8289                                                              dtb->tbl->obj);
8290         if (!dtb->any_matcher) {
8291                 DRV_LOG(ERR, "Failed to create meter"
8292                              " policer default matcher.");
8293                 goto error_exit;
8294         }
8295         dv_attr.priority = 0;
8296         dv_attr.match_criteria_enable =
8297                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8298         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8299                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
8300         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8301                                                                &dv_attr,
8302                                                                dtb->tbl->obj);
8303         if (!dtb->color_matcher) {
8304                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8305                 goto error_exit;
8306         }
8307         if (mtb->count_actns[RTE_MTR_DROPPED])
8308                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8309         actions[i++] = mtb->drop_actn;
8310         /* Default rule: lowest priority, match any, actions: drop. */
8311         dtb->policer_rules[RTE_MTR_DROPPED] =
8312                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8313                                                  (void *)&value, i, actions);
8314         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8315                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8316                 goto error_exit;
8317         }
8318         return 0;
8319 error_exit:
8320         return -1;
8321 }
8322
8323 /**
8324  * Create the needed meter and suffix tables.
8325  * Lock free, (mutex should be acquired by caller).
8326  *
8327  * @param[in] dev
8328  *   Pointer to Ethernet device.
8329  * @param[in] fm
8330  *   Pointer to the flow meter.
8331  *
8332  * @return
8333  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8334  */
8335 static struct mlx5_meter_domains_infos *
8336 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8337                        const struct mlx5_flow_meter *fm)
8338 {
8339         struct mlx5_priv *priv = dev->data->dev_private;
8340         struct mlx5_meter_domains_infos *mtb;
8341         int ret;
8342         int i;
8343
8344         if (!priv->mtr_en) {
8345                 rte_errno = ENOTSUP;
8346                 return NULL;
8347         }
8348         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8349         if (!mtb) {
8350                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8351                 return NULL;
8352         }
8353         /* Create meter count actions */
8354         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8355                 if (!fm->policer_stats.cnt[i])
8356                         continue;
8357                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8358         }
8359         /* Create drop action. */
8360         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8361         if (!mtb->drop_actn) {
8362                 DRV_LOG(ERR, "Failed to create drop action.");
8363                 goto error_exit;
8364         }
8365         /* Egress meter table. */
8366         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8367         if (ret) {
8368                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8369                 goto error_exit;
8370         }
8371         /* Ingress meter table. */
8372         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8373         if (ret) {
8374                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8375                 goto error_exit;
8376         }
8377         /* FDB meter table. */
8378         if (priv->config.dv_esw_en) {
8379                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8380                                                  priv->mtr_color_reg);
8381                 if (ret) {
8382                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8383                         goto error_exit;
8384                 }
8385         }
8386         return mtb;
8387 error_exit:
8388         flow_dv_destroy_mtr_tbl(dev, mtb);
8389         return NULL;
8390 }
8391
8392 /**
8393  * Destroy domain policer rule.
8394  *
8395  * @param[in] dt
8396  *   Pointer to domain table.
8397  */
8398 static void
8399 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8400 {
8401         int i;
8402
8403         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8404                 if (dt->policer_rules[i]) {
8405                         claim_zero(mlx5_glue->dv_destroy_flow
8406                                   (dt->policer_rules[i]));
8407                         dt->policer_rules[i] = NULL;
8408                 }
8409         }
8410         if (dt->jump_actn) {
8411                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8412                 dt->jump_actn = NULL;
8413         }
8414 }
8415
8416 /**
8417  * Destroy policer rules.
8418  *
8419  * @param[in] dev
8420  *   Pointer to Ethernet device.
8421  * @param[in] fm
8422  *   Pointer to flow meter structure.
8423  * @param[in] attr
8424  *   Pointer to flow attributes.
8425  *
8426  * @return
8427  *   Always 0.
8428  */
8429 static int
8430 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8431                               const struct mlx5_flow_meter *fm,
8432                               const struct rte_flow_attr *attr)
8433 {
8434         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8435
8436         if (!mtb)
8437                 return 0;
8438         if (attr->egress)
8439                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8440         if (attr->ingress)
8441                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8442         if (attr->transfer)
8443                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8444         return 0;
8445 }
8446
8447 /**
8448  * Create specify domain meter policer rule.
8449  *
8450  * @param[in] fm
8451  *   Pointer to flow meter structure.
8452  * @param[in] mtb
8453  *   Pointer to DV meter table set.
8454  * @param[in] sfx_tb
8455  *   Pointer to suffix table.
8456  * @param[in] mtr_reg_c
8457  *   Color match REG_C.
8458  *
8459  * @return
8460  *   0 on success, -1 otherwise.
8461  */
8462 static int
8463 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8464                                     struct mlx5_meter_domain_info *dtb,
8465                                     struct mlx5_flow_tbl_resource *sfx_tb,
8466                                     uint8_t mtr_reg_c)
8467 {
8468         struct mlx5_flow_dv_match_params matcher = {
8469                 .size = sizeof(matcher.buf),
8470         };
8471         struct mlx5_flow_dv_match_params value = {
8472                 .size = sizeof(value.buf),
8473         };
8474         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8475         void *actions[METER_ACTIONS];
8476         int i;
8477
8478         /* Create jump action. */
8479         if (!sfx_tb)
8480                 return -1;
8481         if (!dtb->jump_actn)
8482                 dtb->jump_actn =
8483                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8484                                                         (sfx_tb->obj);
8485         if (!dtb->jump_actn) {
8486                 DRV_LOG(ERR, "Failed to create policer jump action.");
8487                 goto error;
8488         }
8489         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8490                 int j = 0;
8491
8492                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8493                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8494                 if (mtb->count_actns[i])
8495                         actions[j++] = mtb->count_actns[i];
8496                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8497                         actions[j++] = mtb->drop_actn;
8498                 else
8499                         actions[j++] = dtb->jump_actn;
8500                 dtb->policer_rules[i] =
8501                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8502                                                  (void *)&value,
8503                                                   j, actions);
8504                 if (!dtb->policer_rules[i]) {
8505                         DRV_LOG(ERR, "Failed to create policer rule.");
8506                         goto error;
8507                 }
8508         }
8509         return 0;
8510 error:
8511         rte_errno = errno;
8512         return -1;
8513 }
8514
8515 /**
8516  * Create policer rules.
8517  *
8518  * @param[in] dev
8519  *   Pointer to Ethernet device.
8520  * @param[in] fm
8521  *   Pointer to flow meter structure.
8522  * @param[in] attr
8523  *   Pointer to flow attributes.
8524  *
8525  * @return
8526  *   0 on success, -1 otherwise.
8527  */
8528 static int
8529 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8530                              struct mlx5_flow_meter *fm,
8531                              const struct rte_flow_attr *attr)
8532 {
8533         struct mlx5_priv *priv = dev->data->dev_private;
8534         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8535         int ret;
8536
8537         if (attr->egress) {
8538                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8539                                                 priv->sh->tx_mtr_sfx_tbl,
8540                                                 priv->mtr_color_reg);
8541                 if (ret) {
8542                         DRV_LOG(ERR, "Failed to create egress policer.");
8543                         goto error;
8544                 }
8545         }
8546         if (attr->ingress) {
8547                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8548                                                 priv->sh->rx_mtr_sfx_tbl,
8549                                                 priv->mtr_color_reg);
8550                 if (ret) {
8551                         DRV_LOG(ERR, "Failed to create ingress policer.");
8552                         goto error;
8553                 }
8554         }
8555         if (attr->transfer) {
8556                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8557                                                 priv->sh->fdb_mtr_sfx_tbl,
8558                                                 priv->mtr_color_reg);
8559                 if (ret) {
8560                         DRV_LOG(ERR, "Failed to create transfer policer.");
8561                         goto error;
8562                 }
8563         }
8564         return 0;
8565 error:
8566         flow_dv_destroy_policer_rules(dev, fm, attr);
8567         return -1;
8568 }
8569
8570 /**
8571  * Query a devx counter.
8572  *
8573  * @param[in] dev
8574  *   Pointer to the Ethernet device structure.
8575  * @param[in] cnt
8576  *   Pointer to the flow counter.
8577  * @param[in] clear
8578  *   Set to clear the counter statistics.
8579  * @param[out] pkts
8580  *   The statistics value of packets.
8581  * @param[out] bytes
8582  *   The statistics value of bytes.
8583  *
8584  * @return
8585  *   0 on success, otherwise return -1.
8586  */
8587 static int
8588 flow_dv_counter_query(struct rte_eth_dev *dev,
8589                       struct mlx5_flow_counter *cnt, bool clear,
8590                       uint64_t *pkts, uint64_t *bytes)
8591 {
8592         struct mlx5_priv *priv = dev->data->dev_private;
8593         uint64_t inn_pkts, inn_bytes;
8594         int ret;
8595
8596         if (!priv->config.devx)
8597                 return -1;
8598         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8599         if (ret)
8600                 return -1;
8601         *pkts = inn_pkts - cnt->hits;
8602         *bytes = inn_bytes - cnt->bytes;
8603         if (clear) {
8604                 cnt->hits = inn_pkts;
8605                 cnt->bytes = inn_bytes;
8606         }
8607         return 0;
8608 }
8609
8610 /*
8611  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8612  */
8613 static int
8614 flow_dv_translate(struct rte_eth_dev *dev,
8615                   struct mlx5_flow *dev_flow,
8616                   const struct rte_flow_attr *attr,
8617                   const struct rte_flow_item items[],
8618                   const struct rte_flow_action actions[],
8619                   struct rte_flow_error *error)
8620 {
8621         int ret;
8622
8623         flow_dv_shared_lock(dev);
8624         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8625         flow_dv_shared_unlock(dev);
8626         return ret;
8627 }
8628
8629 /*
8630  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8631  */
8632 static int
8633 flow_dv_apply(struct rte_eth_dev *dev,
8634               struct rte_flow *flow,
8635               struct rte_flow_error *error)
8636 {
8637         int ret;
8638
8639         flow_dv_shared_lock(dev);
8640         ret = __flow_dv_apply(dev, flow, error);
8641         flow_dv_shared_unlock(dev);
8642         return ret;
8643 }
8644
8645 /*
8646  * Mutex-protected thunk to lock-free __flow_dv_remove().
8647  */
8648 static void
8649 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8650 {
8651         flow_dv_shared_lock(dev);
8652         __flow_dv_remove(dev, flow);
8653         flow_dv_shared_unlock(dev);
8654 }
8655
8656 /*
8657  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8658  */
8659 static void
8660 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8661 {
8662         flow_dv_shared_lock(dev);
8663         __flow_dv_destroy(dev, flow);
8664         flow_dv_shared_unlock(dev);
8665 }
8666
8667 /*
8668  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8669  */
8670 static struct mlx5_flow_counter *
8671 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8672 {
8673         struct mlx5_flow_counter *cnt;
8674
8675         flow_dv_shared_lock(dev);
8676         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8677         flow_dv_shared_unlock(dev);
8678         return cnt;
8679 }
8680
8681 /*
8682  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8683  */
8684 static void
8685 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8686 {
8687         flow_dv_shared_lock(dev);
8688         flow_dv_counter_release(dev, cnt);
8689         flow_dv_shared_unlock(dev);
8690 }
8691
8692 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8693         .validate = flow_dv_validate,
8694         .prepare = flow_dv_prepare,
8695         .translate = flow_dv_translate,
8696         .apply = flow_dv_apply,
8697         .remove = flow_dv_remove,
8698         .destroy = flow_dv_destroy,
8699         .query = flow_dv_query,
8700         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8701         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8702         .create_policer_rules = flow_dv_create_policer_rules,
8703         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8704         .counter_alloc = flow_dv_counter_allocate,
8705         .counter_free = flow_dv_counter_free,
8706         .counter_query = flow_dv_counter_query,
8707 };
8708
8709 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */