drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_glue.h"
  33 #include "mlx5_flow.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  38
  39 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  40 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  41 #endif
  42
  43 #ifndef HAVE_MLX5DV_DR_ESWITCH
  44 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  45 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  46 #endif
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR
  50 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  51 #endif
  52
  53 union flow_dv_attr {
  54         struct {
  55                 uint32_t valid:1;
  56                 uint32_t ipv4:1;
  57                 uint32_t ipv6:1;
  58                 uint32_t tcp:1;
  59                 uint32_t udp:1;
  60                 uint32_t reserved:27;
  61         };
  62         uint32_t attr;
  63 };
  64
  65 /**
  66  * Initialize flow attributes structure according to flow items' types.
  67  *
  68  * @param[in] item
  69  *   Pointer to item specification.
  70  * @param[out] attr
  71  *   Pointer to flow attributes structure.
  72  */
  73 static void
  74 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  75 {
  76         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  77                 switch (item->type) {
  78                 case RTE_FLOW_ITEM_TYPE_IPV4:
  79                         attr->ipv4 = 1;
  80                         break;
  81                 case RTE_FLOW_ITEM_TYPE_IPV6:
  82                         attr->ipv6 = 1;
  83                         break;
  84                 case RTE_FLOW_ITEM_TYPE_UDP:
  85                         attr->udp = 1;
  86                         break;
  87                 case RTE_FLOW_ITEM_TYPE_TCP:
  88                         attr->tcp = 1;
  89                         break;
  90                 default:
  91                         break;
  92                 }
  93         }
  94         attr->valid = 1;
  95 }
  96
  97 struct field_modify_info {
  98         uint32_t size; /* Size of field in protocol header, in bytes. */
  99         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 100         enum mlx5_modification_field id;
 101 };
 102
 103 struct field_modify_info modify_eth[] = {
 104         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 105         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 106         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 107         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 108         {0, 0, 0},
 109 };
 110
 111 struct field_modify_info modify_ipv4[] = {
 112         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 113         {4, 12, MLX5_MODI_OUT_SIPV4},
 114         {4, 16, MLX5_MODI_OUT_DIPV4},
 115         {0, 0, 0},
 116 };
 117
 118 struct field_modify_info modify_ipv6[] = {
 119         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 120         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 121         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 122         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 123         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 124         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 125         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 126         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 127         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 128         {0, 0, 0},
 129 };
 130
 131 struct field_modify_info modify_udp[] = {
 132         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 133         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 134         {0, 0, 0},
 135 };
 136
 137 struct field_modify_info modify_tcp[] = {
 138         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 139         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 140         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 141         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 142         {0, 0, 0},
 143 };
 144
 145 static void
 146 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item, uint64_t *flags)
 147 {
 148         uint8_t next_protocol = 0xFF;
 149
 150         if (item->mask != NULL) {
 151                 switch (item->type) {
 152                 case RTE_FLOW_ITEM_TYPE_IPV4:
 153                         next_protocol =
 154                                 ((const struct rte_flow_item_ipv4 *)
 155                                  (item->spec))->hdr.next_proto_id;
 156                         next_protocol &=
 157                                 ((const struct rte_flow_item_ipv4 *)
 158                                  (item->mask))->hdr.next_proto_id;
 159                         break;
 160                 case RTE_FLOW_ITEM_TYPE_IPV6:
 161                         next_protocol =
 162                                 ((const struct rte_flow_item_ipv6 *)
 163                                  (item->spec))->hdr.proto;
 164                         next_protocol &=
 165                                 ((const struct rte_flow_item_ipv6 *)
 166                                  (item->mask))->hdr.proto;
 167                         break;
 168                 default:
 169                         break;
 170                 }
 171         }
 172         if (next_protocol == IPPROTO_IPIP)
 173                 *flags |= MLX5_FLOW_LAYER_IPIP;
 174         if (next_protocol == IPPROTO_IPV6)
 175                 *flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 176 }
 177
 178 /**
 179  * Acquire the synchronizing object to protect multithreaded access
 180  * to shared dv context. Lock occurs only if context is actually
 181  * shared, i.e. we have multiport IB device and representors are
 182  * created.
 183  *
 184  * @param[in] dev
 185  *   Pointer to the rte_eth_dev structure.
 186  */
 187 static void
 188 flow_d_shared_lock(struct rte_eth_dev *dev)
 189 {
 190         struct mlx5_priv *priv = dev->data->dev_private;
 191         struct mlx5_ibv_shared *sh = priv->sh;
 192
 193         if (sh->dv_refcnt > 1) {
 194                 int ret;
 195
 196                 ret = pthread_mutex_lock(&sh->dv_mutex);
 197                 assert(!ret);
 198                 (void)ret;
 199         }
 200 }
 201
 202 static void
 203 flow_d_shared_unlock(struct rte_eth_dev *dev)
 204 {
 205         struct mlx5_priv *priv = dev->data->dev_private;
 206         struct mlx5_ibv_shared *sh = priv->sh;
 207
 208         if (sh->dv_refcnt > 1) {
 209                 int ret;
 210
 211                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 212                 assert(!ret);
 213                 (void)ret;
 214         }
 215 }
 216
 217 /**
 218  * Convert modify-header action to DV specification.
 219  *
 220  * @param[in] item
 221  *   Pointer to item specification.
 222  * @param[in] field
 223  *   Pointer to field modification information.
 224  * @param[in,out] resource
 225  *   Pointer to the modify-header resource.
 226  * @param[in] type
 227  *   Type of modification.
 228  * @param[out] error
 229  *   Pointer to the error structure.
 230  *
 231  * @return
 232  *   0 on success, a negative errno value otherwise and rte_errno is set.
 233  */
 234 static int
 235 flow_dv_convert_modify_action(struct rte_flow_item *item,
 236                               struct field_modify_info *field,
 237                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 238                               uint32_t type,
 239                               struct rte_flow_error *error)
 240 {
 241         uint32_t i = resource->actions_num;
 242         struct mlx5_modification_cmd *actions = resource->actions;
 243         const uint8_t *spec = item->spec;
 244         const uint8_t *mask = item->mask;
 245         uint32_t set;
 246
 247         while (field->size) {
 248                 set = 0;
 249                 /* Generate modify command for each mask segment. */
 250                 memcpy(&set, &mask[field->offset], field->size);
 251                 if (set) {
 252                         if (i >= MLX5_MODIFY_NUM)
 253                                 return rte_flow_error_set(error, EINVAL,
 254                                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 255                                          "too many items to modify");
 256                         actions[i].action_type = type;
 257                         actions[i].field = field->id;
 258                         actions[i].length = field->size ==
 259                                         4 ? 0 : field->size * 8;
 260                         rte_memcpy(&actions[i].data[4 - field->size],
 261                                    &spec[field->offset], field->size);
 262                         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 263                         ++i;
 264                 }
 265                 if (resource->actions_num != i)
 266                         resource->actions_num = i;
 267                 field++;
 268         }
 269         if (!resource->actions_num)
 270                 return rte_flow_error_set(error, EINVAL,
 271                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 272                                           "invalid modification flow item");
 273         return 0;
 274 }
 275
 276 /**
 277  * Convert modify-header set IPv4 address action to DV specification.
 278  *
 279  * @param[in,out] resource
 280  *   Pointer to the modify-header resource.
 281  * @param[in] action
 282  *   Pointer to action specification.
 283  * @param[out] error
 284  *   Pointer to the error structure.
 285  *
 286  * @return
 287  *   0 on success, a negative errno value otherwise and rte_errno is set.
 288  */
 289 static int
 290 flow_dv_convert_action_modify_ipv4
 291                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 292                          const struct rte_flow_action *action,
 293                          struct rte_flow_error *error)
 294 {
 295         const struct rte_flow_action_set_ipv4 *conf =
 296                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 297         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 298         struct rte_flow_item_ipv4 ipv4;
 299         struct rte_flow_item_ipv4 ipv4_mask;
 300
 301         memset(&ipv4, 0, sizeof(ipv4));
 302         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 303         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 304                 ipv4.hdr.src_addr = conf->ipv4_addr;
 305                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 306         } else {
 307                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 308                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 309         }
 310         item.spec = &ipv4;
 311         item.mask = &ipv4_mask;
 312         return flow_dv_convert_modify_action(&item, modify_ipv4, resource,
 313                                              MLX5_MODIFICATION_TYPE_SET, error);
 314 }
 315
 316 /**
 317  * Convert modify-header set IPv6 address action to DV specification.
 318  *
 319  * @param[in,out] resource
 320  *   Pointer to the modify-header resource.
 321  * @param[in] action
 322  *   Pointer to action specification.
 323  * @param[out] error
 324  *   Pointer to the error structure.
 325  *
 326  * @return
 327  *   0 on success, a negative errno value otherwise and rte_errno is set.
 328  */
 329 static int
 330 flow_dv_convert_action_modify_ipv6
 331                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 332                          const struct rte_flow_action *action,
 333                          struct rte_flow_error *error)
 334 {
 335         const struct rte_flow_action_set_ipv6 *conf =
 336                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 337         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 338         struct rte_flow_item_ipv6 ipv6;
 339         struct rte_flow_item_ipv6 ipv6_mask;
 340
 341         memset(&ipv6, 0, sizeof(ipv6));
 342         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 343         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 344                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 345                        sizeof(ipv6.hdr.src_addr));
 346                 memcpy(&ipv6_mask.hdr.src_addr,
 347                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 348                        sizeof(ipv6.hdr.src_addr));
 349         } else {
 350                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 351                        sizeof(ipv6.hdr.dst_addr));
 352                 memcpy(&ipv6_mask.hdr.dst_addr,
 353                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 354                        sizeof(ipv6.hdr.dst_addr));
 355         }
 356         item.spec = &ipv6;
 357         item.mask = &ipv6_mask;
 358         return flow_dv_convert_modify_action(&item, modify_ipv6, resource,
 359                                              MLX5_MODIFICATION_TYPE_SET, error);
 360 }
 361
 362 /**
 363  * Convert modify-header set MAC address action to DV specification.
 364  *
 365  * @param[in,out] resource
 366  *   Pointer to the modify-header resource.
 367  * @param[in] action
 368  *   Pointer to action specification.
 369  * @param[out] error
 370  *   Pointer to the error structure.
 371  *
 372  * @return
 373  *   0 on success, a negative errno value otherwise and rte_errno is set.
 374  */
 375 static int
 376 flow_dv_convert_action_modify_mac
 377                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 378                          const struct rte_flow_action *action,
 379                          struct rte_flow_error *error)
 380 {
 381         const struct rte_flow_action_set_mac *conf =
 382                 (const struct rte_flow_action_set_mac *)(action->conf);
 383         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 384         struct rte_flow_item_eth eth;
 385         struct rte_flow_item_eth eth_mask;
 386
 387         memset(&eth, 0, sizeof(eth));
 388         memset(&eth_mask, 0, sizeof(eth_mask));
 389         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 390                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 391                        sizeof(eth.src.addr_bytes));
 392                 memcpy(&eth_mask.src.addr_bytes,
 393                        &rte_flow_item_eth_mask.src.addr_bytes,
 394                        sizeof(eth_mask.src.addr_bytes));
 395         } else {
 396                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 397                        sizeof(eth.dst.addr_bytes));
 398                 memcpy(&eth_mask.dst.addr_bytes,
 399                        &rte_flow_item_eth_mask.dst.addr_bytes,
 400                        sizeof(eth_mask.dst.addr_bytes));
 401         }
 402         item.spec = &eth;
 403         item.mask = &eth_mask;
 404         return flow_dv_convert_modify_action(&item, modify_eth, resource,
 405                                              MLX5_MODIFICATION_TYPE_SET, error);
 406 }
 407
 408 /**
 409  * Convert modify-header set TP action to DV specification.
 410  *
 411  * @param[in,out] resource
 412  *   Pointer to the modify-header resource.
 413  * @param[in] action
 414  *   Pointer to action specification.
 415  * @param[in] items
 416  *   Pointer to rte_flow_item objects list.
 417  * @param[in] attr
 418  *   Pointer to flow attributes structure.
 419  * @param[out] error
 420  *   Pointer to the error structure.
 421  *
 422  * @return
 423  *   0 on success, a negative errno value otherwise and rte_errno is set.
 424  */
 425 static int
 426 flow_dv_convert_action_modify_tp
 427                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 428                          const struct rte_flow_action *action,
 429                          const struct rte_flow_item *items,
 430                          union flow_dv_attr *attr,
 431                          struct rte_flow_error *error)
 432 {
 433         const struct rte_flow_action_set_tp *conf =
 434                 (const struct rte_flow_action_set_tp *)(action->conf);
 435         struct rte_flow_item item;
 436         struct rte_flow_item_udp udp;
 437         struct rte_flow_item_udp udp_mask;
 438         struct rte_flow_item_tcp tcp;
 439         struct rte_flow_item_tcp tcp_mask;
 440         struct field_modify_info *field;
 441
 442         if (!attr->valid)
 443                 flow_dv_attr_init(items, attr);
 444         if (attr->udp) {
 445                 memset(&udp, 0, sizeof(udp));
 446                 memset(&udp_mask, 0, sizeof(udp_mask));
 447                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 448                         udp.hdr.src_port = conf->port;
 449                         udp_mask.hdr.src_port =
 450                                         rte_flow_item_udp_mask.hdr.src_port;
 451                 } else {
 452                         udp.hdr.dst_port = conf->port;
 453                         udp_mask.hdr.dst_port =
 454                                         rte_flow_item_udp_mask.hdr.dst_port;
 455                 }
 456                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 457                 item.spec = &udp;
 458                 item.mask = &udp_mask;
 459                 field = modify_udp;
 460         }
 461         if (attr->tcp) {
 462                 memset(&tcp, 0, sizeof(tcp));
 463                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 464                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 465                         tcp.hdr.src_port = conf->port;
 466                         tcp_mask.hdr.src_port =
 467                                         rte_flow_item_tcp_mask.hdr.src_port;
 468                 } else {
 469                         tcp.hdr.dst_port = conf->port;
 470                         tcp_mask.hdr.dst_port =
 471                                         rte_flow_item_tcp_mask.hdr.dst_port;
 472                 }
 473                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 474                 item.spec = &tcp;
 475                 item.mask = &tcp_mask;
 476                 field = modify_tcp;
 477         }
 478         return flow_dv_convert_modify_action(&item, field, resource,
 479                                              MLX5_MODIFICATION_TYPE_SET, error);
 480 }
 481
 482 /**
 483  * Convert modify-header set TTL action to DV specification.
 484  *
 485  * @param[in,out] resource
 486  *   Pointer to the modify-header resource.
 487  * @param[in] action
 488  *   Pointer to action specification.
 489  * @param[in] items
 490  *   Pointer to rte_flow_item objects list.
 491  * @param[in] attr
 492  *   Pointer to flow attributes structure.
 493  * @param[out] error
 494  *   Pointer to the error structure.
 495  *
 496  * @return
 497  *   0 on success, a negative errno value otherwise and rte_errno is set.
 498  */
 499 static int
 500 flow_dv_convert_action_modify_ttl
 501                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 502                          const struct rte_flow_action *action,
 503                          const struct rte_flow_item *items,
 504                          union flow_dv_attr *attr,
 505                          struct rte_flow_error *error)
 506 {
 507         const struct rte_flow_action_set_ttl *conf =
 508                 (const struct rte_flow_action_set_ttl *)(action->conf);
 509         struct rte_flow_item item;
 510         struct rte_flow_item_ipv4 ipv4;
 511         struct rte_flow_item_ipv4 ipv4_mask;
 512         struct rte_flow_item_ipv6 ipv6;
 513         struct rte_flow_item_ipv6 ipv6_mask;
 514         struct field_modify_info *field;
 515
 516         if (!attr->valid)
 517                 flow_dv_attr_init(items, attr);
 518         if (attr->ipv4) {
 519                 memset(&ipv4, 0, sizeof(ipv4));
 520                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 521                 ipv4.hdr.time_to_live = conf->ttl_value;
 522                 ipv4_mask.hdr.time_to_live = 0xFF;
 523                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 524                 item.spec = &ipv4;
 525                 item.mask = &ipv4_mask;
 526                 field = modify_ipv4;
 527         }
 528         if (attr->ipv6) {
 529                 memset(&ipv6, 0, sizeof(ipv6));
 530                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 531                 ipv6.hdr.hop_limits = conf->ttl_value;
 532                 ipv6_mask.hdr.hop_limits = 0xFF;
 533                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 534                 item.spec = &ipv6;
 535                 item.mask = &ipv6_mask;
 536                 field = modify_ipv6;
 537         }
 538         return flow_dv_convert_modify_action(&item, field, resource,
 539                                              MLX5_MODIFICATION_TYPE_SET, error);
 540 }
 541
 542 /**
 543  * Convert modify-header decrement TTL action to DV specification.
 544  *
 545  * @param[in,out] resource
 546  *   Pointer to the modify-header resource.
 547  * @param[in] action
 548  *   Pointer to action specification.
 549  * @param[in] items
 550  *   Pointer to rte_flow_item objects list.
 551  * @param[in] attr
 552  *   Pointer to flow attributes structure.
 553  * @param[out] error
 554  *   Pointer to the error structure.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 flow_dv_convert_action_modify_dec_ttl
 561                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 562                          const struct rte_flow_item *items,
 563                          union flow_dv_attr *attr,
 564                          struct rte_flow_error *error)
 565 {
 566         struct rte_flow_item item;
 567         struct rte_flow_item_ipv4 ipv4;
 568         struct rte_flow_item_ipv4 ipv4_mask;
 569         struct rte_flow_item_ipv6 ipv6;
 570         struct rte_flow_item_ipv6 ipv6_mask;
 571         struct field_modify_info *field;
 572
 573         if (!attr->valid)
 574                 flow_dv_attr_init(items, attr);
 575         if (attr->ipv4) {
 576                 memset(&ipv4, 0, sizeof(ipv4));
 577                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 578                 ipv4.hdr.time_to_live = 0xFF;
 579                 ipv4_mask.hdr.time_to_live = 0xFF;
 580                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 581                 item.spec = &ipv4;
 582                 item.mask = &ipv4_mask;
 583                 field = modify_ipv4;
 584         }
 585         if (attr->ipv6) {
 586                 memset(&ipv6, 0, sizeof(ipv6));
 587                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 588                 ipv6.hdr.hop_limits = 0xFF;
 589                 ipv6_mask.hdr.hop_limits = 0xFF;
 590                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 591                 item.spec = &ipv6;
 592                 item.mask = &ipv6_mask;
 593                 field = modify_ipv6;
 594         }
 595         return flow_dv_convert_modify_action(&item, field, resource,
 596                                              MLX5_MODIFICATION_TYPE_ADD, error);
 597 }
 598
 599 /**
 600  * Convert modify-header increment/decrement TCP Sequence number
 601  * to DV specification.
 602  *
 603  * @param[in,out] resource
 604  *   Pointer to the modify-header resource.
 605  * @param[in] action
 606  *   Pointer to action specification.
 607  * @param[out] error
 608  *   Pointer to the error structure.
 609  *
 610  * @return
 611  *   0 on success, a negative errno value otherwise and rte_errno is set.
 612  */
 613 static int
 614 flow_dv_convert_action_modify_tcp_seq
 615                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 616                          const struct rte_flow_action *action,
 617                          struct rte_flow_error *error)
 618 {
 619         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 620         uint64_t value = rte_be_to_cpu_32(*conf);
 621         struct rte_flow_item item;
 622         struct rte_flow_item_tcp tcp;
 623         struct rte_flow_item_tcp tcp_mask;
 624
 625         memset(&tcp, 0, sizeof(tcp));
 626         memset(&tcp_mask, 0, sizeof(tcp_mask));
 627         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 628                 /*
 629                  * The HW has no decrement operation, only increment operation.
 630                  * To simulate decrement X from Y using increment operation
 631                  * we need to add UINT32_MAX X times to Y.
 632                  * Each adding of UINT32_MAX decrements Y by 1.
 633                  */
 634                 value *= UINT32_MAX;
 635         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 636         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 637         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 638         item.spec = &tcp;
 639         item.mask = &tcp_mask;
 640         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 641                                              MLX5_MODIFICATION_TYPE_ADD, error);
 642 }
 643
 644 /**
 645  * Convert modify-header increment/decrement TCP Acknowledgment number
 646  * to DV specification.
 647  *
 648  * @param[in,out] resource
 649  *   Pointer to the modify-header resource.
 650  * @param[in] action
 651  *   Pointer to action specification.
 652  * @param[out] error
 653  *   Pointer to the error structure.
 654  *
 655  * @return
 656  *   0 on success, a negative errno value otherwise and rte_errno is set.
 657  */
 658 static int
 659 flow_dv_convert_action_modify_tcp_ack
 660                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 661                          const struct rte_flow_action *action,
 662                          struct rte_flow_error *error)
 663 {
 664         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 665         uint64_t value = rte_be_to_cpu_32(*conf);
 666         struct rte_flow_item item;
 667         struct rte_flow_item_tcp tcp;
 668         struct rte_flow_item_tcp tcp_mask;
 669
 670         memset(&tcp, 0, sizeof(tcp));
 671         memset(&tcp_mask, 0, sizeof(tcp_mask));
 672         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 673                 /*
 674                  * The HW has no decrement operation, only increment operation.
 675                  * To simulate decrement X from Y using increment operation
 676                  * we need to add UINT32_MAX X times to Y.
 677                  * Each adding of UINT32_MAX decrements Y by 1.
 678                  */
 679                 value *= UINT32_MAX;
 680         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 681         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 682         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 683         item.spec = &tcp;
 684         item.mask = &tcp_mask;
 685         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 686                                              MLX5_MODIFICATION_TYPE_ADD, error);
 687 }
 688
 689 /**
 690  * Validate META item.
 691  *
 692  * @param[in] dev
 693  *   Pointer to the rte_eth_dev structure.
 694  * @param[in] item
 695  *   Item specification.
 696  * @param[in] attr
 697  *   Attributes of flow that includes this item.
 698  * @param[out] error
 699  *   Pointer to error structure.
 700  *
 701  * @return
 702  *   0 on success, a negative errno value otherwise and rte_errno is set.
 703  */
 704 static int
 705 flow_dv_validate_item_meta(struct rte_eth_dev *dev,
 706                            const struct rte_flow_item *item,
 707                            const struct rte_flow_attr *attr,
 708                            struct rte_flow_error *error)
 709 {
 710         const struct rte_flow_item_meta *spec = item->spec;
 711         const struct rte_flow_item_meta *mask = item->mask;
 712         const struct rte_flow_item_meta nic_mask = {
 713                 .data = RTE_BE32(UINT32_MAX)
 714         };
 715         int ret;
 716         uint64_t offloads = dev->data->dev_conf.txmode.offloads;
 717
 718         if (!(offloads & DEV_TX_OFFLOAD_MATCH_METADATA))
 719                 return rte_flow_error_set(error, EPERM,
 720                                           RTE_FLOW_ERROR_TYPE_ITEM,
 721                                           NULL,
 722                                           "match on metadata offload "
 723                                           "configuration is off for this port");
 724         if (!spec)
 725                 return rte_flow_error_set(error, EINVAL,
 726                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 727                                           item->spec,
 728                                           "data cannot be empty");
 729         if (!spec->data)
 730                 return rte_flow_error_set(error, EINVAL,
 731                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 732                                           NULL,
 733                                           "data cannot be zero");
 734         if (!mask)
 735                 mask = &rte_flow_item_meta_mask;
 736         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
 737                                         (const uint8_t *)&nic_mask,
 738                                         sizeof(struct rte_flow_item_meta),
 739                                         error);
 740         if (ret < 0)
 741                 return ret;
 742         if (attr->ingress)
 743                 return rte_flow_error_set(error, ENOTSUP,
 744                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 745                                           NULL,
 746                                           "pattern not supported for ingress");
 747         return 0;
 748 }
 749
 750 /**
 751  * Validate vport item.
 752  *
 753  * @param[in] dev
 754  *   Pointer to the rte_eth_dev structure.
 755  * @param[in] item
 756  *   Item specification.
 757  * @param[in] attr
 758  *   Attributes of flow that includes this item.
 759  * @param[in] item_flags
 760  *   Bit-fields that holds the items detected until now.
 761  * @param[out] error
 762  *   Pointer to error structure.
 763  *
 764  * @return
 765  *   0 on success, a negative errno value otherwise and rte_errno is set.
 766  */
 767 static int
 768 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 769                               const struct rte_flow_item *item,
 770                               const struct rte_flow_attr *attr,
 771                               uint64_t item_flags,
 772                               struct rte_flow_error *error)
 773 {
 774         const struct rte_flow_item_port_id *spec = item->spec;
 775         const struct rte_flow_item_port_id *mask = item->mask;
 776         const struct rte_flow_item_port_id switch_mask = {
 777                         .id = 0xffffffff,
 778         };
 779         uint16_t esw_domain_id;
 780         uint16_t item_port_esw_domain_id;
 781         int ret;
 782
 783         if (!attr->transfer)
 784                 return rte_flow_error_set(error, EINVAL,
 785                                           RTE_FLOW_ERROR_TYPE_ITEM,
 786                                           NULL,
 787                                           "match on port id is valid only"
 788                                           " when transfer flag is enabled");
 789         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
 790                 return rte_flow_error_set(error, ENOTSUP,
 791                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 792                                           "multiple source ports are not"
 793                                           " supported");
 794         if (!mask)
 795                 mask = &switch_mask;
 796         if (mask->id != 0xffffffff)
 797                 return rte_flow_error_set(error, ENOTSUP,
 798                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
 799                                            mask,
 800                                            "no support for partial mask on"
 801                                            " \"id\" field");
 802         ret = mlx5_flow_item_acceptable
 803                                 (item, (const uint8_t *)mask,
 804                                  (const uint8_t *)&rte_flow_item_port_id_mask,
 805                                  sizeof(struct rte_flow_item_port_id),
 806                                  error);
 807         if (ret)
 808                 return ret;
 809         if (!spec)
 810                 return 0;
 811         ret = mlx5_port_to_eswitch_info(spec->id, &item_port_esw_domain_id,
 812                                         NULL);
 813         if (ret)
 814                 return rte_flow_error_set(error, -ret,
 815                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 816                                           "failed to obtain E-Switch info for"
 817                                           " port");
 818         ret = mlx5_port_to_eswitch_info(dev->data->port_id,
 819                                         &esw_domain_id, NULL);
 820         if (ret < 0)
 821                 return rte_flow_error_set(error, -ret,
 822                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 823                                           NULL,
 824                                           "failed to obtain E-Switch info");
 825         if (item_port_esw_domain_id != esw_domain_id)
 826                 return rte_flow_error_set(error, -ret,
 827                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 828                                           "cannot match on a port from a"
 829                                           " different E-Switch");
 830         return 0;
 831 }
 832
 833 /**
 834  * Validate count action.
 835  *
 836  * @param[in] dev
 837  *   device otr.
 838  * @param[out] error
 839  *   Pointer to error structure.
 840  *
 841  * @return
 842  *   0 on success, a negative errno value otherwise and rte_errno is set.
 843  */
 844 static int
 845 flow_dv_validate_action_count(struct rte_eth_dev *dev,
 846                               struct rte_flow_error *error)
 847 {
 848         struct mlx5_priv *priv = dev->data->dev_private;
 849
 850         if (!priv->config.devx)
 851                 goto notsup_err;
 852 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
 853         return 0;
 854 #endif
 855 notsup_err:
 856         return rte_flow_error_set
 857                       (error, ENOTSUP,
 858                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 859                        NULL,
 860                        "count action not supported");
 861 }
 862
 863 /**
 864  * Validate the L2 encap action.
 865  *
 866  * @param[in] action_flags
 867  *   Holds the actions detected until now.
 868  * @param[in] action
 869  *   Pointer to the encap action.
 870  * @param[in] attr
 871  *   Pointer to flow attributes
 872  * @param[out] error
 873  *   Pointer to error structure.
 874  *
 875  * @return
 876  *   0 on success, a negative errno value otherwise and rte_errno is set.
 877  */
 878 static int
 879 flow_dv_validate_action_l2_encap(uint64_t action_flags,
 880                                  const struct rte_flow_action *action,
 881                                  const struct rte_flow_attr *attr,
 882                                  struct rte_flow_error *error)
 883 {
 884         if (!(action->conf))
 885                 return rte_flow_error_set(error, EINVAL,
 886                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
 887                                           "configuration cannot be null");
 888         if (action_flags & MLX5_FLOW_ACTION_DROP)
 889                 return rte_flow_error_set(error, EINVAL,
 890                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 891                                           "can't drop and encap in same flow");
 892         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
 893                 return rte_flow_error_set(error, EINVAL,
 894                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 895                                           "can only have a single encap or"
 896                                           " decap action in a flow");
 897         if (!attr->transfer && attr->ingress)
 898                 return rte_flow_error_set(error, ENOTSUP,
 899                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 900                                           NULL,
 901                                           "encap action not supported for "
 902                                           "ingress");
 903         return 0;
 904 }
 905
 906 /**
 907  * Validate the L2 decap action.
 908  *
 909  * @param[in] action_flags
 910  *   Holds the actions detected until now.
 911  * @param[in] attr
 912  *   Pointer to flow attributes
 913  * @param[out] error
 914  *   Pointer to error structure.
 915  *
 916  * @return
 917  *   0 on success, a negative errno value otherwise and rte_errno is set.
 918  */
 919 static int
 920 flow_dv_validate_action_l2_decap(uint64_t action_flags,
 921                                  const struct rte_flow_attr *attr,
 922                                  struct rte_flow_error *error)
 923 {
 924         if (action_flags & MLX5_FLOW_ACTION_DROP)
 925                 return rte_flow_error_set(error, EINVAL,
 926                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 927                                           "can't drop and decap in same flow");
 928         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
 929                 return rte_flow_error_set(error, EINVAL,
 930                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 931                                           "can only have a single encap or"
 932                                           " decap action in a flow");
 933         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
 934                 return rte_flow_error_set(error, EINVAL,
 935                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 936                                           "can't have decap action after"
 937                                           " modify action");
 938         if (attr->egress)
 939                 return rte_flow_error_set(error, ENOTSUP,
 940                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
 941                                           NULL,
 942                                           "decap action not supported for "
 943                                           "egress");
 944         return 0;
 945 }
 946
 947 /**
 948  * Validate the raw encap action.
 949  *
 950  * @param[in] action_flags
 951  *   Holds the actions detected until now.
 952  * @param[in] action
 953  *   Pointer to the encap action.
 954  * @param[in] attr
 955  *   Pointer to flow attributes
 956  * @param[out] error
 957  *   Pointer to error structure.
 958  *
 959  * @return
 960  *   0 on success, a negative errno value otherwise and rte_errno is set.
 961  */
 962 static int
 963 flow_dv_validate_action_raw_encap(uint64_t action_flags,
 964                                   const struct rte_flow_action *action,
 965                                   const struct rte_flow_attr *attr,
 966                                   struct rte_flow_error *error)
 967 {
 968         if (!(action->conf))
 969                 return rte_flow_error_set(error, EINVAL,
 970                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
 971                                           "configuration cannot be null");
 972         if (action_flags & MLX5_FLOW_ACTION_DROP)
 973                 return rte_flow_error_set(error, EINVAL,
 974                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 975                                           "can't drop and encap in same flow");
 976         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
 977                 return rte_flow_error_set(error, EINVAL,
 978                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 979                                           "can only have a single encap"
 980                                           " action in a flow");
 981         /* encap without preceding decap is not supported for ingress */
 982         if (!attr->transfer &&  attr->ingress &&
 983             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
 984                 return rte_flow_error_set(error, ENOTSUP,
 985                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 986                                           NULL,
 987                                           "encap action not supported for "
 988                                           "ingress");
 989         return 0;
 990 }
 991
 992 /**
 993  * Validate the raw decap action.
 994  *
 995  * @param[in] action_flags
 996  *   Holds the actions detected until now.
 997  * @param[in] action
 998  *   Pointer to the encap action.
 999  * @param[in] attr
1000  *   Pointer to flow attributes
1001  * @param[out] error
1002  *   Pointer to error structure.
1003  *
1004  * @return
1005  *   0 on success, a negative errno value otherwise and rte_errno is set.
1006  */
1007 static int
1008 flow_dv_validate_action_raw_decap(uint64_t action_flags,
1009                                   const struct rte_flow_action *action,
1010                                   const struct rte_flow_attr *attr,
1011                                   struct rte_flow_error *error)
1012 {
1013         if (action_flags & MLX5_FLOW_ACTION_DROP)
1014                 return rte_flow_error_set(error, EINVAL,
1015                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1016                                           "can't drop and decap in same flow");
1017         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1018                 return rte_flow_error_set(error, EINVAL,
1019                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1020                                           "can't have encap action before"
1021                                           " decap action");
1022         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
1023                 return rte_flow_error_set(error, EINVAL,
1024                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1025                                           "can only have a single decap"
1026                                           " action in a flow");
1027         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
1028                 return rte_flow_error_set(error, EINVAL,
1029                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1030                                           "can't have decap action after"
1031                                           " modify action");
1032         /* decap action is valid on egress only if it is followed by encap */
1033         if (attr->egress) {
1034                 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
1035                        action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
1036                        action++) {
1037                 }
1038                 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
1039                         return rte_flow_error_set
1040                                         (error, ENOTSUP,
1041                                          RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1042                                          NULL, "decap action not supported"
1043                                          " for egress");
1044         }
1045         return 0;
1046 }
1047
1048 /**
1049  * Find existing encap/decap resource or create and register a new one.
1050  *
1051  * @param dev[in, out]
1052  *   Pointer to rte_eth_dev structure.
1053  * @param[in, out] resource
1054  *   Pointer to encap/decap resource.
1055  * @parm[in, out] dev_flow
1056  *   Pointer to the dev_flow.
1057  * @param[out] error
1058  *   pointer to error structure.
1059  *
1060  * @return
1061  *   0 on success otherwise -errno and errno is set.
1062  */
1063 static int
1064 flow_dv_encap_decap_resource_register
1065                         (struct rte_eth_dev *dev,
1066                          struct mlx5_flow_dv_encap_decap_resource *resource,
1067                          struct mlx5_flow *dev_flow,
1068                          struct rte_flow_error *error)
1069 {
1070         struct mlx5_priv *priv = dev->data->dev_private;
1071         struct mlx5_ibv_shared *sh = priv->sh;
1072         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
1073         struct rte_flow *flow = dev_flow->flow;
1074         struct mlx5dv_dr_domain *domain;
1075
1076         resource->flags = flow->group ? 0 : 1;
1077         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
1078                 domain = sh->fdb_domain;
1079         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
1080                 domain = sh->rx_domain;
1081         else
1082                 domain = sh->tx_domain;
1083
1084         /* Lookup a matching resource from cache. */
1085         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
1086                 if (resource->reformat_type == cache_resource->reformat_type &&
1087                     resource->ft_type == cache_resource->ft_type &&
1088                     resource->flags == cache_resource->flags &&
1089                     resource->size == cache_resource->size &&
1090                     !memcmp((const void *)resource->buf,
1091                             (const void *)cache_resource->buf,
1092                             resource->size)) {
1093                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
1094                                 (void *)cache_resource,
1095                                 rte_atomic32_read(&cache_resource->refcnt));
1096                         rte_atomic32_inc(&cache_resource->refcnt);
1097                         dev_flow->dv.encap_decap = cache_resource;
1098                         return 0;
1099                 }
1100         }
1101         /* Register new encap/decap resource. */
1102         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1103         if (!cache_resource)
1104                 return rte_flow_error_set(error, ENOMEM,
1105                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1106                                           "cannot allocate resource memory");
1107         *cache_resource = *resource;
1108         cache_resource->verbs_action =
1109                 mlx5_glue->dv_create_flow_action_packet_reformat
1110                         (sh->ctx, cache_resource->reformat_type,
1111                          cache_resource->ft_type, domain, cache_resource->flags,
1112                          cache_resource->size,
1113                          (cache_resource->size ? cache_resource->buf : NULL));
1114         if (!cache_resource->verbs_action) {
1115                 rte_free(cache_resource);
1116                 return rte_flow_error_set(error, ENOMEM,
1117                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1118                                           NULL, "cannot create action");
1119         }
1120         rte_atomic32_init(&cache_resource->refcnt);
1121         rte_atomic32_inc(&cache_resource->refcnt);
1122         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
1123         dev_flow->dv.encap_decap = cache_resource;
1124         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
1125                 (void *)cache_resource,
1126                 rte_atomic32_read(&cache_resource->refcnt));
1127         return 0;
1128 }
1129
1130 /**
1131  * Find existing table jump resource or create and register a new one.
1132  *
1133  * @param dev[in, out]
1134  *   Pointer to rte_eth_dev structure.
1135  * @param[in, out] resource
1136  *   Pointer to jump table resource.
1137  * @parm[in, out] dev_flow
1138  *   Pointer to the dev_flow.
1139  * @param[out] error
1140  *   pointer to error structure.
1141  *
1142  * @return
1143  *   0 on success otherwise -errno and errno is set.
1144  */
1145 static int
1146 flow_dv_jump_tbl_resource_register
1147                         (struct rte_eth_dev *dev,
1148                          struct mlx5_flow_dv_jump_tbl_resource *resource,
1149                          struct mlx5_flow *dev_flow,
1150                          struct rte_flow_error *error)
1151 {
1152         struct mlx5_priv *priv = dev->data->dev_private;
1153         struct mlx5_ibv_shared *sh = priv->sh;
1154         struct mlx5_flow_dv_jump_tbl_resource *cache_resource;
1155
1156         /* Lookup a matching resource from cache. */
1157         LIST_FOREACH(cache_resource, &sh->jump_tbl, next) {
1158                 if (resource->tbl == cache_resource->tbl) {
1159                         DRV_LOG(DEBUG, "jump table resource resource %p: refcnt %d++",
1160                                 (void *)cache_resource,
1161                                 rte_atomic32_read(&cache_resource->refcnt));
1162                         rte_atomic32_inc(&cache_resource->refcnt);
1163                         dev_flow->dv.jump = cache_resource;
1164                         return 0;
1165                 }
1166         }
1167         /* Register new jump table resource. */
1168         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1169         if (!cache_resource)
1170                 return rte_flow_error_set(error, ENOMEM,
1171                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1172                                           "cannot allocate resource memory");
1173         *cache_resource = *resource;
1174         cache_resource->action =
1175                 mlx5_glue->dr_create_flow_action_dest_flow_tbl
1176                 (resource->tbl->obj);
1177         if (!cache_resource->action) {
1178                 rte_free(cache_resource);
1179                 return rte_flow_error_set(error, ENOMEM,
1180                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1181                                           NULL, "cannot create action");
1182         }
1183         rte_atomic32_init(&cache_resource->refcnt);
1184         rte_atomic32_inc(&cache_resource->refcnt);
1185         LIST_INSERT_HEAD(&sh->jump_tbl, cache_resource, next);
1186         dev_flow->dv.jump = cache_resource;
1187         DRV_LOG(DEBUG, "new jump table  resource %p: refcnt %d++",
1188                 (void *)cache_resource,
1189                 rte_atomic32_read(&cache_resource->refcnt));
1190         return 0;
1191 }
1192
1193 /**
1194  * Find existing table port ID resource or create and register a new one.
1195  *
1196  * @param dev[in, out]
1197  *   Pointer to rte_eth_dev structure.
1198  * @param[in, out] resource
1199  *   Pointer to port ID action resource.
1200  * @parm[in, out] dev_flow
1201  *   Pointer to the dev_flow.
1202  * @param[out] error
1203  *   pointer to error structure.
1204  *
1205  * @return
1206  *   0 on success otherwise -errno and errno is set.
1207  */
1208 static int
1209 flow_dv_port_id_action_resource_register
1210                         (struct rte_eth_dev *dev,
1211                          struct mlx5_flow_dv_port_id_action_resource *resource,
1212                          struct mlx5_flow *dev_flow,
1213                          struct rte_flow_error *error)
1214 {
1215         struct mlx5_priv *priv = dev->data->dev_private;
1216         struct mlx5_ibv_shared *sh = priv->sh;
1217         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
1218
1219         /* Lookup a matching resource from cache. */
1220         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
1221                 if (resource->port_id == cache_resource->port_id) {
1222                         DRV_LOG(DEBUG, "port id action resource resource %p: "
1223                                 "refcnt %d++",
1224                                 (void *)cache_resource,
1225                                 rte_atomic32_read(&cache_resource->refcnt));
1226                         rte_atomic32_inc(&cache_resource->refcnt);
1227                         dev_flow->dv.port_id_action = cache_resource;
1228                         return 0;
1229                 }
1230         }
1231         /* Register new port id action resource. */
1232         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1233         if (!cache_resource)
1234                 return rte_flow_error_set(error, ENOMEM,
1235                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1236                                           "cannot allocate resource memory");
1237         *cache_resource = *resource;
1238         cache_resource->action =
1239                 mlx5_glue->dr_create_flow_action_dest_vport
1240                         (priv->sh->fdb_domain, resource->port_id);
1241         if (!cache_resource->action) {
1242                 rte_free(cache_resource);
1243                 return rte_flow_error_set(error, ENOMEM,
1244                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1245                                           NULL, "cannot create action");
1246         }
1247         rte_atomic32_init(&cache_resource->refcnt);
1248         rte_atomic32_inc(&cache_resource->refcnt);
1249         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
1250         dev_flow->dv.port_id_action = cache_resource;
1251         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
1252                 (void *)cache_resource,
1253                 rte_atomic32_read(&cache_resource->refcnt));
1254         return 0;
1255 }
1256
1257 /**
1258  * Get the size of specific rte_flow_item_type
1259  *
1260  * @param[in] item_type
1261  *   Tested rte_flow_item_type.
1262  *
1263  * @return
1264  *   sizeof struct item_type, 0 if void or irrelevant.
1265  */
1266 static size_t
1267 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
1268 {
1269         size_t retval;
1270
1271         switch (item_type) {
1272         case RTE_FLOW_ITEM_TYPE_ETH:
1273                 retval = sizeof(struct rte_flow_item_eth);
1274                 break;
1275         case RTE_FLOW_ITEM_TYPE_VLAN:
1276                 retval = sizeof(struct rte_flow_item_vlan);
1277                 break;
1278         case RTE_FLOW_ITEM_TYPE_IPV4:
1279                 retval = sizeof(struct rte_flow_item_ipv4);
1280                 break;
1281         case RTE_FLOW_ITEM_TYPE_IPV6:
1282                 retval = sizeof(struct rte_flow_item_ipv6);
1283                 break;
1284         case RTE_FLOW_ITEM_TYPE_UDP:
1285                 retval = sizeof(struct rte_flow_item_udp);
1286                 break;
1287         case RTE_FLOW_ITEM_TYPE_TCP:
1288                 retval = sizeof(struct rte_flow_item_tcp);
1289                 break;
1290         case RTE_FLOW_ITEM_TYPE_VXLAN:
1291                 retval = sizeof(struct rte_flow_item_vxlan);
1292                 break;
1293         case RTE_FLOW_ITEM_TYPE_GRE:
1294                 retval = sizeof(struct rte_flow_item_gre);
1295                 break;
1296         case RTE_FLOW_ITEM_TYPE_NVGRE:
1297                 retval = sizeof(struct rte_flow_item_nvgre);
1298                 break;
1299         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1300                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
1301                 break;
1302         case RTE_FLOW_ITEM_TYPE_MPLS:
1303                 retval = sizeof(struct rte_flow_item_mpls);
1304                 break;
1305         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
1306         default:
1307                 retval = 0;
1308                 break;
1309         }
1310         return retval;
1311 }
1312
1313 #define MLX5_ENCAP_IPV4_VERSION         0x40
1314 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
1315 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
1316 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
1317 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
1318 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
1319 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
1320
1321 /**
1322  * Convert the encap action data from list of rte_flow_item to raw buffer
1323  *
1324  * @param[in] items
1325  *   Pointer to rte_flow_item objects list.
1326  * @param[out] buf
1327  *   Pointer to the output buffer.
1328  * @param[out] size
1329  *   Pointer to the output buffer size.
1330  * @param[out] error
1331  *   Pointer to the error structure.
1332  *
1333  * @return
1334  *   0 on success, a negative errno value otherwise and rte_errno is set.
1335  */
1336 static int
1337 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
1338                            size_t *size, struct rte_flow_error *error)
1339 {
1340         struct rte_ether_hdr *eth = NULL;
1341         struct rte_vlan_hdr *vlan = NULL;
1342         struct rte_ipv4_hdr *ipv4 = NULL;
1343         struct rte_ipv6_hdr *ipv6 = NULL;
1344         struct rte_udp_hdr *udp = NULL;
1345         struct rte_vxlan_hdr *vxlan = NULL;
1346         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
1347         struct rte_gre_hdr *gre = NULL;
1348         size_t len;
1349         size_t temp_size = 0;
1350
1351         if (!items)
1352                 return rte_flow_error_set(error, EINVAL,
1353                                           RTE_FLOW_ERROR_TYPE_ACTION,
1354                                           NULL, "invalid empty data");
1355         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1356                 len = flow_dv_get_item_len(items->type);
1357                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
1358                         return rte_flow_error_set(error, EINVAL,
1359                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1360                                                   (void *)items->type,
1361                                                   "items total size is too big"
1362                                                   " for encap action");
1363                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
1364                 switch (items->type) {
1365                 case RTE_FLOW_ITEM_TYPE_ETH:
1366                         eth = (struct rte_ether_hdr *)&buf[temp_size];
1367                         break;
1368                 case RTE_FLOW_ITEM_TYPE_VLAN:
1369                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
1370                         if (!eth)
1371                                 return rte_flow_error_set(error, EINVAL,
1372                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1373                                                 (void *)items->type,
1374                                                 "eth header not found");
1375                         if (!eth->ether_type)
1376                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
1377                         break;
1378                 case RTE_FLOW_ITEM_TYPE_IPV4:
1379                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
1380                         if (!vlan && !eth)
1381                                 return rte_flow_error_set(error, EINVAL,
1382                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1383                                                 (void *)items->type,
1384                                                 "neither eth nor vlan"
1385                                                 " header found");
1386                         if (vlan && !vlan->eth_proto)
1387                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1388                         else if (eth && !eth->ether_type)
1389                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1390                         if (!ipv4->version_ihl)
1391                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
1392                                                     MLX5_ENCAP_IPV4_IHL_MIN;
1393                         if (!ipv4->time_to_live)
1394                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
1395                         break;
1396                 case RTE_FLOW_ITEM_TYPE_IPV6:
1397                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
1398                         if (!vlan && !eth)
1399                                 return rte_flow_error_set(error, EINVAL,
1400                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1401                                                 (void *)items->type,
1402                                                 "neither eth nor vlan"
1403                                                 " header found");
1404                         if (vlan && !vlan->eth_proto)
1405                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1406                         else if (eth && !eth->ether_type)
1407                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1408                         if (!ipv6->vtc_flow)
1409                                 ipv6->vtc_flow =
1410                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
1411                         if (!ipv6->hop_limits)
1412                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
1413                         break;
1414                 case RTE_FLOW_ITEM_TYPE_UDP:
1415                         udp = (struct rte_udp_hdr *)&buf[temp_size];
1416                         if (!ipv4 && !ipv6)
1417                                 return rte_flow_error_set(error, EINVAL,
1418                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1419                                                 (void *)items->type,
1420                                                 "ip header not found");
1421                         if (ipv4 && !ipv4->next_proto_id)
1422                                 ipv4->next_proto_id = IPPROTO_UDP;
1423                         else if (ipv6 && !ipv6->proto)
1424                                 ipv6->proto = IPPROTO_UDP;
1425                         break;
1426                 case RTE_FLOW_ITEM_TYPE_VXLAN:
1427                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
1428                         if (!udp)
1429                                 return rte_flow_error_set(error, EINVAL,
1430                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1431                                                 (void *)items->type,
1432                                                 "udp header not found");
1433                         if (!udp->dst_port)
1434                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
1435                         if (!vxlan->vx_flags)
1436                                 vxlan->vx_flags =
1437                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
1438                         break;
1439                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1440                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
1441                         if (!udp)
1442                                 return rte_flow_error_set(error, EINVAL,
1443                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1444                                                 (void *)items->type,
1445                                                 "udp header not found");
1446                         if (!vxlan_gpe->proto)
1447                                 return rte_flow_error_set(error, EINVAL,
1448                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1449                                                 (void *)items->type,
1450                                                 "next protocol not found");
1451                         if (!udp->dst_port)
1452                                 udp->dst_port =
1453                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
1454                         if (!vxlan_gpe->vx_flags)
1455                                 vxlan_gpe->vx_flags =
1456                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
1457                         break;
1458                 case RTE_FLOW_ITEM_TYPE_GRE:
1459                 case RTE_FLOW_ITEM_TYPE_NVGRE:
1460                         gre = (struct rte_gre_hdr *)&buf[temp_size];
1461                         if (!gre->proto)
1462                                 return rte_flow_error_set(error, EINVAL,
1463                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1464                                                 (void *)items->type,
1465                                                 "next protocol not found");
1466                         if (!ipv4 && !ipv6)
1467                                 return rte_flow_error_set(error, EINVAL,
1468                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1469                                                 (void *)items->type,
1470                                                 "ip header not found");
1471                         if (ipv4 && !ipv4->next_proto_id)
1472                                 ipv4->next_proto_id = IPPROTO_GRE;
1473                         else if (ipv6 && !ipv6->proto)
1474                                 ipv6->proto = IPPROTO_GRE;
1475                         break;
1476                 case RTE_FLOW_ITEM_TYPE_VOID:
1477                         break;
1478                 default:
1479                         return rte_flow_error_set(error, EINVAL,
1480                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1481                                                   (void *)items->type,
1482                                                   "unsupported item type");
1483                         break;
1484                 }
1485                 temp_size += len;
1486         }
1487         *size = temp_size;
1488         return 0;
1489 }
1490
1491 static int
1492 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
1493 {
1494         struct rte_ether_hdr *eth = NULL;
1495         struct rte_vlan_hdr *vlan = NULL;
1496         struct rte_ipv6_hdr *ipv6 = NULL;
1497         struct rte_udp_hdr *udp = NULL;
1498         char *next_hdr;
1499         uint16_t proto;
1500
1501         eth = (struct rte_ether_hdr *)data;
1502         next_hdr = (char *)(eth + 1);
1503         proto = RTE_BE16(eth->ether_type);
1504
1505         /* VLAN skipping */
1506         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
1507                 next_hdr += sizeof(struct rte_vlan_hdr);
1508                 vlan = (struct rte_vlan_hdr *)next_hdr;
1509                 proto = RTE_BE16(vlan->eth_proto);
1510         }
1511
1512         /* HW calculates IPv4 csum. no need to proceed */
1513         if (proto == RTE_ETHER_TYPE_IPV4)
1514                 return 0;
1515
1516         /* non IPv4/IPv6 header. not supported */
1517         if (proto != RTE_ETHER_TYPE_IPV6) {
1518                 return rte_flow_error_set(error, ENOTSUP,
1519                                           RTE_FLOW_ERROR_TYPE_ACTION,
1520                                           NULL, "Cannot offload non IPv4/IPv6");
1521         }
1522
1523         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
1524
1525         /* ignore non UDP */
1526         if (ipv6->proto != IPPROTO_UDP)
1527                 return 0;
1528
1529         udp = (struct rte_udp_hdr *)(ipv6 + 1);
1530         udp->dgram_cksum = 0;
1531
1532         return 0;
1533 }
1534
1535 /**
1536  * Convert L2 encap action to DV specification.
1537  *
1538  * @param[in] dev
1539  *   Pointer to rte_eth_dev structure.
1540  * @param[in] action
1541  *   Pointer to action structure.
1542  * @param[in, out] dev_flow
1543  *   Pointer to the mlx5_flow.
1544  * @param[in] transfer
1545  *   Mark if the flow is E-Switch flow.
1546  * @param[out] error
1547  *   Pointer to the error structure.
1548  *
1549  * @return
1550  *   0 on success, a negative errno value otherwise and rte_errno is set.
1551  */
1552 static int
1553 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
1554                                const struct rte_flow_action *action,
1555                                struct mlx5_flow *dev_flow,
1556                                uint8_t transfer,
1557                                struct rte_flow_error *error)
1558 {
1559         const struct rte_flow_item *encap_data;
1560         const struct rte_flow_action_raw_encap *raw_encap_data;
1561         struct mlx5_flow_dv_encap_decap_resource res = {
1562                 .reformat_type =
1563                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
1564                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1565                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
1566         };
1567
1568         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
1569                 raw_encap_data =
1570                         (const struct rte_flow_action_raw_encap *)action->conf;
1571                 res.size = raw_encap_data->size;
1572                 memcpy(res.buf, raw_encap_data->data, res.size);
1573                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
1574                         return -rte_errno;
1575         } else {
1576                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
1577                         encap_data =
1578                                 ((const struct rte_flow_action_vxlan_encap *)
1579                                                 action->conf)->definition;
1580                 else
1581                         encap_data =
1582                                 ((const struct rte_flow_action_nvgre_encap *)
1583                                                 action->conf)->definition;
1584                 if (flow_dv_convert_encap_data(encap_data, res.buf,
1585                                                &res.size, error))
1586                         return -rte_errno;
1587         }
1588         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1589                 return rte_flow_error_set(error, EINVAL,
1590                                           RTE_FLOW_ERROR_TYPE_ACTION,
1591                                           NULL, "can't create L2 encap action");
1592         return 0;
1593 }
1594
1595 /**
1596  * Convert L2 decap action to DV specification.
1597  *
1598  * @param[in] dev
1599  *   Pointer to rte_eth_dev structure.
1600  * @param[in, out] dev_flow
1601  *   Pointer to the mlx5_flow.
1602  * @param[in] transfer
1603  *   Mark if the flow is E-Switch flow.
1604  * @param[out] error
1605  *   Pointer to the error structure.
1606  *
1607  * @return
1608  *   0 on success, a negative errno value otherwise and rte_errno is set.
1609  */
1610 static int
1611 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
1612                                struct mlx5_flow *dev_flow,
1613                                uint8_t transfer,
1614                                struct rte_flow_error *error)
1615 {
1616         struct mlx5_flow_dv_encap_decap_resource res = {
1617                 .size = 0,
1618                 .reformat_type =
1619                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
1620                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1621                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
1622         };
1623
1624         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1625                 return rte_flow_error_set(error, EINVAL,
1626                                           RTE_FLOW_ERROR_TYPE_ACTION,
1627                                           NULL, "can't create L2 decap action");
1628         return 0;
1629 }
1630
1631 /**
1632  * Convert raw decap/encap (L3 tunnel) action to DV specification.
1633  *
1634  * @param[in] dev
1635  *   Pointer to rte_eth_dev structure.
1636  * @param[in] action
1637  *   Pointer to action structure.
1638  * @param[in, out] dev_flow
1639  *   Pointer to the mlx5_flow.
1640  * @param[in] attr
1641  *   Pointer to the flow attributes.
1642  * @param[out] error
1643  *   Pointer to the error structure.
1644  *
1645  * @return
1646  *   0 on success, a negative errno value otherwise and rte_errno is set.
1647  */
1648 static int
1649 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
1650                                 const struct rte_flow_action *action,
1651                                 struct mlx5_flow *dev_flow,
1652                                 const struct rte_flow_attr *attr,
1653                                 struct rte_flow_error *error)
1654 {
1655         const struct rte_flow_action_raw_encap *encap_data;
1656         struct mlx5_flow_dv_encap_decap_resource res;
1657
1658         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
1659         res.size = encap_data->size;
1660         memcpy(res.buf, encap_data->data, res.size);
1661         res.reformat_type = attr->egress ?
1662                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL :
1663                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
1664         if (attr->transfer)
1665                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
1666         else
1667                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
1668                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
1669         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1670                 return rte_flow_error_set(error, EINVAL,
1671                                           RTE_FLOW_ERROR_TYPE_ACTION,
1672                                           NULL, "can't create encap action");
1673         return 0;
1674 }
1675
1676 /**
1677  * Validate the modify-header actions.
1678  *
1679  * @param[in] action_flags
1680  *   Holds the actions detected until now.
1681  * @param[in] action
1682  *   Pointer to the modify action.
1683  * @param[out] error
1684  *   Pointer to error structure.
1685  *
1686  * @return
1687  *   0 on success, a negative errno value otherwise and rte_errno is set.
1688  */
1689 static int
1690 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
1691                                    const struct rte_flow_action *action,
1692                                    struct rte_flow_error *error)
1693 {
1694         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
1695                 return rte_flow_error_set(error, EINVAL,
1696                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1697                                           NULL, "action configuration not set");
1698         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1699                 return rte_flow_error_set(error, EINVAL,
1700                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1701                                           "can't have encap action before"
1702                                           " modify action");
1703         return 0;
1704 }
1705
1706 /**
1707  * Validate the modify-header MAC address actions.
1708  *
1709  * @param[in] action_flags
1710  *   Holds the actions detected until now.
1711  * @param[in] action
1712  *   Pointer to the modify action.
1713  * @param[in] item_flags
1714  *   Holds the items detected.
1715  * @param[out] error
1716  *   Pointer to error structure.
1717  *
1718  * @return
1719  *   0 on success, a negative errno value otherwise and rte_errno is set.
1720  */
1721 static int
1722 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
1723                                    const struct rte_flow_action *action,
1724                                    const uint64_t item_flags,
1725                                    struct rte_flow_error *error)
1726 {
1727         int ret = 0;
1728
1729         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1730         if (!ret) {
1731                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
1732                         return rte_flow_error_set(error, EINVAL,
1733                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1734                                                   NULL,
1735                                                   "no L2 item in pattern");
1736         }
1737         return ret;
1738 }
1739
1740 /**
1741  * Validate the modify-header IPv4 address actions.
1742  *
1743  * @param[in] action_flags
1744  *   Holds the actions detected until now.
1745  * @param[in] action
1746  *   Pointer to the modify action.
1747  * @param[in] item_flags
1748  *   Holds the items detected.
1749  * @param[out] error
1750  *   Pointer to error structure.
1751  *
1752  * @return
1753  *   0 on success, a negative errno value otherwise and rte_errno is set.
1754  */
1755 static int
1756 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
1757                                     const struct rte_flow_action *action,
1758                                     const uint64_t item_flags,
1759                                     struct rte_flow_error *error)
1760 {
1761         int ret = 0;
1762
1763         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1764         if (!ret) {
1765                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
1766                         return rte_flow_error_set(error, EINVAL,
1767                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1768                                                   NULL,
1769                                                   "no ipv4 item in pattern");
1770         }
1771         return ret;
1772 }
1773
1774 /**
1775  * Validate the modify-header IPv6 address actions.
1776  *
1777  * @param[in] action_flags
1778  *   Holds the actions detected until now.
1779  * @param[in] action
1780  *   Pointer to the modify action.
1781  * @param[in] item_flags
1782  *   Holds the items detected.
1783  * @param[out] error
1784  *   Pointer to error structure.
1785  *
1786  * @return
1787  *   0 on success, a negative errno value otherwise and rte_errno is set.
1788  */
1789 static int
1790 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
1791                                     const struct rte_flow_action *action,
1792                                     const uint64_t item_flags,
1793                                     struct rte_flow_error *error)
1794 {
1795         int ret = 0;
1796
1797         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1798         if (!ret) {
1799                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
1800                         return rte_flow_error_set(error, EINVAL,
1801                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1802                                                   NULL,
1803                                                   "no ipv6 item in pattern");
1804         }
1805         return ret;
1806 }
1807
1808 /**
1809  * Validate the modify-header TP actions.
1810  *
1811  * @param[in] action_flags
1812  *   Holds the actions detected until now.
1813  * @param[in] action
1814  *   Pointer to the modify action.
1815  * @param[in] item_flags
1816  *   Holds the items detected.
1817  * @param[out] error
1818  *   Pointer to error structure.
1819  *
1820  * @return
1821  *   0 on success, a negative errno value otherwise and rte_errno is set.
1822  */
1823 static int
1824 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
1825                                   const struct rte_flow_action *action,
1826                                   const uint64_t item_flags,
1827                                   struct rte_flow_error *error)
1828 {
1829         int ret = 0;
1830
1831         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1832         if (!ret) {
1833                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
1834                         return rte_flow_error_set(error, EINVAL,
1835                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1836                                                   NULL, "no transport layer "
1837                                                   "in pattern");
1838         }
1839         return ret;
1840 }
1841
1842 /**
1843  * Validate the modify-header actions of increment/decrement
1844  * TCP Sequence-number.
1845  *
1846  * @param[in] action_flags
1847  *   Holds the actions detected until now.
1848  * @param[in] action
1849  *   Pointer to the modify action.
1850  * @param[in] item_flags
1851  *   Holds the items detected.
1852  * @param[out] error
1853  *   Pointer to error structure.
1854  *
1855  * @return
1856  *   0 on success, a negative errno value otherwise and rte_errno is set.
1857  */
1858 static int
1859 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
1860                                        const struct rte_flow_action *action,
1861                                        const uint64_t item_flags,
1862                                        struct rte_flow_error *error)
1863 {
1864         int ret = 0;
1865
1866         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1867         if (!ret) {
1868                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
1869                         return rte_flow_error_set(error, EINVAL,
1870                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1871                                                   NULL, "no TCP item in"
1872                                                   " pattern");
1873                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
1874                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
1875                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
1876                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
1877                         return rte_flow_error_set(error, EINVAL,
1878                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1879                                                   NULL,
1880                                                   "cannot decrease and increase"
1881                                                   " TCP sequence number"
1882                                                   " at the same time");
1883         }
1884         return ret;
1885 }
1886
1887 /**
1888  * Validate the modify-header actions of increment/decrement
1889  * TCP Acknowledgment number.
1890  *
1891  * @param[in] action_flags
1892  *   Holds the actions detected until now.
1893  * @param[in] action
1894  *   Pointer to the modify action.
1895  * @param[in] item_flags
1896  *   Holds the items detected.
1897  * @param[out] error
1898  *   Pointer to error structure.
1899  *
1900  * @return
1901  *   0 on success, a negative errno value otherwise and rte_errno is set.
1902  */
1903 static int
1904 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
1905                                        const struct rte_flow_action *action,
1906                                        const uint64_t item_flags,
1907                                        struct rte_flow_error *error)
1908 {
1909         int ret = 0;
1910
1911         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1912         if (!ret) {
1913                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
1914                         return rte_flow_error_set(error, EINVAL,
1915                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1916                                                   NULL, "no TCP item in"
1917                                                   " pattern");
1918                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
1919                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
1920                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
1921                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
1922                         return rte_flow_error_set(error, EINVAL,
1923                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1924                                                   NULL,
1925                                                   "cannot decrease and increase"
1926                                                   " TCP acknowledgment number"
1927                                                   " at the same time");
1928         }
1929         return ret;
1930 }
1931
1932 /**
1933  * Validate the modify-header TTL actions.
1934  *
1935  * @param[in] action_flags
1936  *   Holds the actions detected until now.
1937  * @param[in] action
1938  *   Pointer to the modify action.
1939  * @param[in] item_flags
1940  *   Holds the items detected.
1941  * @param[out] error
1942  *   Pointer to error structure.
1943  *
1944  * @return
1945  *   0 on success, a negative errno value otherwise and rte_errno is set.
1946  */
1947 static int
1948 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
1949                                    const struct rte_flow_action *action,
1950                                    const uint64_t item_flags,
1951                                    struct rte_flow_error *error)
1952 {
1953         int ret = 0;
1954
1955         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1956         if (!ret) {
1957                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
1958                         return rte_flow_error_set(error, EINVAL,
1959                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1960                                                   NULL,
1961                                                   "no IP protocol in pattern");
1962         }
1963         return ret;
1964 }
1965
1966 /**
1967  * Validate jump action.
1968  *
1969  * @param[in] action
1970  *   Pointer to the modify action.
1971  * @param[in] group
1972  *   The group of the current flow.
1973  * @param[out] error
1974  *   Pointer to error structure.
1975  *
1976  * @return
1977  *   0 on success, a negative errno value otherwise and rte_errno is set.
1978  */
1979 static int
1980 flow_dv_validate_action_jump(const struct rte_flow_action *action,
1981                              uint32_t group,
1982                              struct rte_flow_error *error)
1983 {
1984         if (action->type != RTE_FLOW_ACTION_TYPE_JUMP && !action->conf)
1985                 return rte_flow_error_set(error, EINVAL,
1986                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1987                                           NULL, "action configuration not set");
1988         if (group >= ((const struct rte_flow_action_jump *)action->conf)->group)
1989                 return rte_flow_error_set(error, EINVAL,
1990                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1991                                           "target group must be higher then"
1992                                           " the current flow group");
1993         return 0;
1994 }
1995
1996 /*
1997  * Validate the port_id action.
1998  *
1999  * @param[in] dev
2000  *   Pointer to rte_eth_dev structure.
2001  * @param[in] action_flags
2002  *   Bit-fields that holds the actions detected until now.
2003  * @param[in] action
2004  *   Port_id RTE action structure.
2005  * @param[in] attr
2006  *   Attributes of flow that includes this action.
2007  * @param[out] error
2008  *   Pointer to error structure.
2009  *
2010  * @return
2011  *   0 on success, a negative errno value otherwise and rte_errno is set.
2012  */
2013 static int
2014 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
2015                                 uint64_t action_flags,
2016                                 const struct rte_flow_action *action,
2017                                 const struct rte_flow_attr *attr,
2018                                 struct rte_flow_error *error)
2019 {
2020         const struct rte_flow_action_port_id *port_id;
2021         uint16_t port;
2022         uint16_t esw_domain_id;
2023         uint16_t act_port_domain_id;
2024         int ret;
2025
2026         if (!attr->transfer)
2027                 return rte_flow_error_set(error, ENOTSUP,
2028                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2029                                           NULL,
2030                                           "port id action is valid in transfer"
2031                                           " mode only");
2032         if (!action || !action->conf)
2033                 return rte_flow_error_set(error, ENOTSUP,
2034                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2035                                           NULL,
2036                                           "port id action parameters must be"
2037                                           " specified");
2038         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
2039                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2042                                           "can have only one fate actions in"
2043                                           " a flow");
2044         ret = mlx5_port_to_eswitch_info(dev->data->port_id,
2045                                         &esw_domain_id, NULL);
2046         if (ret < 0)
2047                 return rte_flow_error_set(error, -ret,
2048                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2049                                           NULL,
2050                                           "failed to obtain E-Switch info");
2051         port_id = action->conf;
2052         port = port_id->original ? dev->data->port_id : port_id->id;
2053         ret = mlx5_port_to_eswitch_info(port, &act_port_domain_id, NULL);
2054         if (ret)
2055                 return rte_flow_error_set
2056                                 (error, -ret,
2057                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
2058                                  "failed to obtain E-Switch port id for port");
2059         if (act_port_domain_id != esw_domain_id)
2060                 return rte_flow_error_set
2061                                 (error, -ret,
2062                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2063                                  "port does not belong to"
2064                                  " E-Switch being configured");
2065         return 0;
2066 }
2067
2068 /**
2069  * Find existing modify-header resource or create and register a new one.
2070  *
2071  * @param dev[in, out]
2072  *   Pointer to rte_eth_dev structure.
2073  * @param[in, out] resource
2074  *   Pointer to modify-header resource.
2075  * @parm[in, out] dev_flow
2076  *   Pointer to the dev_flow.
2077  * @param[out] error
2078  *   pointer to error structure.
2079  *
2080  * @return
2081  *   0 on success otherwise -errno and errno is set.
2082  */
2083 static int
2084 flow_dv_modify_hdr_resource_register
2085                         (struct rte_eth_dev *dev,
2086                          struct mlx5_flow_dv_modify_hdr_resource *resource,
2087                          struct mlx5_flow *dev_flow,
2088                          struct rte_flow_error *error)
2089 {
2090         struct mlx5_priv *priv = dev->data->dev_private;
2091         struct mlx5_ibv_shared *sh = priv->sh;
2092         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
2093         struct mlx5dv_dr_domain *ns;
2094
2095         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2096                 ns = sh->fdb_domain;
2097         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
2098                 ns = sh->tx_domain;
2099         else
2100                 ns = sh->rx_domain;
2101         resource->flags =
2102                 dev_flow->flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
2103         /* Lookup a matching resource from cache. */
2104         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
2105                 if (resource->ft_type == cache_resource->ft_type &&
2106                     resource->actions_num == cache_resource->actions_num &&
2107                     resource->flags == cache_resource->flags &&
2108                     !memcmp((const void *)resource->actions,
2109                             (const void *)cache_resource->actions,
2110                             (resource->actions_num *
2111                                             sizeof(resource->actions[0])))) {
2112                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
2113                                 (void *)cache_resource,
2114                                 rte_atomic32_read(&cache_resource->refcnt));
2115                         rte_atomic32_inc(&cache_resource->refcnt);
2116                         dev_flow->dv.modify_hdr = cache_resource;
2117                         return 0;
2118                 }
2119         }
2120         /* Register new modify-header resource. */
2121         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2122         if (!cache_resource)
2123                 return rte_flow_error_set(error, ENOMEM,
2124                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2125                                           "cannot allocate resource memory");
2126         *cache_resource = *resource;
2127         cache_resource->verbs_action =
2128                 mlx5_glue->dv_create_flow_action_modify_header
2129                                         (sh->ctx, cache_resource->ft_type,
2130                                          ns, cache_resource->flags,
2131                                          cache_resource->actions_num *
2132                                          sizeof(cache_resource->actions[0]),
2133                                          (uint64_t *)cache_resource->actions);
2134         if (!cache_resource->verbs_action) {
2135                 rte_free(cache_resource);
2136                 return rte_flow_error_set(error, ENOMEM,
2137                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2138                                           NULL, "cannot create action");
2139         }
2140         rte_atomic32_init(&cache_resource->refcnt);
2141         rte_atomic32_inc(&cache_resource->refcnt);
2142         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
2143         dev_flow->dv.modify_hdr = cache_resource;
2144         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
2145                 (void *)cache_resource,
2146                 rte_atomic32_read(&cache_resource->refcnt));
2147         return 0;
2148 }
2149
2150 #define MLX5_CNT_CONTAINER_SIZE 64
2151 #define MLX5_CNT_CONTAINER(priv, batch) (&(priv)->sh->cmng.ccont[batch])
2152
2153 /**
2154  * Get a pool by a counter.
2155  *
2156  * @param[in] cnt
2157  *   Pointer to the counter.
2158  *
2159  * @return
2160  *   The counter pool.
2161  */
2162 static struct mlx5_flow_counter_pool *
2163 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
2164 {
2165         if (!cnt->batch) {
2166                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
2167                 return (struct mlx5_flow_counter_pool *)cnt - 1;
2168         }
2169         return cnt->pool;
2170 }
2171
2172 /**
2173  * Get a pool by devx counter ID.
2174  *
2175  * @param[in] cont
2176  *   Pointer to the counter container.
2177  * @param[in] id
2178  *   The counter devx ID.
2179  *
2180  * @return
2181  *   The counter pool pointer if exists, NULL otherwise,
2182  */
2183 static struct mlx5_flow_counter_pool *
2184 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
2185 {
2186         struct mlx5_flow_counter_pool *pool;
2187
2188         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2189                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
2190                                 MLX5_COUNTERS_PER_POOL;
2191
2192                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
2193                         return pool;
2194         };
2195         return NULL;
2196 }
2197
2198 /**
2199  * Allocate a new memory for the counter values wrapped by all the needed
2200  * management.
2201  *
2202  * @param[in] dev
2203  *   Pointer to the Ethernet device structure.
2204  * @param[in] raws_n
2205  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
2206  *
2207  * @return
2208  *   The new memory management pointer on success, otherwise NULL and rte_errno
2209  *   is set.
2210  */
2211 static struct mlx5_counter_stats_mem_mng *
2212 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
2213 {
2214         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
2215                                         (dev->data->dev_private))->sh;
2216         struct mlx5dv_pd dv_pd;
2217         struct mlx5dv_obj dv_obj;
2218         struct mlx5_devx_mkey_attr mkey_attr;
2219         struct mlx5_counter_stats_mem_mng *mem_mng;
2220         volatile struct flow_counter_stats *raw_data;
2221         int size = (sizeof(struct flow_counter_stats) *
2222                         MLX5_COUNTERS_PER_POOL +
2223                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
2224                         sizeof(struct mlx5_counter_stats_mem_mng);
2225         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
2226         int i;
2227
2228         if (!mem) {
2229                 rte_errno = ENOMEM;
2230                 return NULL;
2231         }
2232         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
2233         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
2234         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
2235                                                  IBV_ACCESS_LOCAL_WRITE);
2236         if (!mem_mng->umem) {
2237                 rte_errno = errno;
2238                 rte_free(mem);
2239                 return NULL;
2240         }
2241         dv_obj.pd.in = sh->pd;
2242         dv_obj.pd.out = &dv_pd;
2243         mlx5_glue->dv_init_obj(&dv_obj, MLX5DV_OBJ_PD);
2244         mkey_attr.addr = (uintptr_t)mem;
2245         mkey_attr.size = size;
2246         mkey_attr.umem_id = mem_mng->umem->umem_id;
2247         mkey_attr.pd = dv_pd.pdn;
2248         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
2249         if (!mem_mng->dm) {
2250                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
2251                 rte_errno = errno;
2252                 rte_free(mem);
2253                 return NULL;
2254         }
2255         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
2256         raw_data = (volatile struct flow_counter_stats *)mem;
2257         for (i = 0; i < raws_n; ++i) {
2258                 mem_mng->raws[i].mem_mng = mem_mng;
2259                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
2260         }
2261         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
2262         return mem_mng;
2263 }
2264
2265 /**
2266  * Prepare a counter container.
2267  *
2268  * @param[in] dev
2269  *   Pointer to the Ethernet device structure.
2270  * @param[in] batch
2271  *   Whether the pool is for counter that was allocated by batch command.
2272  *
2273  * @return
2274  *   The container pointer on success, otherwise NULL and rte_errno is set.
2275  */
2276 static struct mlx5_pools_container *
2277 flow_dv_container_prepare(struct rte_eth_dev *dev, uint32_t batch)
2278 {
2279         struct mlx5_priv *priv = dev->data->dev_private;
2280         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv, batch);
2281         struct mlx5_counter_stats_mem_mng *mem_mng;
2282         uint32_t size = MLX5_CNT_CONTAINER_SIZE;
2283         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * size;
2284
2285         cont->pools = rte_calloc(__func__, 1, mem_size, 0);
2286         if (!cont->pools) {
2287                 rte_errno = ENOMEM;
2288                 return NULL;
2289         }
2290         mem_mng = flow_dv_create_counter_stat_mem_mng(dev, size);
2291         if (!mem_mng) {
2292                 rte_free(cont->pools);
2293                 return NULL;
2294         }
2295         cont->n = size;
2296         TAILQ_INIT(&cont->pool_list);
2297         cont->init_mem_mng = mem_mng;
2298         return cont;
2299 }
2300
2301 /**
2302  * Query a devx flow counter.
2303  *
2304  * @param[in] dev
2305  *   Pointer to the Ethernet device structure.
2306  * @param[in] cnt
2307  *   Pointer to the flow counter.
2308  * @param[out] pkts
2309  *   The statistics value of packets.
2310  * @param[out] bytes
2311  *   The statistics value of bytes.
2312  *
2313  * @return
2314  *   0 on success, otherwise a negative errno value and rte_errno is set.
2315  */
2316 static inline int
2317 _flow_dv_query_count(struct rte_eth_dev *dev __rte_unused,
2318                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
2319                      uint64_t *bytes)
2320 {
2321         struct mlx5_flow_counter_pool *pool =
2322                         flow_dv_counter_pool_get(cnt);
2323         uint16_t offset = pool->min_dcs->id % MLX5_COUNTERS_PER_POOL;
2324         int ret = mlx5_devx_cmd_flow_counter_query
2325                 (pool->min_dcs, 0, MLX5_COUNTERS_PER_POOL - offset, NULL,
2326                  NULL, pool->raw->mem_mng->dm->id,
2327                  (void *)(uintptr_t)(pool->raw->data +
2328                  offset));
2329
2330         if (ret) {
2331                 DRV_LOG(ERR, "Failed to trigger synchronous"
2332                         " query for dcs ID %d\n",
2333                         pool->min_dcs->id);
2334                 return ret;
2335         }
2336         offset = cnt - &pool->counters_raw[0];
2337         *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
2338         *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
2339         return 0;
2340 }
2341
2342 /**
2343  * Create and initialize a new counter pool.
2344  *
2345  * @param[in] dev
2346  *   Pointer to the Ethernet device structure.
2347  * @param[out] dcs
2348  *   The devX counter handle.
2349  * @param[in] batch
2350  *   Whether the pool is for counter that was allocated by batch command.
2351  *
2352  * @return
2353  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
2354  */
2355 static struct mlx5_flow_counter_pool *
2356 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
2357                     uint32_t batch)
2358 {
2359         struct mlx5_priv *priv = dev->data->dev_private;
2360         struct mlx5_flow_counter_pool *pool;
2361         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv, batch);
2362         uint32_t size;
2363
2364         if (!cont->n) {
2365                 cont = flow_dv_container_prepare(dev, batch);
2366                 if (!cont)
2367                         return NULL;
2368         } else if (cont->n == cont->n_valid) {
2369                 DRV_LOG(ERR, "No space in container to allocate a new pool\n");
2370                 rte_errno = ENOSPC;
2371                 return NULL;
2372         }
2373         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
2374                         sizeof(struct mlx5_flow_counter);
2375         pool = rte_calloc(__func__, 1, size, 0);
2376         if (!pool) {
2377                 rte_errno = ENOMEM;
2378                 return NULL;
2379         }
2380         pool->min_dcs = dcs;
2381         pool->raw = cont->init_mem_mng->raws + cont->n_valid;
2382         TAILQ_INIT(&pool->counters);
2383         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
2384         cont->pools[cont->n_valid] = pool;
2385         cont->n_valid++;
2386         return pool;
2387 }
2388
2389 /**
2390  * Prepare a new counter and/or a new counter pool.
2391  *
2392  * @param[in] dev
2393  *   Pointer to the Ethernet device structure.
2394  * @param[out] cnt_free
2395  *   Where to put the pointer of a new counter.
2396  * @param[in] batch
2397  *   Whether the pool is for counter that was allocated by batch command.
2398  *
2399  * @return
2400  *   The free counter pool pointer and @p cnt_free is set on success,
2401  *   NULL otherwise and rte_errno is set.
2402  */
2403 static struct mlx5_flow_counter_pool *
2404 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
2405                              struct mlx5_flow_counter **cnt_free,
2406                              uint32_t batch)
2407 {
2408         struct mlx5_priv *priv = dev->data->dev_private;
2409         struct mlx5_flow_counter_pool *pool;
2410         struct mlx5_devx_obj *dcs = NULL;
2411         struct mlx5_flow_counter *cnt;
2412         uint32_t i;
2413
2414         if (!batch) {
2415                 /* bulk_bitmap must be 0 for single counter allocation. */
2416                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
2417                 if (!dcs)
2418                         return NULL;
2419                 pool = flow_dv_find_pool_by_id(MLX5_CNT_CONTAINER(priv, batch),
2420                                                dcs->id);
2421                 if (!pool) {
2422                         pool = flow_dv_pool_create(dev, dcs, batch);
2423                         if (!pool) {
2424                                 mlx5_devx_cmd_destroy(dcs);
2425                                 return NULL;
2426                         }
2427                 } else if (dcs->id < pool->min_dcs->id) {
2428                         pool->min_dcs->id = dcs->id;
2429                 }
2430                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
2431                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
2432                 cnt->dcs = dcs;
2433                 *cnt_free = cnt;
2434                 return pool;
2435         }
2436         /* bulk_bitmap is in 128 counters units. */
2437         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
2438                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
2439         if (!dcs) {
2440                 rte_errno = ENODATA;
2441                 return NULL;
2442         }
2443         pool = flow_dv_pool_create(dev, dcs, batch);
2444         if (!pool) {
2445                 mlx5_devx_cmd_destroy(dcs);
2446                 return NULL;
2447         }
2448         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
2449                 cnt = &pool->counters_raw[i];
2450                 cnt->pool = pool;
2451                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
2452         }
2453         *cnt_free = &pool->counters_raw[0];
2454         return pool;
2455 }
2456
2457 /**
2458  * Search for existed shared counter.
2459  *
2460  * @param[in] cont
2461  *   Pointer to the relevant counter pool container.
2462  * @param[in] id
2463  *   The shared counter ID to search.
2464  *
2465  * @return
2466  *   NULL if not existed, otherwise pointer to the shared counter.
2467  */
2468 static struct mlx5_flow_counter *
2469 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
2470                               uint32_t id)
2471 {
2472         static struct mlx5_flow_counter *cnt;
2473         struct mlx5_flow_counter_pool *pool;
2474         int i;
2475
2476         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2477                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
2478                         cnt = &pool->counters_raw[i];
2479                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
2480                                 return cnt;
2481                 }
2482         }
2483         return NULL;
2484 }
2485
2486 /**
2487  * Allocate a flow counter.
2488  *
2489  * @param[in] dev
2490  *   Pointer to the Ethernet device structure.
2491  * @param[in] shared
2492  *   Indicate if this counter is shared with other flows.
2493  * @param[in] id
2494  *   Counter identifier.
2495  * @param[in] group
2496  *   Counter flow group.
2497  *
2498  * @return
2499  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
2500  */
2501 static struct mlx5_flow_counter *
2502 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
2503                       uint16_t group)
2504 {
2505         struct mlx5_priv *priv = dev->data->dev_private;
2506         struct mlx5_flow_counter_pool *pool = NULL;
2507         struct mlx5_flow_counter *cnt_free = NULL;
2508         /*
2509          * Currently group 0 flow counter cannot be assigned to a flow if it is
2510          * not the first one in the batch counter allocation, so it is better
2511          * to allocate counters one by one for these flows in a separate
2512          * container.
2513          * A counter can be shared between different groups so need to take
2514          * shared counters from the single container.
2515          */
2516         uint32_t batch = (group && !shared) ? 1 : 0;
2517         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv, batch);
2518
2519         if (!priv->config.devx) {
2520                 rte_errno = ENOTSUP;
2521                 return NULL;
2522         }
2523         if (shared) {
2524                 cnt_free = flow_dv_counter_shared_search(cont, id);
2525                 if (cnt_free) {
2526                         if (cnt_free->ref_cnt + 1 == 0) {
2527                                 rte_errno = E2BIG;
2528                                 return NULL;
2529                         }
2530                         cnt_free->ref_cnt++;
2531                         return cnt_free;
2532                 }
2533         }
2534         /* Pools which has a free counters are in the start. */
2535         pool = TAILQ_FIRST(&cont->pool_list);
2536         if (pool)
2537                 cnt_free = TAILQ_FIRST(&pool->counters);
2538         if (!cnt_free) {
2539                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
2540                 if (!pool)
2541                         return NULL;
2542         }
2543         cnt_free->batch = batch;
2544         /* Create a DV counter action only in the first time usage. */
2545         if (!cnt_free->action) {
2546                 uint16_t offset;
2547                 struct mlx5_devx_obj *dcs;
2548
2549                 if (batch) {
2550                         offset = cnt_free - &pool->counters_raw[0];
2551                         dcs = pool->min_dcs;
2552                 } else {
2553                         offset = 0;
2554                         dcs = cnt_free->dcs;
2555                 }
2556                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
2557                                         (dcs->obj, offset);
2558                 if (!cnt_free->action) {
2559                         rte_errno = errno;
2560                         return NULL;
2561                 }
2562         }
2563         /* Update the counter reset values. */
2564         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
2565                                  &cnt_free->bytes))
2566                 return NULL;
2567         cnt_free->shared = shared;
2568         cnt_free->ref_cnt = 1;
2569         cnt_free->id = id;
2570         TAILQ_REMOVE(&pool->counters, cnt_free, next);
2571         if (TAILQ_EMPTY(&pool->counters)) {
2572                 /* Move the pool to the end of the container pool list. */
2573                 TAILQ_REMOVE(&cont->pool_list, pool, next);
2574                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
2575         }
2576         return cnt_free;
2577 }
2578
2579 /**
2580  * Release a flow counter.
2581  *
2582  * @param[in] dev
2583  *   Pointer to the Ethernet device structure.
2584  * @param[in] counter
2585  *   Pointer to the counter handler.
2586  */
2587 static void
2588 flow_dv_counter_release(struct rte_eth_dev *dev __rte_unused,
2589                         struct mlx5_flow_counter *counter)
2590 {
2591         if (!counter)
2592                 return;
2593         if (--counter->ref_cnt == 0) {
2594                 struct mlx5_flow_counter_pool *pool =
2595                                 flow_dv_counter_pool_get(counter);
2596
2597                 /* Put the counter in the end - the earliest one. */
2598                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
2599         }
2600 }
2601
2602 /**
2603  * Verify the @p attributes will be correctly understood by the NIC and store
2604  * them in the @p flow if everything is correct.
2605  *
2606  * @param[in] dev
2607  *   Pointer to dev struct.
2608  * @param[in] attributes
2609  *   Pointer to flow attributes
2610  * @param[out] error
2611  *   Pointer to error structure.
2612  *
2613  * @return
2614  *   0 on success, a negative errno value otherwise and rte_errno is set.
2615  */
2616 static int
2617 flow_dv_validate_attributes(struct rte_eth_dev *dev,
2618                             const struct rte_flow_attr *attributes,
2619                             struct rte_flow_error *error)
2620 {
2621         struct mlx5_priv *priv = dev->data->dev_private;
2622         uint32_t priority_max = priv->config.flow_prio - 1;
2623
2624 #ifndef HAVE_MLX5DV_DR
2625         if (attributes->group)
2626                 return rte_flow_error_set(error, ENOTSUP,
2627                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
2628                                           NULL,
2629                                           "groups is not supported");
2630 #endif
2631         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
2632             attributes->priority >= priority_max)
2633                 return rte_flow_error_set(error, ENOTSUP,
2634                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
2635                                           NULL,
2636                                           "priority out of range");
2637         if (attributes->transfer) {
2638                 if (!priv->config.dv_esw_en)
2639                         return rte_flow_error_set
2640                                 (error, ENOTSUP,
2641                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2642                                  "E-Switch dr is not supported");
2643                 if (!(priv->representor || priv->master))
2644                         return rte_flow_error_set
2645                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2646                                  NULL, "E-Switch configurationd can only be"
2647                                  " done by a master or a representor device");
2648                 if (attributes->egress)
2649                         return rte_flow_error_set
2650                                 (error, ENOTSUP,
2651                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
2652                                  "egress is not supported");
2653                 if (attributes->group >= MLX5_MAX_TABLES_FDB)
2654                         return rte_flow_error_set
2655                                 (error, EINVAL,
2656                                  RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
2657                                  NULL, "group must be smaller than "
2658                                  RTE_STR(MLX5_MAX_FDB_TABLES));
2659         }
2660         if (!(attributes->egress ^ attributes->ingress))
2661                 return rte_flow_error_set(error, ENOTSUP,
2662                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
2663                                           "must specify exactly one of "
2664                                           "ingress or egress");
2665         return 0;
2666 }
2667
2668 /**
2669  * Internal validation function. For validating both actions and items.
2670  *
2671  * @param[in] dev
2672  *   Pointer to the rte_eth_dev structure.
2673  * @param[in] attr
2674  *   Pointer to the flow attributes.
2675  * @param[in] items
2676  *   Pointer to the list of items.
2677  * @param[in] actions
2678  *   Pointer to the list of actions.
2679  * @param[out] error
2680  *   Pointer to the error structure.
2681  *
2682  * @return
2683  *   0 on success, a negative errno value otherwise and rte_errno is set.
2684  */
2685 static int
2686 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
2687                  const struct rte_flow_item items[],
2688                  const struct rte_flow_action actions[],
2689                  struct rte_flow_error *error)
2690 {
2691         int ret;
2692         uint64_t action_flags = 0;
2693         uint64_t item_flags = 0;
2694         uint64_t last_item = 0;
2695         uint8_t next_protocol = 0xff;
2696         int actions_n = 0;
2697         const struct rte_flow_item *gre_item = NULL;
2698         struct rte_flow_item_tcp nic_tcp_mask = {
2699                 .hdr = {
2700                         .tcp_flags = 0xFF,
2701                         .src_port = RTE_BE16(UINT16_MAX),
2702                         .dst_port = RTE_BE16(UINT16_MAX),
2703                 }
2704         };
2705
2706         if (items == NULL)
2707                 return -1;
2708         ret = flow_dv_validate_attributes(dev, attr, error);
2709         if (ret < 0)
2710                 return ret;
2711         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2712                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2713                 switch (items->type) {
2714                 case RTE_FLOW_ITEM_TYPE_VOID:
2715                         break;
2716                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
2717                         ret = flow_dv_validate_item_port_id
2718                                         (dev, items, attr, item_flags, error);
2719                         if (ret < 0)
2720                                 return ret;
2721                         last_item |= MLX5_FLOW_ITEM_PORT_ID;
2722                         break;
2723                 case RTE_FLOW_ITEM_TYPE_ETH:
2724                         ret = mlx5_flow_validate_item_eth(items, item_flags,
2725                                                           error);
2726                         if (ret < 0)
2727                                 return ret;
2728                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2729                                              MLX5_FLOW_LAYER_OUTER_L2;
2730                         break;
2731                 case RTE_FLOW_ITEM_TYPE_VLAN:
2732                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
2733                                                            error);
2734                         if (ret < 0)
2735                                 return ret;
2736                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2737                                              MLX5_FLOW_LAYER_OUTER_VLAN;
2738                         break;
2739                 case RTE_FLOW_ITEM_TYPE_IPV4:
2740                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
2741                                                            NULL, error);
2742                         if (ret < 0)
2743                                 return ret;
2744                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
2745                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2746                         if (items->mask != NULL &&
2747                             ((const struct rte_flow_item_ipv4 *)
2748                              items->mask)->hdr.next_proto_id) {
2749                                 next_protocol =
2750                                         ((const struct rte_flow_item_ipv4 *)
2751                                          (items->spec))->hdr.next_proto_id;
2752                                 next_protocol &=
2753                                         ((const struct rte_flow_item_ipv4 *)
2754                                          (items->mask))->hdr.next_proto_id;
2755                         } else {
2756                                 /* Reset for inner layer. */
2757                                 next_protocol = 0xff;
2758                         }
2759                         mlx5_flow_tunnel_ip_check(items, &last_item);
2760                         break;
2761                 case RTE_FLOW_ITEM_TYPE_IPV6:
2762                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
2763                                                            NULL, error);
2764                         if (ret < 0)
2765                                 return ret;
2766                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
2767                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2768                         if (items->mask != NULL &&
2769                             ((const struct rte_flow_item_ipv6 *)
2770                              items->mask)->hdr.proto) {
2771                                 next_protocol =
2772                                         ((const struct rte_flow_item_ipv6 *)
2773                                          items->spec)->hdr.proto;
2774                                 next_protocol &=
2775                                         ((const struct rte_flow_item_ipv6 *)
2776                                          items->mask)->hdr.proto;
2777                         } else {
2778                                 /* Reset for inner layer. */
2779                                 next_protocol = 0xff;
2780                         }
2781                         mlx5_flow_tunnel_ip_check(items, &last_item);
2782                         break;
2783                 case RTE_FLOW_ITEM_TYPE_TCP:
2784                         ret = mlx5_flow_validate_item_tcp
2785                                                 (items, item_flags,
2786                                                  next_protocol,
2787                                                  &nic_tcp_mask,
2788                                                  error);
2789                         if (ret < 0)
2790                                 return ret;
2791                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
2792                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
2793                         break;
2794                 case RTE_FLOW_ITEM_TYPE_UDP:
2795                         ret = mlx5_flow_validate_item_udp(items, item_flags,
2796                                                           next_protocol,
2797                                                           error);
2798                         if (ret < 0)
2799                                 return ret;
2800                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
2801                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
2802                         break;
2803                 case RTE_FLOW_ITEM_TYPE_GRE:
2804                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2805                         ret = mlx5_flow_validate_item_gre(items, item_flags,
2806                                                           next_protocol, error);
2807                         if (ret < 0)
2808                                 return ret;
2809                         gre_item = items;
2810                         last_item = MLX5_FLOW_LAYER_GRE;
2811                         break;
2812                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
2813                         ret = mlx5_flow_validate_item_gre_key
2814                                 (items, item_flags, gre_item, error);
2815                         if (ret < 0)
2816                                 return ret;
2817                         item_flags |= MLX5_FLOW_LAYER_GRE_KEY;
2818                         break;
2819                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2820                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
2821                                                             error);
2822                         if (ret < 0)
2823                                 return ret;
2824                         last_item = MLX5_FLOW_LAYER_VXLAN;
2825                         break;
2826                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2827                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
2828                                                                 item_flags, dev,
2829                                                                 error);
2830                         if (ret < 0)
2831                                 return ret;
2832                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
2833                         break;
2834                 case RTE_FLOW_ITEM_TYPE_MPLS:
2835                         ret = mlx5_flow_validate_item_mpls(dev, items,
2836                                                            item_flags,
2837                                                            last_item, error);
2838                         if (ret < 0)
2839                                 return ret;
2840                         last_item = MLX5_FLOW_LAYER_MPLS;
2841                         break;
2842                 case RTE_FLOW_ITEM_TYPE_META:
2843                         ret = flow_dv_validate_item_meta(dev, items, attr,
2844                                                          error);
2845                         if (ret < 0)
2846                                 return ret;
2847                         last_item = MLX5_FLOW_ITEM_METADATA;
2848                         break;
2849                 case RTE_FLOW_ITEM_TYPE_ICMP:
2850                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
2851                                                            next_protocol,
2852                                                            error);
2853                         if (ret < 0)
2854                                 return ret;
2855                         item_flags |= MLX5_FLOW_LAYER_ICMP;
2856                         break;
2857                 case RTE_FLOW_ITEM_TYPE_ICMP6:
2858                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
2859                                                             next_protocol,
2860                                                             error);
2861                         if (ret < 0)
2862                                 return ret;
2863                         item_flags |= MLX5_FLOW_LAYER_ICMP6;
2864                         break;
2865                 default:
2866                         return rte_flow_error_set(error, ENOTSUP,
2867                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2868                                                   NULL, "item not supported");
2869                 }
2870                 item_flags |= last_item;
2871         }
2872         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2873                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
2874                         return rte_flow_error_set(error, ENOTSUP,
2875                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2876                                                   actions, "too many actions");
2877                 switch (actions->type) {
2878                 case RTE_FLOW_ACTION_TYPE_VOID:
2879                         break;
2880                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
2881                         ret = flow_dv_validate_action_port_id(dev,
2882                                                               action_flags,
2883                                                               actions,
2884                                                               attr,
2885                                                               error);
2886                         if (ret)
2887                                 return ret;
2888                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
2889                         ++actions_n;
2890                         break;
2891                 case RTE_FLOW_ACTION_TYPE_FLAG:
2892                         ret = mlx5_flow_validate_action_flag(action_flags,
2893                                                              attr, error);
2894                         if (ret < 0)
2895                                 return ret;
2896                         action_flags |= MLX5_FLOW_ACTION_FLAG;
2897                         ++actions_n;
2898                         break;
2899                 case RTE_FLOW_ACTION_TYPE_MARK:
2900                         ret = mlx5_flow_validate_action_mark(actions,
2901                                                              action_flags,
2902                                                              attr, error);
2903                         if (ret < 0)
2904                                 return ret;
2905                         action_flags |= MLX5_FLOW_ACTION_MARK;
2906                         ++actions_n;
2907                         break;
2908                 case RTE_FLOW_ACTION_TYPE_DROP:
2909                         ret = mlx5_flow_validate_action_drop(action_flags,
2910                                                              attr, error);
2911                         if (ret < 0)
2912                                 return ret;
2913                         action_flags |= MLX5_FLOW_ACTION_DROP;
2914                         ++actions_n;
2915                         break;
2916                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2917                         ret = mlx5_flow_validate_action_queue(actions,
2918                                                               action_flags, dev,
2919                                                               attr, error);
2920                         if (ret < 0)
2921                                 return ret;
2922                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
2923                         ++actions_n;
2924                         break;
2925                 case RTE_FLOW_ACTION_TYPE_RSS:
2926                         ret = mlx5_flow_validate_action_rss(actions,
2927                                                             action_flags, dev,
2928                                                             attr, item_flags,
2929                                                             error);
2930                         if (ret < 0)
2931                                 return ret;
2932                         action_flags |= MLX5_FLOW_ACTION_RSS;
2933                         ++actions_n;
2934                         break;
2935                 case RTE_FLOW_ACTION_TYPE_COUNT:
2936                         ret = flow_dv_validate_action_count(dev, error);
2937                         if (ret < 0)
2938                                 return ret;
2939                         action_flags |= MLX5_FLOW_ACTION_COUNT;
2940                         ++actions_n;
2941                         break;
2942                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2943                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2944                         ret = flow_dv_validate_action_l2_encap(action_flags,
2945                                                                actions, attr,
2946                                                                error);
2947                         if (ret < 0)
2948                                 return ret;
2949                         action_flags |= actions->type ==
2950                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
2951                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
2952                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
2953                         ++actions_n;
2954                         break;
2955                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
2956                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
2957                         ret = flow_dv_validate_action_l2_decap(action_flags,
2958                                                                attr, error);
2959                         if (ret < 0)
2960                                 return ret;
2961                         action_flags |= actions->type ==
2962                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
2963                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
2964                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
2965                         ++actions_n;
2966                         break;
2967                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2968                         ret = flow_dv_validate_action_raw_encap(action_flags,
2969                                                                 actions, attr,
2970                                                                 error);
2971                         if (ret < 0)
2972                                 return ret;
2973                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
2974                         ++actions_n;
2975                         break;
2976                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
2977                         ret = flow_dv_validate_action_raw_decap(action_flags,
2978                                                                 actions, attr,
2979                                                                 error);
2980                         if (ret < 0)
2981                                 return ret;
2982                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
2983                         ++actions_n;
2984                         break;
2985                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
2986                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
2987                         ret = flow_dv_validate_action_modify_mac(action_flags,
2988                                                                  actions,
2989                                                                  item_flags,
2990                                                                  error);
2991                         if (ret < 0)
2992                                 return ret;
2993                         /* Count all modify-header actions as one action. */
2994                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
2995                                 ++actions_n;
2996                         action_flags |= actions->type ==
2997                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
2998                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
2999                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
3000                         break;
3001
3002                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3003                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3004                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
3005                                                                   actions,
3006                                                                   item_flags,
3007                                                                   error);
3008                         if (ret < 0)
3009                                 return ret;
3010                         /* Count all modify-header actions as one action. */
3011                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3012                                 ++actions_n;
3013                         action_flags |= actions->type ==
3014                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
3015                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
3016                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
3017                         break;
3018                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3019                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3020                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
3021                                                                   actions,
3022                                                                   item_flags,
3023                                                                   error);
3024                         if (ret < 0)
3025                                 return ret;
3026                         /* Count all modify-header actions as one action. */
3027                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3028                                 ++actions_n;
3029                         action_flags |= actions->type ==
3030                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
3031                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
3032                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
3033                         break;
3034                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3035                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3036                         ret = flow_dv_validate_action_modify_tp(action_flags,
3037                                                                 actions,
3038                                                                 item_flags,
3039                                                                 error);
3040                         if (ret < 0)
3041                                 return ret;
3042                         /* Count all modify-header actions as one action. */
3043                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3044                                 ++actions_n;
3045                         action_flags |= actions->type ==
3046                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
3047                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
3048                                                 MLX5_FLOW_ACTION_SET_TP_DST;
3049                         break;
3050                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3051                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
3052                         ret = flow_dv_validate_action_modify_ttl(action_flags,
3053                                                                  actions,
3054                                                                  item_flags,
3055                                                                  error);
3056                         if (ret < 0)
3057                                 return ret;
3058                         /* Count all modify-header actions as one action. */
3059                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3060                                 ++actions_n;
3061                         action_flags |= actions->type ==
3062                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
3063                                                 MLX5_FLOW_ACTION_SET_TTL :
3064                                                 MLX5_FLOW_ACTION_DEC_TTL;
3065                         break;
3066                 case RTE_FLOW_ACTION_TYPE_JUMP:
3067                         ret = flow_dv_validate_action_jump(actions,
3068                                                            attr->group, error);
3069                         if (ret)
3070                                 return ret;
3071                         ++actions_n;
3072                         action_flags |= MLX5_FLOW_ACTION_JUMP;
3073                         break;
3074                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3075                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3076                         ret = flow_dv_validate_action_modify_tcp_seq
3077                                                                 (action_flags,
3078                                                                  actions,
3079                                                                  item_flags,
3080                                                                  error);
3081                         if (ret < 0)
3082                                 return ret;
3083                         /* Count all modify-header actions as one action. */
3084                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3085                                 ++actions_n;
3086                         action_flags |= actions->type ==
3087                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
3088                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
3089                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
3090                         break;
3091                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3092                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3093                         ret = flow_dv_validate_action_modify_tcp_ack
3094                                                                 (action_flags,
3095                                                                  actions,
3096                                                                  item_flags,
3097                                                                  error);
3098                         if (ret < 0)
3099                                 return ret;
3100                         /* Count all modify-header actions as one action. */
3101                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3102                                 ++actions_n;
3103                         action_flags |= actions->type ==
3104                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
3105                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
3106                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
3107                         break;
3108                 default:
3109                         return rte_flow_error_set(error, ENOTSUP,
3110                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3111                                                   actions,
3112                                                   "action not supported");
3113                 }
3114         }
3115         /* Eswitch has few restrictions on using items and actions */
3116         if (attr->transfer) {
3117                 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3118                         return rte_flow_error_set(error, ENOTSUP,
3119                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3120                                                   NULL,
3121                                                   "unsupported action FLAG");
3122                 if (action_flags & MLX5_FLOW_ACTION_MARK)
3123                         return rte_flow_error_set(error, ENOTSUP,
3124                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3125                                                   NULL,
3126                                                   "unsupported action MARK");
3127                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
3128                         return rte_flow_error_set(error, ENOTSUP,
3129                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3130                                                   NULL,
3131                                                   "unsupported action QUEUE");
3132                 if (action_flags & MLX5_FLOW_ACTION_RSS)
3133                         return rte_flow_error_set(error, ENOTSUP,
3134                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3135                                                   NULL,
3136                                                   "unsupported action RSS");
3137                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3138                         return rte_flow_error_set(error, EINVAL,
3139                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3140                                                   actions,
3141                                                   "no fate action is found");
3142         } else {
3143                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
3144                         return rte_flow_error_set(error, EINVAL,
3145                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3146                                                   actions,
3147                                                   "no fate action is found");
3148         }
3149         return 0;
3150 }
3151
3152 /**
3153  * Internal preparation function. Allocates the DV flow size,
3154  * this size is constant.
3155  *
3156  * @param[in] attr
3157  *   Pointer to the flow attributes.
3158  * @param[in] items
3159  *   Pointer to the list of items.
3160  * @param[in] actions
3161  *   Pointer to the list of actions.
3162  * @param[out] error
3163  *   Pointer to the error structure.
3164  *
3165  * @return
3166  *   Pointer to mlx5_flow object on success,
3167  *   otherwise NULL and rte_errno is set.
3168  */
3169 static struct mlx5_flow *
3170 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
3171                 const struct rte_flow_item items[] __rte_unused,
3172                 const struct rte_flow_action actions[] __rte_unused,
3173                 struct rte_flow_error *error)
3174 {
3175         uint32_t size = sizeof(struct mlx5_flow);
3176         struct mlx5_flow *flow;
3177
3178         flow = rte_calloc(__func__, 1, size, 0);
3179         if (!flow) {
3180                 rte_flow_error_set(error, ENOMEM,
3181                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3182                                    "not enough memory to create flow");
3183                 return NULL;
3184         }
3185         flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
3186         return flow;
3187 }
3188
3189 #ifndef NDEBUG
3190 /**
3191  * Sanity check for match mask and value. Similar to check_valid_spec() in
3192  * kernel driver. If unmasked bit is present in value, it returns failure.
3193  *
3194  * @param match_mask
3195  *   pointer to match mask buffer.
3196  * @param match_value
3197  *   pointer to match value buffer.
3198  *
3199  * @return
3200  *   0 if valid, -EINVAL otherwise.
3201  */
3202 static int
3203 flow_dv_check_valid_spec(void *match_mask, void *match_value)
3204 {
3205         uint8_t *m = match_mask;
3206         uint8_t *v = match_value;
3207         unsigned int i;
3208
3209         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
3210                 if (v[i] & ~m[i]) {
3211                         DRV_LOG(ERR,
3212                                 "match_value differs from match_criteria"
3213                                 " %p[%u] != %p[%u]",
3214                                 match_value, i, match_mask, i);
3215                         return -EINVAL;
3216                 }
3217         }
3218         return 0;
3219 }
3220 #endif
3221
3222 /**
3223  * Add Ethernet item to matcher and to the value.
3224  *
3225  * @param[in, out] matcher
3226  *   Flow matcher.
3227  * @param[in, out] key
3228  *   Flow matcher value.
3229  * @param[in] item
3230  *   Flow pattern to translate.
3231  * @param[in] inner
3232  *   Item is inner pattern.
3233  */
3234 static void
3235 flow_dv_translate_item_eth(void *matcher, void *key,
3236                            const struct rte_flow_item *item, int inner)
3237 {
3238         const struct rte_flow_item_eth *eth_m = item->mask;
3239         const struct rte_flow_item_eth *eth_v = item->spec;
3240         const struct rte_flow_item_eth nic_mask = {
3241                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3242                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3243                 .type = RTE_BE16(0xffff),
3244         };
3245         void *headers_m;
3246         void *headers_v;
3247         char *l24_v;
3248         unsigned int i;
3249
3250         if (!eth_v)
3251                 return;
3252         if (!eth_m)
3253                 eth_m = &nic_mask;
3254         if (inner) {
3255                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3256                                          inner_headers);
3257                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3258         } else {
3259                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3260                                          outer_headers);
3261                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3262         }
3263         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
3264                &eth_m->dst, sizeof(eth_m->dst));
3265         /* The value must be in the range of the mask. */
3266         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
3267         for (i = 0; i < sizeof(eth_m->dst); ++i)
3268                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
3269         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
3270                &eth_m->src, sizeof(eth_m->src));
3271         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
3272         /* The value must be in the range of the mask. */
3273         for (i = 0; i < sizeof(eth_m->dst); ++i)
3274                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
3275         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
3276                  rte_be_to_cpu_16(eth_m->type));
3277         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
3278         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
3279 }
3280
3281 /**
3282  * Add VLAN item to matcher and to the value.
3283  *
3284  * @param[in, out] matcher
3285  *   Flow matcher.
3286  * @param[in, out] key
3287  *   Flow matcher value.
3288  * @param[in] item
3289  *   Flow pattern to translate.
3290  * @param[in] inner
3291  *   Item is inner pattern.
3292  */
3293 static void
3294 flow_dv_translate_item_vlan(void *matcher, void *key,
3295                             const struct rte_flow_item *item,
3296                             int inner)
3297 {
3298         const struct rte_flow_item_vlan *vlan_m = item->mask;
3299         const struct rte_flow_item_vlan *vlan_v = item->spec;
3300         const struct rte_flow_item_vlan nic_mask = {
3301                 .tci = RTE_BE16(0x0fff),
3302                 .inner_type = RTE_BE16(0xffff),
3303         };
3304         void *headers_m;
3305         void *headers_v;
3306         uint16_t tci_m;
3307         uint16_t tci_v;
3308
3309         if (!vlan_v)
3310                 return;
3311         if (!vlan_m)
3312                 vlan_m = &nic_mask;
3313         if (inner) {
3314                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3315                                          inner_headers);
3316                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3317         } else {
3318                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3319                                          outer_headers);
3320                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3321         }
3322         tci_m = rte_be_to_cpu_16(vlan_m->tci);
3323         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
3324         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
3325         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
3326         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
3327         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
3328         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
3329         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
3330         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
3331         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
3332 }
3333
3334 /**
3335  * Add IPV4 item to matcher and to the value.
3336  *
3337  * @param[in, out] matcher
3338  *   Flow matcher.
3339  * @param[in, out] key
3340  *   Flow matcher value.
3341  * @param[in] item
3342  *   Flow pattern to translate.
3343  * @param[in] inner
3344  *   Item is inner pattern.
3345  * @param[in] group
3346  *   The group to insert the rule.
3347  */
3348 static void
3349 flow_dv_translate_item_ipv4(void *matcher, void *key,
3350                             const struct rte_flow_item *item,
3351                             int inner, uint32_t group)
3352 {
3353         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
3354         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
3355         const struct rte_flow_item_ipv4 nic_mask = {
3356                 .hdr = {
3357                         .src_addr = RTE_BE32(0xffffffff),
3358                         .dst_addr = RTE_BE32(0xffffffff),
3359                         .type_of_service = 0xff,
3360                         .next_proto_id = 0xff,
3361                 },
3362         };
3363         void *headers_m;
3364         void *headers_v;
3365         char *l24_m;
3366         char *l24_v;
3367         uint8_t tos;
3368
3369         if (inner) {
3370                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3371                                          inner_headers);
3372                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3373         } else {
3374                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3375                                          outer_headers);
3376                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3377         }
3378         if (group == 0)
3379                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
3380         else
3381                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
3382         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
3383         if (!ipv4_v)
3384                 return;
3385         if (!ipv4_m)
3386                 ipv4_m = &nic_mask;
3387         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3388                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
3389         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3390                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
3391         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
3392         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
3393         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3394                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
3395         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3396                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
3397         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
3398         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
3399         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
3400         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
3401                  ipv4_m->hdr.type_of_service);
3402         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
3403         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
3404                  ipv4_m->hdr.type_of_service >> 2);
3405         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
3406         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
3407                  ipv4_m->hdr.next_proto_id);
3408         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3409                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
3410 }
3411
3412 /**
3413  * Add IPV6 item to matcher and to the value.
3414  *
3415  * @param[in, out] matcher
3416  *   Flow matcher.
3417  * @param[in, out] key
3418  *   Flow matcher value.
3419  * @param[in] item
3420  *   Flow pattern to translate.
3421  * @param[in] inner
3422  *   Item is inner pattern.
3423  * @param[in] group
3424  *   The group to insert the rule.
3425  */
3426 static void
3427 flow_dv_translate_item_ipv6(void *matcher, void *key,
3428                             const struct rte_flow_item *item,
3429                             int inner, uint32_t group)
3430 {
3431         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
3432         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
3433         const struct rte_flow_item_ipv6 nic_mask = {
3434                 .hdr = {
3435                         .src_addr =
3436                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
3437                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
3438                         .dst_addr =
3439                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
3440                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
3441                         .vtc_flow = RTE_BE32(0xffffffff),
3442                         .proto = 0xff,
3443                         .hop_limits = 0xff,
3444                 },
3445         };
3446         void *headers_m;
3447         void *headers_v;
3448         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3449         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3450         char *l24_m;
3451         char *l24_v;
3452         uint32_t vtc_m;
3453         uint32_t vtc_v;
3454         int i;
3455         int size;
3456
3457         if (inner) {
3458                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3459                                          inner_headers);
3460                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3461         } else {
3462                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3463                                          outer_headers);
3464                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3465         }
3466         if (group == 0)
3467                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
3468         else
3469                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
3470         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
3471         if (!ipv6_v)
3472                 return;
3473         if (!ipv6_m)
3474                 ipv6_m = &nic_mask;
3475         size = sizeof(ipv6_m->hdr.dst_addr);
3476         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3477                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
3478         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3479                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
3480         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
3481         for (i = 0; i < size; ++i)
3482                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
3483         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3484                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
3485         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3486                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
3487         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
3488         for (i = 0; i < size; ++i)
3489                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
3490         /* TOS. */
3491         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
3492         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
3493         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
3494         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
3495         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
3496         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
3497         /* Label. */
3498         if (inner) {
3499                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
3500                          vtc_m);
3501                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
3502                          vtc_v);
3503         } else {
3504                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
3505                          vtc_m);
3506                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
3507                          vtc_v);
3508         }
3509         /* Protocol. */
3510         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
3511                  ipv6_m->hdr.proto);
3512         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3513                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
3514 }
3515
3516 /**
3517  * Add TCP item to matcher and to the value.
3518  *
3519  * @param[in, out] matcher
3520  *   Flow matcher.
3521  * @param[in, out] key
3522  *   Flow matcher value.
3523  * @param[in] item
3524  *   Flow pattern to translate.
3525  * @param[in] inner
3526  *   Item is inner pattern.
3527  */
3528 static void
3529 flow_dv_translate_item_tcp(void *matcher, void *key,
3530                            const struct rte_flow_item *item,
3531                            int inner)
3532 {
3533         const struct rte_flow_item_tcp *tcp_m = item->mask;
3534         const struct rte_flow_item_tcp *tcp_v = item->spec;
3535         void *headers_m;
3536         void *headers_v;
3537
3538         if (inner) {
3539                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3540                                          inner_headers);
3541                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3542         } else {
3543                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3544                                          outer_headers);
3545                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3546         }
3547         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3548         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
3549         if (!tcp_v)
3550                 return;
3551         if (!tcp_m)
3552                 tcp_m = &rte_flow_item_tcp_mask;
3553         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
3554                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
3555         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
3556                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
3557         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
3558                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
3559         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
3560                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
3561         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
3562                  tcp_m->hdr.tcp_flags);
3563         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
3564                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
3565 }
3566
3567 /**
3568  * Add UDP item to matcher and to the value.
3569  *
3570  * @param[in, out] matcher
3571  *   Flow matcher.
3572  * @param[in, out] key
3573  *   Flow matcher value.
3574  * @param[in] item
3575  *   Flow pattern to translate.
3576  * @param[in] inner
3577  *   Item is inner pattern.
3578  */
3579 static void
3580 flow_dv_translate_item_udp(void *matcher, void *key,
3581                            const struct rte_flow_item *item,
3582                            int inner)
3583 {
3584         const struct rte_flow_item_udp *udp_m = item->mask;
3585         const struct rte_flow_item_udp *udp_v = item->spec;
3586         void *headers_m;
3587         void *headers_v;
3588
3589         if (inner) {
3590                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3591                                          inner_headers);
3592                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3593         } else {
3594                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3595                                          outer_headers);
3596                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3597         }
3598         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3599         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
3600         if (!udp_v)
3601                 return;
3602         if (!udp_m)
3603                 udp_m = &rte_flow_item_udp_mask;
3604         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
3605                  rte_be_to_cpu_16(udp_m->hdr.src_port));
3606         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
3607                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
3608         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
3609                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
3610         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
3611                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
3612 }
3613
3614 /**
3615  * Add GRE optional Key item to matcher and to the value.
3616  *
3617  * @param[in, out] matcher
3618  *   Flow matcher.
3619  * @param[in, out] key
3620  *   Flow matcher value.
3621  * @param[in] item
3622  *   Flow pattern to translate.
3623  * @param[in] inner
3624  *   Item is inner pattern.
3625  */
3626 static void
3627 flow_dv_translate_item_gre_key(void *matcher, void *key,
3628                                    const struct rte_flow_item *item)
3629 {
3630         const rte_be32_t *key_m = item->mask;
3631         const rte_be32_t *key_v = item->spec;
3632         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3633         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3634         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
3635
3636         if (!key_v)
3637                 return;
3638         if (!key_m)
3639                 key_m = &gre_key_default_mask;
3640         /* GRE K bit must be on and should already be validated */
3641         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
3642         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
3643         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
3644                  rte_be_to_cpu_32(*key_m) >> 8);
3645         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
3646                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
3647         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
3648                  rte_be_to_cpu_32(*key_m) & 0xFF);
3649         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
3650                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
3651 }
3652
3653 /**
3654  * Add GRE item to matcher and to the value.
3655  *
3656  * @param[in, out] matcher
3657  *   Flow matcher.
3658  * @param[in, out] key
3659  *   Flow matcher value.
3660  * @param[in] item
3661  *   Flow pattern to translate.
3662  * @param[in] inner
3663  *   Item is inner pattern.
3664  */
3665 static void
3666 flow_dv_translate_item_gre(void *matcher, void *key,
3667                            const struct rte_flow_item *item,
3668                            int inner)
3669 {
3670         const struct rte_flow_item_gre *gre_m = item->mask;
3671         const struct rte_flow_item_gre *gre_v = item->spec;
3672         void *headers_m;
3673         void *headers_v;
3674         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3675         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3676         struct {
3677                 union {
3678                         __extension__
3679                         struct {
3680                                 uint16_t version:3;
3681                                 uint16_t rsvd0:9;
3682                                 uint16_t s_present:1;
3683                                 uint16_t k_present:1;
3684                                 uint16_t rsvd_bit1:1;
3685                                 uint16_t c_present:1;
3686                         };
3687                         uint16_t value;
3688                 };
3689         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
3690
3691         if (inner) {
3692                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3693                                          inner_headers);
3694                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3695         } else {
3696                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3697                                          outer_headers);
3698                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3699         }
3700         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3701         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
3702         if (!gre_v)
3703                 return;
3704         if (!gre_m)
3705                 gre_m = &rte_flow_item_gre_mask;
3706         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
3707                  rte_be_to_cpu_16(gre_m->protocol));
3708         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
3709                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
3710         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
3711         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
3712         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
3713                  gre_crks_rsvd0_ver_m.c_present);
3714         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
3715                  gre_crks_rsvd0_ver_v.c_present &
3716                  gre_crks_rsvd0_ver_m.c_present);
3717         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
3718                  gre_crks_rsvd0_ver_m.k_present);
3719         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
3720                  gre_crks_rsvd0_ver_v.k_present &
3721                  gre_crks_rsvd0_ver_m.k_present);
3722         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
3723                  gre_crks_rsvd0_ver_m.s_present);
3724         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
3725                  gre_crks_rsvd0_ver_v.s_present &
3726                  gre_crks_rsvd0_ver_m.s_present);
3727 }
3728
3729 /**
3730  * Add NVGRE item to matcher and to the value.
3731  *
3732  * @param[in, out] matcher
3733  *   Flow matcher.
3734  * @param[in, out] key
3735  *   Flow matcher value.
3736  * @param[in] item
3737  *   Flow pattern to translate.
3738  * @param[in] inner
3739  *   Item is inner pattern.
3740  */
3741 static void
3742 flow_dv_translate_item_nvgre(void *matcher, void *key,
3743                              const struct rte_flow_item *item,
3744                              int inner)
3745 {
3746         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
3747         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
3748         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3749         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3750         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
3751         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
3752         char *gre_key_m;
3753         char *gre_key_v;
3754         int size;
3755         int i;
3756
3757         flow_dv_translate_item_gre(matcher, key, item, inner);
3758         if (!nvgre_v)
3759                 return;
3760         if (!nvgre_m)
3761                 nvgre_m = &rte_flow_item_nvgre_mask;
3762         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
3763         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
3764         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
3765         memcpy(gre_key_m, tni_flow_id_m, size);
3766         for (i = 0; i < size; ++i)
3767                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
3768 }
3769
3770 /**
3771  * Add VXLAN item to matcher and to the value.
3772  *
3773  * @param[in, out] matcher
3774  *   Flow matcher.
3775  * @param[in, out] key
3776  *   Flow matcher value.
3777  * @param[in] item
3778  *   Flow pattern to translate.
3779  * @param[in] inner
3780  *   Item is inner pattern.
3781  */
3782 static void
3783 flow_dv_translate_item_vxlan(void *matcher, void *key,
3784                              const struct rte_flow_item *item,
3785                              int inner)
3786 {
3787         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
3788         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
3789         void *headers_m;
3790         void *headers_v;
3791         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3792         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3793         char *vni_m;
3794         char *vni_v;
3795         uint16_t dport;
3796         int size;
3797         int i;
3798
3799         if (inner) {
3800                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3801                                          inner_headers);
3802                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3803         } else {
3804                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3805                                          outer_headers);
3806                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3807         }
3808         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
3809                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
3810         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
3811                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
3812                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
3813         }
3814         if (!vxlan_v)
3815                 return;
3816         if (!vxlan_m)
3817                 vxlan_m = &rte_flow_item_vxlan_mask;
3818         size = sizeof(vxlan_m->vni);
3819         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
3820         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
3821         memcpy(vni_m, vxlan_m->vni, size);
3822         for (i = 0; i < size; ++i)
3823                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
3824 }
3825
3826 /**
3827  * Add MPLS item to matcher and to the value.
3828  *
3829  * @param[in, out] matcher
3830  *   Flow matcher.
3831  * @param[in, out] key
3832  *   Flow matcher value.
3833  * @param[in] item
3834  *   Flow pattern to translate.
3835  * @param[in] prev_layer
3836  *   The protocol layer indicated in previous item.
3837  * @param[in] inner
3838  *   Item is inner pattern.
3839  */
3840 static void
3841 flow_dv_translate_item_mpls(void *matcher, void *key,
3842                             const struct rte_flow_item *item,
3843                             uint64_t prev_layer,
3844                             int inner)
3845 {
3846         const uint32_t *in_mpls_m = item->mask;
3847         const uint32_t *in_mpls_v = item->spec;
3848         uint32_t *out_mpls_m = 0;
3849         uint32_t *out_mpls_v = 0;
3850         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3851         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3852         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
3853                                      misc_parameters_2);
3854         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
3855         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
3856         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3857
3858         switch (prev_layer) {
3859         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
3860                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
3861                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
3862                          MLX5_UDP_PORT_MPLS);
3863                 break;
3864         case MLX5_FLOW_LAYER_GRE:
3865                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
3866                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
3867                          RTE_ETHER_TYPE_MPLS);
3868                 break;
3869         default:
3870                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3871                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3872                          IPPROTO_MPLS);
3873                 break;
3874         }
3875         if (!in_mpls_v)
3876                 return;
3877         if (!in_mpls_m)
3878                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
3879         switch (prev_layer) {
3880         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
3881                 out_mpls_m =
3882                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
3883                                                  outer_first_mpls_over_udp);
3884                 out_mpls_v =
3885                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
3886                                                  outer_first_mpls_over_udp);
3887                 break;
3888         case MLX5_FLOW_LAYER_GRE:
3889                 out_mpls_m =
3890                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
3891                                                  outer_first_mpls_over_gre);
3892                 out_mpls_v =
3893                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
3894                                                  outer_first_mpls_over_gre);
3895                 break;
3896         default:
3897                 /* Inner MPLS not over GRE is not supported. */
3898                 if (!inner) {
3899                         out_mpls_m =
3900                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
3901                                                          misc2_m,
3902                                                          outer_first_mpls);
3903                         out_mpls_v =
3904                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
3905                                                          misc2_v,
3906                                                          outer_first_mpls);
3907                 }
3908                 break;
3909         }
3910         if (out_mpls_m && out_mpls_v) {
3911                 *out_mpls_m = *in_mpls_m;
3912                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
3913         }
3914 }
3915
3916 /**
3917  * Add META item to matcher
3918  *
3919  * @param[in, out] matcher
3920  *   Flow matcher.
3921  * @param[in, out] key
3922  *   Flow matcher value.
3923  * @param[in] item
3924  *   Flow pattern to translate.
3925  * @param[in] inner
3926  *   Item is inner pattern.
3927  */
3928 static void
3929 flow_dv_translate_item_meta(void *matcher, void *key,
3930                             const struct rte_flow_item *item)
3931 {
3932         const struct rte_flow_item_meta *meta_m;
3933         const struct rte_flow_item_meta *meta_v;
3934         void *misc2_m =
3935                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
3936         void *misc2_v =
3937                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
3938
3939         meta_m = (const void *)item->mask;
3940         if (!meta_m)
3941                 meta_m = &rte_flow_item_meta_mask;
3942         meta_v = (const void *)item->spec;
3943         if (meta_v) {
3944                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a,
3945                          rte_be_to_cpu_32(meta_m->data));
3946                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a,
3947                          rte_be_to_cpu_32(meta_v->data & meta_m->data));
3948         }
3949 }
3950
3951 /**
3952  * Add source vport match to the specified matcher.
3953  *
3954  * @param[in, out] matcher
3955  *   Flow matcher.
3956  * @param[in, out] key
3957  *   Flow matcher value.
3958  * @param[in] port
3959  *   Source vport value to match
3960  * @param[in] mask
3961  *   Mask
3962  */
3963 static void
3964 flow_dv_translate_item_source_vport(void *matcher, void *key,
3965                                     int16_t port, uint16_t mask)
3966 {
3967         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3968         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3969
3970         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
3971         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
3972 }
3973
3974 /**
3975  * Translate port-id item to eswitch match on  port-id.
3976  *
3977  * @param[in] dev
3978  *   The devich to configure through.
3979  * @param[in, out] matcher
3980  *   Flow matcher.
3981  * @param[in, out] key
3982  *   Flow matcher value.
3983  * @param[in] item
3984  *   Flow pattern to translate.
3985  *
3986  * @return
3987  *   0 on success, a negative errno value otherwise.
3988  */
3989 static int
3990 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
3991                                void *key, const struct rte_flow_item *item)
3992 {
3993         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
3994         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
3995         uint16_t mask, val, id;
3996         int ret;
3997
3998         mask = pid_m ? pid_m->id : 0xffff;
3999         id = pid_v ? pid_v->id : dev->data->port_id;
4000         ret = mlx5_port_to_eswitch_info(id, NULL, &val);
4001         if (ret)
4002                 return ret;
4003         flow_dv_translate_item_source_vport(matcher, key, val, mask);
4004         return 0;
4005 }
4006
4007 /**
4008  * Add ICMP6 item to matcher and to the value.
4009  *
4010  * @param[in, out] matcher
4011  *   Flow matcher.
4012  * @param[in, out] key
4013  *   Flow matcher value.
4014  * @param[in] item
4015  *   Flow pattern to translate.
4016  * @param[in] inner
4017  *   Item is inner pattern.
4018  */
4019 static void
4020 flow_dv_translate_item_icmp6(void *matcher, void *key,
4021                               const struct rte_flow_item *item,
4022                               int inner)
4023 {
4024         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
4025         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
4026         void *headers_m;
4027         void *headers_v;
4028         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4029                                      misc_parameters_3);
4030         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4031         if (inner) {
4032                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4033                                          inner_headers);
4034                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4035         } else {
4036                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4037                                          outer_headers);
4038                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4039         }
4040         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4041         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
4042         if (!icmp6_v)
4043                 return;
4044         if (!icmp6_m)
4045                 icmp6_m = &rte_flow_item_icmp6_mask;
4046         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
4047         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
4048                  icmp6_v->type & icmp6_m->type);
4049         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
4050         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
4051                  icmp6_v->code & icmp6_m->code);
4052 }
4053
4054 /**
4055  * Add ICMP item to matcher and to the value.
4056  *
4057  * @param[in, out] matcher
4058  *   Flow matcher.
4059  * @param[in, out] key
4060  *   Flow matcher value.
4061  * @param[in] item
4062  *   Flow pattern to translate.
4063  * @param[in] inner
4064  *   Item is inner pattern.
4065  */
4066 static void
4067 flow_dv_translate_item_icmp(void *matcher, void *key,
4068                             const struct rte_flow_item *item,
4069                             int inner)
4070 {
4071         const struct rte_flow_item_icmp *icmp_m = item->mask;
4072         const struct rte_flow_item_icmp *icmp_v = item->spec;
4073         void *headers_m;
4074         void *headers_v;
4075         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4076                                      misc_parameters_3);
4077         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4078         if (inner) {
4079                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4080                                          inner_headers);
4081                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4082         } else {
4083                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4084                                          outer_headers);
4085                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4086         }
4087         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4088         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
4089         if (!icmp_v)
4090                 return;
4091         if (!icmp_m)
4092                 icmp_m = &rte_flow_item_icmp_mask;
4093         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
4094                  icmp_m->hdr.icmp_type);
4095         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
4096                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
4097         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
4098                  icmp_m->hdr.icmp_code);
4099         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
4100                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
4101 }
4102
4103 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
4104
4105 #define HEADER_IS_ZERO(match_criteria, headers)                              \
4106         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
4107                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
4108
4109 /**
4110  * Calculate flow matcher enable bitmap.
4111  *
4112  * @param match_criteria
4113  *   Pointer to flow matcher criteria.
4114  *
4115  * @return
4116  *   Bitmap of enabled fields.
4117  */
4118 static uint8_t
4119 flow_dv_matcher_enable(uint32_t *match_criteria)
4120 {
4121         uint8_t match_criteria_enable;
4122
4123         match_criteria_enable =
4124                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
4125                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
4126         match_criteria_enable |=
4127                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
4128                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
4129         match_criteria_enable |=
4130                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
4131                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
4132         match_criteria_enable |=
4133                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
4134                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
4135 #ifdef HAVE_MLX5DV_DR
4136         match_criteria_enable |=
4137                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
4138                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
4139 #endif
4140         return match_criteria_enable;
4141 }
4142
4143
4144 /**
4145  * Get a flow table.
4146  *
4147  * @param dev[in, out]
4148  *   Pointer to rte_eth_dev structure.
4149  * @param[in] table_id
4150  *   Table id to use.
4151  * @param[in] egress
4152  *   Direction of the table.
4153  * @param[in] transfer
4154  *   E-Switch or NIC flow.
4155  * @param[out] error
4156  *   pointer to error structure.
4157  *
4158  * @return
4159  *   Returns tables resource based on the index, NULL in case of failed.
4160  */
4161 static struct mlx5_flow_tbl_resource *
4162 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
4163                          uint32_t table_id, uint8_t egress,
4164                          uint8_t transfer,
4165                          struct rte_flow_error *error)
4166 {
4167         struct mlx5_priv *priv = dev->data->dev_private;
4168         struct mlx5_ibv_shared *sh = priv->sh;
4169         struct mlx5_flow_tbl_resource *tbl;
4170
4171 #ifdef HAVE_MLX5DV_DR
4172         if (transfer) {
4173                 tbl = &sh->fdb_tbl[table_id];
4174                 if (!tbl->obj)
4175                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4176                                 (sh->fdb_domain, table_id);
4177         } else if (egress) {
4178                 tbl = &sh->tx_tbl[table_id];
4179                 if (!tbl->obj)
4180                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4181                                 (sh->tx_domain, table_id);
4182         } else {
4183                 tbl = &sh->rx_tbl[table_id];
4184                 if (!tbl->obj)
4185                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4186                                 (sh->rx_domain, table_id);
4187         }
4188         if (!tbl->obj) {
4189                 rte_flow_error_set(error, ENOMEM,
4190                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4191                                    NULL, "cannot create table");
4192                 return NULL;
4193         }
4194         rte_atomic32_inc(&tbl->refcnt);
4195         return tbl;
4196 #else
4197         (void)error;
4198         (void)tbl;
4199         if (transfer)
4200                 return &sh->fdb_tbl[table_id];
4201         else if (egress)
4202                 return &sh->tx_tbl[table_id];
4203         else
4204                 return &sh->rx_tbl[table_id];
4205 #endif
4206 }
4207
4208 /**
4209  * Release a flow table.
4210  *
4211  * @param[in] tbl
4212  *   Table resource to be released.
4213  *
4214  * @return
4215  *   Returns 0 if table was released, else return 1;
4216  */
4217 static int
4218 flow_dv_tbl_resource_release(struct mlx5_flow_tbl_resource *tbl)
4219 {
4220         if (!tbl)
4221                 return 0;
4222         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
4223                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
4224                 tbl->obj = NULL;
4225                 return 0;
4226         }
4227         return 1;
4228 }
4229
4230 /**
4231  * Register the flow matcher.
4232  *
4233  * @param dev[in, out]
4234  *   Pointer to rte_eth_dev structure.
4235  * @param[in, out] matcher
4236  *   Pointer to flow matcher.
4237  * @parm[in, out] dev_flow
4238  *   Pointer to the dev_flow.
4239  * @param[out] error
4240  *   pointer to error structure.
4241  *
4242  * @return
4243  *   0 on success otherwise -errno and errno is set.
4244  */
4245 static int
4246 flow_dv_matcher_register(struct rte_eth_dev *dev,
4247                          struct mlx5_flow_dv_matcher *matcher,
4248                          struct mlx5_flow *dev_flow,
4249                          struct rte_flow_error *error)
4250 {
4251         struct mlx5_priv *priv = dev->data->dev_private;
4252         struct mlx5_ibv_shared *sh = priv->sh;
4253         struct mlx5_flow_dv_matcher *cache_matcher;
4254         struct mlx5dv_flow_matcher_attr dv_attr = {
4255                 .type = IBV_FLOW_ATTR_NORMAL,
4256                 .match_mask = (void *)&matcher->mask,
4257         };
4258         struct mlx5_flow_tbl_resource *tbl = NULL;
4259
4260         /* Lookup from cache. */
4261         LIST_FOREACH(cache_matcher, &sh->matchers, next) {
4262                 if (matcher->crc == cache_matcher->crc &&
4263                     matcher->priority == cache_matcher->priority &&
4264                     matcher->egress == cache_matcher->egress &&
4265                     matcher->group == cache_matcher->group &&
4266                     matcher->transfer == cache_matcher->transfer &&
4267                     !memcmp((const void *)matcher->mask.buf,
4268                             (const void *)cache_matcher->mask.buf,
4269                             cache_matcher->mask.size)) {
4270                         DRV_LOG(DEBUG,
4271                                 "priority %hd use %s matcher %p: refcnt %d++",
4272                                 cache_matcher->priority,
4273                                 cache_matcher->egress ? "tx" : "rx",
4274                                 (void *)cache_matcher,
4275                                 rte_atomic32_read(&cache_matcher->refcnt));
4276                         rte_atomic32_inc(&cache_matcher->refcnt);
4277                         dev_flow->dv.matcher = cache_matcher;
4278                         return 0;
4279                 }
4280         }
4281         /* Register new matcher. */
4282         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
4283         if (!cache_matcher)
4284                 return rte_flow_error_set(error, ENOMEM,
4285                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4286                                           "cannot allocate matcher memory");
4287         tbl = flow_dv_tbl_resource_get(dev, matcher->group * MLX5_GROUP_FACTOR,
4288                                        matcher->egress, matcher->transfer,
4289                                        error);
4290         if (!tbl) {
4291                 rte_free(cache_matcher);
4292                 return rte_flow_error_set(error, ENOMEM,
4293                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4294                                           NULL, "cannot create table");
4295         }
4296         *cache_matcher = *matcher;
4297         dv_attr.match_criteria_enable =
4298                 flow_dv_matcher_enable(cache_matcher->mask.buf);
4299         dv_attr.priority = matcher->priority;
4300         if (matcher->egress)
4301                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
4302         cache_matcher->matcher_object =
4303                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
4304         if (!cache_matcher->matcher_object) {
4305                 rte_free(cache_matcher);
4306 #ifdef HAVE_MLX5DV_DR
4307                 flow_dv_tbl_resource_release(tbl);
4308 #endif
4309                 return rte_flow_error_set(error, ENOMEM,
4310                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4311                                           NULL, "cannot create matcher");
4312         }
4313         rte_atomic32_inc(&cache_matcher->refcnt);
4314         LIST_INSERT_HEAD(&sh->matchers, cache_matcher, next);
4315         dev_flow->dv.matcher = cache_matcher;
4316         DRV_LOG(DEBUG, "priority %hd new %s matcher %p: refcnt %d",
4317                 cache_matcher->priority,
4318                 cache_matcher->egress ? "tx" : "rx", (void *)cache_matcher,
4319                 rte_atomic32_read(&cache_matcher->refcnt));
4320         rte_atomic32_inc(&tbl->refcnt);
4321         return 0;
4322 }
4323
4324 /**
4325  * Find existing tag resource or create and register a new one.
4326  *
4327  * @param dev[in, out]
4328  *   Pointer to rte_eth_dev structure.
4329  * @param[in, out] resource
4330  *   Pointer to tag resource.
4331  * @parm[in, out] dev_flow
4332  *   Pointer to the dev_flow.
4333  * @param[out] error
4334  *   pointer to error structure.
4335  *
4336  * @return
4337  *   0 on success otherwise -errno and errno is set.
4338  */
4339 static int
4340 flow_dv_tag_resource_register
4341                         (struct rte_eth_dev *dev,
4342                          struct mlx5_flow_dv_tag_resource *resource,
4343                          struct mlx5_flow *dev_flow,
4344                          struct rte_flow_error *error)
4345 {
4346         struct mlx5_priv *priv = dev->data->dev_private;
4347         struct mlx5_ibv_shared *sh = priv->sh;
4348         struct mlx5_flow_dv_tag_resource *cache_resource;
4349
4350         /* Lookup a matching resource from cache. */
4351         LIST_FOREACH(cache_resource, &sh->tags, next) {
4352                 if (resource->tag == cache_resource->tag) {
4353                         DRV_LOG(DEBUG, "tag resource %p: refcnt %d++",
4354                                 (void *)cache_resource,
4355                                 rte_atomic32_read(&cache_resource->refcnt));
4356                         rte_atomic32_inc(&cache_resource->refcnt);
4357                         dev_flow->flow->tag_resource = cache_resource;
4358                         return 0;
4359                 }
4360         }
4361         /* Register new  resource. */
4362         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
4363         if (!cache_resource)
4364                 return rte_flow_error_set(error, ENOMEM,
4365                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4366                                           "cannot allocate resource memory");
4367         *cache_resource = *resource;
4368         cache_resource->action = mlx5_glue->dv_create_flow_action_tag
4369                 (resource->tag);
4370         if (!cache_resource->action) {
4371                 rte_free(cache_resource);
4372                 return rte_flow_error_set(error, ENOMEM,
4373                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4374                                           NULL, "cannot create action");
4375         }
4376         rte_atomic32_init(&cache_resource->refcnt);
4377         rte_atomic32_inc(&cache_resource->refcnt);
4378         LIST_INSERT_HEAD(&sh->tags, cache_resource, next);
4379         dev_flow->flow->tag_resource = cache_resource;
4380         DRV_LOG(DEBUG, "new tag resource %p: refcnt %d++",
4381                 (void *)cache_resource,
4382                 rte_atomic32_read(&cache_resource->refcnt));
4383         return 0;
4384 }
4385
4386 /**
4387  * Release the tag.
4388  *
4389  * @param dev
4390  *   Pointer to Ethernet device.
4391  * @param flow
4392  *   Pointer to mlx5_flow.
4393  *
4394  * @return
4395  *   1 while a reference on it exists, 0 when freed.
4396  */
4397 static int
4398 flow_dv_tag_release(struct rte_eth_dev *dev,
4399                     struct mlx5_flow_dv_tag_resource *tag)
4400 {
4401         assert(tag);
4402         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
4403                 dev->data->port_id, (void *)tag,
4404                 rte_atomic32_read(&tag->refcnt));
4405         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
4406                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
4407                 LIST_REMOVE(tag, next);
4408                 DRV_LOG(DEBUG, "port %u tag %p: removed",
4409                         dev->data->port_id, (void *)tag);
4410                 rte_free(tag);
4411                 return 0;
4412         }
4413         return 1;
4414 }
4415
4416 /**
4417  * Translate port ID action to vport.
4418  *
4419  * @param[in] dev
4420  *   Pointer to rte_eth_dev structure.
4421  * @param[in] action
4422  *   Pointer to the port ID action.
4423  * @param[out] dst_port_id
4424  *   The target port ID.
4425  * @param[out] error
4426  *   Pointer to the error structure.
4427  *
4428  * @return
4429  *   0 on success, a negative errno value otherwise and rte_errno is set.
4430  */
4431 static int
4432 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
4433                                  const struct rte_flow_action *action,
4434                                  uint32_t *dst_port_id,
4435                                  struct rte_flow_error *error)
4436 {
4437         uint32_t port;
4438         uint16_t port_id;
4439         int ret;
4440         const struct rte_flow_action_port_id *conf =
4441                         (const struct rte_flow_action_port_id *)action->conf;
4442
4443         port = conf->original ? dev->data->port_id : conf->id;
4444         ret = mlx5_port_to_eswitch_info(port, NULL, &port_id);
4445         if (ret)
4446                 return rte_flow_error_set(error, -ret,
4447                                           RTE_FLOW_ERROR_TYPE_ACTION,
4448                                           NULL,
4449                                           "No eswitch info was found for port");
4450         *dst_port_id = port_id;
4451         return 0;
4452 }
4453
4454 /**
4455  * Fill the flow with DV spec.
4456  *
4457  * @param[in] dev
4458  *   Pointer to rte_eth_dev structure.
4459  * @param[in, out] dev_flow
4460  *   Pointer to the sub flow.
4461  * @param[in] attr
4462  *   Pointer to the flow attributes.
4463  * @param[in] items
4464  *   Pointer to the list of items.
4465  * @param[in] actions
4466  *   Pointer to the list of actions.
4467  * @param[out] error
4468  *   Pointer to the error structure.
4469  *
4470  * @return
4471  *   0 on success, a negative errno value otherwise and rte_errno is set.
4472  */
4473 static int
4474 flow_dv_translate(struct rte_eth_dev *dev,
4475                   struct mlx5_flow *dev_flow,
4476                   const struct rte_flow_attr *attr,
4477                   const struct rte_flow_item items[],
4478                   const struct rte_flow_action actions[],
4479                   struct rte_flow_error *error)
4480 {
4481         struct mlx5_priv *priv = dev->data->dev_private;
4482         struct rte_flow *flow = dev_flow->flow;
4483         uint64_t item_flags = 0;
4484         uint64_t last_item = 0;
4485         uint64_t action_flags = 0;
4486         uint64_t priority = attr->priority;
4487         struct mlx5_flow_dv_matcher matcher = {
4488                 .mask = {
4489                         .size = sizeof(matcher.mask.buf),
4490                 },
4491         };
4492         int actions_n = 0;
4493         bool actions_end = false;
4494         struct mlx5_flow_dv_modify_hdr_resource res = {
4495                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4496                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
4497         };
4498         union flow_dv_attr flow_attr = { .attr = 0 };
4499         struct mlx5_flow_dv_tag_resource tag_resource;
4500         uint32_t modify_action_position = UINT32_MAX;
4501         void *match_mask = matcher.mask.buf;
4502         void *match_value = dev_flow->dv.value.buf;
4503
4504         flow->group = attr->group;
4505         if (attr->transfer)
4506                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4507         if (priority == MLX5_FLOW_PRIO_RSVD)
4508                 priority = priv->config.flow_prio - 1;
4509         for (; !actions_end ; actions++) {
4510                 const struct rte_flow_action_queue *queue;
4511                 const struct rte_flow_action_rss *rss;
4512                 const struct rte_flow_action *action = actions;
4513                 const struct rte_flow_action_count *count = action->conf;
4514                 const uint8_t *rss_key;
4515                 const struct rte_flow_action_jump *jump_data;
4516                 struct mlx5_flow_dv_jump_tbl_resource jump_tbl_resource;
4517                 struct mlx5_flow_tbl_resource *tbl;
4518                 uint32_t port_id = 0;
4519                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
4520
4521                 switch (actions->type) {
4522                 case RTE_FLOW_ACTION_TYPE_VOID:
4523                         break;
4524                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4525                         if (flow_dv_translate_action_port_id(dev, action,
4526                                                              &port_id, error))
4527                                 return -rte_errno;
4528                         port_id_resource.port_id = port_id;
4529                         if (flow_dv_port_id_action_resource_register
4530                             (dev, &port_id_resource, dev_flow, error))
4531                                 return -rte_errno;
4532                         dev_flow->dv.actions[actions_n++] =
4533                                 dev_flow->dv.port_id_action->action;
4534                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4535                         break;
4536                 case RTE_FLOW_ACTION_TYPE_FLAG:
4537                         tag_resource.tag =
4538                                 mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
4539                         if (!flow->tag_resource)
4540                                 if (flow_dv_tag_resource_register
4541                                     (dev, &tag_resource, dev_flow, error))
4542                                         return errno;
4543                         dev_flow->dv.actions[actions_n++] =
4544                                 flow->tag_resource->action;
4545                         action_flags |= MLX5_FLOW_ACTION_FLAG;
4546                         break;
4547                 case RTE_FLOW_ACTION_TYPE_MARK:
4548                         tag_resource.tag = mlx5_flow_mark_set
4549                               (((const struct rte_flow_action_mark *)
4550                                (actions->conf))->id);
4551                         if (!flow->tag_resource)
4552                                 if (flow_dv_tag_resource_register
4553                                     (dev, &tag_resource, dev_flow, error))
4554                                         return errno;
4555                         dev_flow->dv.actions[actions_n++] =
4556                                 flow->tag_resource->action;
4557                         action_flags |= MLX5_FLOW_ACTION_MARK;
4558                         break;
4559                 case RTE_FLOW_ACTION_TYPE_DROP:
4560                         action_flags |= MLX5_FLOW_ACTION_DROP;
4561                         break;
4562                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4563                         queue = actions->conf;
4564                         flow->rss.queue_num = 1;
4565                         (*flow->queue)[0] = queue->index;
4566                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4567                         break;
4568                 case RTE_FLOW_ACTION_TYPE_RSS:
4569                         rss = actions->conf;
4570                         if (flow->queue)
4571                                 memcpy((*flow->queue), rss->queue,
4572                                        rss->queue_num * sizeof(uint16_t));
4573                         flow->rss.queue_num = rss->queue_num;
4574                         /* NULL RSS key indicates default RSS key. */
4575                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
4576                         memcpy(flow->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
4577                         /* RSS type 0 indicates default RSS type ETH_RSS_IP. */
4578                         flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
4579                         flow->rss.level = rss->level;
4580                         action_flags |= MLX5_FLOW_ACTION_RSS;
4581                         break;
4582                 case RTE_FLOW_ACTION_TYPE_COUNT:
4583                         if (!priv->config.devx) {
4584                                 rte_errno = ENOTSUP;
4585                                 goto cnt_err;
4586                         }
4587                         flow->counter = flow_dv_counter_alloc(dev,
4588                                                               count->shared,
4589                                                               count->id,
4590                                                               attr->group);
4591                         if (flow->counter == NULL)
4592                                 goto cnt_err;
4593                         dev_flow->dv.actions[actions_n++] =
4594                                 flow->counter->action;
4595                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4596                         break;
4597 cnt_err:
4598                         if (rte_errno == ENOTSUP)
4599                                 return rte_flow_error_set
4600                                               (error, ENOTSUP,
4601                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4602                                                NULL,
4603                                                "count action not supported");
4604                         else
4605                                 return rte_flow_error_set
4606                                                 (error, rte_errno,
4607                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4608                                                  action,
4609                                                  "cannot create counter"
4610                                                   " object.");
4611                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4612                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4613                         if (flow_dv_create_action_l2_encap(dev, actions,
4614                                                            dev_flow,
4615                                                            attr->transfer,
4616                                                            error))
4617                                 return -rte_errno;
4618                         dev_flow->dv.actions[actions_n++] =
4619                                 dev_flow->dv.encap_decap->verbs_action;
4620                         action_flags |= actions->type ==
4621                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4622                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4623                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4624                         break;
4625                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4626                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4627                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
4628                                                            attr->transfer,
4629                                                            error))
4630                                 return -rte_errno;
4631                         dev_flow->dv.actions[actions_n++] =
4632                                 dev_flow->dv.encap_decap->verbs_action;
4633                         action_flags |= actions->type ==
4634                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4635                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4636                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4637                         break;
4638                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4639                         /* Handle encap with preceding decap. */
4640                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
4641                                 if (flow_dv_create_action_raw_encap
4642                                         (dev, actions, dev_flow, attr, error))
4643                                         return -rte_errno;
4644                                 dev_flow->dv.actions[actions_n++] =
4645                                         dev_flow->dv.encap_decap->verbs_action;
4646                         } else {
4647                                 /* Handle encap without preceding decap. */
4648                                 if (flow_dv_create_action_l2_encap
4649                                     (dev, actions, dev_flow, attr->transfer,
4650                                      error))
4651                                         return -rte_errno;
4652                                 dev_flow->dv.actions[actions_n++] =
4653                                         dev_flow->dv.encap_decap->verbs_action;
4654                         }
4655                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4656                         break;
4657                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4658                         /* Check if this decap is followed by encap. */
4659                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
4660                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
4661                                action++) {
4662                         }
4663                         /* Handle decap only if it isn't followed by encap. */
4664                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4665                                 if (flow_dv_create_action_l2_decap
4666                                     (dev, dev_flow, attr->transfer, error))
4667                                         return -rte_errno;
4668                                 dev_flow->dv.actions[actions_n++] =
4669                                         dev_flow->dv.encap_decap->verbs_action;
4670                         }
4671                         /* If decap is followed by encap, handle it at encap. */
4672                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4673                         break;
4674                 case RTE_FLOW_ACTION_TYPE_JUMP:
4675                         jump_data = action->conf;
4676                         tbl = flow_dv_tbl_resource_get(dev, jump_data->group *
4677                                                        MLX5_GROUP_FACTOR,
4678                                                        attr->egress,
4679                                                        attr->transfer, error);
4680                         if (!tbl)
4681                                 return rte_flow_error_set
4682                                                 (error, errno,
4683                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4684                                                  NULL,
4685                                                  "cannot create jump action.");
4686                         jump_tbl_resource.tbl = tbl;
4687                         if (flow_dv_jump_tbl_resource_register
4688                             (dev, &jump_tbl_resource, dev_flow, error)) {
4689                                 flow_dv_tbl_resource_release(tbl);
4690                                 return rte_flow_error_set
4691                                                 (error, errno,
4692                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4693                                                  NULL,
4694                                                  "cannot create jump action.");
4695                         }
4696                         dev_flow->dv.actions[actions_n++] =
4697                                 dev_flow->dv.jump->action;
4698                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4699                         break;
4700                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4701                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4702                         if (flow_dv_convert_action_modify_mac(&res, actions,
4703                                                               error))
4704                                 return -rte_errno;
4705                         action_flags |= actions->type ==
4706                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4707                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
4708                                         MLX5_FLOW_ACTION_SET_MAC_DST;
4709                         break;
4710                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4711                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4712                         if (flow_dv_convert_action_modify_ipv4(&res, actions,
4713                                                                error))
4714                                 return -rte_errno;
4715                         action_flags |= actions->type ==
4716                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4717                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
4718                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
4719                         break;
4720                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4721                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4722                         if (flow_dv_convert_action_modify_ipv6(&res, actions,
4723                                                                error))
4724                                 return -rte_errno;
4725                         action_flags |= actions->type ==
4726                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4727                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
4728                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
4729                         break;
4730                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4731                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4732                         if (flow_dv_convert_action_modify_tp(&res, actions,
4733                                                              items, &flow_attr,
4734                                                              error))
4735                                 return -rte_errno;
4736                         action_flags |= actions->type ==
4737                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4738                                         MLX5_FLOW_ACTION_SET_TP_SRC :
4739                                         MLX5_FLOW_ACTION_SET_TP_DST;
4740                         break;
4741                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4742                         if (flow_dv_convert_action_modify_dec_ttl(&res, items,
4743                                                                   &flow_attr,
4744                                                                   error))
4745                                 return -rte_errno;
4746                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
4747                         break;
4748                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4749                         if (flow_dv_convert_action_modify_ttl(&res, actions,
4750                                                              items, &flow_attr,
4751                                                              error))
4752                                 return -rte_errno;
4753                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
4754                         break;
4755                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4756                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4757                         if (flow_dv_convert_action_modify_tcp_seq(&res, actions,
4758                                                                   error))
4759                                 return -rte_errno;
4760                         action_flags |= actions->type ==
4761                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4762                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
4763                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4764                         break;
4765
4766                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4767                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4768                         if (flow_dv_convert_action_modify_tcp_ack(&res, actions,
4769                                                                   error))
4770                                 return -rte_errno;
4771                         action_flags |= actions->type ==
4772                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4773                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
4774                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
4775                         break;
4776                 case RTE_FLOW_ACTION_TYPE_END:
4777                         actions_end = true;
4778                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) {
4779                                 /* create modify action if needed. */
4780                                 if (flow_dv_modify_hdr_resource_register
4781                                                                 (dev, &res,
4782                                                                  dev_flow,
4783                                                                  error))
4784                                         return -rte_errno;
4785                                 dev_flow->dv.actions[modify_action_position] =
4786                                         dev_flow->dv.modify_hdr->verbs_action;
4787                         }
4788                         break;
4789                 default:
4790                         break;
4791                 }
4792                 if ((action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) &&
4793                     modify_action_position == UINT32_MAX)
4794                         modify_action_position = actions_n++;
4795         }
4796         dev_flow->dv.actions_n = actions_n;
4797         flow->actions = action_flags;
4798         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4799                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4800
4801                 switch (items->type) {
4802                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4803                         flow_dv_translate_item_port_id(dev, match_mask,
4804                                                        match_value, items);
4805                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4806                         break;
4807                 case RTE_FLOW_ITEM_TYPE_ETH:
4808                         flow_dv_translate_item_eth(match_mask, match_value,
4809                                                    items, tunnel);
4810                         matcher.priority = MLX5_PRIORITY_MAP_L2;
4811                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4812                                              MLX5_FLOW_LAYER_OUTER_L2;
4813                         break;
4814                 case RTE_FLOW_ITEM_TYPE_VLAN:
4815                         flow_dv_translate_item_vlan(match_mask, match_value,
4816                                                     items, tunnel);
4817                         matcher.priority = MLX5_PRIORITY_MAP_L2;
4818                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
4819                                               MLX5_FLOW_LAYER_INNER_VLAN) :
4820                                              (MLX5_FLOW_LAYER_OUTER_L2 |
4821                                               MLX5_FLOW_LAYER_OUTER_VLAN);
4822                         break;
4823                 case RTE_FLOW_ITEM_TYPE_IPV4:
4824                         flow_dv_translate_item_ipv4(match_mask, match_value,
4825                                                     items, tunnel, attr->group);
4826                         matcher.priority = MLX5_PRIORITY_MAP_L3;
4827                         dev_flow->dv.hash_fields |=
4828                                 mlx5_flow_hashfields_adjust
4829                                         (dev_flow, tunnel,
4830                                          MLX5_IPV4_LAYER_TYPES,
4831                                          MLX5_IPV4_IBV_RX_HASH);
4832                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4833                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4834                         mlx5_flow_tunnel_ip_check(items, &last_item);
4835                         break;
4836                 case RTE_FLOW_ITEM_TYPE_IPV6:
4837                         flow_dv_translate_item_ipv6(match_mask, match_value,
4838                                                     items, tunnel, attr->group);
4839                         matcher.priority = MLX5_PRIORITY_MAP_L3;
4840                         dev_flow->dv.hash_fields |=
4841                                 mlx5_flow_hashfields_adjust
4842                                         (dev_flow, tunnel,
4843                                          MLX5_IPV6_LAYER_TYPES,
4844                                          MLX5_IPV6_IBV_RX_HASH);
4845                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4846                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4847                         mlx5_flow_tunnel_ip_check(items, &last_item);
4848                         break;
4849                 case RTE_FLOW_ITEM_TYPE_TCP:
4850                         flow_dv_translate_item_tcp(match_mask, match_value,
4851                                                    items, tunnel);
4852                         matcher.priority = MLX5_PRIORITY_MAP_L4;
4853                         dev_flow->dv.hash_fields |=
4854                                 mlx5_flow_hashfields_adjust
4855                                         (dev_flow, tunnel, ETH_RSS_TCP,
4856                                          IBV_RX_HASH_SRC_PORT_TCP |
4857                                          IBV_RX_HASH_DST_PORT_TCP);
4858                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4859                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4860                         break;
4861                 case RTE_FLOW_ITEM_TYPE_UDP:
4862                         flow_dv_translate_item_udp(match_mask, match_value,
4863                                                    items, tunnel);
4864                         matcher.priority = MLX5_PRIORITY_MAP_L4;
4865                         dev_flow->dv.hash_fields |=
4866                                 mlx5_flow_hashfields_adjust
4867                                         (dev_flow, tunnel, ETH_RSS_UDP,
4868                                          IBV_RX_HASH_SRC_PORT_UDP |
4869                                          IBV_RX_HASH_DST_PORT_UDP);
4870                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4871                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4872                         break;
4873                 case RTE_FLOW_ITEM_TYPE_GRE:
4874                         flow_dv_translate_item_gre(match_mask, match_value,
4875                                                    items, tunnel);
4876                         last_item = MLX5_FLOW_LAYER_GRE;
4877                         break;
4878                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4879                         flow_dv_translate_item_gre_key(match_mask,
4880                                                        match_value, items);
4881                         item_flags |= MLX5_FLOW_LAYER_GRE_KEY;
4882                         break;
4883                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4884                         flow_dv_translate_item_nvgre(match_mask, match_value,
4885                                                      items, tunnel);
4886                         last_item = MLX5_FLOW_LAYER_GRE;
4887                         break;
4888                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4889                         flow_dv_translate_item_vxlan(match_mask, match_value,
4890                                                      items, tunnel);
4891                         last_item = MLX5_FLOW_LAYER_VXLAN;
4892                         break;
4893                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4894                         flow_dv_translate_item_vxlan(match_mask, match_value,
4895                                                      items, tunnel);
4896                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4897                         break;
4898                 case RTE_FLOW_ITEM_TYPE_MPLS:
4899                         flow_dv_translate_item_mpls(match_mask, match_value,
4900                                                     items, last_item, tunnel);
4901                         last_item = MLX5_FLOW_LAYER_MPLS;
4902                         break;
4903                 case RTE_FLOW_ITEM_TYPE_META:
4904                         flow_dv_translate_item_meta(match_mask, match_value,
4905                                                     items);
4906                         last_item = MLX5_FLOW_ITEM_METADATA;
4907                         break;
4908                 case RTE_FLOW_ITEM_TYPE_ICMP:
4909                         flow_dv_translate_item_icmp(match_mask, match_value,
4910                                                     items, tunnel);
4911                         item_flags |= MLX5_FLOW_LAYER_ICMP;
4912                         break;
4913                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4914                         flow_dv_translate_item_icmp6(match_mask, match_value,
4915                                                       items, tunnel);
4916                         item_flags |= MLX5_FLOW_LAYER_ICMP6;
4917                         break;
4918                 default:
4919                         break;
4920                 }
4921                 item_flags |= last_item;
4922         }
4923         /*
4924          * In case of ingress traffic when E-Switch mode is enabled,
4925          * we have two cases where we need to set the source port manually.
4926          * The first one, is in case of Nic steering rule, and the second is
4927          * E-Switch rule where no port_id item was found. In both cases
4928          * the source port is set according the current port in use.
4929          */
4930         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
4931             (priv->representor || priv->master)) {
4932                 if (flow_dv_translate_item_port_id(dev, match_mask,
4933                                                    match_value, NULL))
4934                         return -rte_errno;
4935         }
4936         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
4937                                          dev_flow->dv.value.buf));
4938         dev_flow->layers = item_flags;
4939         /* Register matcher. */
4940         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
4941                                     matcher.mask.size);
4942         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
4943                                                      matcher.priority);
4944         matcher.egress = attr->egress;
4945         matcher.group = attr->group;
4946         matcher.transfer = attr->transfer;
4947         if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
4948                 return -rte_errno;
4949         return 0;
4950 }
4951
4952 /**
4953  * Apply the flow to the NIC.
4954  *
4955  * @param[in] dev
4956  *   Pointer to the Ethernet device structure.
4957  * @param[in, out] flow
4958  *   Pointer to flow structure.
4959  * @param[out] error
4960  *   Pointer to error structure.
4961  *
4962  * @return
4963  *   0 on success, a negative errno value otherwise and rte_errno is set.
4964  */
4965 static int
4966 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
4967               struct rte_flow_error *error)
4968 {
4969         struct mlx5_flow_dv *dv;
4970         struct mlx5_flow *dev_flow;
4971         struct mlx5_priv *priv = dev->data->dev_private;
4972         int n;
4973         int err;
4974
4975         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
4976                 dv = &dev_flow->dv;
4977                 n = dv->actions_n;
4978                 if (flow->actions & MLX5_FLOW_ACTION_DROP) {
4979                         if (flow->transfer) {
4980                                 dv->actions[n++] = priv->sh->esw_drop_action;
4981                         } else {
4982                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
4983                                 if (!dv->hrxq) {
4984                                         rte_flow_error_set
4985                                                 (error, errno,
4986                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4987                                                  NULL,
4988                                                  "cannot get drop hash queue");
4989                                         goto error;
4990                                 }
4991                                 dv->actions[n++] = dv->hrxq->action;
4992                         }
4993                 } else if (flow->actions &
4994                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
4995                         struct mlx5_hrxq *hrxq;
4996
4997                         hrxq = mlx5_hrxq_get(dev, flow->key,
4998                                              MLX5_RSS_HASH_KEY_LEN,
4999                                              dv->hash_fields,
5000                                              (*flow->queue),
5001                                              flow->rss.queue_num);
5002                         if (!hrxq)
5003                                 hrxq = mlx5_hrxq_new
5004                                         (dev, flow->key, MLX5_RSS_HASH_KEY_LEN,
5005                                          dv->hash_fields, (*flow->queue),
5006                                          flow->rss.queue_num,
5007                                          !!(dev_flow->layers &
5008                                             MLX5_FLOW_LAYER_TUNNEL));
5009                         if (!hrxq) {
5010                                 rte_flow_error_set
5011                                         (error, rte_errno,
5012                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5013                                          "cannot get hash queue");
5014                                 goto error;
5015                         }
5016                         dv->hrxq = hrxq;
5017                         dv->actions[n++] = dv->hrxq->action;
5018                 }
5019                 dv->flow =
5020                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
5021                                                   (void *)&dv->value, n,
5022                                                   dv->actions);
5023                 if (!dv->flow) {
5024                         rte_flow_error_set(error, errno,
5025                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5026                                            NULL,
5027                                            "hardware refuses to create flow");
5028                         goto error;
5029                 }
5030         }
5031         return 0;
5032 error:
5033         err = rte_errno; /* Save rte_errno before cleanup. */
5034         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5035                 struct mlx5_flow_dv *dv = &dev_flow->dv;
5036                 if (dv->hrxq) {
5037                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
5038                                 mlx5_hrxq_drop_release(dev);
5039                         else
5040                                 mlx5_hrxq_release(dev, dv->hrxq);
5041                         dv->hrxq = NULL;
5042                 }
5043         }
5044         rte_errno = err; /* Restore rte_errno. */
5045         return -rte_errno;
5046 }
5047
5048 /**
5049  * Release the flow matcher.
5050  *
5051  * @param dev
5052  *   Pointer to Ethernet device.
5053  * @param flow
5054  *   Pointer to mlx5_flow.
5055  *
5056  * @return
5057  *   1 while a reference on it exists, 0 when freed.
5058  */
5059 static int
5060 flow_dv_matcher_release(struct rte_eth_dev *dev,
5061                         struct mlx5_flow *flow)
5062 {
5063         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
5064         struct mlx5_priv *priv = dev->data->dev_private;
5065         struct mlx5_ibv_shared *sh = priv->sh;
5066         struct mlx5_flow_tbl_resource *tbl;
5067
5068         assert(matcher->matcher_object);
5069         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
5070                 dev->data->port_id, (void *)matcher,
5071                 rte_atomic32_read(&matcher->refcnt));
5072         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
5073                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
5074                            (matcher->matcher_object));
5075                 LIST_REMOVE(matcher, next);
5076                 if (matcher->egress)
5077                         tbl = &sh->tx_tbl[matcher->group];
5078                 else
5079                         tbl = &sh->rx_tbl[matcher->group];
5080                 flow_dv_tbl_resource_release(tbl);
5081                 rte_free(matcher);
5082                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
5083                         dev->data->port_id, (void *)matcher);
5084                 return 0;
5085         }
5086         return 1;
5087 }
5088
5089 /**
5090  * Release an encap/decap resource.
5091  *
5092  * @param flow
5093  *   Pointer to mlx5_flow.
5094  *
5095  * @return
5096  *   1 while a reference on it exists, 0 when freed.
5097  */
5098 static int
5099 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
5100 {
5101         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
5102                                                 flow->dv.encap_decap;
5103
5104         assert(cache_resource->verbs_action);
5105         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
5106                 (void *)cache_resource,
5107                 rte_atomic32_read(&cache_resource->refcnt));
5108         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5109                 claim_zero(mlx5_glue->destroy_flow_action
5110                                 (cache_resource->verbs_action));
5111                 LIST_REMOVE(cache_resource, next);
5112                 rte_free(cache_resource);
5113                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
5114                         (void *)cache_resource);
5115                 return 0;
5116         }
5117         return 1;
5118 }
5119
5120 /**
5121  * Release an jump to table action resource.
5122  *
5123  * @param flow
5124  *   Pointer to mlx5_flow.
5125  *
5126  * @return
5127  *   1 while a reference on it exists, 0 when freed.
5128  */
5129 static int
5130 flow_dv_jump_tbl_resource_release(struct mlx5_flow *flow)
5131 {
5132         struct mlx5_flow_dv_jump_tbl_resource *cache_resource =
5133                                                 flow->dv.jump;
5134
5135         assert(cache_resource->action);
5136         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
5137                 (void *)cache_resource,
5138                 rte_atomic32_read(&cache_resource->refcnt));
5139         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5140                 claim_zero(mlx5_glue->destroy_flow_action
5141                                 (cache_resource->action));
5142                 LIST_REMOVE(cache_resource, next);
5143                 flow_dv_tbl_resource_release(cache_resource->tbl);
5144                 rte_free(cache_resource);
5145                 DRV_LOG(DEBUG, "jump table resource %p: removed",
5146                         (void *)cache_resource);
5147                 return 0;
5148         }
5149         return 1;
5150 }
5151
5152 /**
5153  * Release a modify-header resource.
5154  *
5155  * @param flow
5156  *   Pointer to mlx5_flow.
5157  *
5158  * @return
5159  *   1 while a reference on it exists, 0 when freed.
5160  */
5161 static int
5162 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
5163 {
5164         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
5165                                                 flow->dv.modify_hdr;
5166
5167         assert(cache_resource->verbs_action);
5168         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
5169                 (void *)cache_resource,
5170                 rte_atomic32_read(&cache_resource->refcnt));
5171         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5172                 claim_zero(mlx5_glue->destroy_flow_action
5173                                 (cache_resource->verbs_action));
5174                 LIST_REMOVE(cache_resource, next);
5175                 rte_free(cache_resource);
5176                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
5177                         (void *)cache_resource);
5178                 return 0;
5179         }
5180         return 1;
5181 }
5182
5183 /**
5184  * Release port ID action resource.
5185  *
5186  * @param flow
5187  *   Pointer to mlx5_flow.
5188  *
5189  * @return
5190  *   1 while a reference on it exists, 0 when freed.
5191  */
5192 static int
5193 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
5194 {
5195         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
5196                 flow->dv.port_id_action;
5197
5198         assert(cache_resource->action);
5199         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
5200                 (void *)cache_resource,
5201                 rte_atomic32_read(&cache_resource->refcnt));
5202         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5203                 claim_zero(mlx5_glue->destroy_flow_action
5204                                 (cache_resource->action));
5205                 LIST_REMOVE(cache_resource, next);
5206                 rte_free(cache_resource);
5207                 DRV_LOG(DEBUG, "port id action resource %p: removed",
5208                         (void *)cache_resource);
5209                 return 0;
5210         }
5211         return 1;
5212 }
5213
5214 /**
5215  * Remove the flow from the NIC but keeps it in memory.
5216  *
5217  * @param[in] dev
5218  *   Pointer to Ethernet device.
5219  * @param[in, out] flow
5220  *   Pointer to flow structure.
5221  */
5222 static void
5223 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
5224 {
5225         struct mlx5_flow_dv *dv;
5226         struct mlx5_flow *dev_flow;
5227
5228         if (!flow)
5229                 return;
5230         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5231                 dv = &dev_flow->dv;
5232                 if (dv->flow) {
5233                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
5234                         dv->flow = NULL;
5235                 }
5236                 if (dv->hrxq) {
5237                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
5238                                 mlx5_hrxq_drop_release(dev);
5239                         else
5240                                 mlx5_hrxq_release(dev, dv->hrxq);
5241                         dv->hrxq = NULL;
5242                 }
5243         }
5244 }
5245
5246 /**
5247  * Remove the flow from the NIC and the memory.
5248  *
5249  * @param[in] dev
5250  *   Pointer to the Ethernet device structure.
5251  * @param[in, out] flow
5252  *   Pointer to flow structure.
5253  */
5254 static void
5255 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
5256 {
5257         struct mlx5_flow *dev_flow;
5258
5259         if (!flow)
5260                 return;
5261         flow_dv_remove(dev, flow);
5262         if (flow->counter) {
5263                 flow_dv_counter_release(dev, flow->counter);
5264                 flow->counter = NULL;
5265         }
5266         if (flow->tag_resource) {
5267                 flow_dv_tag_release(dev, flow->tag_resource);
5268                 flow->tag_resource = NULL;
5269         }
5270         while (!LIST_EMPTY(&flow->dev_flows)) {
5271                 dev_flow = LIST_FIRST(&flow->dev_flows);
5272                 LIST_REMOVE(dev_flow, next);
5273                 if (dev_flow->dv.matcher)
5274                         flow_dv_matcher_release(dev, dev_flow);
5275                 if (dev_flow->dv.encap_decap)
5276                         flow_dv_encap_decap_resource_release(dev_flow);
5277                 if (dev_flow->dv.modify_hdr)
5278                         flow_dv_modify_hdr_resource_release(dev_flow);
5279                 if (dev_flow->dv.jump)
5280                         flow_dv_jump_tbl_resource_release(dev_flow);
5281                 if (dev_flow->dv.port_id_action)
5282                         flow_dv_port_id_action_resource_release(dev_flow);
5283                 rte_free(dev_flow);
5284         }
5285 }
5286
5287 /**
5288  * Query a dv flow  rule for its statistics via devx.
5289  *
5290  * @param[in] dev
5291  *   Pointer to Ethernet device.
5292  * @param[in] flow
5293  *   Pointer to the sub flow.
5294  * @param[out] data
5295  *   data retrieved by the query.
5296  * @param[out] error
5297  *   Perform verbose error reporting if not NULL.
5298  *
5299  * @return
5300  *   0 on success, a negative errno value otherwise and rte_errno is set.
5301  */
5302 static int
5303 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
5304                     void *data, struct rte_flow_error *error)
5305 {
5306         struct mlx5_priv *priv = dev->data->dev_private;
5307         struct rte_flow_query_count *qc = data;
5308
5309         if (!priv->config.devx)
5310                 return rte_flow_error_set(error, ENOTSUP,
5311                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5312                                           NULL,
5313                                           "counters are not supported");
5314         if (flow->counter) {
5315                 uint64_t pkts, bytes;
5316                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
5317                                                &bytes);
5318
5319                 if (err)
5320                         return rte_flow_error_set(error, -err,
5321                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5322                                         NULL, "cannot read counters");
5323                 qc->hits_set = 1;
5324                 qc->bytes_set = 1;
5325                 qc->hits = pkts - flow->counter->hits;
5326                 qc->bytes = bytes - flow->counter->bytes;
5327                 if (qc->reset) {
5328                         flow->counter->hits = pkts;
5329                         flow->counter->bytes = bytes;
5330                 }
5331                 return 0;
5332         }
5333         return rte_flow_error_set(error, EINVAL,
5334                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5335                                   NULL,
5336                                   "counters are not available");
5337 }
5338
5339 /**
5340  * Query a flow.
5341  *
5342  * @see rte_flow_query()
5343  * @see rte_flow_ops
5344  */
5345 static int
5346 flow_dv_query(struct rte_eth_dev *dev,
5347               struct rte_flow *flow __rte_unused,
5348               const struct rte_flow_action *actions __rte_unused,
5349               void *data __rte_unused,
5350               struct rte_flow_error *error __rte_unused)
5351 {
5352         int ret = -EINVAL;
5353
5354         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5355                 switch (actions->type) {
5356                 case RTE_FLOW_ACTION_TYPE_VOID:
5357                         break;
5358                 case RTE_FLOW_ACTION_TYPE_COUNT:
5359                         ret = flow_dv_query_count(dev, flow, data, error);
5360                         break;
5361                 default:
5362                         return rte_flow_error_set(error, ENOTSUP,
5363                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5364                                                   actions,
5365                                                   "action not supported");
5366                 }
5367         }
5368         return ret;
5369 }
5370
5371 /*
5372  * Mutex-protected thunk to flow_dv_translate().
5373  */
5374 static int
5375 flow_d_translate(struct rte_eth_dev *dev,
5376                  struct mlx5_flow *dev_flow,
5377                  const struct rte_flow_attr *attr,
5378                  const struct rte_flow_item items[],
5379                  const struct rte_flow_action actions[],
5380                  struct rte_flow_error *error)
5381 {
5382         int ret;
5383
5384         flow_d_shared_lock(dev);
5385         ret = flow_dv_translate(dev, dev_flow, attr, items, actions, error);
5386         flow_d_shared_unlock(dev);
5387         return ret;
5388 }
5389
5390 /*
5391  * Mutex-protected thunk to flow_dv_apply().
5392  */
5393 static int
5394 flow_d_apply(struct rte_eth_dev *dev,
5395              struct rte_flow *flow,
5396              struct rte_flow_error *error)
5397 {
5398         int ret;
5399
5400         flow_d_shared_lock(dev);
5401         ret = flow_dv_apply(dev, flow, error);
5402         flow_d_shared_unlock(dev);
5403         return ret;
5404 }
5405
5406 /*
5407  * Mutex-protected thunk to flow_dv_remove().
5408  */
5409 static void
5410 flow_d_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
5411 {
5412         flow_d_shared_lock(dev);
5413         flow_dv_remove(dev, flow);
5414         flow_d_shared_unlock(dev);
5415 }
5416
5417 /*
5418  * Mutex-protected thunk to flow_dv_destroy().
5419  */
5420 static void
5421 flow_d_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
5422 {
5423         flow_d_shared_lock(dev);
5424         flow_dv_destroy(dev, flow);
5425         flow_d_shared_unlock(dev);
5426 }
5427
5428 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
5429         .validate = flow_dv_validate,
5430         .prepare = flow_dv_prepare,
5431         .translate = flow_d_translate,
5432         .apply = flow_d_apply,
5433         .remove = flow_d_remove,
5434         .destroy = flow_d_destroy,
5435         .query = flow_dv_query,
5436 };
5437
5438 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */