drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30
  31 #include "mlx5.h"
  32 #include "mlx5_defs.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_flow.h"
  35 #include "mlx5_prm.h"
  36 #include "mlx5_rxtx.h"
  37
  38 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  39
  40 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  41 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  42 #endif
  43
  44 #ifndef HAVE_MLX5DV_DR_ESWITCH
  45 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  46 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  47 #endif
  48 #endif
  49
  50 #ifndef HAVE_MLX5DV_DR
  51 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  52 #endif
  53
  54 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  55                                           sizeof(struct rte_flow_item_ipv4))
  56 /* VLAN header definitions */
  57 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  58 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  59 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  60 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  61 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  62
  63 union flow_dv_attr {
  64         struct {
  65                 uint32_t valid:1;
  66                 uint32_t ipv4:1;
  67                 uint32_t ipv6:1;
  68                 uint32_t tcp:1;
  69                 uint32_t udp:1;
  70                 uint32_t reserved:27;
  71         };
  72         uint32_t attr;
  73 };
  74
  75 /**
  76  * Initialize flow attributes structure according to flow items' types.
  77  *
  78  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  79  * mode. For tunnel mode, the items to be modified are the outermost ones.
  80  *
  81  * @param[in] item
  82  *   Pointer to item specification.
  83  * @param[out] attr
  84  *   Pointer to flow attributes structure.
  85  */
  86 static void
  87 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  88 {
  89         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  90                 switch (item->type) {
  91                 case RTE_FLOW_ITEM_TYPE_IPV4:
  92                         if (!attr->ipv6)
  93                                 attr->ipv4 = 1;
  94                         break;
  95                 case RTE_FLOW_ITEM_TYPE_IPV6:
  96                         if (!attr->ipv4)
  97                                 attr->ipv6 = 1;
  98                         break;
  99                 case RTE_FLOW_ITEM_TYPE_UDP:
 100                         if (!attr->tcp)
 101                                 attr->udp = 1;
 102                         break;
 103                 case RTE_FLOW_ITEM_TYPE_TCP:
 104                         if (!attr->udp)
 105                                 attr->tcp = 1;
 106                         break;
 107                 default:
 108                         break;
 109                 }
 110         }
 111         attr->valid = 1;
 112 }
 113
 114 /**
 115  * Convert rte_mtr_color to mlx5 color.
 116  *
 117  * @param[in] rcol
 118  *   rte_mtr_color.
 119  *
 120  * @return
 121  *   mlx5 color.
 122  */
 123 static int
 124 rte_col_2_mlx5_col(enum rte_color rcol)
 125 {
 126         switch (rcol) {
 127         case RTE_COLOR_GREEN:
 128                 return MLX5_FLOW_COLOR_GREEN;
 129         case RTE_COLOR_YELLOW:
 130                 return MLX5_FLOW_COLOR_YELLOW;
 131         case RTE_COLOR_RED:
 132                 return MLX5_FLOW_COLOR_RED;
 133         default:
 134                 break;
 135         }
 136         return MLX5_FLOW_COLOR_UNDEFINED;
 137 }
 138
 139 struct field_modify_info {
 140         uint32_t size; /* Size of field in protocol header, in bytes. */
 141         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 142         enum mlx5_modification_field id;
 143 };
 144
 145 struct field_modify_info modify_eth[] = {
 146         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 147         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 148         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 149         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 150         {0, 0, 0},
 151 };
 152
 153 struct field_modify_info modify_vlan_out_first_vid[] = {
 154         /* Size in bits !!! */
 155         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 156         {0, 0, 0},
 157 };
 158
 159 struct field_modify_info modify_ipv4[] = {
 160         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 161         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 162         {4, 12, MLX5_MODI_OUT_SIPV4},
 163         {4, 16, MLX5_MODI_OUT_DIPV4},
 164         {0, 0, 0},
 165 };
 166
 167 struct field_modify_info modify_ipv6[] = {
 168         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 169         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 170         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 171         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 172         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 173         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 174         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 175         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 176         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 177         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 178         {0, 0, 0},
 179 };
 180
 181 struct field_modify_info modify_udp[] = {
 182         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 183         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 184         {0, 0, 0},
 185 };
 186
 187 struct field_modify_info modify_tcp[] = {
 188         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 189         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 190         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 191         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 192         {0, 0, 0},
 193 };
 194
 195 static void
 196 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 197                           uint8_t next_protocol, uint64_t *item_flags,
 198                           int *tunnel)
 199 {
 200         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 201                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 202         if (next_protocol == IPPROTO_IPIP) {
 203                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 204                 *tunnel = 1;
 205         }
 206         if (next_protocol == IPPROTO_IPV6) {
 207                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 208                 *tunnel = 1;
 209         }
 210 }
 211
 212 /**
 213  * Acquire the synchronizing object to protect multithreaded access
 214  * to shared dv context. Lock occurs only if context is actually
 215  * shared, i.e. we have multiport IB device and representors are
 216  * created.
 217  *
 218  * @param[in] dev
 219  *   Pointer to the rte_eth_dev structure.
 220  */
 221 static void
 222 flow_dv_shared_lock(struct rte_eth_dev *dev)
 223 {
 224         struct mlx5_priv *priv = dev->data->dev_private;
 225         struct mlx5_ibv_shared *sh = priv->sh;
 226
 227         if (sh->dv_refcnt > 1) {
 228                 int ret;
 229
 230                 ret = pthread_mutex_lock(&sh->dv_mutex);
 231                 assert(!ret);
 232                 (void)ret;
 233         }
 234 }
 235
 236 static void
 237 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 238 {
 239         struct mlx5_priv *priv = dev->data->dev_private;
 240         struct mlx5_ibv_shared *sh = priv->sh;
 241
 242         if (sh->dv_refcnt > 1) {
 243                 int ret;
 244
 245                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 246                 assert(!ret);
 247                 (void)ret;
 248         }
 249 }
 250
 251 /* Update VLAN's VID/PCP based on input rte_flow_action.
 252  *
 253  * @param[in] action
 254  *   Pointer to struct rte_flow_action.
 255  * @param[out] vlan
 256  *   Pointer to struct rte_vlan_hdr.
 257  */
 258 static void
 259 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 260                          struct rte_vlan_hdr *vlan)
 261 {
 262         uint16_t vlan_tci;
 263         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 264                 vlan_tci =
 265                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 266                                                action->conf)->vlan_pcp;
 267                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 268                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 269                 vlan->vlan_tci |= vlan_tci;
 270         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 271                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 272                 vlan->vlan_tci |= rte_be_to_cpu_16
 273                     (((const struct rte_flow_action_of_set_vlan_vid *)
 274                                              action->conf)->vlan_vid);
 275         }
 276 }
 277
 278 /**
 279  * Fetch 1, 2, 3 or 4 byte field from the byte array
 280  * and return as unsigned integer in host-endian format.
 281  *
 282  * @param[in] data
 283  *   Pointer to data array.
 284  * @param[in] size
 285  *   Size of field to extract.
 286  *
 287  * @return
 288  *   converted field in host endian format.
 289  */
 290 static inline uint32_t
 291 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 292 {
 293         uint32_t ret;
 294
 295         switch (size) {
 296         case 1:
 297                 ret = *data;
 298                 break;
 299         case 2:
 300                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 301                 break;
 302         case 3:
 303                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 304                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 305                 break;
 306         case 4:
 307                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 308                 break;
 309         default:
 310                 assert(false);
 311                 ret = 0;
 312                 break;
 313         }
 314         return ret;
 315 }
 316
 317 /**
 318  * Convert modify-header action to DV specification.
 319  *
 320  * Data length of each action is determined by provided field description
 321  * and the item mask. Data bit offset and width of each action is determined
 322  * by provided item mask.
 323  *
 324  * @param[in] item
 325  *   Pointer to item specification.
 326  * @param[in] field
 327  *   Pointer to field modification information.
 328  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 329  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 330  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 331  * @param[in] dcopy
 332  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 333  *   Negative offset value sets the same offset as source offset.
 334  *   size field is ignored, value is taken from source field.
 335  * @param[in,out] resource
 336  *   Pointer to the modify-header resource.
 337  * @param[in] type
 338  *   Type of modification.
 339  * @param[out] error
 340  *   Pointer to the error structure.
 341  *
 342  * @return
 343  *   0 on success, a negative errno value otherwise and rte_errno is set.
 344  */
 345 static int
 346 flow_dv_convert_modify_action(struct rte_flow_item *item,
 347                               struct field_modify_info *field,
 348                               struct field_modify_info *dcopy,
 349                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 350                               uint32_t type, struct rte_flow_error *error)
 351 {
 352         uint32_t i = resource->actions_num;
 353         struct mlx5_modification_cmd *actions = resource->actions;
 354
 355         /*
 356          * The item and mask are provided in big-endian format.
 357          * The fields should be presented as in big-endian format either.
 358          * Mask must be always present, it defines the actual field width.
 359          */
 360         assert(item->mask);
 361         assert(field->size);
 362         do {
 363                 unsigned int size_b;
 364                 unsigned int off_b;
 365                 uint32_t mask;
 366                 uint32_t data;
 367
 368                 if (i >= MLX5_MODIFY_NUM)
 369                         return rte_flow_error_set(error, EINVAL,
 370                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 371                                  "too many items to modify");
 372                 /* Fetch variable byte size mask from the array. */
 373                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 374                                            field->offset, field->size);
 375                 if (!mask) {
 376                         ++field;
 377                         continue;
 378                 }
 379                 /* Deduce actual data width in bits from mask value. */
 380                 off_b = rte_bsf32(mask);
 381                 size_b = sizeof(uint32_t) * CHAR_BIT -
 382                          off_b - __builtin_clz(mask);
 383                 assert(size_b);
 384                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 385                 actions[i].action_type = type;
 386                 actions[i].field = field->id;
 387                 actions[i].offset = off_b;
 388                 actions[i].length = size_b;
 389                 /* Convert entire record to expected big-endian format. */
 390                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 391                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 392                         assert(dcopy);
 393                         actions[i].dst_field = dcopy->id;
 394                         actions[i].dst_offset =
 395                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 396                         /* Convert entire record to big-endian format. */
 397                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 398                 } else {
 399                         assert(item->spec);
 400                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 401                                                    field->offset, field->size);
 402                         /* Shift out the trailing masked bits from data. */
 403                         data = (data & mask) >> off_b;
 404                         actions[i].data1 = rte_cpu_to_be_32(data);
 405                 }
 406                 ++i;
 407                 ++field;
 408         } while (field->size);
 409         resource->actions_num = i;
 410         if (!resource->actions_num)
 411                 return rte_flow_error_set(error, EINVAL,
 412                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 413                                           "invalid modification flow item");
 414         return 0;
 415 }
 416
 417 /**
 418  * Convert modify-header set IPv4 address action to DV specification.
 419  *
 420  * @param[in,out] resource
 421  *   Pointer to the modify-header resource.
 422  * @param[in] action
 423  *   Pointer to action specification.
 424  * @param[out] error
 425  *   Pointer to the error structure.
 426  *
 427  * @return
 428  *   0 on success, a negative errno value otherwise and rte_errno is set.
 429  */
 430 static int
 431 flow_dv_convert_action_modify_ipv4
 432                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 433                          const struct rte_flow_action *action,
 434                          struct rte_flow_error *error)
 435 {
 436         const struct rte_flow_action_set_ipv4 *conf =
 437                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 438         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 439         struct rte_flow_item_ipv4 ipv4;
 440         struct rte_flow_item_ipv4 ipv4_mask;
 441
 442         memset(&ipv4, 0, sizeof(ipv4));
 443         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 444         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 445                 ipv4.hdr.src_addr = conf->ipv4_addr;
 446                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 447         } else {
 448                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 449                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 450         }
 451         item.spec = &ipv4;
 452         item.mask = &ipv4_mask;
 453         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 454                                              MLX5_MODIFICATION_TYPE_SET, error);
 455 }
 456
 457 /**
 458  * Convert modify-header set IPv6 address action to DV specification.
 459  *
 460  * @param[in,out] resource
 461  *   Pointer to the modify-header resource.
 462  * @param[in] action
 463  *   Pointer to action specification.
 464  * @param[out] error
 465  *   Pointer to the error structure.
 466  *
 467  * @return
 468  *   0 on success, a negative errno value otherwise and rte_errno is set.
 469  */
 470 static int
 471 flow_dv_convert_action_modify_ipv6
 472                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 473                          const struct rte_flow_action *action,
 474                          struct rte_flow_error *error)
 475 {
 476         const struct rte_flow_action_set_ipv6 *conf =
 477                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 478         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 479         struct rte_flow_item_ipv6 ipv6;
 480         struct rte_flow_item_ipv6 ipv6_mask;
 481
 482         memset(&ipv6, 0, sizeof(ipv6));
 483         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 484         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 485                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 486                        sizeof(ipv6.hdr.src_addr));
 487                 memcpy(&ipv6_mask.hdr.src_addr,
 488                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 489                        sizeof(ipv6.hdr.src_addr));
 490         } else {
 491                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 492                        sizeof(ipv6.hdr.dst_addr));
 493                 memcpy(&ipv6_mask.hdr.dst_addr,
 494                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 495                        sizeof(ipv6.hdr.dst_addr));
 496         }
 497         item.spec = &ipv6;
 498         item.mask = &ipv6_mask;
 499         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 500                                              MLX5_MODIFICATION_TYPE_SET, error);
 501 }
 502
 503 /**
 504  * Convert modify-header set MAC address action to DV specification.
 505  *
 506  * @param[in,out] resource
 507  *   Pointer to the modify-header resource.
 508  * @param[in] action
 509  *   Pointer to action specification.
 510  * @param[out] error
 511  *   Pointer to the error structure.
 512  *
 513  * @return
 514  *   0 on success, a negative errno value otherwise and rte_errno is set.
 515  */
 516 static int
 517 flow_dv_convert_action_modify_mac
 518                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 519                          const struct rte_flow_action *action,
 520                          struct rte_flow_error *error)
 521 {
 522         const struct rte_flow_action_set_mac *conf =
 523                 (const struct rte_flow_action_set_mac *)(action->conf);
 524         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 525         struct rte_flow_item_eth eth;
 526         struct rte_flow_item_eth eth_mask;
 527
 528         memset(&eth, 0, sizeof(eth));
 529         memset(&eth_mask, 0, sizeof(eth_mask));
 530         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 531                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 532                        sizeof(eth.src.addr_bytes));
 533                 memcpy(&eth_mask.src.addr_bytes,
 534                        &rte_flow_item_eth_mask.src.addr_bytes,
 535                        sizeof(eth_mask.src.addr_bytes));
 536         } else {
 537                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 538                        sizeof(eth.dst.addr_bytes));
 539                 memcpy(&eth_mask.dst.addr_bytes,
 540                        &rte_flow_item_eth_mask.dst.addr_bytes,
 541                        sizeof(eth_mask.dst.addr_bytes));
 542         }
 543         item.spec = &eth;
 544         item.mask = &eth_mask;
 545         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 546                                              MLX5_MODIFICATION_TYPE_SET, error);
 547 }
 548
 549 /**
 550  * Convert modify-header set VLAN VID action to DV specification.
 551  *
 552  * @param[in,out] resource
 553  *   Pointer to the modify-header resource.
 554  * @param[in] action
 555  *   Pointer to action specification.
 556  * @param[out] error
 557  *   Pointer to the error structure.
 558  *
 559  * @return
 560  *   0 on success, a negative errno value otherwise and rte_errno is set.
 561  */
 562 static int
 563 flow_dv_convert_action_modify_vlan_vid
 564                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 565                          const struct rte_flow_action *action,
 566                          struct rte_flow_error *error)
 567 {
 568         const struct rte_flow_action_of_set_vlan_vid *conf =
 569                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 570         int i = resource->actions_num;
 571         struct mlx5_modification_cmd *actions = &resource->actions[i];
 572         struct field_modify_info *field = modify_vlan_out_first_vid;
 573
 574         if (i >= MLX5_MODIFY_NUM)
 575                 return rte_flow_error_set(error, EINVAL,
 576                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 577                          "too many items to modify");
 578         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 579         actions[i].field = field->id;
 580         actions[i].length = field->size;
 581         actions[i].offset = field->offset;
 582         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 583         actions[i].data1 = conf->vlan_vid;
 584         actions[i].data1 = actions[i].data1 << 16;
 585         resource->actions_num = ++i;
 586         return 0;
 587 }
 588
 589 /**
 590  * Convert modify-header set TP action to DV specification.
 591  *
 592  * @param[in,out] resource
 593  *   Pointer to the modify-header resource.
 594  * @param[in] action
 595  *   Pointer to action specification.
 596  * @param[in] items
 597  *   Pointer to rte_flow_item objects list.
 598  * @param[in] attr
 599  *   Pointer to flow attributes structure.
 600  * @param[out] error
 601  *   Pointer to the error structure.
 602  *
 603  * @return
 604  *   0 on success, a negative errno value otherwise and rte_errno is set.
 605  */
 606 static int
 607 flow_dv_convert_action_modify_tp
 608                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 609                          const struct rte_flow_action *action,
 610                          const struct rte_flow_item *items,
 611                          union flow_dv_attr *attr,
 612                          struct rte_flow_error *error)
 613 {
 614         const struct rte_flow_action_set_tp *conf =
 615                 (const struct rte_flow_action_set_tp *)(action->conf);
 616         struct rte_flow_item item;
 617         struct rte_flow_item_udp udp;
 618         struct rte_flow_item_udp udp_mask;
 619         struct rte_flow_item_tcp tcp;
 620         struct rte_flow_item_tcp tcp_mask;
 621         struct field_modify_info *field;
 622
 623         if (!attr->valid)
 624                 flow_dv_attr_init(items, attr);
 625         if (attr->udp) {
 626                 memset(&udp, 0, sizeof(udp));
 627                 memset(&udp_mask, 0, sizeof(udp_mask));
 628                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 629                         udp.hdr.src_port = conf->port;
 630                         udp_mask.hdr.src_port =
 631                                         rte_flow_item_udp_mask.hdr.src_port;
 632                 } else {
 633                         udp.hdr.dst_port = conf->port;
 634                         udp_mask.hdr.dst_port =
 635                                         rte_flow_item_udp_mask.hdr.dst_port;
 636                 }
 637                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 638                 item.spec = &udp;
 639                 item.mask = &udp_mask;
 640                 field = modify_udp;
 641         }
 642         if (attr->tcp) {
 643                 memset(&tcp, 0, sizeof(tcp));
 644                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 645                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 646                         tcp.hdr.src_port = conf->port;
 647                         tcp_mask.hdr.src_port =
 648                                         rte_flow_item_tcp_mask.hdr.src_port;
 649                 } else {
 650                         tcp.hdr.dst_port = conf->port;
 651                         tcp_mask.hdr.dst_port =
 652                                         rte_flow_item_tcp_mask.hdr.dst_port;
 653                 }
 654                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 655                 item.spec = &tcp;
 656                 item.mask = &tcp_mask;
 657                 field = modify_tcp;
 658         }
 659         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 660                                              MLX5_MODIFICATION_TYPE_SET, error);
 661 }
 662
 663 /**
 664  * Convert modify-header set TTL action to DV specification.
 665  *
 666  * @param[in,out] resource
 667  *   Pointer to the modify-header resource.
 668  * @param[in] action
 669  *   Pointer to action specification.
 670  * @param[in] items
 671  *   Pointer to rte_flow_item objects list.
 672  * @param[in] attr
 673  *   Pointer to flow attributes structure.
 674  * @param[out] error
 675  *   Pointer to the error structure.
 676  *
 677  * @return
 678  *   0 on success, a negative errno value otherwise and rte_errno is set.
 679  */
 680 static int
 681 flow_dv_convert_action_modify_ttl
 682                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 683                          const struct rte_flow_action *action,
 684                          const struct rte_flow_item *items,
 685                          union flow_dv_attr *attr,
 686                          struct rte_flow_error *error)
 687 {
 688         const struct rte_flow_action_set_ttl *conf =
 689                 (const struct rte_flow_action_set_ttl *)(action->conf);
 690         struct rte_flow_item item;
 691         struct rte_flow_item_ipv4 ipv4;
 692         struct rte_flow_item_ipv4 ipv4_mask;
 693         struct rte_flow_item_ipv6 ipv6;
 694         struct rte_flow_item_ipv6 ipv6_mask;
 695         struct field_modify_info *field;
 696
 697         if (!attr->valid)
 698                 flow_dv_attr_init(items, attr);
 699         if (attr->ipv4) {
 700                 memset(&ipv4, 0, sizeof(ipv4));
 701                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 702                 ipv4.hdr.time_to_live = conf->ttl_value;
 703                 ipv4_mask.hdr.time_to_live = 0xFF;
 704                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 705                 item.spec = &ipv4;
 706                 item.mask = &ipv4_mask;
 707                 field = modify_ipv4;
 708         }
 709         if (attr->ipv6) {
 710                 memset(&ipv6, 0, sizeof(ipv6));
 711                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 712                 ipv6.hdr.hop_limits = conf->ttl_value;
 713                 ipv6_mask.hdr.hop_limits = 0xFF;
 714                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 715                 item.spec = &ipv6;
 716                 item.mask = &ipv6_mask;
 717                 field = modify_ipv6;
 718         }
 719         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 720                                              MLX5_MODIFICATION_TYPE_SET, error);
 721 }
 722
 723 /**
 724  * Convert modify-header decrement TTL action to DV specification.
 725  *
 726  * @param[in,out] resource
 727  *   Pointer to the modify-header resource.
 728  * @param[in] action
 729  *   Pointer to action specification.
 730  * @param[in] items
 731  *   Pointer to rte_flow_item objects list.
 732  * @param[in] attr
 733  *   Pointer to flow attributes structure.
 734  * @param[out] error
 735  *   Pointer to the error structure.
 736  *
 737  * @return
 738  *   0 on success, a negative errno value otherwise and rte_errno is set.
 739  */
 740 static int
 741 flow_dv_convert_action_modify_dec_ttl
 742                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 743                          const struct rte_flow_item *items,
 744                          union flow_dv_attr *attr,
 745                          struct rte_flow_error *error)
 746 {
 747         struct rte_flow_item item;
 748         struct rte_flow_item_ipv4 ipv4;
 749         struct rte_flow_item_ipv4 ipv4_mask;
 750         struct rte_flow_item_ipv6 ipv6;
 751         struct rte_flow_item_ipv6 ipv6_mask;
 752         struct field_modify_info *field;
 753
 754         if (!attr->valid)
 755                 flow_dv_attr_init(items, attr);
 756         if (attr->ipv4) {
 757                 memset(&ipv4, 0, sizeof(ipv4));
 758                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 759                 ipv4.hdr.time_to_live = 0xFF;
 760                 ipv4_mask.hdr.time_to_live = 0xFF;
 761                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 762                 item.spec = &ipv4;
 763                 item.mask = &ipv4_mask;
 764                 field = modify_ipv4;
 765         }
 766         if (attr->ipv6) {
 767                 memset(&ipv6, 0, sizeof(ipv6));
 768                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 769                 ipv6.hdr.hop_limits = 0xFF;
 770                 ipv6_mask.hdr.hop_limits = 0xFF;
 771                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 772                 item.spec = &ipv6;
 773                 item.mask = &ipv6_mask;
 774                 field = modify_ipv6;
 775         }
 776         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 777                                              MLX5_MODIFICATION_TYPE_ADD, error);
 778 }
 779
 780 /**
 781  * Convert modify-header increment/decrement TCP Sequence number
 782  * to DV specification.
 783  *
 784  * @param[in,out] resource
 785  *   Pointer to the modify-header resource.
 786  * @param[in] action
 787  *   Pointer to action specification.
 788  * @param[out] error
 789  *   Pointer to the error structure.
 790  *
 791  * @return
 792  *   0 on success, a negative errno value otherwise and rte_errno is set.
 793  */
 794 static int
 795 flow_dv_convert_action_modify_tcp_seq
 796                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 797                          const struct rte_flow_action *action,
 798                          struct rte_flow_error *error)
 799 {
 800         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 801         uint64_t value = rte_be_to_cpu_32(*conf);
 802         struct rte_flow_item item;
 803         struct rte_flow_item_tcp tcp;
 804         struct rte_flow_item_tcp tcp_mask;
 805
 806         memset(&tcp, 0, sizeof(tcp));
 807         memset(&tcp_mask, 0, sizeof(tcp_mask));
 808         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 809                 /*
 810                  * The HW has no decrement operation, only increment operation.
 811                  * To simulate decrement X from Y using increment operation
 812                  * we need to add UINT32_MAX X times to Y.
 813                  * Each adding of UINT32_MAX decrements Y by 1.
 814                  */
 815                 value *= UINT32_MAX;
 816         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 817         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 818         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 819         item.spec = &tcp;
 820         item.mask = &tcp_mask;
 821         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 822                                              MLX5_MODIFICATION_TYPE_ADD, error);
 823 }
 824
 825 /**
 826  * Convert modify-header increment/decrement TCP Acknowledgment number
 827  * to DV specification.
 828  *
 829  * @param[in,out] resource
 830  *   Pointer to the modify-header resource.
 831  * @param[in] action
 832  *   Pointer to action specification.
 833  * @param[out] error
 834  *   Pointer to the error structure.
 835  *
 836  * @return
 837  *   0 on success, a negative errno value otherwise and rte_errno is set.
 838  */
 839 static int
 840 flow_dv_convert_action_modify_tcp_ack
 841                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 842                          const struct rte_flow_action *action,
 843                          struct rte_flow_error *error)
 844 {
 845         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 846         uint64_t value = rte_be_to_cpu_32(*conf);
 847         struct rte_flow_item item;
 848         struct rte_flow_item_tcp tcp;
 849         struct rte_flow_item_tcp tcp_mask;
 850
 851         memset(&tcp, 0, sizeof(tcp));
 852         memset(&tcp_mask, 0, sizeof(tcp_mask));
 853         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 854                 /*
 855                  * The HW has no decrement operation, only increment operation.
 856                  * To simulate decrement X from Y using increment operation
 857                  * we need to add UINT32_MAX X times to Y.
 858                  * Each adding of UINT32_MAX decrements Y by 1.
 859                  */
 860                 value *= UINT32_MAX;
 861         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 862         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 863         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 864         item.spec = &tcp;
 865         item.mask = &tcp_mask;
 866         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 867                                              MLX5_MODIFICATION_TYPE_ADD, error);
 868 }
 869
 870 static enum mlx5_modification_field reg_to_field[] = {
 871         [REG_NONE] = MLX5_MODI_OUT_NONE,
 872         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 873         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 874         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 875         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 876         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 877         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 878         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 879         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 880         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 881         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 882 };
 883
 884 /**
 885  * Convert register set to DV specification.
 886  *
 887  * @param[in,out] resource
 888  *   Pointer to the modify-header resource.
 889  * @param[in] action
 890  *   Pointer to action specification.
 891  * @param[out] error
 892  *   Pointer to the error structure.
 893  *
 894  * @return
 895  *   0 on success, a negative errno value otherwise and rte_errno is set.
 896  */
 897 static int
 898 flow_dv_convert_action_set_reg
 899                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 900                          const struct rte_flow_action *action,
 901                          struct rte_flow_error *error)
 902 {
 903         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 904         struct mlx5_modification_cmd *actions = resource->actions;
 905         uint32_t i = resource->actions_num;
 906
 907         if (i >= MLX5_MODIFY_NUM)
 908                 return rte_flow_error_set(error, EINVAL,
 909                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 910                                           "too many items to modify");
 911         assert(conf->id != REG_NONE);
 912         assert(conf->id < RTE_DIM(reg_to_field));
 913         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 914         actions[i].field = reg_to_field[conf->id];
 915         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 916         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 917         ++i;
 918         resource->actions_num = i;
 919         if (!resource->actions_num)
 920                 return rte_flow_error_set(error, EINVAL,
 921                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 922                                           "invalid modification flow item");
 923         return 0;
 924 }
 925
 926 /**
 927  * Convert SET_TAG action to DV specification.
 928  *
 929  * @param[in] dev
 930  *   Pointer to the rte_eth_dev structure.
 931  * @param[in,out] resource
 932  *   Pointer to the modify-header resource.
 933  * @param[in] conf
 934  *   Pointer to action specification.
 935  * @param[out] error
 936  *   Pointer to the error structure.
 937  *
 938  * @return
 939  *   0 on success, a negative errno value otherwise and rte_errno is set.
 940  */
 941 static int
 942 flow_dv_convert_action_set_tag
 943                         (struct rte_eth_dev *dev,
 944                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 945                          const struct rte_flow_action_set_tag *conf,
 946                          struct rte_flow_error *error)
 947 {
 948         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 949         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 950         struct rte_flow_item item = {
 951                 .spec = &data,
 952                 .mask = &mask,
 953         };
 954         struct field_modify_info reg_c_x[] = {
 955                 [1] = {0, 0, 0},
 956         };
 957         enum mlx5_modification_field reg_type;
 958         int ret;
 959
 960         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 961         if (ret < 0)
 962                 return ret;
 963         assert(ret != REG_NONE);
 964         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 965         reg_type = reg_to_field[ret];
 966         assert(reg_type > 0);
 967         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 968         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 969                                              MLX5_MODIFICATION_TYPE_SET, error);
 970 }
 971
 972 /**
 973  * Convert internal COPY_REG action to DV specification.
 974  *
 975  * @param[in] dev
 976  *   Pointer to the rte_eth_dev structure.
 977  * @param[in,out] res
 978  *   Pointer to the modify-header resource.
 979  * @param[in] action
 980  *   Pointer to action specification.
 981  * @param[out] error
 982  *   Pointer to the error structure.
 983  *
 984  * @return
 985  *   0 on success, a negative errno value otherwise and rte_errno is set.
 986  */
 987 static int
 988 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 989                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 990                                  const struct rte_flow_action *action,
 991                                  struct rte_flow_error *error)
 992 {
 993         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 994         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 995         struct rte_flow_item item = {
 996                 .spec = NULL,
 997                 .mask = &mask,
 998         };
 999         struct field_modify_info reg_src[] = {
1000                 {4, 0, reg_to_field[conf->src]},
1001                 {0, 0, 0},
1002         };
1003         struct field_modify_info reg_dst = {
1004                 .offset = 0,
1005                 .id = reg_to_field[conf->dst],
1006         };
1007         /* Adjust reg_c[0] usage according to reported mask. */
1008         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1009                 struct mlx5_priv *priv = dev->data->dev_private;
1010                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1011
1012                 assert(reg_c0);
1013                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1014                 if (conf->dst == REG_C_0) {
1015                         /* Copy to reg_c[0], within mask only. */
1016                         reg_dst.offset = rte_bsf32(reg_c0);
1017                         /*
1018                          * Mask is ignoring the enianness, because
1019                          * there is no conversion in datapath.
1020                          */
1021 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1022                         /* Copy from destination lower bits to reg_c[0]. */
1023                         mask = reg_c0 >> reg_dst.offset;
1024 #else
1025                         /* Copy from destination upper bits to reg_c[0]. */
1026                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1027                                           rte_fls_u32(reg_c0));
1028 #endif
1029                 } else {
1030                         mask = rte_cpu_to_be_32(reg_c0);
1031 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1032                         /* Copy from reg_c[0] to destination lower bits. */
1033                         reg_dst.offset = 0;
1034 #else
1035                         /* Copy from reg_c[0] to destination upper bits. */
1036                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1037                                          (rte_fls_u32(reg_c0) -
1038                                           rte_bsf32(reg_c0));
1039 #endif
1040                 }
1041         }
1042         return flow_dv_convert_modify_action(&item,
1043                                              reg_src, &reg_dst, res,
1044                                              MLX5_MODIFICATION_TYPE_COPY,
1045                                              error);
1046 }
1047
1048 /**
1049  * Convert MARK action to DV specification. This routine is used
1050  * in extensive metadata only and requires metadata register to be
1051  * handled. In legacy mode hardware tag resource is engaged.
1052  *
1053  * @param[in] dev
1054  *   Pointer to the rte_eth_dev structure.
1055  * @param[in] conf
1056  *   Pointer to MARK action specification.
1057  * @param[in,out] resource
1058  *   Pointer to the modify-header resource.
1059  * @param[out] error
1060  *   Pointer to the error structure.
1061  *
1062  * @return
1063  *   0 on success, a negative errno value otherwise and rte_errno is set.
1064  */
1065 static int
1066 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1067                             const struct rte_flow_action_mark *conf,
1068                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1069                             struct rte_flow_error *error)
1070 {
1071         struct mlx5_priv *priv = dev->data->dev_private;
1072         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1073                                            priv->sh->dv_mark_mask);
1074         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1075         struct rte_flow_item item = {
1076                 .spec = &data,
1077                 .mask = &mask,
1078         };
1079         struct field_modify_info reg_c_x[] = {
1080                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1081                 {0, 0, 0},
1082         };
1083         enum modify_reg reg;
1084
1085         if (!mask)
1086                 return rte_flow_error_set(error, EINVAL,
1087                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1088                                           NULL, "zero mark action mask");
1089         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1090         if (reg < 0)
1091                 return reg;
1092         assert(reg > 0);
1093         reg_c_x[0].id = reg_to_field[reg];
1094         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1095                                              MLX5_MODIFICATION_TYPE_SET, error);
1096 }
1097
1098 /**
1099  * Get metadata register index for specified steering domain.
1100  *
1101  * @param[in] dev
1102  *   Pointer to the rte_eth_dev structure.
1103  * @param[in] attr
1104  *   Attributes of flow to determine steering domain.
1105  * @param[out] error
1106  *   Pointer to the error structure.
1107  *
1108  * @return
1109  *   positive index on success, a negative errno value otherwise
1110  *   and rte_errno is set.
1111  */
1112 static enum modify_reg
1113 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1114                          const struct rte_flow_attr *attr,
1115                          struct rte_flow_error *error)
1116 {
1117         enum modify_reg reg =
1118                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1119                                           MLX5_METADATA_FDB :
1120                                             attr->egress ?
1121                                             MLX5_METADATA_TX :
1122                                             MLX5_METADATA_RX, 0, error);
1123         if (reg < 0)
1124                 return rte_flow_error_set(error,
1125                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1126                                           NULL, "unavailable "
1127                                           "metadata register");
1128         return reg;
1129 }
1130
1131 /**
1132  * Convert SET_META action to DV specification.
1133  *
1134  * @param[in] dev
1135  *   Pointer to the rte_eth_dev structure.
1136  * @param[in,out] resource
1137  *   Pointer to the modify-header resource.
1138  * @param[in] attr
1139  *   Attributes of flow that includes this item.
1140  * @param[in] conf
1141  *   Pointer to action specification.
1142  * @param[out] error
1143  *   Pointer to the error structure.
1144  *
1145  * @return
1146  *   0 on success, a negative errno value otherwise and rte_errno is set.
1147  */
1148 static int
1149 flow_dv_convert_action_set_meta
1150                         (struct rte_eth_dev *dev,
1151                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1152                          const struct rte_flow_attr *attr,
1153                          const struct rte_flow_action_set_meta *conf,
1154                          struct rte_flow_error *error)
1155 {
1156         uint32_t data = conf->data;
1157         uint32_t mask = conf->mask;
1158         struct rte_flow_item item = {
1159                 .spec = &data,
1160                 .mask = &mask,
1161         };
1162         struct field_modify_info reg_c_x[] = {
1163                 [1] = {0, 0, 0},
1164         };
1165         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1166
1167         if (reg < 0)
1168                 return reg;
1169         /*
1170          * In datapath code there is no endianness
1171          * coversions for perfromance reasons, all
1172          * pattern conversions are done in rte_flow.
1173          */
1174         if (reg == REG_C_0) {
1175                 struct mlx5_priv *priv = dev->data->dev_private;
1176                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1177                 uint32_t shl_c0;
1178
1179                 assert(msk_c0);
1180 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1181                 shl_c0 = rte_bsf32(msk_c0);
1182 #else
1183                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1184 #endif
1185                 mask <<= shl_c0;
1186                 data <<= shl_c0;
1187                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1188         }
1189         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1190         /* The routine expects parameters in memory as big-endian ones. */
1191         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1192                                              MLX5_MODIFICATION_TYPE_SET, error);
1193 }
1194
1195 /**
1196  * Convert modify-header set IPv4 DSCP action to DV specification.
1197  *
1198  * @param[in,out] resource
1199  *   Pointer to the modify-header resource.
1200  * @param[in] action
1201  *   Pointer to action specification.
1202  * @param[out] error
1203  *   Pointer to the error structure.
1204  *
1205  * @return
1206  *   0 on success, a negative errno value otherwise and rte_errno is set.
1207  */
1208 static int
1209 flow_dv_convert_action_modify_ipv4_dscp
1210                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1211                          const struct rte_flow_action *action,
1212                          struct rte_flow_error *error)
1213 {
1214         const struct rte_flow_action_set_dscp *conf =
1215                 (const struct rte_flow_action_set_dscp *)(action->conf);
1216         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1217         struct rte_flow_item_ipv4 ipv4;
1218         struct rte_flow_item_ipv4 ipv4_mask;
1219
1220         memset(&ipv4, 0, sizeof(ipv4));
1221         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1222         ipv4.hdr.type_of_service = conf->dscp;
1223         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1224         item.spec = &ipv4;
1225         item.mask = &ipv4_mask;
1226         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1227                                              MLX5_MODIFICATION_TYPE_SET, error);
1228 }
1229
1230 /**
1231  * Convert modify-header set IPv6 DSCP action to DV specification.
1232  *
1233  * @param[in,out] resource
1234  *   Pointer to the modify-header resource.
1235  * @param[in] action
1236  *   Pointer to action specification.
1237  * @param[out] error
1238  *   Pointer to the error structure.
1239  *
1240  * @return
1241  *   0 on success, a negative errno value otherwise and rte_errno is set.
1242  */
1243 static int
1244 flow_dv_convert_action_modify_ipv6_dscp
1245                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1246                          const struct rte_flow_action *action,
1247                          struct rte_flow_error *error)
1248 {
1249         const struct rte_flow_action_set_dscp *conf =
1250                 (const struct rte_flow_action_set_dscp *)(action->conf);
1251         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1252         struct rte_flow_item_ipv6 ipv6;
1253         struct rte_flow_item_ipv6 ipv6_mask;
1254
1255         memset(&ipv6, 0, sizeof(ipv6));
1256         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1257         /*
1258          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1259          * rdma-core only accept the DSCP bits byte aligned start from
1260          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1261          * bits in IPv6 case as rdma-core requires byte aligned value.
1262          */
1263         ipv6.hdr.vtc_flow = conf->dscp;
1264         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1265         item.spec = &ipv6;
1266         item.mask = &ipv6_mask;
1267         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1268                                              MLX5_MODIFICATION_TYPE_SET, error);
1269 }
1270
1271 /**
1272  * Validate MARK item.
1273  *
1274  * @param[in] dev
1275  *   Pointer to the rte_eth_dev structure.
1276  * @param[in] item
1277  *   Item specification.
1278  * @param[in] attr
1279  *   Attributes of flow that includes this item.
1280  * @param[out] error
1281  *   Pointer to error structure.
1282  *
1283  * @return
1284  *   0 on success, a negative errno value otherwise and rte_errno is set.
1285  */
1286 static int
1287 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1288                            const struct rte_flow_item *item,
1289                            const struct rte_flow_attr *attr __rte_unused,
1290                            struct rte_flow_error *error)
1291 {
1292         struct mlx5_priv *priv = dev->data->dev_private;
1293         struct mlx5_dev_config *config = &priv->config;
1294         const struct rte_flow_item_mark *spec = item->spec;
1295         const struct rte_flow_item_mark *mask = item->mask;
1296         const struct rte_flow_item_mark nic_mask = {
1297                 .id = priv->sh->dv_mark_mask,
1298         };
1299         int ret;
1300
1301         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1302                 return rte_flow_error_set(error, ENOTSUP,
1303                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1304                                           "extended metadata feature"
1305                                           " isn't enabled");
1306         if (!mlx5_flow_ext_mreg_supported(dev))
1307                 return rte_flow_error_set(error, ENOTSUP,
1308                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1309                                           "extended metadata register"
1310                                           " isn't supported");
1311         if (!nic_mask.id)
1312                 return rte_flow_error_set(error, ENOTSUP,
1313                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1314                                           "extended metadata register"
1315                                           " isn't available");
1316         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1317         if (ret < 0)
1318                 return ret;
1319         if (!spec)
1320                 return rte_flow_error_set(error, EINVAL,
1321                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1322                                           item->spec,
1323                                           "data cannot be empty");
1324         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1325                 return rte_flow_error_set(error, EINVAL,
1326                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1327                                           &spec->id,
1328                                           "mark id exceeds the limit");
1329         if (!mask)
1330                 mask = &nic_mask;
1331         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1332                                         (const uint8_t *)&nic_mask,
1333                                         sizeof(struct rte_flow_item_mark),
1334                                         error);
1335         if (ret < 0)
1336                 return ret;
1337         return 0;
1338 }
1339
1340 /**
1341  * Validate META item.
1342  *
1343  * @param[in] dev
1344  *   Pointer to the rte_eth_dev structure.
1345  * @param[in] item
1346  *   Item specification.
1347  * @param[in] attr
1348  *   Attributes of flow that includes this item.
1349  * @param[out] error
1350  *   Pointer to error structure.
1351  *
1352  * @return
1353  *   0 on success, a negative errno value otherwise and rte_errno is set.
1354  */
1355 static int
1356 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1357                            const struct rte_flow_item *item,
1358                            const struct rte_flow_attr *attr,
1359                            struct rte_flow_error *error)
1360 {
1361         struct mlx5_priv *priv = dev->data->dev_private;
1362         struct mlx5_dev_config *config = &priv->config;
1363         const struct rte_flow_item_meta *spec = item->spec;
1364         const struct rte_flow_item_meta *mask = item->mask;
1365         struct rte_flow_item_meta nic_mask = {
1366                 .data = UINT32_MAX
1367         };
1368         enum modify_reg reg;
1369         int ret;
1370
1371         if (!spec)
1372                 return rte_flow_error_set(error, EINVAL,
1373                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1374                                           item->spec,
1375                                           "data cannot be empty");
1376         if (!spec->data)
1377                 return rte_flow_error_set(error, EINVAL,
1378                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1379                                           "data cannot be zero");
1380         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1381                 if (!mlx5_flow_ext_mreg_supported(dev))
1382                         return rte_flow_error_set(error, ENOTSUP,
1383                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1384                                           "extended metadata register"
1385                                           " isn't supported");
1386                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1387                 if (reg < 0)
1388                         return reg;
1389                 if (reg == REG_B)
1390                         return rte_flow_error_set(error, ENOTSUP,
1391                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1392                                           "match on reg_b "
1393                                           "isn't supported");
1394                 if (reg != REG_A)
1395                         nic_mask.data = priv->sh->dv_meta_mask;
1396         }
1397         if (!mask)
1398                 mask = &rte_flow_item_meta_mask;
1399         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1400                                         (const uint8_t *)&nic_mask,
1401                                         sizeof(struct rte_flow_item_meta),
1402                                         error);
1403         return ret;
1404 }
1405
1406 /**
1407  * Validate TAG item.
1408  *
1409  * @param[in] dev
1410  *   Pointer to the rte_eth_dev structure.
1411  * @param[in] item
1412  *   Item specification.
1413  * @param[in] attr
1414  *   Attributes of flow that includes this item.
1415  * @param[out] error
1416  *   Pointer to error structure.
1417  *
1418  * @return
1419  *   0 on success, a negative errno value otherwise and rte_errno is set.
1420  */
1421 static int
1422 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1423                           const struct rte_flow_item *item,
1424                           const struct rte_flow_attr *attr __rte_unused,
1425                           struct rte_flow_error *error)
1426 {
1427         const struct rte_flow_item_tag *spec = item->spec;
1428         const struct rte_flow_item_tag *mask = item->mask;
1429         const struct rte_flow_item_tag nic_mask = {
1430                 .data = RTE_BE32(UINT32_MAX),
1431                 .index = 0xff,
1432         };
1433         int ret;
1434
1435         if (!mlx5_flow_ext_mreg_supported(dev))
1436                 return rte_flow_error_set(error, ENOTSUP,
1437                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1438                                           "extensive metadata register"
1439                                           " isn't supported");
1440         if (!spec)
1441                 return rte_flow_error_set(error, EINVAL,
1442                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1443                                           item->spec,
1444                                           "data cannot be empty");
1445         if (!mask)
1446                 mask = &rte_flow_item_tag_mask;
1447         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1448                                         (const uint8_t *)&nic_mask,
1449                                         sizeof(struct rte_flow_item_tag),
1450                                         error);
1451         if (ret < 0)
1452                 return ret;
1453         if (mask->index != 0xff)
1454                 return rte_flow_error_set(error, EINVAL,
1455                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1456                                           "partial mask for tag index"
1457                                           " is not supported");
1458         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1459         if (ret < 0)
1460                 return ret;
1461         assert(ret != REG_NONE);
1462         return 0;
1463 }
1464
1465 /**
1466  * Validate vport item.
1467  *
1468  * @param[in] dev
1469  *   Pointer to the rte_eth_dev structure.
1470  * @param[in] item
1471  *   Item specification.
1472  * @param[in] attr
1473  *   Attributes of flow that includes this item.
1474  * @param[in] item_flags
1475  *   Bit-fields that holds the items detected until now.
1476  * @param[out] error
1477  *   Pointer to error structure.
1478  *
1479  * @return
1480  *   0 on success, a negative errno value otherwise and rte_errno is set.
1481  */
1482 static int
1483 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1484                               const struct rte_flow_item *item,
1485                               const struct rte_flow_attr *attr,
1486                               uint64_t item_flags,
1487                               struct rte_flow_error *error)
1488 {
1489         const struct rte_flow_item_port_id *spec = item->spec;
1490         const struct rte_flow_item_port_id *mask = item->mask;
1491         const struct rte_flow_item_port_id switch_mask = {
1492                         .id = 0xffffffff,
1493         };
1494         struct mlx5_priv *esw_priv;
1495         struct mlx5_priv *dev_priv;
1496         int ret;
1497
1498         if (!attr->transfer)
1499                 return rte_flow_error_set(error, EINVAL,
1500                                           RTE_FLOW_ERROR_TYPE_ITEM,
1501                                           NULL,
1502                                           "match on port id is valid only"
1503                                           " when transfer flag is enabled");
1504         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1505                 return rte_flow_error_set(error, ENOTSUP,
1506                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1507                                           "multiple source ports are not"
1508                                           " supported");
1509         if (!mask)
1510                 mask = &switch_mask;
1511         if (mask->id != 0xffffffff)
1512                 return rte_flow_error_set(error, ENOTSUP,
1513                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1514                                            mask,
1515                                            "no support for partial mask on"
1516                                            " \"id\" field");
1517         ret = mlx5_flow_item_acceptable
1518                                 (item, (const uint8_t *)mask,
1519                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1520                                  sizeof(struct rte_flow_item_port_id),
1521                                  error);
1522         if (ret)
1523                 return ret;
1524         if (!spec)
1525                 return 0;
1526         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1527         if (!esw_priv)
1528                 return rte_flow_error_set(error, rte_errno,
1529                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1530                                           "failed to obtain E-Switch info for"
1531                                           " port");
1532         dev_priv = mlx5_dev_to_eswitch_info(dev);
1533         if (!dev_priv)
1534                 return rte_flow_error_set(error, rte_errno,
1535                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1536                                           NULL,
1537                                           "failed to obtain E-Switch info");
1538         if (esw_priv->domain_id != dev_priv->domain_id)
1539                 return rte_flow_error_set(error, EINVAL,
1540                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1541                                           "cannot match on a port from a"
1542                                           " different E-Switch");
1543         return 0;
1544 }
1545
1546 /**
1547  * Validate the pop VLAN action.
1548  *
1549  * @param[in] dev
1550  *   Pointer to the rte_eth_dev structure.
1551  * @param[in] action_flags
1552  *   Holds the actions detected until now.
1553  * @param[in] action
1554  *   Pointer to the pop vlan action.
1555  * @param[in] item_flags
1556  *   The items found in this flow rule.
1557  * @param[in] attr
1558  *   Pointer to flow attributes.
1559  * @param[out] error
1560  *   Pointer to error structure.
1561  *
1562  * @return
1563  *   0 on success, a negative errno value otherwise and rte_errno is set.
1564  */
1565 static int
1566 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1567                                  uint64_t action_flags,
1568                                  const struct rte_flow_action *action,
1569                                  uint64_t item_flags,
1570                                  const struct rte_flow_attr *attr,
1571                                  struct rte_flow_error *error)
1572 {
1573         struct mlx5_priv *priv = dev->data->dev_private;
1574
1575         (void)action;
1576         (void)attr;
1577         if (!priv->sh->pop_vlan_action)
1578                 return rte_flow_error_set(error, ENOTSUP,
1579                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1580                                           NULL,
1581                                           "pop vlan action is not supported");
1582         /*
1583          * Check for inconsistencies:
1584          *  fail strip_vlan in a flow that matches packets without VLAN tags.
1585          *  fail strip_vlan in a flow that matches packets without explicitly a
1586          *  matching on VLAN tag ?
1587          */
1588         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
1589                 return rte_flow_error_set(error, ENOTSUP,
1590                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1591                                           NULL,
1592                                           "no support for multiple vlan pop "
1593                                           "actions");
1594         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1595                 return rte_flow_error_set(error, ENOTSUP,
1596                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1597                                           NULL,
1598                                           "cannot pop vlan without a "
1599                                           "match on (outer) vlan in the flow");
1600         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1601                 return rte_flow_error_set(error, EINVAL,
1602                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1603                                           "wrong action order, port_id should "
1604                                           "be after pop VLAN action");
1605         return 0;
1606 }
1607
1608 /**
1609  * Get VLAN default info from vlan match info.
1610  *
1611  * @param[in] dev
1612  *   Pointer to the rte_eth_dev structure.
1613  * @param[in] item
1614  *   the list of item specifications.
1615  * @param[out] vlan
1616  *   pointer VLAN info to fill to.
1617  * @param[out] error
1618  *   Pointer to error structure.
1619  *
1620  * @return
1621  *   0 on success, a negative errno value otherwise and rte_errno is set.
1622  */
1623 static void
1624 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1625                                   struct rte_vlan_hdr *vlan)
1626 {
1627         const struct rte_flow_item_vlan nic_mask = {
1628                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1629                                 MLX5DV_FLOW_VLAN_VID_MASK),
1630                 .inner_type = RTE_BE16(0xffff),
1631         };
1632
1633         if (items == NULL)
1634                 return;
1635         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1636                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1637                 ;
1638         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1639                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1640                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1641
1642                 if (!vlan_m)
1643                         vlan_m = &nic_mask;
1644                 /* Only full match values are accepted */
1645                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1646                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1647                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1648                         vlan->vlan_tci |=
1649                                 rte_be_to_cpu_16(vlan_v->tci &
1650                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1651                 }
1652                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1653                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1654                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1655                         vlan->vlan_tci |=
1656                                 rte_be_to_cpu_16(vlan_v->tci &
1657                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1658                 }
1659                 if (vlan_m->inner_type == nic_mask.inner_type)
1660                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1661                                                            vlan_m->inner_type);
1662         }
1663 }
1664
1665 /**
1666  * Validate the push VLAN action.
1667  *
1668  * @param[in] action_flags
1669  *   Holds the actions detected until now.
1670  * @param[in] action
1671  *   Pointer to the encap action.
1672  * @param[in] attr
1673  *   Pointer to flow attributes
1674  * @param[out] error
1675  *   Pointer to error structure.
1676  *
1677  * @return
1678  *   0 on success, a negative errno value otherwise and rte_errno is set.
1679  */
1680 static int
1681 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1682                                   uint64_t item_flags,
1683                                   const struct rte_flow_action *action,
1684                                   const struct rte_flow_attr *attr,
1685                                   struct rte_flow_error *error)
1686 {
1687         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1688
1689         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1690             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1691                 return rte_flow_error_set(error, EINVAL,
1692                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1693                                           "invalid vlan ethertype");
1694         if (action_flags &
1695                 (MLX5_FLOW_ACTION_OF_POP_VLAN | MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1696                 return rte_flow_error_set(error, ENOTSUP,
1697                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1698                                           "no support for multiple VLAN "
1699                                           "actions");
1700         if (!mlx5_flow_find_action
1701                         (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) &&
1702             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1703                 return rte_flow_error_set(error, ENOTSUP,
1704                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
1705                                 "push VLAN needs to match on VLAN in order to "
1706                                 "get VLAN VID information because there is "
1707                                 "no followed set VLAN VID action");
1708         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1709                 return rte_flow_error_set(error, EINVAL,
1710                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1711                                           "wrong action order, port_id should "
1712                                           "be after push VLAN");
1713         (void)attr;
1714         return 0;
1715 }
1716
1717 /**
1718  * Validate the set VLAN PCP.
1719  *
1720  * @param[in] action_flags
1721  *   Holds the actions detected until now.
1722  * @param[in] actions
1723  *   Pointer to the list of actions remaining in the flow rule.
1724  * @param[in] attr
1725  *   Pointer to flow attributes
1726  * @param[out] error
1727  *   Pointer to error structure.
1728  *
1729  * @return
1730  *   0 on success, a negative errno value otherwise and rte_errno is set.
1731  */
1732 static int
1733 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1734                                      const struct rte_flow_action actions[],
1735                                      struct rte_flow_error *error)
1736 {
1737         const struct rte_flow_action *action = actions;
1738         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1739
1740         if (conf->vlan_pcp > 7)
1741                 return rte_flow_error_set(error, EINVAL,
1742                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1743                                           "VLAN PCP value is too big");
1744         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1745                 return rte_flow_error_set(error, ENOTSUP,
1746                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1747                                           "set VLAN PCP action must follow "
1748                                           "the push VLAN action");
1749         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1750                 return rte_flow_error_set(error, ENOTSUP,
1751                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1752                                           "Multiple VLAN PCP modification are "
1753                                           "not supported");
1754         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1755                 return rte_flow_error_set(error, EINVAL,
1756                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1757                                           "wrong action order, port_id should "
1758                                           "be after set VLAN PCP");
1759         return 0;
1760 }
1761
1762 /**
1763  * Validate the set VLAN VID.
1764  *
1765  * @param[in] item_flags
1766  *   Holds the items detected in this rule.
1767  * @param[in] actions
1768  *   Pointer to the list of actions remaining in the flow rule.
1769  * @param[in] attr
1770  *   Pointer to flow attributes
1771  * @param[out] error
1772  *   Pointer to error structure.
1773  *
1774  * @return
1775  *   0 on success, a negative errno value otherwise and rte_errno is set.
1776  */
1777 static int
1778 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1779                                      uint64_t action_flags,
1780                                      const struct rte_flow_action actions[],
1781                                      struct rte_flow_error *error)
1782 {
1783         const struct rte_flow_action *action = actions;
1784         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1785
1786         if (conf->vlan_vid > RTE_BE16(0xFFE))
1787                 return rte_flow_error_set(error, EINVAL,
1788                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1789                                           "VLAN VID value is too big");
1790         /* there is an of_push_vlan action before us */
1791         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1792                 if (mlx5_flow_find_action(actions + 1,
1793                                           RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1794                         return rte_flow_error_set(error, ENOTSUP,
1795                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
1796                                         "Multiple VLAN VID modifications are "
1797                                         "not supported");
1798                 else
1799                         return 0;
1800         }
1801
1802         /*
1803          * Action is on an existing VLAN header:
1804          *    Need to verify this is a single modify CID action.
1805          *   Rule mast include a match on outer VLAN.
1806          */
1807         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1808                 return rte_flow_error_set(error, ENOTSUP,
1809                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1810                                           "Multiple VLAN VID modifications are "
1811                                           "not supported");
1812         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1813                 return rte_flow_error_set(error, EINVAL,
1814                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1815                                           "match on VLAN is required in order "
1816                                           "to set VLAN VID");
1817         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1818                 return rte_flow_error_set(error, EINVAL,
1819                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1820                                           "wrong action order, port_id should "
1821                                           "be after set VLAN VID");
1822         return 0;
1823 }
1824
1825 /*
1826  * Validate the FLAG action.
1827  *
1828  * @param[in] dev
1829  *   Pointer to the rte_eth_dev structure.
1830  * @param[in] action_flags
1831  *   Holds the actions detected until now.
1832  * @param[in] attr
1833  *   Pointer to flow attributes
1834  * @param[out] error
1835  *   Pointer to error structure.
1836  *
1837  * @return
1838  *   0 on success, a negative errno value otherwise and rte_errno is set.
1839  */
1840 static int
1841 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1842                              uint64_t action_flags,
1843                              const struct rte_flow_attr *attr,
1844                              struct rte_flow_error *error)
1845 {
1846         struct mlx5_priv *priv = dev->data->dev_private;
1847         struct mlx5_dev_config *config = &priv->config;
1848         int ret;
1849
1850         /* Fall back if no extended metadata register support. */
1851         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1852                 return mlx5_flow_validate_action_flag(action_flags, attr,
1853                                                       error);
1854         /* Extensive metadata mode requires registers. */
1855         if (!mlx5_flow_ext_mreg_supported(dev))
1856                 return rte_flow_error_set(error, ENOTSUP,
1857                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1858                                           "no metadata registers "
1859                                           "to support flag action");
1860         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1861                 return rte_flow_error_set(error, ENOTSUP,
1862                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1863                                           "extended metadata register"
1864                                           " isn't available");
1865         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1866         if (ret < 0)
1867                 return ret;
1868         assert(ret > 0);
1869         if (action_flags & MLX5_FLOW_ACTION_DROP)
1870                 return rte_flow_error_set(error, EINVAL,
1871                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1872                                           "can't drop and flag in same flow");
1873         if (action_flags & MLX5_FLOW_ACTION_MARK)
1874                 return rte_flow_error_set(error, EINVAL,
1875                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1876                                           "can't mark and flag in same flow");
1877         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1878                 return rte_flow_error_set(error, EINVAL,
1879                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1880                                           "can't have 2 flag"
1881                                           " actions in same flow");
1882         return 0;
1883 }
1884
1885 /**
1886  * Validate MARK action.
1887  *
1888  * @param[in] dev
1889  *   Pointer to the rte_eth_dev structure.
1890  * @param[in] action
1891  *   Pointer to action.
1892  * @param[in] action_flags
1893  *   Holds the actions detected until now.
1894  * @param[in] attr
1895  *   Pointer to flow attributes
1896  * @param[out] error
1897  *   Pointer to error structure.
1898  *
1899  * @return
1900  *   0 on success, a negative errno value otherwise and rte_errno is set.
1901  */
1902 static int
1903 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1904                              const struct rte_flow_action *action,
1905                              uint64_t action_flags,
1906                              const struct rte_flow_attr *attr,
1907                              struct rte_flow_error *error)
1908 {
1909         struct mlx5_priv *priv = dev->data->dev_private;
1910         struct mlx5_dev_config *config = &priv->config;
1911         const struct rte_flow_action_mark *mark = action->conf;
1912         int ret;
1913
1914         /* Fall back if no extended metadata register support. */
1915         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1916                 return mlx5_flow_validate_action_mark(action, action_flags,
1917                                                       attr, error);
1918         /* Extensive metadata mode requires registers. */
1919         if (!mlx5_flow_ext_mreg_supported(dev))
1920                 return rte_flow_error_set(error, ENOTSUP,
1921                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1922                                           "no metadata registers "
1923                                           "to support mark action");
1924         if (!priv->sh->dv_mark_mask)
1925                 return rte_flow_error_set(error, ENOTSUP,
1926                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1927                                           "extended metadata register"
1928                                           " isn't available");
1929         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1930         if (ret < 0)
1931                 return ret;
1932         assert(ret > 0);
1933         if (!mark)
1934                 return rte_flow_error_set(error, EINVAL,
1935                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1936                                           "configuration cannot be null");
1937         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1938                 return rte_flow_error_set(error, EINVAL,
1939                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1940                                           &mark->id,
1941                                           "mark id exceeds the limit");
1942         if (action_flags & MLX5_FLOW_ACTION_DROP)
1943                 return rte_flow_error_set(error, EINVAL,
1944                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1945                                           "can't drop and mark in same flow");
1946         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1947                 return rte_flow_error_set(error, EINVAL,
1948                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1949                                           "can't flag and mark in same flow");
1950         if (action_flags & MLX5_FLOW_ACTION_MARK)
1951                 return rte_flow_error_set(error, EINVAL,
1952                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1953                                           "can't have 2 mark actions in same"
1954                                           " flow");
1955         return 0;
1956 }
1957
1958 /**
1959  * Validate SET_META action.
1960  *
1961  * @param[in] dev
1962  *   Pointer to the rte_eth_dev structure.
1963  * @param[in] action
1964  *   Pointer to the encap action.
1965  * @param[in] action_flags
1966  *   Holds the actions detected until now.
1967  * @param[in] attr
1968  *   Pointer to flow attributes
1969  * @param[out] error
1970  *   Pointer to error structure.
1971  *
1972  * @return
1973  *   0 on success, a negative errno value otherwise and rte_errno is set.
1974  */
1975 static int
1976 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
1977                                  const struct rte_flow_action *action,
1978                                  uint64_t action_flags __rte_unused,
1979                                  const struct rte_flow_attr *attr,
1980                                  struct rte_flow_error *error)
1981 {
1982         const struct rte_flow_action_set_meta *conf;
1983         uint32_t nic_mask = UINT32_MAX;
1984         enum modify_reg reg;
1985
1986         if (!mlx5_flow_ext_mreg_supported(dev))
1987                 return rte_flow_error_set(error, ENOTSUP,
1988                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1989                                           "extended metadata register"
1990                                           " isn't supported");
1991         reg = flow_dv_get_metadata_reg(dev, attr, error);
1992         if (reg < 0)
1993                 return reg;
1994         if (reg != REG_A && reg != REG_B) {
1995                 struct mlx5_priv *priv = dev->data->dev_private;
1996
1997                 nic_mask = priv->sh->dv_meta_mask;
1998         }
1999         if (!(action->conf))
2000                 return rte_flow_error_set(error, EINVAL,
2001                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2002                                           "configuration cannot be null");
2003         conf = (const struct rte_flow_action_set_meta *)action->conf;
2004         if (!conf->mask)
2005                 return rte_flow_error_set(error, EINVAL,
2006                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2007                                           "zero mask doesn't have any effect");
2008         if (conf->mask & ~nic_mask)
2009                 return rte_flow_error_set(error, EINVAL,
2010                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2011                                           "meta data must be within reg C0");
2012         if (!(conf->data & conf->mask))
2013                 return rte_flow_error_set(error, EINVAL,
2014                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2015                                           "zero value has no effect");
2016         return 0;
2017 }
2018
2019 /**
2020  * Validate SET_TAG action.
2021  *
2022  * @param[in] dev
2023  *   Pointer to the rte_eth_dev structure.
2024  * @param[in] action
2025  *   Pointer to the encap action.
2026  * @param[in] action_flags
2027  *   Holds the actions detected until now.
2028  * @param[in] attr
2029  *   Pointer to flow attributes
2030  * @param[out] error
2031  *   Pointer to error structure.
2032  *
2033  * @return
2034  *   0 on success, a negative errno value otherwise and rte_errno is set.
2035  */
2036 static int
2037 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2038                                 const struct rte_flow_action *action,
2039                                 uint64_t action_flags,
2040                                 const struct rte_flow_attr *attr,
2041                                 struct rte_flow_error *error)
2042 {
2043         const struct rte_flow_action_set_tag *conf;
2044         const uint64_t terminal_action_flags =
2045                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2046                 MLX5_FLOW_ACTION_RSS;
2047         int ret;
2048
2049         if (!mlx5_flow_ext_mreg_supported(dev))
2050                 return rte_flow_error_set(error, ENOTSUP,
2051                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2052                                           "extensive metadata register"
2053                                           " isn't supported");
2054         if (!(action->conf))
2055                 return rte_flow_error_set(error, EINVAL,
2056                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2057                                           "configuration cannot be null");
2058         conf = (const struct rte_flow_action_set_tag *)action->conf;
2059         if (!conf->mask)
2060                 return rte_flow_error_set(error, EINVAL,
2061                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2062                                           "zero mask doesn't have any effect");
2063         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2064         if (ret < 0)
2065                 return ret;
2066         if (!attr->transfer && attr->ingress &&
2067             (action_flags & terminal_action_flags))
2068                 return rte_flow_error_set(error, EINVAL,
2069                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2070                                           "set_tag has no effect"
2071                                           " with terminal actions");
2072         return 0;
2073 }
2074
2075 /**
2076  * Validate count action.
2077  *
2078  * @param[in] dev
2079  *   device otr.
2080  * @param[out] error
2081  *   Pointer to error structure.
2082  *
2083  * @return
2084  *   0 on success, a negative errno value otherwise and rte_errno is set.
2085  */
2086 static int
2087 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2088                               struct rte_flow_error *error)
2089 {
2090         struct mlx5_priv *priv = dev->data->dev_private;
2091
2092         if (!priv->config.devx)
2093                 goto notsup_err;
2094 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2095         return 0;
2096 #endif
2097 notsup_err:
2098         return rte_flow_error_set
2099                       (error, ENOTSUP,
2100                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2101                        NULL,
2102                        "count action not supported");
2103 }
2104
2105 /**
2106  * Validate the L2 encap action.
2107  *
2108  * @param[in] action_flags
2109  *   Holds the actions detected until now.
2110  * @param[in] action
2111  *   Pointer to the encap action.
2112  * @param[in] attr
2113  *   Pointer to flow attributes
2114  * @param[out] error
2115  *   Pointer to error structure.
2116  *
2117  * @return
2118  *   0 on success, a negative errno value otherwise and rte_errno is set.
2119  */
2120 static int
2121 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2122                                  const struct rte_flow_action *action,
2123                                  const struct rte_flow_attr *attr,
2124                                  struct rte_flow_error *error)
2125 {
2126         if (!(action->conf))
2127                 return rte_flow_error_set(error, EINVAL,
2128                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2129                                           "configuration cannot be null");
2130         if (action_flags & MLX5_FLOW_ACTION_DROP)
2131                 return rte_flow_error_set(error, EINVAL,
2132                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2133                                           "can't drop and encap in same flow");
2134         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2135                 return rte_flow_error_set(error, EINVAL,
2136                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2137                                           "can only have a single encap or"
2138                                           " decap action in a flow");
2139         if (!attr->transfer && attr->ingress)
2140                 return rte_flow_error_set(error, ENOTSUP,
2141                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2142                                           NULL,
2143                                           "encap action not supported for "
2144                                           "ingress");
2145         return 0;
2146 }
2147
2148 /**
2149  * Validate the L2 decap action.
2150  *
2151  * @param[in] action_flags
2152  *   Holds the actions detected until now.
2153  * @param[in] attr
2154  *   Pointer to flow attributes
2155  * @param[out] error
2156  *   Pointer to error structure.
2157  *
2158  * @return
2159  *   0 on success, a negative errno value otherwise and rte_errno is set.
2160  */
2161 static int
2162 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2163                                  const struct rte_flow_attr *attr,
2164                                  struct rte_flow_error *error)
2165 {
2166         if (action_flags & MLX5_FLOW_ACTION_DROP)
2167                 return rte_flow_error_set(error, EINVAL,
2168                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2169                                           "can't drop and decap in same flow");
2170         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2171                 return rte_flow_error_set(error, EINVAL,
2172                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2173                                           "can only have a single encap or"
2174                                           " decap action in a flow");
2175         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2176                 return rte_flow_error_set(error, EINVAL,
2177                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2178                                           "can't have decap action after"
2179                                           " modify action");
2180         if (attr->egress)
2181                 return rte_flow_error_set(error, ENOTSUP,
2182                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2183                                           NULL,
2184                                           "decap action not supported for "
2185                                           "egress");
2186         return 0;
2187 }
2188
2189 /**
2190  * Validate the raw encap action.
2191  *
2192  * @param[in] action_flags
2193  *   Holds the actions detected until now.
2194  * @param[in] action
2195  *   Pointer to the encap action.
2196  * @param[in] attr
2197  *   Pointer to flow attributes
2198  * @param[out] error
2199  *   Pointer to error structure.
2200  *
2201  * @return
2202  *   0 on success, a negative errno value otherwise and rte_errno is set.
2203  */
2204 static int
2205 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2206                                   const struct rte_flow_action *action,
2207                                   const struct rte_flow_attr *attr,
2208                                   struct rte_flow_error *error)
2209 {
2210         const struct rte_flow_action_raw_encap *raw_encap =
2211                 (const struct rte_flow_action_raw_encap *)action->conf;
2212         if (!(action->conf))
2213                 return rte_flow_error_set(error, EINVAL,
2214                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2215                                           "configuration cannot be null");
2216         if (action_flags & MLX5_FLOW_ACTION_DROP)
2217                 return rte_flow_error_set(error, EINVAL,
2218                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2219                                           "can't drop and encap in same flow");
2220         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2221                 return rte_flow_error_set(error, EINVAL,
2222                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2223                                           "can only have a single encap"
2224                                           " action in a flow");
2225         /* encap without preceding decap is not supported for ingress */
2226         if (!attr->transfer &&  attr->ingress &&
2227             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2228                 return rte_flow_error_set(error, ENOTSUP,
2229                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2230                                           NULL,
2231                                           "encap action not supported for "
2232                                           "ingress");
2233         if (!raw_encap->size || !raw_encap->data)
2234                 return rte_flow_error_set(error, EINVAL,
2235                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2236                                           "raw encap data cannot be empty");
2237         return 0;
2238 }
2239
2240 /**
2241  * Validate the raw decap action.
2242  *
2243  * @param[in] action_flags
2244  *   Holds the actions detected until now.
2245  * @param[in] action
2246  *   Pointer to the encap action.
2247  * @param[in] attr
2248  *   Pointer to flow attributes
2249  * @param[out] error
2250  *   Pointer to error structure.
2251  *
2252  * @return
2253  *   0 on success, a negative errno value otherwise and rte_errno is set.
2254  */
2255 static int
2256 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2257                                   const struct rte_flow_action *action,
2258                                   const struct rte_flow_attr *attr,
2259                                   struct rte_flow_error *error)
2260 {
2261         const struct rte_flow_action_raw_decap *decap   = action->conf;
2262
2263         if (action_flags & MLX5_FLOW_ACTION_DROP)
2264                 return rte_flow_error_set(error, EINVAL,
2265                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2266                                           "can't drop and decap in same flow");
2267         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2268                 return rte_flow_error_set(error, EINVAL,
2269                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2270                                           "can't have encap action before"
2271                                           " decap action");
2272         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2273                 return rte_flow_error_set(error, EINVAL,
2274                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2275                                           "can only have a single decap"
2276                                           " action in a flow");
2277         /* decap action is valid on egress only if it is followed by encap */
2278         if (attr->egress && decap &&
2279             decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
2280                 return rte_flow_error_set(error, ENOTSUP,
2281                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2282                                           NULL, "decap action not supported"
2283                                           " for egress");
2284         } else if (decap && decap->size > MLX5_ENCAPSULATION_DECISION_SIZE &&
2285                    (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)) {
2286                 return rte_flow_error_set(error, EINVAL,
2287                                           RTE_FLOW_ERROR_TYPE_ACTION,
2288                                           NULL,
2289                                           "can't have decap action "
2290                                           "after modify action");
2291         }
2292         return 0;
2293 }
2294
2295 /**
2296  * Find existing encap/decap resource or create and register a new one.
2297  *
2298  * @param[in, out] dev
2299  *   Pointer to rte_eth_dev structure.
2300  * @param[in, out] resource
2301  *   Pointer to encap/decap resource.
2302  * @parm[in, out] dev_flow
2303  *   Pointer to the dev_flow.
2304  * @param[out] error
2305  *   pointer to error structure.
2306  *
2307  * @return
2308  *   0 on success otherwise -errno and errno is set.
2309  */
2310 static int
2311 flow_dv_encap_decap_resource_register
2312                         (struct rte_eth_dev *dev,
2313                          struct mlx5_flow_dv_encap_decap_resource *resource,
2314                          struct mlx5_flow *dev_flow,
2315                          struct rte_flow_error *error)
2316 {
2317         struct mlx5_priv *priv = dev->data->dev_private;
2318         struct mlx5_ibv_shared *sh = priv->sh;
2319         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2320         struct mlx5dv_dr_domain *domain;
2321
2322         resource->flags = dev_flow->group ? 0 : 1;
2323         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2324                 domain = sh->fdb_domain;
2325         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2326                 domain = sh->rx_domain;
2327         else
2328                 domain = sh->tx_domain;
2329
2330         /* Lookup a matching resource from cache. */
2331         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2332                 if (resource->reformat_type == cache_resource->reformat_type &&
2333                     resource->ft_type == cache_resource->ft_type &&
2334                     resource->flags == cache_resource->flags &&
2335                     resource->size == cache_resource->size &&
2336                     !memcmp((const void *)resource->buf,
2337                             (const void *)cache_resource->buf,
2338                             resource->size)) {
2339                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2340                                 (void *)cache_resource,
2341                                 rte_atomic32_read(&cache_resource->refcnt));
2342                         rte_atomic32_inc(&cache_resource->refcnt);
2343                         dev_flow->dv.encap_decap = cache_resource;
2344                         return 0;
2345                 }
2346         }
2347         /* Register new encap/decap resource. */
2348         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2349         if (!cache_resource)
2350                 return rte_flow_error_set(error, ENOMEM,
2351                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2352                                           "cannot allocate resource memory");
2353         *cache_resource = *resource;
2354         cache_resource->verbs_action =
2355                 mlx5_glue->dv_create_flow_action_packet_reformat
2356                         (sh->ctx, cache_resource->reformat_type,
2357                          cache_resource->ft_type, domain, cache_resource->flags,
2358                          cache_resource->size,
2359                          (cache_resource->size ? cache_resource->buf : NULL));
2360         if (!cache_resource->verbs_action) {
2361                 rte_free(cache_resource);
2362                 return rte_flow_error_set(error, ENOMEM,
2363                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2364                                           NULL, "cannot create action");
2365         }
2366         rte_atomic32_init(&cache_resource->refcnt);
2367         rte_atomic32_inc(&cache_resource->refcnt);
2368         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2369         dev_flow->dv.encap_decap = cache_resource;
2370         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2371                 (void *)cache_resource,
2372                 rte_atomic32_read(&cache_resource->refcnt));
2373         return 0;
2374 }
2375
2376 /**
2377  * Find existing table jump resource or create and register a new one.
2378  *
2379  * @param[in, out] dev
2380  *   Pointer to rte_eth_dev structure.
2381  * @param[in, out] tbl
2382  *   Pointer to flow table resource.
2383  * @parm[in, out] dev_flow
2384  *   Pointer to the dev_flow.
2385  * @param[out] error
2386  *   pointer to error structure.
2387  *
2388  * @return
2389  *   0 on success otherwise -errno and errno is set.
2390  */
2391 static int
2392 flow_dv_jump_tbl_resource_register
2393                         (struct rte_eth_dev *dev __rte_unused,
2394                          struct mlx5_flow_tbl_resource *tbl,
2395                          struct mlx5_flow *dev_flow,
2396                          struct rte_flow_error *error)
2397 {
2398         struct mlx5_flow_tbl_data_entry *tbl_data =
2399                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2400         int cnt;
2401
2402         assert(tbl);
2403         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2404         if (!cnt) {
2405                 tbl_data->jump.action =
2406                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2407                         (tbl->obj);
2408                 if (!tbl_data->jump.action)
2409                         return rte_flow_error_set(error, ENOMEM,
2410                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2411                                         NULL, "cannot create jump action");
2412                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2413                         (void *)&tbl_data->jump, cnt);
2414         } else {
2415                 assert(tbl_data->jump.action);
2416                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2417                         (void *)&tbl_data->jump, cnt);
2418         }
2419         rte_atomic32_inc(&tbl_data->jump.refcnt);
2420         dev_flow->dv.jump = &tbl_data->jump;
2421         return 0;
2422 }
2423
2424 /**
2425  * Find existing table port ID resource or create and register a new one.
2426  *
2427  * @param[in, out] dev
2428  *   Pointer to rte_eth_dev structure.
2429  * @param[in, out] resource
2430  *   Pointer to port ID action resource.
2431  * @parm[in, out] dev_flow
2432  *   Pointer to the dev_flow.
2433  * @param[out] error
2434  *   pointer to error structure.
2435  *
2436  * @return
2437  *   0 on success otherwise -errno and errno is set.
2438  */
2439 static int
2440 flow_dv_port_id_action_resource_register
2441                         (struct rte_eth_dev *dev,
2442                          struct mlx5_flow_dv_port_id_action_resource *resource,
2443                          struct mlx5_flow *dev_flow,
2444                          struct rte_flow_error *error)
2445 {
2446         struct mlx5_priv *priv = dev->data->dev_private;
2447         struct mlx5_ibv_shared *sh = priv->sh;
2448         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2449
2450         /* Lookup a matching resource from cache. */
2451         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2452                 if (resource->port_id == cache_resource->port_id) {
2453                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2454                                 "refcnt %d++",
2455                                 (void *)cache_resource,
2456                                 rte_atomic32_read(&cache_resource->refcnt));
2457                         rte_atomic32_inc(&cache_resource->refcnt);
2458                         dev_flow->dv.port_id_action = cache_resource;
2459                         return 0;
2460                 }
2461         }
2462         /* Register new port id action resource. */
2463         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2464         if (!cache_resource)
2465                 return rte_flow_error_set(error, ENOMEM,
2466                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2467                                           "cannot allocate resource memory");
2468         *cache_resource = *resource;
2469         /*
2470          * Depending on rdma_core version the glue routine calls
2471          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2472          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2473          */
2474         cache_resource->action =
2475                 mlx5_glue->dr_create_flow_action_dest_port
2476                         (priv->sh->fdb_domain, resource->port_id);
2477         if (!cache_resource->action) {
2478                 rte_free(cache_resource);
2479                 return rte_flow_error_set(error, ENOMEM,
2480                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2481                                           NULL, "cannot create action");
2482         }
2483         rte_atomic32_init(&cache_resource->refcnt);
2484         rte_atomic32_inc(&cache_resource->refcnt);
2485         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2486         dev_flow->dv.port_id_action = cache_resource;
2487         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2488                 (void *)cache_resource,
2489                 rte_atomic32_read(&cache_resource->refcnt));
2490         return 0;
2491 }
2492
2493 /**
2494  * Find existing push vlan resource or create and register a new one.
2495  *
2496  * @param [in, out] dev
2497  *   Pointer to rte_eth_dev structure.
2498  * @param[in, out] resource
2499  *   Pointer to port ID action resource.
2500  * @parm[in, out] dev_flow
2501  *   Pointer to the dev_flow.
2502  * @param[out] error
2503  *   pointer to error structure.
2504  *
2505  * @return
2506  *   0 on success otherwise -errno and errno is set.
2507  */
2508 static int
2509 flow_dv_push_vlan_action_resource_register
2510                        (struct rte_eth_dev *dev,
2511                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2512                         struct mlx5_flow *dev_flow,
2513                         struct rte_flow_error *error)
2514 {
2515         struct mlx5_priv *priv = dev->data->dev_private;
2516         struct mlx5_ibv_shared *sh = priv->sh;
2517         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2518         struct mlx5dv_dr_domain *domain;
2519
2520         /* Lookup a matching resource from cache. */
2521         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2522                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2523                     resource->ft_type == cache_resource->ft_type) {
2524                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2525                                 "refcnt %d++",
2526                                 (void *)cache_resource,
2527                                 rte_atomic32_read(&cache_resource->refcnt));
2528                         rte_atomic32_inc(&cache_resource->refcnt);
2529                         dev_flow->dv.push_vlan_res = cache_resource;
2530                         return 0;
2531                 }
2532         }
2533         /* Register new push_vlan action resource. */
2534         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2535         if (!cache_resource)
2536                 return rte_flow_error_set(error, ENOMEM,
2537                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2538                                           "cannot allocate resource memory");
2539         *cache_resource = *resource;
2540         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2541                 domain = sh->fdb_domain;
2542         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2543                 domain = sh->rx_domain;
2544         else
2545                 domain = sh->tx_domain;
2546         cache_resource->action =
2547                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2548                                                            resource->vlan_tag);
2549         if (!cache_resource->action) {
2550                 rte_free(cache_resource);
2551                 return rte_flow_error_set(error, ENOMEM,
2552                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2553                                           NULL, "cannot create action");
2554         }
2555         rte_atomic32_init(&cache_resource->refcnt);
2556         rte_atomic32_inc(&cache_resource->refcnt);
2557         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2558         dev_flow->dv.push_vlan_res = cache_resource;
2559         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2560                 (void *)cache_resource,
2561                 rte_atomic32_read(&cache_resource->refcnt));
2562         return 0;
2563 }
2564 /**
2565  * Get the size of specific rte_flow_item_type
2566  *
2567  * @param[in] item_type
2568  *   Tested rte_flow_item_type.
2569  *
2570  * @return
2571  *   sizeof struct item_type, 0 if void or irrelevant.
2572  */
2573 static size_t
2574 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2575 {
2576         size_t retval;
2577
2578         switch (item_type) {
2579         case RTE_FLOW_ITEM_TYPE_ETH:
2580                 retval = sizeof(struct rte_flow_item_eth);
2581                 break;
2582         case RTE_FLOW_ITEM_TYPE_VLAN:
2583                 retval = sizeof(struct rte_flow_item_vlan);
2584                 break;
2585         case RTE_FLOW_ITEM_TYPE_IPV4:
2586                 retval = sizeof(struct rte_flow_item_ipv4);
2587                 break;
2588         case RTE_FLOW_ITEM_TYPE_IPV6:
2589                 retval = sizeof(struct rte_flow_item_ipv6);
2590                 break;
2591         case RTE_FLOW_ITEM_TYPE_UDP:
2592                 retval = sizeof(struct rte_flow_item_udp);
2593                 break;
2594         case RTE_FLOW_ITEM_TYPE_TCP:
2595                 retval = sizeof(struct rte_flow_item_tcp);
2596                 break;
2597         case RTE_FLOW_ITEM_TYPE_VXLAN:
2598                 retval = sizeof(struct rte_flow_item_vxlan);
2599                 break;
2600         case RTE_FLOW_ITEM_TYPE_GRE:
2601                 retval = sizeof(struct rte_flow_item_gre);
2602                 break;
2603         case RTE_FLOW_ITEM_TYPE_NVGRE:
2604                 retval = sizeof(struct rte_flow_item_nvgre);
2605                 break;
2606         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2607                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2608                 break;
2609         case RTE_FLOW_ITEM_TYPE_MPLS:
2610                 retval = sizeof(struct rte_flow_item_mpls);
2611                 break;
2612         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2613         default:
2614                 retval = 0;
2615                 break;
2616         }
2617         return retval;
2618 }
2619
2620 #define MLX5_ENCAP_IPV4_VERSION         0x40
2621 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2622 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2623 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2624 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2625 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2626 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2627
2628 /**
2629  * Convert the encap action data from list of rte_flow_item to raw buffer
2630  *
2631  * @param[in] items
2632  *   Pointer to rte_flow_item objects list.
2633  * @param[out] buf
2634  *   Pointer to the output buffer.
2635  * @param[out] size
2636  *   Pointer to the output buffer size.
2637  * @param[out] error
2638  *   Pointer to the error structure.
2639  *
2640  * @return
2641  *   0 on success, a negative errno value otherwise and rte_errno is set.
2642  */
2643 static int
2644 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2645                            size_t *size, struct rte_flow_error *error)
2646 {
2647         struct rte_ether_hdr *eth = NULL;
2648         struct rte_vlan_hdr *vlan = NULL;
2649         struct rte_ipv4_hdr *ipv4 = NULL;
2650         struct rte_ipv6_hdr *ipv6 = NULL;
2651         struct rte_udp_hdr *udp = NULL;
2652         struct rte_vxlan_hdr *vxlan = NULL;
2653         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2654         struct rte_gre_hdr *gre = NULL;
2655         size_t len;
2656         size_t temp_size = 0;
2657
2658         if (!items)
2659                 return rte_flow_error_set(error, EINVAL,
2660                                           RTE_FLOW_ERROR_TYPE_ACTION,
2661                                           NULL, "invalid empty data");
2662         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2663                 len = flow_dv_get_item_len(items->type);
2664                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2665                         return rte_flow_error_set(error, EINVAL,
2666                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2667                                                   (void *)items->type,
2668                                                   "items total size is too big"
2669                                                   " for encap action");
2670                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2671                 switch (items->type) {
2672                 case RTE_FLOW_ITEM_TYPE_ETH:
2673                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2674                         break;
2675                 case RTE_FLOW_ITEM_TYPE_VLAN:
2676                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2677                         if (!eth)
2678                                 return rte_flow_error_set(error, EINVAL,
2679                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2680                                                 (void *)items->type,
2681                                                 "eth header not found");
2682                         if (!eth->ether_type)
2683                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2684                         break;
2685                 case RTE_FLOW_ITEM_TYPE_IPV4:
2686                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2687                         if (!vlan && !eth)
2688                                 return rte_flow_error_set(error, EINVAL,
2689                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2690                                                 (void *)items->type,
2691                                                 "neither eth nor vlan"
2692                                                 " header found");
2693                         if (vlan && !vlan->eth_proto)
2694                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2695                         else if (eth && !eth->ether_type)
2696                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2697                         if (!ipv4->version_ihl)
2698                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2699                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2700                         if (!ipv4->time_to_live)
2701                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2702                         break;
2703                 case RTE_FLOW_ITEM_TYPE_IPV6:
2704                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2705                         if (!vlan && !eth)
2706                                 return rte_flow_error_set(error, EINVAL,
2707                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2708                                                 (void *)items->type,
2709                                                 "neither eth nor vlan"
2710                                                 " header found");
2711                         if (vlan && !vlan->eth_proto)
2712                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2713                         else if (eth && !eth->ether_type)
2714                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2715                         if (!ipv6->vtc_flow)
2716                                 ipv6->vtc_flow =
2717                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2718                         if (!ipv6->hop_limits)
2719                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2720                         break;
2721                 case RTE_FLOW_ITEM_TYPE_UDP:
2722                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2723                         if (!ipv4 && !ipv6)
2724                                 return rte_flow_error_set(error, EINVAL,
2725                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2726                                                 (void *)items->type,
2727                                                 "ip header not found");
2728                         if (ipv4 && !ipv4->next_proto_id)
2729                                 ipv4->next_proto_id = IPPROTO_UDP;
2730                         else if (ipv6 && !ipv6->proto)
2731                                 ipv6->proto = IPPROTO_UDP;
2732                         break;
2733                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2734                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2735                         if (!udp)
2736                                 return rte_flow_error_set(error, EINVAL,
2737                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2738                                                 (void *)items->type,
2739                                                 "udp header not found");
2740                         if (!udp->dst_port)
2741                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2742                         if (!vxlan->vx_flags)
2743                                 vxlan->vx_flags =
2744                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2745                         break;
2746                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2747                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2748                         if (!udp)
2749                                 return rte_flow_error_set(error, EINVAL,
2750                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2751                                                 (void *)items->type,
2752                                                 "udp header not found");
2753                         if (!vxlan_gpe->proto)
2754                                 return rte_flow_error_set(error, EINVAL,
2755                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2756                                                 (void *)items->type,
2757                                                 "next protocol not found");
2758                         if (!udp->dst_port)
2759                                 udp->dst_port =
2760                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2761                         if (!vxlan_gpe->vx_flags)
2762                                 vxlan_gpe->vx_flags =
2763                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2764                         break;
2765                 case RTE_FLOW_ITEM_TYPE_GRE:
2766                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2767                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2768                         if (!gre->proto)
2769                                 return rte_flow_error_set(error, EINVAL,
2770                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2771                                                 (void *)items->type,
2772                                                 "next protocol not found");
2773                         if (!ipv4 && !ipv6)
2774                                 return rte_flow_error_set(error, EINVAL,
2775                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2776                                                 (void *)items->type,
2777                                                 "ip header not found");
2778                         if (ipv4 && !ipv4->next_proto_id)
2779                                 ipv4->next_proto_id = IPPROTO_GRE;
2780                         else if (ipv6 && !ipv6->proto)
2781                                 ipv6->proto = IPPROTO_GRE;
2782                         break;
2783                 case RTE_FLOW_ITEM_TYPE_VOID:
2784                         break;
2785                 default:
2786                         return rte_flow_error_set(error, EINVAL,
2787                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2788                                                   (void *)items->type,
2789                                                   "unsupported item type");
2790                         break;
2791                 }
2792                 temp_size += len;
2793         }
2794         *size = temp_size;
2795         return 0;
2796 }
2797
2798 static int
2799 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2800 {
2801         struct rte_ether_hdr *eth = NULL;
2802         struct rte_vlan_hdr *vlan = NULL;
2803         struct rte_ipv6_hdr *ipv6 = NULL;
2804         struct rte_udp_hdr *udp = NULL;
2805         char *next_hdr;
2806         uint16_t proto;
2807
2808         eth = (struct rte_ether_hdr *)data;
2809         next_hdr = (char *)(eth + 1);
2810         proto = RTE_BE16(eth->ether_type);
2811
2812         /* VLAN skipping */
2813         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2814                 vlan = (struct rte_vlan_hdr *)next_hdr;
2815                 proto = RTE_BE16(vlan->eth_proto);
2816                 next_hdr += sizeof(struct rte_vlan_hdr);
2817         }
2818
2819         /* HW calculates IPv4 csum. no need to proceed */
2820         if (proto == RTE_ETHER_TYPE_IPV4)
2821                 return 0;
2822
2823         /* non IPv4/IPv6 header. not supported */
2824         if (proto != RTE_ETHER_TYPE_IPV6) {
2825                 return rte_flow_error_set(error, ENOTSUP,
2826                                           RTE_FLOW_ERROR_TYPE_ACTION,
2827                                           NULL, "Cannot offload non IPv4/IPv6");
2828         }
2829
2830         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2831
2832         /* ignore non UDP */
2833         if (ipv6->proto != IPPROTO_UDP)
2834                 return 0;
2835
2836         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2837         udp->dgram_cksum = 0;
2838
2839         return 0;
2840 }
2841
2842 /**
2843  * Convert L2 encap action to DV specification.
2844  *
2845  * @param[in] dev
2846  *   Pointer to rte_eth_dev structure.
2847  * @param[in] action
2848  *   Pointer to action structure.
2849  * @param[in, out] dev_flow
2850  *   Pointer to the mlx5_flow.
2851  * @param[in] transfer
2852  *   Mark if the flow is E-Switch flow.
2853  * @param[out] error
2854  *   Pointer to the error structure.
2855  *
2856  * @return
2857  *   0 on success, a negative errno value otherwise and rte_errno is set.
2858  */
2859 static int
2860 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2861                                const struct rte_flow_action *action,
2862                                struct mlx5_flow *dev_flow,
2863                                uint8_t transfer,
2864                                struct rte_flow_error *error)
2865 {
2866         const struct rte_flow_item *encap_data;
2867         const struct rte_flow_action_raw_encap *raw_encap_data;
2868         struct mlx5_flow_dv_encap_decap_resource res = {
2869                 .reformat_type =
2870                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2871                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2872                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2873         };
2874
2875         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2876                 raw_encap_data =
2877                         (const struct rte_flow_action_raw_encap *)action->conf;
2878                 res.size = raw_encap_data->size;
2879                 memcpy(res.buf, raw_encap_data->data, res.size);
2880                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2881                         return -rte_errno;
2882         } else {
2883                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2884                         encap_data =
2885                                 ((const struct rte_flow_action_vxlan_encap *)
2886                                                 action->conf)->definition;
2887                 else
2888                         encap_data =
2889                                 ((const struct rte_flow_action_nvgre_encap *)
2890                                                 action->conf)->definition;
2891                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2892                                                &res.size, error))
2893                         return -rte_errno;
2894         }
2895         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2896                 return rte_flow_error_set(error, EINVAL,
2897                                           RTE_FLOW_ERROR_TYPE_ACTION,
2898                                           NULL, "can't create L2 encap action");
2899         return 0;
2900 }
2901
2902 /**
2903  * Convert L2 decap action to DV specification.
2904  *
2905  * @param[in] dev
2906  *   Pointer to rte_eth_dev structure.
2907  * @param[in, out] dev_flow
2908  *   Pointer to the mlx5_flow.
2909  * @param[in] transfer
2910  *   Mark if the flow is E-Switch flow.
2911  * @param[out] error
2912  *   Pointer to the error structure.
2913  *
2914  * @return
2915  *   0 on success, a negative errno value otherwise and rte_errno is set.
2916  */
2917 static int
2918 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2919                                struct mlx5_flow *dev_flow,
2920                                uint8_t transfer,
2921                                struct rte_flow_error *error)
2922 {
2923         struct mlx5_flow_dv_encap_decap_resource res = {
2924                 .size = 0,
2925                 .reformat_type =
2926                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2927                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2928                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2929         };
2930
2931         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2932                 return rte_flow_error_set(error, EINVAL,
2933                                           RTE_FLOW_ERROR_TYPE_ACTION,
2934                                           NULL, "can't create L2 decap action");
2935         return 0;
2936 }
2937
2938 /**
2939  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2940  *
2941  * @param[in] dev
2942  *   Pointer to rte_eth_dev structure.
2943  * @param[in] action
2944  *   Pointer to action structure.
2945  * @param[in, out] dev_flow
2946  *   Pointer to the mlx5_flow.
2947  * @param[in] attr
2948  *   Pointer to the flow attributes.
2949  * @param[out] error
2950  *   Pointer to the error structure.
2951  *
2952  * @return
2953  *   0 on success, a negative errno value otherwise and rte_errno is set.
2954  */
2955 static int
2956 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2957                                 const struct rte_flow_action *action,
2958                                 struct mlx5_flow *dev_flow,
2959                                 const struct rte_flow_attr *attr,
2960                                 struct rte_flow_error *error)
2961 {
2962         const struct rte_flow_action_raw_encap *encap_data;
2963         struct mlx5_flow_dv_encap_decap_resource res;
2964
2965         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2966         res.size = encap_data->size;
2967         memcpy(res.buf, encap_data->data, res.size);
2968         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
2969                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
2970                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
2971         if (attr->transfer)
2972                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2973         else
2974                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2975                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2976         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2977                 return rte_flow_error_set(error, EINVAL,
2978                                           RTE_FLOW_ERROR_TYPE_ACTION,
2979                                           NULL, "can't create encap action");
2980         return 0;
2981 }
2982
2983 /**
2984  * Create action push VLAN.
2985  *
2986  * @param[in] dev
2987  *   Pointer to rte_eth_dev structure.
2988  * @param[in] vlan_tag
2989  *   the vlan tag to push to the Ethernet header.
2990  * @param[in, out] dev_flow
2991  *   Pointer to the mlx5_flow.
2992  * @param[in] attr
2993  *   Pointer to the flow attributes.
2994  * @param[out] error
2995  *   Pointer to the error structure.
2996  *
2997  * @return
2998  *   0 on success, a negative errno value otherwise and rte_errno is set.
2999  */
3000 static int
3001 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3002                                 const struct rte_flow_attr *attr,
3003                                 const struct rte_vlan_hdr *vlan,
3004                                 struct mlx5_flow *dev_flow,
3005                                 struct rte_flow_error *error)
3006 {
3007         struct mlx5_flow_dv_push_vlan_action_resource res;
3008
3009         res.vlan_tag =
3010                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3011                                  vlan->vlan_tci);
3012         if (attr->transfer)
3013                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3014         else
3015                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3016                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3017         return flow_dv_push_vlan_action_resource_register
3018                                             (dev, &res, dev_flow, error);
3019 }
3020
3021 /**
3022  * Validate the modify-header actions.
3023  *
3024  * @param[in] action_flags
3025  *   Holds the actions detected until now.
3026  * @param[in] action
3027  *   Pointer to the modify action.
3028  * @param[out] error
3029  *   Pointer to error structure.
3030  *
3031  * @return
3032  *   0 on success, a negative errno value otherwise and rte_errno is set.
3033  */
3034 static int
3035 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3036                                    const struct rte_flow_action *action,
3037                                    struct rte_flow_error *error)
3038 {
3039         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3040                 return rte_flow_error_set(error, EINVAL,
3041                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3042                                           NULL, "action configuration not set");
3043         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
3044                 return rte_flow_error_set(error, EINVAL,
3045                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3046                                           "can't have encap action before"
3047                                           " modify action");
3048         return 0;
3049 }
3050
3051 /**
3052  * Validate the modify-header MAC address actions.
3053  *
3054  * @param[in] action_flags
3055  *   Holds the actions detected until now.
3056  * @param[in] action
3057  *   Pointer to the modify action.
3058  * @param[in] item_flags
3059  *   Holds the items detected.
3060  * @param[out] error
3061  *   Pointer to error structure.
3062  *
3063  * @return
3064  *   0 on success, a negative errno value otherwise and rte_errno is set.
3065  */
3066 static int
3067 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3068                                    const struct rte_flow_action *action,
3069                                    const uint64_t item_flags,
3070                                    struct rte_flow_error *error)
3071 {
3072         int ret = 0;
3073
3074         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3075         if (!ret) {
3076                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3077                         return rte_flow_error_set(error, EINVAL,
3078                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3079                                                   NULL,
3080                                                   "no L2 item in pattern");
3081         }
3082         return ret;
3083 }
3084
3085 /**
3086  * Validate the modify-header IPv4 address actions.
3087  *
3088  * @param[in] action_flags
3089  *   Holds the actions detected until now.
3090  * @param[in] action
3091  *   Pointer to the modify action.
3092  * @param[in] item_flags
3093  *   Holds the items detected.
3094  * @param[out] error
3095  *   Pointer to error structure.
3096  *
3097  * @return
3098  *   0 on success, a negative errno value otherwise and rte_errno is set.
3099  */
3100 static int
3101 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3102                                     const struct rte_flow_action *action,
3103                                     const uint64_t item_flags,
3104                                     struct rte_flow_error *error)
3105 {
3106         int ret = 0;
3107
3108         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3109         if (!ret) {
3110                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3111                         return rte_flow_error_set(error, EINVAL,
3112                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3113                                                   NULL,
3114                                                   "no ipv4 item in pattern");
3115         }
3116         return ret;
3117 }
3118
3119 /**
3120  * Validate the modify-header IPv6 address actions.
3121  *
3122  * @param[in] action_flags
3123  *   Holds the actions detected until now.
3124  * @param[in] action
3125  *   Pointer to the modify action.
3126  * @param[in] item_flags
3127  *   Holds the items detected.
3128  * @param[out] error
3129  *   Pointer to error structure.
3130  *
3131  * @return
3132  *   0 on success, a negative errno value otherwise and rte_errno is set.
3133  */
3134 static int
3135 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3136                                     const struct rte_flow_action *action,
3137                                     const uint64_t item_flags,
3138                                     struct rte_flow_error *error)
3139 {
3140         int ret = 0;
3141
3142         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3143         if (!ret) {
3144                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3145                         return rte_flow_error_set(error, EINVAL,
3146                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3147                                                   NULL,
3148                                                   "no ipv6 item in pattern");
3149         }
3150         return ret;
3151 }
3152
3153 /**
3154  * Validate the modify-header TP actions.
3155  *
3156  * @param[in] action_flags
3157  *   Holds the actions detected until now.
3158  * @param[in] action
3159  *   Pointer to the modify action.
3160  * @param[in] item_flags
3161  *   Holds the items detected.
3162  * @param[out] error
3163  *   Pointer to error structure.
3164  *
3165  * @return
3166  *   0 on success, a negative errno value otherwise and rte_errno is set.
3167  */
3168 static int
3169 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3170                                   const struct rte_flow_action *action,
3171                                   const uint64_t item_flags,
3172                                   struct rte_flow_error *error)
3173 {
3174         int ret = 0;
3175
3176         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3177         if (!ret) {
3178                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3179                         return rte_flow_error_set(error, EINVAL,
3180                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3181                                                   NULL, "no transport layer "
3182                                                   "in pattern");
3183         }
3184         return ret;
3185 }
3186
3187 /**
3188  * Validate the modify-header actions of increment/decrement
3189  * TCP Sequence-number.
3190  *
3191  * @param[in] action_flags
3192  *   Holds the actions detected until now.
3193  * @param[in] action
3194  *   Pointer to the modify action.
3195  * @param[in] item_flags
3196  *   Holds the items detected.
3197  * @param[out] error
3198  *   Pointer to error structure.
3199  *
3200  * @return
3201  *   0 on success, a negative errno value otherwise and rte_errno is set.
3202  */
3203 static int
3204 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3205                                        const struct rte_flow_action *action,
3206                                        const uint64_t item_flags,
3207                                        struct rte_flow_error *error)
3208 {
3209         int ret = 0;
3210
3211         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3212         if (!ret) {
3213                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3214                         return rte_flow_error_set(error, EINVAL,
3215                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3216                                                   NULL, "no TCP item in"
3217                                                   " pattern");
3218                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3219                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3220                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3221                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3222                         return rte_flow_error_set(error, EINVAL,
3223                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3224                                                   NULL,
3225                                                   "cannot decrease and increase"
3226                                                   " TCP sequence number"
3227                                                   " at the same time");
3228         }
3229         return ret;
3230 }
3231
3232 /**
3233  * Validate the modify-header actions of increment/decrement
3234  * TCP Acknowledgment number.
3235  *
3236  * @param[in] action_flags
3237  *   Holds the actions detected until now.
3238  * @param[in] action
3239  *   Pointer to the modify action.
3240  * @param[in] item_flags
3241  *   Holds the items detected.
3242  * @param[out] error
3243  *   Pointer to error structure.
3244  *
3245  * @return
3246  *   0 on success, a negative errno value otherwise and rte_errno is set.
3247  */
3248 static int
3249 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3250                                        const struct rte_flow_action *action,
3251                                        const uint64_t item_flags,
3252                                        struct rte_flow_error *error)
3253 {
3254         int ret = 0;
3255
3256         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3257         if (!ret) {
3258                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3259                         return rte_flow_error_set(error, EINVAL,
3260                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3261                                                   NULL, "no TCP item in"
3262                                                   " pattern");
3263                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3264                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3265                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3266                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3267                         return rte_flow_error_set(error, EINVAL,
3268                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3269                                                   NULL,
3270                                                   "cannot decrease and increase"
3271                                                   " TCP acknowledgment number"
3272                                                   " at the same time");
3273         }
3274         return ret;
3275 }
3276
3277 /**
3278  * Validate the modify-header TTL actions.
3279  *
3280  * @param[in] action_flags
3281  *   Holds the actions detected until now.
3282  * @param[in] action
3283  *   Pointer to the modify action.
3284  * @param[in] item_flags
3285  *   Holds the items detected.
3286  * @param[out] error
3287  *   Pointer to error structure.
3288  *
3289  * @return
3290  *   0 on success, a negative errno value otherwise and rte_errno is set.
3291  */
3292 static int
3293 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3294                                    const struct rte_flow_action *action,
3295                                    const uint64_t item_flags,
3296                                    struct rte_flow_error *error)
3297 {
3298         int ret = 0;
3299
3300         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3301         if (!ret) {
3302                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3303                         return rte_flow_error_set(error, EINVAL,
3304                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3305                                                   NULL,
3306                                                   "no IP protocol in pattern");
3307         }
3308         return ret;
3309 }
3310
3311 /**
3312  * Validate jump action.
3313  *
3314  * @param[in] action
3315  *   Pointer to the jump action.
3316  * @param[in] action_flags
3317  *   Holds the actions detected until now.
3318  * @param[in] attributes
3319  *   Pointer to flow attributes
3320  * @param[in] external
3321  *   Action belongs to flow rule created by request external to PMD.
3322  * @param[out] error
3323  *   Pointer to error structure.
3324  *
3325  * @return
3326  *   0 on success, a negative errno value otherwise and rte_errno is set.
3327  */
3328 static int
3329 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3330                              uint64_t action_flags,
3331                              const struct rte_flow_attr *attributes,
3332                              bool external, struct rte_flow_error *error)
3333 {
3334         uint32_t target_group, table;
3335         int ret = 0;
3336
3337         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3338                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3339                 return rte_flow_error_set(error, EINVAL,
3340                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3341                                           "can't have 2 fate actions in"
3342                                           " same flow");
3343         if (action_flags & MLX5_FLOW_ACTION_METER)
3344                 return rte_flow_error_set(error, ENOTSUP,
3345                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3346                                           "jump with meter not support");
3347         if (!action->conf)
3348                 return rte_flow_error_set(error, EINVAL,
3349                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3350                                           NULL, "action configuration not set");
3351         target_group =
3352                 ((const struct rte_flow_action_jump *)action->conf)->group;
3353         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3354                                        &table, error);
3355         if (ret)
3356                 return ret;
3357         if (attributes->group == target_group)
3358                 return rte_flow_error_set(error, EINVAL,
3359                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3360                                           "target group must be other than"
3361                                           " the current flow group");
3362         return 0;
3363 }
3364
3365 /*
3366  * Validate the port_id action.
3367  *
3368  * @param[in] dev
3369  *   Pointer to rte_eth_dev structure.
3370  * @param[in] action_flags
3371  *   Bit-fields that holds the actions detected until now.
3372  * @param[in] action
3373  *   Port_id RTE action structure.
3374  * @param[in] attr
3375  *   Attributes of flow that includes this action.
3376  * @param[out] error
3377  *   Pointer to error structure.
3378  *
3379  * @return
3380  *   0 on success, a negative errno value otherwise and rte_errno is set.
3381  */
3382 static int
3383 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3384                                 uint64_t action_flags,
3385                                 const struct rte_flow_action *action,
3386                                 const struct rte_flow_attr *attr,
3387                                 struct rte_flow_error *error)
3388 {
3389         const struct rte_flow_action_port_id *port_id;
3390         struct mlx5_priv *act_priv;
3391         struct mlx5_priv *dev_priv;
3392         uint16_t port;
3393
3394         if (!attr->transfer)
3395                 return rte_flow_error_set(error, ENOTSUP,
3396                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3397                                           NULL,
3398                                           "port id action is valid in transfer"
3399                                           " mode only");
3400         if (!action || !action->conf)
3401                 return rte_flow_error_set(error, ENOTSUP,
3402                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3403                                           NULL,
3404                                           "port id action parameters must be"
3405                                           " specified");
3406         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3407                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3408                 return rte_flow_error_set(error, EINVAL,
3409                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3410                                           "can have only one fate actions in"
3411                                           " a flow");
3412         dev_priv = mlx5_dev_to_eswitch_info(dev);
3413         if (!dev_priv)
3414                 return rte_flow_error_set(error, rte_errno,
3415                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3416                                           NULL,
3417                                           "failed to obtain E-Switch info");
3418         port_id = action->conf;
3419         port = port_id->original ? dev->data->port_id : port_id->id;
3420         act_priv = mlx5_port_to_eswitch_info(port, false);
3421         if (!act_priv)
3422                 return rte_flow_error_set
3423                                 (error, rte_errno,
3424                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3425                                  "failed to obtain E-Switch port id for port");
3426         if (act_priv->domain_id != dev_priv->domain_id)
3427                 return rte_flow_error_set
3428                                 (error, EINVAL,
3429                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3430                                  "port does not belong to"
3431                                  " E-Switch being configured");
3432         return 0;
3433 }
3434
3435 /**
3436  * Get the maximum number of modify header actions.
3437  *
3438  * @param dev
3439  *   Pointer to rte_eth_dev structure.
3440  *
3441  * @return
3442  *   Max number of modify header actions device can support.
3443  */
3444 static unsigned int
3445 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev)
3446 {
3447         /*
3448          * There's no way to directly query the max cap. Although it has to be
3449          * acquried by iterative trial, it is a safe assumption that more
3450          * actions are supported by FW if extensive metadata register is
3451          * supported.
3452          */
3453         return mlx5_flow_ext_mreg_supported(dev) ? MLX5_MODIFY_NUM :
3454                                                    MLX5_MODIFY_NUM_NO_MREG;
3455 }
3456
3457 /**
3458  * Validate the meter action.
3459  *
3460  * @param[in] dev
3461  *   Pointer to rte_eth_dev structure.
3462  * @param[in] action_flags
3463  *   Bit-fields that holds the actions detected until now.
3464  * @param[in] action
3465  *   Pointer to the meter action.
3466  * @param[in] attr
3467  *   Attributes of flow that includes this action.
3468  * @param[out] error
3469  *   Pointer to error structure.
3470  *
3471  * @return
3472  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3473  */
3474 static int
3475 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3476                                 uint64_t action_flags,
3477                                 const struct rte_flow_action *action,
3478                                 const struct rte_flow_attr *attr,
3479                                 struct rte_flow_error *error)
3480 {
3481         struct mlx5_priv *priv = dev->data->dev_private;
3482         const struct rte_flow_action_meter *am = action->conf;
3483         struct mlx5_flow_meter *fm;
3484
3485         if (!am)
3486                 return rte_flow_error_set(error, EINVAL,
3487                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3488                                           "meter action conf is NULL");
3489
3490         if (action_flags & MLX5_FLOW_ACTION_METER)
3491                 return rte_flow_error_set(error, ENOTSUP,
3492                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3493                                           "meter chaining not support");
3494         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3495                 return rte_flow_error_set(error, ENOTSUP,
3496                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3497                                           "meter with jump not support");
3498         if (!priv->mtr_en)
3499                 return rte_flow_error_set(error, ENOTSUP,
3500                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3501                                           NULL,
3502                                           "meter action not supported");
3503         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3504         if (!fm)
3505                 return rte_flow_error_set(error, EINVAL,
3506                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3507                                           "Meter not found");
3508         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3509               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3510               (!fm->attr.egress && !attr->egress && attr->ingress))))
3511                 return rte_flow_error_set(error, EINVAL,
3512                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3513                                           "Flow attributes are either invalid "
3514                                           "or have a conflict with current "
3515                                           "meter attributes");
3516         return 0;
3517 }
3518
3519 /**
3520  * Validate the modify-header IPv4 DSCP actions.
3521  *
3522  * @param[in] action_flags
3523  *   Holds the actions detected until now.
3524  * @param[in] action
3525  *   Pointer to the modify action.
3526  * @param[in] item_flags
3527  *   Holds the items detected.
3528  * @param[out] error
3529  *   Pointer to error structure.
3530  *
3531  * @return
3532  *   0 on success, a negative errno value otherwise and rte_errno is set.
3533  */
3534 static int
3535 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3536                                          const struct rte_flow_action *action,
3537                                          const uint64_t item_flags,
3538                                          struct rte_flow_error *error)
3539 {
3540         int ret = 0;
3541
3542         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3543         if (!ret) {
3544                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3545                         return rte_flow_error_set(error, EINVAL,
3546                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3547                                                   NULL,
3548                                                   "no ipv4 item in pattern");
3549         }
3550         return ret;
3551 }
3552
3553 /**
3554  * Validate the modify-header IPv6 DSCP actions.
3555  *
3556  * @param[in] action_flags
3557  *   Holds the actions detected until now.
3558  * @param[in] action
3559  *   Pointer to the modify action.
3560  * @param[in] item_flags
3561  *   Holds the items detected.
3562  * @param[out] error
3563  *   Pointer to error structure.
3564  *
3565  * @return
3566  *   0 on success, a negative errno value otherwise and rte_errno is set.
3567  */
3568 static int
3569 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3570                                          const struct rte_flow_action *action,
3571                                          const uint64_t item_flags,
3572                                          struct rte_flow_error *error)
3573 {
3574         int ret = 0;
3575
3576         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3577         if (!ret) {
3578                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3579                         return rte_flow_error_set(error, EINVAL,
3580                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3581                                                   NULL,
3582                                                   "no ipv6 item in pattern");
3583         }
3584         return ret;
3585 }
3586
3587 /**
3588  * Find existing modify-header resource or create and register a new one.
3589  *
3590  * @param dev[in, out]
3591  *   Pointer to rte_eth_dev structure.
3592  * @param[in, out] resource
3593  *   Pointer to modify-header resource.
3594  * @parm[in, out] dev_flow
3595  *   Pointer to the dev_flow.
3596  * @param[out] error
3597  *   pointer to error structure.
3598  *
3599  * @return
3600  *   0 on success otherwise -errno and errno is set.
3601  */
3602 static int
3603 flow_dv_modify_hdr_resource_register
3604                         (struct rte_eth_dev *dev,
3605                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3606                          struct mlx5_flow *dev_flow,
3607                          struct rte_flow_error *error)
3608 {
3609         struct mlx5_priv *priv = dev->data->dev_private;
3610         struct mlx5_ibv_shared *sh = priv->sh;
3611         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3612         struct mlx5dv_dr_domain *ns;
3613
3614         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev))
3615                 return rte_flow_error_set(error, EOVERFLOW,
3616                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3617                                           "too many modify header items");
3618         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3619                 ns = sh->fdb_domain;
3620         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3621                 ns = sh->tx_domain;
3622         else
3623                 ns = sh->rx_domain;
3624         resource->flags =
3625                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3626         /* Lookup a matching resource from cache. */
3627         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3628                 if (resource->ft_type == cache_resource->ft_type &&
3629                     resource->actions_num == cache_resource->actions_num &&
3630                     resource->flags == cache_resource->flags &&
3631                     !memcmp((const void *)resource->actions,
3632                             (const void *)cache_resource->actions,
3633                             (resource->actions_num *
3634                                             sizeof(resource->actions[0])))) {
3635                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3636                                 (void *)cache_resource,
3637                                 rte_atomic32_read(&cache_resource->refcnt));
3638                         rte_atomic32_inc(&cache_resource->refcnt);
3639                         dev_flow->dv.modify_hdr = cache_resource;
3640                         return 0;
3641                 }
3642         }
3643         /* Register new modify-header resource. */
3644         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
3645         if (!cache_resource)
3646                 return rte_flow_error_set(error, ENOMEM,
3647                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3648                                           "cannot allocate resource memory");
3649         *cache_resource = *resource;
3650         cache_resource->verbs_action =
3651                 mlx5_glue->dv_create_flow_action_modify_header
3652                                         (sh->ctx, cache_resource->ft_type,
3653                                          ns, cache_resource->flags,
3654                                          cache_resource->actions_num *
3655                                          sizeof(cache_resource->actions[0]),
3656                                          (uint64_t *)cache_resource->actions);
3657         if (!cache_resource->verbs_action) {
3658                 rte_free(cache_resource);
3659                 return rte_flow_error_set(error, ENOMEM,
3660                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3661                                           NULL, "cannot create action");
3662         }
3663         rte_atomic32_init(&cache_resource->refcnt);
3664         rte_atomic32_inc(&cache_resource->refcnt);
3665         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3666         dev_flow->dv.modify_hdr = cache_resource;
3667         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3668                 (void *)cache_resource,
3669                 rte_atomic32_read(&cache_resource->refcnt));
3670         return 0;
3671 }
3672
3673 #define MLX5_CNT_CONTAINER_RESIZE 64
3674
3675 /**
3676  * Get or create a flow counter.
3677  *
3678  * @param[in] dev
3679  *   Pointer to the Ethernet device structure.
3680  * @param[in] shared
3681  *   Indicate if this counter is shared with other flows.
3682  * @param[in] id
3683  *   Counter identifier.
3684  *
3685  * @return
3686  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3687  */
3688 static struct mlx5_flow_counter *
3689 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3690                                uint32_t id)
3691 {
3692         struct mlx5_priv *priv = dev->data->dev_private;
3693         struct mlx5_flow_counter *cnt = NULL;
3694         struct mlx5_devx_obj *dcs = NULL;
3695
3696         if (!priv->config.devx) {
3697                 rte_errno = ENOTSUP;
3698                 return NULL;
3699         }
3700         if (shared) {
3701                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3702                         if (cnt->shared && cnt->id == id) {
3703                                 cnt->ref_cnt++;
3704                                 return cnt;
3705                         }
3706                 }
3707         }
3708         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3709         if (!dcs)
3710                 return NULL;
3711         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3712         if (!cnt) {
3713                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3714                 rte_errno = ENOMEM;
3715                 return NULL;
3716         }
3717         struct mlx5_flow_counter tmpl = {
3718                 .shared = shared,
3719                 .ref_cnt = 1,
3720                 .id = id,
3721                 .dcs = dcs,
3722         };
3723         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3724         if (!tmpl.action) {
3725                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3726                 rte_errno = errno;
3727                 rte_free(cnt);
3728                 return NULL;
3729         }
3730         *cnt = tmpl;
3731         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3732         return cnt;
3733 }
3734
3735 /**
3736  * Release a flow counter.
3737  *
3738  * @param[in] dev
3739  *   Pointer to the Ethernet device structure.
3740  * @param[in] counter
3741  *   Pointer to the counter handler.
3742  */
3743 static void
3744 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3745                                  struct mlx5_flow_counter *counter)
3746 {
3747         struct mlx5_priv *priv = dev->data->dev_private;
3748
3749         if (!counter)
3750                 return;
3751         if (--counter->ref_cnt == 0) {
3752                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3753                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3754                 rte_free(counter);
3755         }
3756 }
3757
3758 /**
3759  * Query a devx flow counter.
3760  *
3761  * @param[in] dev
3762  *   Pointer to the Ethernet device structure.
3763  * @param[in] cnt
3764  *   Pointer to the flow counter.
3765  * @param[out] pkts
3766  *   The statistics value of packets.
3767  * @param[out] bytes
3768  *   The statistics value of bytes.
3769  *
3770  * @return
3771  *   0 on success, otherwise a negative errno value and rte_errno is set.
3772  */
3773 static inline int
3774 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3775                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3776                      uint64_t *bytes)
3777 {
3778         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3779                                                 0, NULL, NULL, 0);
3780 }
3781
3782 /**
3783  * Get a pool by a counter.
3784  *
3785  * @param[in] cnt
3786  *   Pointer to the counter.
3787  *
3788  * @return
3789  *   The counter pool.
3790  */
3791 static struct mlx5_flow_counter_pool *
3792 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3793 {
3794         if (!cnt->batch) {
3795                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3796                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3797         }
3798         return cnt->pool;
3799 }
3800
3801 /**
3802  * Get a pool by devx counter ID.
3803  *
3804  * @param[in] cont
3805  *   Pointer to the counter container.
3806  * @param[in] id
3807  *   The counter devx ID.
3808  *
3809  * @return
3810  *   The counter pool pointer if exists, NULL otherwise,
3811  */
3812 static struct mlx5_flow_counter_pool *
3813 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3814 {
3815         struct mlx5_flow_counter_pool *pool;
3816
3817         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3818                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3819                                 MLX5_COUNTERS_PER_POOL;
3820
3821                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3822                         return pool;
3823         };
3824         return NULL;
3825 }
3826
3827 /**
3828  * Allocate a new memory for the counter values wrapped by all the needed
3829  * management.
3830  *
3831  * @param[in] dev
3832  *   Pointer to the Ethernet device structure.
3833  * @param[in] raws_n
3834  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3835  *
3836  * @return
3837  *   The new memory management pointer on success, otherwise NULL and rte_errno
3838  *   is set.
3839  */
3840 static struct mlx5_counter_stats_mem_mng *
3841 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3842 {
3843         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3844                                         (dev->data->dev_private))->sh;
3845         struct mlx5_devx_mkey_attr mkey_attr;
3846         struct mlx5_counter_stats_mem_mng *mem_mng;
3847         volatile struct flow_counter_stats *raw_data;
3848         int size = (sizeof(struct flow_counter_stats) *
3849                         MLX5_COUNTERS_PER_POOL +
3850                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3851                         sizeof(struct mlx5_counter_stats_mem_mng);
3852         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3853         int i;
3854
3855         if (!mem) {
3856                 rte_errno = ENOMEM;
3857                 return NULL;
3858         }
3859         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3860         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3861         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3862                                                  IBV_ACCESS_LOCAL_WRITE);
3863         if (!mem_mng->umem) {
3864                 rte_errno = errno;
3865                 rte_free(mem);
3866                 return NULL;
3867         }
3868         mkey_attr.addr = (uintptr_t)mem;
3869         mkey_attr.size = size;
3870         mkey_attr.umem_id = mem_mng->umem->umem_id;
3871         mkey_attr.pd = sh->pdn;
3872         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3873         if (!mem_mng->dm) {
3874                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3875                 rte_errno = errno;
3876                 rte_free(mem);
3877                 return NULL;
3878         }
3879         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3880         raw_data = (volatile struct flow_counter_stats *)mem;
3881         for (i = 0; i < raws_n; ++i) {
3882                 mem_mng->raws[i].mem_mng = mem_mng;
3883                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3884         }
3885         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3886         return mem_mng;
3887 }
3888
3889 /**
3890  * Resize a counter container.
3891  *
3892  * @param[in] dev
3893  *   Pointer to the Ethernet device structure.
3894  * @param[in] batch
3895  *   Whether the pool is for counter that was allocated by batch command.
3896  *
3897  * @return
3898  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3899  */
3900 static struct mlx5_pools_container *
3901 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3902 {
3903         struct mlx5_priv *priv = dev->data->dev_private;
3904         struct mlx5_pools_container *cont =
3905                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3906         struct mlx5_pools_container *new_cont =
3907                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3908         struct mlx5_counter_stats_mem_mng *mem_mng;
3909         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3910         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3911         int i;
3912
3913         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3914                 /* The last resize still hasn't detected by the host thread. */
3915                 rte_errno = EAGAIN;
3916                 return NULL;
3917         }
3918         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3919         if (!new_cont->pools) {
3920                 rte_errno = ENOMEM;
3921                 return NULL;
3922         }
3923         if (cont->n)
3924                 memcpy(new_cont->pools, cont->pools, cont->n *
3925                        sizeof(struct mlx5_flow_counter_pool *));
3926         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3927                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3928         if (!mem_mng) {
3929                 rte_free(new_cont->pools);
3930                 return NULL;
3931         }
3932         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3933                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3934                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3935                                  i, next);
3936         new_cont->n = resize;
3937         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3938         TAILQ_INIT(&new_cont->pool_list);
3939         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3940         new_cont->init_mem_mng = mem_mng;
3941         rte_cio_wmb();
3942          /* Flip the master container. */
3943         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3944         return new_cont;
3945 }
3946
3947 /**
3948  * Query a devx flow counter.
3949  *
3950  * @param[in] dev
3951  *   Pointer to the Ethernet device structure.
3952  * @param[in] cnt
3953  *   Pointer to the flow counter.
3954  * @param[out] pkts
3955  *   The statistics value of packets.
3956  * @param[out] bytes
3957  *   The statistics value of bytes.
3958  *
3959  * @return
3960  *   0 on success, otherwise a negative errno value and rte_errno is set.
3961  */
3962 static inline int
3963 _flow_dv_query_count(struct rte_eth_dev *dev,
3964                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3965                      uint64_t *bytes)
3966 {
3967         struct mlx5_priv *priv = dev->data->dev_private;
3968         struct mlx5_flow_counter_pool *pool =
3969                         flow_dv_counter_pool_get(cnt);
3970         int offset = cnt - &pool->counters_raw[0];
3971
3972         if (priv->counter_fallback)
3973                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3974
3975         rte_spinlock_lock(&pool->sl);
3976         /*
3977          * The single counters allocation may allocate smaller ID than the
3978          * current allocated in parallel to the host reading.
3979          * In this case the new counter values must be reported as 0.
3980          */
3981         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
3982                 *pkts = 0;
3983                 *bytes = 0;
3984         } else {
3985                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
3986                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
3987         }
3988         rte_spinlock_unlock(&pool->sl);
3989         return 0;
3990 }
3991
3992 /**
3993  * Create and initialize a new counter pool.
3994  *
3995  * @param[in] dev
3996  *   Pointer to the Ethernet device structure.
3997  * @param[out] dcs
3998  *   The devX counter handle.
3999  * @param[in] batch
4000  *   Whether the pool is for counter that was allocated by batch command.
4001  *
4002  * @return
4003  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4004  */
4005 static struct mlx5_flow_counter_pool *
4006 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4007                     uint32_t batch)
4008 {
4009         struct mlx5_priv *priv = dev->data->dev_private;
4010         struct mlx5_flow_counter_pool *pool;
4011         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4012                                                                0);
4013         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4014         uint32_t size;
4015
4016         if (cont->n == n_valid) {
4017                 cont = flow_dv_container_resize(dev, batch);
4018                 if (!cont)
4019                         return NULL;
4020         }
4021         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4022                         sizeof(struct mlx5_flow_counter);
4023         pool = rte_calloc(__func__, 1, size, 0);
4024         if (!pool) {
4025                 rte_errno = ENOMEM;
4026                 return NULL;
4027         }
4028         pool->min_dcs = dcs;
4029         pool->raw = cont->init_mem_mng->raws + n_valid %
4030                                                      MLX5_CNT_CONTAINER_RESIZE;
4031         pool->raw_hw = NULL;
4032         rte_spinlock_init(&pool->sl);
4033         /*
4034          * The generation of the new allocated counters in this pool is 0, 2 in
4035          * the pool generation makes all the counters valid for allocation.
4036          */
4037         rte_atomic64_set(&pool->query_gen, 0x2);
4038         TAILQ_INIT(&pool->counters);
4039         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4040         cont->pools[n_valid] = pool;
4041         /* Pool initialization must be updated before host thread access. */
4042         rte_cio_wmb();
4043         rte_atomic16_add(&cont->n_valid, 1);
4044         return pool;
4045 }
4046
4047 /**
4048  * Prepare a new counter and/or a new counter pool.
4049  *
4050  * @param[in] dev
4051  *   Pointer to the Ethernet device structure.
4052  * @param[out] cnt_free
4053  *   Where to put the pointer of a new counter.
4054  * @param[in] batch
4055  *   Whether the pool is for counter that was allocated by batch command.
4056  *
4057  * @return
4058  *   The free counter pool pointer and @p cnt_free is set on success,
4059  *   NULL otherwise and rte_errno is set.
4060  */
4061 static struct mlx5_flow_counter_pool *
4062 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4063                              struct mlx5_flow_counter **cnt_free,
4064                              uint32_t batch)
4065 {
4066         struct mlx5_priv *priv = dev->data->dev_private;
4067         struct mlx5_flow_counter_pool *pool;
4068         struct mlx5_devx_obj *dcs = NULL;
4069         struct mlx5_flow_counter *cnt;
4070         uint32_t i;
4071
4072         if (!batch) {
4073                 /* bulk_bitmap must be 0 for single counter allocation. */
4074                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4075                 if (!dcs)
4076                         return NULL;
4077                 pool = flow_dv_find_pool_by_id
4078                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4079                 if (!pool) {
4080                         pool = flow_dv_pool_create(dev, dcs, batch);
4081                         if (!pool) {
4082                                 mlx5_devx_cmd_destroy(dcs);
4083                                 return NULL;
4084                         }
4085                 } else if (dcs->id < pool->min_dcs->id) {
4086                         rte_atomic64_set(&pool->a64_dcs,
4087                                          (int64_t)(uintptr_t)dcs);
4088                 }
4089                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4090                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4091                 cnt->dcs = dcs;
4092                 *cnt_free = cnt;
4093                 return pool;
4094         }
4095         /* bulk_bitmap is in 128 counters units. */
4096         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4097                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4098         if (!dcs) {
4099                 rte_errno = ENODATA;
4100                 return NULL;
4101         }
4102         pool = flow_dv_pool_create(dev, dcs, batch);
4103         if (!pool) {
4104                 mlx5_devx_cmd_destroy(dcs);
4105                 return NULL;
4106         }
4107         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4108                 cnt = &pool->counters_raw[i];
4109                 cnt->pool = pool;
4110                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4111         }
4112         *cnt_free = &pool->counters_raw[0];
4113         return pool;
4114 }
4115
4116 /**
4117  * Search for existed shared counter.
4118  *
4119  * @param[in] cont
4120  *   Pointer to the relevant counter pool container.
4121  * @param[in] id
4122  *   The shared counter ID to search.
4123  *
4124  * @return
4125  *   NULL if not existed, otherwise pointer to the shared counter.
4126  */
4127 static struct mlx5_flow_counter *
4128 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4129                               uint32_t id)
4130 {
4131         static struct mlx5_flow_counter *cnt;
4132         struct mlx5_flow_counter_pool *pool;
4133         int i;
4134
4135         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4136                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4137                         cnt = &pool->counters_raw[i];
4138                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4139                                 return cnt;
4140                 }
4141         }
4142         return NULL;
4143 }
4144
4145 /**
4146  * Allocate a flow counter.
4147  *
4148  * @param[in] dev
4149  *   Pointer to the Ethernet device structure.
4150  * @param[in] shared
4151  *   Indicate if this counter is shared with other flows.
4152  * @param[in] id
4153  *   Counter identifier.
4154  * @param[in] group
4155  *   Counter flow group.
4156  *
4157  * @return
4158  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4159  */
4160 static struct mlx5_flow_counter *
4161 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4162                       uint16_t group)
4163 {
4164         struct mlx5_priv *priv = dev->data->dev_private;
4165         struct mlx5_flow_counter_pool *pool = NULL;
4166         struct mlx5_flow_counter *cnt_free = NULL;
4167         /*
4168          * Currently group 0 flow counter cannot be assigned to a flow if it is
4169          * not the first one in the batch counter allocation, so it is better
4170          * to allocate counters one by one for these flows in a separate
4171          * container.
4172          * A counter can be shared between different groups so need to take
4173          * shared counters from the single container.
4174          */
4175         uint32_t batch = (group && !shared) ? 1 : 0;
4176         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4177                                                                0);
4178
4179         if (priv->counter_fallback)
4180                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4181         if (!priv->config.devx) {
4182                 rte_errno = ENOTSUP;
4183                 return NULL;
4184         }
4185         if (shared) {
4186                 cnt_free = flow_dv_counter_shared_search(cont, id);
4187                 if (cnt_free) {
4188                         if (cnt_free->ref_cnt + 1 == 0) {
4189                                 rte_errno = E2BIG;
4190                                 return NULL;
4191                         }
4192                         cnt_free->ref_cnt++;
4193                         return cnt_free;
4194                 }
4195         }
4196         /* Pools which has a free counters are in the start. */
4197         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4198                 /*
4199                  * The free counter reset values must be updated between the
4200                  * counter release to the counter allocation, so, at least one
4201                  * query must be done in this time. ensure it by saving the
4202                  * query generation in the release time.
4203                  * The free list is sorted according to the generation - so if
4204                  * the first one is not updated, all the others are not
4205                  * updated too.
4206                  */
4207                 cnt_free = TAILQ_FIRST(&pool->counters);
4208                 if (cnt_free && cnt_free->query_gen + 1 <
4209                     rte_atomic64_read(&pool->query_gen))
4210                         break;
4211                 cnt_free = NULL;
4212         }
4213         if (!cnt_free) {
4214                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4215                 if (!pool)
4216                         return NULL;
4217         }
4218         cnt_free->batch = batch;
4219         /* Create a DV counter action only in the first time usage. */
4220         if (!cnt_free->action) {
4221                 uint16_t offset;
4222                 struct mlx5_devx_obj *dcs;
4223
4224                 if (batch) {
4225                         offset = cnt_free - &pool->counters_raw[0];
4226                         dcs = pool->min_dcs;
4227                 } else {
4228                         offset = 0;
4229                         dcs = cnt_free->dcs;
4230                 }
4231                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4232                                         (dcs->obj, offset);
4233                 if (!cnt_free->action) {
4234                         rte_errno = errno;
4235                         return NULL;
4236                 }
4237         }
4238         /* Update the counter reset values. */
4239         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4240                                  &cnt_free->bytes))
4241                 return NULL;
4242         cnt_free->shared = shared;
4243         cnt_free->ref_cnt = 1;
4244         cnt_free->id = id;
4245         if (!priv->sh->cmng.query_thread_on)
4246                 /* Start the asynchronous batch query by the host thread. */
4247                 mlx5_set_query_alarm(priv->sh);
4248         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4249         if (TAILQ_EMPTY(&pool->counters)) {
4250                 /* Move the pool to the end of the container pool list. */
4251                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4252                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4253         }
4254         return cnt_free;
4255 }
4256
4257 /**
4258  * Release a flow counter.
4259  *
4260  * @param[in] dev
4261  *   Pointer to the Ethernet device structure.
4262  * @param[in] counter
4263  *   Pointer to the counter handler.
4264  */
4265 static void
4266 flow_dv_counter_release(struct rte_eth_dev *dev,
4267                         struct mlx5_flow_counter *counter)
4268 {
4269         struct mlx5_priv *priv = dev->data->dev_private;
4270
4271         if (!counter)
4272                 return;
4273         if (priv->counter_fallback) {
4274                 flow_dv_counter_release_fallback(dev, counter);
4275                 return;
4276         }
4277         if (--counter->ref_cnt == 0) {
4278                 struct mlx5_flow_counter_pool *pool =
4279                                 flow_dv_counter_pool_get(counter);
4280
4281                 /* Put the counter in the end - the last updated one. */
4282                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4283                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4284         }
4285 }
4286
4287 /**
4288  * Verify the @p attributes will be correctly understood by the NIC and store
4289  * them in the @p flow if everything is correct.
4290  *
4291  * @param[in] dev
4292  *   Pointer to dev struct.
4293  * @param[in] attributes
4294  *   Pointer to flow attributes
4295  * @param[in] external
4296  *   This flow rule is created by request external to PMD.
4297  * @param[out] error
4298  *   Pointer to error structure.
4299  *
4300  * @return
4301  *   0 on success, a negative errno value otherwise and rte_errno is set.
4302  */
4303 static int
4304 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4305                             const struct rte_flow_attr *attributes,
4306                             bool external __rte_unused,
4307                             struct rte_flow_error *error)
4308 {
4309         struct mlx5_priv *priv = dev->data->dev_private;
4310         uint32_t priority_max = priv->config.flow_prio - 1;
4311
4312 #ifndef HAVE_MLX5DV_DR
4313         if (attributes->group)
4314                 return rte_flow_error_set(error, ENOTSUP,
4315                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4316                                           NULL,
4317                                           "groups are not supported");
4318 #else
4319         uint32_t table;
4320         int ret;
4321
4322         ret = mlx5_flow_group_to_table(attributes, external,
4323                                        attributes->group,
4324                                        &table, error);
4325         if (ret)
4326                 return ret;
4327 #endif
4328         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4329             attributes->priority >= priority_max)
4330                 return rte_flow_error_set(error, ENOTSUP,
4331                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4332                                           NULL,
4333                                           "priority out of range");
4334         if (attributes->transfer) {
4335                 if (!priv->config.dv_esw_en)
4336                         return rte_flow_error_set
4337                                 (error, ENOTSUP,
4338                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4339                                  "E-Switch dr is not supported");
4340                 if (!(priv->representor || priv->master))
4341                         return rte_flow_error_set
4342                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4343                                  NULL, "E-Switch configuration can only be"
4344                                  " done by a master or a representor device");
4345                 if (attributes->egress)
4346                         return rte_flow_error_set
4347                                 (error, ENOTSUP,
4348                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4349                                  "egress is not supported");
4350         }
4351         if (!(attributes->egress ^ attributes->ingress))
4352                 return rte_flow_error_set(error, ENOTSUP,
4353                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4354                                           "must specify exactly one of "
4355                                           "ingress or egress");
4356         return 0;
4357 }
4358
4359 /**
4360  * Internal validation function. For validating both actions and items.
4361  *
4362  * @param[in] dev
4363  *   Pointer to the rte_eth_dev structure.
4364  * @param[in] attr
4365  *   Pointer to the flow attributes.
4366  * @param[in] items
4367  *   Pointer to the list of items.
4368  * @param[in] actions
4369  *   Pointer to the list of actions.
4370  * @param[in] external
4371  *   This flow rule is created by request external to PMD.
4372  * @param[out] error
4373  *   Pointer to the error structure.
4374  *
4375  * @return
4376  *   0 on success, a negative errno value otherwise and rte_errno is set.
4377  */
4378 static int
4379 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4380                  const struct rte_flow_item items[],
4381                  const struct rte_flow_action actions[],
4382                  bool external, struct rte_flow_error *error)
4383 {
4384         int ret;
4385         uint64_t action_flags = 0;
4386         uint64_t item_flags = 0;
4387         uint64_t last_item = 0;
4388         uint8_t next_protocol = 0xff;
4389         uint16_t ether_type = 0;
4390         int actions_n = 0;
4391         const struct rte_flow_item *gre_item = NULL;
4392         struct rte_flow_item_tcp nic_tcp_mask = {
4393                 .hdr = {
4394                         .tcp_flags = 0xFF,
4395                         .src_port = RTE_BE16(UINT16_MAX),
4396                         .dst_port = RTE_BE16(UINT16_MAX),
4397                 }
4398         };
4399         struct mlx5_priv *priv = dev->data->dev_private;
4400         struct mlx5_dev_config *dev_conf = &priv->config;
4401
4402         if (items == NULL)
4403                 return -1;
4404         ret = flow_dv_validate_attributes(dev, attr, external, error);
4405         if (ret < 0)
4406                 return ret;
4407         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4408                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4409                 int type = items->type;
4410
4411                 switch (type) {
4412                 case RTE_FLOW_ITEM_TYPE_VOID:
4413                         break;
4414                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4415                         ret = flow_dv_validate_item_port_id
4416                                         (dev, items, attr, item_flags, error);
4417                         if (ret < 0)
4418                                 return ret;
4419                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4420                         break;
4421                 case RTE_FLOW_ITEM_TYPE_ETH:
4422                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4423                                                           error);
4424                         if (ret < 0)
4425                                 return ret;
4426                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4427                                              MLX5_FLOW_LAYER_OUTER_L2;
4428                         if (items->mask != NULL && items->spec != NULL) {
4429                                 ether_type =
4430                                         ((const struct rte_flow_item_eth *)
4431                                          items->spec)->type;
4432                                 ether_type &=
4433                                         ((const struct rte_flow_item_eth *)
4434                                          items->mask)->type;
4435                                 ether_type = rte_be_to_cpu_16(ether_type);
4436                         } else {
4437                                 ether_type = 0;
4438                         }
4439                         break;
4440                 case RTE_FLOW_ITEM_TYPE_VLAN:
4441                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4442                                                            dev, error);
4443                         if (ret < 0)
4444                                 return ret;
4445                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4446                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4447                         if (items->mask != NULL && items->spec != NULL) {
4448                                 ether_type =
4449                                         ((const struct rte_flow_item_vlan *)
4450                                          items->spec)->inner_type;
4451                                 ether_type &=
4452                                         ((const struct rte_flow_item_vlan *)
4453                                          items->mask)->inner_type;
4454                                 ether_type = rte_be_to_cpu_16(ether_type);
4455                         } else {
4456                                 ether_type = 0;
4457                         }
4458                         break;
4459                 case RTE_FLOW_ITEM_TYPE_IPV4:
4460                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4461                                                   &item_flags, &tunnel);
4462                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4463                                                            last_item,
4464                                                            ether_type, NULL,
4465                                                            error);
4466                         if (ret < 0)
4467                                 return ret;
4468                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4469                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4470                         if (items->mask != NULL &&
4471                             ((const struct rte_flow_item_ipv4 *)
4472                              items->mask)->hdr.next_proto_id) {
4473                                 next_protocol =
4474                                         ((const struct rte_flow_item_ipv4 *)
4475                                          (items->spec))->hdr.next_proto_id;
4476                                 next_protocol &=
4477                                         ((const struct rte_flow_item_ipv4 *)
4478                                          (items->mask))->hdr.next_proto_id;
4479                         } else {
4480                                 /* Reset for inner layer. */
4481                                 next_protocol = 0xff;
4482                         }
4483                         break;
4484                 case RTE_FLOW_ITEM_TYPE_IPV6:
4485                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4486                                                   &item_flags, &tunnel);
4487                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4488                                                            last_item,
4489                                                            ether_type, NULL,
4490                                                            error);
4491                         if (ret < 0)
4492                                 return ret;
4493                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4494                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4495                         if (items->mask != NULL &&
4496                             ((const struct rte_flow_item_ipv6 *)
4497                              items->mask)->hdr.proto) {
4498                                 next_protocol =
4499                                         ((const struct rte_flow_item_ipv6 *)
4500                                          items->spec)->hdr.proto;
4501                                 next_protocol &=
4502                                         ((const struct rte_flow_item_ipv6 *)
4503                                          items->mask)->hdr.proto;
4504                         } else {
4505                                 /* Reset for inner layer. */
4506                                 next_protocol = 0xff;
4507                         }
4508                         break;
4509                 case RTE_FLOW_ITEM_TYPE_TCP:
4510                         ret = mlx5_flow_validate_item_tcp
4511                                                 (items, item_flags,
4512                                                  next_protocol,
4513                                                  &nic_tcp_mask,
4514                                                  error);
4515                         if (ret < 0)
4516                                 return ret;
4517                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4518                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4519                         break;
4520                 case RTE_FLOW_ITEM_TYPE_UDP:
4521                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4522                                                           next_protocol,
4523                                                           error);
4524                         if (ret < 0)
4525                                 return ret;
4526                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4527                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4528                         break;
4529                 case RTE_FLOW_ITEM_TYPE_GRE:
4530                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4531                                                           next_protocol, error);
4532                         if (ret < 0)
4533                                 return ret;
4534                         gre_item = items;
4535                         last_item = MLX5_FLOW_LAYER_GRE;
4536                         break;
4537                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4538                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4539                                                             next_protocol,
4540                                                             error);
4541                         if (ret < 0)
4542                                 return ret;
4543                         last_item = MLX5_FLOW_LAYER_NVGRE;
4544                         break;
4545                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4546                         ret = mlx5_flow_validate_item_gre_key
4547                                 (items, item_flags, gre_item, error);
4548                         if (ret < 0)
4549                                 return ret;
4550                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4551                         break;
4552                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4553                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4554                                                             error);
4555                         if (ret < 0)
4556                                 return ret;
4557                         last_item = MLX5_FLOW_LAYER_VXLAN;
4558                         break;
4559                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4560                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4561                                                                 item_flags, dev,
4562                                                                 error);
4563                         if (ret < 0)
4564                                 return ret;
4565                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4566                         break;
4567                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4568                         ret = mlx5_flow_validate_item_geneve(items,
4569                                                              item_flags, dev,
4570                                                              error);
4571                         if (ret < 0)
4572                                 return ret;
4573                         last_item = MLX5_FLOW_LAYER_GENEVE;
4574                         break;
4575                 case RTE_FLOW_ITEM_TYPE_MPLS:
4576                         ret = mlx5_flow_validate_item_mpls(dev, items,
4577                                                            item_flags,
4578                                                            last_item, error);
4579                         if (ret < 0)
4580                                 return ret;
4581                         last_item = MLX5_FLOW_LAYER_MPLS;
4582                         break;
4583
4584                 case RTE_FLOW_ITEM_TYPE_MARK:
4585                         ret = flow_dv_validate_item_mark(dev, items, attr,
4586                                                          error);
4587                         if (ret < 0)
4588                                 return ret;
4589                         last_item = MLX5_FLOW_ITEM_MARK;
4590                         break;
4591                 case RTE_FLOW_ITEM_TYPE_META:
4592                         ret = flow_dv_validate_item_meta(dev, items, attr,
4593                                                          error);
4594                         if (ret < 0)
4595                                 return ret;
4596                         last_item = MLX5_FLOW_ITEM_METADATA;
4597                         break;
4598                 case RTE_FLOW_ITEM_TYPE_ICMP:
4599                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4600                                                            next_protocol,
4601                                                            error);
4602                         if (ret < 0)
4603                                 return ret;
4604                         last_item = MLX5_FLOW_LAYER_ICMP;
4605                         break;
4606                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4607                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4608                                                             next_protocol,
4609                                                             error);
4610                         if (ret < 0)
4611                                 return ret;
4612                         last_item = MLX5_FLOW_LAYER_ICMP6;
4613                         break;
4614                 case RTE_FLOW_ITEM_TYPE_TAG:
4615                         ret = flow_dv_validate_item_tag(dev, items,
4616                                                         attr, error);
4617                         if (ret < 0)
4618                                 return ret;
4619                         last_item = MLX5_FLOW_ITEM_TAG;
4620                         break;
4621                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4622                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4623                         break;
4624                 default:
4625                         return rte_flow_error_set(error, ENOTSUP,
4626                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4627                                                   NULL, "item not supported");
4628                 }
4629                 item_flags |= last_item;
4630         }
4631         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4632                 int type = actions->type;
4633                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4634                         return rte_flow_error_set(error, ENOTSUP,
4635                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4636                                                   actions, "too many actions");
4637                 switch (type) {
4638                 case RTE_FLOW_ACTION_TYPE_VOID:
4639                         break;
4640                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4641                         ret = flow_dv_validate_action_port_id(dev,
4642                                                               action_flags,
4643                                                               actions,
4644                                                               attr,
4645                                                               error);
4646                         if (ret)
4647                                 return ret;
4648                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4649                         ++actions_n;
4650                         break;
4651                 case RTE_FLOW_ACTION_TYPE_FLAG:
4652                         ret = flow_dv_validate_action_flag(dev, action_flags,
4653                                                            attr, error);
4654                         if (ret < 0)
4655                                 return ret;
4656                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4657                                 /* Count all modify-header actions as one. */
4658                                 if (!(action_flags &
4659                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4660                                         ++actions_n;
4661                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4662                                                 MLX5_FLOW_ACTION_MARK_EXT;
4663                         } else {
4664                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4665                                 ++actions_n;
4666                         }
4667                         break;
4668                 case RTE_FLOW_ACTION_TYPE_MARK:
4669                         ret = flow_dv_validate_action_mark(dev, actions,
4670                                                            action_flags,
4671                                                            attr, error);
4672                         if (ret < 0)
4673                                 return ret;
4674                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4675                                 /* Count all modify-header actions as one. */
4676                                 if (!(action_flags &
4677                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4678                                         ++actions_n;
4679                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4680                                                 MLX5_FLOW_ACTION_MARK_EXT;
4681                         } else {
4682                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4683                                 ++actions_n;
4684                         }
4685                         break;
4686                 case RTE_FLOW_ACTION_TYPE_SET_META:
4687                         ret = flow_dv_validate_action_set_meta(dev, actions,
4688                                                                action_flags,
4689                                                                attr, error);
4690                         if (ret < 0)
4691                                 return ret;
4692                         /* Count all modify-header actions as one action. */
4693                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4694                                 ++actions_n;
4695                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4696                         break;
4697                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4698                         ret = flow_dv_validate_action_set_tag(dev, actions,
4699                                                               action_flags,
4700                                                               attr, error);
4701                         if (ret < 0)
4702                                 return ret;
4703                         /* Count all modify-header actions as one action. */
4704                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4705                                 ++actions_n;
4706                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4707                         break;
4708                 case RTE_FLOW_ACTION_TYPE_DROP:
4709                         ret = mlx5_flow_validate_action_drop(action_flags,
4710                                                              attr, error);
4711                         if (ret < 0)
4712                                 return ret;
4713                         action_flags |= MLX5_FLOW_ACTION_DROP;
4714                         ++actions_n;
4715                         break;
4716                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4717                         ret = mlx5_flow_validate_action_queue(actions,
4718                                                               action_flags, dev,
4719                                                               attr, error);
4720                         if (ret < 0)
4721                                 return ret;
4722                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4723                         ++actions_n;
4724                         break;
4725                 case RTE_FLOW_ACTION_TYPE_RSS:
4726                         ret = mlx5_flow_validate_action_rss(actions,
4727                                                             action_flags, dev,
4728                                                             attr, item_flags,
4729                                                             error);
4730                         if (ret < 0)
4731                                 return ret;
4732                         action_flags |= MLX5_FLOW_ACTION_RSS;
4733                         ++actions_n;
4734                         break;
4735                 case RTE_FLOW_ACTION_TYPE_COUNT:
4736                         ret = flow_dv_validate_action_count(dev, error);
4737                         if (ret < 0)
4738                                 return ret;
4739                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4740                         ++actions_n;
4741                         break;
4742                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4743                         if (flow_dv_validate_action_pop_vlan(dev,
4744                                                              action_flags,
4745                                                              actions,
4746                                                              item_flags, attr,
4747                                                              error))
4748                                 return -rte_errno;
4749                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4750                         ++actions_n;
4751                         break;
4752                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4753                         ret = flow_dv_validate_action_push_vlan(action_flags,
4754                                                                 item_flags,
4755                                                                 actions, attr,
4756                                                                 error);
4757                         if (ret < 0)
4758                                 return ret;
4759                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4760                         ++actions_n;
4761                         break;
4762                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4763                         ret = flow_dv_validate_action_set_vlan_pcp
4764                                                 (action_flags, actions, error);
4765                         if (ret < 0)
4766                                 return ret;
4767                         /* Count PCP with push_vlan command. */
4768                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4769                         break;
4770                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4771                         ret = flow_dv_validate_action_set_vlan_vid
4772                                                 (item_flags, action_flags,
4773                                                  actions, error);
4774                         if (ret < 0)
4775                                 return ret;
4776                         /* Count VID with push_vlan command. */
4777                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4778                         break;
4779                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4780                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4781                         ret = flow_dv_validate_action_l2_encap(action_flags,
4782                                                                actions, attr,
4783                                                                error);
4784                         if (ret < 0)
4785                                 return ret;
4786                         action_flags |= actions->type ==
4787                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4788                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4789                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4790                         ++actions_n;
4791                         break;
4792                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4793                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4794                         ret = flow_dv_validate_action_l2_decap(action_flags,
4795                                                                attr, error);
4796                         if (ret < 0)
4797                                 return ret;
4798                         action_flags |= actions->type ==
4799                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4800                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4801                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4802                         ++actions_n;
4803                         break;
4804                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4805                         ret = flow_dv_validate_action_raw_encap(action_flags,
4806                                                                 actions, attr,
4807                                                                 error);
4808                         if (ret < 0)
4809                                 return ret;
4810                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4811                         ++actions_n;
4812                         break;
4813                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4814                         ret = flow_dv_validate_action_raw_decap(action_flags,
4815                                                                 actions, attr,
4816                                                                 error);
4817                         if (ret < 0)
4818                                 return ret;
4819                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4820                         ++actions_n;
4821                         break;
4822                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4823                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4824                         ret = flow_dv_validate_action_modify_mac(action_flags,
4825                                                                  actions,
4826                                                                  item_flags,
4827                                                                  error);
4828                         if (ret < 0)
4829                                 return ret;
4830                         /* Count all modify-header actions as one action. */
4831                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4832                                 ++actions_n;
4833                         action_flags |= actions->type ==
4834                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4835                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4836                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4837                         break;
4838
4839                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4840                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4841                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4842                                                                   actions,
4843                                                                   item_flags,
4844                                                                   error);
4845                         if (ret < 0)
4846                                 return ret;
4847                         /* Count all modify-header actions as one action. */
4848                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4849                                 ++actions_n;
4850                         action_flags |= actions->type ==
4851                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4852                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4853                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4854                         break;
4855                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4856                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4857                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4858                                                                   actions,
4859                                                                   item_flags,
4860                                                                   error);
4861                         if (ret < 0)
4862                                 return ret;
4863                         /* Count all modify-header actions as one action. */
4864                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4865                                 ++actions_n;
4866                         action_flags |= actions->type ==
4867                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4868                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4869                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4870                         break;
4871                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4872                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4873                         ret = flow_dv_validate_action_modify_tp(action_flags,
4874                                                                 actions,
4875                                                                 item_flags,
4876                                                                 error);
4877                         if (ret < 0)
4878                                 return ret;
4879                         /* Count all modify-header actions as one action. */
4880                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4881                                 ++actions_n;
4882                         action_flags |= actions->type ==
4883                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4884                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4885                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4886                         break;
4887                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4888                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4889                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4890                                                                  actions,
4891                                                                  item_flags,
4892                                                                  error);
4893                         if (ret < 0)
4894                                 return ret;
4895                         /* Count all modify-header actions as one action. */
4896                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4897                                 ++actions_n;
4898                         action_flags |= actions->type ==
4899                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4900                                                 MLX5_FLOW_ACTION_SET_TTL :
4901                                                 MLX5_FLOW_ACTION_DEC_TTL;
4902                         break;
4903                 case RTE_FLOW_ACTION_TYPE_JUMP:
4904                         ret = flow_dv_validate_action_jump(actions,
4905                                                            action_flags,
4906                                                            attr, external,
4907                                                            error);
4908                         if (ret)
4909                                 return ret;
4910                         ++actions_n;
4911                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4912                         break;
4913                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4914                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4915                         ret = flow_dv_validate_action_modify_tcp_seq
4916                                                                 (action_flags,
4917                                                                  actions,
4918                                                                  item_flags,
4919                                                                  error);
4920                         if (ret < 0)
4921                                 return ret;
4922                         /* Count all modify-header actions as one action. */
4923                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4924                                 ++actions_n;
4925                         action_flags |= actions->type ==
4926                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4927                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4928                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4929                         break;
4930                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4931                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4932                         ret = flow_dv_validate_action_modify_tcp_ack
4933                                                                 (action_flags,
4934                                                                  actions,
4935                                                                  item_flags,
4936                                                                  error);
4937                         if (ret < 0)
4938                                 return ret;
4939                         /* Count all modify-header actions as one action. */
4940                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4941                                 ++actions_n;
4942                         action_flags |= actions->type ==
4943                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4944                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4945                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4946                         break;
4947                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4948                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4949                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4950                         break;
4951                 case RTE_FLOW_ACTION_TYPE_METER:
4952                         ret = mlx5_flow_validate_action_meter(dev,
4953                                                               action_flags,
4954                                                               actions, attr,
4955                                                               error);
4956                         if (ret < 0)
4957                                 return ret;
4958                         action_flags |= MLX5_FLOW_ACTION_METER;
4959                         ++actions_n;
4960                         break;
4961                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4962                         ret = flow_dv_validate_action_modify_ipv4_dscp
4963                                                          (action_flags,
4964                                                           actions,
4965                                                           item_flags,
4966                                                           error);
4967                         if (ret < 0)
4968                                 return ret;
4969                         /* Count all modify-header actions as one action. */
4970                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4971                                 ++actions_n;
4972                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
4973                         break;
4974                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
4975                         ret = flow_dv_validate_action_modify_ipv6_dscp
4976                                                                 (action_flags,
4977                                                                  actions,
4978                                                                  item_flags,
4979                                                                  error);
4980                         if (ret < 0)
4981                                 return ret;
4982                         /* Count all modify-header actions as one action. */
4983                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4984                                 ++actions_n;
4985                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
4986                         break;
4987                 default:
4988                         return rte_flow_error_set(error, ENOTSUP,
4989                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4990                                                   actions,
4991                                                   "action not supported");
4992                 }
4993         }
4994         if ((action_flags & MLX5_FLOW_LAYER_TUNNEL) &&
4995             (action_flags & MLX5_FLOW_VLAN_ACTIONS))
4996                 return rte_flow_error_set(error, ENOTSUP,
4997                                           RTE_FLOW_ERROR_TYPE_ACTION,
4998                                           actions,
4999                                           "can't have vxlan and vlan"
5000                                           " actions in the same rule");
5001         /* Eswitch has few restrictions on using items and actions */
5002         if (attr->transfer) {
5003                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5004                     action_flags & MLX5_FLOW_ACTION_FLAG)
5005                         return rte_flow_error_set(error, ENOTSUP,
5006                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5007                                                   NULL,
5008                                                   "unsupported action FLAG");
5009                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5010                     action_flags & MLX5_FLOW_ACTION_MARK)
5011                         return rte_flow_error_set(error, ENOTSUP,
5012                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5013                                                   NULL,
5014                                                   "unsupported action MARK");
5015                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5016                         return rte_flow_error_set(error, ENOTSUP,
5017                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5018                                                   NULL,
5019                                                   "unsupported action QUEUE");
5020                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5021                         return rte_flow_error_set(error, ENOTSUP,
5022                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5023                                                   NULL,
5024                                                   "unsupported action RSS");
5025                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5026                         return rte_flow_error_set(error, EINVAL,
5027                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5028                                                   actions,
5029                                                   "no fate action is found");
5030         } else {
5031                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5032                         return rte_flow_error_set(error, EINVAL,
5033                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5034                                                   actions,
5035                                                   "no fate action is found");
5036         }
5037         return 0;
5038 }
5039
5040 /**
5041  * Internal preparation function. Allocates the DV flow size,
5042  * this size is constant.
5043  *
5044  * @param[in] attr
5045  *   Pointer to the flow attributes.
5046  * @param[in] items
5047  *   Pointer to the list of items.
5048  * @param[in] actions
5049  *   Pointer to the list of actions.
5050  * @param[out] error
5051  *   Pointer to the error structure.
5052  *
5053  * @return
5054  *   Pointer to mlx5_flow object on success,
5055  *   otherwise NULL and rte_errno is set.
5056  */
5057 static struct mlx5_flow *
5058 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5059                 const struct rte_flow_item items[] __rte_unused,
5060                 const struct rte_flow_action actions[] __rte_unused,
5061                 struct rte_flow_error *error)
5062 {
5063         size_t size = sizeof(struct mlx5_flow);
5064         struct mlx5_flow *dev_flow;
5065
5066         dev_flow = rte_calloc(__func__, 1, size, 0);
5067         if (!dev_flow) {
5068                 rte_flow_error_set(error, ENOMEM,
5069                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5070                                    "not enough memory to create flow");
5071                 return NULL;
5072         }
5073         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5074         dev_flow->ingress = attr->ingress;
5075         dev_flow->transfer = attr->transfer;
5076         return dev_flow;
5077 }
5078
5079 #ifndef NDEBUG
5080 /**
5081  * Sanity check for match mask and value. Similar to check_valid_spec() in
5082  * kernel driver. If unmasked bit is present in value, it returns failure.
5083  *
5084  * @param match_mask
5085  *   pointer to match mask buffer.
5086  * @param match_value
5087  *   pointer to match value buffer.
5088  *
5089  * @return
5090  *   0 if valid, -EINVAL otherwise.
5091  */
5092 static int
5093 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5094 {
5095         uint8_t *m = match_mask;
5096         uint8_t *v = match_value;
5097         unsigned int i;
5098
5099         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5100                 if (v[i] & ~m[i]) {
5101                         DRV_LOG(ERR,
5102                                 "match_value differs from match_criteria"
5103                                 " %p[%u] != %p[%u]",
5104                                 match_value, i, match_mask, i);
5105                         return -EINVAL;
5106                 }
5107         }
5108         return 0;
5109 }
5110 #endif
5111
5112 /**
5113  * Add Ethernet item to matcher and to the value.
5114  *
5115  * @param[in, out] matcher
5116  *   Flow matcher.
5117  * @param[in, out] key
5118  *   Flow matcher value.
5119  * @param[in] item
5120  *   Flow pattern to translate.
5121  * @param[in] inner
5122  *   Item is inner pattern.
5123  */
5124 static void
5125 flow_dv_translate_item_eth(void *matcher, void *key,
5126                            const struct rte_flow_item *item, int inner)
5127 {
5128         const struct rte_flow_item_eth *eth_m = item->mask;
5129         const struct rte_flow_item_eth *eth_v = item->spec;
5130         const struct rte_flow_item_eth nic_mask = {
5131                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5132                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5133                 .type = RTE_BE16(0xffff),
5134         };
5135         void *headers_m;
5136         void *headers_v;
5137         char *l24_v;
5138         unsigned int i;
5139
5140         if (!eth_v)
5141                 return;
5142         if (!eth_m)
5143                 eth_m = &nic_mask;
5144         if (inner) {
5145                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5146                                          inner_headers);
5147                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5148         } else {
5149                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5150                                          outer_headers);
5151                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5152         }
5153         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5154                &eth_m->dst, sizeof(eth_m->dst));
5155         /* The value must be in the range of the mask. */
5156         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5157         for (i = 0; i < sizeof(eth_m->dst); ++i)
5158                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5159         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5160                &eth_m->src, sizeof(eth_m->src));
5161         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5162         /* The value must be in the range of the mask. */
5163         for (i = 0; i < sizeof(eth_m->dst); ++i)
5164                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5165         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5166                  rte_be_to_cpu_16(eth_m->type));
5167         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5168         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5169 }
5170
5171 /**
5172  * Add VLAN item to matcher and to the value.
5173  *
5174  * @param[in, out] dev_flow
5175  *   Flow descriptor.
5176  * @param[in, out] matcher
5177  *   Flow matcher.
5178  * @param[in, out] key
5179  *   Flow matcher value.
5180  * @param[in] item
5181  *   Flow pattern to translate.
5182  * @param[in] inner
5183  *   Item is inner pattern.
5184  */
5185 static void
5186 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5187                             void *matcher, void *key,
5188                             const struct rte_flow_item *item,
5189                             int inner)
5190 {
5191         const struct rte_flow_item_vlan *vlan_m = item->mask;
5192         const struct rte_flow_item_vlan *vlan_v = item->spec;
5193         void *headers_m;
5194         void *headers_v;
5195         uint16_t tci_m;
5196         uint16_t tci_v;
5197
5198         if (!vlan_v)
5199                 return;
5200         if (!vlan_m)
5201                 vlan_m = &rte_flow_item_vlan_mask;
5202         if (inner) {
5203                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5204                                          inner_headers);
5205                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5206         } else {
5207                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5208                                          outer_headers);
5209                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5210                 /*
5211                  * This is workaround, masks are not supported,
5212                  * and pre-validated.
5213                  */
5214                 dev_flow->dv.vf_vlan.tag =
5215                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5216         }
5217         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5218         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5219         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5220         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5221         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5222         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5223         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5224         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5225         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5226         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5227         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5228                  rte_be_to_cpu_16(vlan_m->inner_type));
5229         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5230                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5231 }
5232
5233 /**
5234  * Add IPV4 item to matcher and to the value.
5235  *
5236  * @param[in, out] matcher
5237  *   Flow matcher.
5238  * @param[in, out] key
5239  *   Flow matcher value.
5240  * @param[in] item
5241  *   Flow pattern to translate.
5242  * @param[in] inner
5243  *   Item is inner pattern.
5244  * @param[in] group
5245  *   The group to insert the rule.
5246  */
5247 static void
5248 flow_dv_translate_item_ipv4(void *matcher, void *key,
5249                             const struct rte_flow_item *item,
5250                             int inner, uint32_t group)
5251 {
5252         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5253         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5254         const struct rte_flow_item_ipv4 nic_mask = {
5255                 .hdr = {
5256                         .src_addr = RTE_BE32(0xffffffff),
5257                         .dst_addr = RTE_BE32(0xffffffff),
5258                         .type_of_service = 0xff,
5259                         .next_proto_id = 0xff,
5260                 },
5261         };
5262         void *headers_m;
5263         void *headers_v;
5264         char *l24_m;
5265         char *l24_v;
5266         uint8_t tos;
5267
5268         if (inner) {
5269                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5270                                          inner_headers);
5271                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5272         } else {
5273                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5274                                          outer_headers);
5275                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5276         }
5277         if (group == 0)
5278                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5279         else
5280                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5281         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5282         if (!ipv4_v)
5283                 return;
5284         if (!ipv4_m)
5285                 ipv4_m = &nic_mask;
5286         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5287                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5288         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5289                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5290         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5291         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5292         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5293                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5294         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5295                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5296         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5297         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5298         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5299         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5300                  ipv4_m->hdr.type_of_service);
5301         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5302         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5303                  ipv4_m->hdr.type_of_service >> 2);
5304         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5305         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5306                  ipv4_m->hdr.next_proto_id);
5307         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5308                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5309 }
5310
5311 /**
5312  * Add IPV6 item to matcher and to the value.
5313  *
5314  * @param[in, out] matcher
5315  *   Flow matcher.
5316  * @param[in, out] key
5317  *   Flow matcher value.
5318  * @param[in] item
5319  *   Flow pattern to translate.
5320  * @param[in] inner
5321  *   Item is inner pattern.
5322  * @param[in] group
5323  *   The group to insert the rule.
5324  */
5325 static void
5326 flow_dv_translate_item_ipv6(void *matcher, void *key,
5327                             const struct rte_flow_item *item,
5328                             int inner, uint32_t group)
5329 {
5330         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5331         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5332         const struct rte_flow_item_ipv6 nic_mask = {
5333                 .hdr = {
5334                         .src_addr =
5335                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5336                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5337                         .dst_addr =
5338                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5339                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5340                         .vtc_flow = RTE_BE32(0xffffffff),
5341                         .proto = 0xff,
5342                         .hop_limits = 0xff,
5343                 },
5344         };
5345         void *headers_m;
5346         void *headers_v;
5347         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5348         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5349         char *l24_m;
5350         char *l24_v;
5351         uint32_t vtc_m;
5352         uint32_t vtc_v;
5353         int i;
5354         int size;
5355
5356         if (inner) {
5357                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5358                                          inner_headers);
5359                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5360         } else {
5361                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5362                                          outer_headers);
5363                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5364         }
5365         if (group == 0)
5366                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5367         else
5368                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5369         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5370         if (!ipv6_v)
5371                 return;
5372         if (!ipv6_m)
5373                 ipv6_m = &nic_mask;
5374         size = sizeof(ipv6_m->hdr.dst_addr);
5375         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5376                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5377         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5378                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5379         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5380         for (i = 0; i < size; ++i)
5381                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5382         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5383                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5384         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5385                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5386         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5387         for (i = 0; i < size; ++i)
5388                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5389         /* TOS. */
5390         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5391         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5392         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5393         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5394         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5395         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5396         /* Label. */
5397         if (inner) {
5398                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5399                          vtc_m);
5400                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5401                          vtc_v);
5402         } else {
5403                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5404                          vtc_m);
5405                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5406                          vtc_v);
5407         }
5408         /* Protocol. */
5409         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5410                  ipv6_m->hdr.proto);
5411         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5412                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5413 }
5414
5415 /**
5416  * Add TCP item to matcher and to the value.
5417  *
5418  * @param[in, out] matcher
5419  *   Flow matcher.
5420  * @param[in, out] key
5421  *   Flow matcher value.
5422  * @param[in] item
5423  *   Flow pattern to translate.
5424  * @param[in] inner
5425  *   Item is inner pattern.
5426  */
5427 static void
5428 flow_dv_translate_item_tcp(void *matcher, void *key,
5429                            const struct rte_flow_item *item,
5430                            int inner)
5431 {
5432         const struct rte_flow_item_tcp *tcp_m = item->mask;
5433         const struct rte_flow_item_tcp *tcp_v = item->spec;
5434         void *headers_m;
5435         void *headers_v;
5436
5437         if (inner) {
5438                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5439                                          inner_headers);
5440                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5441         } else {
5442                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5443                                          outer_headers);
5444                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5445         }
5446         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5447         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5448         if (!tcp_v)
5449                 return;
5450         if (!tcp_m)
5451                 tcp_m = &rte_flow_item_tcp_mask;
5452         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5453                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5454         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5455                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5456         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5457                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5458         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5459                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5460         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5461                  tcp_m->hdr.tcp_flags);
5462         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5463                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5464 }
5465
5466 /**
5467  * Add UDP item to matcher and to the value.
5468  *
5469  * @param[in, out] matcher
5470  *   Flow matcher.
5471  * @param[in, out] key
5472  *   Flow matcher value.
5473  * @param[in] item
5474  *   Flow pattern to translate.
5475  * @param[in] inner
5476  *   Item is inner pattern.
5477  */
5478 static void
5479 flow_dv_translate_item_udp(void *matcher, void *key,
5480                            const struct rte_flow_item *item,
5481                            int inner)
5482 {
5483         const struct rte_flow_item_udp *udp_m = item->mask;
5484         const struct rte_flow_item_udp *udp_v = item->spec;
5485         void *headers_m;
5486         void *headers_v;
5487
5488         if (inner) {
5489                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5490                                          inner_headers);
5491                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5492         } else {
5493                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5494                                          outer_headers);
5495                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5496         }
5497         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5498         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5499         if (!udp_v)
5500                 return;
5501         if (!udp_m)
5502                 udp_m = &rte_flow_item_udp_mask;
5503         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5504                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5505         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5506                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5507         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5508                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5509         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5510                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5511 }
5512
5513 /**
5514  * Add GRE optional Key item to matcher and to the value.
5515  *
5516  * @param[in, out] matcher
5517  *   Flow matcher.
5518  * @param[in, out] key
5519  *   Flow matcher value.
5520  * @param[in] item
5521  *   Flow pattern to translate.
5522  * @param[in] inner
5523  *   Item is inner pattern.
5524  */
5525 static void
5526 flow_dv_translate_item_gre_key(void *matcher, void *key,
5527                                    const struct rte_flow_item *item)
5528 {
5529         const rte_be32_t *key_m = item->mask;
5530         const rte_be32_t *key_v = item->spec;
5531         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5532         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5533         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5534
5535         if (!key_v)
5536                 return;
5537         if (!key_m)
5538                 key_m = &gre_key_default_mask;
5539         /* GRE K bit must be on and should already be validated */
5540         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5541         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5542         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5543                  rte_be_to_cpu_32(*key_m) >> 8);
5544         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5545                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5546         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5547                  rte_be_to_cpu_32(*key_m) & 0xFF);
5548         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5549                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5550 }
5551
5552 /**
5553  * Add GRE item to matcher and to the value.
5554  *
5555  * @param[in, out] matcher
5556  *   Flow matcher.
5557  * @param[in, out] key
5558  *   Flow matcher value.
5559  * @param[in] item
5560  *   Flow pattern to translate.
5561  * @param[in] inner
5562  *   Item is inner pattern.
5563  */
5564 static void
5565 flow_dv_translate_item_gre(void *matcher, void *key,
5566                            const struct rte_flow_item *item,
5567                            int inner)
5568 {
5569         const struct rte_flow_item_gre *gre_m = item->mask;
5570         const struct rte_flow_item_gre *gre_v = item->spec;
5571         void *headers_m;
5572         void *headers_v;
5573         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5574         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5575         struct {
5576                 union {
5577                         __extension__
5578                         struct {
5579                                 uint16_t version:3;
5580                                 uint16_t rsvd0:9;
5581                                 uint16_t s_present:1;
5582                                 uint16_t k_present:1;
5583                                 uint16_t rsvd_bit1:1;
5584                                 uint16_t c_present:1;
5585                         };
5586                         uint16_t value;
5587                 };
5588         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5589
5590         if (inner) {
5591                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5592                                          inner_headers);
5593                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5594         } else {
5595                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5596                                          outer_headers);
5597                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5598         }
5599         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5600         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5601         if (!gre_v)
5602                 return;
5603         if (!gre_m)
5604                 gre_m = &rte_flow_item_gre_mask;
5605         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5606                  rte_be_to_cpu_16(gre_m->protocol));
5607         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5608                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5609         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5610         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5611         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5612                  gre_crks_rsvd0_ver_m.c_present);
5613         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5614                  gre_crks_rsvd0_ver_v.c_present &
5615                  gre_crks_rsvd0_ver_m.c_present);
5616         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5617                  gre_crks_rsvd0_ver_m.k_present);
5618         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5619                  gre_crks_rsvd0_ver_v.k_present &
5620                  gre_crks_rsvd0_ver_m.k_present);
5621         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5622                  gre_crks_rsvd0_ver_m.s_present);
5623         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5624                  gre_crks_rsvd0_ver_v.s_present &
5625                  gre_crks_rsvd0_ver_m.s_present);
5626 }
5627
5628 /**
5629  * Add NVGRE item to matcher and to the value.
5630  *
5631  * @param[in, out] matcher
5632  *   Flow matcher.
5633  * @param[in, out] key
5634  *   Flow matcher value.
5635  * @param[in] item
5636  *   Flow pattern to translate.
5637  * @param[in] inner
5638  *   Item is inner pattern.
5639  */
5640 static void
5641 flow_dv_translate_item_nvgre(void *matcher, void *key,
5642                              const struct rte_flow_item *item,
5643                              int inner)
5644 {
5645         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5646         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5647         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5648         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5649         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5650         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5651         char *gre_key_m;
5652         char *gre_key_v;
5653         int size;
5654         int i;
5655
5656         /* For NVGRE, GRE header fields must be set with defined values. */
5657         const struct rte_flow_item_gre gre_spec = {
5658                 .c_rsvd0_ver = RTE_BE16(0x2000),
5659                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5660         };
5661         const struct rte_flow_item_gre gre_mask = {
5662                 .c_rsvd0_ver = RTE_BE16(0xB000),
5663                 .protocol = RTE_BE16(UINT16_MAX),
5664         };
5665         const struct rte_flow_item gre_item = {
5666                 .spec = &gre_spec,
5667                 .mask = &gre_mask,
5668                 .last = NULL,
5669         };
5670         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5671         if (!nvgre_v)
5672                 return;
5673         if (!nvgre_m)
5674                 nvgre_m = &rte_flow_item_nvgre_mask;
5675         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5676         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5677         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5678         memcpy(gre_key_m, tni_flow_id_m, size);
5679         for (i = 0; i < size; ++i)
5680                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5681 }
5682
5683 /**
5684  * Add VXLAN item to matcher and to the value.
5685  *
5686  * @param[in, out] matcher
5687  *   Flow matcher.
5688  * @param[in, out] key
5689  *   Flow matcher value.
5690  * @param[in] item
5691  *   Flow pattern to translate.
5692  * @param[in] inner
5693  *   Item is inner pattern.
5694  */
5695 static void
5696 flow_dv_translate_item_vxlan(void *matcher, void *key,
5697                              const struct rte_flow_item *item,
5698                              int inner)
5699 {
5700         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5701         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5702         void *headers_m;
5703         void *headers_v;
5704         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5705         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5706         char *vni_m;
5707         char *vni_v;
5708         uint16_t dport;
5709         int size;
5710         int i;
5711
5712         if (inner) {
5713                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5714                                          inner_headers);
5715                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5716         } else {
5717                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5718                                          outer_headers);
5719                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5720         }
5721         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5722                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5723         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5724                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5725                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5726         }
5727         if (!vxlan_v)
5728                 return;
5729         if (!vxlan_m)
5730                 vxlan_m = &rte_flow_item_vxlan_mask;
5731         size = sizeof(vxlan_m->vni);
5732         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5733         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5734         memcpy(vni_m, vxlan_m->vni, size);
5735         for (i = 0; i < size; ++i)
5736                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5737 }
5738
5739 /**
5740  * Add Geneve item to matcher and to the value.
5741  *
5742  * @param[in, out] matcher
5743  *   Flow matcher.
5744  * @param[in, out] key
5745  *   Flow matcher value.
5746  * @param[in] item
5747  *   Flow pattern to translate.
5748  * @param[in] inner
5749  *   Item is inner pattern.
5750  */
5751
5752 static void
5753 flow_dv_translate_item_geneve(void *matcher, void *key,
5754                               const struct rte_flow_item *item, int inner)
5755 {
5756         const struct rte_flow_item_geneve *geneve_m = item->mask;
5757         const struct rte_flow_item_geneve *geneve_v = item->spec;
5758         void *headers_m;
5759         void *headers_v;
5760         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5761         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5762         uint16_t dport;
5763         uint16_t gbhdr_m;
5764         uint16_t gbhdr_v;
5765         char *vni_m;
5766         char *vni_v;
5767         size_t size, i;
5768
5769         if (inner) {
5770                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5771                                          inner_headers);
5772                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5773         } else {
5774                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5775                                          outer_headers);
5776                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5777         }
5778         dport = MLX5_UDP_PORT_GENEVE;
5779         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5780                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5781                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5782         }
5783         if (!geneve_v)
5784                 return;
5785         if (!geneve_m)
5786                 geneve_m = &rte_flow_item_geneve_mask;
5787         size = sizeof(geneve_m->vni);
5788         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5789         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5790         memcpy(vni_m, geneve_m->vni, size);
5791         for (i = 0; i < size; ++i)
5792                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5793         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5794                  rte_be_to_cpu_16(geneve_m->protocol));
5795         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5796                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5797         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5798         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5799         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5800                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5801         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5802                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5803         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5804                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5805         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5806                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5807                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5808 }
5809
5810 /**
5811  * Add MPLS item to matcher and to the value.
5812  *
5813  * @param[in, out] matcher
5814  *   Flow matcher.
5815  * @param[in, out] key
5816  *   Flow matcher value.
5817  * @param[in] item
5818  *   Flow pattern to translate.
5819  * @param[in] prev_layer
5820  *   The protocol layer indicated in previous item.
5821  * @param[in] inner
5822  *   Item is inner pattern.
5823  */
5824 static void
5825 flow_dv_translate_item_mpls(void *matcher, void *key,
5826                             const struct rte_flow_item *item,
5827                             uint64_t prev_layer,
5828                             int inner)
5829 {
5830         const uint32_t *in_mpls_m = item->mask;
5831         const uint32_t *in_mpls_v = item->spec;
5832         uint32_t *out_mpls_m = 0;
5833         uint32_t *out_mpls_v = 0;
5834         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5835         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5836         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5837                                      misc_parameters_2);
5838         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5839         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5840         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5841
5842         switch (prev_layer) {
5843         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5844                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5845                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5846                          MLX5_UDP_PORT_MPLS);
5847                 break;
5848         case MLX5_FLOW_LAYER_GRE:
5849                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5850                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5851                          RTE_ETHER_TYPE_MPLS);
5852                 break;
5853         default:
5854                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5855                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5856                          IPPROTO_MPLS);
5857                 break;
5858         }
5859         if (!in_mpls_v)
5860                 return;
5861         if (!in_mpls_m)
5862                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5863         switch (prev_layer) {
5864         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5865                 out_mpls_m =
5866                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5867                                                  outer_first_mpls_over_udp);
5868                 out_mpls_v =
5869                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5870                                                  outer_first_mpls_over_udp);
5871                 break;
5872         case MLX5_FLOW_LAYER_GRE:
5873                 out_mpls_m =
5874                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5875                                                  outer_first_mpls_over_gre);
5876                 out_mpls_v =
5877                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5878                                                  outer_first_mpls_over_gre);
5879                 break;
5880         default:
5881                 /* Inner MPLS not over GRE is not supported. */
5882                 if (!inner) {
5883                         out_mpls_m =
5884                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5885                                                          misc2_m,
5886                                                          outer_first_mpls);
5887                         out_mpls_v =
5888                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5889                                                          misc2_v,
5890                                                          outer_first_mpls);
5891                 }
5892                 break;
5893         }
5894         if (out_mpls_m && out_mpls_v) {
5895                 *out_mpls_m = *in_mpls_m;
5896                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5897         }
5898 }
5899
5900 /**
5901  * Add metadata register item to matcher
5902  *
5903  * @param[in, out] matcher
5904  *   Flow matcher.
5905  * @param[in, out] key
5906  *   Flow matcher value.
5907  * @param[in] reg_type
5908  *   Type of device metadata register
5909  * @param[in] value
5910  *   Register value
5911  * @param[in] mask
5912  *   Register mask
5913  */
5914 static void
5915 flow_dv_match_meta_reg(void *matcher, void *key,
5916                        enum modify_reg reg_type,
5917                        uint32_t data, uint32_t mask)
5918 {
5919         void *misc2_m =
5920                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5921         void *misc2_v =
5922                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5923         uint32_t temp;
5924
5925         data &= mask;
5926         switch (reg_type) {
5927         case REG_A:
5928                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5929                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5930                 break;
5931         case REG_B:
5932                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5933                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5934                 break;
5935         case REG_C_0:
5936                 /*
5937                  * The metadata register C0 field might be divided into
5938                  * source vport index and META item value, we should set
5939                  * this field according to specified mask, not as whole one.
5940                  */
5941                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
5942                 temp |= mask;
5943                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
5944                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
5945                 temp &= ~mask;
5946                 temp |= data;
5947                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
5948                 break;
5949         case REG_C_1:
5950                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5951                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5952                 break;
5953         case REG_C_2:
5954                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5955                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5956                 break;
5957         case REG_C_3:
5958                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
5959                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
5960                 break;
5961         case REG_C_4:
5962                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
5963                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
5964                 break;
5965         case REG_C_5:
5966                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
5967                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
5968                 break;
5969         case REG_C_6:
5970                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
5971                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
5972                 break;
5973         case REG_C_7:
5974                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
5975                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
5976                 break;
5977         default:
5978                 assert(false);
5979                 break;
5980         }
5981 }
5982
5983 /**
5984  * Add MARK item to matcher
5985  *
5986  * @param[in] dev
5987  *   The device to configure through.
5988  * @param[in, out] matcher
5989  *   Flow matcher.
5990  * @param[in, out] key
5991  *   Flow matcher value.
5992  * @param[in] item
5993  *   Flow pattern to translate.
5994  */
5995 static void
5996 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
5997                             void *matcher, void *key,
5998                             const struct rte_flow_item *item)
5999 {
6000         struct mlx5_priv *priv = dev->data->dev_private;
6001         const struct rte_flow_item_mark *mark;
6002         uint32_t value;
6003         uint32_t mask;
6004
6005         mark = item->mask ? (const void *)item->mask :
6006                             &rte_flow_item_mark_mask;
6007         mask = mark->id & priv->sh->dv_mark_mask;
6008         mark = (const void *)item->spec;
6009         assert(mark);
6010         value = mark->id & priv->sh->dv_mark_mask & mask;
6011         if (mask) {
6012                 enum modify_reg reg;
6013
6014                 /* Get the metadata register index for the mark. */
6015                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6016                 assert(reg > 0);
6017                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6018         }
6019 }
6020
6021 /**
6022  * Add META item to matcher
6023  *
6024  * @param[in] dev
6025  *   The devich to configure through.
6026  * @param[in, out] matcher
6027  *   Flow matcher.
6028  * @param[in, out] key
6029  *   Flow matcher value.
6030  * @param[in] attr
6031  *   Attributes of flow that includes this item.
6032  * @param[in] item
6033  *   Flow pattern to translate.
6034  */
6035 static void
6036 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6037                             void *matcher, void *key,
6038                             const struct rte_flow_attr *attr,
6039                             const struct rte_flow_item *item)
6040 {
6041         const struct rte_flow_item_meta *meta_m;
6042         const struct rte_flow_item_meta *meta_v;
6043
6044         meta_m = (const void *)item->mask;
6045         if (!meta_m)
6046                 meta_m = &rte_flow_item_meta_mask;
6047         meta_v = (const void *)item->spec;
6048         if (meta_v) {
6049                 enum modify_reg reg;
6050                 uint32_t value = meta_v->data;
6051                 uint32_t mask = meta_m->data;
6052
6053                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6054                 if (reg < 0)
6055                         return;
6056                 /*
6057                  * In datapath code there is no endianness
6058                  * coversions for perfromance reasons, all
6059                  * pattern conversions are done in rte_flow.
6060                  */
6061                 value = rte_cpu_to_be_32(value);
6062                 mask = rte_cpu_to_be_32(mask);
6063                 if (reg == REG_C_0) {
6064                         struct mlx5_priv *priv = dev->data->dev_private;
6065                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6066                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6067
6068                         msk_c0 = rte_cpu_to_be_32(msk_c0);
6069                         value <<= shl_c0;
6070                         mask <<= shl_c0;
6071                         assert(msk_c0);
6072                         assert(!(~msk_c0 & mask));
6073                 }
6074                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6075         }
6076 }
6077
6078 /**
6079  * Add vport metadata Reg C0 item to matcher
6080  *
6081  * @param[in, out] matcher
6082  *   Flow matcher.
6083  * @param[in, out] key
6084  *   Flow matcher value.
6085  * @param[in] reg
6086  *   Flow pattern to translate.
6087  */
6088 static void
6089 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6090                                   uint32_t value, uint32_t mask)
6091 {
6092         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6093 }
6094
6095 /**
6096  * Add tag item to matcher
6097  *
6098  * @param[in, out] matcher
6099  *   Flow matcher.
6100  * @param[in, out] key
6101  *   Flow matcher value.
6102  * @param[in] item
6103  *   Flow pattern to translate.
6104  */
6105 static void
6106 flow_dv_translate_mlx5_item_tag(void *matcher, void *key,
6107                                 const struct rte_flow_item *item)
6108 {
6109         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6110         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6111
6112         assert(tag_v);
6113         flow_dv_match_meta_reg(matcher, key, tag_v->id, tag_v->data,
6114                                tag_m ? tag_m->data : UINT32_MAX);
6115 }
6116
6117 /**
6118  * Add TAG item to matcher
6119  *
6120  * @param[in] dev
6121  *   The devich to configure through.
6122  * @param[in, out] matcher
6123  *   Flow matcher.
6124  * @param[in, out] key
6125  *   Flow matcher value.
6126  * @param[in] item
6127  *   Flow pattern to translate.
6128  */
6129 static void
6130 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6131                            void *matcher, void *key,
6132                            const struct rte_flow_item *item)
6133 {
6134         const struct rte_flow_item_tag *tag_v = item->spec;
6135         const struct rte_flow_item_tag *tag_m = item->mask;
6136         enum modify_reg reg;
6137
6138         assert(tag_v);
6139         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6140         /* Get the metadata register index for the tag. */
6141         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6142         assert(reg > 0);
6143         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6144 }
6145
6146 /**
6147  * Add source vport match to the specified matcher.
6148  *
6149  * @param[in, out] matcher
6150  *   Flow matcher.
6151  * @param[in, out] key
6152  *   Flow matcher value.
6153  * @param[in] port
6154  *   Source vport value to match
6155  * @param[in] mask
6156  *   Mask
6157  */
6158 static void
6159 flow_dv_translate_item_source_vport(void *matcher, void *key,
6160                                     int16_t port, uint16_t mask)
6161 {
6162         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6163         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6164
6165         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6166         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6167 }
6168
6169 /**
6170  * Translate port-id item to eswitch match on  port-id.
6171  *
6172  * @param[in] dev
6173  *   The devich to configure through.
6174  * @param[in, out] matcher
6175  *   Flow matcher.
6176  * @param[in, out] key
6177  *   Flow matcher value.
6178  * @param[in] item
6179  *   Flow pattern to translate.
6180  *
6181  * @return
6182  *   0 on success, a negative errno value otherwise.
6183  */
6184 static int
6185 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6186                                void *key, const struct rte_flow_item *item)
6187 {
6188         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6189         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6190         struct mlx5_priv *priv;
6191         uint16_t mask, id;
6192
6193         mask = pid_m ? pid_m->id : 0xffff;
6194         id = pid_v ? pid_v->id : dev->data->port_id;
6195         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6196         if (!priv)
6197                 return -rte_errno;
6198         /* Translate to vport field or to metadata, depending on mode. */
6199         if (priv->vport_meta_mask)
6200                 flow_dv_translate_item_meta_vport(matcher, key,
6201                                                   priv->vport_meta_tag,
6202                                                   priv->vport_meta_mask);
6203         else
6204                 flow_dv_translate_item_source_vport(matcher, key,
6205                                                     priv->vport_id, mask);
6206         return 0;
6207 }
6208
6209 /**
6210  * Add ICMP6 item to matcher and to the value.
6211  *
6212  * @param[in, out] matcher
6213  *   Flow matcher.
6214  * @param[in, out] key
6215  *   Flow matcher value.
6216  * @param[in] item
6217  *   Flow pattern to translate.
6218  * @param[in] inner
6219  *   Item is inner pattern.
6220  */
6221 static void
6222 flow_dv_translate_item_icmp6(void *matcher, void *key,
6223                               const struct rte_flow_item *item,
6224                               int inner)
6225 {
6226         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6227         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6228         void *headers_m;
6229         void *headers_v;
6230         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6231                                      misc_parameters_3);
6232         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6233         if (inner) {
6234                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6235                                          inner_headers);
6236                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6237         } else {
6238                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6239                                          outer_headers);
6240                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6241         }
6242         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6243         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6244         if (!icmp6_v)
6245                 return;
6246         if (!icmp6_m)
6247                 icmp6_m = &rte_flow_item_icmp6_mask;
6248         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6249         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6250                  icmp6_v->type & icmp6_m->type);
6251         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6252         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6253                  icmp6_v->code & icmp6_m->code);
6254 }
6255
6256 /**
6257  * Add ICMP item to matcher and to the value.
6258  *
6259  * @param[in, out] matcher
6260  *   Flow matcher.
6261  * @param[in, out] key
6262  *   Flow matcher value.
6263  * @param[in] item
6264  *   Flow pattern to translate.
6265  * @param[in] inner
6266  *   Item is inner pattern.
6267  */
6268 static void
6269 flow_dv_translate_item_icmp(void *matcher, void *key,
6270                             const struct rte_flow_item *item,
6271                             int inner)
6272 {
6273         const struct rte_flow_item_icmp *icmp_m = item->mask;
6274         const struct rte_flow_item_icmp *icmp_v = item->spec;
6275         void *headers_m;
6276         void *headers_v;
6277         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6278                                      misc_parameters_3);
6279         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6280         if (inner) {
6281                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6282                                          inner_headers);
6283                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6284         } else {
6285                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6286                                          outer_headers);
6287                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6288         }
6289         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6290         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6291         if (!icmp_v)
6292                 return;
6293         if (!icmp_m)
6294                 icmp_m = &rte_flow_item_icmp_mask;
6295         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6296                  icmp_m->hdr.icmp_type);
6297         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6298                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6299         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6300                  icmp_m->hdr.icmp_code);
6301         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6302                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6303 }
6304
6305 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6306
6307 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6308         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6309                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6310
6311 /**
6312  * Calculate flow matcher enable bitmap.
6313  *
6314  * @param match_criteria
6315  *   Pointer to flow matcher criteria.
6316  *
6317  * @return
6318  *   Bitmap of enabled fields.
6319  */
6320 static uint8_t
6321 flow_dv_matcher_enable(uint32_t *match_criteria)
6322 {
6323         uint8_t match_criteria_enable;
6324
6325         match_criteria_enable =
6326                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6327                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6328         match_criteria_enable |=
6329                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6330                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6331         match_criteria_enable |=
6332                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6333                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6334         match_criteria_enable |=
6335                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6336                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6337         match_criteria_enable |=
6338                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6339                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6340         return match_criteria_enable;
6341 }
6342
6343
6344 /**
6345  * Get a flow table.
6346  *
6347  * @param[in, out] dev
6348  *   Pointer to rte_eth_dev structure.
6349  * @param[in] table_id
6350  *   Table id to use.
6351  * @param[in] egress
6352  *   Direction of the table.
6353  * @param[in] transfer
6354  *   E-Switch or NIC flow.
6355  * @param[out] error
6356  *   pointer to error structure.
6357  *
6358  * @return
6359  *   Returns tables resource based on the index, NULL in case of failed.
6360  */
6361 static struct mlx5_flow_tbl_resource *
6362 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6363                          uint32_t table_id, uint8_t egress,
6364                          uint8_t transfer,
6365                          struct rte_flow_error *error)
6366 {
6367         struct mlx5_priv *priv = dev->data->dev_private;
6368         struct mlx5_ibv_shared *sh = priv->sh;
6369         struct mlx5_flow_tbl_resource *tbl;
6370         union mlx5_flow_tbl_key table_key = {
6371                 {
6372                         .table_id = table_id,
6373                         .reserved = 0,
6374                         .domain = !!transfer,
6375                         .direction = !!egress,
6376                 }
6377         };
6378         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6379                                                          table_key.v64);
6380         struct mlx5_flow_tbl_data_entry *tbl_data;
6381         int ret;
6382         void *domain;
6383
6384         if (pos) {
6385                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6386                                         entry);
6387                 tbl = &tbl_data->tbl;
6388                 rte_atomic32_inc(&tbl->refcnt);
6389                 return tbl;
6390         }
6391         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6392         if (!tbl_data) {
6393                 rte_flow_error_set(error, ENOMEM,
6394                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6395                                    NULL,
6396                                    "cannot allocate flow table data entry");
6397                 return NULL;
6398         }
6399         tbl = &tbl_data->tbl;
6400         pos = &tbl_data->entry;
6401         if (transfer)
6402                 domain = sh->fdb_domain;
6403         else if (egress)
6404                 domain = sh->tx_domain;
6405         else
6406                 domain = sh->rx_domain;
6407         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6408         if (!tbl->obj) {
6409                 rte_flow_error_set(error, ENOMEM,
6410                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6411                                    NULL, "cannot create flow table object");
6412                 rte_free(tbl_data);
6413                 return NULL;
6414         }
6415         /*
6416          * No multi-threads now, but still better to initialize the reference
6417          * count before insert it into the hash list.
6418          */
6419         rte_atomic32_init(&tbl->refcnt);
6420         /* Jump action reference count is initialized here. */
6421         rte_atomic32_init(&tbl_data->jump.refcnt);
6422         pos->key = table_key.v64;
6423         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6424         if (ret < 0) {
6425                 rte_flow_error_set(error, -ret,
6426                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6427                                    "cannot insert flow table data entry");
6428                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6429                 rte_free(tbl_data);
6430         }
6431         rte_atomic32_inc(&tbl->refcnt);
6432         return tbl;
6433 }
6434
6435 /**
6436  * Release a flow table.
6437  *
6438  * @param[in] dev
6439  *   Pointer to rte_eth_dev structure.
6440  * @param[in] tbl
6441  *   Table resource to be released.
6442  *
6443  * @return
6444  *   Returns 0 if table was released, else return 1;
6445  */
6446 static int
6447 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6448                              struct mlx5_flow_tbl_resource *tbl)
6449 {
6450         struct mlx5_priv *priv = dev->data->dev_private;
6451         struct mlx5_ibv_shared *sh = priv->sh;
6452         struct mlx5_flow_tbl_data_entry *tbl_data =
6453                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6454
6455         if (!tbl)
6456                 return 0;
6457         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6458                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6459
6460                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6461                 tbl->obj = NULL;
6462                 /* remove the entry from the hash list and free memory. */
6463                 mlx5_hlist_remove(sh->flow_tbls, pos);
6464                 rte_free(tbl_data);
6465                 return 0;
6466         }
6467         return 1;
6468 }
6469
6470 /**
6471  * Register the flow matcher.
6472  *
6473  * @param[in, out] dev
6474  *   Pointer to rte_eth_dev structure.
6475  * @param[in, out] matcher
6476  *   Pointer to flow matcher.
6477  * @param[in, out] key
6478  *   Pointer to flow table key.
6479  * @parm[in, out] dev_flow
6480  *   Pointer to the dev_flow.
6481  * @param[out] error
6482  *   pointer to error structure.
6483  *
6484  * @return
6485  *   0 on success otherwise -errno and errno is set.
6486  */
6487 static int
6488 flow_dv_matcher_register(struct rte_eth_dev *dev,
6489                          struct mlx5_flow_dv_matcher *matcher,
6490                          union mlx5_flow_tbl_key *key,
6491                          struct mlx5_flow *dev_flow,
6492                          struct rte_flow_error *error)
6493 {
6494         struct mlx5_priv *priv = dev->data->dev_private;
6495         struct mlx5_ibv_shared *sh = priv->sh;
6496         struct mlx5_flow_dv_matcher *cache_matcher;
6497         struct mlx5dv_flow_matcher_attr dv_attr = {
6498                 .type = IBV_FLOW_ATTR_NORMAL,
6499                 .match_mask = (void *)&matcher->mask,
6500         };
6501         struct mlx5_flow_tbl_resource *tbl;
6502         struct mlx5_flow_tbl_data_entry *tbl_data;
6503
6504         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6505                                        key->domain, error);
6506         if (!tbl)
6507                 return -rte_errno;      /* No need to refill the error info */
6508         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6509         /* Lookup from cache. */
6510         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6511                 if (matcher->crc == cache_matcher->crc &&
6512                     matcher->priority == cache_matcher->priority &&
6513                     !memcmp((const void *)matcher->mask.buf,
6514                             (const void *)cache_matcher->mask.buf,
6515                             cache_matcher->mask.size)) {
6516                         DRV_LOG(DEBUG,
6517                                 "%s group %u priority %hd use %s "
6518                                 "matcher %p: refcnt %d++",
6519                                 key->domain ? "FDB" : "NIC", key->table_id,
6520                                 cache_matcher->priority,
6521                                 key->direction ? "tx" : "rx",
6522                                 (void *)cache_matcher,
6523                                 rte_atomic32_read(&cache_matcher->refcnt));
6524                         rte_atomic32_inc(&cache_matcher->refcnt);
6525                         dev_flow->dv.matcher = cache_matcher;
6526                         /* old matcher should not make the table ref++. */
6527                         flow_dv_tbl_resource_release(dev, tbl);
6528                         return 0;
6529                 }
6530         }
6531         /* Register new matcher. */
6532         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6533         if (!cache_matcher) {
6534                 flow_dv_tbl_resource_release(dev, tbl);
6535                 return rte_flow_error_set(error, ENOMEM,
6536                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6537                                           "cannot allocate matcher memory");
6538         }
6539         *cache_matcher = *matcher;
6540         dv_attr.match_criteria_enable =
6541                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6542         dv_attr.priority = matcher->priority;
6543         if (key->direction)
6544                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6545         cache_matcher->matcher_object =
6546                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6547         if (!cache_matcher->matcher_object) {
6548                 rte_free(cache_matcher);
6549 #ifdef HAVE_MLX5DV_DR
6550                 flow_dv_tbl_resource_release(dev, tbl);
6551 #endif
6552                 return rte_flow_error_set(error, ENOMEM,
6553                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6554                                           NULL, "cannot create matcher");
6555         }
6556         /* Save the table information */
6557         cache_matcher->tbl = tbl;
6558         rte_atomic32_init(&cache_matcher->refcnt);
6559         /* only matcher ref++, table ref++ already done above in get API. */
6560         rte_atomic32_inc(&cache_matcher->refcnt);
6561         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6562         dev_flow->dv.matcher = cache_matcher;
6563         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6564                 key->domain ? "FDB" : "NIC", key->table_id,
6565                 cache_matcher->priority,
6566                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6567                 rte_atomic32_read(&cache_matcher->refcnt));
6568         return 0;
6569 }
6570
6571 /**
6572  * Find existing tag resource or create and register a new one.
6573  *
6574  * @param dev[in, out]
6575  *   Pointer to rte_eth_dev structure.
6576  * @param[in, out] tag_be24
6577  *   Tag value in big endian then R-shift 8.
6578  * @parm[in, out] dev_flow
6579  *   Pointer to the dev_flow.
6580  * @param[out] error
6581  *   pointer to error structure.
6582  *
6583  * @return
6584  *   0 on success otherwise -errno and errno is set.
6585  */
6586 static int
6587 flow_dv_tag_resource_register
6588                         (struct rte_eth_dev *dev,
6589                          uint32_t tag_be24,
6590                          struct mlx5_flow *dev_flow,
6591                          struct rte_flow_error *error)
6592 {
6593         struct mlx5_priv *priv = dev->data->dev_private;
6594         struct mlx5_ibv_shared *sh = priv->sh;
6595         struct mlx5_flow_dv_tag_resource *cache_resource;
6596         struct mlx5_hlist_entry *entry;
6597
6598         /* Lookup a matching resource from cache. */
6599         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6600         if (entry) {
6601                 cache_resource = container_of
6602                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6603                 rte_atomic32_inc(&cache_resource->refcnt);
6604                 dev_flow->dv.tag_resource = cache_resource;
6605                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6606                         (void *)cache_resource,
6607                         rte_atomic32_read(&cache_resource->refcnt));
6608                 return 0;
6609         }
6610         /* Register new resource. */
6611         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6612         if (!cache_resource)
6613                 return rte_flow_error_set(error, ENOMEM,
6614                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6615                                           "cannot allocate resource memory");
6616         cache_resource->entry.key = (uint64_t)tag_be24;
6617         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6618         if (!cache_resource->action) {
6619                 rte_free(cache_resource);
6620                 return rte_flow_error_set(error, ENOMEM,
6621                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6622                                           NULL, "cannot create action");
6623         }
6624         rte_atomic32_init(&cache_resource->refcnt);
6625         rte_atomic32_inc(&cache_resource->refcnt);
6626         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6627                 mlx5_glue->destroy_flow_action(cache_resource->action);
6628                 rte_free(cache_resource);
6629                 return rte_flow_error_set(error, EEXIST,
6630                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6631                                           NULL, "cannot insert tag");
6632         }
6633         dev_flow->dv.tag_resource = cache_resource;
6634         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6635                 (void *)cache_resource,
6636                 rte_atomic32_read(&cache_resource->refcnt));
6637         return 0;
6638 }
6639
6640 /**
6641  * Release the tag.
6642  *
6643  * @param dev
6644  *   Pointer to Ethernet device.
6645  * @param flow
6646  *   Pointer to mlx5_flow.
6647  *
6648  * @return
6649  *   1 while a reference on it exists, 0 when freed.
6650  */
6651 static int
6652 flow_dv_tag_release(struct rte_eth_dev *dev,
6653                     struct mlx5_flow_dv_tag_resource *tag)
6654 {
6655         struct mlx5_priv *priv = dev->data->dev_private;
6656         struct mlx5_ibv_shared *sh = priv->sh;
6657
6658         assert(tag);
6659         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6660                 dev->data->port_id, (void *)tag,
6661                 rte_atomic32_read(&tag->refcnt));
6662         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6663                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6664                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6665                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6666                         dev->data->port_id, (void *)tag);
6667                 rte_free(tag);
6668                 return 0;
6669         }
6670         return 1;
6671 }
6672
6673 /**
6674  * Translate port ID action to vport.
6675  *
6676  * @param[in] dev
6677  *   Pointer to rte_eth_dev structure.
6678  * @param[in] action
6679  *   Pointer to the port ID action.
6680  * @param[out] dst_port_id
6681  *   The target port ID.
6682  * @param[out] error
6683  *   Pointer to the error structure.
6684  *
6685  * @return
6686  *   0 on success, a negative errno value otherwise and rte_errno is set.
6687  */
6688 static int
6689 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6690                                  const struct rte_flow_action *action,
6691                                  uint32_t *dst_port_id,
6692                                  struct rte_flow_error *error)
6693 {
6694         uint32_t port;
6695         struct mlx5_priv *priv;
6696         const struct rte_flow_action_port_id *conf =
6697                         (const struct rte_flow_action_port_id *)action->conf;
6698
6699         port = conf->original ? dev->data->port_id : conf->id;
6700         priv = mlx5_port_to_eswitch_info(port, false);
6701         if (!priv)
6702                 return rte_flow_error_set(error, -rte_errno,
6703                                           RTE_FLOW_ERROR_TYPE_ACTION,
6704                                           NULL,
6705                                           "No eswitch info was found for port");
6706 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6707         /*
6708          * This parameter is transferred to
6709          * mlx5dv_dr_action_create_dest_ib_port().
6710          */
6711         *dst_port_id = priv->ibv_port;
6712 #else
6713         /*
6714          * Legacy mode, no LAG configurations is supported.
6715          * This parameter is transferred to
6716          * mlx5dv_dr_action_create_dest_vport().
6717          */
6718         *dst_port_id = priv->vport_id;
6719 #endif
6720         return 0;
6721 }
6722
6723 /**
6724  * Add Tx queue matcher
6725  *
6726  * @param[in] dev
6727  *   Pointer to the dev struct.
6728  * @param[in, out] matcher
6729  *   Flow matcher.
6730  * @param[in, out] key
6731  *   Flow matcher value.
6732  * @param[in] item
6733  *   Flow pattern to translate.
6734  * @param[in] inner
6735  *   Item is inner pattern.
6736  */
6737 static void
6738 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6739                                 void *matcher, void *key,
6740                                 const struct rte_flow_item *item)
6741 {
6742         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6743         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6744         void *misc_m =
6745                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6746         void *misc_v =
6747                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6748         struct mlx5_txq_ctrl *txq;
6749         uint32_t queue;
6750
6751
6752         queue_m = (const void *)item->mask;
6753         if (!queue_m)
6754                 return;
6755         queue_v = (const void *)item->spec;
6756         if (!queue_v)
6757                 return;
6758         txq = mlx5_txq_get(dev, queue_v->queue);
6759         if (!txq)
6760                 return;
6761         queue = txq->obj->sq->id;
6762         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6763         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6764                  queue & queue_m->queue);
6765         mlx5_txq_release(dev, queue_v->queue);
6766 }
6767
6768 /**
6769  * Set the hash fields according to the @p flow information.
6770  *
6771  * @param[in] dev_flow
6772  *   Pointer to the mlx5_flow.
6773  */
6774 static void
6775 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
6776 {
6777         struct rte_flow *flow = dev_flow->flow;
6778         uint64_t items = dev_flow->layers;
6779         int rss_inner = 0;
6780         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
6781
6782         dev_flow->hash_fields = 0;
6783 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
6784         if (flow->rss.level >= 2) {
6785                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
6786                 rss_inner = 1;
6787         }
6788 #endif
6789         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
6790             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
6791                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
6792                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6793                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
6794                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6795                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
6796                         else
6797                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
6798                 }
6799         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
6800                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
6801                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
6802                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
6803                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
6804                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
6805                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
6806                         else
6807                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
6808                 }
6809         }
6810         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
6811             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
6812                 if (rss_types & ETH_RSS_UDP) {
6813                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6814                                 dev_flow->hash_fields |=
6815                                                 IBV_RX_HASH_SRC_PORT_UDP;
6816                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6817                                 dev_flow->hash_fields |=
6818                                                 IBV_RX_HASH_DST_PORT_UDP;
6819                         else
6820                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
6821                 }
6822         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
6823                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
6824                 if (rss_types & ETH_RSS_TCP) {
6825                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
6826                                 dev_flow->hash_fields |=
6827                                                 IBV_RX_HASH_SRC_PORT_TCP;
6828                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
6829                                 dev_flow->hash_fields |=
6830                                                 IBV_RX_HASH_DST_PORT_TCP;
6831                         else
6832                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
6833                 }
6834         }
6835 }
6836
6837 /**
6838  * Fill the flow with DV spec, lock free
6839  * (mutex should be acquired by caller).
6840  *
6841  * @param[in] dev
6842  *   Pointer to rte_eth_dev structure.
6843  * @param[in, out] dev_flow
6844  *   Pointer to the sub flow.
6845  * @param[in] attr
6846  *   Pointer to the flow attributes.
6847  * @param[in] items
6848  *   Pointer to the list of items.
6849  * @param[in] actions
6850  *   Pointer to the list of actions.
6851  * @param[out] error
6852  *   Pointer to the error structure.
6853  *
6854  * @return
6855  *   0 on success, a negative errno value otherwise and rte_errno is set.
6856  */
6857 static int
6858 __flow_dv_translate(struct rte_eth_dev *dev,
6859                     struct mlx5_flow *dev_flow,
6860                     const struct rte_flow_attr *attr,
6861                     const struct rte_flow_item items[],
6862                     const struct rte_flow_action actions[],
6863                     struct rte_flow_error *error)
6864 {
6865         struct mlx5_priv *priv = dev->data->dev_private;
6866         struct mlx5_dev_config *dev_conf = &priv->config;
6867         struct rte_flow *flow = dev_flow->flow;
6868         uint64_t item_flags = 0;
6869         uint64_t last_item = 0;
6870         uint64_t action_flags = 0;
6871         uint64_t priority = attr->priority;
6872         struct mlx5_flow_dv_matcher matcher = {
6873                 .mask = {
6874                         .size = sizeof(matcher.mask.buf),
6875                 },
6876         };
6877         int actions_n = 0;
6878         bool actions_end = false;
6879         struct mlx5_flow_dv_modify_hdr_resource mhdr_res = {
6880                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
6881                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
6882         };
6883         union flow_dv_attr flow_attr = { .attr = 0 };
6884         uint32_t tag_be;
6885         union mlx5_flow_tbl_key tbl_key;
6886         uint32_t modify_action_position = UINT32_MAX;
6887         void *match_mask = matcher.mask.buf;
6888         void *match_value = dev_flow->dv.value.buf;
6889         uint8_t next_protocol = 0xff;
6890         struct rte_vlan_hdr vlan = { 0 };
6891         uint32_t table;
6892         int ret = 0;
6893
6894         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
6895                                        &table, error);
6896         if (ret)
6897                 return ret;
6898         dev_flow->group = table;
6899         if (attr->transfer)
6900                 mhdr_res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
6901         if (priority == MLX5_FLOW_PRIO_RSVD)
6902                 priority = dev_conf->flow_prio - 1;
6903         for (; !actions_end ; actions++) {
6904                 const struct rte_flow_action_queue *queue;
6905                 const struct rte_flow_action_rss *rss;
6906                 const struct rte_flow_action *action = actions;
6907                 const struct rte_flow_action_count *count = action->conf;
6908                 const uint8_t *rss_key;
6909                 const struct rte_flow_action_jump *jump_data;
6910                 const struct rte_flow_action_meter *mtr;
6911                 struct mlx5_flow_tbl_resource *tbl;
6912                 uint32_t port_id = 0;
6913                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
6914                 int action_type = actions->type;
6915                 const struct rte_flow_action *found_action = NULL;
6916
6917                 switch (action_type) {
6918                 case RTE_FLOW_ACTION_TYPE_VOID:
6919                         break;
6920                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
6921                         if (flow_dv_translate_action_port_id(dev, action,
6922                                                              &port_id, error))
6923                                 return -rte_errno;
6924                         port_id_resource.port_id = port_id;
6925                         if (flow_dv_port_id_action_resource_register
6926                             (dev, &port_id_resource, dev_flow, error))
6927                                 return -rte_errno;
6928                         dev_flow->dv.actions[actions_n++] =
6929                                 dev_flow->dv.port_id_action->action;
6930                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
6931                         break;
6932                 case RTE_FLOW_ACTION_TYPE_FLAG:
6933                         action_flags |= MLX5_FLOW_ACTION_FLAG;
6934                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6935                                 struct rte_flow_action_mark mark = {
6936                                         .id = MLX5_FLOW_MARK_DEFAULT,
6937                                 };
6938
6939                                 if (flow_dv_convert_action_mark(dev, &mark,
6940                                                                 &mhdr_res,
6941                                                                 error))
6942                                         return -rte_errno;
6943                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6944                                 break;
6945                         }
6946                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
6947                         if (!dev_flow->dv.tag_resource)
6948                                 if (flow_dv_tag_resource_register
6949                                     (dev, tag_be, dev_flow, error))
6950                                         return -rte_errno;
6951                         dev_flow->dv.actions[actions_n++] =
6952                                 dev_flow->dv.tag_resource->action;
6953                         break;
6954                 case RTE_FLOW_ACTION_TYPE_MARK:
6955                         action_flags |= MLX5_FLOW_ACTION_MARK;
6956                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6957                                 const struct rte_flow_action_mark *mark =
6958                                         (const struct rte_flow_action_mark *)
6959                                                 actions->conf;
6960
6961                                 if (flow_dv_convert_action_mark(dev, mark,
6962                                                                 &mhdr_res,
6963                                                                 error))
6964                                         return -rte_errno;
6965                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6966                                 break;
6967                         }
6968                         /* Fall-through */
6969                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
6970                         /* Legacy (non-extensive) MARK action. */
6971                         tag_be = mlx5_flow_mark_set
6972                               (((const struct rte_flow_action_mark *)
6973                                (actions->conf))->id);
6974                         if (!dev_flow->dv.tag_resource)
6975                                 if (flow_dv_tag_resource_register
6976                                     (dev, tag_be, dev_flow, error))
6977                                         return -rte_errno;
6978                         dev_flow->dv.actions[actions_n++] =
6979                                 dev_flow->dv.tag_resource->action;
6980                         break;
6981                 case RTE_FLOW_ACTION_TYPE_SET_META:
6982                         if (flow_dv_convert_action_set_meta
6983                                 (dev, &mhdr_res, attr,
6984                                  (const struct rte_flow_action_set_meta *)
6985                                   actions->conf, error))
6986                                 return -rte_errno;
6987                         action_flags |= MLX5_FLOW_ACTION_SET_META;
6988                         break;
6989                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
6990                         if (flow_dv_convert_action_set_tag
6991                                 (dev, &mhdr_res,
6992                                  (const struct rte_flow_action_set_tag *)
6993                                   actions->conf, error))
6994                                 return -rte_errno;
6995                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6996                         break;
6997                 case RTE_FLOW_ACTION_TYPE_DROP:
6998                         action_flags |= MLX5_FLOW_ACTION_DROP;
6999                         break;
7000                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7001                         assert(flow->rss.queue);
7002                         queue = actions->conf;
7003                         flow->rss.queue_num = 1;
7004                         (*flow->rss.queue)[0] = queue->index;
7005                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7006                         break;
7007                 case RTE_FLOW_ACTION_TYPE_RSS:
7008                         assert(flow->rss.queue);
7009                         rss = actions->conf;
7010                         if (flow->rss.queue)
7011                                 memcpy((*flow->rss.queue), rss->queue,
7012                                        rss->queue_num * sizeof(uint16_t));
7013                         flow->rss.queue_num = rss->queue_num;
7014                         /* NULL RSS key indicates default RSS key. */
7015                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7016                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7017                         /*
7018                          * rss->level and rss.types should be set in advance
7019                          * when expanding items for RSS.
7020                          */
7021                         action_flags |= MLX5_FLOW_ACTION_RSS;
7022                         break;
7023                 case RTE_FLOW_ACTION_TYPE_COUNT:
7024                         if (!dev_conf->devx) {
7025                                 rte_errno = ENOTSUP;
7026                                 goto cnt_err;
7027                         }
7028                         flow->counter = flow_dv_counter_alloc(dev,
7029                                                               count->shared,
7030                                                               count->id,
7031                                                               dev_flow->group);
7032                         if (flow->counter == NULL)
7033                                 goto cnt_err;
7034                         dev_flow->dv.actions[actions_n++] =
7035                                 flow->counter->action;
7036                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7037                         break;
7038 cnt_err:
7039                         if (rte_errno == ENOTSUP)
7040                                 return rte_flow_error_set
7041                                               (error, ENOTSUP,
7042                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7043                                                NULL,
7044                                                "count action not supported");
7045                         else
7046                                 return rte_flow_error_set
7047                                                 (error, rte_errno,
7048                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7049                                                  action,
7050                                                  "cannot create counter"
7051                                                   " object.");
7052                         break;
7053                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7054                         dev_flow->dv.actions[actions_n++] =
7055                                                 priv->sh->pop_vlan_action;
7056                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7057                         break;
7058                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7059                         flow_dev_get_vlan_info_from_items(items, &vlan);
7060                         vlan.eth_proto = rte_be_to_cpu_16
7061                              ((((const struct rte_flow_action_of_push_vlan *)
7062                                                    actions->conf)->ethertype));
7063                         found_action = mlx5_flow_find_action
7064                                         (actions + 1,
7065                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7066                         if (found_action)
7067                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7068                         found_action = mlx5_flow_find_action
7069                                         (actions + 1,
7070                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7071                         if (found_action)
7072                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7073                         if (flow_dv_create_action_push_vlan
7074                                             (dev, attr, &vlan, dev_flow, error))
7075                                 return -rte_errno;
7076                         dev_flow->dv.actions[actions_n++] =
7077                                            dev_flow->dv.push_vlan_res->action;
7078                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7079                         break;
7080                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7081                         /* of_vlan_push action handled this action */
7082                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7083                         break;
7084                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7085                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7086                                 break;
7087                         flow_dev_get_vlan_info_from_items(items, &vlan);
7088                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7089                         /* If no VLAN push - this is a modify header action */
7090                         if (flow_dv_convert_action_modify_vlan_vid
7091                                                 (&mhdr_res, actions, error))
7092                                 return -rte_errno;
7093                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7094                         break;
7095                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7096                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7097                         if (flow_dv_create_action_l2_encap(dev, actions,
7098                                                            dev_flow,
7099                                                            attr->transfer,
7100                                                            error))
7101                                 return -rte_errno;
7102                         dev_flow->dv.actions[actions_n++] =
7103                                 dev_flow->dv.encap_decap->verbs_action;
7104                         action_flags |= actions->type ==
7105                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
7106                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
7107                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
7108                         break;
7109                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7110                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7111                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7112                                                            attr->transfer,
7113                                                            error))
7114                                 return -rte_errno;
7115                         dev_flow->dv.actions[actions_n++] =
7116                                 dev_flow->dv.encap_decap->verbs_action;
7117                         action_flags |= actions->type ==
7118                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
7119                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
7120                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
7121                         break;
7122                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7123                         /* Handle encap with preceding decap. */
7124                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
7125                                 if (flow_dv_create_action_raw_encap
7126                                         (dev, actions, dev_flow, attr, error))
7127                                         return -rte_errno;
7128                                 dev_flow->dv.actions[actions_n++] =
7129                                         dev_flow->dv.encap_decap->verbs_action;
7130                         } else {
7131                                 /* Handle encap without preceding decap. */
7132                                 if (flow_dv_create_action_l2_encap
7133                                     (dev, actions, dev_flow, attr->transfer,
7134                                      error))
7135                                         return -rte_errno;
7136                                 dev_flow->dv.actions[actions_n++] =
7137                                         dev_flow->dv.encap_decap->verbs_action;
7138                         }
7139                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
7140                         break;
7141                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7142                         /* Check if this decap is followed by encap. */
7143                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
7144                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
7145                                action++) {
7146                         }
7147                         /* Handle decap only if it isn't followed by encap. */
7148                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7149                                 if (flow_dv_create_action_l2_decap
7150                                     (dev, dev_flow, attr->transfer, error))
7151                                         return -rte_errno;
7152                                 dev_flow->dv.actions[actions_n++] =
7153                                         dev_flow->dv.encap_decap->verbs_action;
7154                         }
7155                         /* If decap is followed by encap, handle it at encap. */
7156                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
7157                         break;
7158                 case RTE_FLOW_ACTION_TYPE_JUMP:
7159                         jump_data = action->conf;
7160                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7161                                                        jump_data->group, &table,
7162                                                        error);
7163                         if (ret)
7164                                 return ret;
7165                         tbl = flow_dv_tbl_resource_get(dev, table,
7166                                                        attr->egress,
7167                                                        attr->transfer, error);
7168                         if (!tbl)
7169                                 return rte_flow_error_set
7170                                                 (error, errno,
7171                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7172                                                  NULL,
7173                                                  "cannot create jump action.");
7174                         if (flow_dv_jump_tbl_resource_register
7175                             (dev, tbl, dev_flow, error)) {
7176                                 flow_dv_tbl_resource_release(dev, tbl);
7177                                 return rte_flow_error_set
7178                                                 (error, errno,
7179                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7180                                                  NULL,
7181                                                  "cannot create jump action.");
7182                         }
7183                         dev_flow->dv.actions[actions_n++] =
7184                                 dev_flow->dv.jump->action;
7185                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7186                         break;
7187                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7188                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7189                         if (flow_dv_convert_action_modify_mac
7190                                         (&mhdr_res, actions, error))
7191                                 return -rte_errno;
7192                         action_flags |= actions->type ==
7193                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7194                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7195                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7196                         break;
7197                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7198                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7199                         if (flow_dv_convert_action_modify_ipv4
7200                                         (&mhdr_res, actions, error))
7201                                 return -rte_errno;
7202                         action_flags |= actions->type ==
7203                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7204                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7205                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7206                         break;
7207                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7208                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7209                         if (flow_dv_convert_action_modify_ipv6
7210                                         (&mhdr_res, actions, error))
7211                                 return -rte_errno;
7212                         action_flags |= actions->type ==
7213                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7214                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7215                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7216                         break;
7217                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7218                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7219                         if (flow_dv_convert_action_modify_tp
7220                                         (&mhdr_res, actions, items,
7221                                          &flow_attr, error))
7222                                 return -rte_errno;
7223                         action_flags |= actions->type ==
7224                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7225                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7226                                         MLX5_FLOW_ACTION_SET_TP_DST;
7227                         break;
7228                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7229                         if (flow_dv_convert_action_modify_dec_ttl
7230                                         (&mhdr_res, items, &flow_attr, error))
7231                                 return -rte_errno;
7232                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7233                         break;
7234                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7235                         if (flow_dv_convert_action_modify_ttl
7236                                         (&mhdr_res, actions, items,
7237                                          &flow_attr, error))
7238                                 return -rte_errno;
7239                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7240                         break;
7241                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7242                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7243                         if (flow_dv_convert_action_modify_tcp_seq
7244                                         (&mhdr_res, actions, error))
7245                                 return -rte_errno;
7246                         action_flags |= actions->type ==
7247                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7248                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7249                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7250                         break;
7251
7252                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7253                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7254                         if (flow_dv_convert_action_modify_tcp_ack
7255                                         (&mhdr_res, actions, error))
7256                                 return -rte_errno;
7257                         action_flags |= actions->type ==
7258                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7259                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7260                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7261                         break;
7262                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7263                         if (flow_dv_convert_action_set_reg
7264                                         (&mhdr_res, actions, error))
7265                                 return -rte_errno;
7266                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7267                         break;
7268                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7269                         if (flow_dv_convert_action_copy_mreg
7270                                         (dev, &mhdr_res, actions, error))
7271                                 return -rte_errno;
7272                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7273                         break;
7274                 case RTE_FLOW_ACTION_TYPE_METER:
7275                         mtr = actions->conf;
7276                         if (!flow->meter) {
7277                                 flow->meter = mlx5_flow_meter_attach(priv,
7278                                                         mtr->mtr_id, attr,
7279                                                         error);
7280                                 if (!flow->meter)
7281                                         return rte_flow_error_set(error,
7282                                                 rte_errno,
7283                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7284                                                 NULL,
7285                                                 "meter not found "
7286                                                 "or invalid parameters");
7287                         }
7288                         /* Set the meter action. */
7289                         dev_flow->dv.actions[actions_n++] =
7290                                 flow->meter->mfts->meter_action;
7291                         action_flags |= MLX5_FLOW_ACTION_METER;
7292                         break;
7293                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7294                         if (flow_dv_convert_action_modify_ipv4_dscp(&mhdr_res,
7295                                                               actions, error))
7296                                 return -rte_errno;
7297                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7298                         break;
7299                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7300                         if (flow_dv_convert_action_modify_ipv6_dscp(&mhdr_res,
7301                                                               actions, error))
7302                                 return -rte_errno;
7303                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7304                         break;
7305                 case RTE_FLOW_ACTION_TYPE_END:
7306                         actions_end = true;
7307                         if (mhdr_res.actions_num) {
7308                                 /* create modify action if needed. */
7309                                 if (flow_dv_modify_hdr_resource_register
7310                                         (dev, &mhdr_res, dev_flow, error))
7311                                         return -rte_errno;
7312                                 dev_flow->dv.actions[modify_action_position] =
7313                                         dev_flow->dv.modify_hdr->verbs_action;
7314                         }
7315                         break;
7316                 default:
7317                         break;
7318                 }
7319                 if (mhdr_res.actions_num &&
7320                     modify_action_position == UINT32_MAX)
7321                         modify_action_position = actions_n++;
7322         }
7323         dev_flow->dv.actions_n = actions_n;
7324         dev_flow->actions = action_flags;
7325         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7326                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7327                 int item_type = items->type;
7328
7329                 switch (item_type) {
7330                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7331                         flow_dv_translate_item_port_id(dev, match_mask,
7332                                                        match_value, items);
7333                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7334                         break;
7335                 case RTE_FLOW_ITEM_TYPE_ETH:
7336                         flow_dv_translate_item_eth(match_mask, match_value,
7337                                                    items, tunnel);
7338                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7339                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7340                                              MLX5_FLOW_LAYER_OUTER_L2;
7341                         break;
7342                 case RTE_FLOW_ITEM_TYPE_VLAN:
7343                         flow_dv_translate_item_vlan(dev_flow,
7344                                                     match_mask, match_value,
7345                                                     items, tunnel);
7346                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7347                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7348                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7349                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7350                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7351                         break;
7352                 case RTE_FLOW_ITEM_TYPE_IPV4:
7353                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7354                                                   &item_flags, &tunnel);
7355                         flow_dv_translate_item_ipv4(match_mask, match_value,
7356                                                     items, tunnel,
7357                                                     dev_flow->group);
7358                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7359                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7360                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7361                         if (items->mask != NULL &&
7362                             ((const struct rte_flow_item_ipv4 *)
7363                              items->mask)->hdr.next_proto_id) {
7364                                 next_protocol =
7365                                         ((const struct rte_flow_item_ipv4 *)
7366                                          (items->spec))->hdr.next_proto_id;
7367                                 next_protocol &=
7368                                         ((const struct rte_flow_item_ipv4 *)
7369                                          (items->mask))->hdr.next_proto_id;
7370                         } else {
7371                                 /* Reset for inner layer. */
7372                                 next_protocol = 0xff;
7373                         }
7374                         break;
7375                 case RTE_FLOW_ITEM_TYPE_IPV6:
7376                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7377                                                   &item_flags, &tunnel);
7378                         flow_dv_translate_item_ipv6(match_mask, match_value,
7379                                                     items, tunnel,
7380                                                     dev_flow->group);
7381                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7382                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7383                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7384                         if (items->mask != NULL &&
7385                             ((const struct rte_flow_item_ipv6 *)
7386                              items->mask)->hdr.proto) {
7387                                 next_protocol =
7388                                         ((const struct rte_flow_item_ipv6 *)
7389                                          items->spec)->hdr.proto;
7390                                 next_protocol &=
7391                                         ((const struct rte_flow_item_ipv6 *)
7392                                          items->mask)->hdr.proto;
7393                         } else {
7394                                 /* Reset for inner layer. */
7395                                 next_protocol = 0xff;
7396                         }
7397                         break;
7398                 case RTE_FLOW_ITEM_TYPE_TCP:
7399                         flow_dv_translate_item_tcp(match_mask, match_value,
7400                                                    items, tunnel);
7401                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7402                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7403                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7404                         break;
7405                 case RTE_FLOW_ITEM_TYPE_UDP:
7406                         flow_dv_translate_item_udp(match_mask, match_value,
7407                                                    items, tunnel);
7408                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7409                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7410                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7411                         break;
7412                 case RTE_FLOW_ITEM_TYPE_GRE:
7413                         flow_dv_translate_item_gre(match_mask, match_value,
7414                                                    items, tunnel);
7415                         last_item = MLX5_FLOW_LAYER_GRE;
7416                         break;
7417                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7418                         flow_dv_translate_item_gre_key(match_mask,
7419                                                        match_value, items);
7420                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7421                         break;
7422                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7423                         flow_dv_translate_item_nvgre(match_mask, match_value,
7424                                                      items, tunnel);
7425                         last_item = MLX5_FLOW_LAYER_GRE;
7426                         break;
7427                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7428                         flow_dv_translate_item_vxlan(match_mask, match_value,
7429                                                      items, tunnel);
7430                         last_item = MLX5_FLOW_LAYER_VXLAN;
7431                         break;
7432                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7433                         flow_dv_translate_item_vxlan(match_mask, match_value,
7434                                                      items, tunnel);
7435                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7436                         break;
7437                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7438                         flow_dv_translate_item_geneve(match_mask, match_value,
7439                                                       items, tunnel);
7440                         last_item = MLX5_FLOW_LAYER_GENEVE;
7441                         break;
7442                 case RTE_FLOW_ITEM_TYPE_MPLS:
7443                         flow_dv_translate_item_mpls(match_mask, match_value,
7444                                                     items, last_item, tunnel);
7445                         last_item = MLX5_FLOW_LAYER_MPLS;
7446                         break;
7447                 case RTE_FLOW_ITEM_TYPE_MARK:
7448                         flow_dv_translate_item_mark(dev, match_mask,
7449                                                     match_value, items);
7450                         last_item = MLX5_FLOW_ITEM_MARK;
7451                         break;
7452                 case RTE_FLOW_ITEM_TYPE_META:
7453                         flow_dv_translate_item_meta(dev, match_mask,
7454                                                     match_value, attr, items);
7455                         last_item = MLX5_FLOW_ITEM_METADATA;
7456                         break;
7457                 case RTE_FLOW_ITEM_TYPE_ICMP:
7458                         flow_dv_translate_item_icmp(match_mask, match_value,
7459                                                     items, tunnel);
7460                         last_item = MLX5_FLOW_LAYER_ICMP;
7461                         break;
7462                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7463                         flow_dv_translate_item_icmp6(match_mask, match_value,
7464                                                       items, tunnel);
7465                         last_item = MLX5_FLOW_LAYER_ICMP6;
7466                         break;
7467                 case RTE_FLOW_ITEM_TYPE_TAG:
7468                         flow_dv_translate_item_tag(dev, match_mask,
7469                                                    match_value, items);
7470                         last_item = MLX5_FLOW_ITEM_TAG;
7471                         break;
7472                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7473                         flow_dv_translate_mlx5_item_tag(match_mask,
7474                                                         match_value, items);
7475                         last_item = MLX5_FLOW_ITEM_TAG;
7476                         break;
7477                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7478                         flow_dv_translate_item_tx_queue(dev, match_mask,
7479                                                         match_value,
7480                                                         items);
7481                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7482                         break;
7483                 default:
7484                         break;
7485                 }
7486                 item_flags |= last_item;
7487         }
7488         /*
7489          * In case of ingress traffic when E-Switch mode is enabled,
7490          * we have two cases where we need to set the source port manually.
7491          * The first one, is in case of Nic steering rule, and the second is
7492          * E-Switch rule where no port_id item was found. In both cases
7493          * the source port is set according the current port in use.
7494          */
7495         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7496             (priv->representor || priv->master)) {
7497                 if (flow_dv_translate_item_port_id(dev, match_mask,
7498                                                    match_value, NULL))
7499                         return -rte_errno;
7500         }
7501         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7502                                          dev_flow->dv.value.buf));
7503         dev_flow->layers = item_flags;
7504         if (action_flags & MLX5_FLOW_ACTION_RSS)
7505                 flow_dv_hashfields_set(dev_flow);
7506         /* Register matcher. */
7507         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7508                                     matcher.mask.size);
7509         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7510                                                      matcher.priority);
7511         /* reserved field no needs to be set to 0 here. */
7512         tbl_key.domain = attr->transfer;
7513         tbl_key.direction = attr->egress;
7514         tbl_key.table_id = dev_flow->group;
7515         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7516                 return -rte_errno;
7517         return 0;
7518 }
7519
7520 /**
7521  * Apply the flow to the NIC, lock free,
7522  * (mutex should be acquired by caller).
7523  *
7524  * @param[in] dev
7525  *   Pointer to the Ethernet device structure.
7526  * @param[in, out] flow
7527  *   Pointer to flow structure.
7528  * @param[out] error
7529  *   Pointer to error structure.
7530  *
7531  * @return
7532  *   0 on success, a negative errno value otherwise and rte_errno is set.
7533  */
7534 static int
7535 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7536                 struct rte_flow_error *error)
7537 {
7538         struct mlx5_flow_dv *dv;
7539         struct mlx5_flow *dev_flow;
7540         struct mlx5_priv *priv = dev->data->dev_private;
7541         int n;
7542         int err;
7543
7544         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7545                 dv = &dev_flow->dv;
7546                 n = dv->actions_n;
7547                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7548                         if (dev_flow->transfer) {
7549                                 dv->actions[n++] = priv->sh->esw_drop_action;
7550                         } else {
7551                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7552                                 if (!dv->hrxq) {
7553                                         rte_flow_error_set
7554                                                 (error, errno,
7555                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7556                                                  NULL,
7557                                                  "cannot get drop hash queue");
7558                                         goto error;
7559                                 }
7560                                 dv->actions[n++] = dv->hrxq->action;
7561                         }
7562                 } else if (dev_flow->actions &
7563                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7564                         struct mlx5_hrxq *hrxq;
7565
7566                         assert(flow->rss.queue);
7567                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7568                                              MLX5_RSS_HASH_KEY_LEN,
7569                                              dev_flow->hash_fields,
7570                                              (*flow->rss.queue),
7571                                              flow->rss.queue_num);
7572                         if (!hrxq) {
7573                                 hrxq = mlx5_hrxq_new
7574                                         (dev, flow->rss.key,
7575                                          MLX5_RSS_HASH_KEY_LEN,
7576                                          dev_flow->hash_fields,
7577                                          (*flow->rss.queue),
7578                                          flow->rss.queue_num,
7579                                          !!(dev_flow->layers &
7580                                             MLX5_FLOW_LAYER_TUNNEL));
7581                         }
7582                         if (!hrxq) {
7583                                 rte_flow_error_set
7584                                         (error, rte_errno,
7585                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7586                                          "cannot get hash queue");
7587                                 goto error;
7588                         }
7589                         dv->hrxq = hrxq;
7590                         dv->actions[n++] = dv->hrxq->action;
7591                 }
7592                 dv->flow =
7593                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7594                                                   (void *)&dv->value, n,
7595                                                   dv->actions);
7596                 if (!dv->flow) {
7597                         rte_flow_error_set(error, errno,
7598                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7599                                            NULL,
7600                                            "hardware refuses to create flow");
7601                         goto error;
7602                 }
7603                 if (priv->vmwa_context &&
7604                     dev_flow->dv.vf_vlan.tag &&
7605                     !dev_flow->dv.vf_vlan.created) {
7606                         /*
7607                          * The rule contains the VLAN pattern.
7608                          * For VF we are going to create VLAN
7609                          * interface to make hypervisor set correct
7610                          * e-Switch vport context.
7611                          */
7612                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7613                 }
7614         }
7615         return 0;
7616 error:
7617         err = rte_errno; /* Save rte_errno before cleanup. */
7618         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7619                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7620                 if (dv->hrxq) {
7621                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7622                                 mlx5_hrxq_drop_release(dev);
7623                         else
7624                                 mlx5_hrxq_release(dev, dv->hrxq);
7625                         dv->hrxq = NULL;
7626                 }
7627                 if (dev_flow->dv.vf_vlan.tag &&
7628                     dev_flow->dv.vf_vlan.created)
7629                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7630         }
7631         rte_errno = err; /* Restore rte_errno. */
7632         return -rte_errno;
7633 }
7634
7635 /**
7636  * Release the flow matcher.
7637  *
7638  * @param dev
7639  *   Pointer to Ethernet device.
7640  * @param flow
7641  *   Pointer to mlx5_flow.
7642  *
7643  * @return
7644  *   1 while a reference on it exists, 0 when freed.
7645  */
7646 static int
7647 flow_dv_matcher_release(struct rte_eth_dev *dev,
7648                         struct mlx5_flow *flow)
7649 {
7650         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7651
7652         assert(matcher->matcher_object);
7653         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7654                 dev->data->port_id, (void *)matcher,
7655                 rte_atomic32_read(&matcher->refcnt));
7656         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7657                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7658                            (matcher->matcher_object));
7659                 LIST_REMOVE(matcher, next);
7660                 /* table ref-- in release interface. */
7661                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7662                 rte_free(matcher);
7663                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7664                         dev->data->port_id, (void *)matcher);
7665                 return 0;
7666         }
7667         return 1;
7668 }
7669
7670 /**
7671  * Release an encap/decap resource.
7672  *
7673  * @param flow
7674  *   Pointer to mlx5_flow.
7675  *
7676  * @return
7677  *   1 while a reference on it exists, 0 when freed.
7678  */
7679 static int
7680 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7681 {
7682         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7683                                                 flow->dv.encap_decap;
7684
7685         assert(cache_resource->verbs_action);
7686         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7687                 (void *)cache_resource,
7688                 rte_atomic32_read(&cache_resource->refcnt));
7689         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7690                 claim_zero(mlx5_glue->destroy_flow_action
7691                                 (cache_resource->verbs_action));
7692                 LIST_REMOVE(cache_resource, next);
7693                 rte_free(cache_resource);
7694                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7695                         (void *)cache_resource);
7696                 return 0;
7697         }
7698         return 1;
7699 }
7700
7701 /**
7702  * Release an jump to table action resource.
7703  *
7704  * @param dev
7705  *   Pointer to Ethernet device.
7706  * @param flow
7707  *   Pointer to mlx5_flow.
7708  *
7709  * @return
7710  *   1 while a reference on it exists, 0 when freed.
7711  */
7712 static int
7713 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
7714                                   struct mlx5_flow *flow)
7715 {
7716         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
7717         struct mlx5_flow_tbl_data_entry *tbl_data =
7718                         container_of(cache_resource,
7719                                      struct mlx5_flow_tbl_data_entry, jump);
7720
7721         assert(cache_resource->action);
7722         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7723                 (void *)cache_resource,
7724                 rte_atomic32_read(&cache_resource->refcnt));
7725         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7726                 claim_zero(mlx5_glue->destroy_flow_action
7727                                 (cache_resource->action));
7728                 /* jump action memory free is inside the table release. */
7729                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
7730                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7731                         (void *)cache_resource);
7732                 return 0;
7733         }
7734         return 1;
7735 }
7736
7737 /**
7738  * Release a modify-header resource.
7739  *
7740  * @param flow
7741  *   Pointer to mlx5_flow.
7742  *
7743  * @return
7744  *   1 while a reference on it exists, 0 when freed.
7745  */
7746 static int
7747 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7748 {
7749         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7750                                                 flow->dv.modify_hdr;
7751
7752         assert(cache_resource->verbs_action);
7753         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7754                 (void *)cache_resource,
7755                 rte_atomic32_read(&cache_resource->refcnt));
7756         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7757                 claim_zero(mlx5_glue->destroy_flow_action
7758                                 (cache_resource->verbs_action));
7759                 LIST_REMOVE(cache_resource, next);
7760                 rte_free(cache_resource);
7761                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7762                         (void *)cache_resource);
7763                 return 0;
7764         }
7765         return 1;
7766 }
7767
7768 /**
7769  * Release port ID action resource.
7770  *
7771  * @param flow
7772  *   Pointer to mlx5_flow.
7773  *
7774  * @return
7775  *   1 while a reference on it exists, 0 when freed.
7776  */
7777 static int
7778 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7779 {
7780         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7781                 flow->dv.port_id_action;
7782
7783         assert(cache_resource->action);
7784         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7785                 (void *)cache_resource,
7786                 rte_atomic32_read(&cache_resource->refcnt));
7787         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7788                 claim_zero(mlx5_glue->destroy_flow_action
7789                                 (cache_resource->action));
7790                 LIST_REMOVE(cache_resource, next);
7791                 rte_free(cache_resource);
7792                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7793                         (void *)cache_resource);
7794                 return 0;
7795         }
7796         return 1;
7797 }
7798
7799 /**
7800  * Release push vlan action resource.
7801  *
7802  * @param flow
7803  *   Pointer to mlx5_flow.
7804  *
7805  * @return
7806  *   1 while a reference on it exists, 0 when freed.
7807  */
7808 static int
7809 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7810 {
7811         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7812                 flow->dv.push_vlan_res;
7813
7814         assert(cache_resource->action);
7815         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7816                 (void *)cache_resource,
7817                 rte_atomic32_read(&cache_resource->refcnt));
7818         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7819                 claim_zero(mlx5_glue->destroy_flow_action
7820                                 (cache_resource->action));
7821                 LIST_REMOVE(cache_resource, next);
7822                 rte_free(cache_resource);
7823                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7824                         (void *)cache_resource);
7825                 return 0;
7826         }
7827         return 1;
7828 }
7829
7830 /**
7831  * Remove the flow from the NIC but keeps it in memory.
7832  * Lock free, (mutex should be acquired by caller).
7833  *
7834  * @param[in] dev
7835  *   Pointer to Ethernet device.
7836  * @param[in, out] flow
7837  *   Pointer to flow structure.
7838  */
7839 static void
7840 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7841 {
7842         struct mlx5_flow_dv *dv;
7843         struct mlx5_flow *dev_flow;
7844
7845         if (!flow)
7846                 return;
7847         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7848                 dv = &dev_flow->dv;
7849                 if (dv->flow) {
7850                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7851                         dv->flow = NULL;
7852                 }
7853                 if (dv->hrxq) {
7854                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7855                                 mlx5_hrxq_drop_release(dev);
7856                         else
7857                                 mlx5_hrxq_release(dev, dv->hrxq);
7858                         dv->hrxq = NULL;
7859                 }
7860                 if (dev_flow->dv.vf_vlan.tag &&
7861                     dev_flow->dv.vf_vlan.created)
7862                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7863         }
7864 }
7865
7866 /**
7867  * Remove the flow from the NIC and the memory.
7868  * Lock free, (mutex should be acquired by caller).
7869  *
7870  * @param[in] dev
7871  *   Pointer to the Ethernet device structure.
7872  * @param[in, out] flow
7873  *   Pointer to flow structure.
7874  */
7875 static void
7876 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
7877 {
7878         struct mlx5_flow *dev_flow;
7879
7880         if (!flow)
7881                 return;
7882         __flow_dv_remove(dev, flow);
7883         if (flow->counter) {
7884                 flow_dv_counter_release(dev, flow->counter);
7885                 flow->counter = NULL;
7886         }
7887         if (flow->meter) {
7888                 mlx5_flow_meter_detach(flow->meter);
7889                 flow->meter = NULL;
7890         }
7891         while (!LIST_EMPTY(&flow->dev_flows)) {
7892                 dev_flow = LIST_FIRST(&flow->dev_flows);
7893                 LIST_REMOVE(dev_flow, next);
7894                 if (dev_flow->dv.matcher)
7895                         flow_dv_matcher_release(dev, dev_flow);
7896                 if (dev_flow->dv.encap_decap)
7897                         flow_dv_encap_decap_resource_release(dev_flow);
7898                 if (dev_flow->dv.modify_hdr)
7899                         flow_dv_modify_hdr_resource_release(dev_flow);
7900                 if (dev_flow->dv.jump)
7901                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
7902                 if (dev_flow->dv.port_id_action)
7903                         flow_dv_port_id_action_resource_release(dev_flow);
7904                 if (dev_flow->dv.push_vlan_res)
7905                         flow_dv_push_vlan_action_resource_release(dev_flow);
7906                 if (dev_flow->dv.tag_resource)
7907                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
7908                 rte_free(dev_flow);
7909         }
7910 }
7911
7912 /**
7913  * Query a dv flow  rule for its statistics via devx.
7914  *
7915  * @param[in] dev
7916  *   Pointer to Ethernet device.
7917  * @param[in] flow
7918  *   Pointer to the sub flow.
7919  * @param[out] data
7920  *   data retrieved by the query.
7921  * @param[out] error
7922  *   Perform verbose error reporting if not NULL.
7923  *
7924  * @return
7925  *   0 on success, a negative errno value otherwise and rte_errno is set.
7926  */
7927 static int
7928 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
7929                     void *data, struct rte_flow_error *error)
7930 {
7931         struct mlx5_priv *priv = dev->data->dev_private;
7932         struct rte_flow_query_count *qc = data;
7933
7934         if (!priv->config.devx)
7935                 return rte_flow_error_set(error, ENOTSUP,
7936                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7937                                           NULL,
7938                                           "counters are not supported");
7939         if (flow->counter) {
7940                 uint64_t pkts, bytes;
7941                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
7942                                                &bytes);
7943
7944                 if (err)
7945                         return rte_flow_error_set(error, -err,
7946                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7947                                         NULL, "cannot read counters");
7948                 qc->hits_set = 1;
7949                 qc->bytes_set = 1;
7950                 qc->hits = pkts - flow->counter->hits;
7951                 qc->bytes = bytes - flow->counter->bytes;
7952                 if (qc->reset) {
7953                         flow->counter->hits = pkts;
7954                         flow->counter->bytes = bytes;
7955                 }
7956                 return 0;
7957         }
7958         return rte_flow_error_set(error, EINVAL,
7959                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7960                                   NULL,
7961                                   "counters are not available");
7962 }
7963
7964 /**
7965  * Query a flow.
7966  *
7967  * @see rte_flow_query()
7968  * @see rte_flow_ops
7969  */
7970 static int
7971 flow_dv_query(struct rte_eth_dev *dev,
7972               struct rte_flow *flow __rte_unused,
7973               const struct rte_flow_action *actions __rte_unused,
7974               void *data __rte_unused,
7975               struct rte_flow_error *error __rte_unused)
7976 {
7977         int ret = -EINVAL;
7978
7979         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7980                 switch (actions->type) {
7981                 case RTE_FLOW_ACTION_TYPE_VOID:
7982                         break;
7983                 case RTE_FLOW_ACTION_TYPE_COUNT:
7984                         ret = flow_dv_query_count(dev, flow, data, error);
7985                         break;
7986                 default:
7987                         return rte_flow_error_set(error, ENOTSUP,
7988                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7989                                                   actions,
7990                                                   "action not supported");
7991                 }
7992         }
7993         return ret;
7994 }
7995
7996 /**
7997  * Destroy the meter table set.
7998  * Lock free, (mutex should be acquired by caller).
7999  *
8000  * @param[in] dev
8001  *   Pointer to Ethernet device.
8002  * @param[in] tbl
8003  *   Pointer to the meter table set.
8004  *
8005  * @return
8006  *   Always 0.
8007  */
8008 static int
8009 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8010                         struct mlx5_meter_domains_infos *tbl)
8011 {
8012         struct mlx5_priv *priv = dev->data->dev_private;
8013         struct mlx5_meter_domains_infos *mtd =
8014                                 (struct mlx5_meter_domains_infos *)tbl;
8015
8016         if (!mtd || !priv->config.dv_flow_en)
8017                 return 0;
8018         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8019                 claim_zero(mlx5_glue->dv_destroy_flow
8020                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8021         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8022                 claim_zero(mlx5_glue->dv_destroy_flow
8023                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8024         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8025                 claim_zero(mlx5_glue->dv_destroy_flow
8026                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8027         if (mtd->egress.color_matcher)
8028                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8029                           (mtd->egress.color_matcher));
8030         if (mtd->egress.any_matcher)
8031                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8032                           (mtd->egress.any_matcher));
8033         if (mtd->egress.tbl)
8034                 claim_zero(flow_dv_tbl_resource_release(dev,
8035                                                         mtd->egress.tbl));
8036         if (mtd->ingress.color_matcher)
8037                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8038                           (mtd->ingress.color_matcher));
8039         if (mtd->ingress.any_matcher)
8040                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8041                           (mtd->ingress.any_matcher));
8042         if (mtd->ingress.tbl)
8043                 claim_zero(flow_dv_tbl_resource_release(dev,
8044                                                         mtd->ingress.tbl));
8045         if (mtd->transfer.color_matcher)
8046                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8047                           (mtd->transfer.color_matcher));
8048         if (mtd->transfer.any_matcher)
8049                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8050                           (mtd->transfer.any_matcher));
8051         if (mtd->transfer.tbl)
8052                 claim_zero(flow_dv_tbl_resource_release(dev,
8053                                                         mtd->transfer.tbl));
8054         if (mtd->drop_actn)
8055                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8056         rte_free(mtd);
8057         return 0;
8058 }
8059
8060 /* Number of meter flow actions, count and jump or count and drop. */
8061 #define METER_ACTIONS 2
8062
8063 /**
8064  * Create specify domain meter table and suffix table.
8065  *
8066  * @param[in] dev
8067  *   Pointer to Ethernet device.
8068  * @param[in,out] mtb
8069  *   Pointer to DV meter table set.
8070  * @param[in] egress
8071  *   Table attribute.
8072  * @param[in] transfer
8073  *   Table attribute.
8074  * @param[in] color_reg_c_idx
8075  *   Reg C index for color match.
8076  *
8077  * @return
8078  *   0 on success, -1 otherwise and rte_errno is set.
8079  */
8080 static int
8081 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8082                            struct mlx5_meter_domains_infos *mtb,
8083                            uint8_t egress, uint8_t transfer,
8084                            uint32_t color_reg_c_idx)
8085 {
8086         struct mlx5_priv *priv = dev->data->dev_private;
8087         struct mlx5_ibv_shared *sh = priv->sh;
8088         struct mlx5_flow_dv_match_params mask = {
8089                 .size = sizeof(mask.buf),
8090         };
8091         struct mlx5_flow_dv_match_params value = {
8092                 .size = sizeof(value.buf),
8093         };
8094         struct mlx5dv_flow_matcher_attr dv_attr = {
8095                 .type = IBV_FLOW_ATTR_NORMAL,
8096                 .priority = 0,
8097                 .match_criteria_enable = 0,
8098                 .match_mask = (void *)&mask,
8099         };
8100         void *actions[METER_ACTIONS];
8101         struct mlx5_flow_tbl_resource **sfx_tbl;
8102         struct mlx5_meter_domain_info *dtb;
8103         struct rte_flow_error error;
8104         int i = 0;
8105
8106         if (transfer) {
8107                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8108                 dtb = &mtb->transfer;
8109         } else if (egress) {
8110                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8111                 dtb = &mtb->egress;
8112         } else {
8113                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8114                 dtb = &mtb->ingress;
8115         }
8116         /* If the suffix table in missing, create it. */
8117         if (!(*sfx_tbl)) {
8118                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8119                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8120                                                 egress, transfer, &error);
8121                 if (!(*sfx_tbl)) {
8122                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8123                         return -1;
8124                 }
8125         }
8126         /* Create the meter table with METER level. */
8127         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8128                                             egress, transfer, &error);
8129         if (!dtb->tbl) {
8130                 DRV_LOG(ERR, "Failed to create meter policer table.");
8131                 return -1;
8132         }
8133         /* Create matchers, Any and Color. */
8134         dv_attr.priority = 3;
8135         dv_attr.match_criteria_enable = 0;
8136         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8137                                                              &dv_attr,
8138                                                              dtb->tbl->obj);
8139         if (!dtb->any_matcher) {
8140                 DRV_LOG(ERR, "Failed to create meter"
8141                              " policer default matcher.");
8142                 goto error_exit;
8143         }
8144         dv_attr.priority = 0;
8145         dv_attr.match_criteria_enable =
8146                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8147         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8148                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
8149         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8150                                                                &dv_attr,
8151                                                                dtb->tbl->obj);
8152         if (!dtb->color_matcher) {
8153                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8154                 goto error_exit;
8155         }
8156         if (mtb->count_actns[RTE_MTR_DROPPED])
8157                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8158         actions[i++] = mtb->drop_actn;
8159         /* Default rule: lowest priority, match any, actions: drop. */
8160         dtb->policer_rules[RTE_MTR_DROPPED] =
8161                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8162                                                  (void *)&value, i, actions);
8163         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8164                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8165                 goto error_exit;
8166         }
8167         return 0;
8168 error_exit:
8169         return -1;
8170 }
8171
8172 /**
8173  * Create the needed meter and suffix tables.
8174  * Lock free, (mutex should be acquired by caller).
8175  *
8176  * @param[in] dev
8177  *   Pointer to Ethernet device.
8178  * @param[in] fm
8179  *   Pointer to the flow meter.
8180  *
8181  * @return
8182  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8183  */
8184 static struct mlx5_meter_domains_infos *
8185 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8186                        const struct mlx5_flow_meter *fm)
8187 {
8188         struct mlx5_priv *priv = dev->data->dev_private;
8189         struct mlx5_meter_domains_infos *mtb;
8190         int ret;
8191         int i;
8192
8193         if (!priv->mtr_en) {
8194                 rte_errno = ENOTSUP;
8195                 return NULL;
8196         }
8197         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8198         if (!mtb) {
8199                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8200                 return NULL;
8201         }
8202         /* Create meter count actions */
8203         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8204                 if (!fm->policer_stats.cnt[i])
8205                         continue;
8206                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8207         }
8208         /* Create drop action. */
8209         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8210         if (!mtb->drop_actn) {
8211                 DRV_LOG(ERR, "Failed to create drop action.");
8212                 goto error_exit;
8213         }
8214         /* Egress meter table. */
8215         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8216         if (ret) {
8217                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8218                 goto error_exit;
8219         }
8220         /* Ingress meter table. */
8221         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8222         if (ret) {
8223                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8224                 goto error_exit;
8225         }
8226         /* FDB meter table. */
8227         if (priv->config.dv_esw_en) {
8228                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8229                                                  priv->mtr_color_reg);
8230                 if (ret) {
8231                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8232                         goto error_exit;
8233                 }
8234         }
8235         return mtb;
8236 error_exit:
8237         flow_dv_destroy_mtr_tbl(dev, mtb);
8238         return NULL;
8239 }
8240
8241 /**
8242  * Destroy domain policer rule.
8243  *
8244  * @param[in] dt
8245  *   Pointer to domain table.
8246  */
8247 static void
8248 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8249 {
8250         int i;
8251
8252         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8253                 if (dt->policer_rules[i]) {
8254                         claim_zero(mlx5_glue->dv_destroy_flow
8255                                   (dt->policer_rules[i]));
8256                         dt->policer_rules[i] = NULL;
8257                 }
8258         }
8259         if (dt->jump_actn) {
8260                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8261                 dt->jump_actn = NULL;
8262         }
8263 }
8264
8265 /**
8266  * Destroy policer rules.
8267  *
8268  * @param[in] dev
8269  *   Pointer to Ethernet device.
8270  * @param[in] fm
8271  *   Pointer to flow meter structure.
8272  * @param[in] attr
8273  *   Pointer to flow attributes.
8274  *
8275  * @return
8276  *   Always 0.
8277  */
8278 static int
8279 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8280                               const struct mlx5_flow_meter *fm,
8281                               const struct rte_flow_attr *attr)
8282 {
8283         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8284
8285         if (!mtb)
8286                 return 0;
8287         if (attr->egress)
8288                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8289         if (attr->ingress)
8290                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8291         if (attr->transfer)
8292                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8293         return 0;
8294 }
8295
8296 /**
8297  * Create specify domain meter policer rule.
8298  *
8299  * @param[in] fm
8300  *   Pointer to flow meter structure.
8301  * @param[in] mtb
8302  *   Pointer to DV meter table set.
8303  * @param[in] sfx_tb
8304  *   Pointer to suffix table.
8305  * @param[in] mtr_reg_c
8306  *   Color match REG_C.
8307  *
8308  * @return
8309  *   0 on success, -1 otherwise.
8310  */
8311 static int
8312 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8313                                     struct mlx5_meter_domain_info *dtb,
8314                                     struct mlx5_flow_tbl_resource *sfx_tb,
8315                                     uint8_t mtr_reg_c)
8316 {
8317         struct mlx5_flow_dv_match_params matcher = {
8318                 .size = sizeof(matcher.buf),
8319         };
8320         struct mlx5_flow_dv_match_params value = {
8321                 .size = sizeof(value.buf),
8322         };
8323         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8324         void *actions[METER_ACTIONS];
8325         int i;
8326
8327         /* Create jump action. */
8328         if (!sfx_tb)
8329                 return -1;
8330         if (!dtb->jump_actn)
8331                 dtb->jump_actn =
8332                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8333                                                         (sfx_tb->obj);
8334         if (!dtb->jump_actn) {
8335                 DRV_LOG(ERR, "Failed to create policer jump action.");
8336                 goto error;
8337         }
8338         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8339                 int j = 0;
8340
8341                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8342                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8343                 if (mtb->count_actns[i])
8344                         actions[j++] = mtb->count_actns[i];
8345                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8346                         actions[j++] = mtb->drop_actn;
8347                 else
8348                         actions[j++] = dtb->jump_actn;
8349                 dtb->policer_rules[i] =
8350                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8351                                                  (void *)&value,
8352                                                   j, actions);
8353                 if (!dtb->policer_rules[i]) {
8354                         DRV_LOG(ERR, "Failed to create policer rule.");
8355                         goto error;
8356                 }
8357         }
8358         return 0;
8359 error:
8360         rte_errno = errno;
8361         return -1;
8362 }
8363
8364 /**
8365  * Create policer rules.
8366  *
8367  * @param[in] dev
8368  *   Pointer to Ethernet device.
8369  * @param[in] fm
8370  *   Pointer to flow meter structure.
8371  * @param[in] attr
8372  *   Pointer to flow attributes.
8373  *
8374  * @return
8375  *   0 on success, -1 otherwise.
8376  */
8377 static int
8378 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8379                              struct mlx5_flow_meter *fm,
8380                              const struct rte_flow_attr *attr)
8381 {
8382         struct mlx5_priv *priv = dev->data->dev_private;
8383         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8384         int ret;
8385
8386         if (attr->egress) {
8387                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8388                                                 priv->sh->tx_mtr_sfx_tbl,
8389                                                 priv->mtr_color_reg);
8390                 if (ret) {
8391                         DRV_LOG(ERR, "Failed to create egress policer.");
8392                         goto error;
8393                 }
8394         }
8395         if (attr->ingress) {
8396                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8397                                                 priv->sh->rx_mtr_sfx_tbl,
8398                                                 priv->mtr_color_reg);
8399                 if (ret) {
8400                         DRV_LOG(ERR, "Failed to create ingress policer.");
8401                         goto error;
8402                 }
8403         }
8404         if (attr->transfer) {
8405                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8406                                                 priv->sh->fdb_mtr_sfx_tbl,
8407                                                 priv->mtr_color_reg);
8408                 if (ret) {
8409                         DRV_LOG(ERR, "Failed to create transfer policer.");
8410                         goto error;
8411                 }
8412         }
8413         return 0;
8414 error:
8415         flow_dv_destroy_policer_rules(dev, fm, attr);
8416         return -1;
8417 }
8418
8419 /**
8420  * Query a devx counter.
8421  *
8422  * @param[in] dev
8423  *   Pointer to the Ethernet device structure.
8424  * @param[in] cnt
8425  *   Pointer to the flow counter.
8426  * @param[in] clear
8427  *   Set to clear the counter statistics.
8428  * @param[out] pkts
8429  *   The statistics value of packets.
8430  * @param[out] bytes
8431  *   The statistics value of bytes.
8432  *
8433  * @return
8434  *   0 on success, otherwise return -1.
8435  */
8436 static int
8437 flow_dv_counter_query(struct rte_eth_dev *dev,
8438                       struct mlx5_flow_counter *cnt, bool clear,
8439                       uint64_t *pkts, uint64_t *bytes)
8440 {
8441         struct mlx5_priv *priv = dev->data->dev_private;
8442         uint64_t inn_pkts, inn_bytes;
8443         int ret;
8444
8445         if (!priv->config.devx)
8446                 return -1;
8447         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8448         if (ret)
8449                 return -1;
8450         *pkts = inn_pkts - cnt->hits;
8451         *bytes = inn_bytes - cnt->bytes;
8452         if (clear) {
8453                 cnt->hits = inn_pkts;
8454                 cnt->bytes = inn_bytes;
8455         }
8456         return 0;
8457 }
8458
8459 /*
8460  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8461  */
8462 static int
8463 flow_dv_translate(struct rte_eth_dev *dev,
8464                   struct mlx5_flow *dev_flow,
8465                   const struct rte_flow_attr *attr,
8466                   const struct rte_flow_item items[],
8467                   const struct rte_flow_action actions[],
8468                   struct rte_flow_error *error)
8469 {
8470         int ret;
8471
8472         flow_dv_shared_lock(dev);
8473         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8474         flow_dv_shared_unlock(dev);
8475         return ret;
8476 }
8477
8478 /*
8479  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8480  */
8481 static int
8482 flow_dv_apply(struct rte_eth_dev *dev,
8483               struct rte_flow *flow,
8484               struct rte_flow_error *error)
8485 {
8486         int ret;
8487
8488         flow_dv_shared_lock(dev);
8489         ret = __flow_dv_apply(dev, flow, error);
8490         flow_dv_shared_unlock(dev);
8491         return ret;
8492 }
8493
8494 /*
8495  * Mutex-protected thunk to lock-free __flow_dv_remove().
8496  */
8497 static void
8498 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8499 {
8500         flow_dv_shared_lock(dev);
8501         __flow_dv_remove(dev, flow);
8502         flow_dv_shared_unlock(dev);
8503 }
8504
8505 /*
8506  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8507  */
8508 static void
8509 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8510 {
8511         flow_dv_shared_lock(dev);
8512         __flow_dv_destroy(dev, flow);
8513         flow_dv_shared_unlock(dev);
8514 }
8515
8516 /*
8517  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8518  */
8519 static struct mlx5_flow_counter *
8520 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8521 {
8522         struct mlx5_flow_counter *cnt;
8523
8524         flow_dv_shared_lock(dev);
8525         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8526         flow_dv_shared_unlock(dev);
8527         return cnt;
8528 }
8529
8530 /*
8531  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8532  */
8533 static void
8534 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8535 {
8536         flow_dv_shared_lock(dev);
8537         flow_dv_counter_release(dev, cnt);
8538         flow_dv_shared_unlock(dev);
8539 }
8540
8541 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8542         .validate = flow_dv_validate,
8543         .prepare = flow_dv_prepare,
8544         .translate = flow_dv_translate,
8545         .apply = flow_dv_apply,
8546         .remove = flow_dv_remove,
8547         .destroy = flow_dv_destroy,
8548         .query = flow_dv_query,
8549         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8550         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8551         .create_policer_rules = flow_dv_create_policer_rules,
8552         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8553         .counter_alloc = flow_dv_counter_allocate,
8554         .counter_free = flow_dv_counter_free,
8555         .counter_query = flow_dv_counter_query,
8556 };
8557
8558 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */