drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_prm.h>
  35
  36 #include "mlx5_defs.h"
  37 #include "mlx5.h"
  38 #include "mlx5_flow.h"
  39 #include "mlx5_rxtx.h"
  40
  41 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 /**
  77  * Initialize flow attributes structure according to flow items' types.
  78  *
  79  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  80  * mode. For tunnel mode, the items to be modified are the outermost ones.
  81  *
  82  * @param[in] item
  83  *   Pointer to item specification.
  84  * @param[out] attr
  85  *   Pointer to flow attributes structure.
  86  * @param[in] dev_flow
  87  *   Pointer to the sub flow.
  88  * @param[in] tunnel_decap
  89  *   Whether action is after tunnel decapsulation.
  90  */
  91 static void
  92 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
  93                   struct mlx5_flow *dev_flow, bool tunnel_decap)
  94 {
  95         /*
  96          * If layers is already initialized, it means this dev_flow is the
  97          * suffix flow, the layers flags is set by the prefix flow. Need to
  98          * use the layer flags from prefix flow as the suffix flow may not
  99          * have the user defined items as the flow is split.
 100          */
 101         if (dev_flow->layers) {
 102                 if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 103                         attr->ipv4 = 1;
 104                 else if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 105                         attr->ipv6 = 1;
 106                 if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 107                         attr->tcp = 1;
 108                 else if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 109                         attr->udp = 1;
 110                 attr->valid = 1;
 111                 return;
 112         }
 113         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 114                 uint8_t next_protocol = 0xff;
 115                 switch (item->type) {
 116                 case RTE_FLOW_ITEM_TYPE_GRE:
 117                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 118                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 119                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 120                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 121                 case RTE_FLOW_ITEM_TYPE_MPLS:
 122                         if (tunnel_decap)
 123                                 attr->attr = 0;
 124                         break;
 125                 case RTE_FLOW_ITEM_TYPE_IPV4:
 126                         if (!attr->ipv6)
 127                                 attr->ipv4 = 1;
 128                         if (item->mask != NULL &&
 129                             ((const struct rte_flow_item_ipv4 *)
 130                             item->mask)->hdr.next_proto_id)
 131                                 next_protocol =
 132                                     ((const struct rte_flow_item_ipv4 *)
 133                                       (item->spec))->hdr.next_proto_id &
 134                                     ((const struct rte_flow_item_ipv4 *)
 135                                       (item->mask))->hdr.next_proto_id;
 136                         if ((next_protocol == IPPROTO_IPIP ||
 137                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 138                                 attr->attr = 0;
 139                         break;
 140                 case RTE_FLOW_ITEM_TYPE_IPV6:
 141                         if (!attr->ipv4)
 142                                 attr->ipv6 = 1;
 143                         if (item->mask != NULL &&
 144                             ((const struct rte_flow_item_ipv6 *)
 145                             item->mask)->hdr.proto)
 146                                 next_protocol =
 147                                     ((const struct rte_flow_item_ipv6 *)
 148                                       (item->spec))->hdr.proto &
 149                                     ((const struct rte_flow_item_ipv6 *)
 150                                       (item->mask))->hdr.proto;
 151                         if ((next_protocol == IPPROTO_IPIP ||
 152                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 153                                 attr->attr = 0;
 154                         break;
 155                 case RTE_FLOW_ITEM_TYPE_UDP:
 156                         if (!attr->tcp)
 157                                 attr->udp = 1;
 158                         break;
 159                 case RTE_FLOW_ITEM_TYPE_TCP:
 160                         if (!attr->udp)
 161                                 attr->tcp = 1;
 162                         break;
 163                 default:
 164                         break;
 165                 }
 166         }
 167         attr->valid = 1;
 168 }
 169
 170 /**
 171  * Convert rte_mtr_color to mlx5 color.
 172  *
 173  * @param[in] rcol
 174  *   rte_mtr_color.
 175  *
 176  * @return
 177  *   mlx5 color.
 178  */
 179 static int
 180 rte_col_2_mlx5_col(enum rte_color rcol)
 181 {
 182         switch (rcol) {
 183         case RTE_COLOR_GREEN:
 184                 return MLX5_FLOW_COLOR_GREEN;
 185         case RTE_COLOR_YELLOW:
 186                 return MLX5_FLOW_COLOR_YELLOW;
 187         case RTE_COLOR_RED:
 188                 return MLX5_FLOW_COLOR_RED;
 189         default:
 190                 break;
 191         }
 192         return MLX5_FLOW_COLOR_UNDEFINED;
 193 }
 194
 195 struct field_modify_info {
 196         uint32_t size; /* Size of field in protocol header, in bytes. */
 197         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 198         enum mlx5_modification_field id;
 199 };
 200
 201 struct field_modify_info modify_eth[] = {
 202         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 203         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 204         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 205         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 206         {0, 0, 0},
 207 };
 208
 209 struct field_modify_info modify_vlan_out_first_vid[] = {
 210         /* Size in bits !!! */
 211         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 212         {0, 0, 0},
 213 };
 214
 215 struct field_modify_info modify_ipv4[] = {
 216         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 217         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 218         {4, 12, MLX5_MODI_OUT_SIPV4},
 219         {4, 16, MLX5_MODI_OUT_DIPV4},
 220         {0, 0, 0},
 221 };
 222
 223 struct field_modify_info modify_ipv6[] = {
 224         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 225         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 226         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 227         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 228         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 229         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 230         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 231         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 232         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 233         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 234         {0, 0, 0},
 235 };
 236
 237 struct field_modify_info modify_udp[] = {
 238         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 239         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 240         {0, 0, 0},
 241 };
 242
 243 struct field_modify_info modify_tcp[] = {
 244         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 245         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 246         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 247         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 248         {0, 0, 0},
 249 };
 250
 251 static void
 252 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 253                           uint8_t next_protocol, uint64_t *item_flags,
 254                           int *tunnel)
 255 {
 256         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 257                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 258         if (next_protocol == IPPROTO_IPIP) {
 259                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 260                 *tunnel = 1;
 261         }
 262         if (next_protocol == IPPROTO_IPV6) {
 263                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 264                 *tunnel = 1;
 265         }
 266 }
 267
 268 /**
 269  * Acquire the synchronizing object to protect multithreaded access
 270  * to shared dv context. Lock occurs only if context is actually
 271  * shared, i.e. we have multiport IB device and representors are
 272  * created.
 273  *
 274  * @param[in] dev
 275  *   Pointer to the rte_eth_dev structure.
 276  */
 277 static void
 278 flow_dv_shared_lock(struct rte_eth_dev *dev)
 279 {
 280         struct mlx5_priv *priv = dev->data->dev_private;
 281         struct mlx5_ibv_shared *sh = priv->sh;
 282
 283         if (sh->dv_refcnt > 1) {
 284                 int ret;
 285
 286                 ret = pthread_mutex_lock(&sh->dv_mutex);
 287                 MLX5_ASSERT(!ret);
 288                 (void)ret;
 289         }
 290 }
 291
 292 static void
 293 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 294 {
 295         struct mlx5_priv *priv = dev->data->dev_private;
 296         struct mlx5_ibv_shared *sh = priv->sh;
 297
 298         if (sh->dv_refcnt > 1) {
 299                 int ret;
 300
 301                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 302                 MLX5_ASSERT(!ret);
 303                 (void)ret;
 304         }
 305 }
 306
 307 /* Update VLAN's VID/PCP based on input rte_flow_action.
 308  *
 309  * @param[in] action
 310  *   Pointer to struct rte_flow_action.
 311  * @param[out] vlan
 312  *   Pointer to struct rte_vlan_hdr.
 313  */
 314 static void
 315 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 316                          struct rte_vlan_hdr *vlan)
 317 {
 318         uint16_t vlan_tci;
 319         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 320                 vlan_tci =
 321                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 322                                                action->conf)->vlan_pcp;
 323                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 324                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 325                 vlan->vlan_tci |= vlan_tci;
 326         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 327                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 328                 vlan->vlan_tci |= rte_be_to_cpu_16
 329                     (((const struct rte_flow_action_of_set_vlan_vid *)
 330                                              action->conf)->vlan_vid);
 331         }
 332 }
 333
 334 /**
 335  * Fetch 1, 2, 3 or 4 byte field from the byte array
 336  * and return as unsigned integer in host-endian format.
 337  *
 338  * @param[in] data
 339  *   Pointer to data array.
 340  * @param[in] size
 341  *   Size of field to extract.
 342  *
 343  * @return
 344  *   converted field in host endian format.
 345  */
 346 static inline uint32_t
 347 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 348 {
 349         uint32_t ret;
 350
 351         switch (size) {
 352         case 1:
 353                 ret = *data;
 354                 break;
 355         case 2:
 356                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 357                 break;
 358         case 3:
 359                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 360                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 361                 break;
 362         case 4:
 363                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 364                 break;
 365         default:
 366                 MLX5_ASSERT(false);
 367                 ret = 0;
 368                 break;
 369         }
 370         return ret;
 371 }
 372
 373 /**
 374  * Convert modify-header action to DV specification.
 375  *
 376  * Data length of each action is determined by provided field description
 377  * and the item mask. Data bit offset and width of each action is determined
 378  * by provided item mask.
 379  *
 380  * @param[in] item
 381  *   Pointer to item specification.
 382  * @param[in] field
 383  *   Pointer to field modification information.
 384  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 385  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 386  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 387  * @param[in] dcopy
 388  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 389  *   Negative offset value sets the same offset as source offset.
 390  *   size field is ignored, value is taken from source field.
 391  * @param[in,out] resource
 392  *   Pointer to the modify-header resource.
 393  * @param[in] type
 394  *   Type of modification.
 395  * @param[out] error
 396  *   Pointer to the error structure.
 397  *
 398  * @return
 399  *   0 on success, a negative errno value otherwise and rte_errno is set.
 400  */
 401 static int
 402 flow_dv_convert_modify_action(struct rte_flow_item *item,
 403                               struct field_modify_info *field,
 404                               struct field_modify_info *dcopy,
 405                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 406                               uint32_t type, struct rte_flow_error *error)
 407 {
 408         uint32_t i = resource->actions_num;
 409         struct mlx5_modification_cmd *actions = resource->actions;
 410
 411         /*
 412          * The item and mask are provided in big-endian format.
 413          * The fields should be presented as in big-endian format either.
 414          * Mask must be always present, it defines the actual field width.
 415          */
 416         MLX5_ASSERT(item->mask);
 417         MLX5_ASSERT(field->size);
 418         do {
 419                 unsigned int size_b;
 420                 unsigned int off_b;
 421                 uint32_t mask;
 422                 uint32_t data;
 423
 424                 if (i >= MLX5_MAX_MODIFY_NUM)
 425                         return rte_flow_error_set(error, EINVAL,
 426                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 427                                  "too many items to modify");
 428                 /* Fetch variable byte size mask from the array. */
 429                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 430                                            field->offset, field->size);
 431                 if (!mask) {
 432                         ++field;
 433                         continue;
 434                 }
 435                 /* Deduce actual data width in bits from mask value. */
 436                 off_b = rte_bsf32(mask);
 437                 size_b = sizeof(uint32_t) * CHAR_BIT -
 438                          off_b - __builtin_clz(mask);
 439                 MLX5_ASSERT(size_b);
 440                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 441                 actions[i] = (struct mlx5_modification_cmd) {
 442                         .action_type = type,
 443                         .field = field->id,
 444                         .offset = off_b,
 445                         .length = size_b,
 446                 };
 447                 /* Convert entire record to expected big-endian format. */
 448                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 449                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 450                         MLX5_ASSERT(dcopy);
 451                         actions[i].dst_field = dcopy->id;
 452                         actions[i].dst_offset =
 453                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 454                         /* Convert entire record to big-endian format. */
 455                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 456                 } else {
 457                         MLX5_ASSERT(item->spec);
 458                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 459                                                    field->offset, field->size);
 460                         /* Shift out the trailing masked bits from data. */
 461                         data = (data & mask) >> off_b;
 462                         actions[i].data1 = rte_cpu_to_be_32(data);
 463                 }
 464                 ++i;
 465                 ++field;
 466         } while (field->size);
 467         if (resource->actions_num == i)
 468                 return rte_flow_error_set(error, EINVAL,
 469                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 470                                           "invalid modification flow item");
 471         resource->actions_num = i;
 472         return 0;
 473 }
 474
 475 /**
 476  * Convert modify-header set IPv4 address action to DV specification.
 477  *
 478  * @param[in,out] resource
 479  *   Pointer to the modify-header resource.
 480  * @param[in] action
 481  *   Pointer to action specification.
 482  * @param[out] error
 483  *   Pointer to the error structure.
 484  *
 485  * @return
 486  *   0 on success, a negative errno value otherwise and rte_errno is set.
 487  */
 488 static int
 489 flow_dv_convert_action_modify_ipv4
 490                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 491                          const struct rte_flow_action *action,
 492                          struct rte_flow_error *error)
 493 {
 494         const struct rte_flow_action_set_ipv4 *conf =
 495                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 496         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 497         struct rte_flow_item_ipv4 ipv4;
 498         struct rte_flow_item_ipv4 ipv4_mask;
 499
 500         memset(&ipv4, 0, sizeof(ipv4));
 501         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 502         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 503                 ipv4.hdr.src_addr = conf->ipv4_addr;
 504                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 505         } else {
 506                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 507                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 508         }
 509         item.spec = &ipv4;
 510         item.mask = &ipv4_mask;
 511         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 512                                              MLX5_MODIFICATION_TYPE_SET, error);
 513 }
 514
 515 /**
 516  * Convert modify-header set IPv6 address action to DV specification.
 517  *
 518  * @param[in,out] resource
 519  *   Pointer to the modify-header resource.
 520  * @param[in] action
 521  *   Pointer to action specification.
 522  * @param[out] error
 523  *   Pointer to the error structure.
 524  *
 525  * @return
 526  *   0 on success, a negative errno value otherwise and rte_errno is set.
 527  */
 528 static int
 529 flow_dv_convert_action_modify_ipv6
 530                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 531                          const struct rte_flow_action *action,
 532                          struct rte_flow_error *error)
 533 {
 534         const struct rte_flow_action_set_ipv6 *conf =
 535                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 536         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 537         struct rte_flow_item_ipv6 ipv6;
 538         struct rte_flow_item_ipv6 ipv6_mask;
 539
 540         memset(&ipv6, 0, sizeof(ipv6));
 541         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 542         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 543                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 544                        sizeof(ipv6.hdr.src_addr));
 545                 memcpy(&ipv6_mask.hdr.src_addr,
 546                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 547                        sizeof(ipv6.hdr.src_addr));
 548         } else {
 549                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 550                        sizeof(ipv6.hdr.dst_addr));
 551                 memcpy(&ipv6_mask.hdr.dst_addr,
 552                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 553                        sizeof(ipv6.hdr.dst_addr));
 554         }
 555         item.spec = &ipv6;
 556         item.mask = &ipv6_mask;
 557         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 558                                              MLX5_MODIFICATION_TYPE_SET, error);
 559 }
 560
 561 /**
 562  * Convert modify-header set MAC address action to DV specification.
 563  *
 564  * @param[in,out] resource
 565  *   Pointer to the modify-header resource.
 566  * @param[in] action
 567  *   Pointer to action specification.
 568  * @param[out] error
 569  *   Pointer to the error structure.
 570  *
 571  * @return
 572  *   0 on success, a negative errno value otherwise and rte_errno is set.
 573  */
 574 static int
 575 flow_dv_convert_action_modify_mac
 576                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 577                          const struct rte_flow_action *action,
 578                          struct rte_flow_error *error)
 579 {
 580         const struct rte_flow_action_set_mac *conf =
 581                 (const struct rte_flow_action_set_mac *)(action->conf);
 582         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 583         struct rte_flow_item_eth eth;
 584         struct rte_flow_item_eth eth_mask;
 585
 586         memset(&eth, 0, sizeof(eth));
 587         memset(&eth_mask, 0, sizeof(eth_mask));
 588         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 589                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 590                        sizeof(eth.src.addr_bytes));
 591                 memcpy(&eth_mask.src.addr_bytes,
 592                        &rte_flow_item_eth_mask.src.addr_bytes,
 593                        sizeof(eth_mask.src.addr_bytes));
 594         } else {
 595                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 596                        sizeof(eth.dst.addr_bytes));
 597                 memcpy(&eth_mask.dst.addr_bytes,
 598                        &rte_flow_item_eth_mask.dst.addr_bytes,
 599                        sizeof(eth_mask.dst.addr_bytes));
 600         }
 601         item.spec = &eth;
 602         item.mask = &eth_mask;
 603         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 604                                              MLX5_MODIFICATION_TYPE_SET, error);
 605 }
 606
 607 /**
 608  * Convert modify-header set VLAN VID action to DV specification.
 609  *
 610  * @param[in,out] resource
 611  *   Pointer to the modify-header resource.
 612  * @param[in] action
 613  *   Pointer to action specification.
 614  * @param[out] error
 615  *   Pointer to the error structure.
 616  *
 617  * @return
 618  *   0 on success, a negative errno value otherwise and rte_errno is set.
 619  */
 620 static int
 621 flow_dv_convert_action_modify_vlan_vid
 622                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 623                          const struct rte_flow_action *action,
 624                          struct rte_flow_error *error)
 625 {
 626         const struct rte_flow_action_of_set_vlan_vid *conf =
 627                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 628         int i = resource->actions_num;
 629         struct mlx5_modification_cmd *actions = resource->actions;
 630         struct field_modify_info *field = modify_vlan_out_first_vid;
 631
 632         if (i >= MLX5_MAX_MODIFY_NUM)
 633                 return rte_flow_error_set(error, EINVAL,
 634                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 635                          "too many items to modify");
 636         actions[i] = (struct mlx5_modification_cmd) {
 637                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 638                 .field = field->id,
 639                 .length = field->size,
 640                 .offset = field->offset,
 641         };
 642         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 643         actions[i].data1 = conf->vlan_vid;
 644         actions[i].data1 = actions[i].data1 << 16;
 645         resource->actions_num = ++i;
 646         return 0;
 647 }
 648
 649 /**
 650  * Convert modify-header set TP action to DV specification.
 651  *
 652  * @param[in,out] resource
 653  *   Pointer to the modify-header resource.
 654  * @param[in] action
 655  *   Pointer to action specification.
 656  * @param[in] items
 657  *   Pointer to rte_flow_item objects list.
 658  * @param[in] attr
 659  *   Pointer to flow attributes structure.
 660  * @param[in] dev_flow
 661  *   Pointer to the sub flow.
 662  * @param[in] tunnel_decap
 663  *   Whether action is after tunnel decapsulation.
 664  * @param[out] error
 665  *   Pointer to the error structure.
 666  *
 667  * @return
 668  *   0 on success, a negative errno value otherwise and rte_errno is set.
 669  */
 670 static int
 671 flow_dv_convert_action_modify_tp
 672                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 673                          const struct rte_flow_action *action,
 674                          const struct rte_flow_item *items,
 675                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 676                          bool tunnel_decap, struct rte_flow_error *error)
 677 {
 678         const struct rte_flow_action_set_tp *conf =
 679                 (const struct rte_flow_action_set_tp *)(action->conf);
 680         struct rte_flow_item item;
 681         struct rte_flow_item_udp udp;
 682         struct rte_flow_item_udp udp_mask;
 683         struct rte_flow_item_tcp tcp;
 684         struct rte_flow_item_tcp tcp_mask;
 685         struct field_modify_info *field;
 686
 687         if (!attr->valid)
 688                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 689         if (attr->udp) {
 690                 memset(&udp, 0, sizeof(udp));
 691                 memset(&udp_mask, 0, sizeof(udp_mask));
 692                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 693                         udp.hdr.src_port = conf->port;
 694                         udp_mask.hdr.src_port =
 695                                         rte_flow_item_udp_mask.hdr.src_port;
 696                 } else {
 697                         udp.hdr.dst_port = conf->port;
 698                         udp_mask.hdr.dst_port =
 699                                         rte_flow_item_udp_mask.hdr.dst_port;
 700                 }
 701                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 702                 item.spec = &udp;
 703                 item.mask = &udp_mask;
 704                 field = modify_udp;
 705         }
 706         if (attr->tcp) {
 707                 memset(&tcp, 0, sizeof(tcp));
 708                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 709                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 710                         tcp.hdr.src_port = conf->port;
 711                         tcp_mask.hdr.src_port =
 712                                         rte_flow_item_tcp_mask.hdr.src_port;
 713                 } else {
 714                         tcp.hdr.dst_port = conf->port;
 715                         tcp_mask.hdr.dst_port =
 716                                         rte_flow_item_tcp_mask.hdr.dst_port;
 717                 }
 718                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 719                 item.spec = &tcp;
 720                 item.mask = &tcp_mask;
 721                 field = modify_tcp;
 722         }
 723         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 724                                              MLX5_MODIFICATION_TYPE_SET, error);
 725 }
 726
 727 /**
 728  * Convert modify-header set TTL action to DV specification.
 729  *
 730  * @param[in,out] resource
 731  *   Pointer to the modify-header resource.
 732  * @param[in] action
 733  *   Pointer to action specification.
 734  * @param[in] items
 735  *   Pointer to rte_flow_item objects list.
 736  * @param[in] attr
 737  *   Pointer to flow attributes structure.
 738  * @param[in] dev_flow
 739  *   Pointer to the sub flow.
 740  * @param[in] tunnel_decap
 741  *   Whether action is after tunnel decapsulation.
 742  * @param[out] error
 743  *   Pointer to the error structure.
 744  *
 745  * @return
 746  *   0 on success, a negative errno value otherwise and rte_errno is set.
 747  */
 748 static int
 749 flow_dv_convert_action_modify_ttl
 750                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 751                          const struct rte_flow_action *action,
 752                          const struct rte_flow_item *items,
 753                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 754                          bool tunnel_decap, struct rte_flow_error *error)
 755 {
 756         const struct rte_flow_action_set_ttl *conf =
 757                 (const struct rte_flow_action_set_ttl *)(action->conf);
 758         struct rte_flow_item item;
 759         struct rte_flow_item_ipv4 ipv4;
 760         struct rte_flow_item_ipv4 ipv4_mask;
 761         struct rte_flow_item_ipv6 ipv6;
 762         struct rte_flow_item_ipv6 ipv6_mask;
 763         struct field_modify_info *field;
 764
 765         if (!attr->valid)
 766                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 767         if (attr->ipv4) {
 768                 memset(&ipv4, 0, sizeof(ipv4));
 769                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 770                 ipv4.hdr.time_to_live = conf->ttl_value;
 771                 ipv4_mask.hdr.time_to_live = 0xFF;
 772                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 773                 item.spec = &ipv4;
 774                 item.mask = &ipv4_mask;
 775                 field = modify_ipv4;
 776         }
 777         if (attr->ipv6) {
 778                 memset(&ipv6, 0, sizeof(ipv6));
 779                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 780                 ipv6.hdr.hop_limits = conf->ttl_value;
 781                 ipv6_mask.hdr.hop_limits = 0xFF;
 782                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 783                 item.spec = &ipv6;
 784                 item.mask = &ipv6_mask;
 785                 field = modify_ipv6;
 786         }
 787         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 788                                              MLX5_MODIFICATION_TYPE_SET, error);
 789 }
 790
 791 /**
 792  * Convert modify-header decrement TTL action to DV specification.
 793  *
 794  * @param[in,out] resource
 795  *   Pointer to the modify-header resource.
 796  * @param[in] action
 797  *   Pointer to action specification.
 798  * @param[in] items
 799  *   Pointer to rte_flow_item objects list.
 800  * @param[in] attr
 801  *   Pointer to flow attributes structure.
 802  * @param[in] dev_flow
 803  *   Pointer to the sub flow.
 804  * @param[in] tunnel_decap
 805  *   Whether action is after tunnel decapsulation.
 806  * @param[out] error
 807  *   Pointer to the error structure.
 808  *
 809  * @return
 810  *   0 on success, a negative errno value otherwise and rte_errno is set.
 811  */
 812 static int
 813 flow_dv_convert_action_modify_dec_ttl
 814                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 815                          const struct rte_flow_item *items,
 816                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 817                          bool tunnel_decap, struct rte_flow_error *error)
 818 {
 819         struct rte_flow_item item;
 820         struct rte_flow_item_ipv4 ipv4;
 821         struct rte_flow_item_ipv4 ipv4_mask;
 822         struct rte_flow_item_ipv6 ipv6;
 823         struct rte_flow_item_ipv6 ipv6_mask;
 824         struct field_modify_info *field;
 825
 826         if (!attr->valid)
 827                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 828         if (attr->ipv4) {
 829                 memset(&ipv4, 0, sizeof(ipv4));
 830                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 831                 ipv4.hdr.time_to_live = 0xFF;
 832                 ipv4_mask.hdr.time_to_live = 0xFF;
 833                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 834                 item.spec = &ipv4;
 835                 item.mask = &ipv4_mask;
 836                 field = modify_ipv4;
 837         }
 838         if (attr->ipv6) {
 839                 memset(&ipv6, 0, sizeof(ipv6));
 840                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 841                 ipv6.hdr.hop_limits = 0xFF;
 842                 ipv6_mask.hdr.hop_limits = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 844                 item.spec = &ipv6;
 845                 item.mask = &ipv6_mask;
 846                 field = modify_ipv6;
 847         }
 848         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 849                                              MLX5_MODIFICATION_TYPE_ADD, error);
 850 }
 851
 852 /**
 853  * Convert modify-header increment/decrement TCP Sequence number
 854  * to DV specification.
 855  *
 856  * @param[in,out] resource
 857  *   Pointer to the modify-header resource.
 858  * @param[in] action
 859  *   Pointer to action specification.
 860  * @param[out] error
 861  *   Pointer to the error structure.
 862  *
 863  * @return
 864  *   0 on success, a negative errno value otherwise and rte_errno is set.
 865  */
 866 static int
 867 flow_dv_convert_action_modify_tcp_seq
 868                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 869                          const struct rte_flow_action *action,
 870                          struct rte_flow_error *error)
 871 {
 872         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 873         uint64_t value = rte_be_to_cpu_32(*conf);
 874         struct rte_flow_item item;
 875         struct rte_flow_item_tcp tcp;
 876         struct rte_flow_item_tcp tcp_mask;
 877
 878         memset(&tcp, 0, sizeof(tcp));
 879         memset(&tcp_mask, 0, sizeof(tcp_mask));
 880         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 881                 /*
 882                  * The HW has no decrement operation, only increment operation.
 883                  * To simulate decrement X from Y using increment operation
 884                  * we need to add UINT32_MAX X times to Y.
 885                  * Each adding of UINT32_MAX decrements Y by 1.
 886                  */
 887                 value *= UINT32_MAX;
 888         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 889         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 890         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 891         item.spec = &tcp;
 892         item.mask = &tcp_mask;
 893         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 894                                              MLX5_MODIFICATION_TYPE_ADD, error);
 895 }
 896
 897 /**
 898  * Convert modify-header increment/decrement TCP Acknowledgment number
 899  * to DV specification.
 900  *
 901  * @param[in,out] resource
 902  *   Pointer to the modify-header resource.
 903  * @param[in] action
 904  *   Pointer to action specification.
 905  * @param[out] error
 906  *   Pointer to the error structure.
 907  *
 908  * @return
 909  *   0 on success, a negative errno value otherwise and rte_errno is set.
 910  */
 911 static int
 912 flow_dv_convert_action_modify_tcp_ack
 913                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 914                          const struct rte_flow_action *action,
 915                          struct rte_flow_error *error)
 916 {
 917         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 918         uint64_t value = rte_be_to_cpu_32(*conf);
 919         struct rte_flow_item item;
 920         struct rte_flow_item_tcp tcp;
 921         struct rte_flow_item_tcp tcp_mask;
 922
 923         memset(&tcp, 0, sizeof(tcp));
 924         memset(&tcp_mask, 0, sizeof(tcp_mask));
 925         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 926                 /*
 927                  * The HW has no decrement operation, only increment operation.
 928                  * To simulate decrement X from Y using increment operation
 929                  * we need to add UINT32_MAX X times to Y.
 930                  * Each adding of UINT32_MAX decrements Y by 1.
 931                  */
 932                 value *= UINT32_MAX;
 933         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 934         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 935         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 936         item.spec = &tcp;
 937         item.mask = &tcp_mask;
 938         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 939                                              MLX5_MODIFICATION_TYPE_ADD, error);
 940 }
 941
 942 static enum mlx5_modification_field reg_to_field[] = {
 943         [REG_NONE] = MLX5_MODI_OUT_NONE,
 944         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 945         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 946         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 947         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 948         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 949         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 950         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 951         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 952         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 953         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 954 };
 955
 956 /**
 957  * Convert register set to DV specification.
 958  *
 959  * @param[in,out] resource
 960  *   Pointer to the modify-header resource.
 961  * @param[in] action
 962  *   Pointer to action specification.
 963  * @param[out] error
 964  *   Pointer to the error structure.
 965  *
 966  * @return
 967  *   0 on success, a negative errno value otherwise and rte_errno is set.
 968  */
 969 static int
 970 flow_dv_convert_action_set_reg
 971                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 972                          const struct rte_flow_action *action,
 973                          struct rte_flow_error *error)
 974 {
 975         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 976         struct mlx5_modification_cmd *actions = resource->actions;
 977         uint32_t i = resource->actions_num;
 978
 979         if (i >= MLX5_MAX_MODIFY_NUM)
 980                 return rte_flow_error_set(error, EINVAL,
 981                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 982                                           "too many items to modify");
 983         MLX5_ASSERT(conf->id != REG_NONE);
 984         MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field));
 985         actions[i] = (struct mlx5_modification_cmd) {
 986                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 987                 .field = reg_to_field[conf->id],
 988         };
 989         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 990         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 991         ++i;
 992         resource->actions_num = i;
 993         return 0;
 994 }
 995
 996 /**
 997  * Convert SET_TAG action to DV specification.
 998  *
 999  * @param[in] dev
1000  *   Pointer to the rte_eth_dev structure.
1001  * @param[in,out] resource
1002  *   Pointer to the modify-header resource.
1003  * @param[in] conf
1004  *   Pointer to action specification.
1005  * @param[out] error
1006  *   Pointer to the error structure.
1007  *
1008  * @return
1009  *   0 on success, a negative errno value otherwise and rte_errno is set.
1010  */
1011 static int
1012 flow_dv_convert_action_set_tag
1013                         (struct rte_eth_dev *dev,
1014                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1015                          const struct rte_flow_action_set_tag *conf,
1016                          struct rte_flow_error *error)
1017 {
1018         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1019         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1020         struct rte_flow_item item = {
1021                 .spec = &data,
1022                 .mask = &mask,
1023         };
1024         struct field_modify_info reg_c_x[] = {
1025                 [1] = {0, 0, 0},
1026         };
1027         enum mlx5_modification_field reg_type;
1028         int ret;
1029
1030         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1031         if (ret < 0)
1032                 return ret;
1033         MLX5_ASSERT(ret != REG_NONE);
1034         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1035         reg_type = reg_to_field[ret];
1036         MLX5_ASSERT(reg_type > 0);
1037         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1038         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1039                                              MLX5_MODIFICATION_TYPE_SET, error);
1040 }
1041
1042 /**
1043  * Convert internal COPY_REG action to DV specification.
1044  *
1045  * @param[in] dev
1046  *   Pointer to the rte_eth_dev structure.
1047  * @param[in,out] res
1048  *   Pointer to the modify-header resource.
1049  * @param[in] action
1050  *   Pointer to action specification.
1051  * @param[out] error
1052  *   Pointer to the error structure.
1053  *
1054  * @return
1055  *   0 on success, a negative errno value otherwise and rte_errno is set.
1056  */
1057 static int
1058 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1059                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1060                                  const struct rte_flow_action *action,
1061                                  struct rte_flow_error *error)
1062 {
1063         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1064         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1065         struct rte_flow_item item = {
1066                 .spec = NULL,
1067                 .mask = &mask,
1068         };
1069         struct field_modify_info reg_src[] = {
1070                 {4, 0, reg_to_field[conf->src]},
1071                 {0, 0, 0},
1072         };
1073         struct field_modify_info reg_dst = {
1074                 .offset = 0,
1075                 .id = reg_to_field[conf->dst],
1076         };
1077         /* Adjust reg_c[0] usage according to reported mask. */
1078         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1079                 struct mlx5_priv *priv = dev->data->dev_private;
1080                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1081
1082                 MLX5_ASSERT(reg_c0);
1083                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1084                 if (conf->dst == REG_C_0) {
1085                         /* Copy to reg_c[0], within mask only. */
1086                         reg_dst.offset = rte_bsf32(reg_c0);
1087                         /*
1088                          * Mask is ignoring the enianness, because
1089                          * there is no conversion in datapath.
1090                          */
1091 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1092                         /* Copy from destination lower bits to reg_c[0]. */
1093                         mask = reg_c0 >> reg_dst.offset;
1094 #else
1095                         /* Copy from destination upper bits to reg_c[0]. */
1096                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1097                                           rte_fls_u32(reg_c0));
1098 #endif
1099                 } else {
1100                         mask = rte_cpu_to_be_32(reg_c0);
1101 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1102                         /* Copy from reg_c[0] to destination lower bits. */
1103                         reg_dst.offset = 0;
1104 #else
1105                         /* Copy from reg_c[0] to destination upper bits. */
1106                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1107                                          (rte_fls_u32(reg_c0) -
1108                                           rte_bsf32(reg_c0));
1109 #endif
1110                 }
1111         }
1112         return flow_dv_convert_modify_action(&item,
1113                                              reg_src, &reg_dst, res,
1114                                              MLX5_MODIFICATION_TYPE_COPY,
1115                                              error);
1116 }
1117
1118 /**
1119  * Convert MARK action to DV specification. This routine is used
1120  * in extensive metadata only and requires metadata register to be
1121  * handled. In legacy mode hardware tag resource is engaged.
1122  *
1123  * @param[in] dev
1124  *   Pointer to the rte_eth_dev structure.
1125  * @param[in] conf
1126  *   Pointer to MARK action specification.
1127  * @param[in,out] resource
1128  *   Pointer to the modify-header resource.
1129  * @param[out] error
1130  *   Pointer to the error structure.
1131  *
1132  * @return
1133  *   0 on success, a negative errno value otherwise and rte_errno is set.
1134  */
1135 static int
1136 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1137                             const struct rte_flow_action_mark *conf,
1138                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1139                             struct rte_flow_error *error)
1140 {
1141         struct mlx5_priv *priv = dev->data->dev_private;
1142         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1143                                            priv->sh->dv_mark_mask);
1144         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1145         struct rte_flow_item item = {
1146                 .spec = &data,
1147                 .mask = &mask,
1148         };
1149         struct field_modify_info reg_c_x[] = {
1150                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1151                 {0, 0, 0},
1152         };
1153         int reg;
1154
1155         if (!mask)
1156                 return rte_flow_error_set(error, EINVAL,
1157                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1158                                           NULL, "zero mark action mask");
1159         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1160         if (reg < 0)
1161                 return reg;
1162         MLX5_ASSERT(reg > 0);
1163         if (reg == REG_C_0) {
1164                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1165                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1166
1167                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1168                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1169                 mask = rte_cpu_to_be_32(mask << shl_c0);
1170         }
1171         reg_c_x[0].id = reg_to_field[reg];
1172         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1173                                              MLX5_MODIFICATION_TYPE_SET, error);
1174 }
1175
1176 /**
1177  * Get metadata register index for specified steering domain.
1178  *
1179  * @param[in] dev
1180  *   Pointer to the rte_eth_dev structure.
1181  * @param[in] attr
1182  *   Attributes of flow to determine steering domain.
1183  * @param[out] error
1184  *   Pointer to the error structure.
1185  *
1186  * @return
1187  *   positive index on success, a negative errno value otherwise
1188  *   and rte_errno is set.
1189  */
1190 static enum modify_reg
1191 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1192                          const struct rte_flow_attr *attr,
1193                          struct rte_flow_error *error)
1194 {
1195         int reg =
1196                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1197                                           MLX5_METADATA_FDB :
1198                                             attr->egress ?
1199                                             MLX5_METADATA_TX :
1200                                             MLX5_METADATA_RX, 0, error);
1201         if (reg < 0)
1202                 return rte_flow_error_set(error,
1203                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1204                                           NULL, "unavailable "
1205                                           "metadata register");
1206         return reg;
1207 }
1208
1209 /**
1210  * Convert SET_META action to DV specification.
1211  *
1212  * @param[in] dev
1213  *   Pointer to the rte_eth_dev structure.
1214  * @param[in,out] resource
1215  *   Pointer to the modify-header resource.
1216  * @param[in] attr
1217  *   Attributes of flow that includes this item.
1218  * @param[in] conf
1219  *   Pointer to action specification.
1220  * @param[out] error
1221  *   Pointer to the error structure.
1222  *
1223  * @return
1224  *   0 on success, a negative errno value otherwise and rte_errno is set.
1225  */
1226 static int
1227 flow_dv_convert_action_set_meta
1228                         (struct rte_eth_dev *dev,
1229                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1230                          const struct rte_flow_attr *attr,
1231                          const struct rte_flow_action_set_meta *conf,
1232                          struct rte_flow_error *error)
1233 {
1234         uint32_t data = conf->data;
1235         uint32_t mask = conf->mask;
1236         struct rte_flow_item item = {
1237                 .spec = &data,
1238                 .mask = &mask,
1239         };
1240         struct field_modify_info reg_c_x[] = {
1241                 [1] = {0, 0, 0},
1242         };
1243         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1244
1245         if (reg < 0)
1246                 return reg;
1247         /*
1248          * In datapath code there is no endianness
1249          * coversions for perfromance reasons, all
1250          * pattern conversions are done in rte_flow.
1251          */
1252         if (reg == REG_C_0) {
1253                 struct mlx5_priv *priv = dev->data->dev_private;
1254                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1255                 uint32_t shl_c0;
1256
1257                 MLX5_ASSERT(msk_c0);
1258 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1259                 shl_c0 = rte_bsf32(msk_c0);
1260 #else
1261                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1262 #endif
1263                 mask <<= shl_c0;
1264                 data <<= shl_c0;
1265                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1266         }
1267         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1268         /* The routine expects parameters in memory as big-endian ones. */
1269         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1270                                              MLX5_MODIFICATION_TYPE_SET, error);
1271 }
1272
1273 /**
1274  * Convert modify-header set IPv4 DSCP action to DV specification.
1275  *
1276  * @param[in,out] resource
1277  *   Pointer to the modify-header resource.
1278  * @param[in] action
1279  *   Pointer to action specification.
1280  * @param[out] error
1281  *   Pointer to the error structure.
1282  *
1283  * @return
1284  *   0 on success, a negative errno value otherwise and rte_errno is set.
1285  */
1286 static int
1287 flow_dv_convert_action_modify_ipv4_dscp
1288                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1289                          const struct rte_flow_action *action,
1290                          struct rte_flow_error *error)
1291 {
1292         const struct rte_flow_action_set_dscp *conf =
1293                 (const struct rte_flow_action_set_dscp *)(action->conf);
1294         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1295         struct rte_flow_item_ipv4 ipv4;
1296         struct rte_flow_item_ipv4 ipv4_mask;
1297
1298         memset(&ipv4, 0, sizeof(ipv4));
1299         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1300         ipv4.hdr.type_of_service = conf->dscp;
1301         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1302         item.spec = &ipv4;
1303         item.mask = &ipv4_mask;
1304         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1305                                              MLX5_MODIFICATION_TYPE_SET, error);
1306 }
1307
1308 /**
1309  * Convert modify-header set IPv6 DSCP action to DV specification.
1310  *
1311  * @param[in,out] resource
1312  *   Pointer to the modify-header resource.
1313  * @param[in] action
1314  *   Pointer to action specification.
1315  * @param[out] error
1316  *   Pointer to the error structure.
1317  *
1318  * @return
1319  *   0 on success, a negative errno value otherwise and rte_errno is set.
1320  */
1321 static int
1322 flow_dv_convert_action_modify_ipv6_dscp
1323                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1324                          const struct rte_flow_action *action,
1325                          struct rte_flow_error *error)
1326 {
1327         const struct rte_flow_action_set_dscp *conf =
1328                 (const struct rte_flow_action_set_dscp *)(action->conf);
1329         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1330         struct rte_flow_item_ipv6 ipv6;
1331         struct rte_flow_item_ipv6 ipv6_mask;
1332
1333         memset(&ipv6, 0, sizeof(ipv6));
1334         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1335         /*
1336          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1337          * rdma-core only accept the DSCP bits byte aligned start from
1338          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1339          * bits in IPv6 case as rdma-core requires byte aligned value.
1340          */
1341         ipv6.hdr.vtc_flow = conf->dscp;
1342         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1343         item.spec = &ipv6;
1344         item.mask = &ipv6_mask;
1345         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1346                                              MLX5_MODIFICATION_TYPE_SET, error);
1347 }
1348
1349 /**
1350  * Validate MARK item.
1351  *
1352  * @param[in] dev
1353  *   Pointer to the rte_eth_dev structure.
1354  * @param[in] item
1355  *   Item specification.
1356  * @param[in] attr
1357  *   Attributes of flow that includes this item.
1358  * @param[out] error
1359  *   Pointer to error structure.
1360  *
1361  * @return
1362  *   0 on success, a negative errno value otherwise and rte_errno is set.
1363  */
1364 static int
1365 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1366                            const struct rte_flow_item *item,
1367                            const struct rte_flow_attr *attr __rte_unused,
1368                            struct rte_flow_error *error)
1369 {
1370         struct mlx5_priv *priv = dev->data->dev_private;
1371         struct mlx5_dev_config *config = &priv->config;
1372         const struct rte_flow_item_mark *spec = item->spec;
1373         const struct rte_flow_item_mark *mask = item->mask;
1374         const struct rte_flow_item_mark nic_mask = {
1375                 .id = priv->sh->dv_mark_mask,
1376         };
1377         int ret;
1378
1379         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1380                 return rte_flow_error_set(error, ENOTSUP,
1381                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1382                                           "extended metadata feature"
1383                                           " isn't enabled");
1384         if (!mlx5_flow_ext_mreg_supported(dev))
1385                 return rte_flow_error_set(error, ENOTSUP,
1386                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1387                                           "extended metadata register"
1388                                           " isn't supported");
1389         if (!nic_mask.id)
1390                 return rte_flow_error_set(error, ENOTSUP,
1391                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1392                                           "extended metadata register"
1393                                           " isn't available");
1394         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1395         if (ret < 0)
1396                 return ret;
1397         if (!spec)
1398                 return rte_flow_error_set(error, EINVAL,
1399                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1400                                           item->spec,
1401                                           "data cannot be empty");
1402         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1403                 return rte_flow_error_set(error, EINVAL,
1404                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1405                                           &spec->id,
1406                                           "mark id exceeds the limit");
1407         if (!mask)
1408                 mask = &nic_mask;
1409         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1410                                         (const uint8_t *)&nic_mask,
1411                                         sizeof(struct rte_flow_item_mark),
1412                                         error);
1413         if (ret < 0)
1414                 return ret;
1415         return 0;
1416 }
1417
1418 /**
1419  * Validate META item.
1420  *
1421  * @param[in] dev
1422  *   Pointer to the rte_eth_dev structure.
1423  * @param[in] item
1424  *   Item specification.
1425  * @param[in] attr
1426  *   Attributes of flow that includes this item.
1427  * @param[out] error
1428  *   Pointer to error structure.
1429  *
1430  * @return
1431  *   0 on success, a negative errno value otherwise and rte_errno is set.
1432  */
1433 static int
1434 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1435                            const struct rte_flow_item *item,
1436                            const struct rte_flow_attr *attr,
1437                            struct rte_flow_error *error)
1438 {
1439         struct mlx5_priv *priv = dev->data->dev_private;
1440         struct mlx5_dev_config *config = &priv->config;
1441         const struct rte_flow_item_meta *spec = item->spec;
1442         const struct rte_flow_item_meta *mask = item->mask;
1443         struct rte_flow_item_meta nic_mask = {
1444                 .data = UINT32_MAX
1445         };
1446         int reg;
1447         int ret;
1448
1449         if (!spec)
1450                 return rte_flow_error_set(error, EINVAL,
1451                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1452                                           item->spec,
1453                                           "data cannot be empty");
1454         if (!spec->data)
1455                 return rte_flow_error_set(error, EINVAL,
1456                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1457                                           "data cannot be zero");
1458         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1459                 if (!mlx5_flow_ext_mreg_supported(dev))
1460                         return rte_flow_error_set(error, ENOTSUP,
1461                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1462                                           "extended metadata register"
1463                                           " isn't supported");
1464                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1465                 if (reg < 0)
1466                         return reg;
1467                 if (reg == REG_B)
1468                         return rte_flow_error_set(error, ENOTSUP,
1469                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1470                                           "match on reg_b "
1471                                           "isn't supported");
1472                 if (reg != REG_A)
1473                         nic_mask.data = priv->sh->dv_meta_mask;
1474         }
1475         if (!mask)
1476                 mask = &rte_flow_item_meta_mask;
1477         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1478                                         (const uint8_t *)&nic_mask,
1479                                         sizeof(struct rte_flow_item_meta),
1480                                         error);
1481         return ret;
1482 }
1483
1484 /**
1485  * Validate TAG item.
1486  *
1487  * @param[in] dev
1488  *   Pointer to the rte_eth_dev structure.
1489  * @param[in] item
1490  *   Item specification.
1491  * @param[in] attr
1492  *   Attributes of flow that includes this item.
1493  * @param[out] error
1494  *   Pointer to error structure.
1495  *
1496  * @return
1497  *   0 on success, a negative errno value otherwise and rte_errno is set.
1498  */
1499 static int
1500 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1501                           const struct rte_flow_item *item,
1502                           const struct rte_flow_attr *attr __rte_unused,
1503                           struct rte_flow_error *error)
1504 {
1505         const struct rte_flow_item_tag *spec = item->spec;
1506         const struct rte_flow_item_tag *mask = item->mask;
1507         const struct rte_flow_item_tag nic_mask = {
1508                 .data = RTE_BE32(UINT32_MAX),
1509                 .index = 0xff,
1510         };
1511         int ret;
1512
1513         if (!mlx5_flow_ext_mreg_supported(dev))
1514                 return rte_flow_error_set(error, ENOTSUP,
1515                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1516                                           "extensive metadata register"
1517                                           " isn't supported");
1518         if (!spec)
1519                 return rte_flow_error_set(error, EINVAL,
1520                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1521                                           item->spec,
1522                                           "data cannot be empty");
1523         if (!mask)
1524                 mask = &rte_flow_item_tag_mask;
1525         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1526                                         (const uint8_t *)&nic_mask,
1527                                         sizeof(struct rte_flow_item_tag),
1528                                         error);
1529         if (ret < 0)
1530                 return ret;
1531         if (mask->index != 0xff)
1532                 return rte_flow_error_set(error, EINVAL,
1533                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1534                                           "partial mask for tag index"
1535                                           " is not supported");
1536         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1537         if (ret < 0)
1538                 return ret;
1539         MLX5_ASSERT(ret != REG_NONE);
1540         return 0;
1541 }
1542
1543 /**
1544  * Validate vport item.
1545  *
1546  * @param[in] dev
1547  *   Pointer to the rte_eth_dev structure.
1548  * @param[in] item
1549  *   Item specification.
1550  * @param[in] attr
1551  *   Attributes of flow that includes this item.
1552  * @param[in] item_flags
1553  *   Bit-fields that holds the items detected until now.
1554  * @param[out] error
1555  *   Pointer to error structure.
1556  *
1557  * @return
1558  *   0 on success, a negative errno value otherwise and rte_errno is set.
1559  */
1560 static int
1561 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1562                               const struct rte_flow_item *item,
1563                               const struct rte_flow_attr *attr,
1564                               uint64_t item_flags,
1565                               struct rte_flow_error *error)
1566 {
1567         const struct rte_flow_item_port_id *spec = item->spec;
1568         const struct rte_flow_item_port_id *mask = item->mask;
1569         const struct rte_flow_item_port_id switch_mask = {
1570                         .id = 0xffffffff,
1571         };
1572         struct mlx5_priv *esw_priv;
1573         struct mlx5_priv *dev_priv;
1574         int ret;
1575
1576         if (!attr->transfer)
1577                 return rte_flow_error_set(error, EINVAL,
1578                                           RTE_FLOW_ERROR_TYPE_ITEM,
1579                                           NULL,
1580                                           "match on port id is valid only"
1581                                           " when transfer flag is enabled");
1582         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1583                 return rte_flow_error_set(error, ENOTSUP,
1584                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1585                                           "multiple source ports are not"
1586                                           " supported");
1587         if (!mask)
1588                 mask = &switch_mask;
1589         if (mask->id != 0xffffffff)
1590                 return rte_flow_error_set(error, ENOTSUP,
1591                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1592                                            mask,
1593                                            "no support for partial mask on"
1594                                            " \"id\" field");
1595         ret = mlx5_flow_item_acceptable
1596                                 (item, (const uint8_t *)mask,
1597                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1598                                  sizeof(struct rte_flow_item_port_id),
1599                                  error);
1600         if (ret)
1601                 return ret;
1602         if (!spec)
1603                 return 0;
1604         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1605         if (!esw_priv)
1606                 return rte_flow_error_set(error, rte_errno,
1607                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1608                                           "failed to obtain E-Switch info for"
1609                                           " port");
1610         dev_priv = mlx5_dev_to_eswitch_info(dev);
1611         if (!dev_priv)
1612                 return rte_flow_error_set(error, rte_errno,
1613                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1614                                           NULL,
1615                                           "failed to obtain E-Switch info");
1616         if (esw_priv->domain_id != dev_priv->domain_id)
1617                 return rte_flow_error_set(error, EINVAL,
1618                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1619                                           "cannot match on a port from a"
1620                                           " different E-Switch");
1621         return 0;
1622 }
1623
1624 /**
1625  * Validate GTP item.
1626  *
1627  * @param[in] dev
1628  *   Pointer to the rte_eth_dev structure.
1629  * @param[in] item
1630  *   Item specification.
1631  * @param[in] item_flags
1632  *   Bit-fields that holds the items detected until now.
1633  * @param[out] error
1634  *   Pointer to error structure.
1635  *
1636  * @return
1637  *   0 on success, a negative errno value otherwise and rte_errno is set.
1638  */
1639 static int
1640 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1641                           const struct rte_flow_item *item,
1642                           uint64_t item_flags,
1643                           struct rte_flow_error *error)
1644 {
1645         struct mlx5_priv *priv = dev->data->dev_private;
1646         const struct rte_flow_item_gtp *mask = item->mask;
1647         const struct rte_flow_item_gtp nic_mask = {
1648                 .msg_type = 0xff,
1649                 .teid = RTE_BE32(0xffffffff),
1650         };
1651
1652         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1653                 return rte_flow_error_set(error, ENOTSUP,
1654                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1655                                           "GTP support is not enabled");
1656         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1657                 return rte_flow_error_set(error, ENOTSUP,
1658                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1659                                           "multiple tunnel layers not"
1660                                           " supported");
1661         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1662                 return rte_flow_error_set(error, EINVAL,
1663                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1664                                           "no outer UDP layer found");
1665         if (!mask)
1666                 mask = &rte_flow_item_gtp_mask;
1667         return mlx5_flow_item_acceptable
1668                 (item, (const uint8_t *)mask,
1669                  (const uint8_t *)&nic_mask,
1670                  sizeof(struct rte_flow_item_gtp),
1671                  error);
1672 }
1673
1674 /**
1675  * Validate the pop VLAN action.
1676  *
1677  * @param[in] dev
1678  *   Pointer to the rte_eth_dev structure.
1679  * @param[in] action_flags
1680  *   Holds the actions detected until now.
1681  * @param[in] action
1682  *   Pointer to the pop vlan action.
1683  * @param[in] item_flags
1684  *   The items found in this flow rule.
1685  * @param[in] attr
1686  *   Pointer to flow attributes.
1687  * @param[out] error
1688  *   Pointer to error structure.
1689  *
1690  * @return
1691  *   0 on success, a negative errno value otherwise and rte_errno is set.
1692  */
1693 static int
1694 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1695                                  uint64_t action_flags,
1696                                  const struct rte_flow_action *action,
1697                                  uint64_t item_flags,
1698                                  const struct rte_flow_attr *attr,
1699                                  struct rte_flow_error *error)
1700 {
1701         struct mlx5_priv *priv = dev->data->dev_private;
1702
1703         (void)action;
1704         (void)attr;
1705         if (!priv->sh->pop_vlan_action)
1706                 return rte_flow_error_set(error, ENOTSUP,
1707                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1708                                           NULL,
1709                                           "pop vlan action is not supported");
1710         if (attr->egress)
1711                 return rte_flow_error_set(error, ENOTSUP,
1712                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1713                                           NULL,
1714                                           "pop vlan action not supported for "
1715                                           "egress");
1716         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1717                 return rte_flow_error_set(error, ENOTSUP,
1718                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1719                                           "no support for multiple VLAN "
1720                                           "actions");
1721         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1722                 return rte_flow_error_set(error, ENOTSUP,
1723                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1724                                           NULL,
1725                                           "cannot pop vlan without a "
1726                                           "match on (outer) vlan in the flow");
1727         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1728                 return rte_flow_error_set(error, EINVAL,
1729                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1730                                           "wrong action order, port_id should "
1731                                           "be after pop VLAN action");
1732         return 0;
1733 }
1734
1735 /**
1736  * Get VLAN default info from vlan match info.
1737  *
1738  * @param[in] items
1739  *   the list of item specifications.
1740  * @param[out] vlan
1741  *   pointer VLAN info to fill to.
1742  *
1743  * @return
1744  *   0 on success, a negative errno value otherwise and rte_errno is set.
1745  */
1746 static void
1747 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1748                                   struct rte_vlan_hdr *vlan)
1749 {
1750         const struct rte_flow_item_vlan nic_mask = {
1751                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1752                                 MLX5DV_FLOW_VLAN_VID_MASK),
1753                 .inner_type = RTE_BE16(0xffff),
1754         };
1755
1756         if (items == NULL)
1757                 return;
1758         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1759                 int type = items->type;
1760
1761                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
1762                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
1763                         break;
1764         }
1765         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
1766                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1767                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1768
1769                 if (!vlan_m)
1770                         vlan_m = &nic_mask;
1771                 /* Only full match values are accepted */
1772                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1773                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1774                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
1775                         vlan->vlan_tci |=
1776                                 rte_be_to_cpu_16(vlan_v->tci &
1777                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1778                 }
1779                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1780                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1781                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1782                         vlan->vlan_tci |=
1783                                 rte_be_to_cpu_16(vlan_v->tci &
1784                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1785                 }
1786                 if (vlan_m->inner_type == nic_mask.inner_type)
1787                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1788                                                            vlan_m->inner_type);
1789         }
1790 }
1791
1792 /**
1793  * Validate the push VLAN action.
1794  *
1795  * @param[in] action_flags
1796  *   Holds the actions detected until now.
1797  * @param[in] item_flags
1798  *   The items found in this flow rule.
1799  * @param[in] action
1800  *   Pointer to the action structure.
1801  * @param[in] attr
1802  *   Pointer to flow attributes
1803  * @param[out] error
1804  *   Pointer to error structure.
1805  *
1806  * @return
1807  *   0 on success, a negative errno value otherwise and rte_errno is set.
1808  */
1809 static int
1810 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1811                                   uint64_t item_flags __rte_unused,
1812                                   const struct rte_flow_action *action,
1813                                   const struct rte_flow_attr *attr,
1814                                   struct rte_flow_error *error)
1815 {
1816         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1817
1818         if (!attr->transfer && attr->ingress)
1819                 return rte_flow_error_set(error, ENOTSUP,
1820                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1821                                           NULL,
1822                                           "push VLAN action not supported for "
1823                                           "ingress");
1824         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1825             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1826                 return rte_flow_error_set(error, EINVAL,
1827                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1828                                           "invalid vlan ethertype");
1829         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1830                 return rte_flow_error_set(error, ENOTSUP,
1831                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1832                                           "no support for multiple VLAN "
1833                                           "actions");
1834         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1835                 return rte_flow_error_set(error, EINVAL,
1836                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1837                                           "wrong action order, port_id should "
1838                                           "be after push VLAN");
1839         (void)attr;
1840         return 0;
1841 }
1842
1843 /**
1844  * Validate the set VLAN PCP.
1845  *
1846  * @param[in] action_flags
1847  *   Holds the actions detected until now.
1848  * @param[in] actions
1849  *   Pointer to the list of actions remaining in the flow rule.
1850  * @param[out] error
1851  *   Pointer to error structure.
1852  *
1853  * @return
1854  *   0 on success, a negative errno value otherwise and rte_errno is set.
1855  */
1856 static int
1857 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1858                                      const struct rte_flow_action actions[],
1859                                      struct rte_flow_error *error)
1860 {
1861         const struct rte_flow_action *action = actions;
1862         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1863
1864         if (conf->vlan_pcp > 7)
1865                 return rte_flow_error_set(error, EINVAL,
1866                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1867                                           "VLAN PCP value is too big");
1868         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1869                 return rte_flow_error_set(error, ENOTSUP,
1870                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1871                                           "set VLAN PCP action must follow "
1872                                           "the push VLAN action");
1873         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1874                 return rte_flow_error_set(error, ENOTSUP,
1875                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1876                                           "Multiple VLAN PCP modification are "
1877                                           "not supported");
1878         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1879                 return rte_flow_error_set(error, EINVAL,
1880                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1881                                           "wrong action order, port_id should "
1882                                           "be after set VLAN PCP");
1883         return 0;
1884 }
1885
1886 /**
1887  * Validate the set VLAN VID.
1888  *
1889  * @param[in] item_flags
1890  *   Holds the items detected in this rule.
1891  * @param[in] action_flags
1892  *   Holds the actions detected until now.
1893  * @param[in] actions
1894  *   Pointer to the list of actions remaining in the flow rule.
1895  * @param[out] error
1896  *   Pointer to error structure.
1897  *
1898  * @return
1899  *   0 on success, a negative errno value otherwise and rte_errno is set.
1900  */
1901 static int
1902 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1903                                      uint64_t action_flags,
1904                                      const struct rte_flow_action actions[],
1905                                      struct rte_flow_error *error)
1906 {
1907         const struct rte_flow_action *action = actions;
1908         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1909
1910         if (conf->vlan_vid > RTE_BE16(0xFFE))
1911                 return rte_flow_error_set(error, EINVAL,
1912                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1913                                           "VLAN VID value is too big");
1914         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1915             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1916                 return rte_flow_error_set(error, ENOTSUP,
1917                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1918                                           "set VLAN VID action must follow push"
1919                                           " VLAN action or match on VLAN item");
1920         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1921                 return rte_flow_error_set(error, ENOTSUP,
1922                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1923                                           "Multiple VLAN VID modifications are "
1924                                           "not supported");
1925         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1926                 return rte_flow_error_set(error, EINVAL,
1927                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1928                                           "wrong action order, port_id should "
1929                                           "be after set VLAN VID");
1930         return 0;
1931 }
1932
1933 /*
1934  * Validate the FLAG action.
1935  *
1936  * @param[in] dev
1937  *   Pointer to the rte_eth_dev structure.
1938  * @param[in] action_flags
1939  *   Holds the actions detected until now.
1940  * @param[in] attr
1941  *   Pointer to flow attributes
1942  * @param[out] error
1943  *   Pointer to error structure.
1944  *
1945  * @return
1946  *   0 on success, a negative errno value otherwise and rte_errno is set.
1947  */
1948 static int
1949 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1950                              uint64_t action_flags,
1951                              const struct rte_flow_attr *attr,
1952                              struct rte_flow_error *error)
1953 {
1954         struct mlx5_priv *priv = dev->data->dev_private;
1955         struct mlx5_dev_config *config = &priv->config;
1956         int ret;
1957
1958         /* Fall back if no extended metadata register support. */
1959         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1960                 return mlx5_flow_validate_action_flag(action_flags, attr,
1961                                                       error);
1962         /* Extensive metadata mode requires registers. */
1963         if (!mlx5_flow_ext_mreg_supported(dev))
1964                 return rte_flow_error_set(error, ENOTSUP,
1965                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1966                                           "no metadata registers "
1967                                           "to support flag action");
1968         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1969                 return rte_flow_error_set(error, ENOTSUP,
1970                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1971                                           "extended metadata register"
1972                                           " isn't available");
1973         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1974         if (ret < 0)
1975                 return ret;
1976         MLX5_ASSERT(ret > 0);
1977         if (action_flags & MLX5_FLOW_ACTION_MARK)
1978                 return rte_flow_error_set(error, EINVAL,
1979                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1980                                           "can't mark and flag in same flow");
1981         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1982                 return rte_flow_error_set(error, EINVAL,
1983                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1984                                           "can't have 2 flag"
1985                                           " actions in same flow");
1986         return 0;
1987 }
1988
1989 /**
1990  * Validate MARK action.
1991  *
1992  * @param[in] dev
1993  *   Pointer to the rte_eth_dev structure.
1994  * @param[in] action
1995  *   Pointer to action.
1996  * @param[in] action_flags
1997  *   Holds the actions detected until now.
1998  * @param[in] attr
1999  *   Pointer to flow attributes
2000  * @param[out] error
2001  *   Pointer to error structure.
2002  *
2003  * @return
2004  *   0 on success, a negative errno value otherwise and rte_errno is set.
2005  */
2006 static int
2007 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
2008                              const struct rte_flow_action *action,
2009                              uint64_t action_flags,
2010                              const struct rte_flow_attr *attr,
2011                              struct rte_flow_error *error)
2012 {
2013         struct mlx5_priv *priv = dev->data->dev_private;
2014         struct mlx5_dev_config *config = &priv->config;
2015         const struct rte_flow_action_mark *mark = action->conf;
2016         int ret;
2017
2018         /* Fall back if no extended metadata register support. */
2019         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2020                 return mlx5_flow_validate_action_mark(action, action_flags,
2021                                                       attr, error);
2022         /* Extensive metadata mode requires registers. */
2023         if (!mlx5_flow_ext_mreg_supported(dev))
2024                 return rte_flow_error_set(error, ENOTSUP,
2025                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2026                                           "no metadata registers "
2027                                           "to support mark action");
2028         if (!priv->sh->dv_mark_mask)
2029                 return rte_flow_error_set(error, ENOTSUP,
2030                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2031                                           "extended metadata register"
2032                                           " isn't available");
2033         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2034         if (ret < 0)
2035                 return ret;
2036         MLX5_ASSERT(ret > 0);
2037         if (!mark)
2038                 return rte_flow_error_set(error, EINVAL,
2039                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2040                                           "configuration cannot be null");
2041         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
2042                 return rte_flow_error_set(error, EINVAL,
2043                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2044                                           &mark->id,
2045                                           "mark id exceeds the limit");
2046         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2047                 return rte_flow_error_set(error, EINVAL,
2048                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2049                                           "can't flag and mark in same flow");
2050         if (action_flags & MLX5_FLOW_ACTION_MARK)
2051                 return rte_flow_error_set(error, EINVAL,
2052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2053                                           "can't have 2 mark actions in same"
2054                                           " flow");
2055         return 0;
2056 }
2057
2058 /**
2059  * Validate SET_META action.
2060  *
2061  * @param[in] dev
2062  *   Pointer to the rte_eth_dev structure.
2063  * @param[in] action
2064  *   Pointer to the action structure.
2065  * @param[in] action_flags
2066  *   Holds the actions detected until now.
2067  * @param[in] attr
2068  *   Pointer to flow attributes
2069  * @param[out] error
2070  *   Pointer to error structure.
2071  *
2072  * @return
2073  *   0 on success, a negative errno value otherwise and rte_errno is set.
2074  */
2075 static int
2076 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2077                                  const struct rte_flow_action *action,
2078                                  uint64_t action_flags __rte_unused,
2079                                  const struct rte_flow_attr *attr,
2080                                  struct rte_flow_error *error)
2081 {
2082         const struct rte_flow_action_set_meta *conf;
2083         uint32_t nic_mask = UINT32_MAX;
2084         int reg;
2085
2086         if (!mlx5_flow_ext_mreg_supported(dev))
2087                 return rte_flow_error_set(error, ENOTSUP,
2088                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2089                                           "extended metadata register"
2090                                           " isn't supported");
2091         reg = flow_dv_get_metadata_reg(dev, attr, error);
2092         if (reg < 0)
2093                 return reg;
2094         if (reg != REG_A && reg != REG_B) {
2095                 struct mlx5_priv *priv = dev->data->dev_private;
2096
2097                 nic_mask = priv->sh->dv_meta_mask;
2098         }
2099         if (!(action->conf))
2100                 return rte_flow_error_set(error, EINVAL,
2101                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2102                                           "configuration cannot be null");
2103         conf = (const struct rte_flow_action_set_meta *)action->conf;
2104         if (!conf->mask)
2105                 return rte_flow_error_set(error, EINVAL,
2106                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2107                                           "zero mask doesn't have any effect");
2108         if (conf->mask & ~nic_mask)
2109                 return rte_flow_error_set(error, EINVAL,
2110                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2111                                           "meta data must be within reg C0");
2112         return 0;
2113 }
2114
2115 /**
2116  * Validate SET_TAG action.
2117  *
2118  * @param[in] dev
2119  *   Pointer to the rte_eth_dev structure.
2120  * @param[in] action
2121  *   Pointer to the action structure.
2122  * @param[in] action_flags
2123  *   Holds the actions detected until now.
2124  * @param[in] attr
2125  *   Pointer to flow attributes
2126  * @param[out] error
2127  *   Pointer to error structure.
2128  *
2129  * @return
2130  *   0 on success, a negative errno value otherwise and rte_errno is set.
2131  */
2132 static int
2133 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2134                                 const struct rte_flow_action *action,
2135                                 uint64_t action_flags,
2136                                 const struct rte_flow_attr *attr,
2137                                 struct rte_flow_error *error)
2138 {
2139         const struct rte_flow_action_set_tag *conf;
2140         const uint64_t terminal_action_flags =
2141                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2142                 MLX5_FLOW_ACTION_RSS;
2143         int ret;
2144
2145         if (!mlx5_flow_ext_mreg_supported(dev))
2146                 return rte_flow_error_set(error, ENOTSUP,
2147                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2148                                           "extensive metadata register"
2149                                           " isn't supported");
2150         if (!(action->conf))
2151                 return rte_flow_error_set(error, EINVAL,
2152                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2153                                           "configuration cannot be null");
2154         conf = (const struct rte_flow_action_set_tag *)action->conf;
2155         if (!conf->mask)
2156                 return rte_flow_error_set(error, EINVAL,
2157                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2158                                           "zero mask doesn't have any effect");
2159         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2160         if (ret < 0)
2161                 return ret;
2162         if (!attr->transfer && attr->ingress &&
2163             (action_flags & terminal_action_flags))
2164                 return rte_flow_error_set(error, EINVAL,
2165                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2166                                           "set_tag has no effect"
2167                                           " with terminal actions");
2168         return 0;
2169 }
2170
2171 /**
2172  * Validate count action.
2173  *
2174  * @param[in] dev
2175  *   Pointer to rte_eth_dev structure.
2176  * @param[out] error
2177  *   Pointer to error structure.
2178  *
2179  * @return
2180  *   0 on success, a negative errno value otherwise and rte_errno is set.
2181  */
2182 static int
2183 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2184                               struct rte_flow_error *error)
2185 {
2186         struct mlx5_priv *priv = dev->data->dev_private;
2187
2188         if (!priv->config.devx)
2189                 goto notsup_err;
2190 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2191         return 0;
2192 #endif
2193 notsup_err:
2194         return rte_flow_error_set
2195                       (error, ENOTSUP,
2196                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2197                        NULL,
2198                        "count action not supported");
2199 }
2200
2201 /**
2202  * Validate the L2 encap action.
2203  *
2204  * @param[in] action_flags
2205  *   Holds the actions detected until now.
2206  * @param[in] action
2207  *   Pointer to the action structure.
2208  * @param[out] error
2209  *   Pointer to error structure.
2210  *
2211  * @return
2212  *   0 on success, a negative errno value otherwise and rte_errno is set.
2213  */
2214 static int
2215 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2216                                  const struct rte_flow_action *action,
2217                                  struct rte_flow_error *error)
2218 {
2219         if (!(action->conf))
2220                 return rte_flow_error_set(error, EINVAL,
2221                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2222                                           "configuration cannot be null");
2223         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
2224                 return rte_flow_error_set(error, EINVAL,
2225                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2226                                           "can only have a single encap action "
2227                                           "in a flow");
2228         return 0;
2229 }
2230
2231 /**
2232  * Validate a decap action.
2233  *
2234  * @param[in] action_flags
2235  *   Holds the actions detected until now.
2236  * @param[in] attr
2237  *   Pointer to flow attributes
2238  * @param[out] error
2239  *   Pointer to error structure.
2240  *
2241  * @return
2242  *   0 on success, a negative errno value otherwise and rte_errno is set.
2243  */
2244 static int
2245 flow_dv_validate_action_decap(uint64_t action_flags,
2246                                  const struct rte_flow_attr *attr,
2247                                  struct rte_flow_error *error)
2248 {
2249         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
2250                 return rte_flow_error_set(error, ENOTSUP,
2251                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2252                                           action_flags &
2253                                           MLX5_FLOW_ACTION_DECAP ? "can only "
2254                                           "have a single decap action" : "decap "
2255                                           "after encap is not supported");
2256         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2257                 return rte_flow_error_set(error, EINVAL,
2258                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2259                                           "can't have decap action after"
2260                                           " modify action");
2261         if (attr->egress)
2262                 return rte_flow_error_set(error, ENOTSUP,
2263                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2264                                           NULL,
2265                                           "decap action not supported for "
2266                                           "egress");
2267         return 0;
2268 }
2269
2270 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
2271
2272 /**
2273  * Validate the raw encap and decap actions.
2274  *
2275  * @param[in] decap
2276  *   Pointer to the decap action.
2277  * @param[in] encap
2278  *   Pointer to the encap action.
2279  * @param[in] attr
2280  *   Pointer to flow attributes
2281  * @param[in/out] action_flags
2282  *   Holds the actions detected until now.
2283  * @param[out] actions_n
2284  *   pointer to the number of actions counter.
2285  * @param[out] error
2286  *   Pointer to error structure.
2287  *
2288  * @return
2289  *   0 on success, a negative errno value otherwise and rte_errno is set.
2290  */
2291 static int
2292 flow_dv_validate_action_raw_encap_decap
2293         (const struct rte_flow_action_raw_decap *decap,
2294          const struct rte_flow_action_raw_encap *encap,
2295          const struct rte_flow_attr *attr, uint64_t *action_flags,
2296          int *actions_n, struct rte_flow_error *error)
2297 {
2298         int ret;
2299
2300         if (encap && (!encap->size || !encap->data))
2301                 return rte_flow_error_set(error, EINVAL,
2302                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2303                                           "raw encap data cannot be empty");
2304         if (decap && encap) {
2305                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
2306                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2307                         /* L3 encap. */
2308                         decap = NULL;
2309                 else if (encap->size <=
2310                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2311                            decap->size >
2312                            MLX5_ENCAPSULATION_DECISION_SIZE)
2313                         /* L3 decap. */
2314                         encap = NULL;
2315                 else if (encap->size >
2316                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2317                            decap->size >
2318                            MLX5_ENCAPSULATION_DECISION_SIZE)
2319                         /* 2 L2 actions: encap and decap. */
2320                         ;
2321                 else
2322                         return rte_flow_error_set(error,
2323                                 ENOTSUP,
2324                                 RTE_FLOW_ERROR_TYPE_ACTION,
2325                                 NULL, "unsupported too small "
2326                                 "raw decap and too small raw "
2327                                 "encap combination");
2328         }
2329         if (decap) {
2330                 ret = flow_dv_validate_action_decap(*action_flags, attr, error);
2331                 if (ret < 0)
2332                         return ret;
2333                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
2334                 ++(*actions_n);
2335         }
2336         if (encap) {
2337                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
2338                         return rte_flow_error_set(error, ENOTSUP,
2339                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2340                                                   NULL,
2341                                                   "small raw encap size");
2342                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
2343                         return rte_flow_error_set(error, EINVAL,
2344                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2345                                                   NULL,
2346                                                   "more than one encap action");
2347                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
2348                 ++(*actions_n);
2349         }
2350         return 0;
2351 }
2352
2353 /**
2354  * Find existing encap/decap resource or create and register a new one.
2355  *
2356  * @param[in, out] dev
2357  *   Pointer to rte_eth_dev structure.
2358  * @param[in, out] resource
2359  *   Pointer to encap/decap resource.
2360  * @parm[in, out] dev_flow
2361  *   Pointer to the dev_flow.
2362  * @param[out] error
2363  *   pointer to error structure.
2364  *
2365  * @return
2366  *   0 on success otherwise -errno and errno is set.
2367  */
2368 static int
2369 flow_dv_encap_decap_resource_register
2370                         (struct rte_eth_dev *dev,
2371                          struct mlx5_flow_dv_encap_decap_resource *resource,
2372                          struct mlx5_flow *dev_flow,
2373                          struct rte_flow_error *error)
2374 {
2375         struct mlx5_priv *priv = dev->data->dev_private;
2376         struct mlx5_ibv_shared *sh = priv->sh;
2377         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2378         struct mlx5dv_dr_domain *domain;
2379
2380         resource->flags = dev_flow->group ? 0 : 1;
2381         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2382                 domain = sh->fdb_domain;
2383         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2384                 domain = sh->rx_domain;
2385         else
2386                 domain = sh->tx_domain;
2387         /* Lookup a matching resource from cache. */
2388         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2389                 if (resource->reformat_type == cache_resource->reformat_type &&
2390                     resource->ft_type == cache_resource->ft_type &&
2391                     resource->flags == cache_resource->flags &&
2392                     resource->size == cache_resource->size &&
2393                     !memcmp((const void *)resource->buf,
2394                             (const void *)cache_resource->buf,
2395                             resource->size)) {
2396                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2397                                 (void *)cache_resource,
2398                                 rte_atomic32_read(&cache_resource->refcnt));
2399                         rte_atomic32_inc(&cache_resource->refcnt);
2400                         dev_flow->dv.encap_decap = cache_resource;
2401                         return 0;
2402                 }
2403         }
2404         /* Register new encap/decap resource. */
2405         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2406         if (!cache_resource)
2407                 return rte_flow_error_set(error, ENOMEM,
2408                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2409                                           "cannot allocate resource memory");
2410         *cache_resource = *resource;
2411         cache_resource->verbs_action =
2412                 mlx5_glue->dv_create_flow_action_packet_reformat
2413                         (sh->ctx, cache_resource->reformat_type,
2414                          cache_resource->ft_type, domain, cache_resource->flags,
2415                          cache_resource->size,
2416                          (cache_resource->size ? cache_resource->buf : NULL));
2417         if (!cache_resource->verbs_action) {
2418                 rte_free(cache_resource);
2419                 return rte_flow_error_set(error, ENOMEM,
2420                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2421                                           NULL, "cannot create action");
2422         }
2423         rte_atomic32_init(&cache_resource->refcnt);
2424         rte_atomic32_inc(&cache_resource->refcnt);
2425         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2426         dev_flow->dv.encap_decap = cache_resource;
2427         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2428                 (void *)cache_resource,
2429                 rte_atomic32_read(&cache_resource->refcnt));
2430         return 0;
2431 }
2432
2433 /**
2434  * Find existing table jump resource or create and register a new one.
2435  *
2436  * @param[in, out] dev
2437  *   Pointer to rte_eth_dev structure.
2438  * @param[in, out] tbl
2439  *   Pointer to flow table resource.
2440  * @parm[in, out] dev_flow
2441  *   Pointer to the dev_flow.
2442  * @param[out] error
2443  *   pointer to error structure.
2444  *
2445  * @return
2446  *   0 on success otherwise -errno and errno is set.
2447  */
2448 static int
2449 flow_dv_jump_tbl_resource_register
2450                         (struct rte_eth_dev *dev __rte_unused,
2451                          struct mlx5_flow_tbl_resource *tbl,
2452                          struct mlx5_flow *dev_flow,
2453                          struct rte_flow_error *error)
2454 {
2455         struct mlx5_flow_tbl_data_entry *tbl_data =
2456                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2457         int cnt;
2458
2459         MLX5_ASSERT(tbl);
2460         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2461         if (!cnt) {
2462                 tbl_data->jump.action =
2463                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2464                         (tbl->obj);
2465                 if (!tbl_data->jump.action)
2466                         return rte_flow_error_set(error, ENOMEM,
2467                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2468                                         NULL, "cannot create jump action");
2469                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2470                         (void *)&tbl_data->jump, cnt);
2471         } else {
2472                 MLX5_ASSERT(tbl_data->jump.action);
2473                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2474                         (void *)&tbl_data->jump, cnt);
2475         }
2476         rte_atomic32_inc(&tbl_data->jump.refcnt);
2477         dev_flow->dv.jump = &tbl_data->jump;
2478         return 0;
2479 }
2480
2481 /**
2482  * Find existing table port ID resource or create and register a new one.
2483  *
2484  * @param[in, out] dev
2485  *   Pointer to rte_eth_dev structure.
2486  * @param[in, out] resource
2487  *   Pointer to port ID action resource.
2488  * @parm[in, out] dev_flow
2489  *   Pointer to the dev_flow.
2490  * @param[out] error
2491  *   pointer to error structure.
2492  *
2493  * @return
2494  *   0 on success otherwise -errno and errno is set.
2495  */
2496 static int
2497 flow_dv_port_id_action_resource_register
2498                         (struct rte_eth_dev *dev,
2499                          struct mlx5_flow_dv_port_id_action_resource *resource,
2500                          struct mlx5_flow *dev_flow,
2501                          struct rte_flow_error *error)
2502 {
2503         struct mlx5_priv *priv = dev->data->dev_private;
2504         struct mlx5_ibv_shared *sh = priv->sh;
2505         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2506
2507         /* Lookup a matching resource from cache. */
2508         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2509                 if (resource->port_id == cache_resource->port_id) {
2510                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2511                                 "refcnt %d++",
2512                                 (void *)cache_resource,
2513                                 rte_atomic32_read(&cache_resource->refcnt));
2514                         rte_atomic32_inc(&cache_resource->refcnt);
2515                         dev_flow->dv.port_id_action = cache_resource;
2516                         return 0;
2517                 }
2518         }
2519         /* Register new port id action resource. */
2520         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2521         if (!cache_resource)
2522                 return rte_flow_error_set(error, ENOMEM,
2523                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2524                                           "cannot allocate resource memory");
2525         *cache_resource = *resource;
2526         /*
2527          * Depending on rdma_core version the glue routine calls
2528          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2529          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2530          */
2531         cache_resource->action =
2532                 mlx5_glue->dr_create_flow_action_dest_port
2533                         (priv->sh->fdb_domain, resource->port_id);
2534         if (!cache_resource->action) {
2535                 rte_free(cache_resource);
2536                 return rte_flow_error_set(error, ENOMEM,
2537                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2538                                           NULL, "cannot create action");
2539         }
2540         rte_atomic32_init(&cache_resource->refcnt);
2541         rte_atomic32_inc(&cache_resource->refcnt);
2542         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2543         dev_flow->dv.port_id_action = cache_resource;
2544         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2545                 (void *)cache_resource,
2546                 rte_atomic32_read(&cache_resource->refcnt));
2547         return 0;
2548 }
2549
2550 /**
2551  * Find existing push vlan resource or create and register a new one.
2552  *
2553  * @param [in, out] dev
2554  *   Pointer to rte_eth_dev structure.
2555  * @param[in, out] resource
2556  *   Pointer to port ID action resource.
2557  * @parm[in, out] dev_flow
2558  *   Pointer to the dev_flow.
2559  * @param[out] error
2560  *   pointer to error structure.
2561  *
2562  * @return
2563  *   0 on success otherwise -errno and errno is set.
2564  */
2565 static int
2566 flow_dv_push_vlan_action_resource_register
2567                        (struct rte_eth_dev *dev,
2568                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2569                         struct mlx5_flow *dev_flow,
2570                         struct rte_flow_error *error)
2571 {
2572         struct mlx5_priv *priv = dev->data->dev_private;
2573         struct mlx5_ibv_shared *sh = priv->sh;
2574         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2575         struct mlx5dv_dr_domain *domain;
2576
2577         /* Lookup a matching resource from cache. */
2578         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2579                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2580                     resource->ft_type == cache_resource->ft_type) {
2581                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2582                                 "refcnt %d++",
2583                                 (void *)cache_resource,
2584                                 rte_atomic32_read(&cache_resource->refcnt));
2585                         rte_atomic32_inc(&cache_resource->refcnt);
2586                         dev_flow->dv.push_vlan_res = cache_resource;
2587                         return 0;
2588                 }
2589         }
2590         /* Register new push_vlan action resource. */
2591         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2592         if (!cache_resource)
2593                 return rte_flow_error_set(error, ENOMEM,
2594                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2595                                           "cannot allocate resource memory");
2596         *cache_resource = *resource;
2597         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2598                 domain = sh->fdb_domain;
2599         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2600                 domain = sh->rx_domain;
2601         else
2602                 domain = sh->tx_domain;
2603         cache_resource->action =
2604                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2605                                                            resource->vlan_tag);
2606         if (!cache_resource->action) {
2607                 rte_free(cache_resource);
2608                 return rte_flow_error_set(error, ENOMEM,
2609                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2610                                           NULL, "cannot create action");
2611         }
2612         rte_atomic32_init(&cache_resource->refcnt);
2613         rte_atomic32_inc(&cache_resource->refcnt);
2614         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2615         dev_flow->dv.push_vlan_res = cache_resource;
2616         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2617                 (void *)cache_resource,
2618                 rte_atomic32_read(&cache_resource->refcnt));
2619         return 0;
2620 }
2621 /**
2622  * Get the size of specific rte_flow_item_type
2623  *
2624  * @param[in] item_type
2625  *   Tested rte_flow_item_type.
2626  *
2627  * @return
2628  *   sizeof struct item_type, 0 if void or irrelevant.
2629  */
2630 static size_t
2631 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2632 {
2633         size_t retval;
2634
2635         switch (item_type) {
2636         case RTE_FLOW_ITEM_TYPE_ETH:
2637                 retval = sizeof(struct rte_flow_item_eth);
2638                 break;
2639         case RTE_FLOW_ITEM_TYPE_VLAN:
2640                 retval = sizeof(struct rte_flow_item_vlan);
2641                 break;
2642         case RTE_FLOW_ITEM_TYPE_IPV4:
2643                 retval = sizeof(struct rte_flow_item_ipv4);
2644                 break;
2645         case RTE_FLOW_ITEM_TYPE_IPV6:
2646                 retval = sizeof(struct rte_flow_item_ipv6);
2647                 break;
2648         case RTE_FLOW_ITEM_TYPE_UDP:
2649                 retval = sizeof(struct rte_flow_item_udp);
2650                 break;
2651         case RTE_FLOW_ITEM_TYPE_TCP:
2652                 retval = sizeof(struct rte_flow_item_tcp);
2653                 break;
2654         case RTE_FLOW_ITEM_TYPE_VXLAN:
2655                 retval = sizeof(struct rte_flow_item_vxlan);
2656                 break;
2657         case RTE_FLOW_ITEM_TYPE_GRE:
2658                 retval = sizeof(struct rte_flow_item_gre);
2659                 break;
2660         case RTE_FLOW_ITEM_TYPE_NVGRE:
2661                 retval = sizeof(struct rte_flow_item_nvgre);
2662                 break;
2663         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2664                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2665                 break;
2666         case RTE_FLOW_ITEM_TYPE_MPLS:
2667                 retval = sizeof(struct rte_flow_item_mpls);
2668                 break;
2669         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2670         default:
2671                 retval = 0;
2672                 break;
2673         }
2674         return retval;
2675 }
2676
2677 #define MLX5_ENCAP_IPV4_VERSION         0x40
2678 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2679 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2680 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2681 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2682 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2683 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2684
2685 /**
2686  * Convert the encap action data from list of rte_flow_item to raw buffer
2687  *
2688  * @param[in] items
2689  *   Pointer to rte_flow_item objects list.
2690  * @param[out] buf
2691  *   Pointer to the output buffer.
2692  * @param[out] size
2693  *   Pointer to the output buffer size.
2694  * @param[out] error
2695  *   Pointer to the error structure.
2696  *
2697  * @return
2698  *   0 on success, a negative errno value otherwise and rte_errno is set.
2699  */
2700 static int
2701 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2702                            size_t *size, struct rte_flow_error *error)
2703 {
2704         struct rte_ether_hdr *eth = NULL;
2705         struct rte_vlan_hdr *vlan = NULL;
2706         struct rte_ipv4_hdr *ipv4 = NULL;
2707         struct rte_ipv6_hdr *ipv6 = NULL;
2708         struct rte_udp_hdr *udp = NULL;
2709         struct rte_vxlan_hdr *vxlan = NULL;
2710         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2711         struct rte_gre_hdr *gre = NULL;
2712         size_t len;
2713         size_t temp_size = 0;
2714
2715         if (!items)
2716                 return rte_flow_error_set(error, EINVAL,
2717                                           RTE_FLOW_ERROR_TYPE_ACTION,
2718                                           NULL, "invalid empty data");
2719         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2720                 len = flow_dv_get_item_len(items->type);
2721                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2722                         return rte_flow_error_set(error, EINVAL,
2723                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2724                                                   (void *)items->type,
2725                                                   "items total size is too big"
2726                                                   " for encap action");
2727                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2728                 switch (items->type) {
2729                 case RTE_FLOW_ITEM_TYPE_ETH:
2730                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2731                         break;
2732                 case RTE_FLOW_ITEM_TYPE_VLAN:
2733                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2734                         if (!eth)
2735                                 return rte_flow_error_set(error, EINVAL,
2736                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2737                                                 (void *)items->type,
2738                                                 "eth header not found");
2739                         if (!eth->ether_type)
2740                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2741                         break;
2742                 case RTE_FLOW_ITEM_TYPE_IPV4:
2743                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2744                         if (!vlan && !eth)
2745                                 return rte_flow_error_set(error, EINVAL,
2746                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2747                                                 (void *)items->type,
2748                                                 "neither eth nor vlan"
2749                                                 " header found");
2750                         if (vlan && !vlan->eth_proto)
2751                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2752                         else if (eth && !eth->ether_type)
2753                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2754                         if (!ipv4->version_ihl)
2755                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2756                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2757                         if (!ipv4->time_to_live)
2758                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2759                         break;
2760                 case RTE_FLOW_ITEM_TYPE_IPV6:
2761                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2762                         if (!vlan && !eth)
2763                                 return rte_flow_error_set(error, EINVAL,
2764                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2765                                                 (void *)items->type,
2766                                                 "neither eth nor vlan"
2767                                                 " header found");
2768                         if (vlan && !vlan->eth_proto)
2769                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2770                         else if (eth && !eth->ether_type)
2771                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2772                         if (!ipv6->vtc_flow)
2773                                 ipv6->vtc_flow =
2774                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2775                         if (!ipv6->hop_limits)
2776                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2777                         break;
2778                 case RTE_FLOW_ITEM_TYPE_UDP:
2779                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2780                         if (!ipv4 && !ipv6)
2781                                 return rte_flow_error_set(error, EINVAL,
2782                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2783                                                 (void *)items->type,
2784                                                 "ip header not found");
2785                         if (ipv4 && !ipv4->next_proto_id)
2786                                 ipv4->next_proto_id = IPPROTO_UDP;
2787                         else if (ipv6 && !ipv6->proto)
2788                                 ipv6->proto = IPPROTO_UDP;
2789                         break;
2790                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2791                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2792                         if (!udp)
2793                                 return rte_flow_error_set(error, EINVAL,
2794                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2795                                                 (void *)items->type,
2796                                                 "udp header not found");
2797                         if (!udp->dst_port)
2798                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2799                         if (!vxlan->vx_flags)
2800                                 vxlan->vx_flags =
2801                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2802                         break;
2803                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2804                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2805                         if (!udp)
2806                                 return rte_flow_error_set(error, EINVAL,
2807                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2808                                                 (void *)items->type,
2809                                                 "udp header not found");
2810                         if (!vxlan_gpe->proto)
2811                                 return rte_flow_error_set(error, EINVAL,
2812                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2813                                                 (void *)items->type,
2814                                                 "next protocol not found");
2815                         if (!udp->dst_port)
2816                                 udp->dst_port =
2817                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2818                         if (!vxlan_gpe->vx_flags)
2819                                 vxlan_gpe->vx_flags =
2820                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2821                         break;
2822                 case RTE_FLOW_ITEM_TYPE_GRE:
2823                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2824                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2825                         if (!gre->proto)
2826                                 return rte_flow_error_set(error, EINVAL,
2827                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2828                                                 (void *)items->type,
2829                                                 "next protocol not found");
2830                         if (!ipv4 && !ipv6)
2831                                 return rte_flow_error_set(error, EINVAL,
2832                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2833                                                 (void *)items->type,
2834                                                 "ip header not found");
2835                         if (ipv4 && !ipv4->next_proto_id)
2836                                 ipv4->next_proto_id = IPPROTO_GRE;
2837                         else if (ipv6 && !ipv6->proto)
2838                                 ipv6->proto = IPPROTO_GRE;
2839                         break;
2840                 case RTE_FLOW_ITEM_TYPE_VOID:
2841                         break;
2842                 default:
2843                         return rte_flow_error_set(error, EINVAL,
2844                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2845                                                   (void *)items->type,
2846                                                   "unsupported item type");
2847                         break;
2848                 }
2849                 temp_size += len;
2850         }
2851         *size = temp_size;
2852         return 0;
2853 }
2854
2855 static int
2856 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2857 {
2858         struct rte_ether_hdr *eth = NULL;
2859         struct rte_vlan_hdr *vlan = NULL;
2860         struct rte_ipv6_hdr *ipv6 = NULL;
2861         struct rte_udp_hdr *udp = NULL;
2862         char *next_hdr;
2863         uint16_t proto;
2864
2865         eth = (struct rte_ether_hdr *)data;
2866         next_hdr = (char *)(eth + 1);
2867         proto = RTE_BE16(eth->ether_type);
2868
2869         /* VLAN skipping */
2870         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2871                 vlan = (struct rte_vlan_hdr *)next_hdr;
2872                 proto = RTE_BE16(vlan->eth_proto);
2873                 next_hdr += sizeof(struct rte_vlan_hdr);
2874         }
2875
2876         /* HW calculates IPv4 csum. no need to proceed */
2877         if (proto == RTE_ETHER_TYPE_IPV4)
2878                 return 0;
2879
2880         /* non IPv4/IPv6 header. not supported */
2881         if (proto != RTE_ETHER_TYPE_IPV6) {
2882                 return rte_flow_error_set(error, ENOTSUP,
2883                                           RTE_FLOW_ERROR_TYPE_ACTION,
2884                                           NULL, "Cannot offload non IPv4/IPv6");
2885         }
2886
2887         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2888
2889         /* ignore non UDP */
2890         if (ipv6->proto != IPPROTO_UDP)
2891                 return 0;
2892
2893         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2894         udp->dgram_cksum = 0;
2895
2896         return 0;
2897 }
2898
2899 /**
2900  * Convert L2 encap action to DV specification.
2901  *
2902  * @param[in] dev
2903  *   Pointer to rte_eth_dev structure.
2904  * @param[in] action
2905  *   Pointer to action structure.
2906  * @param[in, out] dev_flow
2907  *   Pointer to the mlx5_flow.
2908  * @param[in] transfer
2909  *   Mark if the flow is E-Switch flow.
2910  * @param[out] error
2911  *   Pointer to the error structure.
2912  *
2913  * @return
2914  *   0 on success, a negative errno value otherwise and rte_errno is set.
2915  */
2916 static int
2917 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2918                                const struct rte_flow_action *action,
2919                                struct mlx5_flow *dev_flow,
2920                                uint8_t transfer,
2921                                struct rte_flow_error *error)
2922 {
2923         const struct rte_flow_item *encap_data;
2924         const struct rte_flow_action_raw_encap *raw_encap_data;
2925         struct mlx5_flow_dv_encap_decap_resource res = {
2926                 .reformat_type =
2927                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2928                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2929                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2930         };
2931
2932         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2933                 raw_encap_data =
2934                         (const struct rte_flow_action_raw_encap *)action->conf;
2935                 res.size = raw_encap_data->size;
2936                 memcpy(res.buf, raw_encap_data->data, res.size);
2937         } else {
2938                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2939                         encap_data =
2940                                 ((const struct rte_flow_action_vxlan_encap *)
2941                                                 action->conf)->definition;
2942                 else
2943                         encap_data =
2944                                 ((const struct rte_flow_action_nvgre_encap *)
2945                                                 action->conf)->definition;
2946                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2947                                                &res.size, error))
2948                         return -rte_errno;
2949         }
2950         if (flow_dv_zero_encap_udp_csum(res.buf, error))
2951                 return -rte_errno;
2952         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2953                 return rte_flow_error_set(error, EINVAL,
2954                                           RTE_FLOW_ERROR_TYPE_ACTION,
2955                                           NULL, "can't create L2 encap action");
2956         return 0;
2957 }
2958
2959 /**
2960  * Convert L2 decap action to DV specification.
2961  *
2962  * @param[in] dev
2963  *   Pointer to rte_eth_dev structure.
2964  * @param[in, out] dev_flow
2965  *   Pointer to the mlx5_flow.
2966  * @param[in] transfer
2967  *   Mark if the flow is E-Switch flow.
2968  * @param[out] error
2969  *   Pointer to the error structure.
2970  *
2971  * @return
2972  *   0 on success, a negative errno value otherwise and rte_errno is set.
2973  */
2974 static int
2975 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2976                                struct mlx5_flow *dev_flow,
2977                                uint8_t transfer,
2978                                struct rte_flow_error *error)
2979 {
2980         struct mlx5_flow_dv_encap_decap_resource res = {
2981                 .size = 0,
2982                 .reformat_type =
2983                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2984                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2985                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2986         };
2987
2988         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2989                 return rte_flow_error_set(error, EINVAL,
2990                                           RTE_FLOW_ERROR_TYPE_ACTION,
2991                                           NULL, "can't create L2 decap action");
2992         return 0;
2993 }
2994
2995 /**
2996  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2997  *
2998  * @param[in] dev
2999  *   Pointer to rte_eth_dev structure.
3000  * @param[in] action
3001  *   Pointer to action structure.
3002  * @param[in, out] dev_flow
3003  *   Pointer to the mlx5_flow.
3004  * @param[in] attr
3005  *   Pointer to the flow attributes.
3006  * @param[out] error
3007  *   Pointer to the error structure.
3008  *
3009  * @return
3010  *   0 on success, a negative errno value otherwise and rte_errno is set.
3011  */
3012 static int
3013 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
3014                                 const struct rte_flow_action *action,
3015                                 struct mlx5_flow *dev_flow,
3016                                 const struct rte_flow_attr *attr,
3017                                 struct rte_flow_error *error)
3018 {
3019         const struct rte_flow_action_raw_encap *encap_data;
3020         struct mlx5_flow_dv_encap_decap_resource res;
3021
3022         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3023         res.size = encap_data->size;
3024         memcpy(res.buf, encap_data->data, res.size);
3025         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3026                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3027                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3028         if (attr->transfer)
3029                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3030         else
3031                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3032                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3033         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3034                 return rte_flow_error_set(error, EINVAL,
3035                                           RTE_FLOW_ERROR_TYPE_ACTION,
3036                                           NULL, "can't create encap action");
3037         return 0;
3038 }
3039
3040 /**
3041  * Create action push VLAN.
3042  *
3043  * @param[in] dev
3044  *   Pointer to rte_eth_dev structure.
3045  * @param[in] attr
3046  *   Pointer to the flow attributes.
3047  * @param[in] vlan
3048  *   Pointer to the vlan to push to the Ethernet header.
3049  * @param[in, out] dev_flow
3050  *   Pointer to the mlx5_flow.
3051  * @param[out] error
3052  *   Pointer to the error structure.
3053  *
3054  * @return
3055  *   0 on success, a negative errno value otherwise and rte_errno is set.
3056  */
3057 static int
3058 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3059                                 const struct rte_flow_attr *attr,
3060                                 const struct rte_vlan_hdr *vlan,
3061                                 struct mlx5_flow *dev_flow,
3062                                 struct rte_flow_error *error)
3063 {
3064         struct mlx5_flow_dv_push_vlan_action_resource res;
3065
3066         res.vlan_tag =
3067                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3068                                  vlan->vlan_tci);
3069         if (attr->transfer)
3070                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3071         else
3072                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3073                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3074         return flow_dv_push_vlan_action_resource_register
3075                                             (dev, &res, dev_flow, error);
3076 }
3077
3078 /**
3079  * Validate the modify-header actions.
3080  *
3081  * @param[in] action_flags
3082  *   Holds the actions detected until now.
3083  * @param[in] action
3084  *   Pointer to the modify action.
3085  * @param[out] error
3086  *   Pointer to error structure.
3087  *
3088  * @return
3089  *   0 on success, a negative errno value otherwise and rte_errno is set.
3090  */
3091 static int
3092 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3093                                    const struct rte_flow_action *action,
3094                                    struct rte_flow_error *error)
3095 {
3096         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3097                 return rte_flow_error_set(error, EINVAL,
3098                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3099                                           NULL, "action configuration not set");
3100         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3101                 return rte_flow_error_set(error, EINVAL,
3102                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3103                                           "can't have encap action before"
3104                                           " modify action");
3105         return 0;
3106 }
3107
3108 /**
3109  * Validate the modify-header MAC address actions.
3110  *
3111  * @param[in] action_flags
3112  *   Holds the actions detected until now.
3113  * @param[in] action
3114  *   Pointer to the modify action.
3115  * @param[in] item_flags
3116  *   Holds the items detected.
3117  * @param[out] error
3118  *   Pointer to error structure.
3119  *
3120  * @return
3121  *   0 on success, a negative errno value otherwise and rte_errno is set.
3122  */
3123 static int
3124 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3125                                    const struct rte_flow_action *action,
3126                                    const uint64_t item_flags,
3127                                    struct rte_flow_error *error)
3128 {
3129         int ret = 0;
3130
3131         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3132         if (!ret) {
3133                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3134                         return rte_flow_error_set(error, EINVAL,
3135                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3136                                                   NULL,
3137                                                   "no L2 item in pattern");
3138         }
3139         return ret;
3140 }
3141
3142 /**
3143  * Validate the modify-header IPv4 address actions.
3144  *
3145  * @param[in] action_flags
3146  *   Holds the actions detected until now.
3147  * @param[in] action
3148  *   Pointer to the modify action.
3149  * @param[in] item_flags
3150  *   Holds the items detected.
3151  * @param[out] error
3152  *   Pointer to error structure.
3153  *
3154  * @return
3155  *   0 on success, a negative errno value otherwise and rte_errno is set.
3156  */
3157 static int
3158 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3159                                     const struct rte_flow_action *action,
3160                                     const uint64_t item_flags,
3161                                     struct rte_flow_error *error)
3162 {
3163         int ret = 0;
3164         uint64_t layer;
3165
3166         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3167         if (!ret) {
3168                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3169                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3170                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3171                 if (!(item_flags & layer))
3172                         return rte_flow_error_set(error, EINVAL,
3173                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3174                                                   NULL,
3175                                                   "no ipv4 item in pattern");
3176         }
3177         return ret;
3178 }
3179
3180 /**
3181  * Validate the modify-header IPv6 address actions.
3182  *
3183  * @param[in] action_flags
3184  *   Holds the actions detected until now.
3185  * @param[in] action
3186  *   Pointer to the modify action.
3187  * @param[in] item_flags
3188  *   Holds the items detected.
3189  * @param[out] error
3190  *   Pointer to error structure.
3191  *
3192  * @return
3193  *   0 on success, a negative errno value otherwise and rte_errno is set.
3194  */
3195 static int
3196 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3197                                     const struct rte_flow_action *action,
3198                                     const uint64_t item_flags,
3199                                     struct rte_flow_error *error)
3200 {
3201         int ret = 0;
3202         uint64_t layer;
3203
3204         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3205         if (!ret) {
3206                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3207                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3208                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3209                 if (!(item_flags & layer))
3210                         return rte_flow_error_set(error, EINVAL,
3211                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3212                                                   NULL,
3213                                                   "no ipv6 item in pattern");
3214         }
3215         return ret;
3216 }
3217
3218 /**
3219  * Validate the modify-header TP actions.
3220  *
3221  * @param[in] action_flags
3222  *   Holds the actions detected until now.
3223  * @param[in] action
3224  *   Pointer to the modify action.
3225  * @param[in] item_flags
3226  *   Holds the items detected.
3227  * @param[out] error
3228  *   Pointer to error structure.
3229  *
3230  * @return
3231  *   0 on success, a negative errno value otherwise and rte_errno is set.
3232  */
3233 static int
3234 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3235                                   const struct rte_flow_action *action,
3236                                   const uint64_t item_flags,
3237                                   struct rte_flow_error *error)
3238 {
3239         int ret = 0;
3240         uint64_t layer;
3241
3242         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3243         if (!ret) {
3244                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3245                                  MLX5_FLOW_LAYER_INNER_L4 :
3246                                  MLX5_FLOW_LAYER_OUTER_L4;
3247                 if (!(item_flags & layer))
3248                         return rte_flow_error_set(error, EINVAL,
3249                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3250                                                   NULL, "no transport layer "
3251                                                   "in pattern");
3252         }
3253         return ret;
3254 }
3255
3256 /**
3257  * Validate the modify-header actions of increment/decrement
3258  * TCP Sequence-number.
3259  *
3260  * @param[in] action_flags
3261  *   Holds the actions detected until now.
3262  * @param[in] action
3263  *   Pointer to the modify action.
3264  * @param[in] item_flags
3265  *   Holds the items detected.
3266  * @param[out] error
3267  *   Pointer to error structure.
3268  *
3269  * @return
3270  *   0 on success, a negative errno value otherwise and rte_errno is set.
3271  */
3272 static int
3273 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3274                                        const struct rte_flow_action *action,
3275                                        const uint64_t item_flags,
3276                                        struct rte_flow_error *error)
3277 {
3278         int ret = 0;
3279         uint64_t layer;
3280
3281         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3282         if (!ret) {
3283                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3284                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3285                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3286                 if (!(item_flags & layer))
3287                         return rte_flow_error_set(error, EINVAL,
3288                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3289                                                   NULL, "no TCP item in"
3290                                                   " pattern");
3291                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3292                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3293                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3294                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3295                         return rte_flow_error_set(error, EINVAL,
3296                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3297                                                   NULL,
3298                                                   "cannot decrease and increase"
3299                                                   " TCP sequence number"
3300                                                   " at the same time");
3301         }
3302         return ret;
3303 }
3304
3305 /**
3306  * Validate the modify-header actions of increment/decrement
3307  * TCP Acknowledgment number.
3308  *
3309  * @param[in] action_flags
3310  *   Holds the actions detected until now.
3311  * @param[in] action
3312  *   Pointer to the modify action.
3313  * @param[in] item_flags
3314  *   Holds the items detected.
3315  * @param[out] error
3316  *   Pointer to error structure.
3317  *
3318  * @return
3319  *   0 on success, a negative errno value otherwise and rte_errno is set.
3320  */
3321 static int
3322 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3323                                        const struct rte_flow_action *action,
3324                                        const uint64_t item_flags,
3325                                        struct rte_flow_error *error)
3326 {
3327         int ret = 0;
3328         uint64_t layer;
3329
3330         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3331         if (!ret) {
3332                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3333                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3334                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3335                 if (!(item_flags & layer))
3336                         return rte_flow_error_set(error, EINVAL,
3337                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3338                                                   NULL, "no TCP item in"
3339                                                   " pattern");
3340                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3341                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3342                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3343                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3344                         return rte_flow_error_set(error, EINVAL,
3345                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3346                                                   NULL,
3347                                                   "cannot decrease and increase"
3348                                                   " TCP acknowledgment number"
3349                                                   " at the same time");
3350         }
3351         return ret;
3352 }
3353
3354 /**
3355  * Validate the modify-header TTL actions.
3356  *
3357  * @param[in] action_flags
3358  *   Holds the actions detected until now.
3359  * @param[in] action
3360  *   Pointer to the modify action.
3361  * @param[in] item_flags
3362  *   Holds the items detected.
3363  * @param[out] error
3364  *   Pointer to error structure.
3365  *
3366  * @return
3367  *   0 on success, a negative errno value otherwise and rte_errno is set.
3368  */
3369 static int
3370 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3371                                    const struct rte_flow_action *action,
3372                                    const uint64_t item_flags,
3373                                    struct rte_flow_error *error)
3374 {
3375         int ret = 0;
3376         uint64_t layer;
3377
3378         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3379         if (!ret) {
3380                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3381                                  MLX5_FLOW_LAYER_INNER_L3 :
3382                                  MLX5_FLOW_LAYER_OUTER_L3;
3383                 if (!(item_flags & layer))
3384                         return rte_flow_error_set(error, EINVAL,
3385                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3386                                                   NULL,
3387                                                   "no IP protocol in pattern");
3388         }
3389         return ret;
3390 }
3391
3392 /**
3393  * Validate jump action.
3394  *
3395  * @param[in] action
3396  *   Pointer to the jump action.
3397  * @param[in] action_flags
3398  *   Holds the actions detected until now.
3399  * @param[in] attributes
3400  *   Pointer to flow attributes
3401  * @param[in] external
3402  *   Action belongs to flow rule created by request external to PMD.
3403  * @param[out] error
3404  *   Pointer to error structure.
3405  *
3406  * @return
3407  *   0 on success, a negative errno value otherwise and rte_errno is set.
3408  */
3409 static int
3410 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3411                              uint64_t action_flags,
3412                              const struct rte_flow_attr *attributes,
3413                              bool external, struct rte_flow_error *error)
3414 {
3415         uint32_t target_group, table;
3416         int ret = 0;
3417
3418         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3419                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3420                 return rte_flow_error_set(error, EINVAL,
3421                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3422                                           "can't have 2 fate actions in"
3423                                           " same flow");
3424         if (action_flags & MLX5_FLOW_ACTION_METER)
3425                 return rte_flow_error_set(error, ENOTSUP,
3426                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3427                                           "jump with meter not support");
3428         if (!action->conf)
3429                 return rte_flow_error_set(error, EINVAL,
3430                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3431                                           NULL, "action configuration not set");
3432         target_group =
3433                 ((const struct rte_flow_action_jump *)action->conf)->group;
3434         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3435                                        true, &table, error);
3436         if (ret)
3437                 return ret;
3438         if (attributes->group == target_group)
3439                 return rte_flow_error_set(error, EINVAL,
3440                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3441                                           "target group must be other than"
3442                                           " the current flow group");
3443         return 0;
3444 }
3445
3446 /*
3447  * Validate the port_id action.
3448  *
3449  * @param[in] dev
3450  *   Pointer to rte_eth_dev structure.
3451  * @param[in] action_flags
3452  *   Bit-fields that holds the actions detected until now.
3453  * @param[in] action
3454  *   Port_id RTE action structure.
3455  * @param[in] attr
3456  *   Attributes of flow that includes this action.
3457  * @param[out] error
3458  *   Pointer to error structure.
3459  *
3460  * @return
3461  *   0 on success, a negative errno value otherwise and rte_errno is set.
3462  */
3463 static int
3464 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3465                                 uint64_t action_flags,
3466                                 const struct rte_flow_action *action,
3467                                 const struct rte_flow_attr *attr,
3468                                 struct rte_flow_error *error)
3469 {
3470         const struct rte_flow_action_port_id *port_id;
3471         struct mlx5_priv *act_priv;
3472         struct mlx5_priv *dev_priv;
3473         uint16_t port;
3474
3475         if (!attr->transfer)
3476                 return rte_flow_error_set(error, ENOTSUP,
3477                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3478                                           NULL,
3479                                           "port id action is valid in transfer"
3480                                           " mode only");
3481         if (!action || !action->conf)
3482                 return rte_flow_error_set(error, ENOTSUP,
3483                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3484                                           NULL,
3485                                           "port id action parameters must be"
3486                                           " specified");
3487         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3488                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3489                 return rte_flow_error_set(error, EINVAL,
3490                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3491                                           "can have only one fate actions in"
3492                                           " a flow");
3493         dev_priv = mlx5_dev_to_eswitch_info(dev);
3494         if (!dev_priv)
3495                 return rte_flow_error_set(error, rte_errno,
3496                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3497                                           NULL,
3498                                           "failed to obtain E-Switch info");
3499         port_id = action->conf;
3500         port = port_id->original ? dev->data->port_id : port_id->id;
3501         act_priv = mlx5_port_to_eswitch_info(port, false);
3502         if (!act_priv)
3503                 return rte_flow_error_set
3504                                 (error, rte_errno,
3505                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3506                                  "failed to obtain E-Switch port id for port");
3507         if (act_priv->domain_id != dev_priv->domain_id)
3508                 return rte_flow_error_set
3509                                 (error, EINVAL,
3510                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3511                                  "port does not belong to"
3512                                  " E-Switch being configured");
3513         return 0;
3514 }
3515
3516 /**
3517  * Get the maximum number of modify header actions.
3518  *
3519  * @param dev
3520  *   Pointer to rte_eth_dev structure.
3521  * @param flags
3522  *   Flags bits to check if root level.
3523  *
3524  * @return
3525  *   Max number of modify header actions device can support.
3526  */
3527 static unsigned int
3528 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3529 {
3530         /*
3531          * There's no way to directly query the max cap. Although it has to be
3532          * acquried by iterative trial, it is a safe assumption that more
3533          * actions are supported by FW if extensive metadata register is
3534          * supported. (Only in the root table)
3535          */
3536         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3537                 return MLX5_MAX_MODIFY_NUM;
3538         else
3539                 return mlx5_flow_ext_mreg_supported(dev) ?
3540                                         MLX5_ROOT_TBL_MODIFY_NUM :
3541                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3542 }
3543
3544 /**
3545  * Validate the meter action.
3546  *
3547  * @param[in] dev
3548  *   Pointer to rte_eth_dev structure.
3549  * @param[in] action_flags
3550  *   Bit-fields that holds the actions detected until now.
3551  * @param[in] action
3552  *   Pointer to the meter action.
3553  * @param[in] attr
3554  *   Attributes of flow that includes this action.
3555  * @param[out] error
3556  *   Pointer to error structure.
3557  *
3558  * @return
3559  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3560  */
3561 static int
3562 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3563                                 uint64_t action_flags,
3564                                 const struct rte_flow_action *action,
3565                                 const struct rte_flow_attr *attr,
3566                                 struct rte_flow_error *error)
3567 {
3568         struct mlx5_priv *priv = dev->data->dev_private;
3569         const struct rte_flow_action_meter *am = action->conf;
3570         struct mlx5_flow_meter *fm;
3571
3572         if (!am)
3573                 return rte_flow_error_set(error, EINVAL,
3574                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3575                                           "meter action conf is NULL");
3576
3577         if (action_flags & MLX5_FLOW_ACTION_METER)
3578                 return rte_flow_error_set(error, ENOTSUP,
3579                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3580                                           "meter chaining not support");
3581         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3582                 return rte_flow_error_set(error, ENOTSUP,
3583                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3584                                           "meter with jump not support");
3585         if (!priv->mtr_en)
3586                 return rte_flow_error_set(error, ENOTSUP,
3587                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3588                                           NULL,
3589                                           "meter action not supported");
3590         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3591         if (!fm)
3592                 return rte_flow_error_set(error, EINVAL,
3593                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3594                                           "Meter not found");
3595         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3596               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3597               (!fm->attr.egress && !attr->egress && attr->ingress))))
3598                 return rte_flow_error_set(error, EINVAL,
3599                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3600                                           "Flow attributes are either invalid "
3601                                           "or have a conflict with current "
3602                                           "meter attributes");
3603         return 0;
3604 }
3605
3606 /**
3607  * Validate the modify-header IPv4 DSCP actions.
3608  *
3609  * @param[in] action_flags
3610  *   Holds the actions detected until now.
3611  * @param[in] action
3612  *   Pointer to the modify action.
3613  * @param[in] item_flags
3614  *   Holds the items detected.
3615  * @param[out] error
3616  *   Pointer to error structure.
3617  *
3618  * @return
3619  *   0 on success, a negative errno value otherwise and rte_errno is set.
3620  */
3621 static int
3622 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3623                                          const struct rte_flow_action *action,
3624                                          const uint64_t item_flags,
3625                                          struct rte_flow_error *error)
3626 {
3627         int ret = 0;
3628
3629         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3630         if (!ret) {
3631                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3632                         return rte_flow_error_set(error, EINVAL,
3633                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3634                                                   NULL,
3635                                                   "no ipv4 item in pattern");
3636         }
3637         return ret;
3638 }
3639
3640 /**
3641  * Validate the modify-header IPv6 DSCP actions.
3642  *
3643  * @param[in] action_flags
3644  *   Holds the actions detected until now.
3645  * @param[in] action
3646  *   Pointer to the modify action.
3647  * @param[in] item_flags
3648  *   Holds the items detected.
3649  * @param[out] error
3650  *   Pointer to error structure.
3651  *
3652  * @return
3653  *   0 on success, a negative errno value otherwise and rte_errno is set.
3654  */
3655 static int
3656 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3657                                          const struct rte_flow_action *action,
3658                                          const uint64_t item_flags,
3659                                          struct rte_flow_error *error)
3660 {
3661         int ret = 0;
3662
3663         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3664         if (!ret) {
3665                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3666                         return rte_flow_error_set(error, EINVAL,
3667                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3668                                                   NULL,
3669                                                   "no ipv6 item in pattern");
3670         }
3671         return ret;
3672 }
3673
3674 /**
3675  * Find existing modify-header resource or create and register a new one.
3676  *
3677  * @param dev[in, out]
3678  *   Pointer to rte_eth_dev structure.
3679  * @param[in, out] resource
3680  *   Pointer to modify-header resource.
3681  * @parm[in, out] dev_flow
3682  *   Pointer to the dev_flow.
3683  * @param[out] error
3684  *   pointer to error structure.
3685  *
3686  * @return
3687  *   0 on success otherwise -errno and errno is set.
3688  */
3689 static int
3690 flow_dv_modify_hdr_resource_register
3691                         (struct rte_eth_dev *dev,
3692                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3693                          struct mlx5_flow *dev_flow,
3694                          struct rte_flow_error *error)
3695 {
3696         struct mlx5_priv *priv = dev->data->dev_private;
3697         struct mlx5_ibv_shared *sh = priv->sh;
3698         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3699         struct mlx5dv_dr_domain *ns;
3700         uint32_t actions_len;
3701
3702         resource->flags =
3703                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3704         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3705                                     resource->flags))
3706                 return rte_flow_error_set(error, EOVERFLOW,
3707                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3708                                           "too many modify header items");
3709         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3710                 ns = sh->fdb_domain;
3711         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3712                 ns = sh->tx_domain;
3713         else
3714                 ns = sh->rx_domain;
3715         /* Lookup a matching resource from cache. */
3716         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3717         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3718                 if (resource->ft_type == cache_resource->ft_type &&
3719                     resource->actions_num == cache_resource->actions_num &&
3720                     resource->flags == cache_resource->flags &&
3721                     !memcmp((const void *)resource->actions,
3722                             (const void *)cache_resource->actions,
3723                             actions_len)) {
3724                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3725                                 (void *)cache_resource,
3726                                 rte_atomic32_read(&cache_resource->refcnt));
3727                         rte_atomic32_inc(&cache_resource->refcnt);
3728                         dev_flow->dv.modify_hdr = cache_resource;
3729                         return 0;
3730                 }
3731         }
3732         /* Register new modify-header resource. */
3733         cache_resource = rte_calloc(__func__, 1,
3734                                     sizeof(*cache_resource) + actions_len, 0);
3735         if (!cache_resource)
3736                 return rte_flow_error_set(error, ENOMEM,
3737                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3738                                           "cannot allocate resource memory");
3739         *cache_resource = *resource;
3740         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3741         cache_resource->verbs_action =
3742                 mlx5_glue->dv_create_flow_action_modify_header
3743                                         (sh->ctx, cache_resource->ft_type, ns,
3744                                          cache_resource->flags, actions_len,
3745                                          (uint64_t *)cache_resource->actions);
3746         if (!cache_resource->verbs_action) {
3747                 rte_free(cache_resource);
3748                 return rte_flow_error_set(error, ENOMEM,
3749                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3750                                           NULL, "cannot create action");
3751         }
3752         rte_atomic32_init(&cache_resource->refcnt);
3753         rte_atomic32_inc(&cache_resource->refcnt);
3754         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3755         dev_flow->dv.modify_hdr = cache_resource;
3756         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3757                 (void *)cache_resource,
3758                 rte_atomic32_read(&cache_resource->refcnt));
3759         return 0;
3760 }
3761
3762 #define MLX5_CNT_CONTAINER_RESIZE 64
3763
3764 /**
3765  * Get or create a flow counter.
3766  *
3767  * @param[in] dev
3768  *   Pointer to the Ethernet device structure.
3769  * @param[in] shared
3770  *   Indicate if this counter is shared with other flows.
3771  * @param[in] id
3772  *   Counter identifier.
3773  *
3774  * @return
3775  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3776  */
3777 static struct mlx5_flow_counter *
3778 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3779                                uint32_t id)
3780 {
3781         struct mlx5_priv *priv = dev->data->dev_private;
3782         struct mlx5_flow_counter *cnt = NULL;
3783         struct mlx5_devx_obj *dcs = NULL;
3784
3785         if (!priv->config.devx) {
3786                 rte_errno = ENOTSUP;
3787                 return NULL;
3788         }
3789         if (shared) {
3790                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3791                         if (cnt->shared && cnt->id == id) {
3792                                 cnt->ref_cnt++;
3793                                 return cnt;
3794                         }
3795                 }
3796         }
3797         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3798         if (!dcs)
3799                 return NULL;
3800         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3801         if (!cnt) {
3802                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3803                 rte_errno = ENOMEM;
3804                 return NULL;
3805         }
3806         struct mlx5_flow_counter tmpl = {
3807                 .shared = shared,
3808                 .ref_cnt = 1,
3809                 .id = id,
3810                 .dcs = dcs,
3811         };
3812         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3813         if (!tmpl.action) {
3814                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3815                 rte_errno = errno;
3816                 rte_free(cnt);
3817                 return NULL;
3818         }
3819         *cnt = tmpl;
3820         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3821         return cnt;
3822 }
3823
3824 /**
3825  * Release a flow counter.
3826  *
3827  * @param[in] dev
3828  *   Pointer to the Ethernet device structure.
3829  * @param[in] counter
3830  *   Pointer to the counter handler.
3831  */
3832 static void
3833 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3834                                  struct mlx5_flow_counter *counter)
3835 {
3836         struct mlx5_priv *priv = dev->data->dev_private;
3837
3838         if (!counter)
3839                 return;
3840         if (--counter->ref_cnt == 0) {
3841                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3842                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3843                 rte_free(counter);
3844         }
3845 }
3846
3847 /**
3848  * Query a devx flow counter.
3849  *
3850  * @param[in] dev
3851  *   Pointer to the Ethernet device structure.
3852  * @param[in] cnt
3853  *   Pointer to the flow counter.
3854  * @param[out] pkts
3855  *   The statistics value of packets.
3856  * @param[out] bytes
3857  *   The statistics value of bytes.
3858  *
3859  * @return
3860  *   0 on success, otherwise a negative errno value and rte_errno is set.
3861  */
3862 static inline int
3863 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3864                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3865                      uint64_t *bytes)
3866 {
3867         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3868                                                 0, NULL, NULL, 0);
3869 }
3870
3871 /**
3872  * Get a pool by a counter.
3873  *
3874  * @param[in] cnt
3875  *   Pointer to the counter.
3876  *
3877  * @return
3878  *   The counter pool.
3879  */
3880 static struct mlx5_flow_counter_pool *
3881 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3882 {
3883         if (!cnt->batch) {
3884                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3885                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3886         }
3887         return cnt->pool;
3888 }
3889
3890 /**
3891  * Get a pool by devx counter ID.
3892  *
3893  * @param[in] cont
3894  *   Pointer to the counter container.
3895  * @param[in] id
3896  *   The counter devx ID.
3897  *
3898  * @return
3899  *   The counter pool pointer if exists, NULL otherwise,
3900  */
3901 static struct mlx5_flow_counter_pool *
3902 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3903 {
3904         struct mlx5_flow_counter_pool *pool;
3905
3906         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3907                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3908                                 MLX5_COUNTERS_PER_POOL;
3909
3910                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3911                         return pool;
3912         };
3913         return NULL;
3914 }
3915
3916 /**
3917  * Allocate a new memory for the counter values wrapped by all the needed
3918  * management.
3919  *
3920  * @param[in] dev
3921  *   Pointer to the Ethernet device structure.
3922  * @param[in] raws_n
3923  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3924  *
3925  * @return
3926  *   The new memory management pointer on success, otherwise NULL and rte_errno
3927  *   is set.
3928  */
3929 static struct mlx5_counter_stats_mem_mng *
3930 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3931 {
3932         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3933                                         (dev->data->dev_private))->sh;
3934         struct mlx5_devx_mkey_attr mkey_attr;
3935         struct mlx5_counter_stats_mem_mng *mem_mng;
3936         volatile struct flow_counter_stats *raw_data;
3937         int size = (sizeof(struct flow_counter_stats) *
3938                         MLX5_COUNTERS_PER_POOL +
3939                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3940                         sizeof(struct mlx5_counter_stats_mem_mng);
3941         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3942         int i;
3943
3944         if (!mem) {
3945                 rte_errno = ENOMEM;
3946                 return NULL;
3947         }
3948         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3949         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3950         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3951                                                  IBV_ACCESS_LOCAL_WRITE);
3952         if (!mem_mng->umem) {
3953                 rte_errno = errno;
3954                 rte_free(mem);
3955                 return NULL;
3956         }
3957         mkey_attr.addr = (uintptr_t)mem;
3958         mkey_attr.size = size;
3959         mkey_attr.umem_id = mem_mng->umem->umem_id;
3960         mkey_attr.pd = sh->pdn;
3961         mkey_attr.log_entity_size = 0;
3962         mkey_attr.pg_access = 0;
3963         mkey_attr.klm_array = NULL;
3964         mkey_attr.klm_num = 0;
3965         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3966         if (!mem_mng->dm) {
3967                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3968                 rte_errno = errno;
3969                 rte_free(mem);
3970                 return NULL;
3971         }
3972         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3973         raw_data = (volatile struct flow_counter_stats *)mem;
3974         for (i = 0; i < raws_n; ++i) {
3975                 mem_mng->raws[i].mem_mng = mem_mng;
3976                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3977         }
3978         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3979         return mem_mng;
3980 }
3981
3982 /**
3983  * Resize a counter container.
3984  *
3985  * @param[in] dev
3986  *   Pointer to the Ethernet device structure.
3987  * @param[in] batch
3988  *   Whether the pool is for counter that was allocated by batch command.
3989  *
3990  * @return
3991  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3992  */
3993 static struct mlx5_pools_container *
3994 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3995 {
3996         struct mlx5_priv *priv = dev->data->dev_private;
3997         struct mlx5_pools_container *cont =
3998                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3999         struct mlx5_pools_container *new_cont =
4000                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
4001         struct mlx5_counter_stats_mem_mng *mem_mng;
4002         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
4003         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
4004         int i;
4005
4006         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
4007                 /* The last resize still hasn't detected by the host thread. */
4008                 rte_errno = EAGAIN;
4009                 return NULL;
4010         }
4011         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
4012         if (!new_cont->pools) {
4013                 rte_errno = ENOMEM;
4014                 return NULL;
4015         }
4016         if (cont->n)
4017                 memcpy(new_cont->pools, cont->pools, cont->n *
4018                        sizeof(struct mlx5_flow_counter_pool *));
4019         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
4020                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
4021         if (!mem_mng) {
4022                 rte_free(new_cont->pools);
4023                 return NULL;
4024         }
4025         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
4026                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
4027                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
4028                                  i, next);
4029         new_cont->n = resize;
4030         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
4031         TAILQ_INIT(&new_cont->pool_list);
4032         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
4033         new_cont->init_mem_mng = mem_mng;
4034         rte_cio_wmb();
4035          /* Flip the master container. */
4036         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
4037         return new_cont;
4038 }
4039
4040 /**
4041  * Query a devx flow counter.
4042  *
4043  * @param[in] dev
4044  *   Pointer to the Ethernet device structure.
4045  * @param[in] cnt
4046  *   Pointer to the flow counter.
4047  * @param[out] pkts
4048  *   The statistics value of packets.
4049  * @param[out] bytes
4050  *   The statistics value of bytes.
4051  *
4052  * @return
4053  *   0 on success, otherwise a negative errno value and rte_errno is set.
4054  */
4055 static inline int
4056 _flow_dv_query_count(struct rte_eth_dev *dev,
4057                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
4058                      uint64_t *bytes)
4059 {
4060         struct mlx5_priv *priv = dev->data->dev_private;
4061         struct mlx5_flow_counter_pool *pool =
4062                         flow_dv_counter_pool_get(cnt);
4063         int offset = cnt - &pool->counters_raw[0];
4064
4065         if (priv->counter_fallback)
4066                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4067
4068         rte_spinlock_lock(&pool->sl);
4069         /*
4070          * The single counters allocation may allocate smaller ID than the
4071          * current allocated in parallel to the host reading.
4072          * In this case the new counter values must be reported as 0.
4073          */
4074         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4075                 *pkts = 0;
4076                 *bytes = 0;
4077         } else {
4078                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4079                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4080         }
4081         rte_spinlock_unlock(&pool->sl);
4082         return 0;
4083 }
4084
4085 /**
4086  * Create and initialize a new counter pool.
4087  *
4088  * @param[in] dev
4089  *   Pointer to the Ethernet device structure.
4090  * @param[out] dcs
4091  *   The devX counter handle.
4092  * @param[in] batch
4093  *   Whether the pool is for counter that was allocated by batch command.
4094  *
4095  * @return
4096  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4097  */
4098 static struct mlx5_flow_counter_pool *
4099 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4100                     uint32_t batch)
4101 {
4102         struct mlx5_priv *priv = dev->data->dev_private;
4103         struct mlx5_flow_counter_pool *pool;
4104         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4105                                                                0);
4106         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4107         uint32_t size;
4108
4109         if (cont->n == n_valid) {
4110                 cont = flow_dv_container_resize(dev, batch);
4111                 if (!cont)
4112                         return NULL;
4113         }
4114         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4115                         sizeof(struct mlx5_flow_counter);
4116         pool = rte_calloc(__func__, 1, size, 0);
4117         if (!pool) {
4118                 rte_errno = ENOMEM;
4119                 return NULL;
4120         }
4121         pool->min_dcs = dcs;
4122         pool->raw = cont->init_mem_mng->raws + n_valid %
4123                                                      MLX5_CNT_CONTAINER_RESIZE;
4124         pool->raw_hw = NULL;
4125         rte_spinlock_init(&pool->sl);
4126         /*
4127          * The generation of the new allocated counters in this pool is 0, 2 in
4128          * the pool generation makes all the counters valid for allocation.
4129          */
4130         rte_atomic64_set(&pool->query_gen, 0x2);
4131         TAILQ_INIT(&pool->counters);
4132         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4133         cont->pools[n_valid] = pool;
4134         /* Pool initialization must be updated before host thread access. */
4135         rte_cio_wmb();
4136         rte_atomic16_add(&cont->n_valid, 1);
4137         return pool;
4138 }
4139
4140 /**
4141  * Prepare a new counter and/or a new counter pool.
4142  *
4143  * @param[in] dev
4144  *   Pointer to the Ethernet device structure.
4145  * @param[out] cnt_free
4146  *   Where to put the pointer of a new counter.
4147  * @param[in] batch
4148  *   Whether the pool is for counter that was allocated by batch command.
4149  *
4150  * @return
4151  *   The free counter pool pointer and @p cnt_free is set on success,
4152  *   NULL otherwise and rte_errno is set.
4153  */
4154 static struct mlx5_flow_counter_pool *
4155 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4156                              struct mlx5_flow_counter **cnt_free,
4157                              uint32_t batch)
4158 {
4159         struct mlx5_priv *priv = dev->data->dev_private;
4160         struct mlx5_flow_counter_pool *pool;
4161         struct mlx5_devx_obj *dcs = NULL;
4162         struct mlx5_flow_counter *cnt;
4163         uint32_t i;
4164
4165         if (!batch) {
4166                 /* bulk_bitmap must be 0 for single counter allocation. */
4167                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4168                 if (!dcs)
4169                         return NULL;
4170                 pool = flow_dv_find_pool_by_id
4171                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4172                 if (!pool) {
4173                         pool = flow_dv_pool_create(dev, dcs, batch);
4174                         if (!pool) {
4175                                 mlx5_devx_cmd_destroy(dcs);
4176                                 return NULL;
4177                         }
4178                 } else if (dcs->id < pool->min_dcs->id) {
4179                         rte_atomic64_set(&pool->a64_dcs,
4180                                          (int64_t)(uintptr_t)dcs);
4181                 }
4182                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4183                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4184                 cnt->dcs = dcs;
4185                 *cnt_free = cnt;
4186                 return pool;
4187         }
4188         /* bulk_bitmap is in 128 counters units. */
4189         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4190                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4191         if (!dcs) {
4192                 rte_errno = ENODATA;
4193                 return NULL;
4194         }
4195         pool = flow_dv_pool_create(dev, dcs, batch);
4196         if (!pool) {
4197                 mlx5_devx_cmd_destroy(dcs);
4198                 return NULL;
4199         }
4200         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4201                 cnt = &pool->counters_raw[i];
4202                 cnt->pool = pool;
4203                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4204         }
4205         *cnt_free = &pool->counters_raw[0];
4206         return pool;
4207 }
4208
4209 /**
4210  * Search for existed shared counter.
4211  *
4212  * @param[in] cont
4213  *   Pointer to the relevant counter pool container.
4214  * @param[in] id
4215  *   The shared counter ID to search.
4216  *
4217  * @return
4218  *   NULL if not existed, otherwise pointer to the shared counter.
4219  */
4220 static struct mlx5_flow_counter *
4221 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4222                               uint32_t id)
4223 {
4224         static struct mlx5_flow_counter *cnt;
4225         struct mlx5_flow_counter_pool *pool;
4226         int i;
4227
4228         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4229                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4230                         cnt = &pool->counters_raw[i];
4231                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4232                                 return cnt;
4233                 }
4234         }
4235         return NULL;
4236 }
4237
4238 /**
4239  * Allocate a flow counter.
4240  *
4241  * @param[in] dev
4242  *   Pointer to the Ethernet device structure.
4243  * @param[in] shared
4244  *   Indicate if this counter is shared with other flows.
4245  * @param[in] id
4246  *   Counter identifier.
4247  * @param[in] group
4248  *   Counter flow group.
4249  *
4250  * @return
4251  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4252  */
4253 static struct mlx5_flow_counter *
4254 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4255                       uint16_t group)
4256 {
4257         struct mlx5_priv *priv = dev->data->dev_private;
4258         struct mlx5_flow_counter_pool *pool = NULL;
4259         struct mlx5_flow_counter *cnt_free = NULL;
4260         /*
4261          * Currently group 0 flow counter cannot be assigned to a flow if it is
4262          * not the first one in the batch counter allocation, so it is better
4263          * to allocate counters one by one for these flows in a separate
4264          * container.
4265          * A counter can be shared between different groups so need to take
4266          * shared counters from the single container.
4267          */
4268         uint32_t batch = (group && !shared) ? 1 : 0;
4269         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4270                                                                0);
4271
4272         if (priv->counter_fallback)
4273                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4274         if (!priv->config.devx) {
4275                 rte_errno = ENOTSUP;
4276                 return NULL;
4277         }
4278         if (shared) {
4279                 cnt_free = flow_dv_counter_shared_search(cont, id);
4280                 if (cnt_free) {
4281                         if (cnt_free->ref_cnt + 1 == 0) {
4282                                 rte_errno = E2BIG;
4283                                 return NULL;
4284                         }
4285                         cnt_free->ref_cnt++;
4286                         return cnt_free;
4287                 }
4288         }
4289         /* Pools which has a free counters are in the start. */
4290         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4291                 /*
4292                  * The free counter reset values must be updated between the
4293                  * counter release to the counter allocation, so, at least one
4294                  * query must be done in this time. ensure it by saving the
4295                  * query generation in the release time.
4296                  * The free list is sorted according to the generation - so if
4297                  * the first one is not updated, all the others are not
4298                  * updated too.
4299                  */
4300                 cnt_free = TAILQ_FIRST(&pool->counters);
4301                 if (cnt_free && cnt_free->query_gen + 1 <
4302                     rte_atomic64_read(&pool->query_gen))
4303                         break;
4304                 cnt_free = NULL;
4305         }
4306         if (!cnt_free) {
4307                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4308                 if (!pool)
4309                         return NULL;
4310         }
4311         cnt_free->batch = batch;
4312         /* Create a DV counter action only in the first time usage. */
4313         if (!cnt_free->action) {
4314                 uint16_t offset;
4315                 struct mlx5_devx_obj *dcs;
4316
4317                 if (batch) {
4318                         offset = cnt_free - &pool->counters_raw[0];
4319                         dcs = pool->min_dcs;
4320                 } else {
4321                         offset = 0;
4322                         dcs = cnt_free->dcs;
4323                 }
4324                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4325                                         (dcs->obj, offset);
4326                 if (!cnt_free->action) {
4327                         rte_errno = errno;
4328                         return NULL;
4329                 }
4330         }
4331         /* Update the counter reset values. */
4332         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4333                                  &cnt_free->bytes))
4334                 return NULL;
4335         cnt_free->shared = shared;
4336         cnt_free->ref_cnt = 1;
4337         cnt_free->id = id;
4338         if (!priv->sh->cmng.query_thread_on)
4339                 /* Start the asynchronous batch query by the host thread. */
4340                 mlx5_set_query_alarm(priv->sh);
4341         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4342         if (TAILQ_EMPTY(&pool->counters)) {
4343                 /* Move the pool to the end of the container pool list. */
4344                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4345                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4346         }
4347         return cnt_free;
4348 }
4349
4350 /**
4351  * Release a flow counter.
4352  *
4353  * @param[in] dev
4354  *   Pointer to the Ethernet device structure.
4355  * @param[in] counter
4356  *   Pointer to the counter handler.
4357  */
4358 static void
4359 flow_dv_counter_release(struct rte_eth_dev *dev,
4360                         struct mlx5_flow_counter *counter)
4361 {
4362         struct mlx5_priv *priv = dev->data->dev_private;
4363
4364         if (!counter)
4365                 return;
4366         if (priv->counter_fallback) {
4367                 flow_dv_counter_release_fallback(dev, counter);
4368                 return;
4369         }
4370         if (--counter->ref_cnt == 0) {
4371                 struct mlx5_flow_counter_pool *pool =
4372                                 flow_dv_counter_pool_get(counter);
4373
4374                 /* Put the counter in the end - the last updated one. */
4375                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4376                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4377         }
4378 }
4379
4380 /**
4381  * Verify the @p attributes will be correctly understood by the NIC and store
4382  * them in the @p flow if everything is correct.
4383  *
4384  * @param[in] dev
4385  *   Pointer to dev struct.
4386  * @param[in] attributes
4387  *   Pointer to flow attributes
4388  * @param[in] external
4389  *   This flow rule is created by request external to PMD.
4390  * @param[out] error
4391  *   Pointer to error structure.
4392  *
4393  * @return
4394  *   0 on success, a negative errno value otherwise and rte_errno is set.
4395  */
4396 static int
4397 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4398                             const struct rte_flow_attr *attributes,
4399                             bool external __rte_unused,
4400                             struct rte_flow_error *error)
4401 {
4402         struct mlx5_priv *priv = dev->data->dev_private;
4403         uint32_t priority_max = priv->config.flow_prio - 1;
4404
4405 #ifndef HAVE_MLX5DV_DR
4406         if (attributes->group)
4407                 return rte_flow_error_set(error, ENOTSUP,
4408                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4409                                           NULL,
4410                                           "groups are not supported");
4411 #else
4412         uint32_t table;
4413         int ret;
4414
4415         ret = mlx5_flow_group_to_table(attributes, external,
4416                                        attributes->group, !!priv->fdb_def_rule,
4417                                        &table, error);
4418         if (ret)
4419                 return ret;
4420 #endif
4421         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4422             attributes->priority >= priority_max)
4423                 return rte_flow_error_set(error, ENOTSUP,
4424                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4425                                           NULL,
4426                                           "priority out of range");
4427         if (attributes->transfer) {
4428                 if (!priv->config.dv_esw_en)
4429                         return rte_flow_error_set
4430                                 (error, ENOTSUP,
4431                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4432                                  "E-Switch dr is not supported");
4433                 if (!(priv->representor || priv->master))
4434                         return rte_flow_error_set
4435                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4436                                  NULL, "E-Switch configuration can only be"
4437                                  " done by a master or a representor device");
4438                 if (attributes->egress)
4439                         return rte_flow_error_set
4440                                 (error, ENOTSUP,
4441                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4442                                  "egress is not supported");
4443         }
4444         if (!(attributes->egress ^ attributes->ingress))
4445                 return rte_flow_error_set(error, ENOTSUP,
4446                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4447                                           "must specify exactly one of "
4448                                           "ingress or egress");
4449         return 0;
4450 }
4451
4452 /**
4453  * Internal validation function. For validating both actions and items.
4454  *
4455  * @param[in] dev
4456  *   Pointer to the rte_eth_dev structure.
4457  * @param[in] attr
4458  *   Pointer to the flow attributes.
4459  * @param[in] items
4460  *   Pointer to the list of items.
4461  * @param[in] actions
4462  *   Pointer to the list of actions.
4463  * @param[in] external
4464  *   This flow rule is created by request external to PMD.
4465  * @param[out] error
4466  *   Pointer to the error structure.
4467  *
4468  * @return
4469  *   0 on success, a negative errno value otherwise and rte_errno is set.
4470  */
4471 static int
4472 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4473                  const struct rte_flow_item items[],
4474                  const struct rte_flow_action actions[],
4475                  bool external, struct rte_flow_error *error)
4476 {
4477         int ret;
4478         uint64_t action_flags = 0;
4479         uint64_t item_flags = 0;
4480         uint64_t last_item = 0;
4481         uint8_t next_protocol = 0xff;
4482         uint16_t ether_type = 0;
4483         int actions_n = 0;
4484         uint8_t item_ipv6_proto = 0;
4485         const struct rte_flow_item *gre_item = NULL;
4486         const struct rte_flow_action_raw_decap *decap;
4487         const struct rte_flow_action_raw_encap *encap;
4488         const struct rte_flow_action_rss *rss;
4489         const struct rte_flow_item_tcp nic_tcp_mask = {
4490                 .hdr = {
4491                         .tcp_flags = 0xFF,
4492                         .src_port = RTE_BE16(UINT16_MAX),
4493                         .dst_port = RTE_BE16(UINT16_MAX),
4494                 }
4495         };
4496         const struct rte_flow_item_ipv4 nic_ipv4_mask = {
4497                 .hdr = {
4498                         .src_addr = RTE_BE32(0xffffffff),
4499                         .dst_addr = RTE_BE32(0xffffffff),
4500                         .type_of_service = 0xff,
4501                         .next_proto_id = 0xff,
4502                         .time_to_live = 0xff,
4503                 },
4504         };
4505         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
4506                 .hdr = {
4507                         .src_addr =
4508                         "\xff\xff\xff\xff\xff\xff\xff\xff"
4509                         "\xff\xff\xff\xff\xff\xff\xff\xff",
4510                         .dst_addr =
4511                         "\xff\xff\xff\xff\xff\xff\xff\xff"
4512                         "\xff\xff\xff\xff\xff\xff\xff\xff",
4513                         .vtc_flow = RTE_BE32(0xffffffff),
4514                         .proto = 0xff,
4515                         .hop_limits = 0xff,
4516                 },
4517         };
4518         struct mlx5_priv *priv = dev->data->dev_private;
4519         struct mlx5_dev_config *dev_conf = &priv->config;
4520         uint16_t queue_index = 0xFFFF;
4521
4522         if (items == NULL)
4523                 return -1;
4524         ret = flow_dv_validate_attributes(dev, attr, external, error);
4525         if (ret < 0)
4526                 return ret;
4527         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4528                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4529                 int type = items->type;
4530
4531                 switch (type) {
4532                 case RTE_FLOW_ITEM_TYPE_VOID:
4533                         break;
4534                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4535                         ret = flow_dv_validate_item_port_id
4536                                         (dev, items, attr, item_flags, error);
4537                         if (ret < 0)
4538                                 return ret;
4539                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4540                         break;
4541                 case RTE_FLOW_ITEM_TYPE_ETH:
4542                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4543                                                           error);
4544                         if (ret < 0)
4545                                 return ret;
4546                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4547                                              MLX5_FLOW_LAYER_OUTER_L2;
4548                         if (items->mask != NULL && items->spec != NULL) {
4549                                 ether_type =
4550                                         ((const struct rte_flow_item_eth *)
4551                                          items->spec)->type;
4552                                 ether_type &=
4553                                         ((const struct rte_flow_item_eth *)
4554                                          items->mask)->type;
4555                                 ether_type = rte_be_to_cpu_16(ether_type);
4556                         } else {
4557                                 ether_type = 0;
4558                         }
4559                         break;
4560                 case RTE_FLOW_ITEM_TYPE_VLAN:
4561                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4562                                                            dev, error);
4563                         if (ret < 0)
4564                                 return ret;
4565                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4566                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4567                         if (items->mask != NULL && items->spec != NULL) {
4568                                 ether_type =
4569                                         ((const struct rte_flow_item_vlan *)
4570                                          items->spec)->inner_type;
4571                                 ether_type &=
4572                                         ((const struct rte_flow_item_vlan *)
4573                                          items->mask)->inner_type;
4574                                 ether_type = rte_be_to_cpu_16(ether_type);
4575                         } else {
4576                                 ether_type = 0;
4577                         }
4578                         break;
4579                 case RTE_FLOW_ITEM_TYPE_IPV4:
4580                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4581                                                   &item_flags, &tunnel);
4582                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4583                                                            last_item,
4584                                                            ether_type,
4585                                                            &nic_ipv4_mask,
4586                                                            error);
4587                         if (ret < 0)
4588                                 return ret;
4589                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4590                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4591                         if (items->mask != NULL &&
4592                             ((const struct rte_flow_item_ipv4 *)
4593                              items->mask)->hdr.next_proto_id) {
4594                                 next_protocol =
4595                                         ((const struct rte_flow_item_ipv4 *)
4596                                          (items->spec))->hdr.next_proto_id;
4597                                 next_protocol &=
4598                                         ((const struct rte_flow_item_ipv4 *)
4599                                          (items->mask))->hdr.next_proto_id;
4600                         } else {
4601                                 /* Reset for inner layer. */
4602                                 next_protocol = 0xff;
4603                         }
4604                         break;
4605                 case RTE_FLOW_ITEM_TYPE_IPV6:
4606                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4607                                                   &item_flags, &tunnel);
4608                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4609                                                            last_item,
4610                                                            ether_type,
4611                                                            &nic_ipv6_mask,
4612                                                            error);
4613                         if (ret < 0)
4614                                 return ret;
4615                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4616                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4617                         if (items->mask != NULL &&
4618                             ((const struct rte_flow_item_ipv6 *)
4619                              items->mask)->hdr.proto) {
4620                                 item_ipv6_proto =
4621                                         ((const struct rte_flow_item_ipv6 *)
4622                                          items->spec)->hdr.proto;
4623                                 next_protocol =
4624                                         ((const struct rte_flow_item_ipv6 *)
4625                                          items->spec)->hdr.proto;
4626                                 next_protocol &=
4627                                         ((const struct rte_flow_item_ipv6 *)
4628                                          items->mask)->hdr.proto;
4629                         } else {
4630                                 /* Reset for inner layer. */
4631                                 next_protocol = 0xff;
4632                         }
4633                         break;
4634                 case RTE_FLOW_ITEM_TYPE_TCP:
4635                         ret = mlx5_flow_validate_item_tcp
4636                                                 (items, item_flags,
4637                                                  next_protocol,
4638                                                  &nic_tcp_mask,
4639                                                  error);
4640                         if (ret < 0)
4641                                 return ret;
4642                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4643                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4644                         break;
4645                 case RTE_FLOW_ITEM_TYPE_UDP:
4646                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4647                                                           next_protocol,
4648                                                           error);
4649                         if (ret < 0)
4650                                 return ret;
4651                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4652                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4653                         break;
4654                 case RTE_FLOW_ITEM_TYPE_GRE:
4655                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4656                                                           next_protocol, error);
4657                         if (ret < 0)
4658                                 return ret;
4659                         gre_item = items;
4660                         last_item = MLX5_FLOW_LAYER_GRE;
4661                         break;
4662                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4663                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4664                                                             next_protocol,
4665                                                             error);
4666                         if (ret < 0)
4667                                 return ret;
4668                         last_item = MLX5_FLOW_LAYER_NVGRE;
4669                         break;
4670                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4671                         ret = mlx5_flow_validate_item_gre_key
4672                                 (items, item_flags, gre_item, error);
4673                         if (ret < 0)
4674                                 return ret;
4675                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4676                         break;
4677                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4678                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4679                                                             error);
4680                         if (ret < 0)
4681                                 return ret;
4682                         last_item = MLX5_FLOW_LAYER_VXLAN;
4683                         break;
4684                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4685                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4686                                                                 item_flags, dev,
4687                                                                 error);
4688                         if (ret < 0)
4689                                 return ret;
4690                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4691                         break;
4692                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4693                         ret = mlx5_flow_validate_item_geneve(items,
4694                                                              item_flags, dev,
4695                                                              error);
4696                         if (ret < 0)
4697                                 return ret;
4698                         last_item = MLX5_FLOW_LAYER_GENEVE;
4699                         break;
4700                 case RTE_FLOW_ITEM_TYPE_MPLS:
4701                         ret = mlx5_flow_validate_item_mpls(dev, items,
4702                                                            item_flags,
4703                                                            last_item, error);
4704                         if (ret < 0)
4705                                 return ret;
4706                         last_item = MLX5_FLOW_LAYER_MPLS;
4707                         break;
4708
4709                 case RTE_FLOW_ITEM_TYPE_MARK:
4710                         ret = flow_dv_validate_item_mark(dev, items, attr,
4711                                                          error);
4712                         if (ret < 0)
4713                                 return ret;
4714                         last_item = MLX5_FLOW_ITEM_MARK;
4715                         break;
4716                 case RTE_FLOW_ITEM_TYPE_META:
4717                         ret = flow_dv_validate_item_meta(dev, items, attr,
4718                                                          error);
4719                         if (ret < 0)
4720                                 return ret;
4721                         last_item = MLX5_FLOW_ITEM_METADATA;
4722                         break;
4723                 case RTE_FLOW_ITEM_TYPE_ICMP:
4724                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4725                                                            next_protocol,
4726                                                            error);
4727                         if (ret < 0)
4728                                 return ret;
4729                         last_item = MLX5_FLOW_LAYER_ICMP;
4730                         break;
4731                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4732                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4733                                                             next_protocol,
4734                                                             error);
4735                         if (ret < 0)
4736                                 return ret;
4737                         item_ipv6_proto = IPPROTO_ICMPV6;
4738                         last_item = MLX5_FLOW_LAYER_ICMP6;
4739                         break;
4740                 case RTE_FLOW_ITEM_TYPE_TAG:
4741                         ret = flow_dv_validate_item_tag(dev, items,
4742                                                         attr, error);
4743                         if (ret < 0)
4744                                 return ret;
4745                         last_item = MLX5_FLOW_ITEM_TAG;
4746                         break;
4747                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4748                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4749                         break;
4750                 case RTE_FLOW_ITEM_TYPE_GTP:
4751                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4752                                                         error);
4753                         if (ret < 0)
4754                                 return ret;
4755                         last_item = MLX5_FLOW_LAYER_GTP;
4756                         break;
4757                 default:
4758                         return rte_flow_error_set(error, ENOTSUP,
4759                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4760                                                   NULL, "item not supported");
4761                 }
4762                 item_flags |= last_item;
4763         }
4764         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4765                 int type = actions->type;
4766                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4767                         return rte_flow_error_set(error, ENOTSUP,
4768                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4769                                                   actions, "too many actions");
4770                 switch (type) {
4771                 case RTE_FLOW_ACTION_TYPE_VOID:
4772                         break;
4773                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4774                         ret = flow_dv_validate_action_port_id(dev,
4775                                                               action_flags,
4776                                                               actions,
4777                                                               attr,
4778                                                               error);
4779                         if (ret)
4780                                 return ret;
4781                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4782                         ++actions_n;
4783                         break;
4784                 case RTE_FLOW_ACTION_TYPE_FLAG:
4785                         ret = flow_dv_validate_action_flag(dev, action_flags,
4786                                                            attr, error);
4787                         if (ret < 0)
4788                                 return ret;
4789                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4790                                 /* Count all modify-header actions as one. */
4791                                 if (!(action_flags &
4792                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4793                                         ++actions_n;
4794                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4795                                                 MLX5_FLOW_ACTION_MARK_EXT;
4796                         } else {
4797                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4798                                 ++actions_n;
4799                         }
4800                         break;
4801                 case RTE_FLOW_ACTION_TYPE_MARK:
4802                         ret = flow_dv_validate_action_mark(dev, actions,
4803                                                            action_flags,
4804                                                            attr, error);
4805                         if (ret < 0)
4806                                 return ret;
4807                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4808                                 /* Count all modify-header actions as one. */
4809                                 if (!(action_flags &
4810                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4811                                         ++actions_n;
4812                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4813                                                 MLX5_FLOW_ACTION_MARK_EXT;
4814                         } else {
4815                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4816                                 ++actions_n;
4817                         }
4818                         break;
4819                 case RTE_FLOW_ACTION_TYPE_SET_META:
4820                         ret = flow_dv_validate_action_set_meta(dev, actions,
4821                                                                action_flags,
4822                                                                attr, error);
4823                         if (ret < 0)
4824                                 return ret;
4825                         /* Count all modify-header actions as one action. */
4826                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4827                                 ++actions_n;
4828                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4829                         break;
4830                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4831                         ret = flow_dv_validate_action_set_tag(dev, actions,
4832                                                               action_flags,
4833                                                               attr, error);
4834                         if (ret < 0)
4835                                 return ret;
4836                         /* Count all modify-header actions as one action. */
4837                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4838                                 ++actions_n;
4839                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4840                         break;
4841                 case RTE_FLOW_ACTION_TYPE_DROP:
4842                         ret = mlx5_flow_validate_action_drop(action_flags,
4843                                                              attr, error);
4844                         if (ret < 0)
4845                                 return ret;
4846                         action_flags |= MLX5_FLOW_ACTION_DROP;
4847                         ++actions_n;
4848                         break;
4849                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4850                         ret = mlx5_flow_validate_action_queue(actions,
4851                                                               action_flags, dev,
4852                                                               attr, error);
4853                         if (ret < 0)
4854                                 return ret;
4855                         queue_index = ((const struct rte_flow_action_queue *)
4856                                                         (actions->conf))->index;
4857                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4858                         ++actions_n;
4859                         break;
4860                 case RTE_FLOW_ACTION_TYPE_RSS:
4861                         rss = actions->conf;
4862                         ret = mlx5_flow_validate_action_rss(actions,
4863                                                             action_flags, dev,
4864                                                             attr, item_flags,
4865                                                             error);
4866                         if (ret < 0)
4867                                 return ret;
4868                         if (rss != NULL && rss->queue_num)
4869                                 queue_index = rss->queue[0];
4870                         action_flags |= MLX5_FLOW_ACTION_RSS;
4871                         ++actions_n;
4872                         break;
4873                 case RTE_FLOW_ACTION_TYPE_COUNT:
4874                         ret = flow_dv_validate_action_count(dev, error);
4875                         if (ret < 0)
4876                                 return ret;
4877                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4878                         ++actions_n;
4879                         break;
4880                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4881                         if (flow_dv_validate_action_pop_vlan(dev,
4882                                                              action_flags,
4883                                                              actions,
4884                                                              item_flags, attr,
4885                                                              error))
4886                                 return -rte_errno;
4887                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4888                         ++actions_n;
4889                         break;
4890                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4891                         ret = flow_dv_validate_action_push_vlan(action_flags,
4892                                                                 item_flags,
4893                                                                 actions, attr,
4894                                                                 error);
4895                         if (ret < 0)
4896                                 return ret;
4897                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4898                         ++actions_n;
4899                         break;
4900                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4901                         ret = flow_dv_validate_action_set_vlan_pcp
4902                                                 (action_flags, actions, error);
4903                         if (ret < 0)
4904                                 return ret;
4905                         /* Count PCP with push_vlan command. */
4906                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4907                         break;
4908                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4909                         ret = flow_dv_validate_action_set_vlan_vid
4910                                                 (item_flags, action_flags,
4911                                                  actions, error);
4912                         if (ret < 0)
4913                                 return ret;
4914                         /* Count VID with push_vlan command. */
4915                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4916                         break;
4917                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4918                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4919                         ret = flow_dv_validate_action_l2_encap(action_flags,
4920                                                                actions, error);
4921                         if (ret < 0)
4922                                 return ret;
4923                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
4924                         ++actions_n;
4925                         break;
4926                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4927                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4928                         ret = flow_dv_validate_action_decap(action_flags, attr,
4929                                                             error);
4930                         if (ret < 0)
4931                                 return ret;
4932                         action_flags |= MLX5_FLOW_ACTION_DECAP;
4933                         ++actions_n;
4934                         break;
4935                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4936                         ret = flow_dv_validate_action_raw_encap_decap
4937                                 (NULL, actions->conf, attr, &action_flags,
4938                                  &actions_n, error);
4939                         if (ret < 0)
4940                                 return ret;
4941                         break;
4942                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4943                         decap = actions->conf;
4944                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
4945                                 ;
4946                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4947                                 encap = NULL;
4948                                 actions--;
4949                         } else {
4950                                 encap = actions->conf;
4951                         }
4952                         ret = flow_dv_validate_action_raw_encap_decap
4953                                            (decap ? decap : &empty_decap, encap,
4954                                             attr, &action_flags, &actions_n,
4955                                             error);
4956                         if (ret < 0)
4957                                 return ret;
4958                         break;
4959                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4960                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4961                         ret = flow_dv_validate_action_modify_mac(action_flags,
4962                                                                  actions,
4963                                                                  item_flags,
4964                                                                  error);
4965                         if (ret < 0)
4966                                 return ret;
4967                         /* Count all modify-header actions as one action. */
4968                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4969                                 ++actions_n;
4970                         action_flags |= actions->type ==
4971                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4972                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4973                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4974                         break;
4975
4976                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4977                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4978                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4979                                                                   actions,
4980                                                                   item_flags,
4981                                                                   error);
4982                         if (ret < 0)
4983                                 return ret;
4984                         /* Count all modify-header actions as one action. */
4985                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4986                                 ++actions_n;
4987                         action_flags |= actions->type ==
4988                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4989                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4990                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4991                         break;
4992                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4993                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4994                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4995                                                                   actions,
4996                                                                   item_flags,
4997                                                                   error);
4998                         if (ret < 0)
4999                                 return ret;
5000                         if (item_ipv6_proto == IPPROTO_ICMPV6)
5001                                 return rte_flow_error_set(error, ENOTSUP,
5002                                         RTE_FLOW_ERROR_TYPE_ACTION,
5003                                         actions,
5004                                         "Can't change header "
5005                                         "with ICMPv6 proto");
5006                         /* Count all modify-header actions as one action. */
5007                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5008                                 ++actions_n;
5009                         action_flags |= actions->type ==
5010                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
5011                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
5012                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
5013                         break;
5014                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5015                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5016                         ret = flow_dv_validate_action_modify_tp(action_flags,
5017                                                                 actions,
5018                                                                 item_flags,
5019                                                                 error);
5020                         if (ret < 0)
5021                                 return ret;
5022                         /* Count all modify-header actions as one action. */
5023                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5024                                 ++actions_n;
5025                         action_flags |= actions->type ==
5026                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5027                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
5028                                                 MLX5_FLOW_ACTION_SET_TP_DST;
5029                         break;
5030                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5031                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5032                         ret = flow_dv_validate_action_modify_ttl(action_flags,
5033                                                                  actions,
5034                                                                  item_flags,
5035                                                                  error);
5036                         if (ret < 0)
5037                                 return ret;
5038                         /* Count all modify-header actions as one action. */
5039                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5040                                 ++actions_n;
5041                         action_flags |= actions->type ==
5042                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
5043                                                 MLX5_FLOW_ACTION_SET_TTL :
5044                                                 MLX5_FLOW_ACTION_DEC_TTL;
5045                         break;
5046                 case RTE_FLOW_ACTION_TYPE_JUMP:
5047                         ret = flow_dv_validate_action_jump(actions,
5048                                                            action_flags,
5049                                                            attr, external,
5050                                                            error);
5051                         if (ret)
5052                                 return ret;
5053                         ++actions_n;
5054                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5055                         break;
5056                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5057                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5058                         ret = flow_dv_validate_action_modify_tcp_seq
5059                                                                 (action_flags,
5060                                                                  actions,
5061                                                                  item_flags,
5062                                                                  error);
5063                         if (ret < 0)
5064                                 return ret;
5065                         /* Count all modify-header actions as one action. */
5066                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5067                                 ++actions_n;
5068                         action_flags |= actions->type ==
5069                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5070                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
5071                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5072                         break;
5073                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5074                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5075                         ret = flow_dv_validate_action_modify_tcp_ack
5076                                                                 (action_flags,
5077                                                                  actions,
5078                                                                  item_flags,
5079                                                                  error);
5080                         if (ret < 0)
5081                                 return ret;
5082                         /* Count all modify-header actions as one action. */
5083                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5084                                 ++actions_n;
5085                         action_flags |= actions->type ==
5086                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5087                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5088                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5089                         break;
5090                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5091                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5092                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5093                         break;
5094                 case RTE_FLOW_ACTION_TYPE_METER:
5095                         ret = mlx5_flow_validate_action_meter(dev,
5096                                                               action_flags,
5097                                                               actions, attr,
5098                                                               error);
5099                         if (ret < 0)
5100                                 return ret;
5101                         action_flags |= MLX5_FLOW_ACTION_METER;
5102                         ++actions_n;
5103                         break;
5104                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5105                         ret = flow_dv_validate_action_modify_ipv4_dscp
5106                                                          (action_flags,
5107                                                           actions,
5108                                                           item_flags,
5109                                                           error);
5110                         if (ret < 0)
5111                                 return ret;
5112                         /* Count all modify-header actions as one action. */
5113                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5114                                 ++actions_n;
5115                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5116                         break;
5117                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5118                         ret = flow_dv_validate_action_modify_ipv6_dscp
5119                                                                 (action_flags,
5120                                                                  actions,
5121                                                                  item_flags,
5122                                                                  error);
5123                         if (ret < 0)
5124                                 return ret;
5125                         /* Count all modify-header actions as one action. */
5126                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5127                                 ++actions_n;
5128                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5129                         break;
5130                 default:
5131                         return rte_flow_error_set(error, ENOTSUP,
5132                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5133                                                   actions,
5134                                                   "action not supported");
5135                 }
5136         }
5137         /*
5138          * Validate the drop action mutual exclusion with other actions.
5139          * Drop action is mutually-exclusive with any other action, except for
5140          * Count action.
5141          */
5142         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5143             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5144                 return rte_flow_error_set(error, EINVAL,
5145                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5146                                           "Drop action is mutually-exclusive "
5147                                           "with any other action, except for "
5148                                           "Count action");
5149         /* Eswitch has few restrictions on using items and actions */
5150         if (attr->transfer) {
5151                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5152                     action_flags & MLX5_FLOW_ACTION_FLAG)
5153                         return rte_flow_error_set(error, ENOTSUP,
5154                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5155                                                   NULL,
5156                                                   "unsupported action FLAG");
5157                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5158                     action_flags & MLX5_FLOW_ACTION_MARK)
5159                         return rte_flow_error_set(error, ENOTSUP,
5160                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5161                                                   NULL,
5162                                                   "unsupported action MARK");
5163                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5164                         return rte_flow_error_set(error, ENOTSUP,
5165                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5166                                                   NULL,
5167                                                   "unsupported action QUEUE");
5168                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5169                         return rte_flow_error_set(error, ENOTSUP,
5170                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5171                                                   NULL,
5172                                                   "unsupported action RSS");
5173                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5174                         return rte_flow_error_set(error, EINVAL,
5175                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5176                                                   actions,
5177                                                   "no fate action is found");
5178         } else {
5179                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5180                         return rte_flow_error_set(error, EINVAL,
5181                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5182                                                   actions,
5183                                                   "no fate action is found");
5184         }
5185         /* Continue validation for Xcap actions.*/
5186         if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) && (queue_index == 0xFFFF ||
5187             mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5188                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5189                     MLX5_FLOW_XCAP_ACTIONS)
5190                         return rte_flow_error_set(error, ENOTSUP,
5191                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5192                                                   NULL, "encap and decap "
5193                                                   "combination aren't supported");
5194                 if (!attr->transfer && attr->ingress && (action_flags &
5195                                                         MLX5_FLOW_ACTION_ENCAP))
5196                         return rte_flow_error_set(error, ENOTSUP,
5197                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5198                                                   NULL, "encap is not supported"
5199                                                   " for ingress traffic");
5200         }
5201         return 0;
5202 }
5203
5204 /**
5205  * Internal preparation function. Allocates the DV flow size,
5206  * this size is constant.
5207  *
5208  * @param[in] attr
5209  *   Pointer to the flow attributes.
5210  * @param[in] items
5211  *   Pointer to the list of items.
5212  * @param[in] actions
5213  *   Pointer to the list of actions.
5214  * @param[out] error
5215  *   Pointer to the error structure.
5216  *
5217  * @return
5218  *   Pointer to mlx5_flow object on success,
5219  *   otherwise NULL and rte_errno is set.
5220  */
5221 static struct mlx5_flow *
5222 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5223                 const struct rte_flow_item items[] __rte_unused,
5224                 const struct rte_flow_action actions[] __rte_unused,
5225                 struct rte_flow_error *error)
5226 {
5227         size_t size = sizeof(struct mlx5_flow);
5228         struct mlx5_flow *dev_flow;
5229
5230         dev_flow = rte_calloc(__func__, 1, size, 0);
5231         if (!dev_flow) {
5232                 rte_flow_error_set(error, ENOMEM,
5233                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5234                                    "not enough memory to create flow");
5235                 return NULL;
5236         }
5237         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5238         dev_flow->ingress = attr->ingress;
5239         dev_flow->transfer = attr->transfer;
5240         return dev_flow;
5241 }
5242
5243 #ifdef RTE_LIBRTE_MLX5_DEBUG
5244 /**
5245  * Sanity check for match mask and value. Similar to check_valid_spec() in
5246  * kernel driver. If unmasked bit is present in value, it returns failure.
5247  *
5248  * @param match_mask
5249  *   pointer to match mask buffer.
5250  * @param match_value
5251  *   pointer to match value buffer.
5252  *
5253  * @return
5254  *   0 if valid, -EINVAL otherwise.
5255  */
5256 static int
5257 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5258 {
5259         uint8_t *m = match_mask;
5260         uint8_t *v = match_value;
5261         unsigned int i;
5262
5263         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5264                 if (v[i] & ~m[i]) {
5265                         DRV_LOG(ERR,
5266                                 "match_value differs from match_criteria"
5267                                 " %p[%u] != %p[%u]",
5268                                 match_value, i, match_mask, i);
5269                         return -EINVAL;
5270                 }
5271         }
5272         return 0;
5273 }
5274 #endif
5275
5276 /**
5277  * Add Ethernet item to matcher and to the value.
5278  *
5279  * @param[in, out] matcher
5280  *   Flow matcher.
5281  * @param[in, out] key
5282  *   Flow matcher value.
5283  * @param[in] item
5284  *   Flow pattern to translate.
5285  * @param[in] inner
5286  *   Item is inner pattern.
5287  */
5288 static void
5289 flow_dv_translate_item_eth(void *matcher, void *key,
5290                            const struct rte_flow_item *item, int inner)
5291 {
5292         const struct rte_flow_item_eth *eth_m = item->mask;
5293         const struct rte_flow_item_eth *eth_v = item->spec;
5294         const struct rte_flow_item_eth nic_mask = {
5295                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5296                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5297                 .type = RTE_BE16(0xffff),
5298         };
5299         void *headers_m;
5300         void *headers_v;
5301         char *l24_v;
5302         unsigned int i;
5303
5304         if (!eth_v)
5305                 return;
5306         if (!eth_m)
5307                 eth_m = &nic_mask;
5308         if (inner) {
5309                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5310                                          inner_headers);
5311                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5312         } else {
5313                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5314                                          outer_headers);
5315                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5316         }
5317         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5318                &eth_m->dst, sizeof(eth_m->dst));
5319         /* The value must be in the range of the mask. */
5320         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5321         for (i = 0; i < sizeof(eth_m->dst); ++i)
5322                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5323         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5324                &eth_m->src, sizeof(eth_m->src));
5325         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5326         /* The value must be in the range of the mask. */
5327         for (i = 0; i < sizeof(eth_m->dst); ++i)
5328                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5329         if (eth_v->type) {
5330                 /* When ethertype is present set mask for tagged VLAN. */
5331                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5332                 /* Set value for tagged VLAN if ethertype is 802.1Q. */
5333                 if (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_VLAN) ||
5334                     eth_v->type == RTE_BE16(RTE_ETHER_TYPE_QINQ)) {
5335                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag,
5336                                  1);
5337                         /* Return here to avoid setting match on ethertype. */
5338                         return;
5339                 }
5340         }
5341         /*
5342          * HW supports match on one Ethertype, the Ethertype following the last
5343          * VLAN tag of the packet (see PRM).
5344          * Set match on ethertype only if ETH header is not followed by VLAN.
5345          */
5346         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5347                  rte_be_to_cpu_16(eth_m->type));
5348         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5349         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5350 }
5351
5352 /**
5353  * Add VLAN item to matcher and to the value.
5354  *
5355  * @param[in, out] dev_flow
5356  *   Flow descriptor.
5357  * @param[in, out] matcher
5358  *   Flow matcher.
5359  * @param[in, out] key
5360  *   Flow matcher value.
5361  * @param[in] item
5362  *   Flow pattern to translate.
5363  * @param[in] inner
5364  *   Item is inner pattern.
5365  */
5366 static void
5367 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5368                             void *matcher, void *key,
5369                             const struct rte_flow_item *item,
5370                             int inner)
5371 {
5372         const struct rte_flow_item_vlan *vlan_m = item->mask;
5373         const struct rte_flow_item_vlan *vlan_v = item->spec;
5374         void *headers_m;
5375         void *headers_v;
5376         uint16_t tci_m;
5377         uint16_t tci_v;
5378
5379         if (!vlan_v)
5380                 return;
5381         if (!vlan_m)
5382                 vlan_m = &rte_flow_item_vlan_mask;
5383         if (inner) {
5384                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5385                                          inner_headers);
5386                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5387         } else {
5388                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5389                                          outer_headers);
5390                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5391                 /*
5392                  * This is workaround, masks are not supported,
5393                  * and pre-validated.
5394                  */
5395                 dev_flow->dv.vf_vlan.tag =
5396                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5397         }
5398         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5399         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5400         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5401         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5402         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5403         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5404         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5405         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5406         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5407         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5408         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5409                  rte_be_to_cpu_16(vlan_m->inner_type));
5410         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5411                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5412 }
5413
5414 /**
5415  * Add IPV4 item to matcher and to the value.
5416  *
5417  * @param[in, out] matcher
5418  *   Flow matcher.
5419  * @param[in, out] key
5420  *   Flow matcher value.
5421  * @param[in] item
5422  *   Flow pattern to translate.
5423  * @param[in] item_flags
5424  *   Bit-fields that holds the items detected until now.
5425  * @param[in] inner
5426  *   Item is inner pattern.
5427  * @param[in] group
5428  *   The group to insert the rule.
5429  */
5430 static void
5431 flow_dv_translate_item_ipv4(void *matcher, void *key,
5432                             const struct rte_flow_item *item,
5433                             const uint64_t item_flags,
5434                             int inner, uint32_t group)
5435 {
5436         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5437         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5438         const struct rte_flow_item_ipv4 nic_mask = {
5439                 .hdr = {
5440                         .src_addr = RTE_BE32(0xffffffff),
5441                         .dst_addr = RTE_BE32(0xffffffff),
5442                         .type_of_service = 0xff,
5443                         .next_proto_id = 0xff,
5444                         .time_to_live = 0xff,
5445                 },
5446         };
5447         void *headers_m;
5448         void *headers_v;
5449         char *l24_m;
5450         char *l24_v;
5451         uint8_t tos;
5452
5453         if (inner) {
5454                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5455                                          inner_headers);
5456                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5457         } else {
5458                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5459                                          outer_headers);
5460                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5461         }
5462         if (group == 0)
5463                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5464         else
5465                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5466         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5467         if (!ipv4_v)
5468                 return;
5469         if (!ipv4_m)
5470                 ipv4_m = &nic_mask;
5471         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5472                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5473         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5474                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5475         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5476         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5477         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5478                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5479         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5480                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5481         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5482         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5483         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5484         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5485                  ipv4_m->hdr.type_of_service);
5486         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5487         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5488                  ipv4_m->hdr.type_of_service >> 2);
5489         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5490         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5491                  ipv4_m->hdr.next_proto_id);
5492         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5493                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5494         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
5495                  ipv4_m->hdr.time_to_live);
5496         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
5497                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
5498         /*
5499          * On outer header (which must contains L2), or inner header with L2,
5500          * set cvlan_tag mask bit to mark this packet as untagged.
5501          */
5502         if (!inner || item_flags & MLX5_FLOW_LAYER_INNER_L2)
5503                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5504 }
5505
5506 /**
5507  * Add IPV6 item to matcher and to the value.
5508  *
5509  * @param[in, out] matcher
5510  *   Flow matcher.
5511  * @param[in, out] key
5512  *   Flow matcher value.
5513  * @param[in] item
5514  *   Flow pattern to translate.
5515  * @param[in] item_flags
5516  *   Bit-fields that holds the items detected until now.
5517  * @param[in] inner
5518  *   Item is inner pattern.
5519  * @param[in] group
5520  *   The group to insert the rule.
5521  */
5522 static void
5523 flow_dv_translate_item_ipv6(void *matcher, void *key,
5524                             const struct rte_flow_item *item,
5525                             const uint64_t item_flags,
5526                             int inner, uint32_t group)
5527 {
5528         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5529         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5530         const struct rte_flow_item_ipv6 nic_mask = {
5531                 .hdr = {
5532                         .src_addr =
5533                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5534                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5535                         .dst_addr =
5536                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5537                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5538                         .vtc_flow = RTE_BE32(0xffffffff),
5539                         .proto = 0xff,
5540                         .hop_limits = 0xff,
5541                 },
5542         };
5543         void *headers_m;
5544         void *headers_v;
5545         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5546         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5547         char *l24_m;
5548         char *l24_v;
5549         uint32_t vtc_m;
5550         uint32_t vtc_v;
5551         int i;
5552         int size;
5553
5554         if (inner) {
5555                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5556                                          inner_headers);
5557                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5558         } else {
5559                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5560                                          outer_headers);
5561                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5562         }
5563         if (group == 0)
5564                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5565         else
5566                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5567         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5568         if (!ipv6_v)
5569                 return;
5570         if (!ipv6_m)
5571                 ipv6_m = &nic_mask;
5572         size = sizeof(ipv6_m->hdr.dst_addr);
5573         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5574                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5575         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5576                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5577         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5578         for (i = 0; i < size; ++i)
5579                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5580         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5581                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5582         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5583                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5584         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5585         for (i = 0; i < size; ++i)
5586                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5587         /* TOS. */
5588         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5589         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5590         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5591         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5592         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5593         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5594         /* Label. */
5595         if (inner) {
5596                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5597                          vtc_m);
5598                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5599                          vtc_v);
5600         } else {
5601                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5602                          vtc_m);
5603                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5604                          vtc_v);
5605         }
5606         /* Protocol. */
5607         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5608                  ipv6_m->hdr.proto);
5609         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5610                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5611         /* Hop limit. */
5612         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
5613                  ipv6_m->hdr.hop_limits);
5614         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
5615                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
5616         /*
5617          * On outer header (which must contains L2), or inner header with L2,
5618          * set cvlan_tag mask bit to mark this packet as untagged.
5619          */
5620         if (!inner || item_flags & MLX5_FLOW_LAYER_INNER_L2)
5621                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5622 }
5623
5624 /**
5625  * Add TCP item to matcher and to the value.
5626  *
5627  * @param[in, out] matcher
5628  *   Flow matcher.
5629  * @param[in, out] key
5630  *   Flow matcher value.
5631  * @param[in] item
5632  *   Flow pattern to translate.
5633  * @param[in] inner
5634  *   Item is inner pattern.
5635  */
5636 static void
5637 flow_dv_translate_item_tcp(void *matcher, void *key,
5638                            const struct rte_flow_item *item,
5639                            int inner)
5640 {
5641         const struct rte_flow_item_tcp *tcp_m = item->mask;
5642         const struct rte_flow_item_tcp *tcp_v = item->spec;
5643         void *headers_m;
5644         void *headers_v;
5645
5646         if (inner) {
5647                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5648                                          inner_headers);
5649                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5650         } else {
5651                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5652                                          outer_headers);
5653                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5654         }
5655         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5656         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5657         if (!tcp_v)
5658                 return;
5659         if (!tcp_m)
5660                 tcp_m = &rte_flow_item_tcp_mask;
5661         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5662                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5663         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5664                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5665         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5666                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5667         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5668                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5669         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5670                  tcp_m->hdr.tcp_flags);
5671         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5672                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5673 }
5674
5675 /**
5676  * Add UDP item to matcher and to the value.
5677  *
5678  * @param[in, out] matcher
5679  *   Flow matcher.
5680  * @param[in, out] key
5681  *   Flow matcher value.
5682  * @param[in] item
5683  *   Flow pattern to translate.
5684  * @param[in] inner
5685  *   Item is inner pattern.
5686  */
5687 static void
5688 flow_dv_translate_item_udp(void *matcher, void *key,
5689                            const struct rte_flow_item *item,
5690                            int inner)
5691 {
5692         const struct rte_flow_item_udp *udp_m = item->mask;
5693         const struct rte_flow_item_udp *udp_v = item->spec;
5694         void *headers_m;
5695         void *headers_v;
5696
5697         if (inner) {
5698                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5699                                          inner_headers);
5700                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5701         } else {
5702                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5703                                          outer_headers);
5704                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5705         }
5706         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5707         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5708         if (!udp_v)
5709                 return;
5710         if (!udp_m)
5711                 udp_m = &rte_flow_item_udp_mask;
5712         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5713                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5714         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5715                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5716         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5717                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5718         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5719                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5720 }
5721
5722 /**
5723  * Add GRE optional Key item to matcher and to the value.
5724  *
5725  * @param[in, out] matcher
5726  *   Flow matcher.
5727  * @param[in, out] key
5728  *   Flow matcher value.
5729  * @param[in] item
5730  *   Flow pattern to translate.
5731  * @param[in] inner
5732  *   Item is inner pattern.
5733  */
5734 static void
5735 flow_dv_translate_item_gre_key(void *matcher, void *key,
5736                                    const struct rte_flow_item *item)
5737 {
5738         const rte_be32_t *key_m = item->mask;
5739         const rte_be32_t *key_v = item->spec;
5740         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5741         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5742         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5743
5744         /* GRE K bit must be on and should already be validated */
5745         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5746         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5747         if (!key_v)
5748                 return;
5749         if (!key_m)
5750                 key_m = &gre_key_default_mask;
5751         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5752                  rte_be_to_cpu_32(*key_m) >> 8);
5753         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5754                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5755         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5756                  rte_be_to_cpu_32(*key_m) & 0xFF);
5757         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5758                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5759 }
5760
5761 /**
5762  * Add GRE item to matcher and to the value.
5763  *
5764  * @param[in, out] matcher
5765  *   Flow matcher.
5766  * @param[in, out] key
5767  *   Flow matcher value.
5768  * @param[in] item
5769  *   Flow pattern to translate.
5770  * @param[in] inner
5771  *   Item is inner pattern.
5772  */
5773 static void
5774 flow_dv_translate_item_gre(void *matcher, void *key,
5775                            const struct rte_flow_item *item,
5776                            int inner)
5777 {
5778         const struct rte_flow_item_gre *gre_m = item->mask;
5779         const struct rte_flow_item_gre *gre_v = item->spec;
5780         void *headers_m;
5781         void *headers_v;
5782         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5783         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5784         struct {
5785                 union {
5786                         __extension__
5787                         struct {
5788                                 uint16_t version:3;
5789                                 uint16_t rsvd0:9;
5790                                 uint16_t s_present:1;
5791                                 uint16_t k_present:1;
5792                                 uint16_t rsvd_bit1:1;
5793                                 uint16_t c_present:1;
5794                         };
5795                         uint16_t value;
5796                 };
5797         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5798
5799         if (inner) {
5800                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5801                                          inner_headers);
5802                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5803         } else {
5804                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5805                                          outer_headers);
5806                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5807         }
5808         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5809         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5810         if (!gre_v)
5811                 return;
5812         if (!gre_m)
5813                 gre_m = &rte_flow_item_gre_mask;
5814         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5815                  rte_be_to_cpu_16(gre_m->protocol));
5816         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5817                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5818         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5819         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5820         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5821                  gre_crks_rsvd0_ver_m.c_present);
5822         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5823                  gre_crks_rsvd0_ver_v.c_present &
5824                  gre_crks_rsvd0_ver_m.c_present);
5825         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5826                  gre_crks_rsvd0_ver_m.k_present);
5827         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5828                  gre_crks_rsvd0_ver_v.k_present &
5829                  gre_crks_rsvd0_ver_m.k_present);
5830         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5831                  gre_crks_rsvd0_ver_m.s_present);
5832         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5833                  gre_crks_rsvd0_ver_v.s_present &
5834                  gre_crks_rsvd0_ver_m.s_present);
5835 }
5836
5837 /**
5838  * Add NVGRE item to matcher and to the value.
5839  *
5840  * @param[in, out] matcher
5841  *   Flow matcher.
5842  * @param[in, out] key
5843  *   Flow matcher value.
5844  * @param[in] item
5845  *   Flow pattern to translate.
5846  * @param[in] inner
5847  *   Item is inner pattern.
5848  */
5849 static void
5850 flow_dv_translate_item_nvgre(void *matcher, void *key,
5851                              const struct rte_flow_item *item,
5852                              int inner)
5853 {
5854         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5855         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5856         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5857         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5858         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5859         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5860         char *gre_key_m;
5861         char *gre_key_v;
5862         int size;
5863         int i;
5864
5865         /* For NVGRE, GRE header fields must be set with defined values. */
5866         const struct rte_flow_item_gre gre_spec = {
5867                 .c_rsvd0_ver = RTE_BE16(0x2000),
5868                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5869         };
5870         const struct rte_flow_item_gre gre_mask = {
5871                 .c_rsvd0_ver = RTE_BE16(0xB000),
5872                 .protocol = RTE_BE16(UINT16_MAX),
5873         };
5874         const struct rte_flow_item gre_item = {
5875                 .spec = &gre_spec,
5876                 .mask = &gre_mask,
5877                 .last = NULL,
5878         };
5879         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5880         if (!nvgre_v)
5881                 return;
5882         if (!nvgre_m)
5883                 nvgre_m = &rte_flow_item_nvgre_mask;
5884         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5885         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5886         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5887         memcpy(gre_key_m, tni_flow_id_m, size);
5888         for (i = 0; i < size; ++i)
5889                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5890 }
5891
5892 /**
5893  * Add VXLAN item to matcher and to the value.
5894  *
5895  * @param[in, out] matcher
5896  *   Flow matcher.
5897  * @param[in, out] key
5898  *   Flow matcher value.
5899  * @param[in] item
5900  *   Flow pattern to translate.
5901  * @param[in] inner
5902  *   Item is inner pattern.
5903  */
5904 static void
5905 flow_dv_translate_item_vxlan(void *matcher, void *key,
5906                              const struct rte_flow_item *item,
5907                              int inner)
5908 {
5909         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5910         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5911         void *headers_m;
5912         void *headers_v;
5913         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5914         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5915         char *vni_m;
5916         char *vni_v;
5917         uint16_t dport;
5918         int size;
5919         int i;
5920
5921         if (inner) {
5922                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5923                                          inner_headers);
5924                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5925         } else {
5926                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5927                                          outer_headers);
5928                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5929         }
5930         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5931                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5932         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5933                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5934                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5935         }
5936         if (!vxlan_v)
5937                 return;
5938         if (!vxlan_m)
5939                 vxlan_m = &rte_flow_item_vxlan_mask;
5940         size = sizeof(vxlan_m->vni);
5941         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5942         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5943         memcpy(vni_m, vxlan_m->vni, size);
5944         for (i = 0; i < size; ++i)
5945                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5946 }
5947
5948 /**
5949  * Add VXLAN-GPE item to matcher and to the value.
5950  *
5951  * @param[in, out] matcher
5952  *   Flow matcher.
5953  * @param[in, out] key
5954  *   Flow matcher value.
5955  * @param[in] item
5956  *   Flow pattern to translate.
5957  * @param[in] inner
5958  *   Item is inner pattern.
5959  */
5960
5961 static void
5962 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
5963                                  const struct rte_flow_item *item, int inner)
5964 {
5965         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
5966         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
5967         void *headers_m;
5968         void *headers_v;
5969         void *misc_m =
5970                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
5971         void *misc_v =
5972                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
5973         char *vni_m;
5974         char *vni_v;
5975         uint16_t dport;
5976         int size;
5977         int i;
5978         uint8_t flags_m = 0xff;
5979         uint8_t flags_v = 0xc;
5980
5981         if (inner) {
5982                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5983                                          inner_headers);
5984                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5985         } else {
5986                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5987                                          outer_headers);
5988                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5989         }
5990         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5991                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5992         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5993                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5994                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5995         }
5996         if (!vxlan_v)
5997                 return;
5998         if (!vxlan_m)
5999                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
6000         size = sizeof(vxlan_m->vni);
6001         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
6002         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
6003         memcpy(vni_m, vxlan_m->vni, size);
6004         for (i = 0; i < size; ++i)
6005                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
6006         if (vxlan_m->flags) {
6007                 flags_m = vxlan_m->flags;
6008                 flags_v = vxlan_v->flags;
6009         }
6010         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
6011         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
6012         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
6013                  vxlan_m->protocol);
6014         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
6015                  vxlan_v->protocol);
6016 }
6017
6018 /**
6019  * Add Geneve item to matcher and to the value.
6020  *
6021  * @param[in, out] matcher
6022  *   Flow matcher.
6023  * @param[in, out] key
6024  *   Flow matcher value.
6025  * @param[in] item
6026  *   Flow pattern to translate.
6027  * @param[in] inner
6028  *   Item is inner pattern.
6029  */
6030
6031 static void
6032 flow_dv_translate_item_geneve(void *matcher, void *key,
6033                               const struct rte_flow_item *item, int inner)
6034 {
6035         const struct rte_flow_item_geneve *geneve_m = item->mask;
6036         const struct rte_flow_item_geneve *geneve_v = item->spec;
6037         void *headers_m;
6038         void *headers_v;
6039         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6040         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6041         uint16_t dport;
6042         uint16_t gbhdr_m;
6043         uint16_t gbhdr_v;
6044         char *vni_m;
6045         char *vni_v;
6046         size_t size, i;
6047
6048         if (inner) {
6049                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6050                                          inner_headers);
6051                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6052         } else {
6053                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6054                                          outer_headers);
6055                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6056         }
6057         dport = MLX5_UDP_PORT_GENEVE;
6058         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6059                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6060                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6061         }
6062         if (!geneve_v)
6063                 return;
6064         if (!geneve_m)
6065                 geneve_m = &rte_flow_item_geneve_mask;
6066         size = sizeof(geneve_m->vni);
6067         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
6068         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
6069         memcpy(vni_m, geneve_m->vni, size);
6070         for (i = 0; i < size; ++i)
6071                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
6072         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
6073                  rte_be_to_cpu_16(geneve_m->protocol));
6074         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
6075                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
6076         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
6077         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
6078         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
6079                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6080         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
6081                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6082         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
6083                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6084         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
6085                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
6086                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6087 }
6088
6089 /**
6090  * Add MPLS item to matcher and to the value.
6091  *
6092  * @param[in, out] matcher
6093  *   Flow matcher.
6094  * @param[in, out] key
6095  *   Flow matcher value.
6096  * @param[in] item
6097  *   Flow pattern to translate.
6098  * @param[in] prev_layer
6099  *   The protocol layer indicated in previous item.
6100  * @param[in] inner
6101  *   Item is inner pattern.
6102  */
6103 static void
6104 flow_dv_translate_item_mpls(void *matcher, void *key,
6105                             const struct rte_flow_item *item,
6106                             uint64_t prev_layer,
6107                             int inner)
6108 {
6109         const uint32_t *in_mpls_m = item->mask;
6110         const uint32_t *in_mpls_v = item->spec;
6111         uint32_t *out_mpls_m = 0;
6112         uint32_t *out_mpls_v = 0;
6113         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6114         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6115         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
6116                                      misc_parameters_2);
6117         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6118         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
6119         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6120
6121         switch (prev_layer) {
6122         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6123                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
6124                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
6125                          MLX5_UDP_PORT_MPLS);
6126                 break;
6127         case MLX5_FLOW_LAYER_GRE:
6128                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
6129                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
6130                          RTE_ETHER_TYPE_MPLS);
6131                 break;
6132         default:
6133                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6134                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6135                          IPPROTO_MPLS);
6136                 break;
6137         }
6138         if (!in_mpls_v)
6139                 return;
6140         if (!in_mpls_m)
6141                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
6142         switch (prev_layer) {
6143         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6144                 out_mpls_m =
6145                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6146                                                  outer_first_mpls_over_udp);
6147                 out_mpls_v =
6148                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6149                                                  outer_first_mpls_over_udp);
6150                 break;
6151         case MLX5_FLOW_LAYER_GRE:
6152                 out_mpls_m =
6153                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6154                                                  outer_first_mpls_over_gre);
6155                 out_mpls_v =
6156                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6157                                                  outer_first_mpls_over_gre);
6158                 break;
6159         default:
6160                 /* Inner MPLS not over GRE is not supported. */
6161                 if (!inner) {
6162                         out_mpls_m =
6163                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6164                                                          misc2_m,
6165                                                          outer_first_mpls);
6166                         out_mpls_v =
6167                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6168                                                          misc2_v,
6169                                                          outer_first_mpls);
6170                 }
6171                 break;
6172         }
6173         if (out_mpls_m && out_mpls_v) {
6174                 *out_mpls_m = *in_mpls_m;
6175                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
6176         }
6177 }
6178
6179 /**
6180  * Add metadata register item to matcher
6181  *
6182  * @param[in, out] matcher
6183  *   Flow matcher.
6184  * @param[in, out] key
6185  *   Flow matcher value.
6186  * @param[in] reg_type
6187  *   Type of device metadata register
6188  * @param[in] value
6189  *   Register value
6190  * @param[in] mask
6191  *   Register mask
6192  */
6193 static void
6194 flow_dv_match_meta_reg(void *matcher, void *key,
6195                        enum modify_reg reg_type,
6196                        uint32_t data, uint32_t mask)
6197 {
6198         void *misc2_m =
6199                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
6200         void *misc2_v =
6201                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6202         uint32_t temp;
6203
6204         data &= mask;
6205         switch (reg_type) {
6206         case REG_A:
6207                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
6208                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
6209                 break;
6210         case REG_B:
6211                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
6212                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
6213                 break;
6214         case REG_C_0:
6215                 /*
6216                  * The metadata register C0 field might be divided into
6217                  * source vport index and META item value, we should set
6218                  * this field according to specified mask, not as whole one.
6219                  */
6220                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
6221                 temp |= mask;
6222                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
6223                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
6224                 temp &= ~mask;
6225                 temp |= data;
6226                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
6227                 break;
6228         case REG_C_1:
6229                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
6230                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
6231                 break;
6232         case REG_C_2:
6233                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
6234                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
6235                 break;
6236         case REG_C_3:
6237                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6238                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6239                 break;
6240         case REG_C_4:
6241                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6242                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6243                 break;
6244         case REG_C_5:
6245                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6246                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6247                 break;
6248         case REG_C_6:
6249                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6250                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6251                 break;
6252         case REG_C_7:
6253                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6254                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6255                 break;
6256         default:
6257                 MLX5_ASSERT(false);
6258                 break;
6259         }
6260 }
6261
6262 /**
6263  * Add MARK item to matcher
6264  *
6265  * @param[in] dev
6266  *   The device to configure through.
6267  * @param[in, out] matcher
6268  *   Flow matcher.
6269  * @param[in, out] key
6270  *   Flow matcher value.
6271  * @param[in] item
6272  *   Flow pattern to translate.
6273  */
6274 static void
6275 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6276                             void *matcher, void *key,
6277                             const struct rte_flow_item *item)
6278 {
6279         struct mlx5_priv *priv = dev->data->dev_private;
6280         const struct rte_flow_item_mark *mark;
6281         uint32_t value;
6282         uint32_t mask;
6283
6284         mark = item->mask ? (const void *)item->mask :
6285                             &rte_flow_item_mark_mask;
6286         mask = mark->id & priv->sh->dv_mark_mask;
6287         mark = (const void *)item->spec;
6288         MLX5_ASSERT(mark);
6289         value = mark->id & priv->sh->dv_mark_mask & mask;
6290         if (mask) {
6291                 enum modify_reg reg;
6292
6293                 /* Get the metadata register index for the mark. */
6294                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6295                 MLX5_ASSERT(reg > 0);
6296                 if (reg == REG_C_0) {
6297                         struct mlx5_priv *priv = dev->data->dev_private;
6298                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6299                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6300
6301                         mask &= msk_c0;
6302                         mask <<= shl_c0;
6303                         value <<= shl_c0;
6304                 }
6305                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6306         }
6307 }
6308
6309 /**
6310  * Add META item to matcher
6311  *
6312  * @param[in] dev
6313  *   The devich to configure through.
6314  * @param[in, out] matcher
6315  *   Flow matcher.
6316  * @param[in, out] key
6317  *   Flow matcher value.
6318  * @param[in] attr
6319  *   Attributes of flow that includes this item.
6320  * @param[in] item
6321  *   Flow pattern to translate.
6322  */
6323 static void
6324 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6325                             void *matcher, void *key,
6326                             const struct rte_flow_attr *attr,
6327                             const struct rte_flow_item *item)
6328 {
6329         const struct rte_flow_item_meta *meta_m;
6330         const struct rte_flow_item_meta *meta_v;
6331
6332         meta_m = (const void *)item->mask;
6333         if (!meta_m)
6334                 meta_m = &rte_flow_item_meta_mask;
6335         meta_v = (const void *)item->spec;
6336         if (meta_v) {
6337                 int reg;
6338                 uint32_t value = meta_v->data;
6339                 uint32_t mask = meta_m->data;
6340
6341                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6342                 if (reg < 0)
6343                         return;
6344                 /*
6345                  * In datapath code there is no endianness
6346                  * coversions for perfromance reasons, all
6347                  * pattern conversions are done in rte_flow.
6348                  */
6349                 value = rte_cpu_to_be_32(value);
6350                 mask = rte_cpu_to_be_32(mask);
6351                 if (reg == REG_C_0) {
6352                         struct mlx5_priv *priv = dev->data->dev_private;
6353                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6354                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6355 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6356                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6357
6358                         value >>= shr_c0;
6359                         mask >>= shr_c0;
6360 #endif
6361                         value <<= shl_c0;
6362                         mask <<= shl_c0;
6363                         MLX5_ASSERT(msk_c0);
6364                         MLX5_ASSERT(!(~msk_c0 & mask));
6365                 }
6366                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6367         }
6368 }
6369
6370 /**
6371  * Add vport metadata Reg C0 item to matcher
6372  *
6373  * @param[in, out] matcher
6374  *   Flow matcher.
6375  * @param[in, out] key
6376  *   Flow matcher value.
6377  * @param[in] reg
6378  *   Flow pattern to translate.
6379  */
6380 static void
6381 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6382                                   uint32_t value, uint32_t mask)
6383 {
6384         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6385 }
6386
6387 /**
6388  * Add tag item to matcher
6389  *
6390  * @param[in] dev
6391  *   The devich to configure through.
6392  * @param[in, out] matcher
6393  *   Flow matcher.
6394  * @param[in, out] key
6395  *   Flow matcher value.
6396  * @param[in] item
6397  *   Flow pattern to translate.
6398  */
6399 static void
6400 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6401                                 void *matcher, void *key,
6402                                 const struct rte_flow_item *item)
6403 {
6404         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6405         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6406         uint32_t mask, value;
6407
6408         MLX5_ASSERT(tag_v);
6409         value = tag_v->data;
6410         mask = tag_m ? tag_m->data : UINT32_MAX;
6411         if (tag_v->id == REG_C_0) {
6412                 struct mlx5_priv *priv = dev->data->dev_private;
6413                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6414                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6415
6416                 mask &= msk_c0;
6417                 mask <<= shl_c0;
6418                 value <<= shl_c0;
6419         }
6420         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6421 }
6422
6423 /**
6424  * Add TAG item to matcher
6425  *
6426  * @param[in] dev
6427  *   The devich to configure through.
6428  * @param[in, out] matcher
6429  *   Flow matcher.
6430  * @param[in, out] key
6431  *   Flow matcher value.
6432  * @param[in] item
6433  *   Flow pattern to translate.
6434  */
6435 static void
6436 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6437                            void *matcher, void *key,
6438                            const struct rte_flow_item *item)
6439 {
6440         const struct rte_flow_item_tag *tag_v = item->spec;
6441         const struct rte_flow_item_tag *tag_m = item->mask;
6442         enum modify_reg reg;
6443
6444         MLX5_ASSERT(tag_v);
6445         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6446         /* Get the metadata register index for the tag. */
6447         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6448         MLX5_ASSERT(reg > 0);
6449         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6450 }
6451
6452 /**
6453  * Add source vport match to the specified matcher.
6454  *
6455  * @param[in, out] matcher
6456  *   Flow matcher.
6457  * @param[in, out] key
6458  *   Flow matcher value.
6459  * @param[in] port
6460  *   Source vport value to match
6461  * @param[in] mask
6462  *   Mask
6463  */
6464 static void
6465 flow_dv_translate_item_source_vport(void *matcher, void *key,
6466                                     int16_t port, uint16_t mask)
6467 {
6468         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6469         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6470
6471         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6472         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6473 }
6474
6475 /**
6476  * Translate port-id item to eswitch match on  port-id.
6477  *
6478  * @param[in] dev
6479  *   The devich to configure through.
6480  * @param[in, out] matcher
6481  *   Flow matcher.
6482  * @param[in, out] key
6483  *   Flow matcher value.
6484  * @param[in] item
6485  *   Flow pattern to translate.
6486  *
6487  * @return
6488  *   0 on success, a negative errno value otherwise.
6489  */
6490 static int
6491 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6492                                void *key, const struct rte_flow_item *item)
6493 {
6494         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6495         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6496         struct mlx5_priv *priv;
6497         uint16_t mask, id;
6498
6499         mask = pid_m ? pid_m->id : 0xffff;
6500         id = pid_v ? pid_v->id : dev->data->port_id;
6501         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6502         if (!priv)
6503                 return -rte_errno;
6504         /* Translate to vport field or to metadata, depending on mode. */
6505         if (priv->vport_meta_mask)
6506                 flow_dv_translate_item_meta_vport(matcher, key,
6507                                                   priv->vport_meta_tag,
6508                                                   priv->vport_meta_mask);
6509         else
6510                 flow_dv_translate_item_source_vport(matcher, key,
6511                                                     priv->vport_id, mask);
6512         return 0;
6513 }
6514
6515 /**
6516  * Add ICMP6 item to matcher and to the value.
6517  *
6518  * @param[in, out] matcher
6519  *   Flow matcher.
6520  * @param[in, out] key
6521  *   Flow matcher value.
6522  * @param[in] item
6523  *   Flow pattern to translate.
6524  * @param[in] inner
6525  *   Item is inner pattern.
6526  */
6527 static void
6528 flow_dv_translate_item_icmp6(void *matcher, void *key,
6529                               const struct rte_flow_item *item,
6530                               int inner)
6531 {
6532         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6533         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6534         void *headers_m;
6535         void *headers_v;
6536         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6537                                      misc_parameters_3);
6538         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6539         if (inner) {
6540                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6541                                          inner_headers);
6542                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6543         } else {
6544                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6545                                          outer_headers);
6546                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6547         }
6548         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6549         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6550         if (!icmp6_v)
6551                 return;
6552         if (!icmp6_m)
6553                 icmp6_m = &rte_flow_item_icmp6_mask;
6554         /*
6555          * Force flow only to match the non-fragmented IPv6 ICMPv6 packets.
6556          * If only the protocol is specified, no need to match the frag.
6557          */
6558         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6559         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6560         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6561         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6562                  icmp6_v->type & icmp6_m->type);
6563         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6564         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6565                  icmp6_v->code & icmp6_m->code);
6566 }
6567
6568 /**
6569  * Add ICMP item to matcher and to the value.
6570  *
6571  * @param[in, out] matcher
6572  *   Flow matcher.
6573  * @param[in, out] key
6574  *   Flow matcher value.
6575  * @param[in] item
6576  *   Flow pattern to translate.
6577  * @param[in] inner
6578  *   Item is inner pattern.
6579  */
6580 static void
6581 flow_dv_translate_item_icmp(void *matcher, void *key,
6582                             const struct rte_flow_item *item,
6583                             int inner)
6584 {
6585         const struct rte_flow_item_icmp *icmp_m = item->mask;
6586         const struct rte_flow_item_icmp *icmp_v = item->spec;
6587         void *headers_m;
6588         void *headers_v;
6589         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6590                                      misc_parameters_3);
6591         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6592         if (inner) {
6593                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6594                                          inner_headers);
6595                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6596         } else {
6597                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6598                                          outer_headers);
6599                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6600         }
6601         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6602         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6603         if (!icmp_v)
6604                 return;
6605         if (!icmp_m)
6606                 icmp_m = &rte_flow_item_icmp_mask;
6607         /*
6608          * Force flow only to match the non-fragmented IPv4 ICMP packets.
6609          * If only the protocol is specified, no need to match the frag.
6610          */
6611         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6612         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6613         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6614                  icmp_m->hdr.icmp_type);
6615         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6616                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6617         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6618                  icmp_m->hdr.icmp_code);
6619         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6620                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6621 }
6622
6623 /**
6624  * Add GTP item to matcher and to the value.
6625  *
6626  * @param[in, out] matcher
6627  *   Flow matcher.
6628  * @param[in, out] key
6629  *   Flow matcher value.
6630  * @param[in] item
6631  *   Flow pattern to translate.
6632  * @param[in] inner
6633  *   Item is inner pattern.
6634  */
6635 static void
6636 flow_dv_translate_item_gtp(void *matcher, void *key,
6637                            const struct rte_flow_item *item, int inner)
6638 {
6639         const struct rte_flow_item_gtp *gtp_m = item->mask;
6640         const struct rte_flow_item_gtp *gtp_v = item->spec;
6641         void *headers_m;
6642         void *headers_v;
6643         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6644                                      misc_parameters_3);
6645         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6646         uint16_t dport = RTE_GTPU_UDP_PORT;
6647
6648         if (inner) {
6649                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6650                                          inner_headers);
6651                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6652         } else {
6653                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6654                                          outer_headers);
6655                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6656         }
6657         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6658                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6659                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6660         }
6661         if (!gtp_v)
6662                 return;
6663         if (!gtp_m)
6664                 gtp_m = &rte_flow_item_gtp_mask;
6665         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6666         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6667                  gtp_v->msg_type & gtp_m->msg_type);
6668         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6669                  rte_be_to_cpu_32(gtp_m->teid));
6670         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6671                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6672 }
6673
6674 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6675
6676 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6677         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6678                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6679
6680 /**
6681  * Calculate flow matcher enable bitmap.
6682  *
6683  * @param match_criteria
6684  *   Pointer to flow matcher criteria.
6685  *
6686  * @return
6687  *   Bitmap of enabled fields.
6688  */
6689 static uint8_t
6690 flow_dv_matcher_enable(uint32_t *match_criteria)
6691 {
6692         uint8_t match_criteria_enable;
6693
6694         match_criteria_enable =
6695                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6696                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6697         match_criteria_enable |=
6698                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6699                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6700         match_criteria_enable |=
6701                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6702                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6703         match_criteria_enable |=
6704                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6705                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6706         match_criteria_enable |=
6707                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6708                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6709         return match_criteria_enable;
6710 }
6711
6712
6713 /**
6714  * Get a flow table.
6715  *
6716  * @param[in, out] dev
6717  *   Pointer to rte_eth_dev structure.
6718  * @param[in] table_id
6719  *   Table id to use.
6720  * @param[in] egress
6721  *   Direction of the table.
6722  * @param[in] transfer
6723  *   E-Switch or NIC flow.
6724  * @param[out] error
6725  *   pointer to error structure.
6726  *
6727  * @return
6728  *   Returns tables resource based on the index, NULL in case of failed.
6729  */
6730 static struct mlx5_flow_tbl_resource *
6731 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6732                          uint32_t table_id, uint8_t egress,
6733                          uint8_t transfer,
6734                          struct rte_flow_error *error)
6735 {
6736         struct mlx5_priv *priv = dev->data->dev_private;
6737         struct mlx5_ibv_shared *sh = priv->sh;
6738         struct mlx5_flow_tbl_resource *tbl;
6739         union mlx5_flow_tbl_key table_key = {
6740                 {
6741                         .table_id = table_id,
6742                         .reserved = 0,
6743                         .domain = !!transfer,
6744                         .direction = !!egress,
6745                 }
6746         };
6747         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6748                                                          table_key.v64);
6749         struct mlx5_flow_tbl_data_entry *tbl_data;
6750         int ret;
6751         void *domain;
6752
6753         if (pos) {
6754                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6755                                         entry);
6756                 tbl = &tbl_data->tbl;
6757                 rte_atomic32_inc(&tbl->refcnt);
6758                 return tbl;
6759         }
6760         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6761         if (!tbl_data) {
6762                 rte_flow_error_set(error, ENOMEM,
6763                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6764                                    NULL,
6765                                    "cannot allocate flow table data entry");
6766                 return NULL;
6767         }
6768         tbl = &tbl_data->tbl;
6769         pos = &tbl_data->entry;
6770         if (transfer)
6771                 domain = sh->fdb_domain;
6772         else if (egress)
6773                 domain = sh->tx_domain;
6774         else
6775                 domain = sh->rx_domain;
6776         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6777         if (!tbl->obj) {
6778                 rte_flow_error_set(error, ENOMEM,
6779                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6780                                    NULL, "cannot create flow table object");
6781                 rte_free(tbl_data);
6782                 return NULL;
6783         }
6784         /*
6785          * No multi-threads now, but still better to initialize the reference
6786          * count before insert it into the hash list.
6787          */
6788         rte_atomic32_init(&tbl->refcnt);
6789         /* Jump action reference count is initialized here. */
6790         rte_atomic32_init(&tbl_data->jump.refcnt);
6791         pos->key = table_key.v64;
6792         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6793         if (ret < 0) {
6794                 rte_flow_error_set(error, -ret,
6795                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6796                                    "cannot insert flow table data entry");
6797                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6798                 rte_free(tbl_data);
6799         }
6800         rte_atomic32_inc(&tbl->refcnt);
6801         return tbl;
6802 }
6803
6804 /**
6805  * Release a flow table.
6806  *
6807  * @param[in] dev
6808  *   Pointer to rte_eth_dev structure.
6809  * @param[in] tbl
6810  *   Table resource to be released.
6811  *
6812  * @return
6813  *   Returns 0 if table was released, else return 1;
6814  */
6815 static int
6816 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6817                              struct mlx5_flow_tbl_resource *tbl)
6818 {
6819         struct mlx5_priv *priv = dev->data->dev_private;
6820         struct mlx5_ibv_shared *sh = priv->sh;
6821         struct mlx5_flow_tbl_data_entry *tbl_data =
6822                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6823
6824         if (!tbl)
6825                 return 0;
6826         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6827                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6828
6829                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6830                 tbl->obj = NULL;
6831                 /* remove the entry from the hash list and free memory. */
6832                 mlx5_hlist_remove(sh->flow_tbls, pos);
6833                 rte_free(tbl_data);
6834                 return 0;
6835         }
6836         return 1;
6837 }
6838
6839 /**
6840  * Register the flow matcher.
6841  *
6842  * @param[in, out] dev
6843  *   Pointer to rte_eth_dev structure.
6844  * @param[in, out] matcher
6845  *   Pointer to flow matcher.
6846  * @param[in, out] key
6847  *   Pointer to flow table key.
6848  * @parm[in, out] dev_flow
6849  *   Pointer to the dev_flow.
6850  * @param[out] error
6851  *   pointer to error structure.
6852  *
6853  * @return
6854  *   0 on success otherwise -errno and errno is set.
6855  */
6856 static int
6857 flow_dv_matcher_register(struct rte_eth_dev *dev,
6858                          struct mlx5_flow_dv_matcher *matcher,
6859                          union mlx5_flow_tbl_key *key,
6860                          struct mlx5_flow *dev_flow,
6861                          struct rte_flow_error *error)
6862 {
6863         struct mlx5_priv *priv = dev->data->dev_private;
6864         struct mlx5_ibv_shared *sh = priv->sh;
6865         struct mlx5_flow_dv_matcher *cache_matcher;
6866         struct mlx5dv_flow_matcher_attr dv_attr = {
6867                 .type = IBV_FLOW_ATTR_NORMAL,
6868                 .match_mask = (void *)&matcher->mask,
6869         };
6870         struct mlx5_flow_tbl_resource *tbl;
6871         struct mlx5_flow_tbl_data_entry *tbl_data;
6872
6873         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6874                                        key->domain, error);
6875         if (!tbl)
6876                 return -rte_errno;      /* No need to refill the error info */
6877         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6878         /* Lookup from cache. */
6879         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6880                 if (matcher->crc == cache_matcher->crc &&
6881                     matcher->priority == cache_matcher->priority &&
6882                     !memcmp((const void *)matcher->mask.buf,
6883                             (const void *)cache_matcher->mask.buf,
6884                             cache_matcher->mask.size)) {
6885                         DRV_LOG(DEBUG,
6886                                 "%s group %u priority %hd use %s "
6887                                 "matcher %p: refcnt %d++",
6888                                 key->domain ? "FDB" : "NIC", key->table_id,
6889                                 cache_matcher->priority,
6890                                 key->direction ? "tx" : "rx",
6891                                 (void *)cache_matcher,
6892                                 rte_atomic32_read(&cache_matcher->refcnt));
6893                         rte_atomic32_inc(&cache_matcher->refcnt);
6894                         dev_flow->dv.matcher = cache_matcher;
6895                         /* old matcher should not make the table ref++. */
6896                         flow_dv_tbl_resource_release(dev, tbl);
6897                         return 0;
6898                 }
6899         }
6900         /* Register new matcher. */
6901         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6902         if (!cache_matcher) {
6903                 flow_dv_tbl_resource_release(dev, tbl);
6904                 return rte_flow_error_set(error, ENOMEM,
6905                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6906                                           "cannot allocate matcher memory");
6907         }
6908         *cache_matcher = *matcher;
6909         dv_attr.match_criteria_enable =
6910                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6911         dv_attr.priority = matcher->priority;
6912         if (key->direction)
6913                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6914         cache_matcher->matcher_object =
6915                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6916         if (!cache_matcher->matcher_object) {
6917                 rte_free(cache_matcher);
6918 #ifdef HAVE_MLX5DV_DR
6919                 flow_dv_tbl_resource_release(dev, tbl);
6920 #endif
6921                 return rte_flow_error_set(error, ENOMEM,
6922                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6923                                           NULL, "cannot create matcher");
6924         }
6925         /* Save the table information */
6926         cache_matcher->tbl = tbl;
6927         rte_atomic32_init(&cache_matcher->refcnt);
6928         /* only matcher ref++, table ref++ already done above in get API. */
6929         rte_atomic32_inc(&cache_matcher->refcnt);
6930         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6931         dev_flow->dv.matcher = cache_matcher;
6932         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6933                 key->domain ? "FDB" : "NIC", key->table_id,
6934                 cache_matcher->priority,
6935                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6936                 rte_atomic32_read(&cache_matcher->refcnt));
6937         return 0;
6938 }
6939
6940 /**
6941  * Find existing tag resource or create and register a new one.
6942  *
6943  * @param dev[in, out]
6944  *   Pointer to rte_eth_dev structure.
6945  * @param[in, out] tag_be24
6946  *   Tag value in big endian then R-shift 8.
6947  * @parm[in, out] dev_flow
6948  *   Pointer to the dev_flow.
6949  * @param[out] error
6950  *   pointer to error structure.
6951  *
6952  * @return
6953  *   0 on success otherwise -errno and errno is set.
6954  */
6955 static int
6956 flow_dv_tag_resource_register
6957                         (struct rte_eth_dev *dev,
6958                          uint32_t tag_be24,
6959                          struct mlx5_flow *dev_flow,
6960                          struct rte_flow_error *error)
6961 {
6962         struct mlx5_priv *priv = dev->data->dev_private;
6963         struct mlx5_ibv_shared *sh = priv->sh;
6964         struct mlx5_flow_dv_tag_resource *cache_resource;
6965         struct mlx5_hlist_entry *entry;
6966
6967         /* Lookup a matching resource from cache. */
6968         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6969         if (entry) {
6970                 cache_resource = container_of
6971                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6972                 rte_atomic32_inc(&cache_resource->refcnt);
6973                 dev_flow->dv.tag_resource = cache_resource;
6974                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6975                         (void *)cache_resource,
6976                         rte_atomic32_read(&cache_resource->refcnt));
6977                 return 0;
6978         }
6979         /* Register new resource. */
6980         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6981         if (!cache_resource)
6982                 return rte_flow_error_set(error, ENOMEM,
6983                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6984                                           "cannot allocate resource memory");
6985         cache_resource->entry.key = (uint64_t)tag_be24;
6986         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6987         if (!cache_resource->action) {
6988                 rte_free(cache_resource);
6989                 return rte_flow_error_set(error, ENOMEM,
6990                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6991                                           NULL, "cannot create action");
6992         }
6993         rte_atomic32_init(&cache_resource->refcnt);
6994         rte_atomic32_inc(&cache_resource->refcnt);
6995         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6996                 mlx5_glue->destroy_flow_action(cache_resource->action);
6997                 rte_free(cache_resource);
6998                 return rte_flow_error_set(error, EEXIST,
6999                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7000                                           NULL, "cannot insert tag");
7001         }
7002         dev_flow->dv.tag_resource = cache_resource;
7003         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
7004                 (void *)cache_resource,
7005                 rte_atomic32_read(&cache_resource->refcnt));
7006         return 0;
7007 }
7008
7009 /**
7010  * Release the tag.
7011  *
7012  * @param dev
7013  *   Pointer to Ethernet device.
7014  * @param flow
7015  *   Pointer to mlx5_flow.
7016  *
7017  * @return
7018  *   1 while a reference on it exists, 0 when freed.
7019  */
7020 static int
7021 flow_dv_tag_release(struct rte_eth_dev *dev,
7022                     struct mlx5_flow_dv_tag_resource *tag)
7023 {
7024         struct mlx5_priv *priv = dev->data->dev_private;
7025         struct mlx5_ibv_shared *sh = priv->sh;
7026
7027         MLX5_ASSERT(tag);
7028         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
7029                 dev->data->port_id, (void *)tag,
7030                 rte_atomic32_read(&tag->refcnt));
7031         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
7032                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
7033                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
7034                 DRV_LOG(DEBUG, "port %u tag %p: removed",
7035                         dev->data->port_id, (void *)tag);
7036                 rte_free(tag);
7037                 return 0;
7038         }
7039         return 1;
7040 }
7041
7042 /**
7043  * Translate port ID action to vport.
7044  *
7045  * @param[in] dev
7046  *   Pointer to rte_eth_dev structure.
7047  * @param[in] action
7048  *   Pointer to the port ID action.
7049  * @param[out] dst_port_id
7050  *   The target port ID.
7051  * @param[out] error
7052  *   Pointer to the error structure.
7053  *
7054  * @return
7055  *   0 on success, a negative errno value otherwise and rte_errno is set.
7056  */
7057 static int
7058 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
7059                                  const struct rte_flow_action *action,
7060                                  uint32_t *dst_port_id,
7061                                  struct rte_flow_error *error)
7062 {
7063         uint32_t port;
7064         struct mlx5_priv *priv;
7065         const struct rte_flow_action_port_id *conf =
7066                         (const struct rte_flow_action_port_id *)action->conf;
7067
7068         port = conf->original ? dev->data->port_id : conf->id;
7069         priv = mlx5_port_to_eswitch_info(port, false);
7070         if (!priv)
7071                 return rte_flow_error_set(error, -rte_errno,
7072                                           RTE_FLOW_ERROR_TYPE_ACTION,
7073                                           NULL,
7074                                           "No eswitch info was found for port");
7075 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
7076         /*
7077          * This parameter is transferred to
7078          * mlx5dv_dr_action_create_dest_ib_port().
7079          */
7080         *dst_port_id = priv->ibv_port;
7081 #else
7082         /*
7083          * Legacy mode, no LAG configurations is supported.
7084          * This parameter is transferred to
7085          * mlx5dv_dr_action_create_dest_vport().
7086          */
7087         *dst_port_id = priv->vport_id;
7088 #endif
7089         return 0;
7090 }
7091
7092 /**
7093  * Add Tx queue matcher
7094  *
7095  * @param[in] dev
7096  *   Pointer to the dev struct.
7097  * @param[in, out] matcher
7098  *   Flow matcher.
7099  * @param[in, out] key
7100  *   Flow matcher value.
7101  * @param[in] item
7102  *   Flow pattern to translate.
7103  * @param[in] inner
7104  *   Item is inner pattern.
7105  */
7106 static void
7107 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
7108                                 void *matcher, void *key,
7109                                 const struct rte_flow_item *item)
7110 {
7111         const struct mlx5_rte_flow_item_tx_queue *queue_m;
7112         const struct mlx5_rte_flow_item_tx_queue *queue_v;
7113         void *misc_m =
7114                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7115         void *misc_v =
7116                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7117         struct mlx5_txq_ctrl *txq;
7118         uint32_t queue;
7119
7120
7121         queue_m = (const void *)item->mask;
7122         if (!queue_m)
7123                 return;
7124         queue_v = (const void *)item->spec;
7125         if (!queue_v)
7126                 return;
7127         txq = mlx5_txq_get(dev, queue_v->queue);
7128         if (!txq)
7129                 return;
7130         queue = txq->obj->sq->id;
7131         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
7132         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
7133                  queue & queue_m->queue);
7134         mlx5_txq_release(dev, queue_v->queue);
7135 }
7136
7137 /**
7138  * Set the hash fields according to the @p flow information.
7139  *
7140  * @param[in] dev_flow
7141  *   Pointer to the mlx5_flow.
7142  */
7143 static void
7144 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
7145 {
7146         struct rte_flow *flow = dev_flow->flow;
7147         uint64_t items = dev_flow->layers;
7148         int rss_inner = 0;
7149         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
7150
7151         dev_flow->hash_fields = 0;
7152 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
7153         if (flow->rss.level >= 2) {
7154                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
7155                 rss_inner = 1;
7156         }
7157 #endif
7158         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
7159             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
7160                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
7161                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7162                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
7163                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7164                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
7165                         else
7166                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
7167                 }
7168         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
7169                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
7170                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
7171                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7172                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
7173                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7174                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
7175                         else
7176                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
7177                 }
7178         }
7179         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
7180             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
7181                 if (rss_types & ETH_RSS_UDP) {
7182                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7183                                 dev_flow->hash_fields |=
7184                                                 IBV_RX_HASH_SRC_PORT_UDP;
7185                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7186                                 dev_flow->hash_fields |=
7187                                                 IBV_RX_HASH_DST_PORT_UDP;
7188                         else
7189                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
7190                 }
7191         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
7192                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
7193                 if (rss_types & ETH_RSS_TCP) {
7194                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7195                                 dev_flow->hash_fields |=
7196                                                 IBV_RX_HASH_SRC_PORT_TCP;
7197                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7198                                 dev_flow->hash_fields |=
7199                                                 IBV_RX_HASH_DST_PORT_TCP;
7200                         else
7201                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
7202                 }
7203         }
7204 }
7205
7206 /**
7207  * Fill the flow with DV spec, lock free
7208  * (mutex should be acquired by caller).
7209  *
7210  * @param[in] dev
7211  *   Pointer to rte_eth_dev structure.
7212  * @param[in, out] dev_flow
7213  *   Pointer to the sub flow.
7214  * @param[in] attr
7215  *   Pointer to the flow attributes.
7216  * @param[in] items
7217  *   Pointer to the list of items.
7218  * @param[in] actions
7219  *   Pointer to the list of actions.
7220  * @param[out] error
7221  *   Pointer to the error structure.
7222  *
7223  * @return
7224  *   0 on success, a negative errno value otherwise and rte_errno is set.
7225  */
7226 static int
7227 __flow_dv_translate(struct rte_eth_dev *dev,
7228                     struct mlx5_flow *dev_flow,
7229                     const struct rte_flow_attr *attr,
7230                     const struct rte_flow_item items[],
7231                     const struct rte_flow_action actions[],
7232                     struct rte_flow_error *error)
7233 {
7234         struct mlx5_priv *priv = dev->data->dev_private;
7235         struct mlx5_dev_config *dev_conf = &priv->config;
7236         struct rte_flow *flow = dev_flow->flow;
7237         uint64_t item_flags = 0;
7238         uint64_t last_item = 0;
7239         uint64_t action_flags = 0;
7240         uint64_t priority = attr->priority;
7241         struct mlx5_flow_dv_matcher matcher = {
7242                 .mask = {
7243                         .size = sizeof(matcher.mask.buf),
7244                 },
7245         };
7246         int actions_n = 0;
7247         bool actions_end = false;
7248         union {
7249                 struct mlx5_flow_dv_modify_hdr_resource res;
7250                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7251                             sizeof(struct mlx5_modification_cmd) *
7252                             (MLX5_MAX_MODIFY_NUM + 1)];
7253         } mhdr_dummy;
7254         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7255         union flow_dv_attr flow_attr = { .attr = 0 };
7256         uint32_t tag_be;
7257         union mlx5_flow_tbl_key tbl_key;
7258         uint32_t modify_action_position = UINT32_MAX;
7259         void *match_mask = matcher.mask.buf;
7260         void *match_value = dev_flow->dv.value.buf;
7261         uint8_t next_protocol = 0xff;
7262         struct rte_vlan_hdr vlan = { 0 };
7263         uint32_t table;
7264         int ret = 0;
7265
7266         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7267                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7268         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7269                                        !!priv->fdb_def_rule, &table, error);
7270         if (ret)
7271                 return ret;
7272         dev_flow->group = table;
7273         if (attr->transfer)
7274                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7275         if (priority == MLX5_FLOW_PRIO_RSVD)
7276                 priority = dev_conf->flow_prio - 1;
7277         /* number of actions must be set to 0 in case of dirty stack. */
7278         mhdr_res->actions_num = 0;
7279         for (; !actions_end ; actions++) {
7280                 const struct rte_flow_action_queue *queue;
7281                 const struct rte_flow_action_rss *rss;
7282                 const struct rte_flow_action *action = actions;
7283                 const struct rte_flow_action_count *count = action->conf;
7284                 const uint8_t *rss_key;
7285                 const struct rte_flow_action_jump *jump_data;
7286                 const struct rte_flow_action_meter *mtr;
7287                 struct mlx5_flow_tbl_resource *tbl;
7288                 uint32_t port_id = 0;
7289                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7290                 int action_type = actions->type;
7291                 const struct rte_flow_action *found_action = NULL;
7292
7293                 switch (action_type) {
7294                 case RTE_FLOW_ACTION_TYPE_VOID:
7295                         break;
7296                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7297                         if (flow_dv_translate_action_port_id(dev, action,
7298                                                              &port_id, error))
7299                                 return -rte_errno;
7300                         port_id_resource.port_id = port_id;
7301                         if (flow_dv_port_id_action_resource_register
7302                             (dev, &port_id_resource, dev_flow, error))
7303                                 return -rte_errno;
7304                         dev_flow->dv.actions[actions_n++] =
7305                                 dev_flow->dv.port_id_action->action;
7306                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7307                         break;
7308                 case RTE_FLOW_ACTION_TYPE_FLAG:
7309                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7310                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7311                                 struct rte_flow_action_mark mark = {
7312                                         .id = MLX5_FLOW_MARK_DEFAULT,
7313                                 };
7314
7315                                 if (flow_dv_convert_action_mark(dev, &mark,
7316                                                                 mhdr_res,
7317                                                                 error))
7318                                         return -rte_errno;
7319                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7320                                 break;
7321                         }
7322                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7323                         if (!dev_flow->dv.tag_resource)
7324                                 if (flow_dv_tag_resource_register
7325                                     (dev, tag_be, dev_flow, error))
7326                                         return -rte_errno;
7327                         dev_flow->dv.actions[actions_n++] =
7328                                 dev_flow->dv.tag_resource->action;
7329                         break;
7330                 case RTE_FLOW_ACTION_TYPE_MARK:
7331                         action_flags |= MLX5_FLOW_ACTION_MARK;
7332                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7333                                 const struct rte_flow_action_mark *mark =
7334                                         (const struct rte_flow_action_mark *)
7335                                                 actions->conf;
7336
7337                                 if (flow_dv_convert_action_mark(dev, mark,
7338                                                                 mhdr_res,
7339                                                                 error))
7340                                         return -rte_errno;
7341                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7342                                 break;
7343                         }
7344                         /* Fall-through */
7345                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7346                         /* Legacy (non-extensive) MARK action. */
7347                         tag_be = mlx5_flow_mark_set
7348                               (((const struct rte_flow_action_mark *)
7349                                (actions->conf))->id);
7350                         if (!dev_flow->dv.tag_resource)
7351                                 if (flow_dv_tag_resource_register
7352                                     (dev, tag_be, dev_flow, error))
7353                                         return -rte_errno;
7354                         dev_flow->dv.actions[actions_n++] =
7355                                 dev_flow->dv.tag_resource->action;
7356                         break;
7357                 case RTE_FLOW_ACTION_TYPE_SET_META:
7358                         if (flow_dv_convert_action_set_meta
7359                                 (dev, mhdr_res, attr,
7360                                  (const struct rte_flow_action_set_meta *)
7361                                   actions->conf, error))
7362                                 return -rte_errno;
7363                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7364                         break;
7365                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7366                         if (flow_dv_convert_action_set_tag
7367                                 (dev, mhdr_res,
7368                                  (const struct rte_flow_action_set_tag *)
7369                                   actions->conf, error))
7370                                 return -rte_errno;
7371                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7372                         break;
7373                 case RTE_FLOW_ACTION_TYPE_DROP:
7374                         action_flags |= MLX5_FLOW_ACTION_DROP;
7375                         break;
7376                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7377                         MLX5_ASSERT(flow->rss.queue);
7378                         queue = actions->conf;
7379                         flow->rss.queue_num = 1;
7380                         (*flow->rss.queue)[0] = queue->index;
7381                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7382                         break;
7383                 case RTE_FLOW_ACTION_TYPE_RSS:
7384                         MLX5_ASSERT(flow->rss.queue);
7385                         rss = actions->conf;
7386                         if (flow->rss.queue)
7387                                 memcpy((*flow->rss.queue), rss->queue,
7388                                        rss->queue_num * sizeof(uint16_t));
7389                         flow->rss.queue_num = rss->queue_num;
7390                         /* NULL RSS key indicates default RSS key. */
7391                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7392                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7393                         /*
7394                          * rss->level and rss.types should be set in advance
7395                          * when expanding items for RSS.
7396                          */
7397                         action_flags |= MLX5_FLOW_ACTION_RSS;
7398                         break;
7399                 case RTE_FLOW_ACTION_TYPE_COUNT:
7400                         if (!dev_conf->devx) {
7401                                 rte_errno = ENOTSUP;
7402                                 goto cnt_err;
7403                         }
7404                         flow->counter = flow_dv_counter_alloc(dev,
7405                                                               count->shared,
7406                                                               count->id,
7407                                                               dev_flow->group);
7408                         if (flow->counter == NULL)
7409                                 goto cnt_err;
7410                         dev_flow->dv.actions[actions_n++] =
7411                                 flow->counter->action;
7412                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7413                         break;
7414 cnt_err:
7415                         if (rte_errno == ENOTSUP)
7416                                 return rte_flow_error_set
7417                                               (error, ENOTSUP,
7418                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7419                                                NULL,
7420                                                "count action not supported");
7421                         else
7422                                 return rte_flow_error_set
7423                                                 (error, rte_errno,
7424                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7425                                                  action,
7426                                                  "cannot create counter"
7427                                                   " object.");
7428                         break;
7429                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7430                         dev_flow->dv.actions[actions_n++] =
7431                                                 priv->sh->pop_vlan_action;
7432                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7433                         break;
7434                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7435                         flow_dev_get_vlan_info_from_items(items, &vlan);
7436                         vlan.eth_proto = rte_be_to_cpu_16
7437                              ((((const struct rte_flow_action_of_push_vlan *)
7438                                                    actions->conf)->ethertype));
7439                         found_action = mlx5_flow_find_action
7440                                         (actions + 1,
7441                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7442                         if (found_action)
7443                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7444                         found_action = mlx5_flow_find_action
7445                                         (actions + 1,
7446                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7447                         if (found_action)
7448                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7449                         if (flow_dv_create_action_push_vlan
7450                                             (dev, attr, &vlan, dev_flow, error))
7451                                 return -rte_errno;
7452                         dev_flow->dv.actions[actions_n++] =
7453                                            dev_flow->dv.push_vlan_res->action;
7454                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7455                         break;
7456                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7457                         /* of_vlan_push action handled this action */
7458                         MLX5_ASSERT(action_flags &
7459                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7460                         break;
7461                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7462                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7463                                 break;
7464                         flow_dev_get_vlan_info_from_items(items, &vlan);
7465                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7466                         /* If no VLAN push - this is a modify header action */
7467                         if (flow_dv_convert_action_modify_vlan_vid
7468                                                 (mhdr_res, actions, error))
7469                                 return -rte_errno;
7470                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7471                         break;
7472                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7473                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7474                         if (flow_dv_create_action_l2_encap(dev, actions,
7475                                                            dev_flow,
7476                                                            attr->transfer,
7477                                                            error))
7478                                 return -rte_errno;
7479                         dev_flow->dv.actions[actions_n++] =
7480                                 dev_flow->dv.encap_decap->verbs_action;
7481                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7482                         break;
7483                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7484                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7485                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7486                                                            attr->transfer,
7487                                                            error))
7488                                 return -rte_errno;
7489                         dev_flow->dv.actions[actions_n++] =
7490                                 dev_flow->dv.encap_decap->verbs_action;
7491                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7492                         break;
7493                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7494                         /* Handle encap with preceding decap. */
7495                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
7496                                 if (flow_dv_create_action_raw_encap
7497                                         (dev, actions, dev_flow, attr, error))
7498                                         return -rte_errno;
7499                                 dev_flow->dv.actions[actions_n++] =
7500                                         dev_flow->dv.encap_decap->verbs_action;
7501                         } else {
7502                                 /* Handle encap without preceding decap. */
7503                                 if (flow_dv_create_action_l2_encap
7504                                     (dev, actions, dev_flow, attr->transfer,
7505                                      error))
7506                                         return -rte_errno;
7507                                 dev_flow->dv.actions[actions_n++] =
7508                                         dev_flow->dv.encap_decap->verbs_action;
7509                         }
7510                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7511                         break;
7512                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7513                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
7514                                 ;
7515                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7516                                 if (flow_dv_create_action_l2_decap
7517                                     (dev, dev_flow, attr->transfer, error))
7518                                         return -rte_errno;
7519                                 dev_flow->dv.actions[actions_n++] =
7520                                         dev_flow->dv.encap_decap->verbs_action;
7521                         }
7522                         /* If decap is followed by encap, handle it at encap. */
7523                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7524                         break;
7525                 case RTE_FLOW_ACTION_TYPE_JUMP:
7526                         jump_data = action->conf;
7527                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7528                                                        jump_data->group,
7529                                                        !!priv->fdb_def_rule,
7530                                                        &table, error);
7531                         if (ret)
7532                                 return ret;
7533                         tbl = flow_dv_tbl_resource_get(dev, table,
7534                                                        attr->egress,
7535                                                        attr->transfer, error);
7536                         if (!tbl)
7537                                 return rte_flow_error_set
7538                                                 (error, errno,
7539                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7540                                                  NULL,
7541                                                  "cannot create jump action.");
7542                         if (flow_dv_jump_tbl_resource_register
7543                             (dev, tbl, dev_flow, error)) {
7544                                 flow_dv_tbl_resource_release(dev, tbl);
7545                                 return rte_flow_error_set
7546                                                 (error, errno,
7547                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7548                                                  NULL,
7549                                                  "cannot create jump action.");
7550                         }
7551                         dev_flow->dv.actions[actions_n++] =
7552                                 dev_flow->dv.jump->action;
7553                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7554                         break;
7555                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7556                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7557                         if (flow_dv_convert_action_modify_mac
7558                                         (mhdr_res, actions, error))
7559                                 return -rte_errno;
7560                         action_flags |= actions->type ==
7561                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7562                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7563                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7564                         break;
7565                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7566                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7567                         if (flow_dv_convert_action_modify_ipv4
7568                                         (mhdr_res, actions, error))
7569                                 return -rte_errno;
7570                         action_flags |= actions->type ==
7571                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7572                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7573                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7574                         break;
7575                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7576                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7577                         if (flow_dv_convert_action_modify_ipv6
7578                                         (mhdr_res, actions, error))
7579                                 return -rte_errno;
7580                         action_flags |= actions->type ==
7581                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7582                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7583                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7584                         break;
7585                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7586                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7587                         if (flow_dv_convert_action_modify_tp
7588                                         (mhdr_res, actions, items,
7589                                          &flow_attr, dev_flow, !!(action_flags &
7590                                          MLX5_FLOW_ACTION_DECAP), error))
7591                                 return -rte_errno;
7592                         action_flags |= actions->type ==
7593                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7594                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7595                                         MLX5_FLOW_ACTION_SET_TP_DST;
7596                         break;
7597                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7598                         if (flow_dv_convert_action_modify_dec_ttl
7599                                         (mhdr_res, items, &flow_attr, dev_flow,
7600                                          !!(action_flags &
7601                                          MLX5_FLOW_ACTION_DECAP), error))
7602                                 return -rte_errno;
7603                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7604                         break;
7605                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7606                         if (flow_dv_convert_action_modify_ttl
7607                                         (mhdr_res, actions, items, &flow_attr,
7608                                          dev_flow, !!(action_flags &
7609                                          MLX5_FLOW_ACTION_DECAP), error))
7610                                 return -rte_errno;
7611                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7612                         break;
7613                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7614                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7615                         if (flow_dv_convert_action_modify_tcp_seq
7616                                         (mhdr_res, actions, error))
7617                                 return -rte_errno;
7618                         action_flags |= actions->type ==
7619                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7620                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7621                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7622                         break;
7623
7624                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7625                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7626                         if (flow_dv_convert_action_modify_tcp_ack
7627                                         (mhdr_res, actions, error))
7628                                 return -rte_errno;
7629                         action_flags |= actions->type ==
7630                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7631                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7632                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7633                         break;
7634                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7635                         if (flow_dv_convert_action_set_reg
7636                                         (mhdr_res, actions, error))
7637                                 return -rte_errno;
7638                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7639                         break;
7640                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7641                         if (flow_dv_convert_action_copy_mreg
7642                                         (dev, mhdr_res, actions, error))
7643                                 return -rte_errno;
7644                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7645                         break;
7646                 case RTE_FLOW_ACTION_TYPE_METER:
7647                         mtr = actions->conf;
7648                         if (!flow->meter) {
7649                                 flow->meter = mlx5_flow_meter_attach(priv,
7650                                                         mtr->mtr_id, attr,
7651                                                         error);
7652                                 if (!flow->meter)
7653                                         return rte_flow_error_set(error,
7654                                                 rte_errno,
7655                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7656                                                 NULL,
7657                                                 "meter not found "
7658                                                 "or invalid parameters");
7659                         }
7660                         /* Set the meter action. */
7661                         dev_flow->dv.actions[actions_n++] =
7662                                 flow->meter->mfts->meter_action;
7663                         action_flags |= MLX5_FLOW_ACTION_METER;
7664                         break;
7665                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7666                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7667                                                               actions, error))
7668                                 return -rte_errno;
7669                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7670                         break;
7671                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7672                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7673                                                               actions, error))
7674                                 return -rte_errno;
7675                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7676                         break;
7677                 case RTE_FLOW_ACTION_TYPE_END:
7678                         actions_end = true;
7679                         if (mhdr_res->actions_num) {
7680                                 /* create modify action if needed. */
7681                                 if (flow_dv_modify_hdr_resource_register
7682                                         (dev, mhdr_res, dev_flow, error))
7683                                         return -rte_errno;
7684                                 dev_flow->dv.actions[modify_action_position] =
7685                                         dev_flow->dv.modify_hdr->verbs_action;
7686                         }
7687                         break;
7688                 default:
7689                         break;
7690                 }
7691                 if (mhdr_res->actions_num &&
7692                     modify_action_position == UINT32_MAX)
7693                         modify_action_position = actions_n++;
7694         }
7695         dev_flow->dv.actions_n = actions_n;
7696         dev_flow->actions = action_flags;
7697         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7698                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7699                 int item_type = items->type;
7700
7701                 switch (item_type) {
7702                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7703                         flow_dv_translate_item_port_id(dev, match_mask,
7704                                                        match_value, items);
7705                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7706                         break;
7707                 case RTE_FLOW_ITEM_TYPE_ETH:
7708                         flow_dv_translate_item_eth(match_mask, match_value,
7709                                                    items, tunnel);
7710                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7711                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7712                                              MLX5_FLOW_LAYER_OUTER_L2;
7713                         break;
7714                 case RTE_FLOW_ITEM_TYPE_VLAN:
7715                         flow_dv_translate_item_vlan(dev_flow,
7716                                                     match_mask, match_value,
7717                                                     items, tunnel);
7718                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7719                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7720                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7721                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7722                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7723                         break;
7724                 case RTE_FLOW_ITEM_TYPE_IPV4:
7725                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7726                                                   &item_flags, &tunnel);
7727                         flow_dv_translate_item_ipv4(match_mask, match_value,
7728                                                     items, item_flags, tunnel,
7729                                                     dev_flow->group);
7730                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7731                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7732                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7733                         if (items->mask != NULL &&
7734                             ((const struct rte_flow_item_ipv4 *)
7735                              items->mask)->hdr.next_proto_id) {
7736                                 next_protocol =
7737                                         ((const struct rte_flow_item_ipv4 *)
7738                                          (items->spec))->hdr.next_proto_id;
7739                                 next_protocol &=
7740                                         ((const struct rte_flow_item_ipv4 *)
7741                                          (items->mask))->hdr.next_proto_id;
7742                         } else {
7743                                 /* Reset for inner layer. */
7744                                 next_protocol = 0xff;
7745                         }
7746                         break;
7747                 case RTE_FLOW_ITEM_TYPE_IPV6:
7748                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7749                                                   &item_flags, &tunnel);
7750                         flow_dv_translate_item_ipv6(match_mask, match_value,
7751                                                     items, item_flags, tunnel,
7752                                                     dev_flow->group);
7753                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7754                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7755                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7756                         if (items->mask != NULL &&
7757                             ((const struct rte_flow_item_ipv6 *)
7758                              items->mask)->hdr.proto) {
7759                                 next_protocol =
7760                                         ((const struct rte_flow_item_ipv6 *)
7761                                          items->spec)->hdr.proto;
7762                                 next_protocol &=
7763                                         ((const struct rte_flow_item_ipv6 *)
7764                                          items->mask)->hdr.proto;
7765                         } else {
7766                                 /* Reset for inner layer. */
7767                                 next_protocol = 0xff;
7768                         }
7769                         break;
7770                 case RTE_FLOW_ITEM_TYPE_TCP:
7771                         flow_dv_translate_item_tcp(match_mask, match_value,
7772                                                    items, tunnel);
7773                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7774                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7775                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7776                         break;
7777                 case RTE_FLOW_ITEM_TYPE_UDP:
7778                         flow_dv_translate_item_udp(match_mask, match_value,
7779                                                    items, tunnel);
7780                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7781                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7782                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7783                         break;
7784                 case RTE_FLOW_ITEM_TYPE_GRE:
7785                         flow_dv_translate_item_gre(match_mask, match_value,
7786                                                    items, tunnel);
7787                         matcher.priority = flow->rss.level >= 2 ?
7788                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7789                         last_item = MLX5_FLOW_LAYER_GRE;
7790                         break;
7791                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7792                         flow_dv_translate_item_gre_key(match_mask,
7793                                                        match_value, items);
7794                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7795                         break;
7796                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7797                         flow_dv_translate_item_nvgre(match_mask, match_value,
7798                                                      items, tunnel);
7799                         matcher.priority = flow->rss.level >= 2 ?
7800                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7801                         last_item = MLX5_FLOW_LAYER_GRE;
7802                         break;
7803                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7804                         flow_dv_translate_item_vxlan(match_mask, match_value,
7805                                                      items, tunnel);
7806                         matcher.priority = flow->rss.level >= 2 ?
7807                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7808                         last_item = MLX5_FLOW_LAYER_VXLAN;
7809                         break;
7810                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7811                         flow_dv_translate_item_vxlan_gpe(match_mask,
7812                                                          match_value, items,
7813                                                          tunnel);
7814                         matcher.priority = flow->rss.level >= 2 ?
7815                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7816                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7817                         break;
7818                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7819                         flow_dv_translate_item_geneve(match_mask, match_value,
7820                                                       items, tunnel);
7821                         matcher.priority = flow->rss.level >= 2 ?
7822                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7823                         last_item = MLX5_FLOW_LAYER_GENEVE;
7824                         break;
7825                 case RTE_FLOW_ITEM_TYPE_MPLS:
7826                         flow_dv_translate_item_mpls(match_mask, match_value,
7827                                                     items, last_item, tunnel);
7828                         matcher.priority = flow->rss.level >= 2 ?
7829                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7830                         last_item = MLX5_FLOW_LAYER_MPLS;
7831                         break;
7832                 case RTE_FLOW_ITEM_TYPE_MARK:
7833                         flow_dv_translate_item_mark(dev, match_mask,
7834                                                     match_value, items);
7835                         last_item = MLX5_FLOW_ITEM_MARK;
7836                         break;
7837                 case RTE_FLOW_ITEM_TYPE_META:
7838                         flow_dv_translate_item_meta(dev, match_mask,
7839                                                     match_value, attr, items);
7840                         last_item = MLX5_FLOW_ITEM_METADATA;
7841                         break;
7842                 case RTE_FLOW_ITEM_TYPE_ICMP:
7843                         flow_dv_translate_item_icmp(match_mask, match_value,
7844                                                     items, tunnel);
7845                         last_item = MLX5_FLOW_LAYER_ICMP;
7846                         break;
7847                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7848                         flow_dv_translate_item_icmp6(match_mask, match_value,
7849                                                       items, tunnel);
7850                         last_item = MLX5_FLOW_LAYER_ICMP6;
7851                         break;
7852                 case RTE_FLOW_ITEM_TYPE_TAG:
7853                         flow_dv_translate_item_tag(dev, match_mask,
7854                                                    match_value, items);
7855                         last_item = MLX5_FLOW_ITEM_TAG;
7856                         break;
7857                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7858                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7859                                                         match_value, items);
7860                         last_item = MLX5_FLOW_ITEM_TAG;
7861                         break;
7862                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7863                         flow_dv_translate_item_tx_queue(dev, match_mask,
7864                                                         match_value,
7865                                                         items);
7866                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7867                         break;
7868                 case RTE_FLOW_ITEM_TYPE_GTP:
7869                         flow_dv_translate_item_gtp(match_mask, match_value,
7870                                                    items, tunnel);
7871                         matcher.priority = flow->rss.level >= 2 ?
7872                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7873                         last_item = MLX5_FLOW_LAYER_GTP;
7874                         break;
7875                 default:
7876                         break;
7877                 }
7878                 item_flags |= last_item;
7879         }
7880         /*
7881          * When E-Switch mode is enabled, we have two cases where we need to
7882          * set the source port manually.
7883          * The first one, is in case of Nic steering rule, and the second is
7884          * E-Switch rule where no port_id item was found. In both cases
7885          * the source port is set according the current port in use.
7886          */
7887         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
7888             (priv->representor || priv->master)) {
7889                 if (flow_dv_translate_item_port_id(dev, match_mask,
7890                                                    match_value, NULL))
7891                         return -rte_errno;
7892         }
7893 #ifdef RTE_LIBRTE_MLX5_DEBUG
7894         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
7895                                               dev_flow->dv.value.buf));
7896 #endif
7897         /*
7898          * Layers may be already initialized from prefix flow if this dev_flow
7899          * is the suffix flow.
7900          */
7901         dev_flow->layers |= item_flags;
7902         if (action_flags & MLX5_FLOW_ACTION_RSS)
7903                 flow_dv_hashfields_set(dev_flow);
7904         /* Register matcher. */
7905         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7906                                     matcher.mask.size);
7907         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7908                                                      matcher.priority);
7909         /* reserved field no needs to be set to 0 here. */
7910         tbl_key.domain = attr->transfer;
7911         tbl_key.direction = attr->egress;
7912         tbl_key.table_id = dev_flow->group;
7913         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7914                 return -rte_errno;
7915         return 0;
7916 }
7917
7918 /**
7919  * Apply the flow to the NIC, lock free,
7920  * (mutex should be acquired by caller).
7921  *
7922  * @param[in] dev
7923  *   Pointer to the Ethernet device structure.
7924  * @param[in, out] flow
7925  *   Pointer to flow structure.
7926  * @param[out] error
7927  *   Pointer to error structure.
7928  *
7929  * @return
7930  *   0 on success, a negative errno value otherwise and rte_errno is set.
7931  */
7932 static int
7933 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7934                 struct rte_flow_error *error)
7935 {
7936         struct mlx5_flow_dv *dv;
7937         struct mlx5_flow *dev_flow;
7938         struct mlx5_priv *priv = dev->data->dev_private;
7939         int n;
7940         int err;
7941
7942         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7943                 dv = &dev_flow->dv;
7944                 n = dv->actions_n;
7945                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7946                         if (dev_flow->transfer) {
7947                                 dv->actions[n++] = priv->sh->esw_drop_action;
7948                         } else {
7949                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7950                                 if (!dv->hrxq) {
7951                                         rte_flow_error_set
7952                                                 (error, errno,
7953                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7954                                                  NULL,
7955                                                  "cannot get drop hash queue");
7956                                         goto error;
7957                                 }
7958                                 dv->actions[n++] = dv->hrxq->action;
7959                         }
7960                 } else if (dev_flow->actions &
7961                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7962                         struct mlx5_hrxq *hrxq;
7963
7964                         MLX5_ASSERT(flow->rss.queue);
7965                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7966                                              MLX5_RSS_HASH_KEY_LEN,
7967                                              dev_flow->hash_fields,
7968                                              (*flow->rss.queue),
7969                                              flow->rss.queue_num);
7970                         if (!hrxq) {
7971                                 hrxq = mlx5_hrxq_new
7972                                         (dev, flow->rss.key,
7973                                          MLX5_RSS_HASH_KEY_LEN,
7974                                          dev_flow->hash_fields,
7975                                          (*flow->rss.queue),
7976                                          flow->rss.queue_num,
7977                                          !!(dev_flow->layers &
7978                                             MLX5_FLOW_LAYER_TUNNEL));
7979                         }
7980                         if (!hrxq) {
7981                                 rte_flow_error_set
7982                                         (error, rte_errno,
7983                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7984                                          "cannot get hash queue");
7985                                 goto error;
7986                         }
7987                         dv->hrxq = hrxq;
7988                         dv->actions[n++] = dv->hrxq->action;
7989                 }
7990                 dv->flow =
7991                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7992                                                   (void *)&dv->value, n,
7993                                                   dv->actions);
7994                 if (!dv->flow) {
7995                         rte_flow_error_set(error, errno,
7996                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7997                                            NULL,
7998                                            "hardware refuses to create flow");
7999                         goto error;
8000                 }
8001                 if (priv->vmwa_context &&
8002                     dev_flow->dv.vf_vlan.tag &&
8003                     !dev_flow->dv.vf_vlan.created) {
8004                         /*
8005                          * The rule contains the VLAN pattern.
8006                          * For VF we are going to create VLAN
8007                          * interface to make hypervisor set correct
8008                          * e-Switch vport context.
8009                          */
8010                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
8011                 }
8012         }
8013         return 0;
8014 error:
8015         err = rte_errno; /* Save rte_errno before cleanup. */
8016         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8017                 struct mlx5_flow_dv *dv = &dev_flow->dv;
8018                 if (dv->hrxq) {
8019                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8020                                 mlx5_hrxq_drop_release(dev);
8021                         else
8022                                 mlx5_hrxq_release(dev, dv->hrxq);
8023                         dv->hrxq = NULL;
8024                 }
8025                 if (dev_flow->dv.vf_vlan.tag &&
8026                     dev_flow->dv.vf_vlan.created)
8027                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8028         }
8029         rte_errno = err; /* Restore rte_errno. */
8030         return -rte_errno;
8031 }
8032
8033 /**
8034  * Release the flow matcher.
8035  *
8036  * @param dev
8037  *   Pointer to Ethernet device.
8038  * @param flow
8039  *   Pointer to mlx5_flow.
8040  *
8041  * @return
8042  *   1 while a reference on it exists, 0 when freed.
8043  */
8044 static int
8045 flow_dv_matcher_release(struct rte_eth_dev *dev,
8046                         struct mlx5_flow *flow)
8047 {
8048         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
8049
8050         MLX5_ASSERT(matcher->matcher_object);
8051         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
8052                 dev->data->port_id, (void *)matcher,
8053                 rte_atomic32_read(&matcher->refcnt));
8054         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
8055                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8056                            (matcher->matcher_object));
8057                 LIST_REMOVE(matcher, next);
8058                 /* table ref-- in release interface. */
8059                 flow_dv_tbl_resource_release(dev, matcher->tbl);
8060                 rte_free(matcher);
8061                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
8062                         dev->data->port_id, (void *)matcher);
8063                 return 0;
8064         }
8065         return 1;
8066 }
8067
8068 /**
8069  * Release an encap/decap resource.
8070  *
8071  * @param flow
8072  *   Pointer to mlx5_flow.
8073  *
8074  * @return
8075  *   1 while a reference on it exists, 0 when freed.
8076  */
8077 static int
8078 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
8079 {
8080         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
8081                                                 flow->dv.encap_decap;
8082
8083         MLX5_ASSERT(cache_resource->verbs_action);
8084         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
8085                 (void *)cache_resource,
8086                 rte_atomic32_read(&cache_resource->refcnt));
8087         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8088                 claim_zero(mlx5_glue->destroy_flow_action
8089                                 (cache_resource->verbs_action));
8090                 LIST_REMOVE(cache_resource, next);
8091                 rte_free(cache_resource);
8092                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
8093                         (void *)cache_resource);
8094                 return 0;
8095         }
8096         return 1;
8097 }
8098
8099 /**
8100  * Release an jump to table action resource.
8101  *
8102  * @param dev
8103  *   Pointer to Ethernet device.
8104  * @param flow
8105  *   Pointer to mlx5_flow.
8106  *
8107  * @return
8108  *   1 while a reference on it exists, 0 when freed.
8109  */
8110 static int
8111 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
8112                                   struct mlx5_flow *flow)
8113 {
8114         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
8115         struct mlx5_flow_tbl_data_entry *tbl_data =
8116                         container_of(cache_resource,
8117                                      struct mlx5_flow_tbl_data_entry, jump);
8118
8119         MLX5_ASSERT(cache_resource->action);
8120         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
8121                 (void *)cache_resource,
8122                 rte_atomic32_read(&cache_resource->refcnt));
8123         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8124                 claim_zero(mlx5_glue->destroy_flow_action
8125                                 (cache_resource->action));
8126                 /* jump action memory free is inside the table release. */
8127                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
8128                 DRV_LOG(DEBUG, "jump table resource %p: removed",
8129                         (void *)cache_resource);
8130                 return 0;
8131         }
8132         return 1;
8133 }
8134
8135 /**
8136  * Release a modify-header resource.
8137  *
8138  * @param flow
8139  *   Pointer to mlx5_flow.
8140  *
8141  * @return
8142  *   1 while a reference on it exists, 0 when freed.
8143  */
8144 static int
8145 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
8146 {
8147         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
8148                                                 flow->dv.modify_hdr;
8149
8150         MLX5_ASSERT(cache_resource->verbs_action);
8151         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
8152                 (void *)cache_resource,
8153                 rte_atomic32_read(&cache_resource->refcnt));
8154         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8155                 claim_zero(mlx5_glue->destroy_flow_action
8156                                 (cache_resource->verbs_action));
8157                 LIST_REMOVE(cache_resource, next);
8158                 rte_free(cache_resource);
8159                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
8160                         (void *)cache_resource);
8161                 return 0;
8162         }
8163         return 1;
8164 }
8165
8166 /**
8167  * Release port ID action resource.
8168  *
8169  * @param flow
8170  *   Pointer to mlx5_flow.
8171  *
8172  * @return
8173  *   1 while a reference on it exists, 0 when freed.
8174  */
8175 static int
8176 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
8177 {
8178         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
8179                 flow->dv.port_id_action;
8180
8181         MLX5_ASSERT(cache_resource->action);
8182         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
8183                 (void *)cache_resource,
8184                 rte_atomic32_read(&cache_resource->refcnt));
8185         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8186                 claim_zero(mlx5_glue->destroy_flow_action
8187                                 (cache_resource->action));
8188                 LIST_REMOVE(cache_resource, next);
8189                 rte_free(cache_resource);
8190                 DRV_LOG(DEBUG, "port id action resource %p: removed",
8191                         (void *)cache_resource);
8192                 return 0;
8193         }
8194         return 1;
8195 }
8196
8197 /**
8198  * Release push vlan action resource.
8199  *
8200  * @param flow
8201  *   Pointer to mlx5_flow.
8202  *
8203  * @return
8204  *   1 while a reference on it exists, 0 when freed.
8205  */
8206 static int
8207 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
8208 {
8209         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
8210                 flow->dv.push_vlan_res;
8211
8212         MLX5_ASSERT(cache_resource->action);
8213         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
8214                 (void *)cache_resource,
8215                 rte_atomic32_read(&cache_resource->refcnt));
8216         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8217                 claim_zero(mlx5_glue->destroy_flow_action
8218                                 (cache_resource->action));
8219                 LIST_REMOVE(cache_resource, next);
8220                 rte_free(cache_resource);
8221                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
8222                         (void *)cache_resource);
8223                 return 0;
8224         }
8225         return 1;
8226 }
8227
8228 /**
8229  * Remove the flow from the NIC but keeps it in memory.
8230  * Lock free, (mutex should be acquired by caller).
8231  *
8232  * @param[in] dev
8233  *   Pointer to Ethernet device.
8234  * @param[in, out] flow
8235  *   Pointer to flow structure.
8236  */
8237 static void
8238 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8239 {
8240         struct mlx5_flow_dv *dv;
8241         struct mlx5_flow *dev_flow;
8242
8243         if (!flow)
8244                 return;
8245         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8246                 dv = &dev_flow->dv;
8247                 if (dv->flow) {
8248                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
8249                         dv->flow = NULL;
8250                 }
8251                 if (dv->hrxq) {
8252                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8253                                 mlx5_hrxq_drop_release(dev);
8254                         else
8255                                 mlx5_hrxq_release(dev, dv->hrxq);
8256                         dv->hrxq = NULL;
8257                 }
8258                 if (dev_flow->dv.vf_vlan.tag &&
8259                     dev_flow->dv.vf_vlan.created)
8260                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8261         }
8262 }
8263
8264 /**
8265  * Remove the flow from the NIC and the memory.
8266  * Lock free, (mutex should be acquired by caller).
8267  *
8268  * @param[in] dev
8269  *   Pointer to the Ethernet device structure.
8270  * @param[in, out] flow
8271  *   Pointer to flow structure.
8272  */
8273 static void
8274 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8275 {
8276         struct mlx5_flow *dev_flow;
8277
8278         if (!flow)
8279                 return;
8280         __flow_dv_remove(dev, flow);
8281         if (flow->counter) {
8282                 flow_dv_counter_release(dev, flow->counter);
8283                 flow->counter = NULL;
8284         }
8285         if (flow->meter) {
8286                 mlx5_flow_meter_detach(flow->meter);
8287                 flow->meter = NULL;
8288         }
8289         while (!LIST_EMPTY(&flow->dev_flows)) {
8290                 dev_flow = LIST_FIRST(&flow->dev_flows);
8291                 LIST_REMOVE(dev_flow, next);
8292                 if (dev_flow->dv.matcher)
8293                         flow_dv_matcher_release(dev, dev_flow);
8294                 if (dev_flow->dv.encap_decap)
8295                         flow_dv_encap_decap_resource_release(dev_flow);
8296                 if (dev_flow->dv.modify_hdr)
8297                         flow_dv_modify_hdr_resource_release(dev_flow);
8298                 if (dev_flow->dv.jump)
8299                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8300                 if (dev_flow->dv.port_id_action)
8301                         flow_dv_port_id_action_resource_release(dev_flow);
8302                 if (dev_flow->dv.push_vlan_res)
8303                         flow_dv_push_vlan_action_resource_release(dev_flow);
8304                 if (dev_flow->dv.tag_resource)
8305                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8306                 rte_free(dev_flow);
8307         }
8308 }
8309
8310 /**
8311  * Query a dv flow  rule for its statistics via devx.
8312  *
8313  * @param[in] dev
8314  *   Pointer to Ethernet device.
8315  * @param[in] flow
8316  *   Pointer to the sub flow.
8317  * @param[out] data
8318  *   data retrieved by the query.
8319  * @param[out] error
8320  *   Perform verbose error reporting if not NULL.
8321  *
8322  * @return
8323  *   0 on success, a negative errno value otherwise and rte_errno is set.
8324  */
8325 static int
8326 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8327                     void *data, struct rte_flow_error *error)
8328 {
8329         struct mlx5_priv *priv = dev->data->dev_private;
8330         struct rte_flow_query_count *qc = data;
8331
8332         if (!priv->config.devx)
8333                 return rte_flow_error_set(error, ENOTSUP,
8334                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8335                                           NULL,
8336                                           "counters are not supported");
8337         if (flow->counter) {
8338                 uint64_t pkts, bytes;
8339                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8340                                                &bytes);
8341
8342                 if (err)
8343                         return rte_flow_error_set(error, -err,
8344                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8345                                         NULL, "cannot read counters");
8346                 qc->hits_set = 1;
8347                 qc->bytes_set = 1;
8348                 qc->hits = pkts - flow->counter->hits;
8349                 qc->bytes = bytes - flow->counter->bytes;
8350                 if (qc->reset) {
8351                         flow->counter->hits = pkts;
8352                         flow->counter->bytes = bytes;
8353                 }
8354                 return 0;
8355         }
8356         return rte_flow_error_set(error, EINVAL,
8357                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8358                                   NULL,
8359                                   "counters are not available");
8360 }
8361
8362 /**
8363  * Query a flow.
8364  *
8365  * @see rte_flow_query()
8366  * @see rte_flow_ops
8367  */
8368 static int
8369 flow_dv_query(struct rte_eth_dev *dev,
8370               struct rte_flow *flow __rte_unused,
8371               const struct rte_flow_action *actions __rte_unused,
8372               void *data __rte_unused,
8373               struct rte_flow_error *error __rte_unused)
8374 {
8375         int ret = -EINVAL;
8376
8377         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8378                 switch (actions->type) {
8379                 case RTE_FLOW_ACTION_TYPE_VOID:
8380                         break;
8381                 case RTE_FLOW_ACTION_TYPE_COUNT:
8382                         ret = flow_dv_query_count(dev, flow, data, error);
8383                         break;
8384                 default:
8385                         return rte_flow_error_set(error, ENOTSUP,
8386                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8387                                                   actions,
8388                                                   "action not supported");
8389                 }
8390         }
8391         return ret;
8392 }
8393
8394 /**
8395  * Destroy the meter table set.
8396  * Lock free, (mutex should be acquired by caller).
8397  *
8398  * @param[in] dev
8399  *   Pointer to Ethernet device.
8400  * @param[in] tbl
8401  *   Pointer to the meter table set.
8402  *
8403  * @return
8404  *   Always 0.
8405  */
8406 static int
8407 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8408                         struct mlx5_meter_domains_infos *tbl)
8409 {
8410         struct mlx5_priv *priv = dev->data->dev_private;
8411         struct mlx5_meter_domains_infos *mtd =
8412                                 (struct mlx5_meter_domains_infos *)tbl;
8413
8414         if (!mtd || !priv->config.dv_flow_en)
8415                 return 0;
8416         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8417                 claim_zero(mlx5_glue->dv_destroy_flow
8418                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8419         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8420                 claim_zero(mlx5_glue->dv_destroy_flow
8421                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8422         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8423                 claim_zero(mlx5_glue->dv_destroy_flow
8424                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8425         if (mtd->egress.color_matcher)
8426                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8427                           (mtd->egress.color_matcher));
8428         if (mtd->egress.any_matcher)
8429                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8430                           (mtd->egress.any_matcher));
8431         if (mtd->egress.tbl)
8432                 claim_zero(flow_dv_tbl_resource_release(dev,
8433                                                         mtd->egress.tbl));
8434         if (mtd->ingress.color_matcher)
8435                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8436                           (mtd->ingress.color_matcher));
8437         if (mtd->ingress.any_matcher)
8438                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8439                           (mtd->ingress.any_matcher));
8440         if (mtd->ingress.tbl)
8441                 claim_zero(flow_dv_tbl_resource_release(dev,
8442                                                         mtd->ingress.tbl));
8443         if (mtd->transfer.color_matcher)
8444                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8445                           (mtd->transfer.color_matcher));
8446         if (mtd->transfer.any_matcher)
8447                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8448                           (mtd->transfer.any_matcher));
8449         if (mtd->transfer.tbl)
8450                 claim_zero(flow_dv_tbl_resource_release(dev,
8451                                                         mtd->transfer.tbl));
8452         if (mtd->drop_actn)
8453                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8454         rte_free(mtd);
8455         return 0;
8456 }
8457
8458 /* Number of meter flow actions, count and jump or count and drop. */
8459 #define METER_ACTIONS 2
8460
8461 /**
8462  * Create specify domain meter table and suffix table.
8463  *
8464  * @param[in] dev
8465  *   Pointer to Ethernet device.
8466  * @param[in,out] mtb
8467  *   Pointer to DV meter table set.
8468  * @param[in] egress
8469  *   Table attribute.
8470  * @param[in] transfer
8471  *   Table attribute.
8472  * @param[in] color_reg_c_idx
8473  *   Reg C index for color match.
8474  *
8475  * @return
8476  *   0 on success, -1 otherwise and rte_errno is set.
8477  */
8478 static int
8479 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8480                            struct mlx5_meter_domains_infos *mtb,
8481                            uint8_t egress, uint8_t transfer,
8482                            uint32_t color_reg_c_idx)
8483 {
8484         struct mlx5_priv *priv = dev->data->dev_private;
8485         struct mlx5_ibv_shared *sh = priv->sh;
8486         struct mlx5_flow_dv_match_params mask = {
8487                 .size = sizeof(mask.buf),
8488         };
8489         struct mlx5_flow_dv_match_params value = {
8490                 .size = sizeof(value.buf),
8491         };
8492         struct mlx5dv_flow_matcher_attr dv_attr = {
8493                 .type = IBV_FLOW_ATTR_NORMAL,
8494                 .priority = 0,
8495                 .match_criteria_enable = 0,
8496                 .match_mask = (void *)&mask,
8497         };
8498         void *actions[METER_ACTIONS];
8499         struct mlx5_flow_tbl_resource **sfx_tbl;
8500         struct mlx5_meter_domain_info *dtb;
8501         struct rte_flow_error error;
8502         int i = 0;
8503
8504         if (transfer) {
8505                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8506                 dtb = &mtb->transfer;
8507         } else if (egress) {
8508                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8509                 dtb = &mtb->egress;
8510         } else {
8511                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8512                 dtb = &mtb->ingress;
8513         }
8514         /* If the suffix table in missing, create it. */
8515         if (!(*sfx_tbl)) {
8516                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8517                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8518                                                 egress, transfer, &error);
8519                 if (!(*sfx_tbl)) {
8520                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8521                         return -1;
8522                 }
8523         }
8524         /* Create the meter table with METER level. */
8525         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8526                                             egress, transfer, &error);
8527         if (!dtb->tbl) {
8528                 DRV_LOG(ERR, "Failed to create meter policer table.");
8529                 return -1;
8530         }
8531         /* Create matchers, Any and Color. */
8532         dv_attr.priority = 3;
8533         dv_attr.match_criteria_enable = 0;
8534         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8535                                                              &dv_attr,
8536                                                              dtb->tbl->obj);
8537         if (!dtb->any_matcher) {
8538                 DRV_LOG(ERR, "Failed to create meter"
8539                              " policer default matcher.");
8540                 goto error_exit;
8541         }
8542         dv_attr.priority = 0;
8543         dv_attr.match_criteria_enable =
8544                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8545         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8546                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
8547         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8548                                                                &dv_attr,
8549                                                                dtb->tbl->obj);
8550         if (!dtb->color_matcher) {
8551                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8552                 goto error_exit;
8553         }
8554         if (mtb->count_actns[RTE_MTR_DROPPED])
8555                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8556         actions[i++] = mtb->drop_actn;
8557         /* Default rule: lowest priority, match any, actions: drop. */
8558         dtb->policer_rules[RTE_MTR_DROPPED] =
8559                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8560                                                  (void *)&value, i, actions);
8561         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8562                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8563                 goto error_exit;
8564         }
8565         return 0;
8566 error_exit:
8567         return -1;
8568 }
8569
8570 /**
8571  * Create the needed meter and suffix tables.
8572  * Lock free, (mutex should be acquired by caller).
8573  *
8574  * @param[in] dev
8575  *   Pointer to Ethernet device.
8576  * @param[in] fm
8577  *   Pointer to the flow meter.
8578  *
8579  * @return
8580  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8581  */
8582 static struct mlx5_meter_domains_infos *
8583 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8584                        const struct mlx5_flow_meter *fm)
8585 {
8586         struct mlx5_priv *priv = dev->data->dev_private;
8587         struct mlx5_meter_domains_infos *mtb;
8588         int ret;
8589         int i;
8590
8591         if (!priv->mtr_en) {
8592                 rte_errno = ENOTSUP;
8593                 return NULL;
8594         }
8595         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8596         if (!mtb) {
8597                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8598                 return NULL;
8599         }
8600         /* Create meter count actions */
8601         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8602                 if (!fm->policer_stats.cnt[i])
8603                         continue;
8604                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8605         }
8606         /* Create drop action. */
8607         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8608         if (!mtb->drop_actn) {
8609                 DRV_LOG(ERR, "Failed to create drop action.");
8610                 goto error_exit;
8611         }
8612         /* Egress meter table. */
8613         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8614         if (ret) {
8615                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8616                 goto error_exit;
8617         }
8618         /* Ingress meter table. */
8619         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8620         if (ret) {
8621                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8622                 goto error_exit;
8623         }
8624         /* FDB meter table. */
8625         if (priv->config.dv_esw_en) {
8626                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8627                                                  priv->mtr_color_reg);
8628                 if (ret) {
8629                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8630                         goto error_exit;
8631                 }
8632         }
8633         return mtb;
8634 error_exit:
8635         flow_dv_destroy_mtr_tbl(dev, mtb);
8636         return NULL;
8637 }
8638
8639 /**
8640  * Destroy domain policer rule.
8641  *
8642  * @param[in] dt
8643  *   Pointer to domain table.
8644  */
8645 static void
8646 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8647 {
8648         int i;
8649
8650         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8651                 if (dt->policer_rules[i]) {
8652                         claim_zero(mlx5_glue->dv_destroy_flow
8653                                   (dt->policer_rules[i]));
8654                         dt->policer_rules[i] = NULL;
8655                 }
8656         }
8657         if (dt->jump_actn) {
8658                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8659                 dt->jump_actn = NULL;
8660         }
8661 }
8662
8663 /**
8664  * Destroy policer rules.
8665  *
8666  * @param[in] dev
8667  *   Pointer to Ethernet device.
8668  * @param[in] fm
8669  *   Pointer to flow meter structure.
8670  * @param[in] attr
8671  *   Pointer to flow attributes.
8672  *
8673  * @return
8674  *   Always 0.
8675  */
8676 static int
8677 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8678                               const struct mlx5_flow_meter *fm,
8679                               const struct rte_flow_attr *attr)
8680 {
8681         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8682
8683         if (!mtb)
8684                 return 0;
8685         if (attr->egress)
8686                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8687         if (attr->ingress)
8688                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8689         if (attr->transfer)
8690                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8691         return 0;
8692 }
8693
8694 /**
8695  * Create specify domain meter policer rule.
8696  *
8697  * @param[in] fm
8698  *   Pointer to flow meter structure.
8699  * @param[in] mtb
8700  *   Pointer to DV meter table set.
8701  * @param[in] sfx_tb
8702  *   Pointer to suffix table.
8703  * @param[in] mtr_reg_c
8704  *   Color match REG_C.
8705  *
8706  * @return
8707  *   0 on success, -1 otherwise.
8708  */
8709 static int
8710 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8711                                     struct mlx5_meter_domain_info *dtb,
8712                                     struct mlx5_flow_tbl_resource *sfx_tb,
8713                                     uint8_t mtr_reg_c)
8714 {
8715         struct mlx5_flow_dv_match_params matcher = {
8716                 .size = sizeof(matcher.buf),
8717         };
8718         struct mlx5_flow_dv_match_params value = {
8719                 .size = sizeof(value.buf),
8720         };
8721         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8722         void *actions[METER_ACTIONS];
8723         int i;
8724
8725         /* Create jump action. */
8726         if (!sfx_tb)
8727                 return -1;
8728         if (!dtb->jump_actn)
8729                 dtb->jump_actn =
8730                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8731                                                         (sfx_tb->obj);
8732         if (!dtb->jump_actn) {
8733                 DRV_LOG(ERR, "Failed to create policer jump action.");
8734                 goto error;
8735         }
8736         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8737                 int j = 0;
8738
8739                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8740                                        rte_col_2_mlx5_col(i), UINT8_MAX);
8741                 if (mtb->count_actns[i])
8742                         actions[j++] = mtb->count_actns[i];
8743                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8744                         actions[j++] = mtb->drop_actn;
8745                 else
8746                         actions[j++] = dtb->jump_actn;
8747                 dtb->policer_rules[i] =
8748                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8749                                                  (void *)&value,
8750                                                   j, actions);
8751                 if (!dtb->policer_rules[i]) {
8752                         DRV_LOG(ERR, "Failed to create policer rule.");
8753                         goto error;
8754                 }
8755         }
8756         return 0;
8757 error:
8758         rte_errno = errno;
8759         return -1;
8760 }
8761
8762 /**
8763  * Create policer rules.
8764  *
8765  * @param[in] dev
8766  *   Pointer to Ethernet device.
8767  * @param[in] fm
8768  *   Pointer to flow meter structure.
8769  * @param[in] attr
8770  *   Pointer to flow attributes.
8771  *
8772  * @return
8773  *   0 on success, -1 otherwise.
8774  */
8775 static int
8776 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8777                              struct mlx5_flow_meter *fm,
8778                              const struct rte_flow_attr *attr)
8779 {
8780         struct mlx5_priv *priv = dev->data->dev_private;
8781         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8782         int ret;
8783
8784         if (attr->egress) {
8785                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8786                                                 priv->sh->tx_mtr_sfx_tbl,
8787                                                 priv->mtr_color_reg);
8788                 if (ret) {
8789                         DRV_LOG(ERR, "Failed to create egress policer.");
8790                         goto error;
8791                 }
8792         }
8793         if (attr->ingress) {
8794                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8795                                                 priv->sh->rx_mtr_sfx_tbl,
8796                                                 priv->mtr_color_reg);
8797                 if (ret) {
8798                         DRV_LOG(ERR, "Failed to create ingress policer.");
8799                         goto error;
8800                 }
8801         }
8802         if (attr->transfer) {
8803                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8804                                                 priv->sh->fdb_mtr_sfx_tbl,
8805                                                 priv->mtr_color_reg);
8806                 if (ret) {
8807                         DRV_LOG(ERR, "Failed to create transfer policer.");
8808                         goto error;
8809                 }
8810         }
8811         return 0;
8812 error:
8813         flow_dv_destroy_policer_rules(dev, fm, attr);
8814         return -1;
8815 }
8816
8817 /**
8818  * Query a devx counter.
8819  *
8820  * @param[in] dev
8821  *   Pointer to the Ethernet device structure.
8822  * @param[in] cnt
8823  *   Pointer to the flow counter.
8824  * @param[in] clear
8825  *   Set to clear the counter statistics.
8826  * @param[out] pkts
8827  *   The statistics value of packets.
8828  * @param[out] bytes
8829  *   The statistics value of bytes.
8830  *
8831  * @return
8832  *   0 on success, otherwise return -1.
8833  */
8834 static int
8835 flow_dv_counter_query(struct rte_eth_dev *dev,
8836                       struct mlx5_flow_counter *cnt, bool clear,
8837                       uint64_t *pkts, uint64_t *bytes)
8838 {
8839         struct mlx5_priv *priv = dev->data->dev_private;
8840         uint64_t inn_pkts, inn_bytes;
8841         int ret;
8842
8843         if (!priv->config.devx)
8844                 return -1;
8845         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8846         if (ret)
8847                 return -1;
8848         *pkts = inn_pkts - cnt->hits;
8849         *bytes = inn_bytes - cnt->bytes;
8850         if (clear) {
8851                 cnt->hits = inn_pkts;
8852                 cnt->bytes = inn_bytes;
8853         }
8854         return 0;
8855 }
8856
8857 /*
8858  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8859  */
8860 static int
8861 flow_dv_translate(struct rte_eth_dev *dev,
8862                   struct mlx5_flow *dev_flow,
8863                   const struct rte_flow_attr *attr,
8864                   const struct rte_flow_item items[],
8865                   const struct rte_flow_action actions[],
8866                   struct rte_flow_error *error)
8867 {
8868         int ret;
8869
8870         flow_dv_shared_lock(dev);
8871         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8872         flow_dv_shared_unlock(dev);
8873         return ret;
8874 }
8875
8876 /*
8877  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8878  */
8879 static int
8880 flow_dv_apply(struct rte_eth_dev *dev,
8881               struct rte_flow *flow,
8882               struct rte_flow_error *error)
8883 {
8884         int ret;
8885
8886         flow_dv_shared_lock(dev);
8887         ret = __flow_dv_apply(dev, flow, error);
8888         flow_dv_shared_unlock(dev);
8889         return ret;
8890 }
8891
8892 /*
8893  * Mutex-protected thunk to lock-free __flow_dv_remove().
8894  */
8895 static void
8896 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8897 {
8898         flow_dv_shared_lock(dev);
8899         __flow_dv_remove(dev, flow);
8900         flow_dv_shared_unlock(dev);
8901 }
8902
8903 /*
8904  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8905  */
8906 static void
8907 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8908 {
8909         flow_dv_shared_lock(dev);
8910         __flow_dv_destroy(dev, flow);
8911         flow_dv_shared_unlock(dev);
8912 }
8913
8914 /*
8915  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8916  */
8917 static struct mlx5_flow_counter *
8918 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8919 {
8920         struct mlx5_flow_counter *cnt;
8921
8922         flow_dv_shared_lock(dev);
8923         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8924         flow_dv_shared_unlock(dev);
8925         return cnt;
8926 }
8927
8928 /*
8929  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8930  */
8931 static void
8932 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8933 {
8934         flow_dv_shared_lock(dev);
8935         flow_dv_counter_release(dev, cnt);
8936         flow_dv_shared_unlock(dev);
8937 }
8938
8939 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8940         .validate = flow_dv_validate,
8941         .prepare = flow_dv_prepare,
8942         .translate = flow_dv_translate,
8943         .apply = flow_dv_apply,
8944         .remove = flow_dv_remove,
8945         .destroy = flow_dv_destroy,
8946         .query = flow_dv_query,
8947         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8948         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8949         .create_policer_rules = flow_dv_create_policer_rules,
8950         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8951         .counter_alloc = flow_dv_counter_allocate,
8952         .counter_free = flow_dv_counter_free,
8953         .counter_query = flow_dv_counter_query,
8954 };
8955
8956 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */