drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_glue.h"
  33 #include "mlx5_flow.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  38
  39 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  40 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  41 #endif
  42
  43 #ifndef HAVE_MLX5DV_DR_ESWITCH
  44 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  45 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  46 #endif
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR
  50 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  51 #endif
  52
  53 /* VLAN header definitions */
  54 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  55 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  56 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  57 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  58 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  59
  60 union flow_dv_attr {
  61         struct {
  62                 uint32_t valid:1;
  63                 uint32_t ipv4:1;
  64                 uint32_t ipv6:1;
  65                 uint32_t tcp:1;
  66                 uint32_t udp:1;
  67                 uint32_t reserved:27;
  68         };
  69         uint32_t attr;
  70 };
  71
  72 /**
  73  * Initialize flow attributes structure according to flow items' types.
  74  *
  75  * @param[in] item
  76  *   Pointer to item specification.
  77  * @param[out] attr
  78  *   Pointer to flow attributes structure.
  79  */
  80 static void
  81 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  82 {
  83         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  84                 switch (item->type) {
  85                 case RTE_FLOW_ITEM_TYPE_IPV4:
  86                         attr->ipv4 = 1;
  87                         break;
  88                 case RTE_FLOW_ITEM_TYPE_IPV6:
  89                         attr->ipv6 = 1;
  90                         break;
  91                 case RTE_FLOW_ITEM_TYPE_UDP:
  92                         attr->udp = 1;
  93                         break;
  94                 case RTE_FLOW_ITEM_TYPE_TCP:
  95                         attr->tcp = 1;
  96                         break;
  97                 default:
  98                         break;
  99                 }
 100         }
 101         attr->valid = 1;
 102 }
 103
 104 struct field_modify_info {
 105         uint32_t size; /* Size of field in protocol header, in bytes. */
 106         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 107         enum mlx5_modification_field id;
 108 };
 109
 110 struct field_modify_info modify_eth[] = {
 111         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 112         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 113         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 114         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 115         {0, 0, 0},
 116 };
 117
 118 struct field_modify_info modify_vlan_out_first_vid[] = {
 119         /* Size in bits !!! */
 120         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 121         {0, 0, 0},
 122 };
 123
 124 struct field_modify_info modify_ipv4[] = {
 125         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 126         {4, 12, MLX5_MODI_OUT_SIPV4},
 127         {4, 16, MLX5_MODI_OUT_DIPV4},
 128         {0, 0, 0},
 129 };
 130
 131 struct field_modify_info modify_ipv6[] = {
 132         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 133         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 134         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 135         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 136         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 137         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 138         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 139         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 140         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 141         {0, 0, 0},
 142 };
 143
 144 struct field_modify_info modify_udp[] = {
 145         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 146         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 147         {0, 0, 0},
 148 };
 149
 150 struct field_modify_info modify_tcp[] = {
 151         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 152         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 153         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 154         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 155         {0, 0, 0},
 156 };
 157
 158 static void
 159 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 160                           uint8_t next_protocol, uint64_t *item_flags,
 161                           int *tunnel)
 162 {
 163         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 164                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 165         if (next_protocol == IPPROTO_IPIP) {
 166                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 167                 *tunnel = 1;
 168         }
 169         if (next_protocol == IPPROTO_IPV6) {
 170                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 171                 *tunnel = 1;
 172         }
 173 }
 174
 175 /**
 176  * Acquire the synchronizing object to protect multithreaded access
 177  * to shared dv context. Lock occurs only if context is actually
 178  * shared, i.e. we have multiport IB device and representors are
 179  * created.
 180  *
 181  * @param[in] dev
 182  *   Pointer to the rte_eth_dev structure.
 183  */
 184 static void
 185 flow_d_shared_lock(struct rte_eth_dev *dev)
 186 {
 187         struct mlx5_priv *priv = dev->data->dev_private;
 188         struct mlx5_ibv_shared *sh = priv->sh;
 189
 190         if (sh->dv_refcnt > 1) {
 191                 int ret;
 192
 193                 ret = pthread_mutex_lock(&sh->dv_mutex);
 194                 assert(!ret);
 195                 (void)ret;
 196         }
 197 }
 198
 199 static void
 200 flow_d_shared_unlock(struct rte_eth_dev *dev)
 201 {
 202         struct mlx5_priv *priv = dev->data->dev_private;
 203         struct mlx5_ibv_shared *sh = priv->sh;
 204
 205         if (sh->dv_refcnt > 1) {
 206                 int ret;
 207
 208                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 209                 assert(!ret);
 210                 (void)ret;
 211         }
 212 }
 213
 214 /**
 215  * Convert modify-header action to DV specification.
 216  *
 217  * @param[in] item
 218  *   Pointer to item specification.
 219  * @param[in] field
 220  *   Pointer to field modification information.
 221  * @param[in,out] resource
 222  *   Pointer to the modify-header resource.
 223  * @param[in] type
 224  *   Type of modification.
 225  * @param[out] error
 226  *   Pointer to the error structure.
 227  *
 228  * @return
 229  *   0 on success, a negative errno value otherwise and rte_errno is set.
 230  */
 231 static int
 232 flow_dv_convert_modify_action(struct rte_flow_item *item,
 233                               struct field_modify_info *field,
 234                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 235                               uint32_t type,
 236                               struct rte_flow_error *error)
 237 {
 238         uint32_t i = resource->actions_num;
 239         struct mlx5_modification_cmd *actions = resource->actions;
 240         const uint8_t *spec = item->spec;
 241         const uint8_t *mask = item->mask;
 242         uint32_t set;
 243
 244         while (field->size) {
 245                 set = 0;
 246                 /* Generate modify command for each mask segment. */
 247                 memcpy(&set, &mask[field->offset], field->size);
 248                 if (set) {
 249                         if (i >= MLX5_MODIFY_NUM)
 250                                 return rte_flow_error_set(error, EINVAL,
 251                                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 252                                          "too many items to modify");
 253                         actions[i].action_type = type;
 254                         actions[i].field = field->id;
 255                         actions[i].length = field->size ==
 256                                         4 ? 0 : field->size * 8;
 257                         rte_memcpy(&actions[i].data[4 - field->size],
 258                                    &spec[field->offset], field->size);
 259                         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 260                         ++i;
 261                 }
 262                 if (resource->actions_num != i)
 263                         resource->actions_num = i;
 264                 field++;
 265         }
 266         if (!resource->actions_num)
 267                 return rte_flow_error_set(error, EINVAL,
 268                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 269                                           "invalid modification flow item");
 270         return 0;
 271 }
 272
 273 /**
 274  * Convert modify-header set IPv4 address action to DV specification.
 275  *
 276  * @param[in,out] resource
 277  *   Pointer to the modify-header resource.
 278  * @param[in] action
 279  *   Pointer to action specification.
 280  * @param[out] error
 281  *   Pointer to the error structure.
 282  *
 283  * @return
 284  *   0 on success, a negative errno value otherwise and rte_errno is set.
 285  */
 286 static int
 287 flow_dv_convert_action_modify_ipv4
 288                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 289                          const struct rte_flow_action *action,
 290                          struct rte_flow_error *error)
 291 {
 292         const struct rte_flow_action_set_ipv4 *conf =
 293                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 294         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 295         struct rte_flow_item_ipv4 ipv4;
 296         struct rte_flow_item_ipv4 ipv4_mask;
 297
 298         memset(&ipv4, 0, sizeof(ipv4));
 299         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 300         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 301                 ipv4.hdr.src_addr = conf->ipv4_addr;
 302                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 303         } else {
 304                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 305                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 306         }
 307         item.spec = &ipv4;
 308         item.mask = &ipv4_mask;
 309         return flow_dv_convert_modify_action(&item, modify_ipv4, resource,
 310                                              MLX5_MODIFICATION_TYPE_SET, error);
 311 }
 312
 313 /**
 314  * Convert modify-header set IPv6 address action to DV specification.
 315  *
 316  * @param[in,out] resource
 317  *   Pointer to the modify-header resource.
 318  * @param[in] action
 319  *   Pointer to action specification.
 320  * @param[out] error
 321  *   Pointer to the error structure.
 322  *
 323  * @return
 324  *   0 on success, a negative errno value otherwise and rte_errno is set.
 325  */
 326 static int
 327 flow_dv_convert_action_modify_ipv6
 328                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 329                          const struct rte_flow_action *action,
 330                          struct rte_flow_error *error)
 331 {
 332         const struct rte_flow_action_set_ipv6 *conf =
 333                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 334         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 335         struct rte_flow_item_ipv6 ipv6;
 336         struct rte_flow_item_ipv6 ipv6_mask;
 337
 338         memset(&ipv6, 0, sizeof(ipv6));
 339         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 340         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 341                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 342                        sizeof(ipv6.hdr.src_addr));
 343                 memcpy(&ipv6_mask.hdr.src_addr,
 344                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 345                        sizeof(ipv6.hdr.src_addr));
 346         } else {
 347                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 348                        sizeof(ipv6.hdr.dst_addr));
 349                 memcpy(&ipv6_mask.hdr.dst_addr,
 350                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 351                        sizeof(ipv6.hdr.dst_addr));
 352         }
 353         item.spec = &ipv6;
 354         item.mask = &ipv6_mask;
 355         return flow_dv_convert_modify_action(&item, modify_ipv6, resource,
 356                                              MLX5_MODIFICATION_TYPE_SET, error);
 357 }
 358
 359 /**
 360  * Convert modify-header set MAC address action to DV specification.
 361  *
 362  * @param[in,out] resource
 363  *   Pointer to the modify-header resource.
 364  * @param[in] action
 365  *   Pointer to action specification.
 366  * @param[out] error
 367  *   Pointer to the error structure.
 368  *
 369  * @return
 370  *   0 on success, a negative errno value otherwise and rte_errno is set.
 371  */
 372 static int
 373 flow_dv_convert_action_modify_mac
 374                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 375                          const struct rte_flow_action *action,
 376                          struct rte_flow_error *error)
 377 {
 378         const struct rte_flow_action_set_mac *conf =
 379                 (const struct rte_flow_action_set_mac *)(action->conf);
 380         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 381         struct rte_flow_item_eth eth;
 382         struct rte_flow_item_eth eth_mask;
 383
 384         memset(&eth, 0, sizeof(eth));
 385         memset(&eth_mask, 0, sizeof(eth_mask));
 386         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 387                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 388                        sizeof(eth.src.addr_bytes));
 389                 memcpy(&eth_mask.src.addr_bytes,
 390                        &rte_flow_item_eth_mask.src.addr_bytes,
 391                        sizeof(eth_mask.src.addr_bytes));
 392         } else {
 393                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 394                        sizeof(eth.dst.addr_bytes));
 395                 memcpy(&eth_mask.dst.addr_bytes,
 396                        &rte_flow_item_eth_mask.dst.addr_bytes,
 397                        sizeof(eth_mask.dst.addr_bytes));
 398         }
 399         item.spec = &eth;
 400         item.mask = &eth_mask;
 401         return flow_dv_convert_modify_action(&item, modify_eth, resource,
 402                                              MLX5_MODIFICATION_TYPE_SET, error);
 403 }
 404
 405 /**
 406  * Convert modify-header set VLAN VID action to DV specification.
 407  *
 408  * @param[in,out] resource
 409  *   Pointer to the modify-header resource.
 410  * @param[in] action
 411  *   Pointer to action specification.
 412  * @param[out] error
 413  *   Pointer to the error structure.
 414  *
 415  * @return
 416  *   0 on success, a negative errno value otherwise and rte_errno is set.
 417  */
 418 static int
 419 flow_dv_convert_action_modify_vlan_vid
 420                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 421                          const struct rte_flow_action *action,
 422                          struct rte_flow_error *error)
 423 {
 424         const struct rte_flow_action_of_set_vlan_vid *conf =
 425                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 426         int i = resource->actions_num;
 427         struct mlx5_modification_cmd *actions = &resource->actions[i];
 428         struct field_modify_info *field = modify_vlan_out_first_vid;
 429
 430         if (i >= MLX5_MODIFY_NUM)
 431                 return rte_flow_error_set(error, EINVAL,
 432                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 433                          "too many items to modify");
 434         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 435         actions[i].field = field->id;
 436         actions[i].length = field->size;
 437         actions[i].offset = field->offset;
 438         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 439         actions[i].data1 = conf->vlan_vid;
 440         actions[i].data1 = actions[i].data1 << 16;
 441         resource->actions_num = ++i;
 442         return 0;
 443 }
 444
 445 /**
 446  * Convert modify-header set TP action to DV specification.
 447  *
 448  * @param[in,out] resource
 449  *   Pointer to the modify-header resource.
 450  * @param[in] action
 451  *   Pointer to action specification.
 452  * @param[in] items
 453  *   Pointer to rte_flow_item objects list.
 454  * @param[in] attr
 455  *   Pointer to flow attributes structure.
 456  * @param[out] error
 457  *   Pointer to the error structure.
 458  *
 459  * @return
 460  *   0 on success, a negative errno value otherwise and rte_errno is set.
 461  */
 462 static int
 463 flow_dv_convert_action_modify_tp
 464                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 465                          const struct rte_flow_action *action,
 466                          const struct rte_flow_item *items,
 467                          union flow_dv_attr *attr,
 468                          struct rte_flow_error *error)
 469 {
 470         const struct rte_flow_action_set_tp *conf =
 471                 (const struct rte_flow_action_set_tp *)(action->conf);
 472         struct rte_flow_item item;
 473         struct rte_flow_item_udp udp;
 474         struct rte_flow_item_udp udp_mask;
 475         struct rte_flow_item_tcp tcp;
 476         struct rte_flow_item_tcp tcp_mask;
 477         struct field_modify_info *field;
 478
 479         if (!attr->valid)
 480                 flow_dv_attr_init(items, attr);
 481         if (attr->udp) {
 482                 memset(&udp, 0, sizeof(udp));
 483                 memset(&udp_mask, 0, sizeof(udp_mask));
 484                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 485                         udp.hdr.src_port = conf->port;
 486                         udp_mask.hdr.src_port =
 487                                         rte_flow_item_udp_mask.hdr.src_port;
 488                 } else {
 489                         udp.hdr.dst_port = conf->port;
 490                         udp_mask.hdr.dst_port =
 491                                         rte_flow_item_udp_mask.hdr.dst_port;
 492                 }
 493                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 494                 item.spec = &udp;
 495                 item.mask = &udp_mask;
 496                 field = modify_udp;
 497         }
 498         if (attr->tcp) {
 499                 memset(&tcp, 0, sizeof(tcp));
 500                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 501                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 502                         tcp.hdr.src_port = conf->port;
 503                         tcp_mask.hdr.src_port =
 504                                         rte_flow_item_tcp_mask.hdr.src_port;
 505                 } else {
 506                         tcp.hdr.dst_port = conf->port;
 507                         tcp_mask.hdr.dst_port =
 508                                         rte_flow_item_tcp_mask.hdr.dst_port;
 509                 }
 510                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 511                 item.spec = &tcp;
 512                 item.mask = &tcp_mask;
 513                 field = modify_tcp;
 514         }
 515         return flow_dv_convert_modify_action(&item, field, resource,
 516                                              MLX5_MODIFICATION_TYPE_SET, error);
 517 }
 518
 519 /**
 520  * Convert modify-header set TTL action to DV specification.
 521  *
 522  * @param[in,out] resource
 523  *   Pointer to the modify-header resource.
 524  * @param[in] action
 525  *   Pointer to action specification.
 526  * @param[in] items
 527  *   Pointer to rte_flow_item objects list.
 528  * @param[in] attr
 529  *   Pointer to flow attributes structure.
 530  * @param[out] error
 531  *   Pointer to the error structure.
 532  *
 533  * @return
 534  *   0 on success, a negative errno value otherwise and rte_errno is set.
 535  */
 536 static int
 537 flow_dv_convert_action_modify_ttl
 538                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 539                          const struct rte_flow_action *action,
 540                          const struct rte_flow_item *items,
 541                          union flow_dv_attr *attr,
 542                          struct rte_flow_error *error)
 543 {
 544         const struct rte_flow_action_set_ttl *conf =
 545                 (const struct rte_flow_action_set_ttl *)(action->conf);
 546         struct rte_flow_item item;
 547         struct rte_flow_item_ipv4 ipv4;
 548         struct rte_flow_item_ipv4 ipv4_mask;
 549         struct rte_flow_item_ipv6 ipv6;
 550         struct rte_flow_item_ipv6 ipv6_mask;
 551         struct field_modify_info *field;
 552
 553         if (!attr->valid)
 554                 flow_dv_attr_init(items, attr);
 555         if (attr->ipv4) {
 556                 memset(&ipv4, 0, sizeof(ipv4));
 557                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 558                 ipv4.hdr.time_to_live = conf->ttl_value;
 559                 ipv4_mask.hdr.time_to_live = 0xFF;
 560                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 561                 item.spec = &ipv4;
 562                 item.mask = &ipv4_mask;
 563                 field = modify_ipv4;
 564         }
 565         if (attr->ipv6) {
 566                 memset(&ipv6, 0, sizeof(ipv6));
 567                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 568                 ipv6.hdr.hop_limits = conf->ttl_value;
 569                 ipv6_mask.hdr.hop_limits = 0xFF;
 570                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 571                 item.spec = &ipv6;
 572                 item.mask = &ipv6_mask;
 573                 field = modify_ipv6;
 574         }
 575         return flow_dv_convert_modify_action(&item, field, resource,
 576                                              MLX5_MODIFICATION_TYPE_SET, error);
 577 }
 578
 579 /**
 580  * Convert modify-header decrement TTL action to DV specification.
 581  *
 582  * @param[in,out] resource
 583  *   Pointer to the modify-header resource.
 584  * @param[in] action
 585  *   Pointer to action specification.
 586  * @param[in] items
 587  *   Pointer to rte_flow_item objects list.
 588  * @param[in] attr
 589  *   Pointer to flow attributes structure.
 590  * @param[out] error
 591  *   Pointer to the error structure.
 592  *
 593  * @return
 594  *   0 on success, a negative errno value otherwise and rte_errno is set.
 595  */
 596 static int
 597 flow_dv_convert_action_modify_dec_ttl
 598                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 599                          const struct rte_flow_item *items,
 600                          union flow_dv_attr *attr,
 601                          struct rte_flow_error *error)
 602 {
 603         struct rte_flow_item item;
 604         struct rte_flow_item_ipv4 ipv4;
 605         struct rte_flow_item_ipv4 ipv4_mask;
 606         struct rte_flow_item_ipv6 ipv6;
 607         struct rte_flow_item_ipv6 ipv6_mask;
 608         struct field_modify_info *field;
 609
 610         if (!attr->valid)
 611                 flow_dv_attr_init(items, attr);
 612         if (attr->ipv4) {
 613                 memset(&ipv4, 0, sizeof(ipv4));
 614                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 615                 ipv4.hdr.time_to_live = 0xFF;
 616                 ipv4_mask.hdr.time_to_live = 0xFF;
 617                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 618                 item.spec = &ipv4;
 619                 item.mask = &ipv4_mask;
 620                 field = modify_ipv4;
 621         }
 622         if (attr->ipv6) {
 623                 memset(&ipv6, 0, sizeof(ipv6));
 624                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 625                 ipv6.hdr.hop_limits = 0xFF;
 626                 ipv6_mask.hdr.hop_limits = 0xFF;
 627                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 628                 item.spec = &ipv6;
 629                 item.mask = &ipv6_mask;
 630                 field = modify_ipv6;
 631         }
 632         return flow_dv_convert_modify_action(&item, field, resource,
 633                                              MLX5_MODIFICATION_TYPE_ADD, error);
 634 }
 635
 636 /**
 637  * Convert modify-header increment/decrement TCP Sequence number
 638  * to DV specification.
 639  *
 640  * @param[in,out] resource
 641  *   Pointer to the modify-header resource.
 642  * @param[in] action
 643  *   Pointer to action specification.
 644  * @param[out] error
 645  *   Pointer to the error structure.
 646  *
 647  * @return
 648  *   0 on success, a negative errno value otherwise and rte_errno is set.
 649  */
 650 static int
 651 flow_dv_convert_action_modify_tcp_seq
 652                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 653                          const struct rte_flow_action *action,
 654                          struct rte_flow_error *error)
 655 {
 656         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 657         uint64_t value = rte_be_to_cpu_32(*conf);
 658         struct rte_flow_item item;
 659         struct rte_flow_item_tcp tcp;
 660         struct rte_flow_item_tcp tcp_mask;
 661
 662         memset(&tcp, 0, sizeof(tcp));
 663         memset(&tcp_mask, 0, sizeof(tcp_mask));
 664         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 665                 /*
 666                  * The HW has no decrement operation, only increment operation.
 667                  * To simulate decrement X from Y using increment operation
 668                  * we need to add UINT32_MAX X times to Y.
 669                  * Each adding of UINT32_MAX decrements Y by 1.
 670                  */
 671                 value *= UINT32_MAX;
 672         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 673         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 674         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 675         item.spec = &tcp;
 676         item.mask = &tcp_mask;
 677         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 678                                              MLX5_MODIFICATION_TYPE_ADD, error);
 679 }
 680
 681 /**
 682  * Convert modify-header increment/decrement TCP Acknowledgment number
 683  * to DV specification.
 684  *
 685  * @param[in,out] resource
 686  *   Pointer to the modify-header resource.
 687  * @param[in] action
 688  *   Pointer to action specification.
 689  * @param[out] error
 690  *   Pointer to the error structure.
 691  *
 692  * @return
 693  *   0 on success, a negative errno value otherwise and rte_errno is set.
 694  */
 695 static int
 696 flow_dv_convert_action_modify_tcp_ack
 697                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 698                          const struct rte_flow_action *action,
 699                          struct rte_flow_error *error)
 700 {
 701         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 702         uint64_t value = rte_be_to_cpu_32(*conf);
 703         struct rte_flow_item item;
 704         struct rte_flow_item_tcp tcp;
 705         struct rte_flow_item_tcp tcp_mask;
 706
 707         memset(&tcp, 0, sizeof(tcp));
 708         memset(&tcp_mask, 0, sizeof(tcp_mask));
 709         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 710                 /*
 711                  * The HW has no decrement operation, only increment operation.
 712                  * To simulate decrement X from Y using increment operation
 713                  * we need to add UINT32_MAX X times to Y.
 714                  * Each adding of UINT32_MAX decrements Y by 1.
 715                  */
 716                 value *= UINT32_MAX;
 717         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 718         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 719         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 720         item.spec = &tcp;
 721         item.mask = &tcp_mask;
 722         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 723                                              MLX5_MODIFICATION_TYPE_ADD, error);
 724 }
 725
 726 /**
 727  * Validate META item.
 728  *
 729  * @param[in] dev
 730  *   Pointer to the rte_eth_dev structure.
 731  * @param[in] item
 732  *   Item specification.
 733  * @param[in] attr
 734  *   Attributes of flow that includes this item.
 735  * @param[out] error
 736  *   Pointer to error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_validate_item_meta(struct rte_eth_dev *dev,
 743                            const struct rte_flow_item *item,
 744                            const struct rte_flow_attr *attr,
 745                            struct rte_flow_error *error)
 746 {
 747         const struct rte_flow_item_meta *spec = item->spec;
 748         const struct rte_flow_item_meta *mask = item->mask;
 749         const struct rte_flow_item_meta nic_mask = {
 750                 .data = RTE_BE32(UINT32_MAX)
 751         };
 752         int ret;
 753         uint64_t offloads = dev->data->dev_conf.txmode.offloads;
 754
 755         if (!(offloads & DEV_TX_OFFLOAD_MATCH_METADATA))
 756                 return rte_flow_error_set(error, EPERM,
 757                                           RTE_FLOW_ERROR_TYPE_ITEM,
 758                                           NULL,
 759                                           "match on metadata offload "
 760                                           "configuration is off for this port");
 761         if (!spec)
 762                 return rte_flow_error_set(error, EINVAL,
 763                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 764                                           item->spec,
 765                                           "data cannot be empty");
 766         if (!spec->data)
 767                 return rte_flow_error_set(error, EINVAL,
 768                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 769                                           NULL,
 770                                           "data cannot be zero");
 771         if (!mask)
 772                 mask = &rte_flow_item_meta_mask;
 773         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
 774                                         (const uint8_t *)&nic_mask,
 775                                         sizeof(struct rte_flow_item_meta),
 776                                         error);
 777         if (ret < 0)
 778                 return ret;
 779         if (attr->ingress)
 780                 return rte_flow_error_set(error, ENOTSUP,
 781                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 782                                           NULL,
 783                                           "pattern not supported for ingress");
 784         return 0;
 785 }
 786
 787 /**
 788  * Validate vport item.
 789  *
 790  * @param[in] dev
 791  *   Pointer to the rte_eth_dev structure.
 792  * @param[in] item
 793  *   Item specification.
 794  * @param[in] attr
 795  *   Attributes of flow that includes this item.
 796  * @param[in] item_flags
 797  *   Bit-fields that holds the items detected until now.
 798  * @param[out] error
 799  *   Pointer to error structure.
 800  *
 801  * @return
 802  *   0 on success, a negative errno value otherwise and rte_errno is set.
 803  */
 804 static int
 805 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 806                               const struct rte_flow_item *item,
 807                               const struct rte_flow_attr *attr,
 808                               uint64_t item_flags,
 809                               struct rte_flow_error *error)
 810 {
 811         const struct rte_flow_item_port_id *spec = item->spec;
 812         const struct rte_flow_item_port_id *mask = item->mask;
 813         const struct rte_flow_item_port_id switch_mask = {
 814                         .id = 0xffffffff,
 815         };
 816         struct mlx5_priv *esw_priv;
 817         struct mlx5_priv *dev_priv;
 818         int ret;
 819
 820         if (!attr->transfer)
 821                 return rte_flow_error_set(error, EINVAL,
 822                                           RTE_FLOW_ERROR_TYPE_ITEM,
 823                                           NULL,
 824                                           "match on port id is valid only"
 825                                           " when transfer flag is enabled");
 826         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
 827                 return rte_flow_error_set(error, ENOTSUP,
 828                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 829                                           "multiple source ports are not"
 830                                           " supported");
 831         if (!mask)
 832                 mask = &switch_mask;
 833         if (mask->id != 0xffffffff)
 834                 return rte_flow_error_set(error, ENOTSUP,
 835                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
 836                                            mask,
 837                                            "no support for partial mask on"
 838                                            " \"id\" field");
 839         ret = mlx5_flow_item_acceptable
 840                                 (item, (const uint8_t *)mask,
 841                                  (const uint8_t *)&rte_flow_item_port_id_mask,
 842                                  sizeof(struct rte_flow_item_port_id),
 843                                  error);
 844         if (ret)
 845                 return ret;
 846         if (!spec)
 847                 return 0;
 848         esw_priv = mlx5_port_to_eswitch_info(spec->id);
 849         if (!esw_priv)
 850                 return rte_flow_error_set(error, rte_errno,
 851                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 852                                           "failed to obtain E-Switch info for"
 853                                           " port");
 854         dev_priv = mlx5_dev_to_eswitch_info(dev);
 855         if (!dev_priv)
 856                 return rte_flow_error_set(error, rte_errno,
 857                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 858                                           NULL,
 859                                           "failed to obtain E-Switch info");
 860         if (esw_priv->domain_id != dev_priv->domain_id)
 861                 return rte_flow_error_set(error, EINVAL,
 862                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 863                                           "cannot match on a port from a"
 864                                           " different E-Switch");
 865         return 0;
 866 }
 867
 868 /**
 869  * Validate the pop VLAN action.
 870  *
 871  * @param[in] dev
 872  *   Pointer to the rte_eth_dev structure.
 873  * @param[in] action_flags
 874  *   Holds the actions detected until now.
 875  * @param[in] action
 876  *   Pointer to the pop vlan action.
 877  * @param[in] item_flags
 878  *   The items found in this flow rule.
 879  * @param[in] attr
 880  *   Pointer to flow attributes.
 881  * @param[out] error
 882  *   Pointer to error structure.
 883  *
 884  * @return
 885  *   0 on success, a negative errno value otherwise and rte_errno is set.
 886  */
 887 static int
 888 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
 889                                  uint64_t action_flags,
 890                                  const struct rte_flow_action *action,
 891                                  uint64_t item_flags,
 892                                  const struct rte_flow_attr *attr,
 893                                  struct rte_flow_error *error)
 894 {
 895         struct mlx5_priv *priv = dev->data->dev_private;
 896
 897         (void)action;
 898         (void)attr;
 899         if (!priv->sh->pop_vlan_action)
 900                 return rte_flow_error_set(error, ENOTSUP,
 901                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 902                                           NULL,
 903                                           "pop vlan action is not supported");
 904         /*
 905          * Check for inconsistencies:
 906          *  fail strip_vlan in a flow that matches packets without VLAN tags.
 907          *  fail strip_vlan in a flow that matches packets without explicitly a
 908          *  matching on VLAN tag ?
 909          */
 910         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
 911                 return rte_flow_error_set(error, ENOTSUP,
 912                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 913                                           NULL,
 914                                           "no support for multiple vlan pop "
 915                                           "actions");
 916         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
 917                 return rte_flow_error_set(error, ENOTSUP,
 918                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 919                                           NULL,
 920                                           "cannot pop vlan without a "
 921                                           "match on (outer) vlan in the flow");
 922         return 0;
 923 }
 924
 925 /**
 926  * Get VLAN default info from vlan match info.
 927  *
 928  * @param[in] dev
 929  *   Pointer to the rte_eth_dev structure.
 930  * @param[in] item
 931  *   the list of item specifications.
 932  * @param[out] vlan
 933  *   pointer VLAN info to fill to.
 934  * @param[out] error
 935  *   Pointer to error structure.
 936  *
 937  * @return
 938  *   0 on success, a negative errno value otherwise and rte_errno is set.
 939  */
 940 static void
 941 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
 942                                   struct rte_vlan_hdr *vlan)
 943 {
 944         const struct rte_flow_item_vlan nic_mask = {
 945                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
 946                                 MLX5DV_FLOW_VLAN_VID_MASK),
 947                 .inner_type = RTE_BE16(0xffff),
 948         };
 949
 950         if (items == NULL)
 951                 return;
 952         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
 953                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
 954                 ;
 955         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
 956                 const struct rte_flow_item_vlan *vlan_m = items->mask;
 957                 const struct rte_flow_item_vlan *vlan_v = items->spec;
 958
 959                 if (!vlan_m)
 960                         vlan_m = &nic_mask;
 961                 /* Only full match values are accepted */
 962                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
 963                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
 964                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
 965                         vlan->vlan_tci |=
 966                                 rte_be_to_cpu_16(vlan_v->tci &
 967                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
 968                 }
 969                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
 970                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
 971                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 972                         vlan->vlan_tci |=
 973                                 rte_be_to_cpu_16(vlan_v->tci &
 974                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
 975                 }
 976                 if (vlan_m->inner_type == nic_mask.inner_type)
 977                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
 978                                                            vlan_m->inner_type);
 979         }
 980 }
 981
 982 /**
 983  * Validate the push VLAN action.
 984  *
 985  * @param[in] action_flags
 986  *   Holds the actions detected until now.
 987  * @param[in] action
 988  *   Pointer to the encap action.
 989  * @param[in] attr
 990  *   Pointer to flow attributes
 991  * @param[out] error
 992  *   Pointer to error structure.
 993  *
 994  * @return
 995  *   0 on success, a negative errno value otherwise and rte_errno is set.
 996  */
 997 static int
 998 flow_dv_validate_action_push_vlan(uint64_t action_flags,
 999                                   const struct rte_flow_action *action,
1000                                   const struct rte_flow_attr *attr,
1001                                   struct rte_flow_error *error)
1002 {
1003         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1004
1005         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1006             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1007                 return rte_flow_error_set(error, EINVAL,
1008                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1009                                           "invalid vlan ethertype");
1010         if (action_flags &
1011                 (MLX5_FLOW_ACTION_OF_POP_VLAN | MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1012                 return rte_flow_error_set(error, ENOTSUP,
1013                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1014                                           "no support for multiple VLAN "
1015                                           "actions");
1016         (void)attr;
1017         return 0;
1018 }
1019
1020 /**
1021  * Validate the set VLAN PCP.
1022  *
1023  * @param[in] action_flags
1024  *   Holds the actions detected until now.
1025  * @param[in] actions
1026  *   Pointer to the list of actions remaining in the flow rule.
1027  * @param[in] attr
1028  *   Pointer to flow attributes
1029  * @param[out] error
1030  *   Pointer to error structure.
1031  *
1032  * @return
1033  *   0 on success, a negative errno value otherwise and rte_errno is set.
1034  */
1035 static int
1036 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1037                                      const struct rte_flow_action actions[],
1038                                      struct rte_flow_error *error)
1039 {
1040         const struct rte_flow_action *action = actions;
1041         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1042
1043         if (conf->vlan_pcp > 7)
1044                 return rte_flow_error_set(error, EINVAL,
1045                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1046                                           "VLAN PCP value is too big");
1047         if (mlx5_flow_find_action(actions,
1048                                   RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN) == NULL)
1049                 return rte_flow_error_set(error, ENOTSUP,
1050                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1051                                           "set VLAN PCP can only be used "
1052                                           "with push VLAN action");
1053         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
1054                 return rte_flow_error_set(error, ENOTSUP,
1055                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1056                                           "set VLAN PCP action must precede "
1057                                           "the push VLAN action");
1058         return 0;
1059 }
1060
1061 /**
1062  * Validate the set VLAN VID.
1063  *
1064  * @param[in] item_flags
1065  *   Holds the items detected in this rule.
1066  * @param[in] actions
1067  *   Pointer to the list of actions remaining in the flow rule.
1068  * @param[in] attr
1069  *   Pointer to flow attributes
1070  * @param[out] error
1071  *   Pointer to error structure.
1072  *
1073  * @return
1074  *   0 on success, a negative errno value otherwise and rte_errno is set.
1075  */
1076 static int
1077 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1078                                      const struct rte_flow_action actions[],
1079                                      struct rte_flow_error *error)
1080 {
1081         const struct rte_flow_action *action = actions;
1082         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1083
1084         if (conf->vlan_vid > RTE_BE16(0xFFE))
1085                 return rte_flow_error_set(error, EINVAL,
1086                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1087                                           "VLAN VID value is too big");
1088         /* If a push VLAN action follows then it will handle this action */
1089         if (mlx5_flow_find_action(actions,
1090                                   RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN))
1091                 return 0;
1092
1093         /*
1094          * Action is on an existing VLAN header:
1095          *    Need to verify this is a single modify CID action.
1096          *   Rule mast include a match on outer VLAN.
1097          */
1098         if (mlx5_flow_find_action(++action,
1099                                   RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1100                 return rte_flow_error_set(error, ENOTSUP,
1101                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1102                                           "Multiple VLAN VID modifications are "
1103                                           "not supported");
1104         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1105                 return rte_flow_error_set(error, EINVAL,
1106                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1107                                           "match on VLAN is required in order "
1108                                           "to set VLAN VID");
1109         return 0;
1110 }
1111
1112 /**
1113  * Validate count action.
1114  *
1115  * @param[in] dev
1116  *   device otr.
1117  * @param[out] error
1118  *   Pointer to error structure.
1119  *
1120  * @return
1121  *   0 on success, a negative errno value otherwise and rte_errno is set.
1122  */
1123 static int
1124 flow_dv_validate_action_count(struct rte_eth_dev *dev,
1125                               struct rte_flow_error *error)
1126 {
1127         struct mlx5_priv *priv = dev->data->dev_private;
1128
1129         if (!priv->config.devx)
1130                 goto notsup_err;
1131 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
1132         return 0;
1133 #endif
1134 notsup_err:
1135         return rte_flow_error_set
1136                       (error, ENOTSUP,
1137                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1138                        NULL,
1139                        "count action not supported");
1140 }
1141
1142 /**
1143  * Validate the L2 encap action.
1144  *
1145  * @param[in] action_flags
1146  *   Holds the actions detected until now.
1147  * @param[in] action
1148  *   Pointer to the encap action.
1149  * @param[in] attr
1150  *   Pointer to flow attributes
1151  * @param[out] error
1152  *   Pointer to error structure.
1153  *
1154  * @return
1155  *   0 on success, a negative errno value otherwise and rte_errno is set.
1156  */
1157 static int
1158 flow_dv_validate_action_l2_encap(uint64_t action_flags,
1159                                  const struct rte_flow_action *action,
1160                                  const struct rte_flow_attr *attr,
1161                                  struct rte_flow_error *error)
1162 {
1163         if (!(action->conf))
1164                 return rte_flow_error_set(error, EINVAL,
1165                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1166                                           "configuration cannot be null");
1167         if (action_flags & MLX5_FLOW_ACTION_DROP)
1168                 return rte_flow_error_set(error, EINVAL,
1169                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1170                                           "can't drop and encap in same flow");
1171         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
1172                 return rte_flow_error_set(error, EINVAL,
1173                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1174                                           "can only have a single encap or"
1175                                           " decap action in a flow");
1176         if (!attr->transfer && attr->ingress)
1177                 return rte_flow_error_set(error, ENOTSUP,
1178                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1179                                           NULL,
1180                                           "encap action not supported for "
1181                                           "ingress");
1182         return 0;
1183 }
1184
1185 /**
1186  * Validate the L2 decap action.
1187  *
1188  * @param[in] action_flags
1189  *   Holds the actions detected until now.
1190  * @param[in] attr
1191  *   Pointer to flow attributes
1192  * @param[out] error
1193  *   Pointer to error structure.
1194  *
1195  * @return
1196  *   0 on success, a negative errno value otherwise and rte_errno is set.
1197  */
1198 static int
1199 flow_dv_validate_action_l2_decap(uint64_t action_flags,
1200                                  const struct rte_flow_attr *attr,
1201                                  struct rte_flow_error *error)
1202 {
1203         if (action_flags & MLX5_FLOW_ACTION_DROP)
1204                 return rte_flow_error_set(error, EINVAL,
1205                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1206                                           "can't drop and decap in same flow");
1207         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
1208                 return rte_flow_error_set(error, EINVAL,
1209                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1210                                           "can only have a single encap or"
1211                                           " decap action in a flow");
1212         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
1213                 return rte_flow_error_set(error, EINVAL,
1214                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1215                                           "can't have decap action after"
1216                                           " modify action");
1217         if (attr->egress)
1218                 return rte_flow_error_set(error, ENOTSUP,
1219                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1220                                           NULL,
1221                                           "decap action not supported for "
1222                                           "egress");
1223         return 0;
1224 }
1225
1226 /**
1227  * Validate the raw encap action.
1228  *
1229  * @param[in] action_flags
1230  *   Holds the actions detected until now.
1231  * @param[in] action
1232  *   Pointer to the encap action.
1233  * @param[in] attr
1234  *   Pointer to flow attributes
1235  * @param[out] error
1236  *   Pointer to error structure.
1237  *
1238  * @return
1239  *   0 on success, a negative errno value otherwise and rte_errno is set.
1240  */
1241 static int
1242 flow_dv_validate_action_raw_encap(uint64_t action_flags,
1243                                   const struct rte_flow_action *action,
1244                                   const struct rte_flow_attr *attr,
1245                                   struct rte_flow_error *error)
1246 {
1247         const struct rte_flow_action_raw_encap *raw_encap =
1248                 (const struct rte_flow_action_raw_encap *)action->conf;
1249         if (!(action->conf))
1250                 return rte_flow_error_set(error, EINVAL,
1251                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1252                                           "configuration cannot be null");
1253         if (action_flags & MLX5_FLOW_ACTION_DROP)
1254                 return rte_flow_error_set(error, EINVAL,
1255                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1256                                           "can't drop and encap in same flow");
1257         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1258                 return rte_flow_error_set(error, EINVAL,
1259                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1260                                           "can only have a single encap"
1261                                           " action in a flow");
1262         /* encap without preceding decap is not supported for ingress */
1263         if (!attr->transfer &&  attr->ingress &&
1264             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
1265                 return rte_flow_error_set(error, ENOTSUP,
1266                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1267                                           NULL,
1268                                           "encap action not supported for "
1269                                           "ingress");
1270         if (!raw_encap->size || !raw_encap->data)
1271                 return rte_flow_error_set(error, EINVAL,
1272                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1273                                           "raw encap data cannot be empty");
1274         return 0;
1275 }
1276
1277 /**
1278  * Validate the raw decap action.
1279  *
1280  * @param[in] action_flags
1281  *   Holds the actions detected until now.
1282  * @param[in] action
1283  *   Pointer to the encap action.
1284  * @param[in] attr
1285  *   Pointer to flow attributes
1286  * @param[out] error
1287  *   Pointer to error structure.
1288  *
1289  * @return
1290  *   0 on success, a negative errno value otherwise and rte_errno is set.
1291  */
1292 static int
1293 flow_dv_validate_action_raw_decap(uint64_t action_flags,
1294                                   const struct rte_flow_action *action,
1295                                   const struct rte_flow_attr *attr,
1296                                   struct rte_flow_error *error)
1297 {
1298         if (action_flags & MLX5_FLOW_ACTION_DROP)
1299                 return rte_flow_error_set(error, EINVAL,
1300                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1301                                           "can't drop and decap in same flow");
1302         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1303                 return rte_flow_error_set(error, EINVAL,
1304                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1305                                           "can't have encap action before"
1306                                           " decap action");
1307         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
1308                 return rte_flow_error_set(error, EINVAL,
1309                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1310                                           "can only have a single decap"
1311                                           " action in a flow");
1312         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
1313                 return rte_flow_error_set(error, EINVAL,
1314                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1315                                           "can't have decap action after"
1316                                           " modify action");
1317         /* decap action is valid on egress only if it is followed by encap */
1318         if (attr->egress) {
1319                 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
1320                        action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
1321                        action++) {
1322                 }
1323                 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
1324                         return rte_flow_error_set
1325                                         (error, ENOTSUP,
1326                                          RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1327                                          NULL, "decap action not supported"
1328                                          " for egress");
1329         }
1330         return 0;
1331 }
1332
1333 /**
1334  * Find existing encap/decap resource or create and register a new one.
1335  *
1336  * @param dev[in, out]
1337  *   Pointer to rte_eth_dev structure.
1338  * @param[in, out] resource
1339  *   Pointer to encap/decap resource.
1340  * @parm[in, out] dev_flow
1341  *   Pointer to the dev_flow.
1342  * @param[out] error
1343  *   pointer to error structure.
1344  *
1345  * @return
1346  *   0 on success otherwise -errno and errno is set.
1347  */
1348 static int
1349 flow_dv_encap_decap_resource_register
1350                         (struct rte_eth_dev *dev,
1351                          struct mlx5_flow_dv_encap_decap_resource *resource,
1352                          struct mlx5_flow *dev_flow,
1353                          struct rte_flow_error *error)
1354 {
1355         struct mlx5_priv *priv = dev->data->dev_private;
1356         struct mlx5_ibv_shared *sh = priv->sh;
1357         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
1358         struct rte_flow *flow = dev_flow->flow;
1359         struct mlx5dv_dr_domain *domain;
1360
1361         resource->flags = flow->group ? 0 : 1;
1362         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
1363                 domain = sh->fdb_domain;
1364         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
1365                 domain = sh->rx_domain;
1366         else
1367                 domain = sh->tx_domain;
1368
1369         /* Lookup a matching resource from cache. */
1370         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
1371                 if (resource->reformat_type == cache_resource->reformat_type &&
1372                     resource->ft_type == cache_resource->ft_type &&
1373                     resource->flags == cache_resource->flags &&
1374                     resource->size == cache_resource->size &&
1375                     !memcmp((const void *)resource->buf,
1376                             (const void *)cache_resource->buf,
1377                             resource->size)) {
1378                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
1379                                 (void *)cache_resource,
1380                                 rte_atomic32_read(&cache_resource->refcnt));
1381                         rte_atomic32_inc(&cache_resource->refcnt);
1382                         dev_flow->dv.encap_decap = cache_resource;
1383                         return 0;
1384                 }
1385         }
1386         /* Register new encap/decap resource. */
1387         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1388         if (!cache_resource)
1389                 return rte_flow_error_set(error, ENOMEM,
1390                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1391                                           "cannot allocate resource memory");
1392         *cache_resource = *resource;
1393         cache_resource->verbs_action =
1394                 mlx5_glue->dv_create_flow_action_packet_reformat
1395                         (sh->ctx, cache_resource->reformat_type,
1396                          cache_resource->ft_type, domain, cache_resource->flags,
1397                          cache_resource->size,
1398                          (cache_resource->size ? cache_resource->buf : NULL));
1399         if (!cache_resource->verbs_action) {
1400                 rte_free(cache_resource);
1401                 return rte_flow_error_set(error, ENOMEM,
1402                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1403                                           NULL, "cannot create action");
1404         }
1405         rte_atomic32_init(&cache_resource->refcnt);
1406         rte_atomic32_inc(&cache_resource->refcnt);
1407         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
1408         dev_flow->dv.encap_decap = cache_resource;
1409         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
1410                 (void *)cache_resource,
1411                 rte_atomic32_read(&cache_resource->refcnt));
1412         return 0;
1413 }
1414
1415 /**
1416  * Find existing table jump resource or create and register a new one.
1417  *
1418  * @param dev[in, out]
1419  *   Pointer to rte_eth_dev structure.
1420  * @param[in, out] resource
1421  *   Pointer to jump table resource.
1422  * @parm[in, out] dev_flow
1423  *   Pointer to the dev_flow.
1424  * @param[out] error
1425  *   pointer to error structure.
1426  *
1427  * @return
1428  *   0 on success otherwise -errno and errno is set.
1429  */
1430 static int
1431 flow_dv_jump_tbl_resource_register
1432                         (struct rte_eth_dev *dev,
1433                          struct mlx5_flow_dv_jump_tbl_resource *resource,
1434                          struct mlx5_flow *dev_flow,
1435                          struct rte_flow_error *error)
1436 {
1437         struct mlx5_priv *priv = dev->data->dev_private;
1438         struct mlx5_ibv_shared *sh = priv->sh;
1439         struct mlx5_flow_dv_jump_tbl_resource *cache_resource;
1440
1441         /* Lookup a matching resource from cache. */
1442         LIST_FOREACH(cache_resource, &sh->jump_tbl, next) {
1443                 if (resource->tbl == cache_resource->tbl) {
1444                         DRV_LOG(DEBUG, "jump table resource resource %p: refcnt %d++",
1445                                 (void *)cache_resource,
1446                                 rte_atomic32_read(&cache_resource->refcnt));
1447                         rte_atomic32_inc(&cache_resource->refcnt);
1448                         dev_flow->dv.jump = cache_resource;
1449                         return 0;
1450                 }
1451         }
1452         /* Register new jump table resource. */
1453         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1454         if (!cache_resource)
1455                 return rte_flow_error_set(error, ENOMEM,
1456                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1457                                           "cannot allocate resource memory");
1458         *cache_resource = *resource;
1459         cache_resource->action =
1460                 mlx5_glue->dr_create_flow_action_dest_flow_tbl
1461                 (resource->tbl->obj);
1462         if (!cache_resource->action) {
1463                 rte_free(cache_resource);
1464                 return rte_flow_error_set(error, ENOMEM,
1465                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1466                                           NULL, "cannot create action");
1467         }
1468         rte_atomic32_init(&cache_resource->refcnt);
1469         rte_atomic32_inc(&cache_resource->refcnt);
1470         LIST_INSERT_HEAD(&sh->jump_tbl, cache_resource, next);
1471         dev_flow->dv.jump = cache_resource;
1472         DRV_LOG(DEBUG, "new jump table  resource %p: refcnt %d++",
1473                 (void *)cache_resource,
1474                 rte_atomic32_read(&cache_resource->refcnt));
1475         return 0;
1476 }
1477
1478 /**
1479  * Find existing table port ID resource or create and register a new one.
1480  *
1481  * @param dev[in, out]
1482  *   Pointer to rte_eth_dev structure.
1483  * @param[in, out] resource
1484  *   Pointer to port ID action resource.
1485  * @parm[in, out] dev_flow
1486  *   Pointer to the dev_flow.
1487  * @param[out] error
1488  *   pointer to error structure.
1489  *
1490  * @return
1491  *   0 on success otherwise -errno and errno is set.
1492  */
1493 static int
1494 flow_dv_port_id_action_resource_register
1495                         (struct rte_eth_dev *dev,
1496                          struct mlx5_flow_dv_port_id_action_resource *resource,
1497                          struct mlx5_flow *dev_flow,
1498                          struct rte_flow_error *error)
1499 {
1500         struct mlx5_priv *priv = dev->data->dev_private;
1501         struct mlx5_ibv_shared *sh = priv->sh;
1502         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
1503
1504         /* Lookup a matching resource from cache. */
1505         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
1506                 if (resource->port_id == cache_resource->port_id) {
1507                         DRV_LOG(DEBUG, "port id action resource resource %p: "
1508                                 "refcnt %d++",
1509                                 (void *)cache_resource,
1510                                 rte_atomic32_read(&cache_resource->refcnt));
1511                         rte_atomic32_inc(&cache_resource->refcnt);
1512                         dev_flow->dv.port_id_action = cache_resource;
1513                         return 0;
1514                 }
1515         }
1516         /* Register new port id action resource. */
1517         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1518         if (!cache_resource)
1519                 return rte_flow_error_set(error, ENOMEM,
1520                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1521                                           "cannot allocate resource memory");
1522         *cache_resource = *resource;
1523         cache_resource->action =
1524                 mlx5_glue->dr_create_flow_action_dest_vport
1525                         (priv->sh->fdb_domain, resource->port_id);
1526         if (!cache_resource->action) {
1527                 rte_free(cache_resource);
1528                 return rte_flow_error_set(error, ENOMEM,
1529                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1530                                           NULL, "cannot create action");
1531         }
1532         rte_atomic32_init(&cache_resource->refcnt);
1533         rte_atomic32_inc(&cache_resource->refcnt);
1534         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
1535         dev_flow->dv.port_id_action = cache_resource;
1536         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
1537                 (void *)cache_resource,
1538                 rte_atomic32_read(&cache_resource->refcnt));
1539         return 0;
1540 }
1541
1542 /**
1543  * Find existing push vlan resource or create and register a new one.
1544  *
1545  * @param dev[in, out]
1546  *   Pointer to rte_eth_dev structure.
1547  * @param[in, out] resource
1548  *   Pointer to port ID action resource.
1549  * @parm[in, out] dev_flow
1550  *   Pointer to the dev_flow.
1551  * @param[out] error
1552  *   pointer to error structure.
1553  *
1554  * @return
1555  *   0 on success otherwise -errno and errno is set.
1556  */
1557 static int
1558 flow_dv_push_vlan_action_resource_register
1559                        (struct rte_eth_dev *dev,
1560                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
1561                         struct mlx5_flow *dev_flow,
1562                         struct rte_flow_error *error)
1563 {
1564         struct mlx5_priv *priv = dev->data->dev_private;
1565         struct mlx5_ibv_shared *sh = priv->sh;
1566         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
1567         struct mlx5dv_dr_domain *domain;
1568
1569         /* Lookup a matching resource from cache. */
1570         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
1571                 if (resource->vlan_tag == cache_resource->vlan_tag &&
1572                     resource->ft_type == cache_resource->ft_type) {
1573                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
1574                                 "refcnt %d++",
1575                                 (void *)cache_resource,
1576                                 rte_atomic32_read(&cache_resource->refcnt));
1577                         rte_atomic32_inc(&cache_resource->refcnt);
1578                         dev_flow->dv.push_vlan_res = cache_resource;
1579                         return 0;
1580                 }
1581         }
1582         /* Register new push_vlan action resource. */
1583         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1584         if (!cache_resource)
1585                 return rte_flow_error_set(error, ENOMEM,
1586                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1587                                           "cannot allocate resource memory");
1588         *cache_resource = *resource;
1589         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
1590                 domain = sh->fdb_domain;
1591         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
1592                 domain = sh->rx_domain;
1593         else
1594                 domain = sh->tx_domain;
1595         cache_resource->action =
1596                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
1597                                                            resource->vlan_tag);
1598         if (!cache_resource->action) {
1599                 rte_free(cache_resource);
1600                 return rte_flow_error_set(error, ENOMEM,
1601                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1602                                           NULL, "cannot create action");
1603         }
1604         rte_atomic32_init(&cache_resource->refcnt);
1605         rte_atomic32_inc(&cache_resource->refcnt);
1606         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
1607         dev_flow->dv.push_vlan_res = cache_resource;
1608         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
1609                 (void *)cache_resource,
1610                 rte_atomic32_read(&cache_resource->refcnt));
1611         return 0;
1612 }
1613 /**
1614  * Get the size of specific rte_flow_item_type
1615  *
1616  * @param[in] item_type
1617  *   Tested rte_flow_item_type.
1618  *
1619  * @return
1620  *   sizeof struct item_type, 0 if void or irrelevant.
1621  */
1622 static size_t
1623 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
1624 {
1625         size_t retval;
1626
1627         switch (item_type) {
1628         case RTE_FLOW_ITEM_TYPE_ETH:
1629                 retval = sizeof(struct rte_flow_item_eth);
1630                 break;
1631         case RTE_FLOW_ITEM_TYPE_VLAN:
1632                 retval = sizeof(struct rte_flow_item_vlan);
1633                 break;
1634         case RTE_FLOW_ITEM_TYPE_IPV4:
1635                 retval = sizeof(struct rte_flow_item_ipv4);
1636                 break;
1637         case RTE_FLOW_ITEM_TYPE_IPV6:
1638                 retval = sizeof(struct rte_flow_item_ipv6);
1639                 break;
1640         case RTE_FLOW_ITEM_TYPE_UDP:
1641                 retval = sizeof(struct rte_flow_item_udp);
1642                 break;
1643         case RTE_FLOW_ITEM_TYPE_TCP:
1644                 retval = sizeof(struct rte_flow_item_tcp);
1645                 break;
1646         case RTE_FLOW_ITEM_TYPE_VXLAN:
1647                 retval = sizeof(struct rte_flow_item_vxlan);
1648                 break;
1649         case RTE_FLOW_ITEM_TYPE_GRE:
1650                 retval = sizeof(struct rte_flow_item_gre);
1651                 break;
1652         case RTE_FLOW_ITEM_TYPE_NVGRE:
1653                 retval = sizeof(struct rte_flow_item_nvgre);
1654                 break;
1655         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1656                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
1657                 break;
1658         case RTE_FLOW_ITEM_TYPE_MPLS:
1659                 retval = sizeof(struct rte_flow_item_mpls);
1660                 break;
1661         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
1662         default:
1663                 retval = 0;
1664                 break;
1665         }
1666         return retval;
1667 }
1668
1669 #define MLX5_ENCAP_IPV4_VERSION         0x40
1670 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
1671 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
1672 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
1673 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
1674 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
1675 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
1676
1677 /**
1678  * Convert the encap action data from list of rte_flow_item to raw buffer
1679  *
1680  * @param[in] items
1681  *   Pointer to rte_flow_item objects list.
1682  * @param[out] buf
1683  *   Pointer to the output buffer.
1684  * @param[out] size
1685  *   Pointer to the output buffer size.
1686  * @param[out] error
1687  *   Pointer to the error structure.
1688  *
1689  * @return
1690  *   0 on success, a negative errno value otherwise and rte_errno is set.
1691  */
1692 static int
1693 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
1694                            size_t *size, struct rte_flow_error *error)
1695 {
1696         struct rte_ether_hdr *eth = NULL;
1697         struct rte_vlan_hdr *vlan = NULL;
1698         struct rte_ipv4_hdr *ipv4 = NULL;
1699         struct rte_ipv6_hdr *ipv6 = NULL;
1700         struct rte_udp_hdr *udp = NULL;
1701         struct rte_vxlan_hdr *vxlan = NULL;
1702         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
1703         struct rte_gre_hdr *gre = NULL;
1704         size_t len;
1705         size_t temp_size = 0;
1706
1707         if (!items)
1708                 return rte_flow_error_set(error, EINVAL,
1709                                           RTE_FLOW_ERROR_TYPE_ACTION,
1710                                           NULL, "invalid empty data");
1711         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1712                 len = flow_dv_get_item_len(items->type);
1713                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
1714                         return rte_flow_error_set(error, EINVAL,
1715                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1716                                                   (void *)items->type,
1717                                                   "items total size is too big"
1718                                                   " for encap action");
1719                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
1720                 switch (items->type) {
1721                 case RTE_FLOW_ITEM_TYPE_ETH:
1722                         eth = (struct rte_ether_hdr *)&buf[temp_size];
1723                         break;
1724                 case RTE_FLOW_ITEM_TYPE_VLAN:
1725                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
1726                         if (!eth)
1727                                 return rte_flow_error_set(error, EINVAL,
1728                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1729                                                 (void *)items->type,
1730                                                 "eth header not found");
1731                         if (!eth->ether_type)
1732                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
1733                         break;
1734                 case RTE_FLOW_ITEM_TYPE_IPV4:
1735                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
1736                         if (!vlan && !eth)
1737                                 return rte_flow_error_set(error, EINVAL,
1738                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1739                                                 (void *)items->type,
1740                                                 "neither eth nor vlan"
1741                                                 " header found");
1742                         if (vlan && !vlan->eth_proto)
1743                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1744                         else if (eth && !eth->ether_type)
1745                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1746                         if (!ipv4->version_ihl)
1747                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
1748                                                     MLX5_ENCAP_IPV4_IHL_MIN;
1749                         if (!ipv4->time_to_live)
1750                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
1751                         break;
1752                 case RTE_FLOW_ITEM_TYPE_IPV6:
1753                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
1754                         if (!vlan && !eth)
1755                                 return rte_flow_error_set(error, EINVAL,
1756                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1757                                                 (void *)items->type,
1758                                                 "neither eth nor vlan"
1759                                                 " header found");
1760                         if (vlan && !vlan->eth_proto)
1761                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1762                         else if (eth && !eth->ether_type)
1763                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1764                         if (!ipv6->vtc_flow)
1765                                 ipv6->vtc_flow =
1766                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
1767                         if (!ipv6->hop_limits)
1768                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
1769                         break;
1770                 case RTE_FLOW_ITEM_TYPE_UDP:
1771                         udp = (struct rte_udp_hdr *)&buf[temp_size];
1772                         if (!ipv4 && !ipv6)
1773                                 return rte_flow_error_set(error, EINVAL,
1774                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1775                                                 (void *)items->type,
1776                                                 "ip header not found");
1777                         if (ipv4 && !ipv4->next_proto_id)
1778                                 ipv4->next_proto_id = IPPROTO_UDP;
1779                         else if (ipv6 && !ipv6->proto)
1780                                 ipv6->proto = IPPROTO_UDP;
1781                         break;
1782                 case RTE_FLOW_ITEM_TYPE_VXLAN:
1783                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
1784                         if (!udp)
1785                                 return rte_flow_error_set(error, EINVAL,
1786                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1787                                                 (void *)items->type,
1788                                                 "udp header not found");
1789                         if (!udp->dst_port)
1790                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
1791                         if (!vxlan->vx_flags)
1792                                 vxlan->vx_flags =
1793                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
1794                         break;
1795                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1796                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
1797                         if (!udp)
1798                                 return rte_flow_error_set(error, EINVAL,
1799                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1800                                                 (void *)items->type,
1801                                                 "udp header not found");
1802                         if (!vxlan_gpe->proto)
1803                                 return rte_flow_error_set(error, EINVAL,
1804                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1805                                                 (void *)items->type,
1806                                                 "next protocol not found");
1807                         if (!udp->dst_port)
1808                                 udp->dst_port =
1809                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
1810                         if (!vxlan_gpe->vx_flags)
1811                                 vxlan_gpe->vx_flags =
1812                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
1813                         break;
1814                 case RTE_FLOW_ITEM_TYPE_GRE:
1815                 case RTE_FLOW_ITEM_TYPE_NVGRE:
1816                         gre = (struct rte_gre_hdr *)&buf[temp_size];
1817                         if (!gre->proto)
1818                                 return rte_flow_error_set(error, EINVAL,
1819                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1820                                                 (void *)items->type,
1821                                                 "next protocol not found");
1822                         if (!ipv4 && !ipv6)
1823                                 return rte_flow_error_set(error, EINVAL,
1824                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1825                                                 (void *)items->type,
1826                                                 "ip header not found");
1827                         if (ipv4 && !ipv4->next_proto_id)
1828                                 ipv4->next_proto_id = IPPROTO_GRE;
1829                         else if (ipv6 && !ipv6->proto)
1830                                 ipv6->proto = IPPROTO_GRE;
1831                         break;
1832                 case RTE_FLOW_ITEM_TYPE_VOID:
1833                         break;
1834                 default:
1835                         return rte_flow_error_set(error, EINVAL,
1836                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1837                                                   (void *)items->type,
1838                                                   "unsupported item type");
1839                         break;
1840                 }
1841                 temp_size += len;
1842         }
1843         *size = temp_size;
1844         return 0;
1845 }
1846
1847 static int
1848 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
1849 {
1850         struct rte_ether_hdr *eth = NULL;
1851         struct rte_vlan_hdr *vlan = NULL;
1852         struct rte_ipv6_hdr *ipv6 = NULL;
1853         struct rte_udp_hdr *udp = NULL;
1854         char *next_hdr;
1855         uint16_t proto;
1856
1857         eth = (struct rte_ether_hdr *)data;
1858         next_hdr = (char *)(eth + 1);
1859         proto = RTE_BE16(eth->ether_type);
1860
1861         /* VLAN skipping */
1862         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
1863                 vlan = (struct rte_vlan_hdr *)next_hdr;
1864                 proto = RTE_BE16(vlan->eth_proto);
1865                 next_hdr += sizeof(struct rte_vlan_hdr);
1866         }
1867
1868         /* HW calculates IPv4 csum. no need to proceed */
1869         if (proto == RTE_ETHER_TYPE_IPV4)
1870                 return 0;
1871
1872         /* non IPv4/IPv6 header. not supported */
1873         if (proto != RTE_ETHER_TYPE_IPV6) {
1874                 return rte_flow_error_set(error, ENOTSUP,
1875                                           RTE_FLOW_ERROR_TYPE_ACTION,
1876                                           NULL, "Cannot offload non IPv4/IPv6");
1877         }
1878
1879         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
1880
1881         /* ignore non UDP */
1882         if (ipv6->proto != IPPROTO_UDP)
1883                 return 0;
1884
1885         udp = (struct rte_udp_hdr *)(ipv6 + 1);
1886         udp->dgram_cksum = 0;
1887
1888         return 0;
1889 }
1890
1891 /**
1892  * Convert L2 encap action to DV specification.
1893  *
1894  * @param[in] dev
1895  *   Pointer to rte_eth_dev structure.
1896  * @param[in] action
1897  *   Pointer to action structure.
1898  * @param[in, out] dev_flow
1899  *   Pointer to the mlx5_flow.
1900  * @param[in] transfer
1901  *   Mark if the flow is E-Switch flow.
1902  * @param[out] error
1903  *   Pointer to the error structure.
1904  *
1905  * @return
1906  *   0 on success, a negative errno value otherwise and rte_errno is set.
1907  */
1908 static int
1909 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
1910                                const struct rte_flow_action *action,
1911                                struct mlx5_flow *dev_flow,
1912                                uint8_t transfer,
1913                                struct rte_flow_error *error)
1914 {
1915         const struct rte_flow_item *encap_data;
1916         const struct rte_flow_action_raw_encap *raw_encap_data;
1917         struct mlx5_flow_dv_encap_decap_resource res = {
1918                 .reformat_type =
1919                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
1920                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1921                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
1922         };
1923
1924         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
1925                 raw_encap_data =
1926                         (const struct rte_flow_action_raw_encap *)action->conf;
1927                 res.size = raw_encap_data->size;
1928                 memcpy(res.buf, raw_encap_data->data, res.size);
1929                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
1930                         return -rte_errno;
1931         } else {
1932                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
1933                         encap_data =
1934                                 ((const struct rte_flow_action_vxlan_encap *)
1935                                                 action->conf)->definition;
1936                 else
1937                         encap_data =
1938                                 ((const struct rte_flow_action_nvgre_encap *)
1939                                                 action->conf)->definition;
1940                 if (flow_dv_convert_encap_data(encap_data, res.buf,
1941                                                &res.size, error))
1942                         return -rte_errno;
1943         }
1944         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1945                 return rte_flow_error_set(error, EINVAL,
1946                                           RTE_FLOW_ERROR_TYPE_ACTION,
1947                                           NULL, "can't create L2 encap action");
1948         return 0;
1949 }
1950
1951 /**
1952  * Convert L2 decap action to DV specification.
1953  *
1954  * @param[in] dev
1955  *   Pointer to rte_eth_dev structure.
1956  * @param[in, out] dev_flow
1957  *   Pointer to the mlx5_flow.
1958  * @param[in] transfer
1959  *   Mark if the flow is E-Switch flow.
1960  * @param[out] error
1961  *   Pointer to the error structure.
1962  *
1963  * @return
1964  *   0 on success, a negative errno value otherwise and rte_errno is set.
1965  */
1966 static int
1967 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
1968                                struct mlx5_flow *dev_flow,
1969                                uint8_t transfer,
1970                                struct rte_flow_error *error)
1971 {
1972         struct mlx5_flow_dv_encap_decap_resource res = {
1973                 .size = 0,
1974                 .reformat_type =
1975                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
1976                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1977                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
1978         };
1979
1980         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1981                 return rte_flow_error_set(error, EINVAL,
1982                                           RTE_FLOW_ERROR_TYPE_ACTION,
1983                                           NULL, "can't create L2 decap action");
1984         return 0;
1985 }
1986
1987 /**
1988  * Convert raw decap/encap (L3 tunnel) action to DV specification.
1989  *
1990  * @param[in] dev
1991  *   Pointer to rte_eth_dev structure.
1992  * @param[in] action
1993  *   Pointer to action structure.
1994  * @param[in, out] dev_flow
1995  *   Pointer to the mlx5_flow.
1996  * @param[in] attr
1997  *   Pointer to the flow attributes.
1998  * @param[out] error
1999  *   Pointer to the error structure.
2000  *
2001  * @return
2002  *   0 on success, a negative errno value otherwise and rte_errno is set.
2003  */
2004 static int
2005 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2006                                 const struct rte_flow_action *action,
2007                                 struct mlx5_flow *dev_flow,
2008                                 const struct rte_flow_attr *attr,
2009                                 struct rte_flow_error *error)
2010 {
2011         const struct rte_flow_action_raw_encap *encap_data;
2012         struct mlx5_flow_dv_encap_decap_resource res;
2013
2014         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2015         res.size = encap_data->size;
2016         memcpy(res.buf, encap_data->data, res.size);
2017         res.reformat_type = attr->egress ?
2018                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL :
2019                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
2020         if (attr->transfer)
2021                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2022         else
2023                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2024                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2025         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2026                 return rte_flow_error_set(error, EINVAL,
2027                                           RTE_FLOW_ERROR_TYPE_ACTION,
2028                                           NULL, "can't create encap action");
2029         return 0;
2030 }
2031
2032 /**
2033  * Create action push VLAN.
2034  *
2035  * @param[in] dev
2036  *   Pointer to rte_eth_dev structure.
2037  * @param[in] vlan_tag
2038  *   the vlan tag to push to the Ethernet header.
2039  * @param[in, out] dev_flow
2040  *   Pointer to the mlx5_flow.
2041  * @param[in] attr
2042  *   Pointer to the flow attributes.
2043  * @param[out] error
2044  *   Pointer to the error structure.
2045  *
2046  * @return
2047  *   0 on success, a negative errno value otherwise and rte_errno is set.
2048  */
2049 static int
2050 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
2051                                 const struct rte_flow_attr *attr,
2052                                 const struct rte_vlan_hdr *vlan,
2053                                 struct mlx5_flow *dev_flow,
2054                                 struct rte_flow_error *error)
2055 {
2056         struct mlx5_flow_dv_push_vlan_action_resource res;
2057
2058         res.vlan_tag =
2059                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
2060                                  vlan->vlan_tci);
2061         if (attr->transfer)
2062                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2063         else
2064                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2065                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2066         return flow_dv_push_vlan_action_resource_register
2067                                             (dev, &res, dev_flow, error);
2068 }
2069
2070 /**
2071  * Validate the modify-header actions.
2072  *
2073  * @param[in] action_flags
2074  *   Holds the actions detected until now.
2075  * @param[in] action
2076  *   Pointer to the modify action.
2077  * @param[out] error
2078  *   Pointer to error structure.
2079  *
2080  * @return
2081  *   0 on success, a negative errno value otherwise and rte_errno is set.
2082  */
2083 static int
2084 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
2085                                    const struct rte_flow_action *action,
2086                                    struct rte_flow_error *error)
2087 {
2088         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
2089                 return rte_flow_error_set(error, EINVAL,
2090                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2091                                           NULL, "action configuration not set");
2092         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2093                 return rte_flow_error_set(error, EINVAL,
2094                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2095                                           "can't have encap action before"
2096                                           " modify action");
2097         return 0;
2098 }
2099
2100 /**
2101  * Validate the modify-header MAC address actions.
2102  *
2103  * @param[in] action_flags
2104  *   Holds the actions detected until now.
2105  * @param[in] action
2106  *   Pointer to the modify action.
2107  * @param[in] item_flags
2108  *   Holds the items detected.
2109  * @param[out] error
2110  *   Pointer to error structure.
2111  *
2112  * @return
2113  *   0 on success, a negative errno value otherwise and rte_errno is set.
2114  */
2115 static int
2116 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
2117                                    const struct rte_flow_action *action,
2118                                    const uint64_t item_flags,
2119                                    struct rte_flow_error *error)
2120 {
2121         int ret = 0;
2122
2123         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2124         if (!ret) {
2125                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
2126                         return rte_flow_error_set(error, EINVAL,
2127                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2128                                                   NULL,
2129                                                   "no L2 item in pattern");
2130         }
2131         return ret;
2132 }
2133
2134 /**
2135  * Validate the modify-header IPv4 address actions.
2136  *
2137  * @param[in] action_flags
2138  *   Holds the actions detected until now.
2139  * @param[in] action
2140  *   Pointer to the modify action.
2141  * @param[in] item_flags
2142  *   Holds the items detected.
2143  * @param[out] error
2144  *   Pointer to error structure.
2145  *
2146  * @return
2147  *   0 on success, a negative errno value otherwise and rte_errno is set.
2148  */
2149 static int
2150 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
2151                                     const struct rte_flow_action *action,
2152                                     const uint64_t item_flags,
2153                                     struct rte_flow_error *error)
2154 {
2155         int ret = 0;
2156
2157         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2158         if (!ret) {
2159                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
2160                         return rte_flow_error_set(error, EINVAL,
2161                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2162                                                   NULL,
2163                                                   "no ipv4 item in pattern");
2164         }
2165         return ret;
2166 }
2167
2168 /**
2169  * Validate the modify-header IPv6 address actions.
2170  *
2171  * @param[in] action_flags
2172  *   Holds the actions detected until now.
2173  * @param[in] action
2174  *   Pointer to the modify action.
2175  * @param[in] item_flags
2176  *   Holds the items detected.
2177  * @param[out] error
2178  *   Pointer to error structure.
2179  *
2180  * @return
2181  *   0 on success, a negative errno value otherwise and rte_errno is set.
2182  */
2183 static int
2184 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
2185                                     const struct rte_flow_action *action,
2186                                     const uint64_t item_flags,
2187                                     struct rte_flow_error *error)
2188 {
2189         int ret = 0;
2190
2191         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2192         if (!ret) {
2193                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
2194                         return rte_flow_error_set(error, EINVAL,
2195                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2196                                                   NULL,
2197                                                   "no ipv6 item in pattern");
2198         }
2199         return ret;
2200 }
2201
2202 /**
2203  * Validate the modify-header TP actions.
2204  *
2205  * @param[in] action_flags
2206  *   Holds the actions detected until now.
2207  * @param[in] action
2208  *   Pointer to the modify action.
2209  * @param[in] item_flags
2210  *   Holds the items detected.
2211  * @param[out] error
2212  *   Pointer to error structure.
2213  *
2214  * @return
2215  *   0 on success, a negative errno value otherwise and rte_errno is set.
2216  */
2217 static int
2218 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
2219                                   const struct rte_flow_action *action,
2220                                   const uint64_t item_flags,
2221                                   struct rte_flow_error *error)
2222 {
2223         int ret = 0;
2224
2225         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2226         if (!ret) {
2227                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
2228                         return rte_flow_error_set(error, EINVAL,
2229                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2230                                                   NULL, "no transport layer "
2231                                                   "in pattern");
2232         }
2233         return ret;
2234 }
2235
2236 /**
2237  * Validate the modify-header actions of increment/decrement
2238  * TCP Sequence-number.
2239  *
2240  * @param[in] action_flags
2241  *   Holds the actions detected until now.
2242  * @param[in] action
2243  *   Pointer to the modify action.
2244  * @param[in] item_flags
2245  *   Holds the items detected.
2246  * @param[out] error
2247  *   Pointer to error structure.
2248  *
2249  * @return
2250  *   0 on success, a negative errno value otherwise and rte_errno is set.
2251  */
2252 static int
2253 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
2254                                        const struct rte_flow_action *action,
2255                                        const uint64_t item_flags,
2256                                        struct rte_flow_error *error)
2257 {
2258         int ret = 0;
2259
2260         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2261         if (!ret) {
2262                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
2263                         return rte_flow_error_set(error, EINVAL,
2264                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2265                                                   NULL, "no TCP item in"
2266                                                   " pattern");
2267                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
2268                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
2269                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
2270                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
2271                         return rte_flow_error_set(error, EINVAL,
2272                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2273                                                   NULL,
2274                                                   "cannot decrease and increase"
2275                                                   " TCP sequence number"
2276                                                   " at the same time");
2277         }
2278         return ret;
2279 }
2280
2281 /**
2282  * Validate the modify-header actions of increment/decrement
2283  * TCP Acknowledgment number.
2284  *
2285  * @param[in] action_flags
2286  *   Holds the actions detected until now.
2287  * @param[in] action
2288  *   Pointer to the modify action.
2289  * @param[in] item_flags
2290  *   Holds the items detected.
2291  * @param[out] error
2292  *   Pointer to error structure.
2293  *
2294  * @return
2295  *   0 on success, a negative errno value otherwise and rte_errno is set.
2296  */
2297 static int
2298 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
2299                                        const struct rte_flow_action *action,
2300                                        const uint64_t item_flags,
2301                                        struct rte_flow_error *error)
2302 {
2303         int ret = 0;
2304
2305         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2306         if (!ret) {
2307                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
2308                         return rte_flow_error_set(error, EINVAL,
2309                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2310                                                   NULL, "no TCP item in"
2311                                                   " pattern");
2312                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
2313                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
2314                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
2315                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
2316                         return rte_flow_error_set(error, EINVAL,
2317                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2318                                                   NULL,
2319                                                   "cannot decrease and increase"
2320                                                   " TCP acknowledgment number"
2321                                                   " at the same time");
2322         }
2323         return ret;
2324 }
2325
2326 /**
2327  * Validate the modify-header TTL actions.
2328  *
2329  * @param[in] action_flags
2330  *   Holds the actions detected until now.
2331  * @param[in] action
2332  *   Pointer to the modify action.
2333  * @param[in] item_flags
2334  *   Holds the items detected.
2335  * @param[out] error
2336  *   Pointer to error structure.
2337  *
2338  * @return
2339  *   0 on success, a negative errno value otherwise and rte_errno is set.
2340  */
2341 static int
2342 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
2343                                    const struct rte_flow_action *action,
2344                                    const uint64_t item_flags,
2345                                    struct rte_flow_error *error)
2346 {
2347         int ret = 0;
2348
2349         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2350         if (!ret) {
2351                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
2352                         return rte_flow_error_set(error, EINVAL,
2353                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2354                                                   NULL,
2355                                                   "no IP protocol in pattern");
2356         }
2357         return ret;
2358 }
2359
2360 /**
2361  * Validate jump action.
2362  *
2363  * @param[in] action
2364  *   Pointer to the jump action.
2365  * @param[in] action_flags
2366  *   Holds the actions detected until now.
2367  * @param[in] attributes
2368  *   Pointer to flow attributes
2369  * @param[in] external
2370  *   Action belongs to flow rule created by request external to PMD.
2371  * @param[out] error
2372  *   Pointer to error structure.
2373  *
2374  * @return
2375  *   0 on success, a negative errno value otherwise and rte_errno is set.
2376  */
2377 static int
2378 flow_dv_validate_action_jump(const struct rte_flow_action *action,
2379                              uint64_t action_flags,
2380                              const struct rte_flow_attr *attributes,
2381                              bool external, struct rte_flow_error *error)
2382 {
2383         uint32_t max_group = attributes->transfer ? MLX5_MAX_TABLES_FDB :
2384                                                     MLX5_MAX_TABLES;
2385         uint32_t target_group, table;
2386         int ret = 0;
2387
2388         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
2389                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
2390                 return rte_flow_error_set(error, EINVAL,
2391                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2392                                           "can't have 2 fate actions in"
2393                                           " same flow");
2394         if (!action->conf)
2395                 return rte_flow_error_set(error, EINVAL,
2396                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2397                                           NULL, "action configuration not set");
2398         target_group =
2399                 ((const struct rte_flow_action_jump *)action->conf)->group;
2400         ret = mlx5_flow_group_to_table(attributes, external, target_group,
2401                                        &table, error);
2402         if (ret)
2403                 return ret;
2404         if (table >= max_group)
2405                 return rte_flow_error_set(error, EINVAL,
2406                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
2407                                           "target group index out of range");
2408         if (attributes->group >= target_group)
2409                 return rte_flow_error_set(error, EINVAL,
2410                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2411                                           "target group must be higher than"
2412                                           " the current flow group");
2413         return 0;
2414 }
2415
2416 /*
2417  * Validate the port_id action.
2418  *
2419  * @param[in] dev
2420  *   Pointer to rte_eth_dev structure.
2421  * @param[in] action_flags
2422  *   Bit-fields that holds the actions detected until now.
2423  * @param[in] action
2424  *   Port_id RTE action structure.
2425  * @param[in] attr
2426  *   Attributes of flow that includes this action.
2427  * @param[out] error
2428  *   Pointer to error structure.
2429  *
2430  * @return
2431  *   0 on success, a negative errno value otherwise and rte_errno is set.
2432  */
2433 static int
2434 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
2435                                 uint64_t action_flags,
2436                                 const struct rte_flow_action *action,
2437                                 const struct rte_flow_attr *attr,
2438                                 struct rte_flow_error *error)
2439 {
2440         const struct rte_flow_action_port_id *port_id;
2441         struct mlx5_priv *act_priv;
2442         struct mlx5_priv *dev_priv;
2443         uint16_t port;
2444
2445         if (!attr->transfer)
2446                 return rte_flow_error_set(error, ENOTSUP,
2447                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2448                                           NULL,
2449                                           "port id action is valid in transfer"
2450                                           " mode only");
2451         if (!action || !action->conf)
2452                 return rte_flow_error_set(error, ENOTSUP,
2453                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2454                                           NULL,
2455                                           "port id action parameters must be"
2456                                           " specified");
2457         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
2458                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
2459                 return rte_flow_error_set(error, EINVAL,
2460                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2461                                           "can have only one fate actions in"
2462                                           " a flow");
2463         dev_priv = mlx5_dev_to_eswitch_info(dev);
2464         if (!dev_priv)
2465                 return rte_flow_error_set(error, rte_errno,
2466                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2467                                           NULL,
2468                                           "failed to obtain E-Switch info");
2469         port_id = action->conf;
2470         port = port_id->original ? dev->data->port_id : port_id->id;
2471         act_priv = mlx5_port_to_eswitch_info(port);
2472         if (!act_priv)
2473                 return rte_flow_error_set
2474                                 (error, rte_errno,
2475                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
2476                                  "failed to obtain E-Switch port id for port");
2477         if (act_priv->domain_id != dev_priv->domain_id)
2478                 return rte_flow_error_set
2479                                 (error, EINVAL,
2480                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2481                                  "port does not belong to"
2482                                  " E-Switch being configured");
2483         return 0;
2484 }
2485
2486 /**
2487  * Find existing modify-header resource or create and register a new one.
2488  *
2489  * @param dev[in, out]
2490  *   Pointer to rte_eth_dev structure.
2491  * @param[in, out] resource
2492  *   Pointer to modify-header resource.
2493  * @parm[in, out] dev_flow
2494  *   Pointer to the dev_flow.
2495  * @param[out] error
2496  *   pointer to error structure.
2497  *
2498  * @return
2499  *   0 on success otherwise -errno and errno is set.
2500  */
2501 static int
2502 flow_dv_modify_hdr_resource_register
2503                         (struct rte_eth_dev *dev,
2504                          struct mlx5_flow_dv_modify_hdr_resource *resource,
2505                          struct mlx5_flow *dev_flow,
2506                          struct rte_flow_error *error)
2507 {
2508         struct mlx5_priv *priv = dev->data->dev_private;
2509         struct mlx5_ibv_shared *sh = priv->sh;
2510         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
2511         struct mlx5dv_dr_domain *ns;
2512
2513         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2514                 ns = sh->fdb_domain;
2515         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
2516                 ns = sh->tx_domain;
2517         else
2518                 ns = sh->rx_domain;
2519         resource->flags =
2520                 dev_flow->flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
2521         /* Lookup a matching resource from cache. */
2522         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
2523                 if (resource->ft_type == cache_resource->ft_type &&
2524                     resource->actions_num == cache_resource->actions_num &&
2525                     resource->flags == cache_resource->flags &&
2526                     !memcmp((const void *)resource->actions,
2527                             (const void *)cache_resource->actions,
2528                             (resource->actions_num *
2529                                             sizeof(resource->actions[0])))) {
2530                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
2531                                 (void *)cache_resource,
2532                                 rte_atomic32_read(&cache_resource->refcnt));
2533                         rte_atomic32_inc(&cache_resource->refcnt);
2534                         dev_flow->dv.modify_hdr = cache_resource;
2535                         return 0;
2536                 }
2537         }
2538         /* Register new modify-header resource. */
2539         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2540         if (!cache_resource)
2541                 return rte_flow_error_set(error, ENOMEM,
2542                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2543                                           "cannot allocate resource memory");
2544         *cache_resource = *resource;
2545         cache_resource->verbs_action =
2546                 mlx5_glue->dv_create_flow_action_modify_header
2547                                         (sh->ctx, cache_resource->ft_type,
2548                                          ns, cache_resource->flags,
2549                                          cache_resource->actions_num *
2550                                          sizeof(cache_resource->actions[0]),
2551                                          (uint64_t *)cache_resource->actions);
2552         if (!cache_resource->verbs_action) {
2553                 rte_free(cache_resource);
2554                 return rte_flow_error_set(error, ENOMEM,
2555                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2556                                           NULL, "cannot create action");
2557         }
2558         rte_atomic32_init(&cache_resource->refcnt);
2559         rte_atomic32_inc(&cache_resource->refcnt);
2560         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
2561         dev_flow->dv.modify_hdr = cache_resource;
2562         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
2563                 (void *)cache_resource,
2564                 rte_atomic32_read(&cache_resource->refcnt));
2565         return 0;
2566 }
2567
2568 #define MLX5_CNT_CONTAINER_RESIZE 64
2569
2570 /**
2571  * Get or create a flow counter.
2572  *
2573  * @param[in] dev
2574  *   Pointer to the Ethernet device structure.
2575  * @param[in] shared
2576  *   Indicate if this counter is shared with other flows.
2577  * @param[in] id
2578  *   Counter identifier.
2579  *
2580  * @return
2581  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
2582  */
2583 static struct mlx5_flow_counter *
2584 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
2585                                uint32_t id)
2586 {
2587         struct mlx5_priv *priv = dev->data->dev_private;
2588         struct mlx5_flow_counter *cnt = NULL;
2589         struct mlx5_devx_obj *dcs = NULL;
2590
2591         if (!priv->config.devx) {
2592                 rte_errno = ENOTSUP;
2593                 return NULL;
2594         }
2595         if (shared) {
2596                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
2597                         if (cnt->shared && cnt->id == id) {
2598                                 cnt->ref_cnt++;
2599                                 return cnt;
2600                         }
2601                 }
2602         }
2603         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
2604         if (!dcs)
2605                 return NULL;
2606         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
2607         if (!cnt) {
2608                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
2609                 rte_errno = ENOMEM;
2610                 return NULL;
2611         }
2612         struct mlx5_flow_counter tmpl = {
2613                 .shared = shared,
2614                 .ref_cnt = 1,
2615                 .id = id,
2616                 .dcs = dcs,
2617         };
2618         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
2619         if (!tmpl.action) {
2620                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
2621                 rte_errno = errno;
2622                 rte_free(cnt);
2623                 return NULL;
2624         }
2625         *cnt = tmpl;
2626         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
2627         return cnt;
2628 }
2629
2630 /**
2631  * Release a flow counter.
2632  *
2633  * @param[in] dev
2634  *   Pointer to the Ethernet device structure.
2635  * @param[in] counter
2636  *   Pointer to the counter handler.
2637  */
2638 static void
2639 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
2640                                  struct mlx5_flow_counter *counter)
2641 {
2642         struct mlx5_priv *priv = dev->data->dev_private;
2643
2644         if (!counter)
2645                 return;
2646         if (--counter->ref_cnt == 0) {
2647                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
2648                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
2649                 rte_free(counter);
2650         }
2651 }
2652
2653 /**
2654  * Query a devx flow counter.
2655  *
2656  * @param[in] dev
2657  *   Pointer to the Ethernet device structure.
2658  * @param[in] cnt
2659  *   Pointer to the flow counter.
2660  * @param[out] pkts
2661  *   The statistics value of packets.
2662  * @param[out] bytes
2663  *   The statistics value of bytes.
2664  *
2665  * @return
2666  *   0 on success, otherwise a negative errno value and rte_errno is set.
2667  */
2668 static inline int
2669 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
2670                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
2671                      uint64_t *bytes)
2672 {
2673         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
2674                                                 0, NULL, NULL, 0);
2675 }
2676
2677 /**
2678  * Get a pool by a counter.
2679  *
2680  * @param[in] cnt
2681  *   Pointer to the counter.
2682  *
2683  * @return
2684  *   The counter pool.
2685  */
2686 static struct mlx5_flow_counter_pool *
2687 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
2688 {
2689         if (!cnt->batch) {
2690                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
2691                 return (struct mlx5_flow_counter_pool *)cnt - 1;
2692         }
2693         return cnt->pool;
2694 }
2695
2696 /**
2697  * Get a pool by devx counter ID.
2698  *
2699  * @param[in] cont
2700  *   Pointer to the counter container.
2701  * @param[in] id
2702  *   The counter devx ID.
2703  *
2704  * @return
2705  *   The counter pool pointer if exists, NULL otherwise,
2706  */
2707 static struct mlx5_flow_counter_pool *
2708 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
2709 {
2710         struct mlx5_flow_counter_pool *pool;
2711
2712         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2713                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
2714                                 MLX5_COUNTERS_PER_POOL;
2715
2716                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
2717                         return pool;
2718         };
2719         return NULL;
2720 }
2721
2722 /**
2723  * Allocate a new memory for the counter values wrapped by all the needed
2724  * management.
2725  *
2726  * @param[in] dev
2727  *   Pointer to the Ethernet device structure.
2728  * @param[in] raws_n
2729  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
2730  *
2731  * @return
2732  *   The new memory management pointer on success, otherwise NULL and rte_errno
2733  *   is set.
2734  */
2735 static struct mlx5_counter_stats_mem_mng *
2736 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
2737 {
2738         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
2739                                         (dev->data->dev_private))->sh;
2740         struct mlx5_devx_mkey_attr mkey_attr;
2741         struct mlx5_counter_stats_mem_mng *mem_mng;
2742         volatile struct flow_counter_stats *raw_data;
2743         int size = (sizeof(struct flow_counter_stats) *
2744                         MLX5_COUNTERS_PER_POOL +
2745                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
2746                         sizeof(struct mlx5_counter_stats_mem_mng);
2747         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
2748         int i;
2749
2750         if (!mem) {
2751                 rte_errno = ENOMEM;
2752                 return NULL;
2753         }
2754         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
2755         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
2756         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
2757                                                  IBV_ACCESS_LOCAL_WRITE);
2758         if (!mem_mng->umem) {
2759                 rte_errno = errno;
2760                 rte_free(mem);
2761                 return NULL;
2762         }
2763         mkey_attr.addr = (uintptr_t)mem;
2764         mkey_attr.size = size;
2765         mkey_attr.umem_id = mem_mng->umem->umem_id;
2766         mkey_attr.pd = sh->pdn;
2767         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
2768         if (!mem_mng->dm) {
2769                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
2770                 rte_errno = errno;
2771                 rte_free(mem);
2772                 return NULL;
2773         }
2774         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
2775         raw_data = (volatile struct flow_counter_stats *)mem;
2776         for (i = 0; i < raws_n; ++i) {
2777                 mem_mng->raws[i].mem_mng = mem_mng;
2778                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
2779         }
2780         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
2781         return mem_mng;
2782 }
2783
2784 /**
2785  * Resize a counter container.
2786  *
2787  * @param[in] dev
2788  *   Pointer to the Ethernet device structure.
2789  * @param[in] batch
2790  *   Whether the pool is for counter that was allocated by batch command.
2791  *
2792  * @return
2793  *   The new container pointer on success, otherwise NULL and rte_errno is set.
2794  */
2795 static struct mlx5_pools_container *
2796 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
2797 {
2798         struct mlx5_priv *priv = dev->data->dev_private;
2799         struct mlx5_pools_container *cont =
2800                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
2801         struct mlx5_pools_container *new_cont =
2802                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
2803         struct mlx5_counter_stats_mem_mng *mem_mng;
2804         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
2805         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
2806         int i;
2807
2808         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
2809                 /* The last resize still hasn't detected by the host thread. */
2810                 rte_errno = EAGAIN;
2811                 return NULL;
2812         }
2813         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
2814         if (!new_cont->pools) {
2815                 rte_errno = ENOMEM;
2816                 return NULL;
2817         }
2818         if (cont->n)
2819                 memcpy(new_cont->pools, cont->pools, cont->n *
2820                        sizeof(struct mlx5_flow_counter_pool *));
2821         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
2822                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
2823         if (!mem_mng) {
2824                 rte_free(new_cont->pools);
2825                 return NULL;
2826         }
2827         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
2828                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
2829                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
2830                                  i, next);
2831         new_cont->n = resize;
2832         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
2833         TAILQ_INIT(&new_cont->pool_list);
2834         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
2835         new_cont->init_mem_mng = mem_mng;
2836         rte_cio_wmb();
2837          /* Flip the master container. */
2838         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
2839         return new_cont;
2840 }
2841
2842 /**
2843  * Query a devx flow counter.
2844  *
2845  * @param[in] dev
2846  *   Pointer to the Ethernet device structure.
2847  * @param[in] cnt
2848  *   Pointer to the flow counter.
2849  * @param[out] pkts
2850  *   The statistics value of packets.
2851  * @param[out] bytes
2852  *   The statistics value of bytes.
2853  *
2854  * @return
2855  *   0 on success, otherwise a negative errno value and rte_errno is set.
2856  */
2857 static inline int
2858 _flow_dv_query_count(struct rte_eth_dev *dev,
2859                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
2860                      uint64_t *bytes)
2861 {
2862         struct mlx5_priv *priv = dev->data->dev_private;
2863         struct mlx5_flow_counter_pool *pool =
2864                         flow_dv_counter_pool_get(cnt);
2865         int offset = cnt - &pool->counters_raw[0];
2866
2867         if (priv->counter_fallback)
2868                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
2869
2870         rte_spinlock_lock(&pool->sl);
2871         /*
2872          * The single counters allocation may allocate smaller ID than the
2873          * current allocated in parallel to the host reading.
2874          * In this case the new counter values must be reported as 0.
2875          */
2876         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
2877                 *pkts = 0;
2878                 *bytes = 0;
2879         } else {
2880                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
2881                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
2882         }
2883         rte_spinlock_unlock(&pool->sl);
2884         return 0;
2885 }
2886
2887 /**
2888  * Create and initialize a new counter pool.
2889  *
2890  * @param[in] dev
2891  *   Pointer to the Ethernet device structure.
2892  * @param[out] dcs
2893  *   The devX counter handle.
2894  * @param[in] batch
2895  *   Whether the pool is for counter that was allocated by batch command.
2896  *
2897  * @return
2898  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
2899  */
2900 static struct mlx5_flow_counter_pool *
2901 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
2902                     uint32_t batch)
2903 {
2904         struct mlx5_priv *priv = dev->data->dev_private;
2905         struct mlx5_flow_counter_pool *pool;
2906         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
2907                                                                0);
2908         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
2909         uint32_t size;
2910
2911         if (cont->n == n_valid) {
2912                 cont = flow_dv_container_resize(dev, batch);
2913                 if (!cont)
2914                         return NULL;
2915         }
2916         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
2917                         sizeof(struct mlx5_flow_counter);
2918         pool = rte_calloc(__func__, 1, size, 0);
2919         if (!pool) {
2920                 rte_errno = ENOMEM;
2921                 return NULL;
2922         }
2923         pool->min_dcs = dcs;
2924         pool->raw = cont->init_mem_mng->raws + n_valid %
2925                                                      MLX5_CNT_CONTAINER_RESIZE;
2926         pool->raw_hw = NULL;
2927         rte_spinlock_init(&pool->sl);
2928         /*
2929          * The generation of the new allocated counters in this pool is 0, 2 in
2930          * the pool generation makes all the counters valid for allocation.
2931          */
2932         rte_atomic64_set(&pool->query_gen, 0x2);
2933         TAILQ_INIT(&pool->counters);
2934         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
2935         cont->pools[n_valid] = pool;
2936         /* Pool initialization must be updated before host thread access. */
2937         rte_cio_wmb();
2938         rte_atomic16_add(&cont->n_valid, 1);
2939         return pool;
2940 }
2941
2942 /**
2943  * Prepare a new counter and/or a new counter pool.
2944  *
2945  * @param[in] dev
2946  *   Pointer to the Ethernet device structure.
2947  * @param[out] cnt_free
2948  *   Where to put the pointer of a new counter.
2949  * @param[in] batch
2950  *   Whether the pool is for counter that was allocated by batch command.
2951  *
2952  * @return
2953  *   The free counter pool pointer and @p cnt_free is set on success,
2954  *   NULL otherwise and rte_errno is set.
2955  */
2956 static struct mlx5_flow_counter_pool *
2957 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
2958                              struct mlx5_flow_counter **cnt_free,
2959                              uint32_t batch)
2960 {
2961         struct mlx5_priv *priv = dev->data->dev_private;
2962         struct mlx5_flow_counter_pool *pool;
2963         struct mlx5_devx_obj *dcs = NULL;
2964         struct mlx5_flow_counter *cnt;
2965         uint32_t i;
2966
2967         if (!batch) {
2968                 /* bulk_bitmap must be 0 for single counter allocation. */
2969                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
2970                 if (!dcs)
2971                         return NULL;
2972                 pool = flow_dv_find_pool_by_id
2973                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
2974                 if (!pool) {
2975                         pool = flow_dv_pool_create(dev, dcs, batch);
2976                         if (!pool) {
2977                                 mlx5_devx_cmd_destroy(dcs);
2978                                 return NULL;
2979                         }
2980                 } else if (dcs->id < pool->min_dcs->id) {
2981                         rte_atomic64_set(&pool->a64_dcs,
2982                                          (int64_t)(uintptr_t)dcs);
2983                 }
2984                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
2985                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
2986                 cnt->dcs = dcs;
2987                 *cnt_free = cnt;
2988                 return pool;
2989         }
2990         /* bulk_bitmap is in 128 counters units. */
2991         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
2992                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
2993         if (!dcs) {
2994                 rte_errno = ENODATA;
2995                 return NULL;
2996         }
2997         pool = flow_dv_pool_create(dev, dcs, batch);
2998         if (!pool) {
2999                 mlx5_devx_cmd_destroy(dcs);
3000                 return NULL;
3001         }
3002         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3003                 cnt = &pool->counters_raw[i];
3004                 cnt->pool = pool;
3005                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3006         }
3007         *cnt_free = &pool->counters_raw[0];
3008         return pool;
3009 }
3010
3011 /**
3012  * Search for existed shared counter.
3013  *
3014  * @param[in] cont
3015  *   Pointer to the relevant counter pool container.
3016  * @param[in] id
3017  *   The shared counter ID to search.
3018  *
3019  * @return
3020  *   NULL if not existed, otherwise pointer to the shared counter.
3021  */
3022 static struct mlx5_flow_counter *
3023 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
3024                               uint32_t id)
3025 {
3026         static struct mlx5_flow_counter *cnt;
3027         struct mlx5_flow_counter_pool *pool;
3028         int i;
3029
3030         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3031                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3032                         cnt = &pool->counters_raw[i];
3033                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
3034                                 return cnt;
3035                 }
3036         }
3037         return NULL;
3038 }
3039
3040 /**
3041  * Allocate a flow counter.
3042  *
3043  * @param[in] dev
3044  *   Pointer to the Ethernet device structure.
3045  * @param[in] shared
3046  *   Indicate if this counter is shared with other flows.
3047  * @param[in] id
3048  *   Counter identifier.
3049  * @param[in] group
3050  *   Counter flow group.
3051  *
3052  * @return
3053  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3054  */
3055 static struct mlx5_flow_counter *
3056 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
3057                       uint16_t group)
3058 {
3059         struct mlx5_priv *priv = dev->data->dev_private;
3060         struct mlx5_flow_counter_pool *pool = NULL;
3061         struct mlx5_flow_counter *cnt_free = NULL;
3062         /*
3063          * Currently group 0 flow counter cannot be assigned to a flow if it is
3064          * not the first one in the batch counter allocation, so it is better
3065          * to allocate counters one by one for these flows in a separate
3066          * container.
3067          * A counter can be shared between different groups so need to take
3068          * shared counters from the single container.
3069          */
3070         uint32_t batch = (group && !shared) ? 1 : 0;
3071         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
3072                                                                0);
3073
3074         if (priv->counter_fallback)
3075                 return flow_dv_counter_alloc_fallback(dev, shared, id);
3076         if (!priv->config.devx) {
3077                 rte_errno = ENOTSUP;
3078                 return NULL;
3079         }
3080         if (shared) {
3081                 cnt_free = flow_dv_counter_shared_search(cont, id);
3082                 if (cnt_free) {
3083                         if (cnt_free->ref_cnt + 1 == 0) {
3084                                 rte_errno = E2BIG;
3085                                 return NULL;
3086                         }
3087                         cnt_free->ref_cnt++;
3088                         return cnt_free;
3089                 }
3090         }
3091         /* Pools which has a free counters are in the start. */
3092         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3093                 /*
3094                  * The free counter reset values must be updated between the
3095                  * counter release to the counter allocation, so, at least one
3096                  * query must be done in this time. ensure it by saving the
3097                  * query generation in the release time.
3098                  * The free list is sorted according to the generation - so if
3099                  * the first one is not updated, all the others are not
3100                  * updated too.
3101                  */
3102                 cnt_free = TAILQ_FIRST(&pool->counters);
3103                 if (cnt_free && cnt_free->query_gen + 1 <
3104                     rte_atomic64_read(&pool->query_gen))
3105                         break;
3106                 cnt_free = NULL;
3107         }
3108         if (!cnt_free) {
3109                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
3110                 if (!pool)
3111                         return NULL;
3112         }
3113         cnt_free->batch = batch;
3114         /* Create a DV counter action only in the first time usage. */
3115         if (!cnt_free->action) {
3116                 uint16_t offset;
3117                 struct mlx5_devx_obj *dcs;
3118
3119                 if (batch) {
3120                         offset = cnt_free - &pool->counters_raw[0];
3121                         dcs = pool->min_dcs;
3122                 } else {
3123                         offset = 0;
3124                         dcs = cnt_free->dcs;
3125                 }
3126                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
3127                                         (dcs->obj, offset);
3128                 if (!cnt_free->action) {
3129                         rte_errno = errno;
3130                         return NULL;
3131                 }
3132         }
3133         /* Update the counter reset values. */
3134         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
3135                                  &cnt_free->bytes))
3136                 return NULL;
3137         cnt_free->shared = shared;
3138         cnt_free->ref_cnt = 1;
3139         cnt_free->id = id;
3140         if (!priv->sh->cmng.query_thread_on)
3141                 /* Start the asynchronous batch query by the host thread. */
3142                 mlx5_set_query_alarm(priv->sh);
3143         TAILQ_REMOVE(&pool->counters, cnt_free, next);
3144         if (TAILQ_EMPTY(&pool->counters)) {
3145                 /* Move the pool to the end of the container pool list. */
3146                 TAILQ_REMOVE(&cont->pool_list, pool, next);
3147                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
3148         }
3149         return cnt_free;
3150 }
3151
3152 /**
3153  * Release a flow counter.
3154  *
3155  * @param[in] dev
3156  *   Pointer to the Ethernet device structure.
3157  * @param[in] counter
3158  *   Pointer to the counter handler.
3159  */
3160 static void
3161 flow_dv_counter_release(struct rte_eth_dev *dev,
3162                         struct mlx5_flow_counter *counter)
3163 {
3164         struct mlx5_priv *priv = dev->data->dev_private;
3165
3166         if (!counter)
3167                 return;
3168         if (priv->counter_fallback) {
3169                 flow_dv_counter_release_fallback(dev, counter);
3170                 return;
3171         }
3172         if (--counter->ref_cnt == 0) {
3173                 struct mlx5_flow_counter_pool *pool =
3174                                 flow_dv_counter_pool_get(counter);
3175
3176                 /* Put the counter in the end - the last updated one. */
3177                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
3178                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
3179         }
3180 }
3181
3182 /**
3183  * Verify the @p attributes will be correctly understood by the NIC and store
3184  * them in the @p flow if everything is correct.
3185  *
3186  * @param[in] dev
3187  *   Pointer to dev struct.
3188  * @param[in] attributes
3189  *   Pointer to flow attributes
3190  * @param[in] external
3191  *   This flow rule is created by request external to PMD.
3192  * @param[out] error
3193  *   Pointer to error structure.
3194  *
3195  * @return
3196  *   0 on success, a negative errno value otherwise and rte_errno is set.
3197  */
3198 static int
3199 flow_dv_validate_attributes(struct rte_eth_dev *dev,
3200                             const struct rte_flow_attr *attributes,
3201                             bool external __rte_unused,
3202                             struct rte_flow_error *error)
3203 {
3204         struct mlx5_priv *priv = dev->data->dev_private;
3205         uint32_t priority_max = priv->config.flow_prio - 1;
3206
3207 #ifndef HAVE_MLX5DV_DR
3208         if (attributes->group)
3209                 return rte_flow_error_set(error, ENOTSUP,
3210                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
3211                                           NULL,
3212                                           "groups are not supported");
3213 #else
3214         uint32_t max_group = attributes->transfer ? MLX5_MAX_TABLES_FDB :
3215                                                     MLX5_MAX_TABLES;
3216         uint32_t table;
3217         int ret;
3218
3219         ret = mlx5_flow_group_to_table(attributes, external,
3220                                        attributes->group,
3221                                        &table, error);
3222         if (ret)
3223                 return ret;
3224         if (table >= max_group)
3225                 return rte_flow_error_set(error, EINVAL,
3226                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
3227                                           "group index out of range");
3228 #endif
3229         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
3230             attributes->priority >= priority_max)
3231                 return rte_flow_error_set(error, ENOTSUP,
3232                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
3233                                           NULL,
3234                                           "priority out of range");
3235         if (attributes->transfer) {
3236                 if (!priv->config.dv_esw_en)
3237                         return rte_flow_error_set
3238                                 (error, ENOTSUP,
3239                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3240                                  "E-Switch dr is not supported");
3241                 if (!(priv->representor || priv->master))
3242                         return rte_flow_error_set
3243                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3244                                  NULL, "E-Switch configuration can only be"
3245                                  " done by a master or a representor device");
3246                 if (attributes->egress)
3247                         return rte_flow_error_set
3248                                 (error, ENOTSUP,
3249                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
3250                                  "egress is not supported");
3251         }
3252         if (!(attributes->egress ^ attributes->ingress))
3253                 return rte_flow_error_set(error, ENOTSUP,
3254                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
3255                                           "must specify exactly one of "
3256                                           "ingress or egress");
3257         return 0;
3258 }
3259
3260 /**
3261  * Internal validation function. For validating both actions and items.
3262  *
3263  * @param[in] dev
3264  *   Pointer to the rte_eth_dev structure.
3265  * @param[in] attr
3266  *   Pointer to the flow attributes.
3267  * @param[in] items
3268  *   Pointer to the list of items.
3269  * @param[in] actions
3270  *   Pointer to the list of actions.
3271  * @param[in] external
3272  *   This flow rule is created by request external to PMD.
3273  * @param[out] error
3274  *   Pointer to the error structure.
3275  *
3276  * @return
3277  *   0 on success, a negative errno value otherwise and rte_errno is set.
3278  */
3279 static int
3280 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
3281                  const struct rte_flow_item items[],
3282                  const struct rte_flow_action actions[],
3283                  bool external, struct rte_flow_error *error)
3284 {
3285         int ret;
3286         uint64_t action_flags = 0;
3287         uint64_t item_flags = 0;
3288         uint64_t last_item = 0;
3289         uint8_t next_protocol = 0xff;
3290         int actions_n = 0;
3291         const struct rte_flow_item *gre_item = NULL;
3292         struct rte_flow_item_tcp nic_tcp_mask = {
3293                 .hdr = {
3294                         .tcp_flags = 0xFF,
3295                         .src_port = RTE_BE16(UINT16_MAX),
3296                         .dst_port = RTE_BE16(UINT16_MAX),
3297                 }
3298         };
3299
3300         if (items == NULL)
3301                 return -1;
3302         ret = flow_dv_validate_attributes(dev, attr, external, error);
3303         if (ret < 0)
3304                 return ret;
3305         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3306                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
3307                 switch (items->type) {
3308                 case RTE_FLOW_ITEM_TYPE_VOID:
3309                         break;
3310                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
3311                         ret = flow_dv_validate_item_port_id
3312                                         (dev, items, attr, item_flags, error);
3313                         if (ret < 0)
3314                                 return ret;
3315                         last_item = MLX5_FLOW_ITEM_PORT_ID;
3316                         break;
3317                 case RTE_FLOW_ITEM_TYPE_ETH:
3318                         ret = mlx5_flow_validate_item_eth(items, item_flags,
3319                                                           error);
3320                         if (ret < 0)
3321                                 return ret;
3322                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
3323                                              MLX5_FLOW_LAYER_OUTER_L2;
3324                         break;
3325                 case RTE_FLOW_ITEM_TYPE_VLAN:
3326                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
3327                                                            dev, error);
3328                         if (ret < 0)
3329                                 return ret;
3330                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
3331                                              MLX5_FLOW_LAYER_OUTER_VLAN;
3332                         break;
3333                 case RTE_FLOW_ITEM_TYPE_IPV4:
3334                         mlx5_flow_tunnel_ip_check(items, next_protocol,
3335                                                   &item_flags, &tunnel);
3336                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
3337                                                            NULL, error);
3338                         if (ret < 0)
3339                                 return ret;
3340                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3341                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3342                         if (items->mask != NULL &&
3343                             ((const struct rte_flow_item_ipv4 *)
3344                              items->mask)->hdr.next_proto_id) {
3345                                 next_protocol =
3346                                         ((const struct rte_flow_item_ipv4 *)
3347                                          (items->spec))->hdr.next_proto_id;
3348                                 next_protocol &=
3349                                         ((const struct rte_flow_item_ipv4 *)
3350                                          (items->mask))->hdr.next_proto_id;
3351                         } else {
3352                                 /* Reset for inner layer. */
3353                                 next_protocol = 0xff;
3354                         }
3355                         break;
3356                 case RTE_FLOW_ITEM_TYPE_IPV6:
3357                         mlx5_flow_tunnel_ip_check(items, next_protocol,
3358                                                   &item_flags, &tunnel);
3359                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
3360                                                            NULL, error);
3361                         if (ret < 0)
3362                                 return ret;
3363                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3364                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3365                         if (items->mask != NULL &&
3366                             ((const struct rte_flow_item_ipv6 *)
3367                              items->mask)->hdr.proto) {
3368                                 next_protocol =
3369                                         ((const struct rte_flow_item_ipv6 *)
3370                                          items->spec)->hdr.proto;
3371                                 next_protocol &=
3372                                         ((const struct rte_flow_item_ipv6 *)
3373                                          items->mask)->hdr.proto;
3374                         } else {
3375                                 /* Reset for inner layer. */
3376                                 next_protocol = 0xff;
3377                         }
3378                         break;
3379                 case RTE_FLOW_ITEM_TYPE_TCP:
3380                         ret = mlx5_flow_validate_item_tcp
3381                                                 (items, item_flags,
3382                                                  next_protocol,
3383                                                  &nic_tcp_mask,
3384                                                  error);
3385                         if (ret < 0)
3386                                 return ret;
3387                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
3388                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
3389                         break;
3390                 case RTE_FLOW_ITEM_TYPE_UDP:
3391                         ret = mlx5_flow_validate_item_udp(items, item_flags,
3392                                                           next_protocol,
3393                                                           error);
3394                         if (ret < 0)
3395                                 return ret;
3396                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
3397                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
3398                         break;
3399                 case RTE_FLOW_ITEM_TYPE_GRE:
3400                         ret = mlx5_flow_validate_item_gre(items, item_flags,
3401                                                           next_protocol, error);
3402                         if (ret < 0)
3403                                 return ret;
3404                         gre_item = items;
3405                         last_item = MLX5_FLOW_LAYER_GRE;
3406                         break;
3407                 case RTE_FLOW_ITEM_TYPE_NVGRE:
3408                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
3409                                                             next_protocol,
3410                                                             error);
3411                         if (ret < 0)
3412                                 return ret;
3413                         last_item = MLX5_FLOW_LAYER_NVGRE;
3414                         break;
3415                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
3416                         ret = mlx5_flow_validate_item_gre_key
3417                                 (items, item_flags, gre_item, error);
3418                         if (ret < 0)
3419                                 return ret;
3420                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
3421                         break;
3422                 case RTE_FLOW_ITEM_TYPE_VXLAN:
3423                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
3424                                                             error);
3425                         if (ret < 0)
3426                                 return ret;
3427                         last_item = MLX5_FLOW_LAYER_VXLAN;
3428                         break;
3429                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3430                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
3431                                                                 item_flags, dev,
3432                                                                 error);
3433                         if (ret < 0)
3434                                 return ret;
3435                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
3436                         break;
3437                 case RTE_FLOW_ITEM_TYPE_MPLS:
3438                         ret = mlx5_flow_validate_item_mpls(dev, items,
3439                                                            item_flags,
3440                                                            last_item, error);
3441                         if (ret < 0)
3442                                 return ret;
3443                         last_item = MLX5_FLOW_LAYER_MPLS;
3444                         break;
3445                 case RTE_FLOW_ITEM_TYPE_META:
3446                         ret = flow_dv_validate_item_meta(dev, items, attr,
3447                                                          error);
3448                         if (ret < 0)
3449                                 return ret;
3450                         last_item = MLX5_FLOW_ITEM_METADATA;
3451                         break;
3452                 case RTE_FLOW_ITEM_TYPE_ICMP:
3453                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
3454                                                            next_protocol,
3455                                                            error);
3456                         if (ret < 0)
3457                                 return ret;
3458                         last_item = MLX5_FLOW_LAYER_ICMP;
3459                         break;
3460                 case RTE_FLOW_ITEM_TYPE_ICMP6:
3461                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
3462                                                             next_protocol,
3463                                                             error);
3464                         if (ret < 0)
3465                                 return ret;
3466                         last_item = MLX5_FLOW_LAYER_ICMP6;
3467                         break;
3468                 default:
3469                         return rte_flow_error_set(error, ENOTSUP,
3470                                                   RTE_FLOW_ERROR_TYPE_ITEM,
3471                                                   NULL, "item not supported");
3472                 }
3473                 item_flags |= last_item;
3474         }
3475         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3476                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
3477                         return rte_flow_error_set(error, ENOTSUP,
3478                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3479                                                   actions, "too many actions");
3480                 switch (actions->type) {
3481                 case RTE_FLOW_ACTION_TYPE_VOID:
3482                         break;
3483                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
3484                         ret = flow_dv_validate_action_port_id(dev,
3485                                                               action_flags,
3486                                                               actions,
3487                                                               attr,
3488                                                               error);
3489                         if (ret)
3490                                 return ret;
3491                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
3492                         ++actions_n;
3493                         break;
3494                 case RTE_FLOW_ACTION_TYPE_FLAG:
3495                         ret = mlx5_flow_validate_action_flag(action_flags,
3496                                                              attr, error);
3497                         if (ret < 0)
3498                                 return ret;
3499                         action_flags |= MLX5_FLOW_ACTION_FLAG;
3500                         ++actions_n;
3501                         break;
3502                 case RTE_FLOW_ACTION_TYPE_MARK:
3503                         ret = mlx5_flow_validate_action_mark(actions,
3504                                                              action_flags,
3505                                                              attr, error);
3506                         if (ret < 0)
3507                                 return ret;
3508                         action_flags |= MLX5_FLOW_ACTION_MARK;
3509                         ++actions_n;
3510                         break;
3511                 case RTE_FLOW_ACTION_TYPE_DROP:
3512                         ret = mlx5_flow_validate_action_drop(action_flags,
3513                                                              attr, error);
3514                         if (ret < 0)
3515                                 return ret;
3516                         action_flags |= MLX5_FLOW_ACTION_DROP;
3517                         ++actions_n;
3518                         break;
3519                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3520                         ret = mlx5_flow_validate_action_queue(actions,
3521                                                               action_flags, dev,
3522                                                               attr, error);
3523                         if (ret < 0)
3524                                 return ret;
3525                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
3526                         ++actions_n;
3527                         break;
3528                 case RTE_FLOW_ACTION_TYPE_RSS:
3529                         ret = mlx5_flow_validate_action_rss(actions,
3530                                                             action_flags, dev,
3531                                                             attr, item_flags,
3532                                                             error);
3533                         if (ret < 0)
3534                                 return ret;
3535                         action_flags |= MLX5_FLOW_ACTION_RSS;
3536                         ++actions_n;
3537                         break;
3538                 case RTE_FLOW_ACTION_TYPE_COUNT:
3539                         ret = flow_dv_validate_action_count(dev, error);
3540                         if (ret < 0)
3541                                 return ret;
3542                         action_flags |= MLX5_FLOW_ACTION_COUNT;
3543                         ++actions_n;
3544                         break;
3545                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3546                         if (flow_dv_validate_action_pop_vlan(dev,
3547                                                              action_flags,
3548                                                              actions,
3549                                                              item_flags, attr,
3550                                                              error))
3551                                 return -rte_errno;
3552                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
3553                         ++actions_n;
3554                         break;
3555                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3556                         ret = flow_dv_validate_action_push_vlan(action_flags,
3557                                                                 actions, attr,
3558                                                                 error);
3559                         if (ret < 0)
3560                                 return ret;
3561                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
3562                         ++actions_n;
3563                         break;
3564                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3565                         ret = flow_dv_validate_action_set_vlan_pcp
3566                                                 (action_flags, actions, error);
3567                         if (ret < 0)
3568                                 return ret;
3569                         /* Count PCP with push_vlan command. */
3570                         break;
3571                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3572                         ret = flow_dv_validate_action_set_vlan_vid
3573                                                 (item_flags, actions, error);
3574                         if (ret < 0)
3575                                 return ret;
3576                         /* Count VID with push_vlan command. */
3577                         break;
3578                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3579                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3580                         ret = flow_dv_validate_action_l2_encap(action_flags,
3581                                                                actions, attr,
3582                                                                error);
3583                         if (ret < 0)
3584                                 return ret;
3585                         action_flags |= actions->type ==
3586                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
3587                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
3588                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
3589                         ++actions_n;
3590                         break;
3591                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3592                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3593                         ret = flow_dv_validate_action_l2_decap(action_flags,
3594                                                                attr, error);
3595                         if (ret < 0)
3596                                 return ret;
3597                         action_flags |= actions->type ==
3598                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
3599                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
3600                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
3601                         ++actions_n;
3602                         break;
3603                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3604                         ret = flow_dv_validate_action_raw_encap(action_flags,
3605                                                                 actions, attr,
3606                                                                 error);
3607                         if (ret < 0)
3608                                 return ret;
3609                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
3610                         ++actions_n;
3611                         break;
3612                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3613                         ret = flow_dv_validate_action_raw_decap(action_flags,
3614                                                                 actions, attr,
3615                                                                 error);
3616                         if (ret < 0)
3617                                 return ret;
3618                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
3619                         ++actions_n;
3620                         break;
3621                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3622                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3623                         ret = flow_dv_validate_action_modify_mac(action_flags,
3624                                                                  actions,
3625                                                                  item_flags,
3626                                                                  error);
3627                         if (ret < 0)
3628                                 return ret;
3629                         /* Count all modify-header actions as one action. */
3630                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3631                                 ++actions_n;
3632                         action_flags |= actions->type ==
3633                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
3634                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
3635                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
3636                         break;
3637
3638                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3639                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3640                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
3641                                                                   actions,
3642                                                                   item_flags,
3643                                                                   error);
3644                         if (ret < 0)
3645                                 return ret;
3646                         /* Count all modify-header actions as one action. */
3647                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3648                                 ++actions_n;
3649                         action_flags |= actions->type ==
3650                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
3651                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
3652                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
3653                         break;
3654                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3655                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3656                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
3657                                                                   actions,
3658                                                                   item_flags,
3659                                                                   error);
3660                         if (ret < 0)
3661                                 return ret;
3662                         /* Count all modify-header actions as one action. */
3663                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3664                                 ++actions_n;
3665                         action_flags |= actions->type ==
3666                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
3667                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
3668                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
3669                         break;
3670                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3671                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3672                         ret = flow_dv_validate_action_modify_tp(action_flags,
3673                                                                 actions,
3674                                                                 item_flags,
3675                                                                 error);
3676                         if (ret < 0)
3677                                 return ret;
3678                         /* Count all modify-header actions as one action. */
3679                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3680                                 ++actions_n;
3681                         action_flags |= actions->type ==
3682                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
3683                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
3684                                                 MLX5_FLOW_ACTION_SET_TP_DST;
3685                         break;
3686                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3687                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
3688                         ret = flow_dv_validate_action_modify_ttl(action_flags,
3689                                                                  actions,
3690                                                                  item_flags,
3691                                                                  error);
3692                         if (ret < 0)
3693                                 return ret;
3694                         /* Count all modify-header actions as one action. */
3695                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3696                                 ++actions_n;
3697                         action_flags |= actions->type ==
3698                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
3699                                                 MLX5_FLOW_ACTION_SET_TTL :
3700                                                 MLX5_FLOW_ACTION_DEC_TTL;
3701                         break;
3702                 case RTE_FLOW_ACTION_TYPE_JUMP:
3703                         ret = flow_dv_validate_action_jump(actions,
3704                                                            action_flags,
3705                                                            attr, external,
3706                                                            error);
3707                         if (ret)
3708                                 return ret;
3709                         ++actions_n;
3710                         action_flags |= MLX5_FLOW_ACTION_JUMP;
3711                         break;
3712                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3713                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3714                         ret = flow_dv_validate_action_modify_tcp_seq
3715                                                                 (action_flags,
3716                                                                  actions,
3717                                                                  item_flags,
3718                                                                  error);
3719                         if (ret < 0)
3720                                 return ret;
3721                         /* Count all modify-header actions as one action. */
3722                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3723                                 ++actions_n;
3724                         action_flags |= actions->type ==
3725                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
3726                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
3727                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
3728                         break;
3729                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3730                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3731                         ret = flow_dv_validate_action_modify_tcp_ack
3732                                                                 (action_flags,
3733                                                                  actions,
3734                                                                  item_flags,
3735                                                                  error);
3736                         if (ret < 0)
3737                                 return ret;
3738                         /* Count all modify-header actions as one action. */
3739                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3740                                 ++actions_n;
3741                         action_flags |= actions->type ==
3742                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
3743                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
3744                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
3745                         break;
3746                 default:
3747                         return rte_flow_error_set(error, ENOTSUP,
3748                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3749                                                   actions,
3750                                                   "action not supported");
3751                 }
3752         }
3753         if ((action_flags & MLX5_FLOW_LAYER_TUNNEL) &&
3754             (action_flags & MLX5_FLOW_VLAN_ACTIONS))
3755                 return rte_flow_error_set(error, ENOTSUP,
3756                                           RTE_FLOW_ERROR_TYPE_ACTION,
3757                                           actions,
3758                                           "can't have vxlan and vlan"
3759                                           " actions in the same rule");
3760         /* Eswitch has few restrictions on using items and actions */
3761         if (attr->transfer) {
3762                 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3763                         return rte_flow_error_set(error, ENOTSUP,
3764                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3765                                                   NULL,
3766                                                   "unsupported action FLAG");
3767                 if (action_flags & MLX5_FLOW_ACTION_MARK)
3768                         return rte_flow_error_set(error, ENOTSUP,
3769                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3770                                                   NULL,
3771                                                   "unsupported action MARK");
3772                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
3773                         return rte_flow_error_set(error, ENOTSUP,
3774                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3775                                                   NULL,
3776                                                   "unsupported action QUEUE");
3777                 if (action_flags & MLX5_FLOW_ACTION_RSS)
3778                         return rte_flow_error_set(error, ENOTSUP,
3779                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3780                                                   NULL,
3781                                                   "unsupported action RSS");
3782                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3783                         return rte_flow_error_set(error, EINVAL,
3784                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3785                                                   actions,
3786                                                   "no fate action is found");
3787         } else {
3788                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
3789                         return rte_flow_error_set(error, EINVAL,
3790                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3791                                                   actions,
3792                                                   "no fate action is found");
3793         }
3794         return 0;
3795 }
3796
3797 /**
3798  * Internal preparation function. Allocates the DV flow size,
3799  * this size is constant.
3800  *
3801  * @param[in] attr
3802  *   Pointer to the flow attributes.
3803  * @param[in] items
3804  *   Pointer to the list of items.
3805  * @param[in] actions
3806  *   Pointer to the list of actions.
3807  * @param[out] error
3808  *   Pointer to the error structure.
3809  *
3810  * @return
3811  *   Pointer to mlx5_flow object on success,
3812  *   otherwise NULL and rte_errno is set.
3813  */
3814 static struct mlx5_flow *
3815 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
3816                 const struct rte_flow_item items[] __rte_unused,
3817                 const struct rte_flow_action actions[] __rte_unused,
3818                 struct rte_flow_error *error)
3819 {
3820         uint32_t size = sizeof(struct mlx5_flow);
3821         struct mlx5_flow *flow;
3822
3823         flow = rte_calloc(__func__, 1, size, 0);
3824         if (!flow) {
3825                 rte_flow_error_set(error, ENOMEM,
3826                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3827                                    "not enough memory to create flow");
3828                 return NULL;
3829         }
3830         flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
3831         return flow;
3832 }
3833
3834 #ifndef NDEBUG
3835 /**
3836  * Sanity check for match mask and value. Similar to check_valid_spec() in
3837  * kernel driver. If unmasked bit is present in value, it returns failure.
3838  *
3839  * @param match_mask
3840  *   pointer to match mask buffer.
3841  * @param match_value
3842  *   pointer to match value buffer.
3843  *
3844  * @return
3845  *   0 if valid, -EINVAL otherwise.
3846  */
3847 static int
3848 flow_dv_check_valid_spec(void *match_mask, void *match_value)
3849 {
3850         uint8_t *m = match_mask;
3851         uint8_t *v = match_value;
3852         unsigned int i;
3853
3854         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
3855                 if (v[i] & ~m[i]) {
3856                         DRV_LOG(ERR,
3857                                 "match_value differs from match_criteria"
3858                                 " %p[%u] != %p[%u]",
3859                                 match_value, i, match_mask, i);
3860                         return -EINVAL;
3861                 }
3862         }
3863         return 0;
3864 }
3865 #endif
3866
3867 /**
3868  * Add Ethernet item to matcher and to the value.
3869  *
3870  * @param[in, out] matcher
3871  *   Flow matcher.
3872  * @param[in, out] key
3873  *   Flow matcher value.
3874  * @param[in] item
3875  *   Flow pattern to translate.
3876  * @param[in] inner
3877  *   Item is inner pattern.
3878  */
3879 static void
3880 flow_dv_translate_item_eth(void *matcher, void *key,
3881                            const struct rte_flow_item *item, int inner)
3882 {
3883         const struct rte_flow_item_eth *eth_m = item->mask;
3884         const struct rte_flow_item_eth *eth_v = item->spec;
3885         const struct rte_flow_item_eth nic_mask = {
3886                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3887                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3888                 .type = RTE_BE16(0xffff),
3889         };
3890         void *headers_m;
3891         void *headers_v;
3892         char *l24_v;
3893         unsigned int i;
3894
3895         if (!eth_v)
3896                 return;
3897         if (!eth_m)
3898                 eth_m = &nic_mask;
3899         if (inner) {
3900                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3901                                          inner_headers);
3902                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3903         } else {
3904                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3905                                          outer_headers);
3906                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3907         }
3908         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
3909                &eth_m->dst, sizeof(eth_m->dst));
3910         /* The value must be in the range of the mask. */
3911         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
3912         for (i = 0; i < sizeof(eth_m->dst); ++i)
3913                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
3914         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
3915                &eth_m->src, sizeof(eth_m->src));
3916         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
3917         /* The value must be in the range of the mask. */
3918         for (i = 0; i < sizeof(eth_m->dst); ++i)
3919                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
3920         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
3921                  rte_be_to_cpu_16(eth_m->type));
3922         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
3923         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
3924 }
3925
3926 /**
3927  * Add VLAN item to matcher and to the value.
3928  *
3929  * @param[in, out] dev_flow
3930  *   Flow descriptor.
3931  * @param[in, out] matcher
3932  *   Flow matcher.
3933  * @param[in, out] key
3934  *   Flow matcher value.
3935  * @param[in] item
3936  *   Flow pattern to translate.
3937  * @param[in] inner
3938  *   Item is inner pattern.
3939  */
3940 static void
3941 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
3942                             void *matcher, void *key,
3943                             const struct rte_flow_item *item,
3944                             int inner)
3945 {
3946         const struct rte_flow_item_vlan *vlan_m = item->mask;
3947         const struct rte_flow_item_vlan *vlan_v = item->spec;
3948         void *headers_m;
3949         void *headers_v;
3950         uint16_t tci_m;
3951         uint16_t tci_v;
3952
3953         if (!vlan_v)
3954                 return;
3955         if (!vlan_m)
3956                 vlan_m = &rte_flow_item_vlan_mask;
3957         if (inner) {
3958                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3959                                          inner_headers);
3960                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3961         } else {
3962                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3963                                          outer_headers);
3964                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3965                 /*
3966                  * This is workaround, masks are not supported,
3967                  * and pre-validated.
3968                  */
3969                 dev_flow->dv.vf_vlan.tag =
3970                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
3971         }
3972         tci_m = rte_be_to_cpu_16(vlan_m->tci);
3973         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
3974         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
3975         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
3976         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
3977         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
3978         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
3979         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
3980         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
3981         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
3982         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
3983                  rte_be_to_cpu_16(vlan_m->inner_type));
3984         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
3985                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
3986 }
3987
3988 /**
3989  * Add IPV4 item to matcher and to the value.
3990  *
3991  * @param[in, out] matcher
3992  *   Flow matcher.
3993  * @param[in, out] key
3994  *   Flow matcher value.
3995  * @param[in] item
3996  *   Flow pattern to translate.
3997  * @param[in] inner
3998  *   Item is inner pattern.
3999  * @param[in] group
4000  *   The group to insert the rule.
4001  */
4002 static void
4003 flow_dv_translate_item_ipv4(void *matcher, void *key,
4004                             const struct rte_flow_item *item,
4005                             int inner, uint32_t group)
4006 {
4007         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
4008         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
4009         const struct rte_flow_item_ipv4 nic_mask = {
4010                 .hdr = {
4011                         .src_addr = RTE_BE32(0xffffffff),
4012                         .dst_addr = RTE_BE32(0xffffffff),
4013                         .type_of_service = 0xff,
4014                         .next_proto_id = 0xff,
4015                 },
4016         };
4017         void *headers_m;
4018         void *headers_v;
4019         char *l24_m;
4020         char *l24_v;
4021         uint8_t tos;
4022
4023         if (inner) {
4024                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4025                                          inner_headers);
4026                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4027         } else {
4028                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4029                                          outer_headers);
4030                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4031         }
4032         if (group == 0)
4033                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
4034         else
4035                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
4036         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
4037         if (!ipv4_v)
4038                 return;
4039         if (!ipv4_m)
4040                 ipv4_m = &nic_mask;
4041         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
4042                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
4043         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
4044                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
4045         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
4046         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
4047         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
4048                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
4049         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
4050                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
4051         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
4052         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
4053         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
4054         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
4055                  ipv4_m->hdr.type_of_service);
4056         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
4057         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
4058                  ipv4_m->hdr.type_of_service >> 2);
4059         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
4060         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
4061                  ipv4_m->hdr.next_proto_id);
4062         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
4063                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
4064 }
4065
4066 /**
4067  * Add IPV6 item to matcher and to the value.
4068  *
4069  * @param[in, out] matcher
4070  *   Flow matcher.
4071  * @param[in, out] key
4072  *   Flow matcher value.
4073  * @param[in] item
4074  *   Flow pattern to translate.
4075  * @param[in] inner
4076  *   Item is inner pattern.
4077  * @param[in] group
4078  *   The group to insert the rule.
4079  */
4080 static void
4081 flow_dv_translate_item_ipv6(void *matcher, void *key,
4082                             const struct rte_flow_item *item,
4083                             int inner, uint32_t group)
4084 {
4085         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
4086         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
4087         const struct rte_flow_item_ipv6 nic_mask = {
4088                 .hdr = {
4089                         .src_addr =
4090                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
4091                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
4092                         .dst_addr =
4093                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
4094                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
4095                         .vtc_flow = RTE_BE32(0xffffffff),
4096                         .proto = 0xff,
4097                         .hop_limits = 0xff,
4098                 },
4099         };
4100         void *headers_m;
4101         void *headers_v;
4102         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4103         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4104         char *l24_m;
4105         char *l24_v;
4106         uint32_t vtc_m;
4107         uint32_t vtc_v;
4108         int i;
4109         int size;
4110
4111         if (inner) {
4112                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4113                                          inner_headers);
4114                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4115         } else {
4116                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4117                                          outer_headers);
4118                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4119         }
4120         if (group == 0)
4121                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
4122         else
4123                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
4124         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
4125         if (!ipv6_v)
4126                 return;
4127         if (!ipv6_m)
4128                 ipv6_m = &nic_mask;
4129         size = sizeof(ipv6_m->hdr.dst_addr);
4130         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
4131                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
4132         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
4133                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
4134         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
4135         for (i = 0; i < size; ++i)
4136                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
4137         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
4138                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
4139         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
4140                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
4141         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
4142         for (i = 0; i < size; ++i)
4143                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
4144         /* TOS. */
4145         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
4146         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
4147         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
4148         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
4149         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
4150         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
4151         /* Label. */
4152         if (inner) {
4153                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
4154                          vtc_m);
4155                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
4156                          vtc_v);
4157         } else {
4158                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
4159                          vtc_m);
4160                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
4161                          vtc_v);
4162         }
4163         /* Protocol. */
4164         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
4165                  ipv6_m->hdr.proto);
4166         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
4167                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
4168 }
4169
4170 /**
4171  * Add TCP item to matcher and to the value.
4172  *
4173  * @param[in, out] matcher
4174  *   Flow matcher.
4175  * @param[in, out] key
4176  *   Flow matcher value.
4177  * @param[in] item
4178  *   Flow pattern to translate.
4179  * @param[in] inner
4180  *   Item is inner pattern.
4181  */
4182 static void
4183 flow_dv_translate_item_tcp(void *matcher, void *key,
4184                            const struct rte_flow_item *item,
4185                            int inner)
4186 {
4187         const struct rte_flow_item_tcp *tcp_m = item->mask;
4188         const struct rte_flow_item_tcp *tcp_v = item->spec;
4189         void *headers_m;
4190         void *headers_v;
4191
4192         if (inner) {
4193                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4194                                          inner_headers);
4195                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4196         } else {
4197                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4198                                          outer_headers);
4199                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4200         }
4201         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
4202         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
4203         if (!tcp_v)
4204                 return;
4205         if (!tcp_m)
4206                 tcp_m = &rte_flow_item_tcp_mask;
4207         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
4208                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
4209         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
4210                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
4211         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
4212                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
4213         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
4214                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
4215         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
4216                  tcp_m->hdr.tcp_flags);
4217         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
4218                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
4219 }
4220
4221 /**
4222  * Add UDP item to matcher and to the value.
4223  *
4224  * @param[in, out] matcher
4225  *   Flow matcher.
4226  * @param[in, out] key
4227  *   Flow matcher value.
4228  * @param[in] item
4229  *   Flow pattern to translate.
4230  * @param[in] inner
4231  *   Item is inner pattern.
4232  */
4233 static void
4234 flow_dv_translate_item_udp(void *matcher, void *key,
4235                            const struct rte_flow_item *item,
4236                            int inner)
4237 {
4238         const struct rte_flow_item_udp *udp_m = item->mask;
4239         const struct rte_flow_item_udp *udp_v = item->spec;
4240         void *headers_m;
4241         void *headers_v;
4242
4243         if (inner) {
4244                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4245                                          inner_headers);
4246                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4247         } else {
4248                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4249                                          outer_headers);
4250                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4251         }
4252         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
4253         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
4254         if (!udp_v)
4255                 return;
4256         if (!udp_m)
4257                 udp_m = &rte_flow_item_udp_mask;
4258         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
4259                  rte_be_to_cpu_16(udp_m->hdr.src_port));
4260         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
4261                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
4262         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
4263                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
4264         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
4265                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
4266 }
4267
4268 /**
4269  * Add GRE optional Key item to matcher and to the value.
4270  *
4271  * @param[in, out] matcher
4272  *   Flow matcher.
4273  * @param[in, out] key
4274  *   Flow matcher value.
4275  * @param[in] item
4276  *   Flow pattern to translate.
4277  * @param[in] inner
4278  *   Item is inner pattern.
4279  */
4280 static void
4281 flow_dv_translate_item_gre_key(void *matcher, void *key,
4282                                    const struct rte_flow_item *item)
4283 {
4284         const rte_be32_t *key_m = item->mask;
4285         const rte_be32_t *key_v = item->spec;
4286         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4287         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4288         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
4289
4290         if (!key_v)
4291                 return;
4292         if (!key_m)
4293                 key_m = &gre_key_default_mask;
4294         /* GRE K bit must be on and should already be validated */
4295         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
4296         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
4297         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
4298                  rte_be_to_cpu_32(*key_m) >> 8);
4299         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
4300                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
4301         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
4302                  rte_be_to_cpu_32(*key_m) & 0xFF);
4303         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
4304                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
4305 }
4306
4307 /**
4308  * Add GRE item to matcher and to the value.
4309  *
4310  * @param[in, out] matcher
4311  *   Flow matcher.
4312  * @param[in, out] key
4313  *   Flow matcher value.
4314  * @param[in] item
4315  *   Flow pattern to translate.
4316  * @param[in] inner
4317  *   Item is inner pattern.
4318  */
4319 static void
4320 flow_dv_translate_item_gre(void *matcher, void *key,
4321                            const struct rte_flow_item *item,
4322                            int inner)
4323 {
4324         const struct rte_flow_item_gre *gre_m = item->mask;
4325         const struct rte_flow_item_gre *gre_v = item->spec;
4326         void *headers_m;
4327         void *headers_v;
4328         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4329         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4330         struct {
4331                 union {
4332                         __extension__
4333                         struct {
4334                                 uint16_t version:3;
4335                                 uint16_t rsvd0:9;
4336                                 uint16_t s_present:1;
4337                                 uint16_t k_present:1;
4338                                 uint16_t rsvd_bit1:1;
4339                                 uint16_t c_present:1;
4340                         };
4341                         uint16_t value;
4342                 };
4343         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
4344
4345         if (inner) {
4346                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4347                                          inner_headers);
4348                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4349         } else {
4350                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4351                                          outer_headers);
4352                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4353         }
4354         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
4355         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
4356         if (!gre_v)
4357                 return;
4358         if (!gre_m)
4359                 gre_m = &rte_flow_item_gre_mask;
4360         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
4361                  rte_be_to_cpu_16(gre_m->protocol));
4362         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
4363                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
4364         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
4365         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
4366         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
4367                  gre_crks_rsvd0_ver_m.c_present);
4368         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
4369                  gre_crks_rsvd0_ver_v.c_present &
4370                  gre_crks_rsvd0_ver_m.c_present);
4371         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
4372                  gre_crks_rsvd0_ver_m.k_present);
4373         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
4374                  gre_crks_rsvd0_ver_v.k_present &
4375                  gre_crks_rsvd0_ver_m.k_present);
4376         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
4377                  gre_crks_rsvd0_ver_m.s_present);
4378         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
4379                  gre_crks_rsvd0_ver_v.s_present &
4380                  gre_crks_rsvd0_ver_m.s_present);
4381 }
4382
4383 /**
4384  * Add NVGRE item to matcher and to the value.
4385  *
4386  * @param[in, out] matcher
4387  *   Flow matcher.
4388  * @param[in, out] key
4389  *   Flow matcher value.
4390  * @param[in] item
4391  *   Flow pattern to translate.
4392  * @param[in] inner
4393  *   Item is inner pattern.
4394  */
4395 static void
4396 flow_dv_translate_item_nvgre(void *matcher, void *key,
4397                              const struct rte_flow_item *item,
4398                              int inner)
4399 {
4400         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
4401         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
4402         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4403         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4404         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
4405         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
4406         char *gre_key_m;
4407         char *gre_key_v;
4408         int size;
4409         int i;
4410
4411         /* For NVGRE, GRE header fields must be set with defined values. */
4412         const struct rte_flow_item_gre gre_spec = {
4413                 .c_rsvd0_ver = RTE_BE16(0x2000),
4414                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
4415         };
4416         const struct rte_flow_item_gre gre_mask = {
4417                 .c_rsvd0_ver = RTE_BE16(0xB000),
4418                 .protocol = RTE_BE16(UINT16_MAX),
4419         };
4420         const struct rte_flow_item gre_item = {
4421                 .spec = &gre_spec,
4422                 .mask = &gre_mask,
4423                 .last = NULL,
4424         };
4425         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
4426         if (!nvgre_v)
4427                 return;
4428         if (!nvgre_m)
4429                 nvgre_m = &rte_flow_item_nvgre_mask;
4430         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
4431         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
4432         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
4433         memcpy(gre_key_m, tni_flow_id_m, size);
4434         for (i = 0; i < size; ++i)
4435                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
4436 }
4437
4438 /**
4439  * Add VXLAN item to matcher and to the value.
4440  *
4441  * @param[in, out] matcher
4442  *   Flow matcher.
4443  * @param[in, out] key
4444  *   Flow matcher value.
4445  * @param[in] item
4446  *   Flow pattern to translate.
4447  * @param[in] inner
4448  *   Item is inner pattern.
4449  */
4450 static void
4451 flow_dv_translate_item_vxlan(void *matcher, void *key,
4452                              const struct rte_flow_item *item,
4453                              int inner)
4454 {
4455         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
4456         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
4457         void *headers_m;
4458         void *headers_v;
4459         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4460         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4461         char *vni_m;
4462         char *vni_v;
4463         uint16_t dport;
4464         int size;
4465         int i;
4466
4467         if (inner) {
4468                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4469                                          inner_headers);
4470                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4471         } else {
4472                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4473                                          outer_headers);
4474                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4475         }
4476         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
4477                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
4478         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
4479                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
4480                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
4481         }
4482         if (!vxlan_v)
4483                 return;
4484         if (!vxlan_m)
4485                 vxlan_m = &rte_flow_item_vxlan_mask;
4486         size = sizeof(vxlan_m->vni);
4487         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
4488         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
4489         memcpy(vni_m, vxlan_m->vni, size);
4490         for (i = 0; i < size; ++i)
4491                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
4492 }
4493
4494 /**
4495  * Add MPLS item to matcher and to the value.
4496  *
4497  * @param[in, out] matcher
4498  *   Flow matcher.
4499  * @param[in, out] key
4500  *   Flow matcher value.
4501  * @param[in] item
4502  *   Flow pattern to translate.
4503  * @param[in] prev_layer
4504  *   The protocol layer indicated in previous item.
4505  * @param[in] inner
4506  *   Item is inner pattern.
4507  */
4508 static void
4509 flow_dv_translate_item_mpls(void *matcher, void *key,
4510                             const struct rte_flow_item *item,
4511                             uint64_t prev_layer,
4512                             int inner)
4513 {
4514         const uint32_t *in_mpls_m = item->mask;
4515         const uint32_t *in_mpls_v = item->spec;
4516         uint32_t *out_mpls_m = 0;
4517         uint32_t *out_mpls_v = 0;
4518         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4519         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4520         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
4521                                      misc_parameters_2);
4522         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
4523         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
4524         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4525
4526         switch (prev_layer) {
4527         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
4528                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
4529                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
4530                          MLX5_UDP_PORT_MPLS);
4531                 break;
4532         case MLX5_FLOW_LAYER_GRE:
4533                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
4534                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
4535                          RTE_ETHER_TYPE_MPLS);
4536                 break;
4537         default:
4538                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
4539                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
4540                          IPPROTO_MPLS);
4541                 break;
4542         }
4543         if (!in_mpls_v)
4544                 return;
4545         if (!in_mpls_m)
4546                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
4547         switch (prev_layer) {
4548         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
4549                 out_mpls_m =
4550                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
4551                                                  outer_first_mpls_over_udp);
4552                 out_mpls_v =
4553                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
4554                                                  outer_first_mpls_over_udp);
4555                 break;
4556         case MLX5_FLOW_LAYER_GRE:
4557                 out_mpls_m =
4558                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
4559                                                  outer_first_mpls_over_gre);
4560                 out_mpls_v =
4561                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
4562                                                  outer_first_mpls_over_gre);
4563                 break;
4564         default:
4565                 /* Inner MPLS not over GRE is not supported. */
4566                 if (!inner) {
4567                         out_mpls_m =
4568                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
4569                                                          misc2_m,
4570                                                          outer_first_mpls);
4571                         out_mpls_v =
4572                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
4573                                                          misc2_v,
4574                                                          outer_first_mpls);
4575                 }
4576                 break;
4577         }
4578         if (out_mpls_m && out_mpls_v) {
4579                 *out_mpls_m = *in_mpls_m;
4580                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
4581         }
4582 }
4583
4584 /**
4585  * Add META item to matcher
4586  *
4587  * @param[in, out] matcher
4588  *   Flow matcher.
4589  * @param[in, out] key
4590  *   Flow matcher value.
4591  * @param[in] item
4592  *   Flow pattern to translate.
4593  * @param[in] inner
4594  *   Item is inner pattern.
4595  */
4596 static void
4597 flow_dv_translate_item_meta(void *matcher, void *key,
4598                             const struct rte_flow_item *item)
4599 {
4600         const struct rte_flow_item_meta *meta_m;
4601         const struct rte_flow_item_meta *meta_v;
4602         void *misc2_m =
4603                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
4604         void *misc2_v =
4605                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
4606
4607         meta_m = (const void *)item->mask;
4608         if (!meta_m)
4609                 meta_m = &rte_flow_item_meta_mask;
4610         meta_v = (const void *)item->spec;
4611         if (meta_v) {
4612                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a,
4613                          rte_be_to_cpu_32(meta_m->data));
4614                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a,
4615                          rte_be_to_cpu_32(meta_v->data & meta_m->data));
4616         }
4617 }
4618
4619 /**
4620  * Add source vport match to the specified matcher.
4621  *
4622  * @param[in, out] matcher
4623  *   Flow matcher.
4624  * @param[in, out] key
4625  *   Flow matcher value.
4626  * @param[in] port
4627  *   Source vport value to match
4628  * @param[in] mask
4629  *   Mask
4630  */
4631 static void
4632 flow_dv_translate_item_source_vport(void *matcher, void *key,
4633                                     int16_t port, uint16_t mask)
4634 {
4635         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4636         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4637
4638         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
4639         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
4640 }
4641
4642 /**
4643  * Translate port-id item to eswitch match on  port-id.
4644  *
4645  * @param[in] dev
4646  *   The devich to configure through.
4647  * @param[in, out] matcher
4648  *   Flow matcher.
4649  * @param[in, out] key
4650  *   Flow matcher value.
4651  * @param[in] item
4652  *   Flow pattern to translate.
4653  *
4654  * @return
4655  *   0 on success, a negative errno value otherwise.
4656  */
4657 static int
4658 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
4659                                void *key, const struct rte_flow_item *item)
4660 {
4661         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
4662         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
4663         struct mlx5_priv *priv;
4664         uint16_t mask, id;
4665
4666         mask = pid_m ? pid_m->id : 0xffff;
4667         id = pid_v ? pid_v->id : dev->data->port_id;
4668         priv = mlx5_port_to_eswitch_info(id);
4669         if (!priv)
4670                 return -rte_errno;
4671         flow_dv_translate_item_source_vport(matcher, key,
4672                                             priv->vport_id, mask);
4673         return 0;
4674 }
4675
4676 /**
4677  * Add ICMP6 item to matcher and to the value.
4678  *
4679  * @param[in, out] matcher
4680  *   Flow matcher.
4681  * @param[in, out] key
4682  *   Flow matcher value.
4683  * @param[in] item
4684  *   Flow pattern to translate.
4685  * @param[in] inner
4686  *   Item is inner pattern.
4687  */
4688 static void
4689 flow_dv_translate_item_icmp6(void *matcher, void *key,
4690                               const struct rte_flow_item *item,
4691                               int inner)
4692 {
4693         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
4694         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
4695         void *headers_m;
4696         void *headers_v;
4697         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4698                                      misc_parameters_3);
4699         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4700         if (inner) {
4701                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4702                                          inner_headers);
4703                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4704         } else {
4705                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4706                                          outer_headers);
4707                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4708         }
4709         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4710         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
4711         if (!icmp6_v)
4712                 return;
4713         if (!icmp6_m)
4714                 icmp6_m = &rte_flow_item_icmp6_mask;
4715         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
4716         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
4717                  icmp6_v->type & icmp6_m->type);
4718         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
4719         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
4720                  icmp6_v->code & icmp6_m->code);
4721 }
4722
4723 /**
4724  * Add ICMP item to matcher and to the value.
4725  *
4726  * @param[in, out] matcher
4727  *   Flow matcher.
4728  * @param[in, out] key
4729  *   Flow matcher value.
4730  * @param[in] item
4731  *   Flow pattern to translate.
4732  * @param[in] inner
4733  *   Item is inner pattern.
4734  */
4735 static void
4736 flow_dv_translate_item_icmp(void *matcher, void *key,
4737                             const struct rte_flow_item *item,
4738                             int inner)
4739 {
4740         const struct rte_flow_item_icmp *icmp_m = item->mask;
4741         const struct rte_flow_item_icmp *icmp_v = item->spec;
4742         void *headers_m;
4743         void *headers_v;
4744         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4745                                      misc_parameters_3);
4746         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4747         if (inner) {
4748                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4749                                          inner_headers);
4750                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4751         } else {
4752                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4753                                          outer_headers);
4754                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4755         }
4756         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4757         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
4758         if (!icmp_v)
4759                 return;
4760         if (!icmp_m)
4761                 icmp_m = &rte_flow_item_icmp_mask;
4762         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
4763                  icmp_m->hdr.icmp_type);
4764         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
4765                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
4766         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
4767                  icmp_m->hdr.icmp_code);
4768         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
4769                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
4770 }
4771
4772 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
4773
4774 #define HEADER_IS_ZERO(match_criteria, headers)                              \
4775         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
4776                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
4777
4778 /**
4779  * Calculate flow matcher enable bitmap.
4780  *
4781  * @param match_criteria
4782  *   Pointer to flow matcher criteria.
4783  *
4784  * @return
4785  *   Bitmap of enabled fields.
4786  */
4787 static uint8_t
4788 flow_dv_matcher_enable(uint32_t *match_criteria)
4789 {
4790         uint8_t match_criteria_enable;
4791
4792         match_criteria_enable =
4793                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
4794                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
4795         match_criteria_enable |=
4796                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
4797                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
4798         match_criteria_enable |=
4799                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
4800                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
4801         match_criteria_enable |=
4802                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
4803                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
4804         match_criteria_enable |=
4805                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
4806                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
4807         return match_criteria_enable;
4808 }
4809
4810
4811 /**
4812  * Get a flow table.
4813  *
4814  * @param dev[in, out]
4815  *   Pointer to rte_eth_dev structure.
4816  * @param[in] table_id
4817  *   Table id to use.
4818  * @param[in] egress
4819  *   Direction of the table.
4820  * @param[in] transfer
4821  *   E-Switch or NIC flow.
4822  * @param[out] error
4823  *   pointer to error structure.
4824  *
4825  * @return
4826  *   Returns tables resource based on the index, NULL in case of failed.
4827  */
4828 static struct mlx5_flow_tbl_resource *
4829 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
4830                          uint32_t table_id, uint8_t egress,
4831                          uint8_t transfer,
4832                          struct rte_flow_error *error)
4833 {
4834         struct mlx5_priv *priv = dev->data->dev_private;
4835         struct mlx5_ibv_shared *sh = priv->sh;
4836         struct mlx5_flow_tbl_resource *tbl;
4837
4838 #ifdef HAVE_MLX5DV_DR
4839         if (transfer) {
4840                 tbl = &sh->fdb_tbl[table_id];
4841                 if (!tbl->obj)
4842                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4843                                 (sh->fdb_domain, table_id);
4844         } else if (egress) {
4845                 tbl = &sh->tx_tbl[table_id];
4846                 if (!tbl->obj)
4847                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4848                                 (sh->tx_domain, table_id);
4849         } else {
4850                 tbl = &sh->rx_tbl[table_id];
4851                 if (!tbl->obj)
4852                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4853                                 (sh->rx_domain, table_id);
4854         }
4855         if (!tbl->obj) {
4856                 rte_flow_error_set(error, ENOMEM,
4857                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4858                                    NULL, "cannot create table");
4859                 return NULL;
4860         }
4861         rte_atomic32_inc(&tbl->refcnt);
4862         return tbl;
4863 #else
4864         (void)error;
4865         (void)tbl;
4866         if (transfer)
4867                 return &sh->fdb_tbl[table_id];
4868         else if (egress)
4869                 return &sh->tx_tbl[table_id];
4870         else
4871                 return &sh->rx_tbl[table_id];
4872 #endif
4873 }
4874
4875 /**
4876  * Release a flow table.
4877  *
4878  * @param[in] tbl
4879  *   Table resource to be released.
4880  *
4881  * @return
4882  *   Returns 0 if table was released, else return 1;
4883  */
4884 static int
4885 flow_dv_tbl_resource_release(struct mlx5_flow_tbl_resource *tbl)
4886 {
4887         if (!tbl)
4888                 return 0;
4889         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
4890                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
4891                 tbl->obj = NULL;
4892                 return 0;
4893         }
4894         return 1;
4895 }
4896
4897 /**
4898  * Register the flow matcher.
4899  *
4900  * @param dev[in, out]
4901  *   Pointer to rte_eth_dev structure.
4902  * @param[in, out] matcher
4903  *   Pointer to flow matcher.
4904  * @parm[in, out] dev_flow
4905  *   Pointer to the dev_flow.
4906  * @param[out] error
4907  *   pointer to error structure.
4908  *
4909  * @return
4910  *   0 on success otherwise -errno and errno is set.
4911  */
4912 static int
4913 flow_dv_matcher_register(struct rte_eth_dev *dev,
4914                          struct mlx5_flow_dv_matcher *matcher,
4915                          struct mlx5_flow *dev_flow,
4916                          struct rte_flow_error *error)
4917 {
4918         struct mlx5_priv *priv = dev->data->dev_private;
4919         struct mlx5_ibv_shared *sh = priv->sh;
4920         struct mlx5_flow_dv_matcher *cache_matcher;
4921         struct mlx5dv_flow_matcher_attr dv_attr = {
4922                 .type = IBV_FLOW_ATTR_NORMAL,
4923                 .match_mask = (void *)&matcher->mask,
4924         };
4925         struct mlx5_flow_tbl_resource *tbl = NULL;
4926
4927         /* Lookup from cache. */
4928         LIST_FOREACH(cache_matcher, &sh->matchers, next) {
4929                 if (matcher->crc == cache_matcher->crc &&
4930                     matcher->priority == cache_matcher->priority &&
4931                     matcher->egress == cache_matcher->egress &&
4932                     matcher->group == cache_matcher->group &&
4933                     matcher->transfer == cache_matcher->transfer &&
4934                     !memcmp((const void *)matcher->mask.buf,
4935                             (const void *)cache_matcher->mask.buf,
4936                             cache_matcher->mask.size)) {
4937                         DRV_LOG(DEBUG,
4938                                 "priority %hd use %s matcher %p: refcnt %d++",
4939                                 cache_matcher->priority,
4940                                 cache_matcher->egress ? "tx" : "rx",
4941                                 (void *)cache_matcher,
4942                                 rte_atomic32_read(&cache_matcher->refcnt));
4943                         rte_atomic32_inc(&cache_matcher->refcnt);
4944                         dev_flow->dv.matcher = cache_matcher;
4945                         return 0;
4946                 }
4947         }
4948         /* Register new matcher. */
4949         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
4950         if (!cache_matcher)
4951                 return rte_flow_error_set(error, ENOMEM,
4952                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4953                                           "cannot allocate matcher memory");
4954         tbl = flow_dv_tbl_resource_get(dev, matcher->group,
4955                                        matcher->egress, matcher->transfer,
4956                                        error);
4957         if (!tbl) {
4958                 rte_free(cache_matcher);
4959                 return rte_flow_error_set(error, ENOMEM,
4960                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4961                                           NULL, "cannot create table");
4962         }
4963         *cache_matcher = *matcher;
4964         dv_attr.match_criteria_enable =
4965                 flow_dv_matcher_enable(cache_matcher->mask.buf);
4966         dv_attr.priority = matcher->priority;
4967         if (matcher->egress)
4968                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
4969         cache_matcher->matcher_object =
4970                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
4971         if (!cache_matcher->matcher_object) {
4972                 rte_free(cache_matcher);
4973 #ifdef HAVE_MLX5DV_DR
4974                 flow_dv_tbl_resource_release(tbl);
4975 #endif
4976                 return rte_flow_error_set(error, ENOMEM,
4977                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4978                                           NULL, "cannot create matcher");
4979         }
4980         rte_atomic32_inc(&cache_matcher->refcnt);
4981         LIST_INSERT_HEAD(&sh->matchers, cache_matcher, next);
4982         dev_flow->dv.matcher = cache_matcher;
4983         DRV_LOG(DEBUG, "priority %hd new %s matcher %p: refcnt %d",
4984                 cache_matcher->priority,
4985                 cache_matcher->egress ? "tx" : "rx", (void *)cache_matcher,
4986                 rte_atomic32_read(&cache_matcher->refcnt));
4987         rte_atomic32_inc(&tbl->refcnt);
4988         return 0;
4989 }
4990
4991 /**
4992  * Find existing tag resource or create and register a new one.
4993  *
4994  * @param dev[in, out]
4995  *   Pointer to rte_eth_dev structure.
4996  * @param[in, out] resource
4997  *   Pointer to tag resource.
4998  * @parm[in, out] dev_flow
4999  *   Pointer to the dev_flow.
5000  * @param[out] error
5001  *   pointer to error structure.
5002  *
5003  * @return
5004  *   0 on success otherwise -errno and errno is set.
5005  */
5006 static int
5007 flow_dv_tag_resource_register
5008                         (struct rte_eth_dev *dev,
5009                          struct mlx5_flow_dv_tag_resource *resource,
5010                          struct mlx5_flow *dev_flow,
5011                          struct rte_flow_error *error)
5012 {
5013         struct mlx5_priv *priv = dev->data->dev_private;
5014         struct mlx5_ibv_shared *sh = priv->sh;
5015         struct mlx5_flow_dv_tag_resource *cache_resource;
5016
5017         /* Lookup a matching resource from cache. */
5018         LIST_FOREACH(cache_resource, &sh->tags, next) {
5019                 if (resource->tag == cache_resource->tag) {
5020                         DRV_LOG(DEBUG, "tag resource %p: refcnt %d++",
5021                                 (void *)cache_resource,
5022                                 rte_atomic32_read(&cache_resource->refcnt));
5023                         rte_atomic32_inc(&cache_resource->refcnt);
5024                         dev_flow->flow->tag_resource = cache_resource;
5025                         return 0;
5026                 }
5027         }
5028         /* Register new  resource. */
5029         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
5030         if (!cache_resource)
5031                 return rte_flow_error_set(error, ENOMEM,
5032                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5033                                           "cannot allocate resource memory");
5034         *cache_resource = *resource;
5035         cache_resource->action = mlx5_glue->dv_create_flow_action_tag
5036                 (resource->tag);
5037         if (!cache_resource->action) {
5038                 rte_free(cache_resource);
5039                 return rte_flow_error_set(error, ENOMEM,
5040                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5041                                           NULL, "cannot create action");
5042         }
5043         rte_atomic32_init(&cache_resource->refcnt);
5044         rte_atomic32_inc(&cache_resource->refcnt);
5045         LIST_INSERT_HEAD(&sh->tags, cache_resource, next);
5046         dev_flow->flow->tag_resource = cache_resource;
5047         DRV_LOG(DEBUG, "new tag resource %p: refcnt %d++",
5048                 (void *)cache_resource,
5049                 rte_atomic32_read(&cache_resource->refcnt));
5050         return 0;
5051 }
5052
5053 /**
5054  * Release the tag.
5055  *
5056  * @param dev
5057  *   Pointer to Ethernet device.
5058  * @param flow
5059  *   Pointer to mlx5_flow.
5060  *
5061  * @return
5062  *   1 while a reference on it exists, 0 when freed.
5063  */
5064 static int
5065 flow_dv_tag_release(struct rte_eth_dev *dev,
5066                     struct mlx5_flow_dv_tag_resource *tag)
5067 {
5068         assert(tag);
5069         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
5070                 dev->data->port_id, (void *)tag,
5071                 rte_atomic32_read(&tag->refcnt));
5072         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
5073                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
5074                 LIST_REMOVE(tag, next);
5075                 DRV_LOG(DEBUG, "port %u tag %p: removed",
5076                         dev->data->port_id, (void *)tag);
5077                 rte_free(tag);
5078                 return 0;
5079         }
5080         return 1;
5081 }
5082
5083 /**
5084  * Translate port ID action to vport.
5085  *
5086  * @param[in] dev
5087  *   Pointer to rte_eth_dev structure.
5088  * @param[in] action
5089  *   Pointer to the port ID action.
5090  * @param[out] dst_port_id
5091  *   The target port ID.
5092  * @param[out] error
5093  *   Pointer to the error structure.
5094  *
5095  * @return
5096  *   0 on success, a negative errno value otherwise and rte_errno is set.
5097  */
5098 static int
5099 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
5100                                  const struct rte_flow_action *action,
5101                                  uint32_t *dst_port_id,
5102                                  struct rte_flow_error *error)
5103 {
5104         uint32_t port;
5105         struct mlx5_priv *priv;
5106         const struct rte_flow_action_port_id *conf =
5107                         (const struct rte_flow_action_port_id *)action->conf;
5108
5109         port = conf->original ? dev->data->port_id : conf->id;
5110         priv = mlx5_port_to_eswitch_info(port);
5111         if (!priv)
5112                 return rte_flow_error_set(error, -rte_errno,
5113                                           RTE_FLOW_ERROR_TYPE_ACTION,
5114                                           NULL,
5115                                           "No eswitch info was found for port");
5116         *dst_port_id = priv->vport_id;
5117         return 0;
5118 }
5119
5120 /**
5121  * Fill the flow with DV spec.
5122  *
5123  * @param[in] dev
5124  *   Pointer to rte_eth_dev structure.
5125  * @param[in, out] dev_flow
5126  *   Pointer to the sub flow.
5127  * @param[in] attr
5128  *   Pointer to the flow attributes.
5129  * @param[in] items
5130  *   Pointer to the list of items.
5131  * @param[in] actions
5132  *   Pointer to the list of actions.
5133  * @param[out] error
5134  *   Pointer to the error structure.
5135  *
5136  * @return
5137  *   0 on success, a negative errno value otherwise and rte_errno is set.
5138  */
5139 static int
5140 flow_dv_translate(struct rte_eth_dev *dev,
5141                   struct mlx5_flow *dev_flow,
5142                   const struct rte_flow_attr *attr,
5143                   const struct rte_flow_item items[],
5144                   const struct rte_flow_action actions[],
5145                   struct rte_flow_error *error)
5146 {
5147         struct mlx5_priv *priv = dev->data->dev_private;
5148         struct rte_flow *flow = dev_flow->flow;
5149         uint64_t item_flags = 0;
5150         uint64_t last_item = 0;
5151         uint64_t action_flags = 0;
5152         uint64_t priority = attr->priority;
5153         struct mlx5_flow_dv_matcher matcher = {
5154                 .mask = {
5155                         .size = sizeof(matcher.mask.buf),
5156                 },
5157         };
5158         int actions_n = 0;
5159         bool actions_end = false;
5160         struct mlx5_flow_dv_modify_hdr_resource res = {
5161                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
5162                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
5163         };
5164         union flow_dv_attr flow_attr = { .attr = 0 };
5165         struct mlx5_flow_dv_tag_resource tag_resource;
5166         uint32_t modify_action_position = UINT32_MAX;
5167         void *match_mask = matcher.mask.buf;
5168         void *match_value = dev_flow->dv.value.buf;
5169         uint8_t next_protocol = 0xff;
5170         struct rte_vlan_hdr vlan = { 0 };
5171         bool vlan_inherited = false;
5172         uint16_t vlan_tci;
5173         uint32_t table;
5174         int ret = 0;
5175
5176         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
5177                                        &table, error);
5178         if (ret)
5179                 return ret;
5180         flow->group = table;
5181         if (attr->transfer)
5182                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
5183         if (priority == MLX5_FLOW_PRIO_RSVD)
5184                 priority = priv->config.flow_prio - 1;
5185         for (; !actions_end ; actions++) {
5186                 const struct rte_flow_action_queue *queue;
5187                 const struct rte_flow_action_rss *rss;
5188                 const struct rte_flow_action *action = actions;
5189                 const struct rte_flow_action_count *count = action->conf;
5190                 const uint8_t *rss_key;
5191                 const struct rte_flow_action_jump *jump_data;
5192                 struct mlx5_flow_dv_jump_tbl_resource jump_tbl_resource;
5193                 struct mlx5_flow_tbl_resource *tbl;
5194                 uint32_t port_id = 0;
5195                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
5196
5197                 switch (actions->type) {
5198                 case RTE_FLOW_ACTION_TYPE_VOID:
5199                         break;
5200                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5201                         if (flow_dv_translate_action_port_id(dev, action,
5202                                                              &port_id, error))
5203                                 return -rte_errno;
5204                         port_id_resource.port_id = port_id;
5205                         if (flow_dv_port_id_action_resource_register
5206                             (dev, &port_id_resource, dev_flow, error))
5207                                 return -rte_errno;
5208                         dev_flow->dv.actions[actions_n++] =
5209                                 dev_flow->dv.port_id_action->action;
5210                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5211                         break;
5212                 case RTE_FLOW_ACTION_TYPE_FLAG:
5213                         tag_resource.tag =
5214                                 mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
5215                         if (!flow->tag_resource)
5216                                 if (flow_dv_tag_resource_register
5217                                     (dev, &tag_resource, dev_flow, error))
5218                                         return errno;
5219                         dev_flow->dv.actions[actions_n++] =
5220                                 flow->tag_resource->action;
5221                         action_flags |= MLX5_FLOW_ACTION_FLAG;
5222                         break;
5223                 case RTE_FLOW_ACTION_TYPE_MARK:
5224                         tag_resource.tag = mlx5_flow_mark_set
5225                               (((const struct rte_flow_action_mark *)
5226                                (actions->conf))->id);
5227                         if (!flow->tag_resource)
5228                                 if (flow_dv_tag_resource_register
5229                                     (dev, &tag_resource, dev_flow, error))
5230                                         return errno;
5231                         dev_flow->dv.actions[actions_n++] =
5232                                 flow->tag_resource->action;
5233                         action_flags |= MLX5_FLOW_ACTION_MARK;
5234                         break;
5235                 case RTE_FLOW_ACTION_TYPE_DROP:
5236                         action_flags |= MLX5_FLOW_ACTION_DROP;
5237                         break;
5238                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5239                         queue = actions->conf;
5240                         flow->rss.queue_num = 1;
5241                         (*flow->queue)[0] = queue->index;
5242                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
5243                         break;
5244                 case RTE_FLOW_ACTION_TYPE_RSS:
5245                         rss = actions->conf;
5246                         if (flow->queue)
5247                                 memcpy((*flow->queue), rss->queue,
5248                                        rss->queue_num * sizeof(uint16_t));
5249                         flow->rss.queue_num = rss->queue_num;
5250                         /* NULL RSS key indicates default RSS key. */
5251                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
5252                         memcpy(flow->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
5253                         /* RSS type 0 indicates default RSS type ETH_RSS_IP. */
5254                         flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
5255                         flow->rss.level = rss->level;
5256                         action_flags |= MLX5_FLOW_ACTION_RSS;
5257                         break;
5258                 case RTE_FLOW_ACTION_TYPE_COUNT:
5259                         if (!priv->config.devx) {
5260                                 rte_errno = ENOTSUP;
5261                                 goto cnt_err;
5262                         }
5263                         flow->counter = flow_dv_counter_alloc(dev,
5264                                                               count->shared,
5265                                                               count->id,
5266                                                               flow->group);
5267                         if (flow->counter == NULL)
5268                                 goto cnt_err;
5269                         dev_flow->dv.actions[actions_n++] =
5270                                 flow->counter->action;
5271                         action_flags |= MLX5_FLOW_ACTION_COUNT;
5272                         break;
5273 cnt_err:
5274                         if (rte_errno == ENOTSUP)
5275                                 return rte_flow_error_set
5276                                               (error, ENOTSUP,
5277                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5278                                                NULL,
5279                                                "count action not supported");
5280                         else
5281                                 return rte_flow_error_set
5282                                                 (error, rte_errno,
5283                                                  RTE_FLOW_ERROR_TYPE_ACTION,
5284                                                  action,
5285                                                  "cannot create counter"
5286                                                   " object.");
5287                         break;
5288                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5289                         dev_flow->dv.actions[actions_n++] =
5290                                                 priv->sh->pop_vlan_action;
5291                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
5292                         break;
5293                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5294                         if (!vlan_inherited) {
5295                                 flow_dev_get_vlan_info_from_items(items, &vlan);
5296                                 vlan_inherited = true;
5297                         }
5298                         vlan.eth_proto = rte_be_to_cpu_16
5299                              ((((const struct rte_flow_action_of_push_vlan *)
5300                                                    actions->conf)->ethertype));
5301                         if (flow_dv_create_action_push_vlan
5302                                             (dev, attr, &vlan, dev_flow, error))
5303                                 return -rte_errno;
5304                         dev_flow->dv.actions[actions_n++] =
5305                                            dev_flow->dv.push_vlan_res->action;
5306                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
5307                         /* Push VLAN command is also handling this VLAN_VID */
5308                         action_flags &= ~MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
5309                         break;
5310                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5311                         if (!vlan_inherited) {
5312                                 flow_dev_get_vlan_info_from_items(items, &vlan);
5313                                 vlan_inherited = true;
5314                         }
5315                         vlan_tci =
5316                             ((const struct rte_flow_action_of_set_vlan_pcp *)
5317                                                        actions->conf)->vlan_pcp;
5318                         vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
5319                         vlan.vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
5320                         vlan.vlan_tci |= vlan_tci;
5321                         /* Push VLAN command will use this value */
5322                         break;
5323                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5324                         if (!vlan_inherited) {
5325                                 flow_dev_get_vlan_info_from_items(items, &vlan);
5326                                 vlan_inherited = true;
5327                         }
5328                         vlan.vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
5329                         vlan.vlan_tci |= rte_be_to_cpu_16
5330                             (((const struct rte_flow_action_of_set_vlan_vid *)
5331                                                      actions->conf)->vlan_vid);
5332                         /* Push VLAN command will use this value */
5333                         if (mlx5_flow_find_action
5334                                 (actions,
5335                                  RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN))
5336                                 break;
5337                         /* If no VLAN push - this is a modify header action */
5338                         if (flow_dv_convert_action_modify_vlan_vid
5339                                                         (&res, actions, error))
5340                                 return -rte_errno;
5341                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
5342                         break;
5343                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5344                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5345                         if (flow_dv_create_action_l2_encap(dev, actions,
5346                                                            dev_flow,
5347                                                            attr->transfer,
5348                                                            error))
5349                                 return -rte_errno;
5350                         dev_flow->dv.actions[actions_n++] =
5351                                 dev_flow->dv.encap_decap->verbs_action;
5352                         action_flags |= actions->type ==
5353                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
5354                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
5355                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
5356                         break;
5357                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5358                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5359                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
5360                                                            attr->transfer,
5361                                                            error))
5362                                 return -rte_errno;
5363                         dev_flow->dv.actions[actions_n++] =
5364                                 dev_flow->dv.encap_decap->verbs_action;
5365                         action_flags |= actions->type ==
5366                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
5367                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
5368                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
5369                         break;
5370                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5371                         /* Handle encap with preceding decap. */
5372                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
5373                                 if (flow_dv_create_action_raw_encap
5374                                         (dev, actions, dev_flow, attr, error))
5375                                         return -rte_errno;
5376                                 dev_flow->dv.actions[actions_n++] =
5377                                         dev_flow->dv.encap_decap->verbs_action;
5378                         } else {
5379                                 /* Handle encap without preceding decap. */
5380                                 if (flow_dv_create_action_l2_encap
5381                                     (dev, actions, dev_flow, attr->transfer,
5382                                      error))
5383                                         return -rte_errno;
5384                                 dev_flow->dv.actions[actions_n++] =
5385                                         dev_flow->dv.encap_decap->verbs_action;
5386                         }
5387                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
5388                         break;
5389                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5390                         /* Check if this decap is followed by encap. */
5391                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
5392                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
5393                                action++) {
5394                         }
5395                         /* Handle decap only if it isn't followed by encap. */
5396                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5397                                 if (flow_dv_create_action_l2_decap
5398                                     (dev, dev_flow, attr->transfer, error))
5399                                         return -rte_errno;
5400                                 dev_flow->dv.actions[actions_n++] =
5401                                         dev_flow->dv.encap_decap->verbs_action;
5402                         }
5403                         /* If decap is followed by encap, handle it at encap. */
5404                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
5405                         break;
5406                 case RTE_FLOW_ACTION_TYPE_JUMP:
5407                         jump_data = action->conf;
5408                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
5409                                                        jump_data->group, &table,
5410                                                        error);
5411                         if (ret)
5412                                 return ret;
5413                         tbl = flow_dv_tbl_resource_get(dev, table,
5414                                                        attr->egress,
5415                                                        attr->transfer, error);
5416                         if (!tbl)
5417                                 return rte_flow_error_set
5418                                                 (error, errno,
5419                                                  RTE_FLOW_ERROR_TYPE_ACTION,
5420                                                  NULL,
5421                                                  "cannot create jump action.");
5422                         jump_tbl_resource.tbl = tbl;
5423                         if (flow_dv_jump_tbl_resource_register
5424                             (dev, &jump_tbl_resource, dev_flow, error)) {
5425                                 flow_dv_tbl_resource_release(tbl);
5426                                 return rte_flow_error_set
5427                                                 (error, errno,
5428                                                  RTE_FLOW_ERROR_TYPE_ACTION,
5429                                                  NULL,
5430                                                  "cannot create jump action.");
5431                         }
5432                         dev_flow->dv.actions[actions_n++] =
5433                                 dev_flow->dv.jump->action;
5434                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5435                         break;
5436                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5437                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5438                         if (flow_dv_convert_action_modify_mac(&res, actions,
5439                                                               error))
5440                                 return -rte_errno;
5441                         action_flags |= actions->type ==
5442                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
5443                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
5444                                         MLX5_FLOW_ACTION_SET_MAC_DST;
5445                         break;
5446                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5447                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5448                         if (flow_dv_convert_action_modify_ipv4(&res, actions,
5449                                                                error))
5450                                 return -rte_errno;
5451                         action_flags |= actions->type ==
5452                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
5453                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
5454                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
5455                         break;
5456                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5457                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5458                         if (flow_dv_convert_action_modify_ipv6(&res, actions,
5459                                                                error))
5460                                 return -rte_errno;
5461                         action_flags |= actions->type ==
5462                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
5463                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
5464                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
5465                         break;
5466                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5467                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5468                         if (flow_dv_convert_action_modify_tp(&res, actions,
5469                                                              items, &flow_attr,
5470                                                              error))
5471                                 return -rte_errno;
5472                         action_flags |= actions->type ==
5473                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5474                                         MLX5_FLOW_ACTION_SET_TP_SRC :
5475                                         MLX5_FLOW_ACTION_SET_TP_DST;
5476                         break;
5477                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5478                         if (flow_dv_convert_action_modify_dec_ttl(&res, items,
5479                                                                   &flow_attr,
5480                                                                   error))
5481                                 return -rte_errno;
5482                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
5483                         break;
5484                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5485                         if (flow_dv_convert_action_modify_ttl(&res, actions,
5486                                                              items, &flow_attr,
5487                                                              error))
5488                                 return -rte_errno;
5489                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
5490                         break;
5491                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5492                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5493                         if (flow_dv_convert_action_modify_tcp_seq(&res, actions,
5494                                                                   error))
5495                                 return -rte_errno;
5496                         action_flags |= actions->type ==
5497                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5498                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
5499                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5500                         break;
5501
5502                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5503                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5504                         if (flow_dv_convert_action_modify_tcp_ack(&res, actions,
5505                                                                   error))
5506                                 return -rte_errno;
5507                         action_flags |= actions->type ==
5508                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5509                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
5510                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
5511                         break;
5512                 case RTE_FLOW_ACTION_TYPE_END:
5513                         actions_end = true;
5514                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) {
5515                                 /* create modify action if needed. */
5516                                 if (flow_dv_modify_hdr_resource_register
5517                                                                 (dev, &res,
5518                                                                  dev_flow,
5519                                                                  error))
5520                                         return -rte_errno;
5521                                 dev_flow->dv.actions[modify_action_position] =
5522                                         dev_flow->dv.modify_hdr->verbs_action;
5523                         }
5524                         break;
5525                 default:
5526                         break;
5527                 }
5528                 if ((action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) &&
5529                     modify_action_position == UINT32_MAX)
5530                         modify_action_position = actions_n++;
5531         }
5532         dev_flow->dv.actions_n = actions_n;
5533         flow->actions = action_flags;
5534         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
5535                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
5536
5537                 switch (items->type) {
5538                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
5539                         flow_dv_translate_item_port_id(dev, match_mask,
5540                                                        match_value, items);
5541                         last_item = MLX5_FLOW_ITEM_PORT_ID;
5542                         break;
5543                 case RTE_FLOW_ITEM_TYPE_ETH:
5544                         flow_dv_translate_item_eth(match_mask, match_value,
5545                                                    items, tunnel);
5546                         matcher.priority = MLX5_PRIORITY_MAP_L2;
5547                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
5548                                              MLX5_FLOW_LAYER_OUTER_L2;
5549                         break;
5550                 case RTE_FLOW_ITEM_TYPE_VLAN:
5551                         flow_dv_translate_item_vlan(dev_flow,
5552                                                     match_mask, match_value,
5553                                                     items, tunnel);
5554                         matcher.priority = MLX5_PRIORITY_MAP_L2;
5555                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
5556                                               MLX5_FLOW_LAYER_INNER_VLAN) :
5557                                              (MLX5_FLOW_LAYER_OUTER_L2 |
5558                                               MLX5_FLOW_LAYER_OUTER_VLAN);
5559                         break;
5560                 case RTE_FLOW_ITEM_TYPE_IPV4:
5561                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5562                                                   &item_flags, &tunnel);
5563                         flow_dv_translate_item_ipv4(match_mask, match_value,
5564                                                     items, tunnel, flow->group);
5565                         matcher.priority = MLX5_PRIORITY_MAP_L3;
5566                         dev_flow->dv.hash_fields |=
5567                                 mlx5_flow_hashfields_adjust
5568                                         (dev_flow, tunnel,
5569                                          MLX5_IPV4_LAYER_TYPES,
5570                                          MLX5_IPV4_IBV_RX_HASH);
5571                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
5572                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
5573                         if (items->mask != NULL &&
5574                             ((const struct rte_flow_item_ipv4 *)
5575                              items->mask)->hdr.next_proto_id) {
5576                                 next_protocol =
5577                                         ((const struct rte_flow_item_ipv4 *)
5578                                          (items->spec))->hdr.next_proto_id;
5579                                 next_protocol &=
5580                                         ((const struct rte_flow_item_ipv4 *)
5581                                          (items->mask))->hdr.next_proto_id;
5582                         } else {
5583                                 /* Reset for inner layer. */
5584                                 next_protocol = 0xff;
5585                         }
5586                         break;
5587                 case RTE_FLOW_ITEM_TYPE_IPV6:
5588                         mlx5_flow_tunnel_ip_check(items, next_protocol,
5589                                                   &item_flags, &tunnel);
5590                         flow_dv_translate_item_ipv6(match_mask, match_value,
5591                                                     items, tunnel, flow->group);
5592                         matcher.priority = MLX5_PRIORITY_MAP_L3;
5593                         dev_flow->dv.hash_fields |=
5594                                 mlx5_flow_hashfields_adjust
5595                                         (dev_flow, tunnel,
5596                                          MLX5_IPV6_LAYER_TYPES,
5597                                          MLX5_IPV6_IBV_RX_HASH);
5598                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
5599                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
5600                         if (items->mask != NULL &&
5601                             ((const struct rte_flow_item_ipv6 *)
5602                              items->mask)->hdr.proto) {
5603                                 next_protocol =
5604                                         ((const struct rte_flow_item_ipv6 *)
5605                                          items->spec)->hdr.proto;
5606                                 next_protocol &=
5607                                         ((const struct rte_flow_item_ipv6 *)
5608                                          items->mask)->hdr.proto;
5609                         } else {
5610                                 /* Reset for inner layer. */
5611                                 next_protocol = 0xff;
5612                         }
5613                         break;
5614                 case RTE_FLOW_ITEM_TYPE_TCP:
5615                         flow_dv_translate_item_tcp(match_mask, match_value,
5616                                                    items, tunnel);
5617                         matcher.priority = MLX5_PRIORITY_MAP_L4;
5618                         dev_flow->dv.hash_fields |=
5619                                 mlx5_flow_hashfields_adjust
5620                                         (dev_flow, tunnel, ETH_RSS_TCP,
5621                                          IBV_RX_HASH_SRC_PORT_TCP |
5622                                          IBV_RX_HASH_DST_PORT_TCP);
5623                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
5624                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
5625                         break;
5626                 case RTE_FLOW_ITEM_TYPE_UDP:
5627                         flow_dv_translate_item_udp(match_mask, match_value,
5628                                                    items, tunnel);
5629                         matcher.priority = MLX5_PRIORITY_MAP_L4;
5630                         dev_flow->dv.hash_fields |=
5631                                 mlx5_flow_hashfields_adjust
5632                                         (dev_flow, tunnel, ETH_RSS_UDP,
5633                                          IBV_RX_HASH_SRC_PORT_UDP |
5634                                          IBV_RX_HASH_DST_PORT_UDP);
5635                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
5636                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
5637                         break;
5638                 case RTE_FLOW_ITEM_TYPE_GRE:
5639                         flow_dv_translate_item_gre(match_mask, match_value,
5640                                                    items, tunnel);
5641                         last_item = MLX5_FLOW_LAYER_GRE;
5642                         break;
5643                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
5644                         flow_dv_translate_item_gre_key(match_mask,
5645                                                        match_value, items);
5646                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
5647                         break;
5648                 case RTE_FLOW_ITEM_TYPE_NVGRE:
5649                         flow_dv_translate_item_nvgre(match_mask, match_value,
5650                                                      items, tunnel);
5651                         last_item = MLX5_FLOW_LAYER_GRE;
5652                         break;
5653                 case RTE_FLOW_ITEM_TYPE_VXLAN:
5654                         flow_dv_translate_item_vxlan(match_mask, match_value,
5655                                                      items, tunnel);
5656                         last_item = MLX5_FLOW_LAYER_VXLAN;
5657                         break;
5658                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
5659                         flow_dv_translate_item_vxlan(match_mask, match_value,
5660                                                      items, tunnel);
5661                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
5662                         break;
5663                 case RTE_FLOW_ITEM_TYPE_MPLS:
5664                         flow_dv_translate_item_mpls(match_mask, match_value,
5665                                                     items, last_item, tunnel);
5666                         last_item = MLX5_FLOW_LAYER_MPLS;
5667                         break;
5668                 case RTE_FLOW_ITEM_TYPE_META:
5669                         flow_dv_translate_item_meta(match_mask, match_value,
5670                                                     items);
5671                         last_item = MLX5_FLOW_ITEM_METADATA;
5672                         break;
5673                 case RTE_FLOW_ITEM_TYPE_ICMP:
5674                         flow_dv_translate_item_icmp(match_mask, match_value,
5675                                                     items, tunnel);
5676                         last_item = MLX5_FLOW_LAYER_ICMP;
5677                         break;
5678                 case RTE_FLOW_ITEM_TYPE_ICMP6:
5679                         flow_dv_translate_item_icmp6(match_mask, match_value,
5680                                                       items, tunnel);
5681                         last_item = MLX5_FLOW_LAYER_ICMP6;
5682                         break;
5683                 default:
5684                         break;
5685                 }
5686                 item_flags |= last_item;
5687         }
5688         /*
5689          * In case of ingress traffic when E-Switch mode is enabled,
5690          * we have two cases where we need to set the source port manually.
5691          * The first one, is in case of Nic steering rule, and the second is
5692          * E-Switch rule where no port_id item was found. In both cases
5693          * the source port is set according the current port in use.
5694          */
5695         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
5696             (priv->representor || priv->master)) {
5697                 if (flow_dv_translate_item_port_id(dev, match_mask,
5698                                                    match_value, NULL))
5699                         return -rte_errno;
5700         }
5701         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
5702                                          dev_flow->dv.value.buf));
5703         dev_flow->layers = item_flags;
5704         /* Register matcher. */
5705         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
5706                                     matcher.mask.size);
5707         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
5708                                                      matcher.priority);
5709         matcher.egress = attr->egress;
5710         matcher.group = flow->group;
5711         matcher.transfer = attr->transfer;
5712         if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
5713                 return -rte_errno;
5714         return 0;
5715 }
5716
5717 /**
5718  * Apply the flow to the NIC.
5719  *
5720  * @param[in] dev
5721  *   Pointer to the Ethernet device structure.
5722  * @param[in, out] flow
5723  *   Pointer to flow structure.
5724  * @param[out] error
5725  *   Pointer to error structure.
5726  *
5727  * @return
5728  *   0 on success, a negative errno value otherwise and rte_errno is set.
5729  */
5730 static int
5731 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
5732               struct rte_flow_error *error)
5733 {
5734         struct mlx5_flow_dv *dv;
5735         struct mlx5_flow *dev_flow;
5736         struct mlx5_priv *priv = dev->data->dev_private;
5737         int n;
5738         int err;
5739
5740         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5741                 dv = &dev_flow->dv;
5742                 n = dv->actions_n;
5743                 if (flow->actions & MLX5_FLOW_ACTION_DROP) {
5744                         if (flow->transfer) {
5745                                 dv->actions[n++] = priv->sh->esw_drop_action;
5746                         } else {
5747                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
5748                                 if (!dv->hrxq) {
5749                                         rte_flow_error_set
5750                                                 (error, errno,
5751                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5752                                                  NULL,
5753                                                  "cannot get drop hash queue");
5754                                         goto error;
5755                                 }
5756                                 dv->actions[n++] = dv->hrxq->action;
5757                         }
5758                 } else if (flow->actions &
5759                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
5760                         struct mlx5_hrxq *hrxq;
5761
5762                         hrxq = mlx5_hrxq_get(dev, flow->key,
5763                                              MLX5_RSS_HASH_KEY_LEN,
5764                                              dv->hash_fields,
5765                                              (*flow->queue),
5766                                              flow->rss.queue_num);
5767                         if (!hrxq) {
5768                                 hrxq = mlx5_hrxq_new
5769                                         (dev, flow->key, MLX5_RSS_HASH_KEY_LEN,
5770                                          dv->hash_fields, (*flow->queue),
5771                                          flow->rss.queue_num,
5772                                          !!(dev_flow->layers &
5773                                             MLX5_FLOW_LAYER_TUNNEL));
5774                         }
5775                         if (!hrxq) {
5776                                 rte_flow_error_set
5777                                         (error, rte_errno,
5778                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5779                                          "cannot get hash queue");
5780                                 goto error;
5781                         }
5782                         dv->hrxq = hrxq;
5783                         dv->actions[n++] = dv->hrxq->action;
5784                 }
5785                 dv->flow =
5786                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
5787                                                   (void *)&dv->value, n,
5788                                                   dv->actions);
5789                 if (!dv->flow) {
5790                         rte_flow_error_set(error, errno,
5791                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5792                                            NULL,
5793                                            "hardware refuses to create flow");
5794                         goto error;
5795                 }
5796                 if (priv->vmwa_context &&
5797                     dev_flow->dv.vf_vlan.tag &&
5798                     !dev_flow->dv.vf_vlan.created) {
5799                         /*
5800                          * The rule contains the VLAN pattern.
5801                          * For VF we are going to create VLAN
5802                          * interface to make hypervisor set correct
5803                          * e-Switch vport context.
5804                          */
5805                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
5806                 }
5807         }
5808         return 0;
5809 error:
5810         err = rte_errno; /* Save rte_errno before cleanup. */
5811         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5812                 struct mlx5_flow_dv *dv = &dev_flow->dv;
5813                 if (dv->hrxq) {
5814                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
5815                                 mlx5_hrxq_drop_release(dev);
5816                         else
5817                                 mlx5_hrxq_release(dev, dv->hrxq);
5818                         dv->hrxq = NULL;
5819                 }
5820                 if (dev_flow->dv.vf_vlan.tag &&
5821                     dev_flow->dv.vf_vlan.created)
5822                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
5823         }
5824         rte_errno = err; /* Restore rte_errno. */
5825         return -rte_errno;
5826 }
5827
5828 /**
5829  * Release the flow matcher.
5830  *
5831  * @param dev
5832  *   Pointer to Ethernet device.
5833  * @param flow
5834  *   Pointer to mlx5_flow.
5835  *
5836  * @return
5837  *   1 while a reference on it exists, 0 when freed.
5838  */
5839 static int
5840 flow_dv_matcher_release(struct rte_eth_dev *dev,
5841                         struct mlx5_flow *flow)
5842 {
5843         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
5844         struct mlx5_priv *priv = dev->data->dev_private;
5845         struct mlx5_ibv_shared *sh = priv->sh;
5846         struct mlx5_flow_tbl_resource *tbl;
5847
5848         assert(matcher->matcher_object);
5849         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
5850                 dev->data->port_id, (void *)matcher,
5851                 rte_atomic32_read(&matcher->refcnt));
5852         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
5853                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
5854                            (matcher->matcher_object));
5855                 LIST_REMOVE(matcher, next);
5856                 if (matcher->egress)
5857                         tbl = &sh->tx_tbl[matcher->group];
5858                 else
5859                         tbl = &sh->rx_tbl[matcher->group];
5860                 flow_dv_tbl_resource_release(tbl);
5861                 rte_free(matcher);
5862                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
5863                         dev->data->port_id, (void *)matcher);
5864                 return 0;
5865         }
5866         return 1;
5867 }
5868
5869 /**
5870  * Release an encap/decap resource.
5871  *
5872  * @param flow
5873  *   Pointer to mlx5_flow.
5874  *
5875  * @return
5876  *   1 while a reference on it exists, 0 when freed.
5877  */
5878 static int
5879 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
5880 {
5881         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
5882                                                 flow->dv.encap_decap;
5883
5884         assert(cache_resource->verbs_action);
5885         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
5886                 (void *)cache_resource,
5887                 rte_atomic32_read(&cache_resource->refcnt));
5888         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5889                 claim_zero(mlx5_glue->destroy_flow_action
5890                                 (cache_resource->verbs_action));
5891                 LIST_REMOVE(cache_resource, next);
5892                 rte_free(cache_resource);
5893                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
5894                         (void *)cache_resource);
5895                 return 0;
5896         }
5897         return 1;
5898 }
5899
5900 /**
5901  * Release an jump to table action resource.
5902  *
5903  * @param flow
5904  *   Pointer to mlx5_flow.
5905  *
5906  * @return
5907  *   1 while a reference on it exists, 0 when freed.
5908  */
5909 static int
5910 flow_dv_jump_tbl_resource_release(struct mlx5_flow *flow)
5911 {
5912         struct mlx5_flow_dv_jump_tbl_resource *cache_resource =
5913                                                 flow->dv.jump;
5914
5915         assert(cache_resource->action);
5916         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
5917                 (void *)cache_resource,
5918                 rte_atomic32_read(&cache_resource->refcnt));
5919         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5920                 claim_zero(mlx5_glue->destroy_flow_action
5921                                 (cache_resource->action));
5922                 LIST_REMOVE(cache_resource, next);
5923                 flow_dv_tbl_resource_release(cache_resource->tbl);
5924                 rte_free(cache_resource);
5925                 DRV_LOG(DEBUG, "jump table resource %p: removed",
5926                         (void *)cache_resource);
5927                 return 0;
5928         }
5929         return 1;
5930 }
5931
5932 /**
5933  * Release a modify-header resource.
5934  *
5935  * @param flow
5936  *   Pointer to mlx5_flow.
5937  *
5938  * @return
5939  *   1 while a reference on it exists, 0 when freed.
5940  */
5941 static int
5942 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
5943 {
5944         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
5945                                                 flow->dv.modify_hdr;
5946
5947         assert(cache_resource->verbs_action);
5948         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
5949                 (void *)cache_resource,
5950                 rte_atomic32_read(&cache_resource->refcnt));
5951         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5952                 claim_zero(mlx5_glue->destroy_flow_action
5953                                 (cache_resource->verbs_action));
5954                 LIST_REMOVE(cache_resource, next);
5955                 rte_free(cache_resource);
5956                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
5957                         (void *)cache_resource);
5958                 return 0;
5959         }
5960         return 1;
5961 }
5962
5963 /**
5964  * Release port ID action resource.
5965  *
5966  * @param flow
5967  *   Pointer to mlx5_flow.
5968  *
5969  * @return
5970  *   1 while a reference on it exists, 0 when freed.
5971  */
5972 static int
5973 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
5974 {
5975         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
5976                 flow->dv.port_id_action;
5977
5978         assert(cache_resource->action);
5979         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
5980                 (void *)cache_resource,
5981                 rte_atomic32_read(&cache_resource->refcnt));
5982         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5983                 claim_zero(mlx5_glue->destroy_flow_action
5984                                 (cache_resource->action));
5985                 LIST_REMOVE(cache_resource, next);
5986                 rte_free(cache_resource);
5987                 DRV_LOG(DEBUG, "port id action resource %p: removed",
5988                         (void *)cache_resource);
5989                 return 0;
5990         }
5991         return 1;
5992 }
5993
5994 /**
5995  * Release push vlan action resource.
5996  *
5997  * @param flow
5998  *   Pointer to mlx5_flow.
5999  *
6000  * @return
6001  *   1 while a reference on it exists, 0 when freed.
6002  */
6003 static int
6004 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
6005 {
6006         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
6007                 flow->dv.push_vlan_res;
6008
6009         assert(cache_resource->action);
6010         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
6011                 (void *)cache_resource,
6012                 rte_atomic32_read(&cache_resource->refcnt));
6013         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
6014                 claim_zero(mlx5_glue->destroy_flow_action
6015                                 (cache_resource->action));
6016                 LIST_REMOVE(cache_resource, next);
6017                 rte_free(cache_resource);
6018                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
6019                         (void *)cache_resource);
6020                 return 0;
6021         }
6022         return 1;
6023 }
6024
6025 /**
6026  * Remove the flow from the NIC but keeps it in memory.
6027  *
6028  * @param[in] dev
6029  *   Pointer to Ethernet device.
6030  * @param[in, out] flow
6031  *   Pointer to flow structure.
6032  */
6033 static void
6034 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
6035 {
6036         struct mlx5_flow_dv *dv;
6037         struct mlx5_flow *dev_flow;
6038
6039         if (!flow)
6040                 return;
6041         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
6042                 dv = &dev_flow->dv;
6043                 if (dv->flow) {
6044                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
6045                         dv->flow = NULL;
6046                 }
6047                 if (dv->hrxq) {
6048                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
6049                                 mlx5_hrxq_drop_release(dev);
6050                         else
6051                                 mlx5_hrxq_release(dev, dv->hrxq);
6052                         dv->hrxq = NULL;
6053                 }
6054                 if (dev_flow->dv.vf_vlan.tag &&
6055                     dev_flow->dv.vf_vlan.created)
6056                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
6057         }
6058 }
6059
6060 /**
6061  * Remove the flow from the NIC and the memory.
6062  *
6063  * @param[in] dev
6064  *   Pointer to the Ethernet device structure.
6065  * @param[in, out] flow
6066  *   Pointer to flow structure.
6067  */
6068 static void
6069 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
6070 {
6071         struct mlx5_flow *dev_flow;
6072
6073         if (!flow)
6074                 return;
6075         flow_dv_remove(dev, flow);
6076         if (flow->counter) {
6077                 flow_dv_counter_release(dev, flow->counter);
6078                 flow->counter = NULL;
6079         }
6080         if (flow->tag_resource) {
6081                 flow_dv_tag_release(dev, flow->tag_resource);
6082                 flow->tag_resource = NULL;
6083         }
6084         while (!LIST_EMPTY(&flow->dev_flows)) {
6085                 dev_flow = LIST_FIRST(&flow->dev_flows);
6086                 LIST_REMOVE(dev_flow, next);
6087                 if (dev_flow->dv.matcher)
6088                         flow_dv_matcher_release(dev, dev_flow);
6089                 if (dev_flow->dv.encap_decap)
6090                         flow_dv_encap_decap_resource_release(dev_flow);
6091                 if (dev_flow->dv.modify_hdr)
6092                         flow_dv_modify_hdr_resource_release(dev_flow);
6093                 if (dev_flow->dv.jump)
6094                         flow_dv_jump_tbl_resource_release(dev_flow);
6095                 if (dev_flow->dv.port_id_action)
6096                         flow_dv_port_id_action_resource_release(dev_flow);
6097                 if (dev_flow->dv.push_vlan_res)
6098                         flow_dv_push_vlan_action_resource_release(dev_flow);
6099                 rte_free(dev_flow);
6100         }
6101 }
6102
6103 /**
6104  * Query a dv flow  rule for its statistics via devx.
6105  *
6106  * @param[in] dev
6107  *   Pointer to Ethernet device.
6108  * @param[in] flow
6109  *   Pointer to the sub flow.
6110  * @param[out] data
6111  *   data retrieved by the query.
6112  * @param[out] error
6113  *   Perform verbose error reporting if not NULL.
6114  *
6115  * @return
6116  *   0 on success, a negative errno value otherwise and rte_errno is set.
6117  */
6118 static int
6119 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
6120                     void *data, struct rte_flow_error *error)
6121 {
6122         struct mlx5_priv *priv = dev->data->dev_private;
6123         struct rte_flow_query_count *qc = data;
6124
6125         if (!priv->config.devx)
6126                 return rte_flow_error_set(error, ENOTSUP,
6127                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6128                                           NULL,
6129                                           "counters are not supported");
6130         if (flow->counter) {
6131                 uint64_t pkts, bytes;
6132                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
6133                                                &bytes);
6134
6135                 if (err)
6136                         return rte_flow_error_set(error, -err,
6137                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6138                                         NULL, "cannot read counters");
6139                 qc->hits_set = 1;
6140                 qc->bytes_set = 1;
6141                 qc->hits = pkts - flow->counter->hits;
6142                 qc->bytes = bytes - flow->counter->bytes;
6143                 if (qc->reset) {
6144                         flow->counter->hits = pkts;
6145                         flow->counter->bytes = bytes;
6146                 }
6147                 return 0;
6148         }
6149         return rte_flow_error_set(error, EINVAL,
6150                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6151                                   NULL,
6152                                   "counters are not available");
6153 }
6154
6155 /**
6156  * Query a flow.
6157  *
6158  * @see rte_flow_query()
6159  * @see rte_flow_ops
6160  */
6161 static int
6162 flow_dv_query(struct rte_eth_dev *dev,
6163               struct rte_flow *flow __rte_unused,
6164               const struct rte_flow_action *actions __rte_unused,
6165               void *data __rte_unused,
6166               struct rte_flow_error *error __rte_unused)
6167 {
6168         int ret = -EINVAL;
6169
6170         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
6171                 switch (actions->type) {
6172                 case RTE_FLOW_ACTION_TYPE_VOID:
6173                         break;
6174                 case RTE_FLOW_ACTION_TYPE_COUNT:
6175                         ret = flow_dv_query_count(dev, flow, data, error);
6176                         break;
6177                 default:
6178                         return rte_flow_error_set(error, ENOTSUP,
6179                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6180                                                   actions,
6181                                                   "action not supported");
6182                 }
6183         }
6184         return ret;
6185 }
6186
6187 /*
6188  * Mutex-protected thunk to flow_dv_translate().
6189  */
6190 static int
6191 flow_d_translate(struct rte_eth_dev *dev,
6192                  struct mlx5_flow *dev_flow,
6193                  const struct rte_flow_attr *attr,
6194                  const struct rte_flow_item items[],
6195                  const struct rte_flow_action actions[],
6196                  struct rte_flow_error *error)
6197 {
6198         int ret;
6199
6200         flow_d_shared_lock(dev);
6201         ret = flow_dv_translate(dev, dev_flow, attr, items, actions, error);
6202         flow_d_shared_unlock(dev);
6203         return ret;
6204 }
6205
6206 /*
6207  * Mutex-protected thunk to flow_dv_apply().
6208  */
6209 static int
6210 flow_d_apply(struct rte_eth_dev *dev,
6211              struct rte_flow *flow,
6212              struct rte_flow_error *error)
6213 {
6214         int ret;
6215
6216         flow_d_shared_lock(dev);
6217         ret = flow_dv_apply(dev, flow, error);
6218         flow_d_shared_unlock(dev);
6219         return ret;
6220 }
6221
6222 /*
6223  * Mutex-protected thunk to flow_dv_remove().
6224  */
6225 static void
6226 flow_d_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
6227 {
6228         flow_d_shared_lock(dev);
6229         flow_dv_remove(dev, flow);
6230         flow_d_shared_unlock(dev);
6231 }
6232
6233 /*
6234  * Mutex-protected thunk to flow_dv_destroy().
6235  */
6236 static void
6237 flow_d_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
6238 {
6239         flow_d_shared_lock(dev);
6240         flow_dv_destroy(dev, flow);
6241         flow_d_shared_unlock(dev);
6242 }
6243
6244 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
6245         .validate = flow_dv_validate,
6246         .prepare = flow_dv_prepare,
6247         .translate = flow_d_translate,
6248         .apply = flow_d_apply,
6249         .remove = flow_d_remove,
6250         .destroy = flow_d_destroy,
6251         .query = flow_dv_query,
6252 };
6253
6254 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */