drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_glue.h"
  33 #include "mlx5_flow.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  38
  39 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  40 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  41 #endif
  42
  43 #ifndef HAVE_MLX5DV_DR_ESWITCH
  44 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  45 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  46 #endif
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR
  50 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  51 #endif
  52
  53 union flow_dv_attr {
  54         struct {
  55                 uint32_t valid:1;
  56                 uint32_t ipv4:1;
  57                 uint32_t ipv6:1;
  58                 uint32_t tcp:1;
  59                 uint32_t udp:1;
  60                 uint32_t reserved:27;
  61         };
  62         uint32_t attr;
  63 };
  64
  65 /**
  66  * Initialize flow attributes structure according to flow items' types.
  67  *
  68  * @param[in] item
  69  *   Pointer to item specification.
  70  * @param[out] attr
  71  *   Pointer to flow attributes structure.
  72  */
  73 static void
  74 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  75 {
  76         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  77                 switch (item->type) {
  78                 case RTE_FLOW_ITEM_TYPE_IPV4:
  79                         attr->ipv4 = 1;
  80                         break;
  81                 case RTE_FLOW_ITEM_TYPE_IPV6:
  82                         attr->ipv6 = 1;
  83                         break;
  84                 case RTE_FLOW_ITEM_TYPE_UDP:
  85                         attr->udp = 1;
  86                         break;
  87                 case RTE_FLOW_ITEM_TYPE_TCP:
  88                         attr->tcp = 1;
  89                         break;
  90                 default:
  91                         break;
  92                 }
  93         }
  94         attr->valid = 1;
  95 }
  96
  97 struct field_modify_info {
  98         uint32_t size; /* Size of field in protocol header, in bytes. */
  99         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 100         enum mlx5_modification_field id;
 101 };
 102
 103 struct field_modify_info modify_eth[] = {
 104         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 105         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 106         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 107         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 108         {0, 0, 0},
 109 };
 110
 111 struct field_modify_info modify_ipv4[] = {
 112         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 113         {4, 12, MLX5_MODI_OUT_SIPV4},
 114         {4, 16, MLX5_MODI_OUT_DIPV4},
 115         {0, 0, 0},
 116 };
 117
 118 struct field_modify_info modify_ipv6[] = {
 119         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 120         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 121         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 122         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 123         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 124         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 125         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 126         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 127         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 128         {0, 0, 0},
 129 };
 130
 131 struct field_modify_info modify_udp[] = {
 132         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 133         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 134         {0, 0, 0},
 135 };
 136
 137 struct field_modify_info modify_tcp[] = {
 138         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 139         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 140         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 141         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 142         {0, 0, 0},
 143 };
 144
 145 static void
 146 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item, uint64_t *flags)
 147 {
 148         uint8_t next_protocol = 0xFF;
 149
 150         if (item->mask != NULL) {
 151                 switch (item->type) {
 152                 case RTE_FLOW_ITEM_TYPE_IPV4:
 153                         next_protocol =
 154                                 ((const struct rte_flow_item_ipv4 *)
 155                                  (item->spec))->hdr.next_proto_id;
 156                         next_protocol &=
 157                                 ((const struct rte_flow_item_ipv4 *)
 158                                  (item->mask))->hdr.next_proto_id;
 159                         break;
 160                 case RTE_FLOW_ITEM_TYPE_IPV6:
 161                         next_protocol =
 162                                 ((const struct rte_flow_item_ipv6 *)
 163                                  (item->spec))->hdr.proto;
 164                         next_protocol &=
 165                                 ((const struct rte_flow_item_ipv6 *)
 166                                  (item->mask))->hdr.proto;
 167                         break;
 168                 default:
 169                         break;
 170                 }
 171         }
 172         if (next_protocol == IPPROTO_IPIP)
 173                 *flags |= MLX5_FLOW_LAYER_IPIP;
 174         if (next_protocol == IPPROTO_IPV6)
 175                 *flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 176 }
 177
 178 /**
 179  * Acquire the synchronizing object to protect multithreaded access
 180  * to shared dv context. Lock occurs only if context is actually
 181  * shared, i.e. we have multiport IB device and representors are
 182  * created.
 183  *
 184  * @param[in] dev
 185  *   Pointer to the rte_eth_dev structure.
 186  */
 187 static void
 188 flow_d_shared_lock(struct rte_eth_dev *dev)
 189 {
 190         struct mlx5_priv *priv = dev->data->dev_private;
 191         struct mlx5_ibv_shared *sh = priv->sh;
 192
 193         if (sh->dv_refcnt > 1) {
 194                 int ret;
 195
 196                 ret = pthread_mutex_lock(&sh->dv_mutex);
 197                 assert(!ret);
 198                 (void)ret;
 199         }
 200 }
 201
 202 static void
 203 flow_d_shared_unlock(struct rte_eth_dev *dev)
 204 {
 205         struct mlx5_priv *priv = dev->data->dev_private;
 206         struct mlx5_ibv_shared *sh = priv->sh;
 207
 208         if (sh->dv_refcnt > 1) {
 209                 int ret;
 210
 211                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 212                 assert(!ret);
 213                 (void)ret;
 214         }
 215 }
 216
 217 /**
 218  * Convert modify-header action to DV specification.
 219  *
 220  * @param[in] item
 221  *   Pointer to item specification.
 222  * @param[in] field
 223  *   Pointer to field modification information.
 224  * @param[in,out] resource
 225  *   Pointer to the modify-header resource.
 226  * @param[in] type
 227  *   Type of modification.
 228  * @param[out] error
 229  *   Pointer to the error structure.
 230  *
 231  * @return
 232  *   0 on success, a negative errno value otherwise and rte_errno is set.
 233  */
 234 static int
 235 flow_dv_convert_modify_action(struct rte_flow_item *item,
 236                               struct field_modify_info *field,
 237                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 238                               uint32_t type,
 239                               struct rte_flow_error *error)
 240 {
 241         uint32_t i = resource->actions_num;
 242         struct mlx5_modification_cmd *actions = resource->actions;
 243         const uint8_t *spec = item->spec;
 244         const uint8_t *mask = item->mask;
 245         uint32_t set;
 246
 247         while (field->size) {
 248                 set = 0;
 249                 /* Generate modify command for each mask segment. */
 250                 memcpy(&set, &mask[field->offset], field->size);
 251                 if (set) {
 252                         if (i >= MLX5_MODIFY_NUM)
 253                                 return rte_flow_error_set(error, EINVAL,
 254                                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 255                                          "too many items to modify");
 256                         actions[i].action_type = type;
 257                         actions[i].field = field->id;
 258                         actions[i].length = field->size ==
 259                                         4 ? 0 : field->size * 8;
 260                         rte_memcpy(&actions[i].data[4 - field->size],
 261                                    &spec[field->offset], field->size);
 262                         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 263                         ++i;
 264                 }
 265                 if (resource->actions_num != i)
 266                         resource->actions_num = i;
 267                 field++;
 268         }
 269         if (!resource->actions_num)
 270                 return rte_flow_error_set(error, EINVAL,
 271                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 272                                           "invalid modification flow item");
 273         return 0;
 274 }
 275
 276 /**
 277  * Convert modify-header set IPv4 address action to DV specification.
 278  *
 279  * @param[in,out] resource
 280  *   Pointer to the modify-header resource.
 281  * @param[in] action
 282  *   Pointer to action specification.
 283  * @param[out] error
 284  *   Pointer to the error structure.
 285  *
 286  * @return
 287  *   0 on success, a negative errno value otherwise and rte_errno is set.
 288  */
 289 static int
 290 flow_dv_convert_action_modify_ipv4
 291                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 292                          const struct rte_flow_action *action,
 293                          struct rte_flow_error *error)
 294 {
 295         const struct rte_flow_action_set_ipv4 *conf =
 296                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 297         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 298         struct rte_flow_item_ipv4 ipv4;
 299         struct rte_flow_item_ipv4 ipv4_mask;
 300
 301         memset(&ipv4, 0, sizeof(ipv4));
 302         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 303         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 304                 ipv4.hdr.src_addr = conf->ipv4_addr;
 305                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 306         } else {
 307                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 308                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 309         }
 310         item.spec = &ipv4;
 311         item.mask = &ipv4_mask;
 312         return flow_dv_convert_modify_action(&item, modify_ipv4, resource,
 313                                              MLX5_MODIFICATION_TYPE_SET, error);
 314 }
 315
 316 /**
 317  * Convert modify-header set IPv6 address action to DV specification.
 318  *
 319  * @param[in,out] resource
 320  *   Pointer to the modify-header resource.
 321  * @param[in] action
 322  *   Pointer to action specification.
 323  * @param[out] error
 324  *   Pointer to the error structure.
 325  *
 326  * @return
 327  *   0 on success, a negative errno value otherwise and rte_errno is set.
 328  */
 329 static int
 330 flow_dv_convert_action_modify_ipv6
 331                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 332                          const struct rte_flow_action *action,
 333                          struct rte_flow_error *error)
 334 {
 335         const struct rte_flow_action_set_ipv6 *conf =
 336                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 337         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 338         struct rte_flow_item_ipv6 ipv6;
 339         struct rte_flow_item_ipv6 ipv6_mask;
 340
 341         memset(&ipv6, 0, sizeof(ipv6));
 342         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 343         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 344                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 345                        sizeof(ipv6.hdr.src_addr));
 346                 memcpy(&ipv6_mask.hdr.src_addr,
 347                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 348                        sizeof(ipv6.hdr.src_addr));
 349         } else {
 350                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 351                        sizeof(ipv6.hdr.dst_addr));
 352                 memcpy(&ipv6_mask.hdr.dst_addr,
 353                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 354                        sizeof(ipv6.hdr.dst_addr));
 355         }
 356         item.spec = &ipv6;
 357         item.mask = &ipv6_mask;
 358         return flow_dv_convert_modify_action(&item, modify_ipv6, resource,
 359                                              MLX5_MODIFICATION_TYPE_SET, error);
 360 }
 361
 362 /**
 363  * Convert modify-header set MAC address action to DV specification.
 364  *
 365  * @param[in,out] resource
 366  *   Pointer to the modify-header resource.
 367  * @param[in] action
 368  *   Pointer to action specification.
 369  * @param[out] error
 370  *   Pointer to the error structure.
 371  *
 372  * @return
 373  *   0 on success, a negative errno value otherwise and rte_errno is set.
 374  */
 375 static int
 376 flow_dv_convert_action_modify_mac
 377                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 378                          const struct rte_flow_action *action,
 379                          struct rte_flow_error *error)
 380 {
 381         const struct rte_flow_action_set_mac *conf =
 382                 (const struct rte_flow_action_set_mac *)(action->conf);
 383         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 384         struct rte_flow_item_eth eth;
 385         struct rte_flow_item_eth eth_mask;
 386
 387         memset(&eth, 0, sizeof(eth));
 388         memset(&eth_mask, 0, sizeof(eth_mask));
 389         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 390                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 391                        sizeof(eth.src.addr_bytes));
 392                 memcpy(&eth_mask.src.addr_bytes,
 393                        &rte_flow_item_eth_mask.src.addr_bytes,
 394                        sizeof(eth_mask.src.addr_bytes));
 395         } else {
 396                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 397                        sizeof(eth.dst.addr_bytes));
 398                 memcpy(&eth_mask.dst.addr_bytes,
 399                        &rte_flow_item_eth_mask.dst.addr_bytes,
 400                        sizeof(eth_mask.dst.addr_bytes));
 401         }
 402         item.spec = &eth;
 403         item.mask = &eth_mask;
 404         return flow_dv_convert_modify_action(&item, modify_eth, resource,
 405                                              MLX5_MODIFICATION_TYPE_SET, error);
 406 }
 407
 408 /**
 409  * Convert modify-header set TP action to DV specification.
 410  *
 411  * @param[in,out] resource
 412  *   Pointer to the modify-header resource.
 413  * @param[in] action
 414  *   Pointer to action specification.
 415  * @param[in] items
 416  *   Pointer to rte_flow_item objects list.
 417  * @param[in] attr
 418  *   Pointer to flow attributes structure.
 419  * @param[out] error
 420  *   Pointer to the error structure.
 421  *
 422  * @return
 423  *   0 on success, a negative errno value otherwise and rte_errno is set.
 424  */
 425 static int
 426 flow_dv_convert_action_modify_tp
 427                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 428                          const struct rte_flow_action *action,
 429                          const struct rte_flow_item *items,
 430                          union flow_dv_attr *attr,
 431                          struct rte_flow_error *error)
 432 {
 433         const struct rte_flow_action_set_tp *conf =
 434                 (const struct rte_flow_action_set_tp *)(action->conf);
 435         struct rte_flow_item item;
 436         struct rte_flow_item_udp udp;
 437         struct rte_flow_item_udp udp_mask;
 438         struct rte_flow_item_tcp tcp;
 439         struct rte_flow_item_tcp tcp_mask;
 440         struct field_modify_info *field;
 441
 442         if (!attr->valid)
 443                 flow_dv_attr_init(items, attr);
 444         if (attr->udp) {
 445                 memset(&udp, 0, sizeof(udp));
 446                 memset(&udp_mask, 0, sizeof(udp_mask));
 447                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 448                         udp.hdr.src_port = conf->port;
 449                         udp_mask.hdr.src_port =
 450                                         rte_flow_item_udp_mask.hdr.src_port;
 451                 } else {
 452                         udp.hdr.dst_port = conf->port;
 453                         udp_mask.hdr.dst_port =
 454                                         rte_flow_item_udp_mask.hdr.dst_port;
 455                 }
 456                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 457                 item.spec = &udp;
 458                 item.mask = &udp_mask;
 459                 field = modify_udp;
 460         }
 461         if (attr->tcp) {
 462                 memset(&tcp, 0, sizeof(tcp));
 463                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 464                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 465                         tcp.hdr.src_port = conf->port;
 466                         tcp_mask.hdr.src_port =
 467                                         rte_flow_item_tcp_mask.hdr.src_port;
 468                 } else {
 469                         tcp.hdr.dst_port = conf->port;
 470                         tcp_mask.hdr.dst_port =
 471                                         rte_flow_item_tcp_mask.hdr.dst_port;
 472                 }
 473                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 474                 item.spec = &tcp;
 475                 item.mask = &tcp_mask;
 476                 field = modify_tcp;
 477         }
 478         return flow_dv_convert_modify_action(&item, field, resource,
 479                                              MLX5_MODIFICATION_TYPE_SET, error);
 480 }
 481
 482 /**
 483  * Convert modify-header set TTL action to DV specification.
 484  *
 485  * @param[in,out] resource
 486  *   Pointer to the modify-header resource.
 487  * @param[in] action
 488  *   Pointer to action specification.
 489  * @param[in] items
 490  *   Pointer to rte_flow_item objects list.
 491  * @param[in] attr
 492  *   Pointer to flow attributes structure.
 493  * @param[out] error
 494  *   Pointer to the error structure.
 495  *
 496  * @return
 497  *   0 on success, a negative errno value otherwise and rte_errno is set.
 498  */
 499 static int
 500 flow_dv_convert_action_modify_ttl
 501                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 502                          const struct rte_flow_action *action,
 503                          const struct rte_flow_item *items,
 504                          union flow_dv_attr *attr,
 505                          struct rte_flow_error *error)
 506 {
 507         const struct rte_flow_action_set_ttl *conf =
 508                 (const struct rte_flow_action_set_ttl *)(action->conf);
 509         struct rte_flow_item item;
 510         struct rte_flow_item_ipv4 ipv4;
 511         struct rte_flow_item_ipv4 ipv4_mask;
 512         struct rte_flow_item_ipv6 ipv6;
 513         struct rte_flow_item_ipv6 ipv6_mask;
 514         struct field_modify_info *field;
 515
 516         if (!attr->valid)
 517                 flow_dv_attr_init(items, attr);
 518         if (attr->ipv4) {
 519                 memset(&ipv4, 0, sizeof(ipv4));
 520                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 521                 ipv4.hdr.time_to_live = conf->ttl_value;
 522                 ipv4_mask.hdr.time_to_live = 0xFF;
 523                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 524                 item.spec = &ipv4;
 525                 item.mask = &ipv4_mask;
 526                 field = modify_ipv4;
 527         }
 528         if (attr->ipv6) {
 529                 memset(&ipv6, 0, sizeof(ipv6));
 530                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 531                 ipv6.hdr.hop_limits = conf->ttl_value;
 532                 ipv6_mask.hdr.hop_limits = 0xFF;
 533                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 534                 item.spec = &ipv6;
 535                 item.mask = &ipv6_mask;
 536                 field = modify_ipv6;
 537         }
 538         return flow_dv_convert_modify_action(&item, field, resource,
 539                                              MLX5_MODIFICATION_TYPE_SET, error);
 540 }
 541
 542 /**
 543  * Convert modify-header decrement TTL action to DV specification.
 544  *
 545  * @param[in,out] resource
 546  *   Pointer to the modify-header resource.
 547  * @param[in] action
 548  *   Pointer to action specification.
 549  * @param[in] items
 550  *   Pointer to rte_flow_item objects list.
 551  * @param[in] attr
 552  *   Pointer to flow attributes structure.
 553  * @param[out] error
 554  *   Pointer to the error structure.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 flow_dv_convert_action_modify_dec_ttl
 561                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 562                          const struct rte_flow_item *items,
 563                          union flow_dv_attr *attr,
 564                          struct rte_flow_error *error)
 565 {
 566         struct rte_flow_item item;
 567         struct rte_flow_item_ipv4 ipv4;
 568         struct rte_flow_item_ipv4 ipv4_mask;
 569         struct rte_flow_item_ipv6 ipv6;
 570         struct rte_flow_item_ipv6 ipv6_mask;
 571         struct field_modify_info *field;
 572
 573         if (!attr->valid)
 574                 flow_dv_attr_init(items, attr);
 575         if (attr->ipv4) {
 576                 memset(&ipv4, 0, sizeof(ipv4));
 577                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 578                 ipv4.hdr.time_to_live = 0xFF;
 579                 ipv4_mask.hdr.time_to_live = 0xFF;
 580                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 581                 item.spec = &ipv4;
 582                 item.mask = &ipv4_mask;
 583                 field = modify_ipv4;
 584         }
 585         if (attr->ipv6) {
 586                 memset(&ipv6, 0, sizeof(ipv6));
 587                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 588                 ipv6.hdr.hop_limits = 0xFF;
 589                 ipv6_mask.hdr.hop_limits = 0xFF;
 590                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 591                 item.spec = &ipv6;
 592                 item.mask = &ipv6_mask;
 593                 field = modify_ipv6;
 594         }
 595         return flow_dv_convert_modify_action(&item, field, resource,
 596                                              MLX5_MODIFICATION_TYPE_ADD, error);
 597 }
 598
 599 /**
 600  * Convert modify-header increment/decrement TCP Sequence number
 601  * to DV specification.
 602  *
 603  * @param[in,out] resource
 604  *   Pointer to the modify-header resource.
 605  * @param[in] action
 606  *   Pointer to action specification.
 607  * @param[out] error
 608  *   Pointer to the error structure.
 609  *
 610  * @return
 611  *   0 on success, a negative errno value otherwise and rte_errno is set.
 612  */
 613 static int
 614 flow_dv_convert_action_modify_tcp_seq
 615                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 616                          const struct rte_flow_action *action,
 617                          struct rte_flow_error *error)
 618 {
 619         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 620         uint64_t value = rte_be_to_cpu_32(*conf);
 621         struct rte_flow_item item;
 622         struct rte_flow_item_tcp tcp;
 623         struct rte_flow_item_tcp tcp_mask;
 624
 625         memset(&tcp, 0, sizeof(tcp));
 626         memset(&tcp_mask, 0, sizeof(tcp_mask));
 627         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 628                 /*
 629                  * The HW has no decrement operation, only increment operation.
 630                  * To simulate decrement X from Y using increment operation
 631                  * we need to add UINT32_MAX X times to Y.
 632                  * Each adding of UINT32_MAX decrements Y by 1.
 633                  */
 634                 value *= UINT32_MAX;
 635         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 636         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 637         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 638         item.spec = &tcp;
 639         item.mask = &tcp_mask;
 640         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 641                                              MLX5_MODIFICATION_TYPE_ADD, error);
 642 }
 643
 644 /**
 645  * Convert modify-header increment/decrement TCP Acknowledgment number
 646  * to DV specification.
 647  *
 648  * @param[in,out] resource
 649  *   Pointer to the modify-header resource.
 650  * @param[in] action
 651  *   Pointer to action specification.
 652  * @param[out] error
 653  *   Pointer to the error structure.
 654  *
 655  * @return
 656  *   0 on success, a negative errno value otherwise and rte_errno is set.
 657  */
 658 static int
 659 flow_dv_convert_action_modify_tcp_ack
 660                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 661                          const struct rte_flow_action *action,
 662                          struct rte_flow_error *error)
 663 {
 664         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 665         uint64_t value = rte_be_to_cpu_32(*conf);
 666         struct rte_flow_item item;
 667         struct rte_flow_item_tcp tcp;
 668         struct rte_flow_item_tcp tcp_mask;
 669
 670         memset(&tcp, 0, sizeof(tcp));
 671         memset(&tcp_mask, 0, sizeof(tcp_mask));
 672         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 673                 /*
 674                  * The HW has no decrement operation, only increment operation.
 675                  * To simulate decrement X from Y using increment operation
 676                  * we need to add UINT32_MAX X times to Y.
 677                  * Each adding of UINT32_MAX decrements Y by 1.
 678                  */
 679                 value *= UINT32_MAX;
 680         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 681         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 682         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 683         item.spec = &tcp;
 684         item.mask = &tcp_mask;
 685         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 686                                              MLX5_MODIFICATION_TYPE_ADD, error);
 687 }
 688
 689 /**
 690  * Validate META item.
 691  *
 692  * @param[in] dev
 693  *   Pointer to the rte_eth_dev structure.
 694  * @param[in] item
 695  *   Item specification.
 696  * @param[in] attr
 697  *   Attributes of flow that includes this item.
 698  * @param[out] error
 699  *   Pointer to error structure.
 700  *
 701  * @return
 702  *   0 on success, a negative errno value otherwise and rte_errno is set.
 703  */
 704 static int
 705 flow_dv_validate_item_meta(struct rte_eth_dev *dev,
 706                            const struct rte_flow_item *item,
 707                            const struct rte_flow_attr *attr,
 708                            struct rte_flow_error *error)
 709 {
 710         const struct rte_flow_item_meta *spec = item->spec;
 711         const struct rte_flow_item_meta *mask = item->mask;
 712         const struct rte_flow_item_meta nic_mask = {
 713                 .data = RTE_BE32(UINT32_MAX)
 714         };
 715         int ret;
 716         uint64_t offloads = dev->data->dev_conf.txmode.offloads;
 717
 718         if (!(offloads & DEV_TX_OFFLOAD_MATCH_METADATA))
 719                 return rte_flow_error_set(error, EPERM,
 720                                           RTE_FLOW_ERROR_TYPE_ITEM,
 721                                           NULL,
 722                                           "match on metadata offload "
 723                                           "configuration is off for this port");
 724         if (!spec)
 725                 return rte_flow_error_set(error, EINVAL,
 726                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 727                                           item->spec,
 728                                           "data cannot be empty");
 729         if (!spec->data)
 730                 return rte_flow_error_set(error, EINVAL,
 731                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 732                                           NULL,
 733                                           "data cannot be zero");
 734         if (!mask)
 735                 mask = &rte_flow_item_meta_mask;
 736         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
 737                                         (const uint8_t *)&nic_mask,
 738                                         sizeof(struct rte_flow_item_meta),
 739                                         error);
 740         if (ret < 0)
 741                 return ret;
 742         if (attr->ingress)
 743                 return rte_flow_error_set(error, ENOTSUP,
 744                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 745                                           NULL,
 746                                           "pattern not supported for ingress");
 747         return 0;
 748 }
 749
 750 /**
 751  * Validate vport item.
 752  *
 753  * @param[in] dev
 754  *   Pointer to the rte_eth_dev structure.
 755  * @param[in] item
 756  *   Item specification.
 757  * @param[in] attr
 758  *   Attributes of flow that includes this item.
 759  * @param[in] item_flags
 760  *   Bit-fields that holds the items detected until now.
 761  * @param[out] error
 762  *   Pointer to error structure.
 763  *
 764  * @return
 765  *   0 on success, a negative errno value otherwise and rte_errno is set.
 766  */
 767 static int
 768 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 769                               const struct rte_flow_item *item,
 770                               const struct rte_flow_attr *attr,
 771                               uint64_t item_flags,
 772                               struct rte_flow_error *error)
 773 {
 774         const struct rte_flow_item_port_id *spec = item->spec;
 775         const struct rte_flow_item_port_id *mask = item->mask;
 776         const struct rte_flow_item_port_id switch_mask = {
 777                         .id = 0xffffffff,
 778         };
 779         uint16_t esw_domain_id;
 780         uint16_t item_port_esw_domain_id;
 781         int ret;
 782
 783         if (!attr->transfer)
 784                 return rte_flow_error_set(error, EINVAL,
 785                                           RTE_FLOW_ERROR_TYPE_ITEM,
 786                                           NULL,
 787                                           "match on port id is valid only"
 788                                           " when transfer flag is enabled");
 789         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
 790                 return rte_flow_error_set(error, ENOTSUP,
 791                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 792                                           "multiple source ports are not"
 793                                           " supported");
 794         if (!mask)
 795                 mask = &switch_mask;
 796         if (mask->id != 0xffffffff)
 797                 return rte_flow_error_set(error, ENOTSUP,
 798                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
 799                                            mask,
 800                                            "no support for partial mask on"
 801                                            " \"id\" field");
 802         ret = mlx5_flow_item_acceptable
 803                                 (item, (const uint8_t *)mask,
 804                                  (const uint8_t *)&rte_flow_item_port_id_mask,
 805                                  sizeof(struct rte_flow_item_port_id),
 806                                  error);
 807         if (ret)
 808                 return ret;
 809         if (!spec)
 810                 return 0;
 811         ret = mlx5_port_to_eswitch_info(spec->id, &item_port_esw_domain_id,
 812                                         NULL);
 813         if (ret)
 814                 return rte_flow_error_set(error, -ret,
 815                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 816                                           "failed to obtain E-Switch info for"
 817                                           " port");
 818         ret = mlx5_port_to_eswitch_info(dev->data->port_id,
 819                                         &esw_domain_id, NULL);
 820         if (ret < 0)
 821                 return rte_flow_error_set(error, -ret,
 822                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 823                                           NULL,
 824                                           "failed to obtain E-Switch info");
 825         if (item_port_esw_domain_id != esw_domain_id)
 826                 return rte_flow_error_set(error, -ret,
 827                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 828                                           "cannot match on a port from a"
 829                                           " different E-Switch");
 830         return 0;
 831 }
 832
 833 /**
 834  * Validate count action.
 835  *
 836  * @param[in] dev
 837  *   device otr.
 838  * @param[out] error
 839  *   Pointer to error structure.
 840  *
 841  * @return
 842  *   0 on success, a negative errno value otherwise and rte_errno is set.
 843  */
 844 static int
 845 flow_dv_validate_action_count(struct rte_eth_dev *dev,
 846                               struct rte_flow_error *error)
 847 {
 848         struct mlx5_priv *priv = dev->data->dev_private;
 849
 850         if (!priv->config.devx)
 851                 goto notsup_err;
 852 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
 853         return 0;
 854 #endif
 855 notsup_err:
 856         return rte_flow_error_set
 857                       (error, ENOTSUP,
 858                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 859                        NULL,
 860                        "count action not supported");
 861 }
 862
 863 /**
 864  * Validate the L2 encap action.
 865  *
 866  * @param[in] action_flags
 867  *   Holds the actions detected until now.
 868  * @param[in] action
 869  *   Pointer to the encap action.
 870  * @param[in] attr
 871  *   Pointer to flow attributes
 872  * @param[out] error
 873  *   Pointer to error structure.
 874  *
 875  * @return
 876  *   0 on success, a negative errno value otherwise and rte_errno is set.
 877  */
 878 static int
 879 flow_dv_validate_action_l2_encap(uint64_t action_flags,
 880                                  const struct rte_flow_action *action,
 881                                  const struct rte_flow_attr *attr,
 882                                  struct rte_flow_error *error)
 883 {
 884         if (!(action->conf))
 885                 return rte_flow_error_set(error, EINVAL,
 886                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
 887                                           "configuration cannot be null");
 888         if (action_flags & MLX5_FLOW_ACTION_DROP)
 889                 return rte_flow_error_set(error, EINVAL,
 890                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 891                                           "can't drop and encap in same flow");
 892         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
 893                 return rte_flow_error_set(error, EINVAL,
 894                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 895                                           "can only have a single encap or"
 896                                           " decap action in a flow");
 897         if (!attr->transfer && attr->ingress)
 898                 return rte_flow_error_set(error, ENOTSUP,
 899                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 900                                           NULL,
 901                                           "encap action not supported for "
 902                                           "ingress");
 903         return 0;
 904 }
 905
 906 /**
 907  * Validate the L2 decap action.
 908  *
 909  * @param[in] action_flags
 910  *   Holds the actions detected until now.
 911  * @param[in] attr
 912  *   Pointer to flow attributes
 913  * @param[out] error
 914  *   Pointer to error structure.
 915  *
 916  * @return
 917  *   0 on success, a negative errno value otherwise and rte_errno is set.
 918  */
 919 static int
 920 flow_dv_validate_action_l2_decap(uint64_t action_flags,
 921                                  const struct rte_flow_attr *attr,
 922                                  struct rte_flow_error *error)
 923 {
 924         if (action_flags & MLX5_FLOW_ACTION_DROP)
 925                 return rte_flow_error_set(error, EINVAL,
 926                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 927                                           "can't drop and decap in same flow");
 928         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
 929                 return rte_flow_error_set(error, EINVAL,
 930                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 931                                           "can only have a single encap or"
 932                                           " decap action in a flow");
 933         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
 934                 return rte_flow_error_set(error, EINVAL,
 935                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 936                                           "can't have decap action after"
 937                                           " modify action");
 938         if (attr->egress)
 939                 return rte_flow_error_set(error, ENOTSUP,
 940                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
 941                                           NULL,
 942                                           "decap action not supported for "
 943                                           "egress");
 944         return 0;
 945 }
 946
 947 /**
 948  * Validate the raw encap action.
 949  *
 950  * @param[in] action_flags
 951  *   Holds the actions detected until now.
 952  * @param[in] action
 953  *   Pointer to the encap action.
 954  * @param[in] attr
 955  *   Pointer to flow attributes
 956  * @param[out] error
 957  *   Pointer to error structure.
 958  *
 959  * @return
 960  *   0 on success, a negative errno value otherwise and rte_errno is set.
 961  */
 962 static int
 963 flow_dv_validate_action_raw_encap(uint64_t action_flags,
 964                                   const struct rte_flow_action *action,
 965                                   const struct rte_flow_attr *attr,
 966                                   struct rte_flow_error *error)
 967 {
 968         if (!(action->conf))
 969                 return rte_flow_error_set(error, EINVAL,
 970                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
 971                                           "configuration cannot be null");
 972         if (action_flags & MLX5_FLOW_ACTION_DROP)
 973                 return rte_flow_error_set(error, EINVAL,
 974                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 975                                           "can't drop and encap in same flow");
 976         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
 977                 return rte_flow_error_set(error, EINVAL,
 978                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 979                                           "can only have a single encap"
 980                                           " action in a flow");
 981         /* encap without preceding decap is not supported for ingress */
 982         if (!attr->transfer &&  attr->ingress &&
 983             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
 984                 return rte_flow_error_set(error, ENOTSUP,
 985                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 986                                           NULL,
 987                                           "encap action not supported for "
 988                                           "ingress");
 989         return 0;
 990 }
 991
 992 /**
 993  * Validate the raw decap action.
 994  *
 995  * @param[in] action_flags
 996  *   Holds the actions detected until now.
 997  * @param[in] action
 998  *   Pointer to the encap action.
 999  * @param[in] attr
1000  *   Pointer to flow attributes
1001  * @param[out] error
1002  *   Pointer to error structure.
1003  *
1004  * @return
1005  *   0 on success, a negative errno value otherwise and rte_errno is set.
1006  */
1007 static int
1008 flow_dv_validate_action_raw_decap(uint64_t action_flags,
1009                                   const struct rte_flow_action *action,
1010                                   const struct rte_flow_attr *attr,
1011                                   struct rte_flow_error *error)
1012 {
1013         if (action_flags & MLX5_FLOW_ACTION_DROP)
1014                 return rte_flow_error_set(error, EINVAL,
1015                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1016                                           "can't drop and decap in same flow");
1017         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1018                 return rte_flow_error_set(error, EINVAL,
1019                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1020                                           "can't have encap action before"
1021                                           " decap action");
1022         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
1023                 return rte_flow_error_set(error, EINVAL,
1024                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1025                                           "can only have a single decap"
1026                                           " action in a flow");
1027         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
1028                 return rte_flow_error_set(error, EINVAL,
1029                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1030                                           "can't have decap action after"
1031                                           " modify action");
1032         /* decap action is valid on egress only if it is followed by encap */
1033         if (attr->egress) {
1034                 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
1035                        action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
1036                        action++) {
1037                 }
1038                 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
1039                         return rte_flow_error_set
1040                                         (error, ENOTSUP,
1041                                          RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1042                                          NULL, "decap action not supported"
1043                                          " for egress");
1044         }
1045         return 0;
1046 }
1047
1048 /**
1049  * Find existing encap/decap resource or create and register a new one.
1050  *
1051  * @param dev[in, out]
1052  *   Pointer to rte_eth_dev structure.
1053  * @param[in, out] resource
1054  *   Pointer to encap/decap resource.
1055  * @parm[in, out] dev_flow
1056  *   Pointer to the dev_flow.
1057  * @param[out] error
1058  *   pointer to error structure.
1059  *
1060  * @return
1061  *   0 on success otherwise -errno and errno is set.
1062  */
1063 static int
1064 flow_dv_encap_decap_resource_register
1065                         (struct rte_eth_dev *dev,
1066                          struct mlx5_flow_dv_encap_decap_resource *resource,
1067                          struct mlx5_flow *dev_flow,
1068                          struct rte_flow_error *error)
1069 {
1070         struct mlx5_priv *priv = dev->data->dev_private;
1071         struct mlx5_ibv_shared *sh = priv->sh;
1072         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
1073         struct rte_flow *flow = dev_flow->flow;
1074         struct mlx5dv_dr_domain *domain;
1075
1076         resource->flags = flow->group ? 0 : 1;
1077         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
1078                 domain = sh->fdb_domain;
1079         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
1080                 domain = sh->rx_domain;
1081         else
1082                 domain = sh->tx_domain;
1083
1084         /* Lookup a matching resource from cache. */
1085         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
1086                 if (resource->reformat_type == cache_resource->reformat_type &&
1087                     resource->ft_type == cache_resource->ft_type &&
1088                     resource->flags == cache_resource->flags &&
1089                     resource->size == cache_resource->size &&
1090                     !memcmp((const void *)resource->buf,
1091                             (const void *)cache_resource->buf,
1092                             resource->size)) {
1093                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
1094                                 (void *)cache_resource,
1095                                 rte_atomic32_read(&cache_resource->refcnt));
1096                         rte_atomic32_inc(&cache_resource->refcnt);
1097                         dev_flow->dv.encap_decap = cache_resource;
1098                         return 0;
1099                 }
1100         }
1101         /* Register new encap/decap resource. */
1102         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1103         if (!cache_resource)
1104                 return rte_flow_error_set(error, ENOMEM,
1105                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1106                                           "cannot allocate resource memory");
1107         *cache_resource = *resource;
1108         cache_resource->verbs_action =
1109                 mlx5_glue->dv_create_flow_action_packet_reformat
1110                         (sh->ctx, cache_resource->reformat_type,
1111                          cache_resource->ft_type, domain, cache_resource->flags,
1112                          cache_resource->size,
1113                          (cache_resource->size ? cache_resource->buf : NULL));
1114         if (!cache_resource->verbs_action) {
1115                 rte_free(cache_resource);
1116                 return rte_flow_error_set(error, ENOMEM,
1117                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1118                                           NULL, "cannot create action");
1119         }
1120         rte_atomic32_init(&cache_resource->refcnt);
1121         rte_atomic32_inc(&cache_resource->refcnt);
1122         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
1123         dev_flow->dv.encap_decap = cache_resource;
1124         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
1125                 (void *)cache_resource,
1126                 rte_atomic32_read(&cache_resource->refcnt));
1127         return 0;
1128 }
1129
1130 /**
1131  * Find existing table jump resource or create and register a new one.
1132  *
1133  * @param dev[in, out]
1134  *   Pointer to rte_eth_dev structure.
1135  * @param[in, out] resource
1136  *   Pointer to jump table resource.
1137  * @parm[in, out] dev_flow
1138  *   Pointer to the dev_flow.
1139  * @param[out] error
1140  *   pointer to error structure.
1141  *
1142  * @return
1143  *   0 on success otherwise -errno and errno is set.
1144  */
1145 static int
1146 flow_dv_jump_tbl_resource_register
1147                         (struct rte_eth_dev *dev,
1148                          struct mlx5_flow_dv_jump_tbl_resource *resource,
1149                          struct mlx5_flow *dev_flow,
1150                          struct rte_flow_error *error)
1151 {
1152         struct mlx5_priv *priv = dev->data->dev_private;
1153         struct mlx5_ibv_shared *sh = priv->sh;
1154         struct mlx5_flow_dv_jump_tbl_resource *cache_resource;
1155
1156         /* Lookup a matching resource from cache. */
1157         LIST_FOREACH(cache_resource, &sh->jump_tbl, next) {
1158                 if (resource->tbl == cache_resource->tbl) {
1159                         DRV_LOG(DEBUG, "jump table resource resource %p: refcnt %d++",
1160                                 (void *)cache_resource,
1161                                 rte_atomic32_read(&cache_resource->refcnt));
1162                         rte_atomic32_inc(&cache_resource->refcnt);
1163                         dev_flow->dv.jump = cache_resource;
1164                         return 0;
1165                 }
1166         }
1167         /* Register new jump table resource. */
1168         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1169         if (!cache_resource)
1170                 return rte_flow_error_set(error, ENOMEM,
1171                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1172                                           "cannot allocate resource memory");
1173         *cache_resource = *resource;
1174         cache_resource->action =
1175                 mlx5_glue->dr_create_flow_action_dest_flow_tbl
1176                 (resource->tbl->obj);
1177         if (!cache_resource->action) {
1178                 rte_free(cache_resource);
1179                 return rte_flow_error_set(error, ENOMEM,
1180                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1181                                           NULL, "cannot create action");
1182         }
1183         rte_atomic32_init(&cache_resource->refcnt);
1184         rte_atomic32_inc(&cache_resource->refcnt);
1185         LIST_INSERT_HEAD(&sh->jump_tbl, cache_resource, next);
1186         dev_flow->dv.jump = cache_resource;
1187         DRV_LOG(DEBUG, "new jump table  resource %p: refcnt %d++",
1188                 (void *)cache_resource,
1189                 rte_atomic32_read(&cache_resource->refcnt));
1190         return 0;
1191 }
1192
1193 /**
1194  * Find existing table port ID resource or create and register a new one.
1195  *
1196  * @param dev[in, out]
1197  *   Pointer to rte_eth_dev structure.
1198  * @param[in, out] resource
1199  *   Pointer to port ID action resource.
1200  * @parm[in, out] dev_flow
1201  *   Pointer to the dev_flow.
1202  * @param[out] error
1203  *   pointer to error structure.
1204  *
1205  * @return
1206  *   0 on success otherwise -errno and errno is set.
1207  */
1208 static int
1209 flow_dv_port_id_action_resource_register
1210                         (struct rte_eth_dev *dev,
1211                          struct mlx5_flow_dv_port_id_action_resource *resource,
1212                          struct mlx5_flow *dev_flow,
1213                          struct rte_flow_error *error)
1214 {
1215         struct mlx5_priv *priv = dev->data->dev_private;
1216         struct mlx5_ibv_shared *sh = priv->sh;
1217         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
1218
1219         /* Lookup a matching resource from cache. */
1220         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
1221                 if (resource->port_id == cache_resource->port_id) {
1222                         DRV_LOG(DEBUG, "port id action resource resource %p: "
1223                                 "refcnt %d++",
1224                                 (void *)cache_resource,
1225                                 rte_atomic32_read(&cache_resource->refcnt));
1226                         rte_atomic32_inc(&cache_resource->refcnt);
1227                         dev_flow->dv.port_id_action = cache_resource;
1228                         return 0;
1229                 }
1230         }
1231         /* Register new port id action resource. */
1232         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1233         if (!cache_resource)
1234                 return rte_flow_error_set(error, ENOMEM,
1235                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1236                                           "cannot allocate resource memory");
1237         *cache_resource = *resource;
1238         cache_resource->action =
1239                 mlx5_glue->dr_create_flow_action_dest_vport
1240                         (priv->sh->fdb_domain, resource->port_id);
1241         if (!cache_resource->action) {
1242                 rte_free(cache_resource);
1243                 return rte_flow_error_set(error, ENOMEM,
1244                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1245                                           NULL, "cannot create action");
1246         }
1247         rte_atomic32_init(&cache_resource->refcnt);
1248         rte_atomic32_inc(&cache_resource->refcnt);
1249         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
1250         dev_flow->dv.port_id_action = cache_resource;
1251         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
1252                 (void *)cache_resource,
1253                 rte_atomic32_read(&cache_resource->refcnt));
1254         return 0;
1255 }
1256
1257 /**
1258  * Get the size of specific rte_flow_item_type
1259  *
1260  * @param[in] item_type
1261  *   Tested rte_flow_item_type.
1262  *
1263  * @return
1264  *   sizeof struct item_type, 0 if void or irrelevant.
1265  */
1266 static size_t
1267 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
1268 {
1269         size_t retval;
1270
1271         switch (item_type) {
1272         case RTE_FLOW_ITEM_TYPE_ETH:
1273                 retval = sizeof(struct rte_flow_item_eth);
1274                 break;
1275         case RTE_FLOW_ITEM_TYPE_VLAN:
1276                 retval = sizeof(struct rte_flow_item_vlan);
1277                 break;
1278         case RTE_FLOW_ITEM_TYPE_IPV4:
1279                 retval = sizeof(struct rte_flow_item_ipv4);
1280                 break;
1281         case RTE_FLOW_ITEM_TYPE_IPV6:
1282                 retval = sizeof(struct rte_flow_item_ipv6);
1283                 break;
1284         case RTE_FLOW_ITEM_TYPE_UDP:
1285                 retval = sizeof(struct rte_flow_item_udp);
1286                 break;
1287         case RTE_FLOW_ITEM_TYPE_TCP:
1288                 retval = sizeof(struct rte_flow_item_tcp);
1289                 break;
1290         case RTE_FLOW_ITEM_TYPE_VXLAN:
1291                 retval = sizeof(struct rte_flow_item_vxlan);
1292                 break;
1293         case RTE_FLOW_ITEM_TYPE_GRE:
1294                 retval = sizeof(struct rte_flow_item_gre);
1295                 break;
1296         case RTE_FLOW_ITEM_TYPE_NVGRE:
1297                 retval = sizeof(struct rte_flow_item_nvgre);
1298                 break;
1299         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1300                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
1301                 break;
1302         case RTE_FLOW_ITEM_TYPE_MPLS:
1303                 retval = sizeof(struct rte_flow_item_mpls);
1304                 break;
1305         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
1306         default:
1307                 retval = 0;
1308                 break;
1309         }
1310         return retval;
1311 }
1312
1313 #define MLX5_ENCAP_IPV4_VERSION         0x40
1314 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
1315 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
1316 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
1317 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
1318 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
1319 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
1320
1321 /**
1322  * Convert the encap action data from list of rte_flow_item to raw buffer
1323  *
1324  * @param[in] items
1325  *   Pointer to rte_flow_item objects list.
1326  * @param[out] buf
1327  *   Pointer to the output buffer.
1328  * @param[out] size
1329  *   Pointer to the output buffer size.
1330  * @param[out] error
1331  *   Pointer to the error structure.
1332  *
1333  * @return
1334  *   0 on success, a negative errno value otherwise and rte_errno is set.
1335  */
1336 static int
1337 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
1338                            size_t *size, struct rte_flow_error *error)
1339 {
1340         struct rte_ether_hdr *eth = NULL;
1341         struct rte_vlan_hdr *vlan = NULL;
1342         struct rte_ipv4_hdr *ipv4 = NULL;
1343         struct rte_ipv6_hdr *ipv6 = NULL;
1344         struct rte_udp_hdr *udp = NULL;
1345         struct rte_vxlan_hdr *vxlan = NULL;
1346         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
1347         struct rte_gre_hdr *gre = NULL;
1348         size_t len;
1349         size_t temp_size = 0;
1350
1351         if (!items)
1352                 return rte_flow_error_set(error, EINVAL,
1353                                           RTE_FLOW_ERROR_TYPE_ACTION,
1354                                           NULL, "invalid empty data");
1355         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1356                 len = flow_dv_get_item_len(items->type);
1357                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
1358                         return rte_flow_error_set(error, EINVAL,
1359                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1360                                                   (void *)items->type,
1361                                                   "items total size is too big"
1362                                                   " for encap action");
1363                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
1364                 switch (items->type) {
1365                 case RTE_FLOW_ITEM_TYPE_ETH:
1366                         eth = (struct rte_ether_hdr *)&buf[temp_size];
1367                         break;
1368                 case RTE_FLOW_ITEM_TYPE_VLAN:
1369                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
1370                         if (!eth)
1371                                 return rte_flow_error_set(error, EINVAL,
1372                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1373                                                 (void *)items->type,
1374                                                 "eth header not found");
1375                         if (!eth->ether_type)
1376                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
1377                         break;
1378                 case RTE_FLOW_ITEM_TYPE_IPV4:
1379                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
1380                         if (!vlan && !eth)
1381                                 return rte_flow_error_set(error, EINVAL,
1382                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1383                                                 (void *)items->type,
1384                                                 "neither eth nor vlan"
1385                                                 " header found");
1386                         if (vlan && !vlan->eth_proto)
1387                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1388                         else if (eth && !eth->ether_type)
1389                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1390                         if (!ipv4->version_ihl)
1391                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
1392                                                     MLX5_ENCAP_IPV4_IHL_MIN;
1393                         if (!ipv4->time_to_live)
1394                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
1395                         break;
1396                 case RTE_FLOW_ITEM_TYPE_IPV6:
1397                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
1398                         if (!vlan && !eth)
1399                                 return rte_flow_error_set(error, EINVAL,
1400                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1401                                                 (void *)items->type,
1402                                                 "neither eth nor vlan"
1403                                                 " header found");
1404                         if (vlan && !vlan->eth_proto)
1405                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1406                         else if (eth && !eth->ether_type)
1407                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1408                         if (!ipv6->vtc_flow)
1409                                 ipv6->vtc_flow =
1410                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
1411                         if (!ipv6->hop_limits)
1412                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
1413                         break;
1414                 case RTE_FLOW_ITEM_TYPE_UDP:
1415                         udp = (struct rte_udp_hdr *)&buf[temp_size];
1416                         if (!ipv4 && !ipv6)
1417                                 return rte_flow_error_set(error, EINVAL,
1418                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1419                                                 (void *)items->type,
1420                                                 "ip header not found");
1421                         if (ipv4 && !ipv4->next_proto_id)
1422                                 ipv4->next_proto_id = IPPROTO_UDP;
1423                         else if (ipv6 && !ipv6->proto)
1424                                 ipv6->proto = IPPROTO_UDP;
1425                         break;
1426                 case RTE_FLOW_ITEM_TYPE_VXLAN:
1427                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
1428                         if (!udp)
1429                                 return rte_flow_error_set(error, EINVAL,
1430                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1431                                                 (void *)items->type,
1432                                                 "udp header not found");
1433                         if (!udp->dst_port)
1434                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
1435                         if (!vxlan->vx_flags)
1436                                 vxlan->vx_flags =
1437                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
1438                         break;
1439                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1440                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
1441                         if (!udp)
1442                                 return rte_flow_error_set(error, EINVAL,
1443                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1444                                                 (void *)items->type,
1445                                                 "udp header not found");
1446                         if (!vxlan_gpe->proto)
1447                                 return rte_flow_error_set(error, EINVAL,
1448                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1449                                                 (void *)items->type,
1450                                                 "next protocol not found");
1451                         if (!udp->dst_port)
1452                                 udp->dst_port =
1453                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
1454                         if (!vxlan_gpe->vx_flags)
1455                                 vxlan_gpe->vx_flags =
1456                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
1457                         break;
1458                 case RTE_FLOW_ITEM_TYPE_GRE:
1459                 case RTE_FLOW_ITEM_TYPE_NVGRE:
1460                         gre = (struct rte_gre_hdr *)&buf[temp_size];
1461                         if (!gre->proto)
1462                                 return rte_flow_error_set(error, EINVAL,
1463                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1464                                                 (void *)items->type,
1465                                                 "next protocol not found");
1466                         if (!ipv4 && !ipv6)
1467                                 return rte_flow_error_set(error, EINVAL,
1468                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1469                                                 (void *)items->type,
1470                                                 "ip header not found");
1471                         if (ipv4 && !ipv4->next_proto_id)
1472                                 ipv4->next_proto_id = IPPROTO_GRE;
1473                         else if (ipv6 && !ipv6->proto)
1474                                 ipv6->proto = IPPROTO_GRE;
1475                         break;
1476                 case RTE_FLOW_ITEM_TYPE_VOID:
1477                         break;
1478                 default:
1479                         return rte_flow_error_set(error, EINVAL,
1480                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1481                                                   (void *)items->type,
1482                                                   "unsupported item type");
1483                         break;
1484                 }
1485                 temp_size += len;
1486         }
1487         *size = temp_size;
1488         return 0;
1489 }
1490
1491 static int
1492 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
1493 {
1494         struct rte_ether_hdr *eth = NULL;
1495         struct rte_vlan_hdr *vlan = NULL;
1496         struct rte_ipv6_hdr *ipv6 = NULL;
1497         struct rte_udp_hdr *udp = NULL;
1498         char *next_hdr;
1499         uint16_t proto;
1500
1501         eth = (struct rte_ether_hdr *)data;
1502         next_hdr = (char *)(eth + 1);
1503         proto = RTE_BE16(eth->ether_type);
1504
1505         /* VLAN skipping */
1506         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
1507                 next_hdr += sizeof(struct rte_vlan_hdr);
1508                 vlan = (struct rte_vlan_hdr *)next_hdr;
1509                 proto = RTE_BE16(vlan->eth_proto);
1510         }
1511
1512         /* HW calculates IPv4 csum. no need to proceed */
1513         if (proto == RTE_ETHER_TYPE_IPV4)
1514                 return 0;
1515
1516         /* non IPv4/IPv6 header. not supported */
1517         if (proto != RTE_ETHER_TYPE_IPV6) {
1518                 return rte_flow_error_set(error, ENOTSUP,
1519                                           RTE_FLOW_ERROR_TYPE_ACTION,
1520                                           NULL, "Cannot offload non IPv4/IPv6");
1521         }
1522
1523         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
1524
1525         /* ignore non UDP */
1526         if (ipv6->proto != IPPROTO_UDP)
1527                 return 0;
1528
1529         udp = (struct rte_udp_hdr *)(ipv6 + 1);
1530         udp->dgram_cksum = 0;
1531
1532         return 0;
1533 }
1534
1535 /**
1536  * Convert L2 encap action to DV specification.
1537  *
1538  * @param[in] dev
1539  *   Pointer to rte_eth_dev structure.
1540  * @param[in] action
1541  *   Pointer to action structure.
1542  * @param[in, out] dev_flow
1543  *   Pointer to the mlx5_flow.
1544  * @param[in] transfer
1545  *   Mark if the flow is E-Switch flow.
1546  * @param[out] error
1547  *   Pointer to the error structure.
1548  *
1549  * @return
1550  *   0 on success, a negative errno value otherwise and rte_errno is set.
1551  */
1552 static int
1553 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
1554                                const struct rte_flow_action *action,
1555                                struct mlx5_flow *dev_flow,
1556                                uint8_t transfer,
1557                                struct rte_flow_error *error)
1558 {
1559         const struct rte_flow_item *encap_data;
1560         const struct rte_flow_action_raw_encap *raw_encap_data;
1561         struct mlx5_flow_dv_encap_decap_resource res = {
1562                 .reformat_type =
1563                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
1564                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1565                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
1566         };
1567
1568         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
1569                 raw_encap_data =
1570                         (const struct rte_flow_action_raw_encap *)action->conf;
1571                 res.size = raw_encap_data->size;
1572                 memcpy(res.buf, raw_encap_data->data, res.size);
1573                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
1574                         return -rte_errno;
1575         } else {
1576                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
1577                         encap_data =
1578                                 ((const struct rte_flow_action_vxlan_encap *)
1579                                                 action->conf)->definition;
1580                 else
1581                         encap_data =
1582                                 ((const struct rte_flow_action_nvgre_encap *)
1583                                                 action->conf)->definition;
1584                 if (flow_dv_convert_encap_data(encap_data, res.buf,
1585                                                &res.size, error))
1586                         return -rte_errno;
1587         }
1588         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1589                 return rte_flow_error_set(error, EINVAL,
1590                                           RTE_FLOW_ERROR_TYPE_ACTION,
1591                                           NULL, "can't create L2 encap action");
1592         return 0;
1593 }
1594
1595 /**
1596  * Convert L2 decap action to DV specification.
1597  *
1598  * @param[in] dev
1599  *   Pointer to rte_eth_dev structure.
1600  * @param[in, out] dev_flow
1601  *   Pointer to the mlx5_flow.
1602  * @param[in] transfer
1603  *   Mark if the flow is E-Switch flow.
1604  * @param[out] error
1605  *   Pointer to the error structure.
1606  *
1607  * @return
1608  *   0 on success, a negative errno value otherwise and rte_errno is set.
1609  */
1610 static int
1611 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
1612                                struct mlx5_flow *dev_flow,
1613                                uint8_t transfer,
1614                                struct rte_flow_error *error)
1615 {
1616         struct mlx5_flow_dv_encap_decap_resource res = {
1617                 .size = 0,
1618                 .reformat_type =
1619                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
1620                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1621                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
1622         };
1623
1624         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1625                 return rte_flow_error_set(error, EINVAL,
1626                                           RTE_FLOW_ERROR_TYPE_ACTION,
1627                                           NULL, "can't create L2 decap action");
1628         return 0;
1629 }
1630
1631 /**
1632  * Convert raw decap/encap (L3 tunnel) action to DV specification.
1633  *
1634  * @param[in] dev
1635  *   Pointer to rte_eth_dev structure.
1636  * @param[in] action
1637  *   Pointer to action structure.
1638  * @param[in, out] dev_flow
1639  *   Pointer to the mlx5_flow.
1640  * @param[in] attr
1641  *   Pointer to the flow attributes.
1642  * @param[out] error
1643  *   Pointer to the error structure.
1644  *
1645  * @return
1646  *   0 on success, a negative errno value otherwise and rte_errno is set.
1647  */
1648 static int
1649 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
1650                                 const struct rte_flow_action *action,
1651                                 struct mlx5_flow *dev_flow,
1652                                 const struct rte_flow_attr *attr,
1653                                 struct rte_flow_error *error)
1654 {
1655         const struct rte_flow_action_raw_encap *encap_data;
1656         struct mlx5_flow_dv_encap_decap_resource res;
1657
1658         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
1659         res.size = encap_data->size;
1660         memcpy(res.buf, encap_data->data, res.size);
1661         res.reformat_type = attr->egress ?
1662                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL :
1663                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
1664         if (attr->transfer)
1665                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
1666         else
1667                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
1668                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
1669         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1670                 return rte_flow_error_set(error, EINVAL,
1671                                           RTE_FLOW_ERROR_TYPE_ACTION,
1672                                           NULL, "can't create encap action");
1673         return 0;
1674 }
1675
1676 /**
1677  * Validate the modify-header actions.
1678  *
1679  * @param[in] action_flags
1680  *   Holds the actions detected until now.
1681  * @param[in] action
1682  *   Pointer to the modify action.
1683  * @param[out] error
1684  *   Pointer to error structure.
1685  *
1686  * @return
1687  *   0 on success, a negative errno value otherwise and rte_errno is set.
1688  */
1689 static int
1690 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
1691                                    const struct rte_flow_action *action,
1692                                    struct rte_flow_error *error)
1693 {
1694         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
1695                 return rte_flow_error_set(error, EINVAL,
1696                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1697                                           NULL, "action configuration not set");
1698         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1699                 return rte_flow_error_set(error, EINVAL,
1700                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1701                                           "can't have encap action before"
1702                                           " modify action");
1703         return 0;
1704 }
1705
1706 /**
1707  * Validate the modify-header MAC address actions.
1708  *
1709  * @param[in] action_flags
1710  *   Holds the actions detected until now.
1711  * @param[in] action
1712  *   Pointer to the modify action.
1713  * @param[in] item_flags
1714  *   Holds the items detected.
1715  * @param[out] error
1716  *   Pointer to error structure.
1717  *
1718  * @return
1719  *   0 on success, a negative errno value otherwise and rte_errno is set.
1720  */
1721 static int
1722 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
1723                                    const struct rte_flow_action *action,
1724                                    const uint64_t item_flags,
1725                                    struct rte_flow_error *error)
1726 {
1727         int ret = 0;
1728
1729         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1730         if (!ret) {
1731                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
1732                         return rte_flow_error_set(error, EINVAL,
1733                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1734                                                   NULL,
1735                                                   "no L2 item in pattern");
1736         }
1737         return ret;
1738 }
1739
1740 /**
1741  * Validate the modify-header IPv4 address actions.
1742  *
1743  * @param[in] action_flags
1744  *   Holds the actions detected until now.
1745  * @param[in] action
1746  *   Pointer to the modify action.
1747  * @param[in] item_flags
1748  *   Holds the items detected.
1749  * @param[out] error
1750  *   Pointer to error structure.
1751  *
1752  * @return
1753  *   0 on success, a negative errno value otherwise and rte_errno is set.
1754  */
1755 static int
1756 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
1757                                     const struct rte_flow_action *action,
1758                                     const uint64_t item_flags,
1759                                     struct rte_flow_error *error)
1760 {
1761         int ret = 0;
1762
1763         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1764         if (!ret) {
1765                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
1766                         return rte_flow_error_set(error, EINVAL,
1767                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1768                                                   NULL,
1769                                                   "no ipv4 item in pattern");
1770         }
1771         return ret;
1772 }
1773
1774 /**
1775  * Validate the modify-header IPv6 address actions.
1776  *
1777  * @param[in] action_flags
1778  *   Holds the actions detected until now.
1779  * @param[in] action
1780  *   Pointer to the modify action.
1781  * @param[in] item_flags
1782  *   Holds the items detected.
1783  * @param[out] error
1784  *   Pointer to error structure.
1785  *
1786  * @return
1787  *   0 on success, a negative errno value otherwise and rte_errno is set.
1788  */
1789 static int
1790 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
1791                                     const struct rte_flow_action *action,
1792                                     const uint64_t item_flags,
1793                                     struct rte_flow_error *error)
1794 {
1795         int ret = 0;
1796
1797         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1798         if (!ret) {
1799                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
1800                         return rte_flow_error_set(error, EINVAL,
1801                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1802                                                   NULL,
1803                                                   "no ipv6 item in pattern");
1804         }
1805         return ret;
1806 }
1807
1808 /**
1809  * Validate the modify-header TP actions.
1810  *
1811  * @param[in] action_flags
1812  *   Holds the actions detected until now.
1813  * @param[in] action
1814  *   Pointer to the modify action.
1815  * @param[in] item_flags
1816  *   Holds the items detected.
1817  * @param[out] error
1818  *   Pointer to error structure.
1819  *
1820  * @return
1821  *   0 on success, a negative errno value otherwise and rte_errno is set.
1822  */
1823 static int
1824 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
1825                                   const struct rte_flow_action *action,
1826                                   const uint64_t item_flags,
1827                                   struct rte_flow_error *error)
1828 {
1829         int ret = 0;
1830
1831         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1832         if (!ret) {
1833                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
1834                         return rte_flow_error_set(error, EINVAL,
1835                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1836                                                   NULL, "no transport layer "
1837                                                   "in pattern");
1838         }
1839         return ret;
1840 }
1841
1842 /**
1843  * Validate the modify-header actions of increment/decrement
1844  * TCP Sequence-number.
1845  *
1846  * @param[in] action_flags
1847  *   Holds the actions detected until now.
1848  * @param[in] action
1849  *   Pointer to the modify action.
1850  * @param[in] item_flags
1851  *   Holds the items detected.
1852  * @param[out] error
1853  *   Pointer to error structure.
1854  *
1855  * @return
1856  *   0 on success, a negative errno value otherwise and rte_errno is set.
1857  */
1858 static int
1859 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
1860                                        const struct rte_flow_action *action,
1861                                        const uint64_t item_flags,
1862                                        struct rte_flow_error *error)
1863 {
1864         int ret = 0;
1865
1866         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1867         if (!ret) {
1868                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
1869                         return rte_flow_error_set(error, EINVAL,
1870                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1871                                                   NULL, "no TCP item in"
1872                                                   " pattern");
1873                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
1874                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
1875                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
1876                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
1877                         return rte_flow_error_set(error, EINVAL,
1878                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1879                                                   NULL,
1880                                                   "cannot decrease and increase"
1881                                                   " TCP sequence number"
1882                                                   " at the same time");
1883         }
1884         return ret;
1885 }
1886
1887 /**
1888  * Validate the modify-header actions of increment/decrement
1889  * TCP Acknowledgment number.
1890  *
1891  * @param[in] action_flags
1892  *   Holds the actions detected until now.
1893  * @param[in] action
1894  *   Pointer to the modify action.
1895  * @param[in] item_flags
1896  *   Holds the items detected.
1897  * @param[out] error
1898  *   Pointer to error structure.
1899  *
1900  * @return
1901  *   0 on success, a negative errno value otherwise and rte_errno is set.
1902  */
1903 static int
1904 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
1905                                        const struct rte_flow_action *action,
1906                                        const uint64_t item_flags,
1907                                        struct rte_flow_error *error)
1908 {
1909         int ret = 0;
1910
1911         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1912         if (!ret) {
1913                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
1914                         return rte_flow_error_set(error, EINVAL,
1915                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1916                                                   NULL, "no TCP item in"
1917                                                   " pattern");
1918                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
1919                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
1920                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
1921                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
1922                         return rte_flow_error_set(error, EINVAL,
1923                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1924                                                   NULL,
1925                                                   "cannot decrease and increase"
1926                                                   " TCP acknowledgment number"
1927                                                   " at the same time");
1928         }
1929         return ret;
1930 }
1931
1932 /**
1933  * Validate the modify-header TTL actions.
1934  *
1935  * @param[in] action_flags
1936  *   Holds the actions detected until now.
1937  * @param[in] action
1938  *   Pointer to the modify action.
1939  * @param[in] item_flags
1940  *   Holds the items detected.
1941  * @param[out] error
1942  *   Pointer to error structure.
1943  *
1944  * @return
1945  *   0 on success, a negative errno value otherwise and rte_errno is set.
1946  */
1947 static int
1948 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
1949                                    const struct rte_flow_action *action,
1950                                    const uint64_t item_flags,
1951                                    struct rte_flow_error *error)
1952 {
1953         int ret = 0;
1954
1955         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1956         if (!ret) {
1957                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
1958                         return rte_flow_error_set(error, EINVAL,
1959                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1960                                                   NULL,
1961                                                   "no IP protocol in pattern");
1962         }
1963         return ret;
1964 }
1965
1966 /**
1967  * Validate jump action.
1968  *
1969  * @param[in] action
1970  *   Pointer to the modify action.
1971  * @param[in] group
1972  *   The group of the current flow.
1973  * @param[out] error
1974  *   Pointer to error structure.
1975  *
1976  * @return
1977  *   0 on success, a negative errno value otherwise and rte_errno is set.
1978  */
1979 static int
1980 flow_dv_validate_action_jump(const struct rte_flow_action *action,
1981                              uint32_t group,
1982                              struct rte_flow_error *error)
1983 {
1984         if (action->type != RTE_FLOW_ACTION_TYPE_JUMP && !action->conf)
1985                 return rte_flow_error_set(error, EINVAL,
1986                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1987                                           NULL, "action configuration not set");
1988         if (group >= ((const struct rte_flow_action_jump *)action->conf)->group)
1989                 return rte_flow_error_set(error, EINVAL,
1990                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1991                                           "target group must be higher then"
1992                                           " the current flow group");
1993         return 0;
1994 }
1995
1996 /*
1997  * Validate the port_id action.
1998  *
1999  * @param[in] dev
2000  *   Pointer to rte_eth_dev structure.
2001  * @param[in] action_flags
2002  *   Bit-fields that holds the actions detected until now.
2003  * @param[in] action
2004  *   Port_id RTE action structure.
2005  * @param[in] attr
2006  *   Attributes of flow that includes this action.
2007  * @param[out] error
2008  *   Pointer to error structure.
2009  *
2010  * @return
2011  *   0 on success, a negative errno value otherwise and rte_errno is set.
2012  */
2013 static int
2014 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
2015                                 uint64_t action_flags,
2016                                 const struct rte_flow_action *action,
2017                                 const struct rte_flow_attr *attr,
2018                                 struct rte_flow_error *error)
2019 {
2020         const struct rte_flow_action_port_id *port_id;
2021         uint16_t port;
2022         uint16_t esw_domain_id;
2023         uint16_t act_port_domain_id;
2024         int ret;
2025
2026         if (!attr->transfer)
2027                 return rte_flow_error_set(error, ENOTSUP,
2028                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2029                                           NULL,
2030                                           "port id action is valid in transfer"
2031                                           " mode only");
2032         if (!action || !action->conf)
2033                 return rte_flow_error_set(error, ENOTSUP,
2034                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2035                                           NULL,
2036                                           "port id action parameters must be"
2037                                           " specified");
2038         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
2039                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2042                                           "can have only one fate actions in"
2043                                           " a flow");
2044         ret = mlx5_port_to_eswitch_info(dev->data->port_id,
2045                                         &esw_domain_id, NULL);
2046         if (ret < 0)
2047                 return rte_flow_error_set(error, -ret,
2048                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2049                                           NULL,
2050                                           "failed to obtain E-Switch info");
2051         port_id = action->conf;
2052         port = port_id->original ? dev->data->port_id : port_id->id;
2053         ret = mlx5_port_to_eswitch_info(port, &act_port_domain_id, NULL);
2054         if (ret)
2055                 return rte_flow_error_set
2056                                 (error, -ret,
2057                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
2058                                  "failed to obtain E-Switch port id for port");
2059         if (act_port_domain_id != esw_domain_id)
2060                 return rte_flow_error_set
2061                                 (error, -ret,
2062                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2063                                  "port does not belong to"
2064                                  " E-Switch being configured");
2065         return 0;
2066 }
2067
2068 /**
2069  * Find existing modify-header resource or create and register a new one.
2070  *
2071  * @param dev[in, out]
2072  *   Pointer to rte_eth_dev structure.
2073  * @param[in, out] resource
2074  *   Pointer to modify-header resource.
2075  * @parm[in, out] dev_flow
2076  *   Pointer to the dev_flow.
2077  * @param[out] error
2078  *   pointer to error structure.
2079  *
2080  * @return
2081  *   0 on success otherwise -errno and errno is set.
2082  */
2083 static int
2084 flow_dv_modify_hdr_resource_register
2085                         (struct rte_eth_dev *dev,
2086                          struct mlx5_flow_dv_modify_hdr_resource *resource,
2087                          struct mlx5_flow *dev_flow,
2088                          struct rte_flow_error *error)
2089 {
2090         struct mlx5_priv *priv = dev->data->dev_private;
2091         struct mlx5_ibv_shared *sh = priv->sh;
2092         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
2093         struct mlx5dv_dr_domain *ns;
2094
2095         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2096                 ns = sh->fdb_domain;
2097         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
2098                 ns = sh->tx_domain;
2099         else
2100                 ns = sh->rx_domain;
2101         resource->flags =
2102                 dev_flow->flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
2103         /* Lookup a matching resource from cache. */
2104         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
2105                 if (resource->ft_type == cache_resource->ft_type &&
2106                     resource->actions_num == cache_resource->actions_num &&
2107                     resource->flags == cache_resource->flags &&
2108                     !memcmp((const void *)resource->actions,
2109                             (const void *)cache_resource->actions,
2110                             (resource->actions_num *
2111                                             sizeof(resource->actions[0])))) {
2112                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
2113                                 (void *)cache_resource,
2114                                 rte_atomic32_read(&cache_resource->refcnt));
2115                         rte_atomic32_inc(&cache_resource->refcnt);
2116                         dev_flow->dv.modify_hdr = cache_resource;
2117                         return 0;
2118                 }
2119         }
2120         /* Register new modify-header resource. */
2121         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2122         if (!cache_resource)
2123                 return rte_flow_error_set(error, ENOMEM,
2124                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2125                                           "cannot allocate resource memory");
2126         *cache_resource = *resource;
2127         cache_resource->verbs_action =
2128                 mlx5_glue->dv_create_flow_action_modify_header
2129                                         (sh->ctx, cache_resource->ft_type,
2130                                          ns, cache_resource->flags,
2131                                          cache_resource->actions_num *
2132                                          sizeof(cache_resource->actions[0]),
2133                                          (uint64_t *)cache_resource->actions);
2134         if (!cache_resource->verbs_action) {
2135                 rte_free(cache_resource);
2136                 return rte_flow_error_set(error, ENOMEM,
2137                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2138                                           NULL, "cannot create action");
2139         }
2140         rte_atomic32_init(&cache_resource->refcnt);
2141         rte_atomic32_inc(&cache_resource->refcnt);
2142         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
2143         dev_flow->dv.modify_hdr = cache_resource;
2144         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
2145                 (void *)cache_resource,
2146                 rte_atomic32_read(&cache_resource->refcnt));
2147         return 0;
2148 }
2149
2150 #define MLX5_CNT_CONTAINER_RESIZE 64
2151
2152 /**
2153  * Get or create a flow counter.
2154  *
2155  * @param[in] dev
2156  *   Pointer to the Ethernet device structure.
2157  * @param[in] shared
2158  *   Indicate if this counter is shared with other flows.
2159  * @param[in] id
2160  *   Counter identifier.
2161  *
2162  * @return
2163  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
2164  */
2165 static struct mlx5_flow_counter *
2166 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
2167                                uint32_t id)
2168 {
2169         struct mlx5_priv *priv = dev->data->dev_private;
2170         struct mlx5_flow_counter *cnt = NULL;
2171         struct mlx5_devx_obj *dcs = NULL;
2172
2173         if (!priv->config.devx) {
2174                 rte_errno = ENOTSUP;
2175                 return NULL;
2176         }
2177         if (shared) {
2178                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
2179                         if (cnt->shared && cnt->id == id) {
2180                                 cnt->ref_cnt++;
2181                                 return cnt;
2182                         }
2183                 }
2184         }
2185         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
2186         if (!dcs)
2187                 return NULL;
2188         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
2189         if (!cnt) {
2190                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
2191                 rte_errno = ENOMEM;
2192                 return NULL;
2193         }
2194         struct mlx5_flow_counter tmpl = {
2195                 .shared = shared,
2196                 .ref_cnt = 1,
2197                 .id = id,
2198                 .dcs = dcs,
2199         };
2200         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
2201         if (!tmpl.action) {
2202                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
2203                 rte_errno = errno;
2204                 rte_free(cnt);
2205                 return NULL;
2206         }
2207         *cnt = tmpl;
2208         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
2209         return cnt;
2210 }
2211
2212 /**
2213  * Release a flow counter.
2214  *
2215  * @param[in] dev
2216  *   Pointer to the Ethernet device structure.
2217  * @param[in] counter
2218  *   Pointer to the counter handler.
2219  */
2220 static void
2221 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
2222                                  struct mlx5_flow_counter *counter)
2223 {
2224         struct mlx5_priv *priv = dev->data->dev_private;
2225
2226         if (!counter)
2227                 return;
2228         if (--counter->ref_cnt == 0) {
2229                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
2230                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
2231                 rte_free(counter);
2232         }
2233 }
2234
2235 /**
2236  * Query a devx flow counter.
2237  *
2238  * @param[in] dev
2239  *   Pointer to the Ethernet device structure.
2240  * @param[in] cnt
2241  *   Pointer to the flow counter.
2242  * @param[out] pkts
2243  *   The statistics value of packets.
2244  * @param[out] bytes
2245  *   The statistics value of bytes.
2246  *
2247  * @return
2248  *   0 on success, otherwise a negative errno value and rte_errno is set.
2249  */
2250 static inline int
2251 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
2252                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
2253                      uint64_t *bytes)
2254 {
2255         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
2256                                                 0, NULL, NULL, 0);
2257 }
2258
2259 /**
2260  * Get a pool by a counter.
2261  *
2262  * @param[in] cnt
2263  *   Pointer to the counter.
2264  *
2265  * @return
2266  *   The counter pool.
2267  */
2268 static struct mlx5_flow_counter_pool *
2269 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
2270 {
2271         if (!cnt->batch) {
2272                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
2273                 return (struct mlx5_flow_counter_pool *)cnt - 1;
2274         }
2275         return cnt->pool;
2276 }
2277
2278 /**
2279  * Get a pool by devx counter ID.
2280  *
2281  * @param[in] cont
2282  *   Pointer to the counter container.
2283  * @param[in] id
2284  *   The counter devx ID.
2285  *
2286  * @return
2287  *   The counter pool pointer if exists, NULL otherwise,
2288  */
2289 static struct mlx5_flow_counter_pool *
2290 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
2291 {
2292         struct mlx5_flow_counter_pool *pool;
2293
2294         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2295                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
2296                                 MLX5_COUNTERS_PER_POOL;
2297
2298                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
2299                         return pool;
2300         };
2301         return NULL;
2302 }
2303
2304 /**
2305  * Allocate a new memory for the counter values wrapped by all the needed
2306  * management.
2307  *
2308  * @param[in] dev
2309  *   Pointer to the Ethernet device structure.
2310  * @param[in] raws_n
2311  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
2312  *
2313  * @return
2314  *   The new memory management pointer on success, otherwise NULL and rte_errno
2315  *   is set.
2316  */
2317 static struct mlx5_counter_stats_mem_mng *
2318 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
2319 {
2320         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
2321                                         (dev->data->dev_private))->sh;
2322         struct mlx5dv_pd dv_pd;
2323         struct mlx5dv_obj dv_obj;
2324         struct mlx5_devx_mkey_attr mkey_attr;
2325         struct mlx5_counter_stats_mem_mng *mem_mng;
2326         volatile struct flow_counter_stats *raw_data;
2327         int size = (sizeof(struct flow_counter_stats) *
2328                         MLX5_COUNTERS_PER_POOL +
2329                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
2330                         sizeof(struct mlx5_counter_stats_mem_mng);
2331         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
2332         int i;
2333
2334         if (!mem) {
2335                 rte_errno = ENOMEM;
2336                 return NULL;
2337         }
2338         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
2339         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
2340         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
2341                                                  IBV_ACCESS_LOCAL_WRITE);
2342         if (!mem_mng->umem) {
2343                 rte_errno = errno;
2344                 rte_free(mem);
2345                 return NULL;
2346         }
2347         dv_obj.pd.in = sh->pd;
2348         dv_obj.pd.out = &dv_pd;
2349         mlx5_glue->dv_init_obj(&dv_obj, MLX5DV_OBJ_PD);
2350         mkey_attr.addr = (uintptr_t)mem;
2351         mkey_attr.size = size;
2352         mkey_attr.umem_id = mem_mng->umem->umem_id;
2353         mkey_attr.pd = dv_pd.pdn;
2354         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
2355         if (!mem_mng->dm) {
2356                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
2357                 rte_errno = errno;
2358                 rte_free(mem);
2359                 return NULL;
2360         }
2361         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
2362         raw_data = (volatile struct flow_counter_stats *)mem;
2363         for (i = 0; i < raws_n; ++i) {
2364                 mem_mng->raws[i].mem_mng = mem_mng;
2365                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
2366         }
2367         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
2368         return mem_mng;
2369 }
2370
2371 /**
2372  * Resize a counter container.
2373  *
2374  * @param[in] dev
2375  *   Pointer to the Ethernet device structure.
2376  * @param[in] batch
2377  *   Whether the pool is for counter that was allocated by batch command.
2378  *
2379  * @return
2380  *   The new container pointer on success, otherwise NULL and rte_errno is set.
2381  */
2382 static struct mlx5_pools_container *
2383 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
2384 {
2385         struct mlx5_priv *priv = dev->data->dev_private;
2386         struct mlx5_pools_container *cont =
2387                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
2388         struct mlx5_pools_container *new_cont =
2389                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
2390         struct mlx5_counter_stats_mem_mng *mem_mng;
2391         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
2392         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
2393         int i;
2394
2395         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
2396                 /* The last resize still hasn't detected by the host thread. */
2397                 rte_errno = EAGAIN;
2398                 return NULL;
2399         }
2400         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
2401         if (!new_cont->pools) {
2402                 rte_errno = ENOMEM;
2403                 return NULL;
2404         }
2405         if (cont->n)
2406                 memcpy(new_cont->pools, cont->pools, cont->n *
2407                        sizeof(struct mlx5_flow_counter_pool *));
2408         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
2409                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
2410         if (!mem_mng) {
2411                 rte_free(new_cont->pools);
2412                 return NULL;
2413         }
2414         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
2415                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
2416                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
2417                                  i, next);
2418         new_cont->n = resize;
2419         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
2420         TAILQ_INIT(&new_cont->pool_list);
2421         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
2422         new_cont->init_mem_mng = mem_mng;
2423         rte_cio_wmb();
2424          /* Flip the master container. */
2425         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
2426         return new_cont;
2427 }
2428
2429 /**
2430  * Query a devx flow counter.
2431  *
2432  * @param[in] dev
2433  *   Pointer to the Ethernet device structure.
2434  * @param[in] cnt
2435  *   Pointer to the flow counter.
2436  * @param[out] pkts
2437  *   The statistics value of packets.
2438  * @param[out] bytes
2439  *   The statistics value of bytes.
2440  *
2441  * @return
2442  *   0 on success, otherwise a negative errno value and rte_errno is set.
2443  */
2444 static inline int
2445 _flow_dv_query_count(struct rte_eth_dev *dev,
2446                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
2447                      uint64_t *bytes)
2448 {
2449         struct mlx5_priv *priv = dev->data->dev_private;
2450         struct mlx5_flow_counter_pool *pool =
2451                         flow_dv_counter_pool_get(cnt);
2452         int offset = cnt - &pool->counters_raw[0];
2453
2454         if (priv->counter_fallback)
2455                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
2456
2457         rte_spinlock_lock(&pool->sl);
2458         /*
2459          * The single counters allocation may allocate smaller ID than the
2460          * current allocated in parallel to the host reading.
2461          * In this case the new counter values must be reported as 0.
2462          */
2463         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
2464                 *pkts = 0;
2465                 *bytes = 0;
2466         } else {
2467                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
2468                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
2469         }
2470         rte_spinlock_unlock(&pool->sl);
2471         return 0;
2472 }
2473
2474 /**
2475  * Create and initialize a new counter pool.
2476  *
2477  * @param[in] dev
2478  *   Pointer to the Ethernet device structure.
2479  * @param[out] dcs
2480  *   The devX counter handle.
2481  * @param[in] batch
2482  *   Whether the pool is for counter that was allocated by batch command.
2483  *
2484  * @return
2485  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
2486  */
2487 static struct mlx5_flow_counter_pool *
2488 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
2489                     uint32_t batch)
2490 {
2491         struct mlx5_priv *priv = dev->data->dev_private;
2492         struct mlx5_flow_counter_pool *pool;
2493         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
2494                                                                0);
2495         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
2496         uint32_t size;
2497
2498         if (cont->n == n_valid) {
2499                 cont = flow_dv_container_resize(dev, batch);
2500                 if (!cont)
2501                         return NULL;
2502         }
2503         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
2504                         sizeof(struct mlx5_flow_counter);
2505         pool = rte_calloc(__func__, 1, size, 0);
2506         if (!pool) {
2507                 rte_errno = ENOMEM;
2508                 return NULL;
2509         }
2510         pool->min_dcs = dcs;
2511         pool->raw = cont->init_mem_mng->raws + n_valid %
2512                                                      MLX5_CNT_CONTAINER_RESIZE;
2513         pool->raw_hw = NULL;
2514         rte_spinlock_init(&pool->sl);
2515         /*
2516          * The generation of the new allocated counters in this pool is 0, 2 in
2517          * the pool generation makes all the counters valid for allocation.
2518          */
2519         rte_atomic64_set(&pool->query_gen, 0x2);
2520         TAILQ_INIT(&pool->counters);
2521         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
2522         cont->pools[n_valid] = pool;
2523         /* Pool initialization must be updated before host thread access. */
2524         rte_cio_wmb();
2525         rte_atomic16_add(&cont->n_valid, 1);
2526         return pool;
2527 }
2528
2529 /**
2530  * Prepare a new counter and/or a new counter pool.
2531  *
2532  * @param[in] dev
2533  *   Pointer to the Ethernet device structure.
2534  * @param[out] cnt_free
2535  *   Where to put the pointer of a new counter.
2536  * @param[in] batch
2537  *   Whether the pool is for counter that was allocated by batch command.
2538  *
2539  * @return
2540  *   The free counter pool pointer and @p cnt_free is set on success,
2541  *   NULL otherwise and rte_errno is set.
2542  */
2543 static struct mlx5_flow_counter_pool *
2544 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
2545                              struct mlx5_flow_counter **cnt_free,
2546                              uint32_t batch)
2547 {
2548         struct mlx5_priv *priv = dev->data->dev_private;
2549         struct mlx5_flow_counter_pool *pool;
2550         struct mlx5_devx_obj *dcs = NULL;
2551         struct mlx5_flow_counter *cnt;
2552         uint32_t i;
2553
2554         if (!batch) {
2555                 /* bulk_bitmap must be 0 for single counter allocation. */
2556                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
2557                 if (!dcs)
2558                         return NULL;
2559                 pool = flow_dv_find_pool_by_id
2560                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
2561                 if (!pool) {
2562                         pool = flow_dv_pool_create(dev, dcs, batch);
2563                         if (!pool) {
2564                                 mlx5_devx_cmd_destroy(dcs);
2565                                 return NULL;
2566                         }
2567                 } else if (dcs->id < pool->min_dcs->id) {
2568                         rte_atomic64_set(&pool->a64_dcs,
2569                                          (int64_t)(uintptr_t)dcs);
2570                 }
2571                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
2572                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
2573                 cnt->dcs = dcs;
2574                 *cnt_free = cnt;
2575                 return pool;
2576         }
2577         /* bulk_bitmap is in 128 counters units. */
2578         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
2579                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
2580         if (!dcs) {
2581                 rte_errno = ENODATA;
2582                 return NULL;
2583         }
2584         pool = flow_dv_pool_create(dev, dcs, batch);
2585         if (!pool) {
2586                 mlx5_devx_cmd_destroy(dcs);
2587                 return NULL;
2588         }
2589         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
2590                 cnt = &pool->counters_raw[i];
2591                 cnt->pool = pool;
2592                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
2593         }
2594         *cnt_free = &pool->counters_raw[0];
2595         return pool;
2596 }
2597
2598 /**
2599  * Search for existed shared counter.
2600  *
2601  * @param[in] cont
2602  *   Pointer to the relevant counter pool container.
2603  * @param[in] id
2604  *   The shared counter ID to search.
2605  *
2606  * @return
2607  *   NULL if not existed, otherwise pointer to the shared counter.
2608  */
2609 static struct mlx5_flow_counter *
2610 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
2611                               uint32_t id)
2612 {
2613         static struct mlx5_flow_counter *cnt;
2614         struct mlx5_flow_counter_pool *pool;
2615         int i;
2616
2617         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2618                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
2619                         cnt = &pool->counters_raw[i];
2620                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
2621                                 return cnt;
2622                 }
2623         }
2624         return NULL;
2625 }
2626
2627 /**
2628  * Allocate a flow counter.
2629  *
2630  * @param[in] dev
2631  *   Pointer to the Ethernet device structure.
2632  * @param[in] shared
2633  *   Indicate if this counter is shared with other flows.
2634  * @param[in] id
2635  *   Counter identifier.
2636  * @param[in] group
2637  *   Counter flow group.
2638  *
2639  * @return
2640  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
2641  */
2642 static struct mlx5_flow_counter *
2643 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
2644                       uint16_t group)
2645 {
2646         struct mlx5_priv *priv = dev->data->dev_private;
2647         struct mlx5_flow_counter_pool *pool = NULL;
2648         struct mlx5_flow_counter *cnt_free = NULL;
2649         /*
2650          * Currently group 0 flow counter cannot be assigned to a flow if it is
2651          * not the first one in the batch counter allocation, so it is better
2652          * to allocate counters one by one for these flows in a separate
2653          * container.
2654          * A counter can be shared between different groups so need to take
2655          * shared counters from the single container.
2656          */
2657         uint32_t batch = (group && !shared) ? 1 : 0;
2658         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
2659                                                                0);
2660
2661         if (priv->counter_fallback)
2662                 return flow_dv_counter_alloc_fallback(dev, shared, id);
2663         if (!priv->config.devx) {
2664                 rte_errno = ENOTSUP;
2665                 return NULL;
2666         }
2667         if (shared) {
2668                 cnt_free = flow_dv_counter_shared_search(cont, id);
2669                 if (cnt_free) {
2670                         if (cnt_free->ref_cnt + 1 == 0) {
2671                                 rte_errno = E2BIG;
2672                                 return NULL;
2673                         }
2674                         cnt_free->ref_cnt++;
2675                         return cnt_free;
2676                 }
2677         }
2678         /* Pools which has a free counters are in the start. */
2679         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2680                 /*
2681                  * The free counter reset values must be updated between the
2682                  * counter release to the counter allocation, so, at least one
2683                  * query must be done in this time. ensure it by saving the
2684                  * query generation in the release time.
2685                  * The free list is sorted according to the generation - so if
2686                  * the first one is not updated, all the others are not
2687                  * updated too.
2688                  */
2689                 cnt_free = TAILQ_FIRST(&pool->counters);
2690                 if (cnt_free && cnt_free->query_gen + 1 <
2691                     rte_atomic64_read(&pool->query_gen))
2692                         break;
2693                 cnt_free = NULL;
2694         }
2695         if (!cnt_free) {
2696                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
2697                 if (!pool)
2698                         return NULL;
2699         }
2700         cnt_free->batch = batch;
2701         /* Create a DV counter action only in the first time usage. */
2702         if (!cnt_free->action) {
2703                 uint16_t offset;
2704                 struct mlx5_devx_obj *dcs;
2705
2706                 if (batch) {
2707                         offset = cnt_free - &pool->counters_raw[0];
2708                         dcs = pool->min_dcs;
2709                 } else {
2710                         offset = 0;
2711                         dcs = cnt_free->dcs;
2712                 }
2713                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
2714                                         (dcs->obj, offset);
2715                 if (!cnt_free->action) {
2716                         rte_errno = errno;
2717                         return NULL;
2718                 }
2719         }
2720         /* Update the counter reset values. */
2721         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
2722                                  &cnt_free->bytes))
2723                 return NULL;
2724         cnt_free->shared = shared;
2725         cnt_free->ref_cnt = 1;
2726         cnt_free->id = id;
2727         if (!priv->sh->cmng.query_thread_on)
2728                 /* Start the asynchronous batch query by the host thread. */
2729                 mlx5_set_query_alarm(priv->sh);
2730         TAILQ_REMOVE(&pool->counters, cnt_free, next);
2731         if (TAILQ_EMPTY(&pool->counters)) {
2732                 /* Move the pool to the end of the container pool list. */
2733                 TAILQ_REMOVE(&cont->pool_list, pool, next);
2734                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
2735         }
2736         return cnt_free;
2737 }
2738
2739 /**
2740  * Release a flow counter.
2741  *
2742  * @param[in] dev
2743  *   Pointer to the Ethernet device structure.
2744  * @param[in] counter
2745  *   Pointer to the counter handler.
2746  */
2747 static void
2748 flow_dv_counter_release(struct rte_eth_dev *dev,
2749                         struct mlx5_flow_counter *counter)
2750 {
2751         struct mlx5_priv *priv = dev->data->dev_private;
2752
2753         if (!counter)
2754                 return;
2755         if (priv->counter_fallback) {
2756                 flow_dv_counter_release_fallback(dev, counter);
2757                 return;
2758         }
2759         if (--counter->ref_cnt == 0) {
2760                 struct mlx5_flow_counter_pool *pool =
2761                                 flow_dv_counter_pool_get(counter);
2762
2763                 /* Put the counter in the end - the last updated one. */
2764                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
2765                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
2766         }
2767 }
2768
2769 /**
2770  * Verify the @p attributes will be correctly understood by the NIC and store
2771  * them in the @p flow if everything is correct.
2772  *
2773  * @param[in] dev
2774  *   Pointer to dev struct.
2775  * @param[in] attributes
2776  *   Pointer to flow attributes
2777  * @param[out] error
2778  *   Pointer to error structure.
2779  *
2780  * @return
2781  *   0 on success, a negative errno value otherwise and rte_errno is set.
2782  */
2783 static int
2784 flow_dv_validate_attributes(struct rte_eth_dev *dev,
2785                             const struct rte_flow_attr *attributes,
2786                             struct rte_flow_error *error)
2787 {
2788         struct mlx5_priv *priv = dev->data->dev_private;
2789         uint32_t priority_max = priv->config.flow_prio - 1;
2790
2791 #ifndef HAVE_MLX5DV_DR
2792         if (attributes->group)
2793                 return rte_flow_error_set(error, ENOTSUP,
2794                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
2795                                           NULL,
2796                                           "groups is not supported");
2797 #endif
2798         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
2799             attributes->priority >= priority_max)
2800                 return rte_flow_error_set(error, ENOTSUP,
2801                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
2802                                           NULL,
2803                                           "priority out of range");
2804         if (attributes->transfer) {
2805                 if (!priv->config.dv_esw_en)
2806                         return rte_flow_error_set
2807                                 (error, ENOTSUP,
2808                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2809                                  "E-Switch dr is not supported");
2810                 if (!(priv->representor || priv->master))
2811                         return rte_flow_error_set
2812                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2813                                  NULL, "E-Switch configurationd can only be"
2814                                  " done by a master or a representor device");
2815                 if (attributes->egress)
2816                         return rte_flow_error_set
2817                                 (error, ENOTSUP,
2818                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
2819                                  "egress is not supported");
2820                 if (attributes->group >= MLX5_MAX_TABLES_FDB)
2821                         return rte_flow_error_set
2822                                 (error, EINVAL,
2823                                  RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
2824                                  NULL, "group must be smaller than "
2825                                  RTE_STR(MLX5_MAX_FDB_TABLES));
2826         }
2827         if (!(attributes->egress ^ attributes->ingress))
2828                 return rte_flow_error_set(error, ENOTSUP,
2829                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
2830                                           "must specify exactly one of "
2831                                           "ingress or egress");
2832         return 0;
2833 }
2834
2835 /**
2836  * Internal validation function. For validating both actions and items.
2837  *
2838  * @param[in] dev
2839  *   Pointer to the rte_eth_dev structure.
2840  * @param[in] attr
2841  *   Pointer to the flow attributes.
2842  * @param[in] items
2843  *   Pointer to the list of items.
2844  * @param[in] actions
2845  *   Pointer to the list of actions.
2846  * @param[out] error
2847  *   Pointer to the error structure.
2848  *
2849  * @return
2850  *   0 on success, a negative errno value otherwise and rte_errno is set.
2851  */
2852 static int
2853 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
2854                  const struct rte_flow_item items[],
2855                  const struct rte_flow_action actions[],
2856                  struct rte_flow_error *error)
2857 {
2858         int ret;
2859         uint64_t action_flags = 0;
2860         uint64_t item_flags = 0;
2861         uint64_t last_item = 0;
2862         uint8_t next_protocol = 0xff;
2863         int actions_n = 0;
2864         const struct rte_flow_item *gre_item = NULL;
2865         struct rte_flow_item_tcp nic_tcp_mask = {
2866                 .hdr = {
2867                         .tcp_flags = 0xFF,
2868                         .src_port = RTE_BE16(UINT16_MAX),
2869                         .dst_port = RTE_BE16(UINT16_MAX),
2870                 }
2871         };
2872
2873         if (items == NULL)
2874                 return -1;
2875         ret = flow_dv_validate_attributes(dev, attr, error);
2876         if (ret < 0)
2877                 return ret;
2878         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2879                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2880                 switch (items->type) {
2881                 case RTE_FLOW_ITEM_TYPE_VOID:
2882                         break;
2883                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
2884                         ret = flow_dv_validate_item_port_id
2885                                         (dev, items, attr, item_flags, error);
2886                         if (ret < 0)
2887                                 return ret;
2888                         last_item = MLX5_FLOW_ITEM_PORT_ID;
2889                         break;
2890                 case RTE_FLOW_ITEM_TYPE_ETH:
2891                         ret = mlx5_flow_validate_item_eth(items, item_flags,
2892                                                           error);
2893                         if (ret < 0)
2894                                 return ret;
2895                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2896                                              MLX5_FLOW_LAYER_OUTER_L2;
2897                         break;
2898                 case RTE_FLOW_ITEM_TYPE_VLAN:
2899                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
2900                                                            error);
2901                         if (ret < 0)
2902                                 return ret;
2903                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2904                                              MLX5_FLOW_LAYER_OUTER_VLAN;
2905                         break;
2906                 case RTE_FLOW_ITEM_TYPE_IPV4:
2907                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
2908                                                            NULL, error);
2909                         if (ret < 0)
2910                                 return ret;
2911                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
2912                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2913                         if (items->mask != NULL &&
2914                             ((const struct rte_flow_item_ipv4 *)
2915                              items->mask)->hdr.next_proto_id) {
2916                                 next_protocol =
2917                                         ((const struct rte_flow_item_ipv4 *)
2918                                          (items->spec))->hdr.next_proto_id;
2919                                 next_protocol &=
2920                                         ((const struct rte_flow_item_ipv4 *)
2921                                          (items->mask))->hdr.next_proto_id;
2922                         } else {
2923                                 /* Reset for inner layer. */
2924                                 next_protocol = 0xff;
2925                         }
2926                         mlx5_flow_tunnel_ip_check(items, &last_item);
2927                         break;
2928                 case RTE_FLOW_ITEM_TYPE_IPV6:
2929                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
2930                                                            NULL, error);
2931                         if (ret < 0)
2932                                 return ret;
2933                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
2934                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2935                         if (items->mask != NULL &&
2936                             ((const struct rte_flow_item_ipv6 *)
2937                              items->mask)->hdr.proto) {
2938                                 next_protocol =
2939                                         ((const struct rte_flow_item_ipv6 *)
2940                                          items->spec)->hdr.proto;
2941                                 next_protocol &=
2942                                         ((const struct rte_flow_item_ipv6 *)
2943                                          items->mask)->hdr.proto;
2944                         } else {
2945                                 /* Reset for inner layer. */
2946                                 next_protocol = 0xff;
2947                         }
2948                         mlx5_flow_tunnel_ip_check(items, &last_item);
2949                         break;
2950                 case RTE_FLOW_ITEM_TYPE_TCP:
2951                         ret = mlx5_flow_validate_item_tcp
2952                                                 (items, item_flags,
2953                                                  next_protocol,
2954                                                  &nic_tcp_mask,
2955                                                  error);
2956                         if (ret < 0)
2957                                 return ret;
2958                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
2959                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
2960                         break;
2961                 case RTE_FLOW_ITEM_TYPE_UDP:
2962                         ret = mlx5_flow_validate_item_udp(items, item_flags,
2963                                                           next_protocol,
2964                                                           error);
2965                         if (ret < 0)
2966                                 return ret;
2967                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
2968                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
2969                         break;
2970                 case RTE_FLOW_ITEM_TYPE_GRE:
2971                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2972                         ret = mlx5_flow_validate_item_gre(items, item_flags,
2973                                                           next_protocol, error);
2974                         if (ret < 0)
2975                                 return ret;
2976                         gre_item = items;
2977                         last_item = MLX5_FLOW_LAYER_GRE;
2978                         break;
2979                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
2980                         ret = mlx5_flow_validate_item_gre_key
2981                                 (items, item_flags, gre_item, error);
2982                         if (ret < 0)
2983                                 return ret;
2984                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
2985                         break;
2986                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2987                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
2988                                                             error);
2989                         if (ret < 0)
2990                                 return ret;
2991                         last_item = MLX5_FLOW_LAYER_VXLAN;
2992                         break;
2993                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2994                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
2995                                                                 item_flags, dev,
2996                                                                 error);
2997                         if (ret < 0)
2998                                 return ret;
2999                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
3000                         break;
3001                 case RTE_FLOW_ITEM_TYPE_MPLS:
3002                         ret = mlx5_flow_validate_item_mpls(dev, items,
3003                                                            item_flags,
3004                                                            last_item, error);
3005                         if (ret < 0)
3006                                 return ret;
3007                         last_item = MLX5_FLOW_LAYER_MPLS;
3008                         break;
3009                 case RTE_FLOW_ITEM_TYPE_META:
3010                         ret = flow_dv_validate_item_meta(dev, items, attr,
3011                                                          error);
3012                         if (ret < 0)
3013                                 return ret;
3014                         last_item = MLX5_FLOW_ITEM_METADATA;
3015                         break;
3016                 case RTE_FLOW_ITEM_TYPE_ICMP:
3017                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
3018                                                            next_protocol,
3019                                                            error);
3020                         if (ret < 0)
3021                                 return ret;
3022                         last_item = MLX5_FLOW_LAYER_ICMP;
3023                         break;
3024                 case RTE_FLOW_ITEM_TYPE_ICMP6:
3025                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
3026                                                             next_protocol,
3027                                                             error);
3028                         if (ret < 0)
3029                                 return ret;
3030                         last_item = MLX5_FLOW_LAYER_ICMP6;
3031                         break;
3032                 default:
3033                         return rte_flow_error_set(error, ENOTSUP,
3034                                                   RTE_FLOW_ERROR_TYPE_ITEM,
3035                                                   NULL, "item not supported");
3036                 }
3037                 item_flags |= last_item;
3038         }
3039         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3040                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
3041                         return rte_flow_error_set(error, ENOTSUP,
3042                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3043                                                   actions, "too many actions");
3044                 switch (actions->type) {
3045                 case RTE_FLOW_ACTION_TYPE_VOID:
3046                         break;
3047                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
3048                         ret = flow_dv_validate_action_port_id(dev,
3049                                                               action_flags,
3050                                                               actions,
3051                                                               attr,
3052                                                               error);
3053                         if (ret)
3054                                 return ret;
3055                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
3056                         ++actions_n;
3057                         break;
3058                 case RTE_FLOW_ACTION_TYPE_FLAG:
3059                         ret = mlx5_flow_validate_action_flag(action_flags,
3060                                                              attr, error);
3061                         if (ret < 0)
3062                                 return ret;
3063                         action_flags |= MLX5_FLOW_ACTION_FLAG;
3064                         ++actions_n;
3065                         break;
3066                 case RTE_FLOW_ACTION_TYPE_MARK:
3067                         ret = mlx5_flow_validate_action_mark(actions,
3068                                                              action_flags,
3069                                                              attr, error);
3070                         if (ret < 0)
3071                                 return ret;
3072                         action_flags |= MLX5_FLOW_ACTION_MARK;
3073                         ++actions_n;
3074                         break;
3075                 case RTE_FLOW_ACTION_TYPE_DROP:
3076                         ret = mlx5_flow_validate_action_drop(action_flags,
3077                                                              attr, error);
3078                         if (ret < 0)
3079                                 return ret;
3080                         action_flags |= MLX5_FLOW_ACTION_DROP;
3081                         ++actions_n;
3082                         break;
3083                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3084                         ret = mlx5_flow_validate_action_queue(actions,
3085                                                               action_flags, dev,
3086                                                               attr, error);
3087                         if (ret < 0)
3088                                 return ret;
3089                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
3090                         ++actions_n;
3091                         break;
3092                 case RTE_FLOW_ACTION_TYPE_RSS:
3093                         ret = mlx5_flow_validate_action_rss(actions,
3094                                                             action_flags, dev,
3095                                                             attr, item_flags,
3096                                                             error);
3097                         if (ret < 0)
3098                                 return ret;
3099                         action_flags |= MLX5_FLOW_ACTION_RSS;
3100                         ++actions_n;
3101                         break;
3102                 case RTE_FLOW_ACTION_TYPE_COUNT:
3103                         ret = flow_dv_validate_action_count(dev, error);
3104                         if (ret < 0)
3105                                 return ret;
3106                         action_flags |= MLX5_FLOW_ACTION_COUNT;
3107                         ++actions_n;
3108                         break;
3109                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3110                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3111                         ret = flow_dv_validate_action_l2_encap(action_flags,
3112                                                                actions, attr,
3113                                                                error);
3114                         if (ret < 0)
3115                                 return ret;
3116                         action_flags |= actions->type ==
3117                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
3118                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
3119                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
3120                         ++actions_n;
3121                         break;
3122                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3123                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3124                         ret = flow_dv_validate_action_l2_decap(action_flags,
3125                                                                attr, error);
3126                         if (ret < 0)
3127                                 return ret;
3128                         action_flags |= actions->type ==
3129                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
3130                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
3131                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
3132                         ++actions_n;
3133                         break;
3134                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3135                         ret = flow_dv_validate_action_raw_encap(action_flags,
3136                                                                 actions, attr,
3137                                                                 error);
3138                         if (ret < 0)
3139                                 return ret;
3140                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
3141                         ++actions_n;
3142                         break;
3143                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3144                         ret = flow_dv_validate_action_raw_decap(action_flags,
3145                                                                 actions, attr,
3146                                                                 error);
3147                         if (ret < 0)
3148                                 return ret;
3149                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
3150                         ++actions_n;
3151                         break;
3152                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3153                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3154                         ret = flow_dv_validate_action_modify_mac(action_flags,
3155                                                                  actions,
3156                                                                  item_flags,
3157                                                                  error);
3158                         if (ret < 0)
3159                                 return ret;
3160                         /* Count all modify-header actions as one action. */
3161                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3162                                 ++actions_n;
3163                         action_flags |= actions->type ==
3164                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
3165                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
3166                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
3167                         break;
3168
3169                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3170                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3171                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
3172                                                                   actions,
3173                                                                   item_flags,
3174                                                                   error);
3175                         if (ret < 0)
3176                                 return ret;
3177                         /* Count all modify-header actions as one action. */
3178                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3179                                 ++actions_n;
3180                         action_flags |= actions->type ==
3181                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
3182                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
3183                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
3184                         break;
3185                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3186                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3187                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
3188                                                                   actions,
3189                                                                   item_flags,
3190                                                                   error);
3191                         if (ret < 0)
3192                                 return ret;
3193                         /* Count all modify-header actions as one action. */
3194                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3195                                 ++actions_n;
3196                         action_flags |= actions->type ==
3197                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
3198                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
3199                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
3200                         break;
3201                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3202                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3203                         ret = flow_dv_validate_action_modify_tp(action_flags,
3204                                                                 actions,
3205                                                                 item_flags,
3206                                                                 error);
3207                         if (ret < 0)
3208                                 return ret;
3209                         /* Count all modify-header actions as one action. */
3210                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3211                                 ++actions_n;
3212                         action_flags |= actions->type ==
3213                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
3214                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
3215                                                 MLX5_FLOW_ACTION_SET_TP_DST;
3216                         break;
3217                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3218                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
3219                         ret = flow_dv_validate_action_modify_ttl(action_flags,
3220                                                                  actions,
3221                                                                  item_flags,
3222                                                                  error);
3223                         if (ret < 0)
3224                                 return ret;
3225                         /* Count all modify-header actions as one action. */
3226                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3227                                 ++actions_n;
3228                         action_flags |= actions->type ==
3229                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
3230                                                 MLX5_FLOW_ACTION_SET_TTL :
3231                                                 MLX5_FLOW_ACTION_DEC_TTL;
3232                         break;
3233                 case RTE_FLOW_ACTION_TYPE_JUMP:
3234                         ret = flow_dv_validate_action_jump(actions,
3235                                                            attr->group, error);
3236                         if (ret)
3237                                 return ret;
3238                         ++actions_n;
3239                         action_flags |= MLX5_FLOW_ACTION_JUMP;
3240                         break;
3241                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3242                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3243                         ret = flow_dv_validate_action_modify_tcp_seq
3244                                                                 (action_flags,
3245                                                                  actions,
3246                                                                  item_flags,
3247                                                                  error);
3248                         if (ret < 0)
3249                                 return ret;
3250                         /* Count all modify-header actions as one action. */
3251                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3252                                 ++actions_n;
3253                         action_flags |= actions->type ==
3254                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
3255                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
3256                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
3257                         break;
3258                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3259                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3260                         ret = flow_dv_validate_action_modify_tcp_ack
3261                                                                 (action_flags,
3262                                                                  actions,
3263                                                                  item_flags,
3264                                                                  error);
3265                         if (ret < 0)
3266                                 return ret;
3267                         /* Count all modify-header actions as one action. */
3268                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3269                                 ++actions_n;
3270                         action_flags |= actions->type ==
3271                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
3272                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
3273                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
3274                         break;
3275                 default:
3276                         return rte_flow_error_set(error, ENOTSUP,
3277                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3278                                                   actions,
3279                                                   "action not supported");
3280                 }
3281         }
3282         /* Eswitch has few restrictions on using items and actions */
3283         if (attr->transfer) {
3284                 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3285                         return rte_flow_error_set(error, ENOTSUP,
3286                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3287                                                   NULL,
3288                                                   "unsupported action FLAG");
3289                 if (action_flags & MLX5_FLOW_ACTION_MARK)
3290                         return rte_flow_error_set(error, ENOTSUP,
3291                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3292                                                   NULL,
3293                                                   "unsupported action MARK");
3294                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
3295                         return rte_flow_error_set(error, ENOTSUP,
3296                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3297                                                   NULL,
3298                                                   "unsupported action QUEUE");
3299                 if (action_flags & MLX5_FLOW_ACTION_RSS)
3300                         return rte_flow_error_set(error, ENOTSUP,
3301                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3302                                                   NULL,
3303                                                   "unsupported action RSS");
3304                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3305                         return rte_flow_error_set(error, EINVAL,
3306                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3307                                                   actions,
3308                                                   "no fate action is found");
3309         } else {
3310                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
3311                         return rte_flow_error_set(error, EINVAL,
3312                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3313                                                   actions,
3314                                                   "no fate action is found");
3315         }
3316         return 0;
3317 }
3318
3319 /**
3320  * Internal preparation function. Allocates the DV flow size,
3321  * this size is constant.
3322  *
3323  * @param[in] attr
3324  *   Pointer to the flow attributes.
3325  * @param[in] items
3326  *   Pointer to the list of items.
3327  * @param[in] actions
3328  *   Pointer to the list of actions.
3329  * @param[out] error
3330  *   Pointer to the error structure.
3331  *
3332  * @return
3333  *   Pointer to mlx5_flow object on success,
3334  *   otherwise NULL and rte_errno is set.
3335  */
3336 static struct mlx5_flow *
3337 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
3338                 const struct rte_flow_item items[] __rte_unused,
3339                 const struct rte_flow_action actions[] __rte_unused,
3340                 struct rte_flow_error *error)
3341 {
3342         uint32_t size = sizeof(struct mlx5_flow);
3343         struct mlx5_flow *flow;
3344
3345         flow = rte_calloc(__func__, 1, size, 0);
3346         if (!flow) {
3347                 rte_flow_error_set(error, ENOMEM,
3348                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3349                                    "not enough memory to create flow");
3350                 return NULL;
3351         }
3352         flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
3353         return flow;
3354 }
3355
3356 #ifndef NDEBUG
3357 /**
3358  * Sanity check for match mask and value. Similar to check_valid_spec() in
3359  * kernel driver. If unmasked bit is present in value, it returns failure.
3360  *
3361  * @param match_mask
3362  *   pointer to match mask buffer.
3363  * @param match_value
3364  *   pointer to match value buffer.
3365  *
3366  * @return
3367  *   0 if valid, -EINVAL otherwise.
3368  */
3369 static int
3370 flow_dv_check_valid_spec(void *match_mask, void *match_value)
3371 {
3372         uint8_t *m = match_mask;
3373         uint8_t *v = match_value;
3374         unsigned int i;
3375
3376         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
3377                 if (v[i] & ~m[i]) {
3378                         DRV_LOG(ERR,
3379                                 "match_value differs from match_criteria"
3380                                 " %p[%u] != %p[%u]",
3381                                 match_value, i, match_mask, i);
3382                         return -EINVAL;
3383                 }
3384         }
3385         return 0;
3386 }
3387 #endif
3388
3389 /**
3390  * Add Ethernet item to matcher and to the value.
3391  *
3392  * @param[in, out] matcher
3393  *   Flow matcher.
3394  * @param[in, out] key
3395  *   Flow matcher value.
3396  * @param[in] item
3397  *   Flow pattern to translate.
3398  * @param[in] inner
3399  *   Item is inner pattern.
3400  */
3401 static void
3402 flow_dv_translate_item_eth(void *matcher, void *key,
3403                            const struct rte_flow_item *item, int inner)
3404 {
3405         const struct rte_flow_item_eth *eth_m = item->mask;
3406         const struct rte_flow_item_eth *eth_v = item->spec;
3407         const struct rte_flow_item_eth nic_mask = {
3408                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3409                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3410                 .type = RTE_BE16(0xffff),
3411         };
3412         void *headers_m;
3413         void *headers_v;
3414         char *l24_v;
3415         unsigned int i;
3416
3417         if (!eth_v)
3418                 return;
3419         if (!eth_m)
3420                 eth_m = &nic_mask;
3421         if (inner) {
3422                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3423                                          inner_headers);
3424                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3425         } else {
3426                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3427                                          outer_headers);
3428                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3429         }
3430         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
3431                &eth_m->dst, sizeof(eth_m->dst));
3432         /* The value must be in the range of the mask. */
3433         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
3434         for (i = 0; i < sizeof(eth_m->dst); ++i)
3435                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
3436         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
3437                &eth_m->src, sizeof(eth_m->src));
3438         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
3439         /* The value must be in the range of the mask. */
3440         for (i = 0; i < sizeof(eth_m->dst); ++i)
3441                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
3442         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
3443                  rte_be_to_cpu_16(eth_m->type));
3444         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
3445         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
3446 }
3447
3448 /**
3449  * Add VLAN item to matcher and to the value.
3450  *
3451  * @param[in, out] matcher
3452  *   Flow matcher.
3453  * @param[in, out] key
3454  *   Flow matcher value.
3455  * @param[in] item
3456  *   Flow pattern to translate.
3457  * @param[in] inner
3458  *   Item is inner pattern.
3459  */
3460 static void
3461 flow_dv_translate_item_vlan(void *matcher, void *key,
3462                             const struct rte_flow_item *item,
3463                             int inner)
3464 {
3465         const struct rte_flow_item_vlan *vlan_m = item->mask;
3466         const struct rte_flow_item_vlan *vlan_v = item->spec;
3467         const struct rte_flow_item_vlan nic_mask = {
3468                 .tci = RTE_BE16(0x0fff),
3469                 .inner_type = RTE_BE16(0xffff),
3470         };
3471         void *headers_m;
3472         void *headers_v;
3473         uint16_t tci_m;
3474         uint16_t tci_v;
3475
3476         if (!vlan_v)
3477                 return;
3478         if (!vlan_m)
3479                 vlan_m = &nic_mask;
3480         if (inner) {
3481                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3482                                          inner_headers);
3483                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3484         } else {
3485                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3486                                          outer_headers);
3487                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3488         }
3489         tci_m = rte_be_to_cpu_16(vlan_m->tci);
3490         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
3491         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
3492         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
3493         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
3494         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
3495         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
3496         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
3497         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
3498         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
3499 }
3500
3501 /**
3502  * Add IPV4 item to matcher and to the value.
3503  *
3504  * @param[in, out] matcher
3505  *   Flow matcher.
3506  * @param[in, out] key
3507  *   Flow matcher value.
3508  * @param[in] item
3509  *   Flow pattern to translate.
3510  * @param[in] inner
3511  *   Item is inner pattern.
3512  * @param[in] group
3513  *   The group to insert the rule.
3514  */
3515 static void
3516 flow_dv_translate_item_ipv4(void *matcher, void *key,
3517                             const struct rte_flow_item *item,
3518                             int inner, uint32_t group)
3519 {
3520         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
3521         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
3522         const struct rte_flow_item_ipv4 nic_mask = {
3523                 .hdr = {
3524                         .src_addr = RTE_BE32(0xffffffff),
3525                         .dst_addr = RTE_BE32(0xffffffff),
3526                         .type_of_service = 0xff,
3527                         .next_proto_id = 0xff,
3528                 },
3529         };
3530         void *headers_m;
3531         void *headers_v;
3532         char *l24_m;
3533         char *l24_v;
3534         uint8_t tos;
3535
3536         if (inner) {
3537                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3538                                          inner_headers);
3539                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3540         } else {
3541                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3542                                          outer_headers);
3543                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3544         }
3545         if (group == 0)
3546                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
3547         else
3548                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
3549         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
3550         if (!ipv4_v)
3551                 return;
3552         if (!ipv4_m)
3553                 ipv4_m = &nic_mask;
3554         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3555                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
3556         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3557                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
3558         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
3559         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
3560         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3561                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
3562         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3563                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
3564         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
3565         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
3566         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
3567         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
3568                  ipv4_m->hdr.type_of_service);
3569         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
3570         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
3571                  ipv4_m->hdr.type_of_service >> 2);
3572         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
3573         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
3574                  ipv4_m->hdr.next_proto_id);
3575         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3576                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
3577 }
3578
3579 /**
3580  * Add IPV6 item to matcher and to the value.
3581  *
3582  * @param[in, out] matcher
3583  *   Flow matcher.
3584  * @param[in, out] key
3585  *   Flow matcher value.
3586  * @param[in] item
3587  *   Flow pattern to translate.
3588  * @param[in] inner
3589  *   Item is inner pattern.
3590  * @param[in] group
3591  *   The group to insert the rule.
3592  */
3593 static void
3594 flow_dv_translate_item_ipv6(void *matcher, void *key,
3595                             const struct rte_flow_item *item,
3596                             int inner, uint32_t group)
3597 {
3598         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
3599         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
3600         const struct rte_flow_item_ipv6 nic_mask = {
3601                 .hdr = {
3602                         .src_addr =
3603                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
3604                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
3605                         .dst_addr =
3606                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
3607                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
3608                         .vtc_flow = RTE_BE32(0xffffffff),
3609                         .proto = 0xff,
3610                         .hop_limits = 0xff,
3611                 },
3612         };
3613         void *headers_m;
3614         void *headers_v;
3615         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3616         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3617         char *l24_m;
3618         char *l24_v;
3619         uint32_t vtc_m;
3620         uint32_t vtc_v;
3621         int i;
3622         int size;
3623
3624         if (inner) {
3625                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3626                                          inner_headers);
3627                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3628         } else {
3629                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3630                                          outer_headers);
3631                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3632         }
3633         if (group == 0)
3634                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
3635         else
3636                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
3637         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
3638         if (!ipv6_v)
3639                 return;
3640         if (!ipv6_m)
3641                 ipv6_m = &nic_mask;
3642         size = sizeof(ipv6_m->hdr.dst_addr);
3643         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3644                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
3645         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3646                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
3647         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
3648         for (i = 0; i < size; ++i)
3649                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
3650         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3651                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
3652         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3653                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
3654         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
3655         for (i = 0; i < size; ++i)
3656                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
3657         /* TOS. */
3658         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
3659         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
3660         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
3661         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
3662         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
3663         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
3664         /* Label. */
3665         if (inner) {
3666                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
3667                          vtc_m);
3668                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
3669                          vtc_v);
3670         } else {
3671                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
3672                          vtc_m);
3673                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
3674                          vtc_v);
3675         }
3676         /* Protocol. */
3677         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
3678                  ipv6_m->hdr.proto);
3679         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3680                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
3681 }
3682
3683 /**
3684  * Add TCP item to matcher and to the value.
3685  *
3686  * @param[in, out] matcher
3687  *   Flow matcher.
3688  * @param[in, out] key
3689  *   Flow matcher value.
3690  * @param[in] item
3691  *   Flow pattern to translate.
3692  * @param[in] inner
3693  *   Item is inner pattern.
3694  */
3695 static void
3696 flow_dv_translate_item_tcp(void *matcher, void *key,
3697                            const struct rte_flow_item *item,
3698                            int inner)
3699 {
3700         const struct rte_flow_item_tcp *tcp_m = item->mask;
3701         const struct rte_flow_item_tcp *tcp_v = item->spec;
3702         void *headers_m;
3703         void *headers_v;
3704
3705         if (inner) {
3706                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3707                                          inner_headers);
3708                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3709         } else {
3710                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3711                                          outer_headers);
3712                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3713         }
3714         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3715         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
3716         if (!tcp_v)
3717                 return;
3718         if (!tcp_m)
3719                 tcp_m = &rte_flow_item_tcp_mask;
3720         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
3721                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
3722         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
3723                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
3724         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
3725                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
3726         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
3727                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
3728         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
3729                  tcp_m->hdr.tcp_flags);
3730         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
3731                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
3732 }
3733
3734 /**
3735  * Add UDP item to matcher and to the value.
3736  *
3737  * @param[in, out] matcher
3738  *   Flow matcher.
3739  * @param[in, out] key
3740  *   Flow matcher value.
3741  * @param[in] item
3742  *   Flow pattern to translate.
3743  * @param[in] inner
3744  *   Item is inner pattern.
3745  */
3746 static void
3747 flow_dv_translate_item_udp(void *matcher, void *key,
3748                            const struct rte_flow_item *item,
3749                            int inner)
3750 {
3751         const struct rte_flow_item_udp *udp_m = item->mask;
3752         const struct rte_flow_item_udp *udp_v = item->spec;
3753         void *headers_m;
3754         void *headers_v;
3755
3756         if (inner) {
3757                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3758                                          inner_headers);
3759                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3760         } else {
3761                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3762                                          outer_headers);
3763                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3764         }
3765         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3766         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
3767         if (!udp_v)
3768                 return;
3769         if (!udp_m)
3770                 udp_m = &rte_flow_item_udp_mask;
3771         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
3772                  rte_be_to_cpu_16(udp_m->hdr.src_port));
3773         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
3774                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
3775         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
3776                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
3777         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
3778                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
3779 }
3780
3781 /**
3782  * Add GRE optional Key item to matcher and to the value.
3783  *
3784  * @param[in, out] matcher
3785  *   Flow matcher.
3786  * @param[in, out] key
3787  *   Flow matcher value.
3788  * @param[in] item
3789  *   Flow pattern to translate.
3790  * @param[in] inner
3791  *   Item is inner pattern.
3792  */
3793 static void
3794 flow_dv_translate_item_gre_key(void *matcher, void *key,
3795                                    const struct rte_flow_item *item)
3796 {
3797         const rte_be32_t *key_m = item->mask;
3798         const rte_be32_t *key_v = item->spec;
3799         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3800         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3801         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
3802
3803         if (!key_v)
3804                 return;
3805         if (!key_m)
3806                 key_m = &gre_key_default_mask;
3807         /* GRE K bit must be on and should already be validated */
3808         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
3809         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
3810         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
3811                  rte_be_to_cpu_32(*key_m) >> 8);
3812         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
3813                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
3814         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
3815                  rte_be_to_cpu_32(*key_m) & 0xFF);
3816         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
3817                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
3818 }
3819
3820 /**
3821  * Add GRE item to matcher and to the value.
3822  *
3823  * @param[in, out] matcher
3824  *   Flow matcher.
3825  * @param[in, out] key
3826  *   Flow matcher value.
3827  * @param[in] item
3828  *   Flow pattern to translate.
3829  * @param[in] inner
3830  *   Item is inner pattern.
3831  */
3832 static void
3833 flow_dv_translate_item_gre(void *matcher, void *key,
3834                            const struct rte_flow_item *item,
3835                            int inner)
3836 {
3837         const struct rte_flow_item_gre *gre_m = item->mask;
3838         const struct rte_flow_item_gre *gre_v = item->spec;
3839         void *headers_m;
3840         void *headers_v;
3841         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3842         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3843         struct {
3844                 union {
3845                         __extension__
3846                         struct {
3847                                 uint16_t version:3;
3848                                 uint16_t rsvd0:9;
3849                                 uint16_t s_present:1;
3850                                 uint16_t k_present:1;
3851                                 uint16_t rsvd_bit1:1;
3852                                 uint16_t c_present:1;
3853                         };
3854                         uint16_t value;
3855                 };
3856         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
3857
3858         if (inner) {
3859                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3860                                          inner_headers);
3861                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3862         } else {
3863                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3864                                          outer_headers);
3865                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3866         }
3867         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3868         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
3869         if (!gre_v)
3870                 return;
3871         if (!gre_m)
3872                 gre_m = &rte_flow_item_gre_mask;
3873         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
3874                  rte_be_to_cpu_16(gre_m->protocol));
3875         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
3876                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
3877         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
3878         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
3879         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
3880                  gre_crks_rsvd0_ver_m.c_present);
3881         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
3882                  gre_crks_rsvd0_ver_v.c_present &
3883                  gre_crks_rsvd0_ver_m.c_present);
3884         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
3885                  gre_crks_rsvd0_ver_m.k_present);
3886         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
3887                  gre_crks_rsvd0_ver_v.k_present &
3888                  gre_crks_rsvd0_ver_m.k_present);
3889         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
3890                  gre_crks_rsvd0_ver_m.s_present);
3891         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
3892                  gre_crks_rsvd0_ver_v.s_present &
3893                  gre_crks_rsvd0_ver_m.s_present);
3894 }
3895
3896 /**
3897  * Add NVGRE item to matcher and to the value.
3898  *
3899  * @param[in, out] matcher
3900  *   Flow matcher.
3901  * @param[in, out] key
3902  *   Flow matcher value.
3903  * @param[in] item
3904  *   Flow pattern to translate.
3905  * @param[in] inner
3906  *   Item is inner pattern.
3907  */
3908 static void
3909 flow_dv_translate_item_nvgre(void *matcher, void *key,
3910                              const struct rte_flow_item *item,
3911                              int inner)
3912 {
3913         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
3914         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
3915         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3916         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3917         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
3918         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
3919         char *gre_key_m;
3920         char *gre_key_v;
3921         int size;
3922         int i;
3923
3924         flow_dv_translate_item_gre(matcher, key, item, inner);
3925         if (!nvgre_v)
3926                 return;
3927         if (!nvgre_m)
3928                 nvgre_m = &rte_flow_item_nvgre_mask;
3929         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
3930         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
3931         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
3932         memcpy(gre_key_m, tni_flow_id_m, size);
3933         for (i = 0; i < size; ++i)
3934                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
3935 }
3936
3937 /**
3938  * Add VXLAN item to matcher and to the value.
3939  *
3940  * @param[in, out] matcher
3941  *   Flow matcher.
3942  * @param[in, out] key
3943  *   Flow matcher value.
3944  * @param[in] item
3945  *   Flow pattern to translate.
3946  * @param[in] inner
3947  *   Item is inner pattern.
3948  */
3949 static void
3950 flow_dv_translate_item_vxlan(void *matcher, void *key,
3951                              const struct rte_flow_item *item,
3952                              int inner)
3953 {
3954         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
3955         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
3956         void *headers_m;
3957         void *headers_v;
3958         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3959         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3960         char *vni_m;
3961         char *vni_v;
3962         uint16_t dport;
3963         int size;
3964         int i;
3965
3966         if (inner) {
3967                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3968                                          inner_headers);
3969                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3970         } else {
3971                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3972                                          outer_headers);
3973                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3974         }
3975         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
3976                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
3977         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
3978                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
3979                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
3980         }
3981         if (!vxlan_v)
3982                 return;
3983         if (!vxlan_m)
3984                 vxlan_m = &rte_flow_item_vxlan_mask;
3985         size = sizeof(vxlan_m->vni);
3986         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
3987         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
3988         memcpy(vni_m, vxlan_m->vni, size);
3989         for (i = 0; i < size; ++i)
3990                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
3991 }
3992
3993 /**
3994  * Add MPLS item to matcher and to the value.
3995  *
3996  * @param[in, out] matcher
3997  *   Flow matcher.
3998  * @param[in, out] key
3999  *   Flow matcher value.
4000  * @param[in] item
4001  *   Flow pattern to translate.
4002  * @param[in] prev_layer
4003  *   The protocol layer indicated in previous item.
4004  * @param[in] inner
4005  *   Item is inner pattern.
4006  */
4007 static void
4008 flow_dv_translate_item_mpls(void *matcher, void *key,
4009                             const struct rte_flow_item *item,
4010                             uint64_t prev_layer,
4011                             int inner)
4012 {
4013         const uint32_t *in_mpls_m = item->mask;
4014         const uint32_t *in_mpls_v = item->spec;
4015         uint32_t *out_mpls_m = 0;
4016         uint32_t *out_mpls_v = 0;
4017         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4018         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4019         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
4020                                      misc_parameters_2);
4021         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
4022         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
4023         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4024
4025         switch (prev_layer) {
4026         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
4027                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
4028                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
4029                          MLX5_UDP_PORT_MPLS);
4030                 break;
4031         case MLX5_FLOW_LAYER_GRE:
4032                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
4033                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
4034                          RTE_ETHER_TYPE_MPLS);
4035                 break;
4036         default:
4037                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
4038                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
4039                          IPPROTO_MPLS);
4040                 break;
4041         }
4042         if (!in_mpls_v)
4043                 return;
4044         if (!in_mpls_m)
4045                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
4046         switch (prev_layer) {
4047         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
4048                 out_mpls_m =
4049                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
4050                                                  outer_first_mpls_over_udp);
4051                 out_mpls_v =
4052                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
4053                                                  outer_first_mpls_over_udp);
4054                 break;
4055         case MLX5_FLOW_LAYER_GRE:
4056                 out_mpls_m =
4057                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
4058                                                  outer_first_mpls_over_gre);
4059                 out_mpls_v =
4060                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
4061                                                  outer_first_mpls_over_gre);
4062                 break;
4063         default:
4064                 /* Inner MPLS not over GRE is not supported. */
4065                 if (!inner) {
4066                         out_mpls_m =
4067                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
4068                                                          misc2_m,
4069                                                          outer_first_mpls);
4070                         out_mpls_v =
4071                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
4072                                                          misc2_v,
4073                                                          outer_first_mpls);
4074                 }
4075                 break;
4076         }
4077         if (out_mpls_m && out_mpls_v) {
4078                 *out_mpls_m = *in_mpls_m;
4079                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
4080         }
4081 }
4082
4083 /**
4084  * Add META item to matcher
4085  *
4086  * @param[in, out] matcher
4087  *   Flow matcher.
4088  * @param[in, out] key
4089  *   Flow matcher value.
4090  * @param[in] item
4091  *   Flow pattern to translate.
4092  * @param[in] inner
4093  *   Item is inner pattern.
4094  */
4095 static void
4096 flow_dv_translate_item_meta(void *matcher, void *key,
4097                             const struct rte_flow_item *item)
4098 {
4099         const struct rte_flow_item_meta *meta_m;
4100         const struct rte_flow_item_meta *meta_v;
4101         void *misc2_m =
4102                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
4103         void *misc2_v =
4104                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
4105
4106         meta_m = (const void *)item->mask;
4107         if (!meta_m)
4108                 meta_m = &rte_flow_item_meta_mask;
4109         meta_v = (const void *)item->spec;
4110         if (meta_v) {
4111                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a,
4112                          rte_be_to_cpu_32(meta_m->data));
4113                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a,
4114                          rte_be_to_cpu_32(meta_v->data & meta_m->data));
4115         }
4116 }
4117
4118 /**
4119  * Add source vport match to the specified matcher.
4120  *
4121  * @param[in, out] matcher
4122  *   Flow matcher.
4123  * @param[in, out] key
4124  *   Flow matcher value.
4125  * @param[in] port
4126  *   Source vport value to match
4127  * @param[in] mask
4128  *   Mask
4129  */
4130 static void
4131 flow_dv_translate_item_source_vport(void *matcher, void *key,
4132                                     int16_t port, uint16_t mask)
4133 {
4134         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4135         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4136
4137         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
4138         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
4139 }
4140
4141 /**
4142  * Translate port-id item to eswitch match on  port-id.
4143  *
4144  * @param[in] dev
4145  *   The devich to configure through.
4146  * @param[in, out] matcher
4147  *   Flow matcher.
4148  * @param[in, out] key
4149  *   Flow matcher value.
4150  * @param[in] item
4151  *   Flow pattern to translate.
4152  *
4153  * @return
4154  *   0 on success, a negative errno value otherwise.
4155  */
4156 static int
4157 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
4158                                void *key, const struct rte_flow_item *item)
4159 {
4160         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
4161         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
4162         uint16_t mask, val, id;
4163         int ret;
4164
4165         mask = pid_m ? pid_m->id : 0xffff;
4166         id = pid_v ? pid_v->id : dev->data->port_id;
4167         ret = mlx5_port_to_eswitch_info(id, NULL, &val);
4168         if (ret)
4169                 return ret;
4170         flow_dv_translate_item_source_vport(matcher, key, val, mask);
4171         return 0;
4172 }
4173
4174 /**
4175  * Add ICMP6 item to matcher and to the value.
4176  *
4177  * @param[in, out] matcher
4178  *   Flow matcher.
4179  * @param[in, out] key
4180  *   Flow matcher value.
4181  * @param[in] item
4182  *   Flow pattern to translate.
4183  * @param[in] inner
4184  *   Item is inner pattern.
4185  */
4186 static void
4187 flow_dv_translate_item_icmp6(void *matcher, void *key,
4188                               const struct rte_flow_item *item,
4189                               int inner)
4190 {
4191         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
4192         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
4193         void *headers_m;
4194         void *headers_v;
4195         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4196                                      misc_parameters_3);
4197         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4198         if (inner) {
4199                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4200                                          inner_headers);
4201                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4202         } else {
4203                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4204                                          outer_headers);
4205                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4206         }
4207         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4208         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
4209         if (!icmp6_v)
4210                 return;
4211         if (!icmp6_m)
4212                 icmp6_m = &rte_flow_item_icmp6_mask;
4213         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
4214         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
4215                  icmp6_v->type & icmp6_m->type);
4216         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
4217         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
4218                  icmp6_v->code & icmp6_m->code);
4219 }
4220
4221 /**
4222  * Add ICMP item to matcher and to the value.
4223  *
4224  * @param[in, out] matcher
4225  *   Flow matcher.
4226  * @param[in, out] key
4227  *   Flow matcher value.
4228  * @param[in] item
4229  *   Flow pattern to translate.
4230  * @param[in] inner
4231  *   Item is inner pattern.
4232  */
4233 static void
4234 flow_dv_translate_item_icmp(void *matcher, void *key,
4235                             const struct rte_flow_item *item,
4236                             int inner)
4237 {
4238         const struct rte_flow_item_icmp *icmp_m = item->mask;
4239         const struct rte_flow_item_icmp *icmp_v = item->spec;
4240         void *headers_m;
4241         void *headers_v;
4242         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4243                                      misc_parameters_3);
4244         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4245         if (inner) {
4246                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4247                                          inner_headers);
4248                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4249         } else {
4250                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4251                                          outer_headers);
4252                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4253         }
4254         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4255         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
4256         if (!icmp_v)
4257                 return;
4258         if (!icmp_m)
4259                 icmp_m = &rte_flow_item_icmp_mask;
4260         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
4261                  icmp_m->hdr.icmp_type);
4262         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
4263                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
4264         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
4265                  icmp_m->hdr.icmp_code);
4266         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
4267                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
4268 }
4269
4270 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
4271
4272 #define HEADER_IS_ZERO(match_criteria, headers)                              \
4273         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
4274                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
4275
4276 /**
4277  * Calculate flow matcher enable bitmap.
4278  *
4279  * @param match_criteria
4280  *   Pointer to flow matcher criteria.
4281  *
4282  * @return
4283  *   Bitmap of enabled fields.
4284  */
4285 static uint8_t
4286 flow_dv_matcher_enable(uint32_t *match_criteria)
4287 {
4288         uint8_t match_criteria_enable;
4289
4290         match_criteria_enable =
4291                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
4292                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
4293         match_criteria_enable |=
4294                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
4295                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
4296         match_criteria_enable |=
4297                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
4298                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
4299         match_criteria_enable |=
4300                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
4301                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
4302 #ifdef HAVE_MLX5DV_DR
4303         match_criteria_enable |=
4304                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
4305                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
4306 #endif
4307         return match_criteria_enable;
4308 }
4309
4310
4311 /**
4312  * Get a flow table.
4313  *
4314  * @param dev[in, out]
4315  *   Pointer to rte_eth_dev structure.
4316  * @param[in] table_id
4317  *   Table id to use.
4318  * @param[in] egress
4319  *   Direction of the table.
4320  * @param[in] transfer
4321  *   E-Switch or NIC flow.
4322  * @param[out] error
4323  *   pointer to error structure.
4324  *
4325  * @return
4326  *   Returns tables resource based on the index, NULL in case of failed.
4327  */
4328 static struct mlx5_flow_tbl_resource *
4329 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
4330                          uint32_t table_id, uint8_t egress,
4331                          uint8_t transfer,
4332                          struct rte_flow_error *error)
4333 {
4334         struct mlx5_priv *priv = dev->data->dev_private;
4335         struct mlx5_ibv_shared *sh = priv->sh;
4336         struct mlx5_flow_tbl_resource *tbl;
4337
4338 #ifdef HAVE_MLX5DV_DR
4339         if (transfer) {
4340                 tbl = &sh->fdb_tbl[table_id];
4341                 if (!tbl->obj)
4342                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4343                                 (sh->fdb_domain, table_id);
4344         } else if (egress) {
4345                 tbl = &sh->tx_tbl[table_id];
4346                 if (!tbl->obj)
4347                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4348                                 (sh->tx_domain, table_id);
4349         } else {
4350                 tbl = &sh->rx_tbl[table_id];
4351                 if (!tbl->obj)
4352                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4353                                 (sh->rx_domain, table_id);
4354         }
4355         if (!tbl->obj) {
4356                 rte_flow_error_set(error, ENOMEM,
4357                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4358                                    NULL, "cannot create table");
4359                 return NULL;
4360         }
4361         rte_atomic32_inc(&tbl->refcnt);
4362         return tbl;
4363 #else
4364         (void)error;
4365         (void)tbl;
4366         if (transfer)
4367                 return &sh->fdb_tbl[table_id];
4368         else if (egress)
4369                 return &sh->tx_tbl[table_id];
4370         else
4371                 return &sh->rx_tbl[table_id];
4372 #endif
4373 }
4374
4375 /**
4376  * Release a flow table.
4377  *
4378  * @param[in] tbl
4379  *   Table resource to be released.
4380  *
4381  * @return
4382  *   Returns 0 if table was released, else return 1;
4383  */
4384 static int
4385 flow_dv_tbl_resource_release(struct mlx5_flow_tbl_resource *tbl)
4386 {
4387         if (!tbl)
4388                 return 0;
4389         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
4390                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
4391                 tbl->obj = NULL;
4392                 return 0;
4393         }
4394         return 1;
4395 }
4396
4397 /**
4398  * Register the flow matcher.
4399  *
4400  * @param dev[in, out]
4401  *   Pointer to rte_eth_dev structure.
4402  * @param[in, out] matcher
4403  *   Pointer to flow matcher.
4404  * @parm[in, out] dev_flow
4405  *   Pointer to the dev_flow.
4406  * @param[out] error
4407  *   pointer to error structure.
4408  *
4409  * @return
4410  *   0 on success otherwise -errno and errno is set.
4411  */
4412 static int
4413 flow_dv_matcher_register(struct rte_eth_dev *dev,
4414                          struct mlx5_flow_dv_matcher *matcher,
4415                          struct mlx5_flow *dev_flow,
4416                          struct rte_flow_error *error)
4417 {
4418         struct mlx5_priv *priv = dev->data->dev_private;
4419         struct mlx5_ibv_shared *sh = priv->sh;
4420         struct mlx5_flow_dv_matcher *cache_matcher;
4421         struct mlx5dv_flow_matcher_attr dv_attr = {
4422                 .type = IBV_FLOW_ATTR_NORMAL,
4423                 .match_mask = (void *)&matcher->mask,
4424         };
4425         struct mlx5_flow_tbl_resource *tbl = NULL;
4426
4427         /* Lookup from cache. */
4428         LIST_FOREACH(cache_matcher, &sh->matchers, next) {
4429                 if (matcher->crc == cache_matcher->crc &&
4430                     matcher->priority == cache_matcher->priority &&
4431                     matcher->egress == cache_matcher->egress &&
4432                     matcher->group == cache_matcher->group &&
4433                     matcher->transfer == cache_matcher->transfer &&
4434                     !memcmp((const void *)matcher->mask.buf,
4435                             (const void *)cache_matcher->mask.buf,
4436                             cache_matcher->mask.size)) {
4437                         DRV_LOG(DEBUG,
4438                                 "priority %hd use %s matcher %p: refcnt %d++",
4439                                 cache_matcher->priority,
4440                                 cache_matcher->egress ? "tx" : "rx",
4441                                 (void *)cache_matcher,
4442                                 rte_atomic32_read(&cache_matcher->refcnt));
4443                         rte_atomic32_inc(&cache_matcher->refcnt);
4444                         dev_flow->dv.matcher = cache_matcher;
4445                         return 0;
4446                 }
4447         }
4448         /* Register new matcher. */
4449         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
4450         if (!cache_matcher)
4451                 return rte_flow_error_set(error, ENOMEM,
4452                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4453                                           "cannot allocate matcher memory");
4454         tbl = flow_dv_tbl_resource_get(dev, matcher->group * MLX5_GROUP_FACTOR,
4455                                        matcher->egress, matcher->transfer,
4456                                        error);
4457         if (!tbl) {
4458                 rte_free(cache_matcher);
4459                 return rte_flow_error_set(error, ENOMEM,
4460                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4461                                           NULL, "cannot create table");
4462         }
4463         *cache_matcher = *matcher;
4464         dv_attr.match_criteria_enable =
4465                 flow_dv_matcher_enable(cache_matcher->mask.buf);
4466         dv_attr.priority = matcher->priority;
4467         if (matcher->egress)
4468                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
4469         cache_matcher->matcher_object =
4470                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
4471         if (!cache_matcher->matcher_object) {
4472                 rte_free(cache_matcher);
4473 #ifdef HAVE_MLX5DV_DR
4474                 flow_dv_tbl_resource_release(tbl);
4475 #endif
4476                 return rte_flow_error_set(error, ENOMEM,
4477                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4478                                           NULL, "cannot create matcher");
4479         }
4480         rte_atomic32_inc(&cache_matcher->refcnt);
4481         LIST_INSERT_HEAD(&sh->matchers, cache_matcher, next);
4482         dev_flow->dv.matcher = cache_matcher;
4483         DRV_LOG(DEBUG, "priority %hd new %s matcher %p: refcnt %d",
4484                 cache_matcher->priority,
4485                 cache_matcher->egress ? "tx" : "rx", (void *)cache_matcher,
4486                 rte_atomic32_read(&cache_matcher->refcnt));
4487         rte_atomic32_inc(&tbl->refcnt);
4488         return 0;
4489 }
4490
4491 /**
4492  * Find existing tag resource or create and register a new one.
4493  *
4494  * @param dev[in, out]
4495  *   Pointer to rte_eth_dev structure.
4496  * @param[in, out] resource
4497  *   Pointer to tag resource.
4498  * @parm[in, out] dev_flow
4499  *   Pointer to the dev_flow.
4500  * @param[out] error
4501  *   pointer to error structure.
4502  *
4503  * @return
4504  *   0 on success otherwise -errno and errno is set.
4505  */
4506 static int
4507 flow_dv_tag_resource_register
4508                         (struct rte_eth_dev *dev,
4509                          struct mlx5_flow_dv_tag_resource *resource,
4510                          struct mlx5_flow *dev_flow,
4511                          struct rte_flow_error *error)
4512 {
4513         struct mlx5_priv *priv = dev->data->dev_private;
4514         struct mlx5_ibv_shared *sh = priv->sh;
4515         struct mlx5_flow_dv_tag_resource *cache_resource;
4516
4517         /* Lookup a matching resource from cache. */
4518         LIST_FOREACH(cache_resource, &sh->tags, next) {
4519                 if (resource->tag == cache_resource->tag) {
4520                         DRV_LOG(DEBUG, "tag resource %p: refcnt %d++",
4521                                 (void *)cache_resource,
4522                                 rte_atomic32_read(&cache_resource->refcnt));
4523                         rte_atomic32_inc(&cache_resource->refcnt);
4524                         dev_flow->flow->tag_resource = cache_resource;
4525                         return 0;
4526                 }
4527         }
4528         /* Register new  resource. */
4529         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
4530         if (!cache_resource)
4531                 return rte_flow_error_set(error, ENOMEM,
4532                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4533                                           "cannot allocate resource memory");
4534         *cache_resource = *resource;
4535         cache_resource->action = mlx5_glue->dv_create_flow_action_tag
4536                 (resource->tag);
4537         if (!cache_resource->action) {
4538                 rte_free(cache_resource);
4539                 return rte_flow_error_set(error, ENOMEM,
4540                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4541                                           NULL, "cannot create action");
4542         }
4543         rte_atomic32_init(&cache_resource->refcnt);
4544         rte_atomic32_inc(&cache_resource->refcnt);
4545         LIST_INSERT_HEAD(&sh->tags, cache_resource, next);
4546         dev_flow->flow->tag_resource = cache_resource;
4547         DRV_LOG(DEBUG, "new tag resource %p: refcnt %d++",
4548                 (void *)cache_resource,
4549                 rte_atomic32_read(&cache_resource->refcnt));
4550         return 0;
4551 }
4552
4553 /**
4554  * Release the tag.
4555  *
4556  * @param dev
4557  *   Pointer to Ethernet device.
4558  * @param flow
4559  *   Pointer to mlx5_flow.
4560  *
4561  * @return
4562  *   1 while a reference on it exists, 0 when freed.
4563  */
4564 static int
4565 flow_dv_tag_release(struct rte_eth_dev *dev,
4566                     struct mlx5_flow_dv_tag_resource *tag)
4567 {
4568         assert(tag);
4569         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
4570                 dev->data->port_id, (void *)tag,
4571                 rte_atomic32_read(&tag->refcnt));
4572         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
4573                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
4574                 LIST_REMOVE(tag, next);
4575                 DRV_LOG(DEBUG, "port %u tag %p: removed",
4576                         dev->data->port_id, (void *)tag);
4577                 rte_free(tag);
4578                 return 0;
4579         }
4580         return 1;
4581 }
4582
4583 /**
4584  * Translate port ID action to vport.
4585  *
4586  * @param[in] dev
4587  *   Pointer to rte_eth_dev structure.
4588  * @param[in] action
4589  *   Pointer to the port ID action.
4590  * @param[out] dst_port_id
4591  *   The target port ID.
4592  * @param[out] error
4593  *   Pointer to the error structure.
4594  *
4595  * @return
4596  *   0 on success, a negative errno value otherwise and rte_errno is set.
4597  */
4598 static int
4599 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
4600                                  const struct rte_flow_action *action,
4601                                  uint32_t *dst_port_id,
4602                                  struct rte_flow_error *error)
4603 {
4604         uint32_t port;
4605         uint16_t port_id;
4606         int ret;
4607         const struct rte_flow_action_port_id *conf =
4608                         (const struct rte_flow_action_port_id *)action->conf;
4609
4610         port = conf->original ? dev->data->port_id : conf->id;
4611         ret = mlx5_port_to_eswitch_info(port, NULL, &port_id);
4612         if (ret)
4613                 return rte_flow_error_set(error, -ret,
4614                                           RTE_FLOW_ERROR_TYPE_ACTION,
4615                                           NULL,
4616                                           "No eswitch info was found for port");
4617         *dst_port_id = port_id;
4618         return 0;
4619 }
4620
4621 /**
4622  * Fill the flow with DV spec.
4623  *
4624  * @param[in] dev
4625  *   Pointer to rte_eth_dev structure.
4626  * @param[in, out] dev_flow
4627  *   Pointer to the sub flow.
4628  * @param[in] attr
4629  *   Pointer to the flow attributes.
4630  * @param[in] items
4631  *   Pointer to the list of items.
4632  * @param[in] actions
4633  *   Pointer to the list of actions.
4634  * @param[out] error
4635  *   Pointer to the error structure.
4636  *
4637  * @return
4638  *   0 on success, a negative errno value otherwise and rte_errno is set.
4639  */
4640 static int
4641 flow_dv_translate(struct rte_eth_dev *dev,
4642                   struct mlx5_flow *dev_flow,
4643                   const struct rte_flow_attr *attr,
4644                   const struct rte_flow_item items[],
4645                   const struct rte_flow_action actions[],
4646                   struct rte_flow_error *error)
4647 {
4648         struct mlx5_priv *priv = dev->data->dev_private;
4649         struct rte_flow *flow = dev_flow->flow;
4650         uint64_t item_flags = 0;
4651         uint64_t last_item = 0;
4652         uint64_t action_flags = 0;
4653         uint64_t priority = attr->priority;
4654         struct mlx5_flow_dv_matcher matcher = {
4655                 .mask = {
4656                         .size = sizeof(matcher.mask.buf),
4657                 },
4658         };
4659         int actions_n = 0;
4660         bool actions_end = false;
4661         struct mlx5_flow_dv_modify_hdr_resource res = {
4662                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4663                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
4664         };
4665         union flow_dv_attr flow_attr = { .attr = 0 };
4666         struct mlx5_flow_dv_tag_resource tag_resource;
4667         uint32_t modify_action_position = UINT32_MAX;
4668         void *match_mask = matcher.mask.buf;
4669         void *match_value = dev_flow->dv.value.buf;
4670
4671         flow->group = attr->group;
4672         if (attr->transfer)
4673                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4674         if (priority == MLX5_FLOW_PRIO_RSVD)
4675                 priority = priv->config.flow_prio - 1;
4676         for (; !actions_end ; actions++) {
4677                 const struct rte_flow_action_queue *queue;
4678                 const struct rte_flow_action_rss *rss;
4679                 const struct rte_flow_action *action = actions;
4680                 const struct rte_flow_action_count *count = action->conf;
4681                 const uint8_t *rss_key;
4682                 const struct rte_flow_action_jump *jump_data;
4683                 struct mlx5_flow_dv_jump_tbl_resource jump_tbl_resource;
4684                 struct mlx5_flow_tbl_resource *tbl;
4685                 uint32_t port_id = 0;
4686                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
4687
4688                 switch (actions->type) {
4689                 case RTE_FLOW_ACTION_TYPE_VOID:
4690                         break;
4691                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4692                         if (flow_dv_translate_action_port_id(dev, action,
4693                                                              &port_id, error))
4694                                 return -rte_errno;
4695                         port_id_resource.port_id = port_id;
4696                         if (flow_dv_port_id_action_resource_register
4697                             (dev, &port_id_resource, dev_flow, error))
4698                                 return -rte_errno;
4699                         dev_flow->dv.actions[actions_n++] =
4700                                 dev_flow->dv.port_id_action->action;
4701                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4702                         break;
4703                 case RTE_FLOW_ACTION_TYPE_FLAG:
4704                         tag_resource.tag =
4705                                 mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
4706                         if (!flow->tag_resource)
4707                                 if (flow_dv_tag_resource_register
4708                                     (dev, &tag_resource, dev_flow, error))
4709                                         return errno;
4710                         dev_flow->dv.actions[actions_n++] =
4711                                 flow->tag_resource->action;
4712                         action_flags |= MLX5_FLOW_ACTION_FLAG;
4713                         break;
4714                 case RTE_FLOW_ACTION_TYPE_MARK:
4715                         tag_resource.tag = mlx5_flow_mark_set
4716                               (((const struct rte_flow_action_mark *)
4717                                (actions->conf))->id);
4718                         if (!flow->tag_resource)
4719                                 if (flow_dv_tag_resource_register
4720                                     (dev, &tag_resource, dev_flow, error))
4721                                         return errno;
4722                         dev_flow->dv.actions[actions_n++] =
4723                                 flow->tag_resource->action;
4724                         action_flags |= MLX5_FLOW_ACTION_MARK;
4725                         break;
4726                 case RTE_FLOW_ACTION_TYPE_DROP:
4727                         action_flags |= MLX5_FLOW_ACTION_DROP;
4728                         break;
4729                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4730                         queue = actions->conf;
4731                         flow->rss.queue_num = 1;
4732                         (*flow->queue)[0] = queue->index;
4733                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4734                         break;
4735                 case RTE_FLOW_ACTION_TYPE_RSS:
4736                         rss = actions->conf;
4737                         if (flow->queue)
4738                                 memcpy((*flow->queue), rss->queue,
4739                                        rss->queue_num * sizeof(uint16_t));
4740                         flow->rss.queue_num = rss->queue_num;
4741                         /* NULL RSS key indicates default RSS key. */
4742                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
4743                         memcpy(flow->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
4744                         /* RSS type 0 indicates default RSS type ETH_RSS_IP. */
4745                         flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
4746                         flow->rss.level = rss->level;
4747                         action_flags |= MLX5_FLOW_ACTION_RSS;
4748                         break;
4749                 case RTE_FLOW_ACTION_TYPE_COUNT:
4750                         if (!priv->config.devx) {
4751                                 rte_errno = ENOTSUP;
4752                                 goto cnt_err;
4753                         }
4754                         flow->counter = flow_dv_counter_alloc(dev,
4755                                                               count->shared,
4756                                                               count->id,
4757                                                               attr->group);
4758                         if (flow->counter == NULL)
4759                                 goto cnt_err;
4760                         dev_flow->dv.actions[actions_n++] =
4761                                 flow->counter->action;
4762                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4763                         break;
4764 cnt_err:
4765                         if (rte_errno == ENOTSUP)
4766                                 return rte_flow_error_set
4767                                               (error, ENOTSUP,
4768                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4769                                                NULL,
4770                                                "count action not supported");
4771                         else
4772                                 return rte_flow_error_set
4773                                                 (error, rte_errno,
4774                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4775                                                  action,
4776                                                  "cannot create counter"
4777                                                   " object.");
4778                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4779                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4780                         if (flow_dv_create_action_l2_encap(dev, actions,
4781                                                            dev_flow,
4782                                                            attr->transfer,
4783                                                            error))
4784                                 return -rte_errno;
4785                         dev_flow->dv.actions[actions_n++] =
4786                                 dev_flow->dv.encap_decap->verbs_action;
4787                         action_flags |= actions->type ==
4788                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4789                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4790                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4791                         break;
4792                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4793                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4794                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
4795                                                            attr->transfer,
4796                                                            error))
4797                                 return -rte_errno;
4798                         dev_flow->dv.actions[actions_n++] =
4799                                 dev_flow->dv.encap_decap->verbs_action;
4800                         action_flags |= actions->type ==
4801                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4802                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4803                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4804                         break;
4805                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4806                         /* Handle encap with preceding decap. */
4807                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
4808                                 if (flow_dv_create_action_raw_encap
4809                                         (dev, actions, dev_flow, attr, error))
4810                                         return -rte_errno;
4811                                 dev_flow->dv.actions[actions_n++] =
4812                                         dev_flow->dv.encap_decap->verbs_action;
4813                         } else {
4814                                 /* Handle encap without preceding decap. */
4815                                 if (flow_dv_create_action_l2_encap
4816                                     (dev, actions, dev_flow, attr->transfer,
4817                                      error))
4818                                         return -rte_errno;
4819                                 dev_flow->dv.actions[actions_n++] =
4820                                         dev_flow->dv.encap_decap->verbs_action;
4821                         }
4822                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4823                         break;
4824                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4825                         /* Check if this decap is followed by encap. */
4826                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
4827                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
4828                                action++) {
4829                         }
4830                         /* Handle decap only if it isn't followed by encap. */
4831                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4832                                 if (flow_dv_create_action_l2_decap
4833                                     (dev, dev_flow, attr->transfer, error))
4834                                         return -rte_errno;
4835                                 dev_flow->dv.actions[actions_n++] =
4836                                         dev_flow->dv.encap_decap->verbs_action;
4837                         }
4838                         /* If decap is followed by encap, handle it at encap. */
4839                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4840                         break;
4841                 case RTE_FLOW_ACTION_TYPE_JUMP:
4842                         jump_data = action->conf;
4843                         tbl = flow_dv_tbl_resource_get(dev, jump_data->group *
4844                                                        MLX5_GROUP_FACTOR,
4845                                                        attr->egress,
4846                                                        attr->transfer, error);
4847                         if (!tbl)
4848                                 return rte_flow_error_set
4849                                                 (error, errno,
4850                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4851                                                  NULL,
4852                                                  "cannot create jump action.");
4853                         jump_tbl_resource.tbl = tbl;
4854                         if (flow_dv_jump_tbl_resource_register
4855                             (dev, &jump_tbl_resource, dev_flow, error)) {
4856                                 flow_dv_tbl_resource_release(tbl);
4857                                 return rte_flow_error_set
4858                                                 (error, errno,
4859                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4860                                                  NULL,
4861                                                  "cannot create jump action.");
4862                         }
4863                         dev_flow->dv.actions[actions_n++] =
4864                                 dev_flow->dv.jump->action;
4865                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4866                         break;
4867                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4868                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4869                         if (flow_dv_convert_action_modify_mac(&res, actions,
4870                                                               error))
4871                                 return -rte_errno;
4872                         action_flags |= actions->type ==
4873                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4874                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
4875                                         MLX5_FLOW_ACTION_SET_MAC_DST;
4876                         break;
4877                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4878                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4879                         if (flow_dv_convert_action_modify_ipv4(&res, actions,
4880                                                                error))
4881                                 return -rte_errno;
4882                         action_flags |= actions->type ==
4883                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4884                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
4885                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
4886                         break;
4887                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4888                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4889                         if (flow_dv_convert_action_modify_ipv6(&res, actions,
4890                                                                error))
4891                                 return -rte_errno;
4892                         action_flags |= actions->type ==
4893                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4894                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
4895                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
4896                         break;
4897                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4898                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4899                         if (flow_dv_convert_action_modify_tp(&res, actions,
4900                                                              items, &flow_attr,
4901                                                              error))
4902                                 return -rte_errno;
4903                         action_flags |= actions->type ==
4904                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4905                                         MLX5_FLOW_ACTION_SET_TP_SRC :
4906                                         MLX5_FLOW_ACTION_SET_TP_DST;
4907                         break;
4908                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4909                         if (flow_dv_convert_action_modify_dec_ttl(&res, items,
4910                                                                   &flow_attr,
4911                                                                   error))
4912                                 return -rte_errno;
4913                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
4914                         break;
4915                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4916                         if (flow_dv_convert_action_modify_ttl(&res, actions,
4917                                                              items, &flow_attr,
4918                                                              error))
4919                                 return -rte_errno;
4920                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
4921                         break;
4922                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4923                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4924                         if (flow_dv_convert_action_modify_tcp_seq(&res, actions,
4925                                                                   error))
4926                                 return -rte_errno;
4927                         action_flags |= actions->type ==
4928                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4929                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
4930                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4931                         break;
4932
4933                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4934                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4935                         if (flow_dv_convert_action_modify_tcp_ack(&res, actions,
4936                                                                   error))
4937                                 return -rte_errno;
4938                         action_flags |= actions->type ==
4939                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4940                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
4941                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
4942                         break;
4943                 case RTE_FLOW_ACTION_TYPE_END:
4944                         actions_end = true;
4945                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) {
4946                                 /* create modify action if needed. */
4947                                 if (flow_dv_modify_hdr_resource_register
4948                                                                 (dev, &res,
4949                                                                  dev_flow,
4950                                                                  error))
4951                                         return -rte_errno;
4952                                 dev_flow->dv.actions[modify_action_position] =
4953                                         dev_flow->dv.modify_hdr->verbs_action;
4954                         }
4955                         break;
4956                 default:
4957                         break;
4958                 }
4959                 if ((action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) &&
4960                     modify_action_position == UINT32_MAX)
4961                         modify_action_position = actions_n++;
4962         }
4963         dev_flow->dv.actions_n = actions_n;
4964         flow->actions = action_flags;
4965         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4966                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4967
4968                 switch (items->type) {
4969                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4970                         flow_dv_translate_item_port_id(dev, match_mask,
4971                                                        match_value, items);
4972                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4973                         break;
4974                 case RTE_FLOW_ITEM_TYPE_ETH:
4975                         flow_dv_translate_item_eth(match_mask, match_value,
4976                                                    items, tunnel);
4977                         matcher.priority = MLX5_PRIORITY_MAP_L2;
4978                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4979                                              MLX5_FLOW_LAYER_OUTER_L2;
4980                         break;
4981                 case RTE_FLOW_ITEM_TYPE_VLAN:
4982                         flow_dv_translate_item_vlan(match_mask, match_value,
4983                                                     items, tunnel);
4984                         matcher.priority = MLX5_PRIORITY_MAP_L2;
4985                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
4986                                               MLX5_FLOW_LAYER_INNER_VLAN) :
4987                                              (MLX5_FLOW_LAYER_OUTER_L2 |
4988                                               MLX5_FLOW_LAYER_OUTER_VLAN);
4989                         break;
4990                 case RTE_FLOW_ITEM_TYPE_IPV4:
4991                         flow_dv_translate_item_ipv4(match_mask, match_value,
4992                                                     items, tunnel, attr->group);
4993                         matcher.priority = MLX5_PRIORITY_MAP_L3;
4994                         dev_flow->dv.hash_fields |=
4995                                 mlx5_flow_hashfields_adjust
4996                                         (dev_flow, tunnel,
4997                                          MLX5_IPV4_LAYER_TYPES,
4998                                          MLX5_IPV4_IBV_RX_HASH);
4999                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
5000                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
5001                         mlx5_flow_tunnel_ip_check(items, &last_item);
5002                         break;
5003                 case RTE_FLOW_ITEM_TYPE_IPV6:
5004                         flow_dv_translate_item_ipv6(match_mask, match_value,
5005                                                     items, tunnel, attr->group);
5006                         matcher.priority = MLX5_PRIORITY_MAP_L3;
5007                         dev_flow->dv.hash_fields |=
5008                                 mlx5_flow_hashfields_adjust
5009                                         (dev_flow, tunnel,
5010                                          MLX5_IPV6_LAYER_TYPES,
5011                                          MLX5_IPV6_IBV_RX_HASH);
5012                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
5013                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
5014                         mlx5_flow_tunnel_ip_check(items, &last_item);
5015                         break;
5016                 case RTE_FLOW_ITEM_TYPE_TCP:
5017                         flow_dv_translate_item_tcp(match_mask, match_value,
5018                                                    items, tunnel);
5019                         matcher.priority = MLX5_PRIORITY_MAP_L4;
5020                         dev_flow->dv.hash_fields |=
5021                                 mlx5_flow_hashfields_adjust
5022                                         (dev_flow, tunnel, ETH_RSS_TCP,
5023                                          IBV_RX_HASH_SRC_PORT_TCP |
5024                                          IBV_RX_HASH_DST_PORT_TCP);
5025                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
5026                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
5027                         break;
5028                 case RTE_FLOW_ITEM_TYPE_UDP:
5029                         flow_dv_translate_item_udp(match_mask, match_value,
5030                                                    items, tunnel);
5031                         matcher.priority = MLX5_PRIORITY_MAP_L4;
5032                         dev_flow->dv.hash_fields |=
5033                                 mlx5_flow_hashfields_adjust
5034                                         (dev_flow, tunnel, ETH_RSS_UDP,
5035                                          IBV_RX_HASH_SRC_PORT_UDP |
5036                                          IBV_RX_HASH_DST_PORT_UDP);
5037                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
5038                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
5039                         break;
5040                 case RTE_FLOW_ITEM_TYPE_GRE:
5041                         flow_dv_translate_item_gre(match_mask, match_value,
5042                                                    items, tunnel);
5043                         last_item = MLX5_FLOW_LAYER_GRE;
5044                         break;
5045                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
5046                         flow_dv_translate_item_gre_key(match_mask,
5047                                                        match_value, items);
5048                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
5049                         break;
5050                 case RTE_FLOW_ITEM_TYPE_NVGRE:
5051                         flow_dv_translate_item_nvgre(match_mask, match_value,
5052                                                      items, tunnel);
5053                         last_item = MLX5_FLOW_LAYER_GRE;
5054                         break;
5055                 case RTE_FLOW_ITEM_TYPE_VXLAN:
5056                         flow_dv_translate_item_vxlan(match_mask, match_value,
5057                                                      items, tunnel);
5058                         last_item = MLX5_FLOW_LAYER_VXLAN;
5059                         break;
5060                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
5061                         flow_dv_translate_item_vxlan(match_mask, match_value,
5062                                                      items, tunnel);
5063                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
5064                         break;
5065                 case RTE_FLOW_ITEM_TYPE_MPLS:
5066                         flow_dv_translate_item_mpls(match_mask, match_value,
5067                                                     items, last_item, tunnel);
5068                         last_item = MLX5_FLOW_LAYER_MPLS;
5069                         break;
5070                 case RTE_FLOW_ITEM_TYPE_META:
5071                         flow_dv_translate_item_meta(match_mask, match_value,
5072                                                     items);
5073                         last_item = MLX5_FLOW_ITEM_METADATA;
5074                         break;
5075                 case RTE_FLOW_ITEM_TYPE_ICMP:
5076                         flow_dv_translate_item_icmp(match_mask, match_value,
5077                                                     items, tunnel);
5078                         last_item = MLX5_FLOW_LAYER_ICMP;
5079                         break;
5080                 case RTE_FLOW_ITEM_TYPE_ICMP6:
5081                         flow_dv_translate_item_icmp6(match_mask, match_value,
5082                                                       items, tunnel);
5083                         last_item = MLX5_FLOW_LAYER_ICMP6;
5084                         break;
5085                 default:
5086                         break;
5087                 }
5088                 item_flags |= last_item;
5089         }
5090         /*
5091          * In case of ingress traffic when E-Switch mode is enabled,
5092          * we have two cases where we need to set the source port manually.
5093          * The first one, is in case of Nic steering rule, and the second is
5094          * E-Switch rule where no port_id item was found. In both cases
5095          * the source port is set according the current port in use.
5096          */
5097         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
5098             (priv->representor || priv->master)) {
5099                 if (flow_dv_translate_item_port_id(dev, match_mask,
5100                                                    match_value, NULL))
5101                         return -rte_errno;
5102         }
5103         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
5104                                          dev_flow->dv.value.buf));
5105         dev_flow->layers = item_flags;
5106         /* Register matcher. */
5107         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
5108                                     matcher.mask.size);
5109         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
5110                                                      matcher.priority);
5111         matcher.egress = attr->egress;
5112         matcher.group = attr->group;
5113         matcher.transfer = attr->transfer;
5114         if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
5115                 return -rte_errno;
5116         return 0;
5117 }
5118
5119 /**
5120  * Apply the flow to the NIC.
5121  *
5122  * @param[in] dev
5123  *   Pointer to the Ethernet device structure.
5124  * @param[in, out] flow
5125  *   Pointer to flow structure.
5126  * @param[out] error
5127  *   Pointer to error structure.
5128  *
5129  * @return
5130  *   0 on success, a negative errno value otherwise and rte_errno is set.
5131  */
5132 static int
5133 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
5134               struct rte_flow_error *error)
5135 {
5136         struct mlx5_flow_dv *dv;
5137         struct mlx5_flow *dev_flow;
5138         struct mlx5_priv *priv = dev->data->dev_private;
5139         int n;
5140         int err;
5141
5142         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5143                 dv = &dev_flow->dv;
5144                 n = dv->actions_n;
5145                 if (flow->actions & MLX5_FLOW_ACTION_DROP) {
5146                         if (flow->transfer) {
5147                                 dv->actions[n++] = priv->sh->esw_drop_action;
5148                         } else {
5149                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
5150                                 if (!dv->hrxq) {
5151                                         rte_flow_error_set
5152                                                 (error, errno,
5153                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5154                                                  NULL,
5155                                                  "cannot get drop hash queue");
5156                                         goto error;
5157                                 }
5158                                 dv->actions[n++] = dv->hrxq->action;
5159                         }
5160                 } else if (flow->actions &
5161                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
5162                         struct mlx5_hrxq *hrxq;
5163
5164                         hrxq = mlx5_hrxq_get(dev, flow->key,
5165                                              MLX5_RSS_HASH_KEY_LEN,
5166                                              dv->hash_fields,
5167                                              (*flow->queue),
5168                                              flow->rss.queue_num);
5169                         if (!hrxq)
5170                                 hrxq = mlx5_hrxq_new
5171                                         (dev, flow->key, MLX5_RSS_HASH_KEY_LEN,
5172                                          dv->hash_fields, (*flow->queue),
5173                                          flow->rss.queue_num,
5174                                          !!(dev_flow->layers &
5175                                             MLX5_FLOW_LAYER_TUNNEL));
5176                         if (!hrxq) {
5177                                 rte_flow_error_set
5178                                         (error, rte_errno,
5179                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5180                                          "cannot get hash queue");
5181                                 goto error;
5182                         }
5183                         dv->hrxq = hrxq;
5184                         dv->actions[n++] = dv->hrxq->action;
5185                 }
5186                 dv->flow =
5187                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
5188                                                   (void *)&dv->value, n,
5189                                                   dv->actions);
5190                 if (!dv->flow) {
5191                         rte_flow_error_set(error, errno,
5192                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5193                                            NULL,
5194                                            "hardware refuses to create flow");
5195                         goto error;
5196                 }
5197         }
5198         return 0;
5199 error:
5200         err = rte_errno; /* Save rte_errno before cleanup. */
5201         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5202                 struct mlx5_flow_dv *dv = &dev_flow->dv;
5203                 if (dv->hrxq) {
5204                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
5205                                 mlx5_hrxq_drop_release(dev);
5206                         else
5207                                 mlx5_hrxq_release(dev, dv->hrxq);
5208                         dv->hrxq = NULL;
5209                 }
5210         }
5211         rte_errno = err; /* Restore rte_errno. */
5212         return -rte_errno;
5213 }
5214
5215 /**
5216  * Release the flow matcher.
5217  *
5218  * @param dev
5219  *   Pointer to Ethernet device.
5220  * @param flow
5221  *   Pointer to mlx5_flow.
5222  *
5223  * @return
5224  *   1 while a reference on it exists, 0 when freed.
5225  */
5226 static int
5227 flow_dv_matcher_release(struct rte_eth_dev *dev,
5228                         struct mlx5_flow *flow)
5229 {
5230         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
5231         struct mlx5_priv *priv = dev->data->dev_private;
5232         struct mlx5_ibv_shared *sh = priv->sh;
5233         struct mlx5_flow_tbl_resource *tbl;
5234
5235         assert(matcher->matcher_object);
5236         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
5237                 dev->data->port_id, (void *)matcher,
5238                 rte_atomic32_read(&matcher->refcnt));
5239         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
5240                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
5241                            (matcher->matcher_object));
5242                 LIST_REMOVE(matcher, next);
5243                 if (matcher->egress)
5244                         tbl = &sh->tx_tbl[matcher->group];
5245                 else
5246                         tbl = &sh->rx_tbl[matcher->group];
5247                 flow_dv_tbl_resource_release(tbl);
5248                 rte_free(matcher);
5249                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
5250                         dev->data->port_id, (void *)matcher);
5251                 return 0;
5252         }
5253         return 1;
5254 }
5255
5256 /**
5257  * Release an encap/decap resource.
5258  *
5259  * @param flow
5260  *   Pointer to mlx5_flow.
5261  *
5262  * @return
5263  *   1 while a reference on it exists, 0 when freed.
5264  */
5265 static int
5266 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
5267 {
5268         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
5269                                                 flow->dv.encap_decap;
5270
5271         assert(cache_resource->verbs_action);
5272         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
5273                 (void *)cache_resource,
5274                 rte_atomic32_read(&cache_resource->refcnt));
5275         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5276                 claim_zero(mlx5_glue->destroy_flow_action
5277                                 (cache_resource->verbs_action));
5278                 LIST_REMOVE(cache_resource, next);
5279                 rte_free(cache_resource);
5280                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
5281                         (void *)cache_resource);
5282                 return 0;
5283         }
5284         return 1;
5285 }
5286
5287 /**
5288  * Release an jump to table action resource.
5289  *
5290  * @param flow
5291  *   Pointer to mlx5_flow.
5292  *
5293  * @return
5294  *   1 while a reference on it exists, 0 when freed.
5295  */
5296 static int
5297 flow_dv_jump_tbl_resource_release(struct mlx5_flow *flow)
5298 {
5299         struct mlx5_flow_dv_jump_tbl_resource *cache_resource =
5300                                                 flow->dv.jump;
5301
5302         assert(cache_resource->action);
5303         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
5304                 (void *)cache_resource,
5305                 rte_atomic32_read(&cache_resource->refcnt));
5306         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5307                 claim_zero(mlx5_glue->destroy_flow_action
5308                                 (cache_resource->action));
5309                 LIST_REMOVE(cache_resource, next);
5310                 flow_dv_tbl_resource_release(cache_resource->tbl);
5311                 rte_free(cache_resource);
5312                 DRV_LOG(DEBUG, "jump table resource %p: removed",
5313                         (void *)cache_resource);
5314                 return 0;
5315         }
5316         return 1;
5317 }
5318
5319 /**
5320  * Release a modify-header resource.
5321  *
5322  * @param flow
5323  *   Pointer to mlx5_flow.
5324  *
5325  * @return
5326  *   1 while a reference on it exists, 0 when freed.
5327  */
5328 static int
5329 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
5330 {
5331         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
5332                                                 flow->dv.modify_hdr;
5333
5334         assert(cache_resource->verbs_action);
5335         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
5336                 (void *)cache_resource,
5337                 rte_atomic32_read(&cache_resource->refcnt));
5338         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5339                 claim_zero(mlx5_glue->destroy_flow_action
5340                                 (cache_resource->verbs_action));
5341                 LIST_REMOVE(cache_resource, next);
5342                 rte_free(cache_resource);
5343                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
5344                         (void *)cache_resource);
5345                 return 0;
5346         }
5347         return 1;
5348 }
5349
5350 /**
5351  * Release port ID action resource.
5352  *
5353  * @param flow
5354  *   Pointer to mlx5_flow.
5355  *
5356  * @return
5357  *   1 while a reference on it exists, 0 when freed.
5358  */
5359 static int
5360 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
5361 {
5362         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
5363                 flow->dv.port_id_action;
5364
5365         assert(cache_resource->action);
5366         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
5367                 (void *)cache_resource,
5368                 rte_atomic32_read(&cache_resource->refcnt));
5369         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5370                 claim_zero(mlx5_glue->destroy_flow_action
5371                                 (cache_resource->action));
5372                 LIST_REMOVE(cache_resource, next);
5373                 rte_free(cache_resource);
5374                 DRV_LOG(DEBUG, "port id action resource %p: removed",
5375                         (void *)cache_resource);
5376                 return 0;
5377         }
5378         return 1;
5379 }
5380
5381 /**
5382  * Remove the flow from the NIC but keeps it in memory.
5383  *
5384  * @param[in] dev
5385  *   Pointer to Ethernet device.
5386  * @param[in, out] flow
5387  *   Pointer to flow structure.
5388  */
5389 static void
5390 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
5391 {
5392         struct mlx5_flow_dv *dv;
5393         struct mlx5_flow *dev_flow;
5394
5395         if (!flow)
5396                 return;
5397         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5398                 dv = &dev_flow->dv;
5399                 if (dv->flow) {
5400                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
5401                         dv->flow = NULL;
5402                 }
5403                 if (dv->hrxq) {
5404                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
5405                                 mlx5_hrxq_drop_release(dev);
5406                         else
5407                                 mlx5_hrxq_release(dev, dv->hrxq);
5408                         dv->hrxq = NULL;
5409                 }
5410         }
5411 }
5412
5413 /**
5414  * Remove the flow from the NIC and the memory.
5415  *
5416  * @param[in] dev
5417  *   Pointer to the Ethernet device structure.
5418  * @param[in, out] flow
5419  *   Pointer to flow structure.
5420  */
5421 static void
5422 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
5423 {
5424         struct mlx5_flow *dev_flow;
5425
5426         if (!flow)
5427                 return;
5428         flow_dv_remove(dev, flow);
5429         if (flow->counter) {
5430                 flow_dv_counter_release(dev, flow->counter);
5431                 flow->counter = NULL;
5432         }
5433         if (flow->tag_resource) {
5434                 flow_dv_tag_release(dev, flow->tag_resource);
5435                 flow->tag_resource = NULL;
5436         }
5437         while (!LIST_EMPTY(&flow->dev_flows)) {
5438                 dev_flow = LIST_FIRST(&flow->dev_flows);
5439                 LIST_REMOVE(dev_flow, next);
5440                 if (dev_flow->dv.matcher)
5441                         flow_dv_matcher_release(dev, dev_flow);
5442                 if (dev_flow->dv.encap_decap)
5443                         flow_dv_encap_decap_resource_release(dev_flow);
5444                 if (dev_flow->dv.modify_hdr)
5445                         flow_dv_modify_hdr_resource_release(dev_flow);
5446                 if (dev_flow->dv.jump)
5447                         flow_dv_jump_tbl_resource_release(dev_flow);
5448                 if (dev_flow->dv.port_id_action)
5449                         flow_dv_port_id_action_resource_release(dev_flow);
5450                 rte_free(dev_flow);
5451         }
5452 }
5453
5454 /**
5455  * Query a dv flow  rule for its statistics via devx.
5456  *
5457  * @param[in] dev
5458  *   Pointer to Ethernet device.
5459  * @param[in] flow
5460  *   Pointer to the sub flow.
5461  * @param[out] data
5462  *   data retrieved by the query.
5463  * @param[out] error
5464  *   Perform verbose error reporting if not NULL.
5465  *
5466  * @return
5467  *   0 on success, a negative errno value otherwise and rte_errno is set.
5468  */
5469 static int
5470 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
5471                     void *data, struct rte_flow_error *error)
5472 {
5473         struct mlx5_priv *priv = dev->data->dev_private;
5474         struct rte_flow_query_count *qc = data;
5475
5476         if (!priv->config.devx)
5477                 return rte_flow_error_set(error, ENOTSUP,
5478                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5479                                           NULL,
5480                                           "counters are not supported");
5481         if (flow->counter) {
5482                 uint64_t pkts, bytes;
5483                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
5484                                                &bytes);
5485
5486                 if (err)
5487                         return rte_flow_error_set(error, -err,
5488                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5489                                         NULL, "cannot read counters");
5490                 qc->hits_set = 1;
5491                 qc->bytes_set = 1;
5492                 qc->hits = pkts - flow->counter->hits;
5493                 qc->bytes = bytes - flow->counter->bytes;
5494                 if (qc->reset) {
5495                         flow->counter->hits = pkts;
5496                         flow->counter->bytes = bytes;
5497                 }
5498                 return 0;
5499         }
5500         return rte_flow_error_set(error, EINVAL,
5501                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5502                                   NULL,
5503                                   "counters are not available");
5504 }
5505
5506 /**
5507  * Query a flow.
5508  *
5509  * @see rte_flow_query()
5510  * @see rte_flow_ops
5511  */
5512 static int
5513 flow_dv_query(struct rte_eth_dev *dev,
5514               struct rte_flow *flow __rte_unused,
5515               const struct rte_flow_action *actions __rte_unused,
5516               void *data __rte_unused,
5517               struct rte_flow_error *error __rte_unused)
5518 {
5519         int ret = -EINVAL;
5520
5521         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5522                 switch (actions->type) {
5523                 case RTE_FLOW_ACTION_TYPE_VOID:
5524                         break;
5525                 case RTE_FLOW_ACTION_TYPE_COUNT:
5526                         ret = flow_dv_query_count(dev, flow, data, error);
5527                         break;
5528                 default:
5529                         return rte_flow_error_set(error, ENOTSUP,
5530                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5531                                                   actions,
5532                                                   "action not supported");
5533                 }
5534         }
5535         return ret;
5536 }
5537
5538 /*
5539  * Mutex-protected thunk to flow_dv_translate().
5540  */
5541 static int
5542 flow_d_translate(struct rte_eth_dev *dev,
5543                  struct mlx5_flow *dev_flow,
5544                  const struct rte_flow_attr *attr,
5545                  const struct rte_flow_item items[],
5546                  const struct rte_flow_action actions[],
5547                  struct rte_flow_error *error)
5548 {
5549         int ret;
5550
5551         flow_d_shared_lock(dev);
5552         ret = flow_dv_translate(dev, dev_flow, attr, items, actions, error);
5553         flow_d_shared_unlock(dev);
5554         return ret;
5555 }
5556
5557 /*
5558  * Mutex-protected thunk to flow_dv_apply().
5559  */
5560 static int
5561 flow_d_apply(struct rte_eth_dev *dev,
5562              struct rte_flow *flow,
5563              struct rte_flow_error *error)
5564 {
5565         int ret;
5566
5567         flow_d_shared_lock(dev);
5568         ret = flow_dv_apply(dev, flow, error);
5569         flow_d_shared_unlock(dev);
5570         return ret;
5571 }
5572
5573 /*
5574  * Mutex-protected thunk to flow_dv_remove().
5575  */
5576 static void
5577 flow_d_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
5578 {
5579         flow_d_shared_lock(dev);
5580         flow_dv_remove(dev, flow);
5581         flow_d_shared_unlock(dev);
5582 }
5583
5584 /*
5585  * Mutex-protected thunk to flow_dv_destroy().
5586  */
5587 static void
5588 flow_d_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
5589 {
5590         flow_d_shared_lock(dev);
5591         flow_dv_destroy(dev, flow);
5592         flow_d_shared_unlock(dev);
5593 }
5594
5595 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
5596         .validate = flow_dv_validate,
5597         .prepare = flow_dv_prepare,
5598         .translate = flow_d_translate,
5599         .apply = flow_d_apply,
5600         .remove = flow_d_remove,
5601         .destroy = flow_d_destroy,
5602         .query = flow_dv_query,
5603 };
5604
5605 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */