drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_prm.h>
  35
  36 #include "mlx5_defs.h"
  37 #include "mlx5.h"
  38 #include "mlx5_flow.h"
  39 #include "mlx5_rxtx.h"
  40
  41 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 /**
  77  * Initialize flow attributes structure according to flow items' types.
  78  *
  79  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  80  * mode. For tunnel mode, the items to be modified are the outermost ones.
  81  *
  82  * @param[in] item
  83  *   Pointer to item specification.
  84  * @param[out] attr
  85  *   Pointer to flow attributes structure.
  86  * @param[in] dev_flow
  87  *   Pointer to the sub flow.
  88  * @param[in] tunnel_decap
  89  *   Whether action is after tunnel decapsulation.
  90  */
  91 static void
  92 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
  93                   struct mlx5_flow *dev_flow, bool tunnel_decap)
  94 {
  95         /*
  96          * If layers is already initialized, it means this dev_flow is the
  97          * suffix flow, the layers flags is set by the prefix flow. Need to
  98          * use the layer flags from prefix flow as the suffix flow may not
  99          * have the user defined items as the flow is split.
 100          */
 101         if (dev_flow->layers) {
 102                 if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 103                         attr->ipv4 = 1;
 104                 else if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 105                         attr->ipv6 = 1;
 106                 if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 107                         attr->tcp = 1;
 108                 else if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 109                         attr->udp = 1;
 110                 attr->valid = 1;
 111                 return;
 112         }
 113         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 114                 uint8_t next_protocol = 0xff;
 115                 switch (item->type) {
 116                 case RTE_FLOW_ITEM_TYPE_GRE:
 117                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 118                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 119                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 120                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 121                 case RTE_FLOW_ITEM_TYPE_MPLS:
 122                         if (tunnel_decap)
 123                                 attr->attr = 0;
 124                         break;
 125                 case RTE_FLOW_ITEM_TYPE_IPV4:
 126                         if (!attr->ipv6)
 127                                 attr->ipv4 = 1;
 128                         if (item->mask != NULL &&
 129                             ((const struct rte_flow_item_ipv4 *)
 130                             item->mask)->hdr.next_proto_id)
 131                                 next_protocol =
 132                                     ((const struct rte_flow_item_ipv4 *)
 133                                       (item->spec))->hdr.next_proto_id &
 134                                     ((const struct rte_flow_item_ipv4 *)
 135                                       (item->mask))->hdr.next_proto_id;
 136                         if ((next_protocol == IPPROTO_IPIP ||
 137                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 138                                 attr->attr = 0;
 139                         break;
 140                 case RTE_FLOW_ITEM_TYPE_IPV6:
 141                         if (!attr->ipv4)
 142                                 attr->ipv6 = 1;
 143                         if (item->mask != NULL &&
 144                             ((const struct rte_flow_item_ipv6 *)
 145                             item->mask)->hdr.proto)
 146                                 next_protocol =
 147                                     ((const struct rte_flow_item_ipv6 *)
 148                                       (item->spec))->hdr.proto &
 149                                     ((const struct rte_flow_item_ipv6 *)
 150                                       (item->mask))->hdr.proto;
 151                         if ((next_protocol == IPPROTO_IPIP ||
 152                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 153                                 attr->attr = 0;
 154                         break;
 155                 case RTE_FLOW_ITEM_TYPE_UDP:
 156                         if (!attr->tcp)
 157                                 attr->udp = 1;
 158                         break;
 159                 case RTE_FLOW_ITEM_TYPE_TCP:
 160                         if (!attr->udp)
 161                                 attr->tcp = 1;
 162                         break;
 163                 default:
 164                         break;
 165                 }
 166         }
 167         attr->valid = 1;
 168 }
 169
 170 /**
 171  * Convert rte_mtr_color to mlx5 color.
 172  *
 173  * @param[in] rcol
 174  *   rte_mtr_color.
 175  *
 176  * @return
 177  *   mlx5 color.
 178  */
 179 static int
 180 rte_col_2_mlx5_col(enum rte_color rcol)
 181 {
 182         switch (rcol) {
 183         case RTE_COLOR_GREEN:
 184                 return MLX5_FLOW_COLOR_GREEN;
 185         case RTE_COLOR_YELLOW:
 186                 return MLX5_FLOW_COLOR_YELLOW;
 187         case RTE_COLOR_RED:
 188                 return MLX5_FLOW_COLOR_RED;
 189         default:
 190                 break;
 191         }
 192         return MLX5_FLOW_COLOR_UNDEFINED;
 193 }
 194
 195 struct field_modify_info {
 196         uint32_t size; /* Size of field in protocol header, in bytes. */
 197         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 198         enum mlx5_modification_field id;
 199 };
 200
 201 struct field_modify_info modify_eth[] = {
 202         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 203         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 204         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 205         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 206         {0, 0, 0},
 207 };
 208
 209 struct field_modify_info modify_vlan_out_first_vid[] = {
 210         /* Size in bits !!! */
 211         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 212         {0, 0, 0},
 213 };
 214
 215 struct field_modify_info modify_ipv4[] = {
 216         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 217         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 218         {4, 12, MLX5_MODI_OUT_SIPV4},
 219         {4, 16, MLX5_MODI_OUT_DIPV4},
 220         {0, 0, 0},
 221 };
 222
 223 struct field_modify_info modify_ipv6[] = {
 224         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 225         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 226         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 227         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 228         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 229         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 230         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 231         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 232         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 233         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 234         {0, 0, 0},
 235 };
 236
 237 struct field_modify_info modify_udp[] = {
 238         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 239         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 240         {0, 0, 0},
 241 };
 242
 243 struct field_modify_info modify_tcp[] = {
 244         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 245         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 246         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 247         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 248         {0, 0, 0},
 249 };
 250
 251 static void
 252 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 253                           uint8_t next_protocol, uint64_t *item_flags,
 254                           int *tunnel)
 255 {
 256         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 257                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 258         if (next_protocol == IPPROTO_IPIP) {
 259                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 260                 *tunnel = 1;
 261         }
 262         if (next_protocol == IPPROTO_IPV6) {
 263                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 264                 *tunnel = 1;
 265         }
 266 }
 267
 268 /**
 269  * Acquire the synchronizing object to protect multithreaded access
 270  * to shared dv context. Lock occurs only if context is actually
 271  * shared, i.e. we have multiport IB device and representors are
 272  * created.
 273  *
 274  * @param[in] dev
 275  *   Pointer to the rte_eth_dev structure.
 276  */
 277 static void
 278 flow_dv_shared_lock(struct rte_eth_dev *dev)
 279 {
 280         struct mlx5_priv *priv = dev->data->dev_private;
 281         struct mlx5_ibv_shared *sh = priv->sh;
 282
 283         if (sh->dv_refcnt > 1) {
 284                 int ret;
 285
 286                 ret = pthread_mutex_lock(&sh->dv_mutex);
 287                 MLX5_ASSERT(!ret);
 288                 (void)ret;
 289         }
 290 }
 291
 292 static void
 293 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 294 {
 295         struct mlx5_priv *priv = dev->data->dev_private;
 296         struct mlx5_ibv_shared *sh = priv->sh;
 297
 298         if (sh->dv_refcnt > 1) {
 299                 int ret;
 300
 301                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 302                 MLX5_ASSERT(!ret);
 303                 (void)ret;
 304         }
 305 }
 306
 307 /* Update VLAN's VID/PCP based on input rte_flow_action.
 308  *
 309  * @param[in] action
 310  *   Pointer to struct rte_flow_action.
 311  * @param[out] vlan
 312  *   Pointer to struct rte_vlan_hdr.
 313  */
 314 static void
 315 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 316                          struct rte_vlan_hdr *vlan)
 317 {
 318         uint16_t vlan_tci;
 319         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 320                 vlan_tci =
 321                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 322                                                action->conf)->vlan_pcp;
 323                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 324                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 325                 vlan->vlan_tci |= vlan_tci;
 326         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 327                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 328                 vlan->vlan_tci |= rte_be_to_cpu_16
 329                     (((const struct rte_flow_action_of_set_vlan_vid *)
 330                                              action->conf)->vlan_vid);
 331         }
 332 }
 333
 334 /**
 335  * Fetch 1, 2, 3 or 4 byte field from the byte array
 336  * and return as unsigned integer in host-endian format.
 337  *
 338  * @param[in] data
 339  *   Pointer to data array.
 340  * @param[in] size
 341  *   Size of field to extract.
 342  *
 343  * @return
 344  *   converted field in host endian format.
 345  */
 346 static inline uint32_t
 347 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 348 {
 349         uint32_t ret;
 350
 351         switch (size) {
 352         case 1:
 353                 ret = *data;
 354                 break;
 355         case 2:
 356                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 357                 break;
 358         case 3:
 359                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 360                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 361                 break;
 362         case 4:
 363                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 364                 break;
 365         default:
 366                 MLX5_ASSERT(false);
 367                 ret = 0;
 368                 break;
 369         }
 370         return ret;
 371 }
 372
 373 /**
 374  * Convert modify-header action to DV specification.
 375  *
 376  * Data length of each action is determined by provided field description
 377  * and the item mask. Data bit offset and width of each action is determined
 378  * by provided item mask.
 379  *
 380  * @param[in] item
 381  *   Pointer to item specification.
 382  * @param[in] field
 383  *   Pointer to field modification information.
 384  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 385  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 386  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 387  * @param[in] dcopy
 388  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 389  *   Negative offset value sets the same offset as source offset.
 390  *   size field is ignored, value is taken from source field.
 391  * @param[in,out] resource
 392  *   Pointer to the modify-header resource.
 393  * @param[in] type
 394  *   Type of modification.
 395  * @param[out] error
 396  *   Pointer to the error structure.
 397  *
 398  * @return
 399  *   0 on success, a negative errno value otherwise and rte_errno is set.
 400  */
 401 static int
 402 flow_dv_convert_modify_action(struct rte_flow_item *item,
 403                               struct field_modify_info *field,
 404                               struct field_modify_info *dcopy,
 405                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 406                               uint32_t type, struct rte_flow_error *error)
 407 {
 408         uint32_t i = resource->actions_num;
 409         struct mlx5_modification_cmd *actions = resource->actions;
 410
 411         /*
 412          * The item and mask are provided in big-endian format.
 413          * The fields should be presented as in big-endian format either.
 414          * Mask must be always present, it defines the actual field width.
 415          */
 416         MLX5_ASSERT(item->mask);
 417         MLX5_ASSERT(field->size);
 418         do {
 419                 unsigned int size_b;
 420                 unsigned int off_b;
 421                 uint32_t mask;
 422                 uint32_t data;
 423
 424                 if (i >= MLX5_MAX_MODIFY_NUM)
 425                         return rte_flow_error_set(error, EINVAL,
 426                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 427                                  "too many items to modify");
 428                 /* Fetch variable byte size mask from the array. */
 429                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 430                                            field->offset, field->size);
 431                 if (!mask) {
 432                         ++field;
 433                         continue;
 434                 }
 435                 /* Deduce actual data width in bits from mask value. */
 436                 off_b = rte_bsf32(mask);
 437                 size_b = sizeof(uint32_t) * CHAR_BIT -
 438                          off_b - __builtin_clz(mask);
 439                 MLX5_ASSERT(size_b);
 440                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 441                 actions[i] = (struct mlx5_modification_cmd) {
 442                         .action_type = type,
 443                         .field = field->id,
 444                         .offset = off_b,
 445                         .length = size_b,
 446                 };
 447                 /* Convert entire record to expected big-endian format. */
 448                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 449                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 450                         MLX5_ASSERT(dcopy);
 451                         actions[i].dst_field = dcopy->id;
 452                         actions[i].dst_offset =
 453                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 454                         /* Convert entire record to big-endian format. */
 455                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 456                 } else {
 457                         MLX5_ASSERT(item->spec);
 458                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 459                                                    field->offset, field->size);
 460                         /* Shift out the trailing masked bits from data. */
 461                         data = (data & mask) >> off_b;
 462                         actions[i].data1 = rte_cpu_to_be_32(data);
 463                 }
 464                 ++i;
 465                 ++field;
 466         } while (field->size);
 467         if (resource->actions_num == i)
 468                 return rte_flow_error_set(error, EINVAL,
 469                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 470                                           "invalid modification flow item");
 471         resource->actions_num = i;
 472         return 0;
 473 }
 474
 475 /**
 476  * Convert modify-header set IPv4 address action to DV specification.
 477  *
 478  * @param[in,out] resource
 479  *   Pointer to the modify-header resource.
 480  * @param[in] action
 481  *   Pointer to action specification.
 482  * @param[out] error
 483  *   Pointer to the error structure.
 484  *
 485  * @return
 486  *   0 on success, a negative errno value otherwise and rte_errno is set.
 487  */
 488 static int
 489 flow_dv_convert_action_modify_ipv4
 490                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 491                          const struct rte_flow_action *action,
 492                          struct rte_flow_error *error)
 493 {
 494         const struct rte_flow_action_set_ipv4 *conf =
 495                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 496         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 497         struct rte_flow_item_ipv4 ipv4;
 498         struct rte_flow_item_ipv4 ipv4_mask;
 499
 500         memset(&ipv4, 0, sizeof(ipv4));
 501         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 502         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 503                 ipv4.hdr.src_addr = conf->ipv4_addr;
 504                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 505         } else {
 506                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 507                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 508         }
 509         item.spec = &ipv4;
 510         item.mask = &ipv4_mask;
 511         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 512                                              MLX5_MODIFICATION_TYPE_SET, error);
 513 }
 514
 515 /**
 516  * Convert modify-header set IPv6 address action to DV specification.
 517  *
 518  * @param[in,out] resource
 519  *   Pointer to the modify-header resource.
 520  * @param[in] action
 521  *   Pointer to action specification.
 522  * @param[out] error
 523  *   Pointer to the error structure.
 524  *
 525  * @return
 526  *   0 on success, a negative errno value otherwise and rte_errno is set.
 527  */
 528 static int
 529 flow_dv_convert_action_modify_ipv6
 530                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 531                          const struct rte_flow_action *action,
 532                          struct rte_flow_error *error)
 533 {
 534         const struct rte_flow_action_set_ipv6 *conf =
 535                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 536         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 537         struct rte_flow_item_ipv6 ipv6;
 538         struct rte_flow_item_ipv6 ipv6_mask;
 539
 540         memset(&ipv6, 0, sizeof(ipv6));
 541         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 542         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 543                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 544                        sizeof(ipv6.hdr.src_addr));
 545                 memcpy(&ipv6_mask.hdr.src_addr,
 546                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 547                        sizeof(ipv6.hdr.src_addr));
 548         } else {
 549                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 550                        sizeof(ipv6.hdr.dst_addr));
 551                 memcpy(&ipv6_mask.hdr.dst_addr,
 552                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 553                        sizeof(ipv6.hdr.dst_addr));
 554         }
 555         item.spec = &ipv6;
 556         item.mask = &ipv6_mask;
 557         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 558                                              MLX5_MODIFICATION_TYPE_SET, error);
 559 }
 560
 561 /**
 562  * Convert modify-header set MAC address action to DV specification.
 563  *
 564  * @param[in,out] resource
 565  *   Pointer to the modify-header resource.
 566  * @param[in] action
 567  *   Pointer to action specification.
 568  * @param[out] error
 569  *   Pointer to the error structure.
 570  *
 571  * @return
 572  *   0 on success, a negative errno value otherwise and rte_errno is set.
 573  */
 574 static int
 575 flow_dv_convert_action_modify_mac
 576                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 577                          const struct rte_flow_action *action,
 578                          struct rte_flow_error *error)
 579 {
 580         const struct rte_flow_action_set_mac *conf =
 581                 (const struct rte_flow_action_set_mac *)(action->conf);
 582         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 583         struct rte_flow_item_eth eth;
 584         struct rte_flow_item_eth eth_mask;
 585
 586         memset(&eth, 0, sizeof(eth));
 587         memset(&eth_mask, 0, sizeof(eth_mask));
 588         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 589                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 590                        sizeof(eth.src.addr_bytes));
 591                 memcpy(&eth_mask.src.addr_bytes,
 592                        &rte_flow_item_eth_mask.src.addr_bytes,
 593                        sizeof(eth_mask.src.addr_bytes));
 594         } else {
 595                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 596                        sizeof(eth.dst.addr_bytes));
 597                 memcpy(&eth_mask.dst.addr_bytes,
 598                        &rte_flow_item_eth_mask.dst.addr_bytes,
 599                        sizeof(eth_mask.dst.addr_bytes));
 600         }
 601         item.spec = &eth;
 602         item.mask = &eth_mask;
 603         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 604                                              MLX5_MODIFICATION_TYPE_SET, error);
 605 }
 606
 607 /**
 608  * Convert modify-header set VLAN VID action to DV specification.
 609  *
 610  * @param[in,out] resource
 611  *   Pointer to the modify-header resource.
 612  * @param[in] action
 613  *   Pointer to action specification.
 614  * @param[out] error
 615  *   Pointer to the error structure.
 616  *
 617  * @return
 618  *   0 on success, a negative errno value otherwise and rte_errno is set.
 619  */
 620 static int
 621 flow_dv_convert_action_modify_vlan_vid
 622                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 623                          const struct rte_flow_action *action,
 624                          struct rte_flow_error *error)
 625 {
 626         const struct rte_flow_action_of_set_vlan_vid *conf =
 627                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 628         int i = resource->actions_num;
 629         struct mlx5_modification_cmd *actions = resource->actions;
 630         struct field_modify_info *field = modify_vlan_out_first_vid;
 631
 632         if (i >= MLX5_MAX_MODIFY_NUM)
 633                 return rte_flow_error_set(error, EINVAL,
 634                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 635                          "too many items to modify");
 636         actions[i] = (struct mlx5_modification_cmd) {
 637                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 638                 .field = field->id,
 639                 .length = field->size,
 640                 .offset = field->offset,
 641         };
 642         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 643         actions[i].data1 = conf->vlan_vid;
 644         actions[i].data1 = actions[i].data1 << 16;
 645         resource->actions_num = ++i;
 646         return 0;
 647 }
 648
 649 /**
 650  * Convert modify-header set TP action to DV specification.
 651  *
 652  * @param[in,out] resource
 653  *   Pointer to the modify-header resource.
 654  * @param[in] action
 655  *   Pointer to action specification.
 656  * @param[in] items
 657  *   Pointer to rte_flow_item objects list.
 658  * @param[in] attr
 659  *   Pointer to flow attributes structure.
 660  * @param[in] dev_flow
 661  *   Pointer to the sub flow.
 662  * @param[in] tunnel_decap
 663  *   Whether action is after tunnel decapsulation.
 664  * @param[out] error
 665  *   Pointer to the error structure.
 666  *
 667  * @return
 668  *   0 on success, a negative errno value otherwise and rte_errno is set.
 669  */
 670 static int
 671 flow_dv_convert_action_modify_tp
 672                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 673                          const struct rte_flow_action *action,
 674                          const struct rte_flow_item *items,
 675                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 676                          bool tunnel_decap, struct rte_flow_error *error)
 677 {
 678         const struct rte_flow_action_set_tp *conf =
 679                 (const struct rte_flow_action_set_tp *)(action->conf);
 680         struct rte_flow_item item;
 681         struct rte_flow_item_udp udp;
 682         struct rte_flow_item_udp udp_mask;
 683         struct rte_flow_item_tcp tcp;
 684         struct rte_flow_item_tcp tcp_mask;
 685         struct field_modify_info *field;
 686
 687         if (!attr->valid)
 688                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 689         if (attr->udp) {
 690                 memset(&udp, 0, sizeof(udp));
 691                 memset(&udp_mask, 0, sizeof(udp_mask));
 692                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 693                         udp.hdr.src_port = conf->port;
 694                         udp_mask.hdr.src_port =
 695                                         rte_flow_item_udp_mask.hdr.src_port;
 696                 } else {
 697                         udp.hdr.dst_port = conf->port;
 698                         udp_mask.hdr.dst_port =
 699                                         rte_flow_item_udp_mask.hdr.dst_port;
 700                 }
 701                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 702                 item.spec = &udp;
 703                 item.mask = &udp_mask;
 704                 field = modify_udp;
 705         }
 706         if (attr->tcp) {
 707                 memset(&tcp, 0, sizeof(tcp));
 708                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 709                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 710                         tcp.hdr.src_port = conf->port;
 711                         tcp_mask.hdr.src_port =
 712                                         rte_flow_item_tcp_mask.hdr.src_port;
 713                 } else {
 714                         tcp.hdr.dst_port = conf->port;
 715                         tcp_mask.hdr.dst_port =
 716                                         rte_flow_item_tcp_mask.hdr.dst_port;
 717                 }
 718                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 719                 item.spec = &tcp;
 720                 item.mask = &tcp_mask;
 721                 field = modify_tcp;
 722         }
 723         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 724                                              MLX5_MODIFICATION_TYPE_SET, error);
 725 }
 726
 727 /**
 728  * Convert modify-header set TTL action to DV specification.
 729  *
 730  * @param[in,out] resource
 731  *   Pointer to the modify-header resource.
 732  * @param[in] action
 733  *   Pointer to action specification.
 734  * @param[in] items
 735  *   Pointer to rte_flow_item objects list.
 736  * @param[in] attr
 737  *   Pointer to flow attributes structure.
 738  * @param[in] dev_flow
 739  *   Pointer to the sub flow.
 740  * @param[in] tunnel_decap
 741  *   Whether action is after tunnel decapsulation.
 742  * @param[out] error
 743  *   Pointer to the error structure.
 744  *
 745  * @return
 746  *   0 on success, a negative errno value otherwise and rte_errno is set.
 747  */
 748 static int
 749 flow_dv_convert_action_modify_ttl
 750                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 751                          const struct rte_flow_action *action,
 752                          const struct rte_flow_item *items,
 753                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 754                          bool tunnel_decap, struct rte_flow_error *error)
 755 {
 756         const struct rte_flow_action_set_ttl *conf =
 757                 (const struct rte_flow_action_set_ttl *)(action->conf);
 758         struct rte_flow_item item;
 759         struct rte_flow_item_ipv4 ipv4;
 760         struct rte_flow_item_ipv4 ipv4_mask;
 761         struct rte_flow_item_ipv6 ipv6;
 762         struct rte_flow_item_ipv6 ipv6_mask;
 763         struct field_modify_info *field;
 764
 765         if (!attr->valid)
 766                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 767         if (attr->ipv4) {
 768                 memset(&ipv4, 0, sizeof(ipv4));
 769                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 770                 ipv4.hdr.time_to_live = conf->ttl_value;
 771                 ipv4_mask.hdr.time_to_live = 0xFF;
 772                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 773                 item.spec = &ipv4;
 774                 item.mask = &ipv4_mask;
 775                 field = modify_ipv4;
 776         }
 777         if (attr->ipv6) {
 778                 memset(&ipv6, 0, sizeof(ipv6));
 779                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 780                 ipv6.hdr.hop_limits = conf->ttl_value;
 781                 ipv6_mask.hdr.hop_limits = 0xFF;
 782                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 783                 item.spec = &ipv6;
 784                 item.mask = &ipv6_mask;
 785                 field = modify_ipv6;
 786         }
 787         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 788                                              MLX5_MODIFICATION_TYPE_SET, error);
 789 }
 790
 791 /**
 792  * Convert modify-header decrement TTL action to DV specification.
 793  *
 794  * @param[in,out] resource
 795  *   Pointer to the modify-header resource.
 796  * @param[in] action
 797  *   Pointer to action specification.
 798  * @param[in] items
 799  *   Pointer to rte_flow_item objects list.
 800  * @param[in] attr
 801  *   Pointer to flow attributes structure.
 802  * @param[in] dev_flow
 803  *   Pointer to the sub flow.
 804  * @param[in] tunnel_decap
 805  *   Whether action is after tunnel decapsulation.
 806  * @param[out] error
 807  *   Pointer to the error structure.
 808  *
 809  * @return
 810  *   0 on success, a negative errno value otherwise and rte_errno is set.
 811  */
 812 static int
 813 flow_dv_convert_action_modify_dec_ttl
 814                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 815                          const struct rte_flow_item *items,
 816                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 817                          bool tunnel_decap, struct rte_flow_error *error)
 818 {
 819         struct rte_flow_item item;
 820         struct rte_flow_item_ipv4 ipv4;
 821         struct rte_flow_item_ipv4 ipv4_mask;
 822         struct rte_flow_item_ipv6 ipv6;
 823         struct rte_flow_item_ipv6 ipv6_mask;
 824         struct field_modify_info *field;
 825
 826         if (!attr->valid)
 827                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 828         if (attr->ipv4) {
 829                 memset(&ipv4, 0, sizeof(ipv4));
 830                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 831                 ipv4.hdr.time_to_live = 0xFF;
 832                 ipv4_mask.hdr.time_to_live = 0xFF;
 833                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 834                 item.spec = &ipv4;
 835                 item.mask = &ipv4_mask;
 836                 field = modify_ipv4;
 837         }
 838         if (attr->ipv6) {
 839                 memset(&ipv6, 0, sizeof(ipv6));
 840                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 841                 ipv6.hdr.hop_limits = 0xFF;
 842                 ipv6_mask.hdr.hop_limits = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 844                 item.spec = &ipv6;
 845                 item.mask = &ipv6_mask;
 846                 field = modify_ipv6;
 847         }
 848         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 849                                              MLX5_MODIFICATION_TYPE_ADD, error);
 850 }
 851
 852 /**
 853  * Convert modify-header increment/decrement TCP Sequence number
 854  * to DV specification.
 855  *
 856  * @param[in,out] resource
 857  *   Pointer to the modify-header resource.
 858  * @param[in] action
 859  *   Pointer to action specification.
 860  * @param[out] error
 861  *   Pointer to the error structure.
 862  *
 863  * @return
 864  *   0 on success, a negative errno value otherwise and rte_errno is set.
 865  */
 866 static int
 867 flow_dv_convert_action_modify_tcp_seq
 868                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 869                          const struct rte_flow_action *action,
 870                          struct rte_flow_error *error)
 871 {
 872         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 873         uint64_t value = rte_be_to_cpu_32(*conf);
 874         struct rte_flow_item item;
 875         struct rte_flow_item_tcp tcp;
 876         struct rte_flow_item_tcp tcp_mask;
 877
 878         memset(&tcp, 0, sizeof(tcp));
 879         memset(&tcp_mask, 0, sizeof(tcp_mask));
 880         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 881                 /*
 882                  * The HW has no decrement operation, only increment operation.
 883                  * To simulate decrement X from Y using increment operation
 884                  * we need to add UINT32_MAX X times to Y.
 885                  * Each adding of UINT32_MAX decrements Y by 1.
 886                  */
 887                 value *= UINT32_MAX;
 888         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 889         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 890         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 891         item.spec = &tcp;
 892         item.mask = &tcp_mask;
 893         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 894                                              MLX5_MODIFICATION_TYPE_ADD, error);
 895 }
 896
 897 /**
 898  * Convert modify-header increment/decrement TCP Acknowledgment number
 899  * to DV specification.
 900  *
 901  * @param[in,out] resource
 902  *   Pointer to the modify-header resource.
 903  * @param[in] action
 904  *   Pointer to action specification.
 905  * @param[out] error
 906  *   Pointer to the error structure.
 907  *
 908  * @return
 909  *   0 on success, a negative errno value otherwise and rte_errno is set.
 910  */
 911 static int
 912 flow_dv_convert_action_modify_tcp_ack
 913                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 914                          const struct rte_flow_action *action,
 915                          struct rte_flow_error *error)
 916 {
 917         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 918         uint64_t value = rte_be_to_cpu_32(*conf);
 919         struct rte_flow_item item;
 920         struct rte_flow_item_tcp tcp;
 921         struct rte_flow_item_tcp tcp_mask;
 922
 923         memset(&tcp, 0, sizeof(tcp));
 924         memset(&tcp_mask, 0, sizeof(tcp_mask));
 925         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 926                 /*
 927                  * The HW has no decrement operation, only increment operation.
 928                  * To simulate decrement X from Y using increment operation
 929                  * we need to add UINT32_MAX X times to Y.
 930                  * Each adding of UINT32_MAX decrements Y by 1.
 931                  */
 932                 value *= UINT32_MAX;
 933         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 934         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 935         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 936         item.spec = &tcp;
 937         item.mask = &tcp_mask;
 938         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 939                                              MLX5_MODIFICATION_TYPE_ADD, error);
 940 }
 941
 942 static enum mlx5_modification_field reg_to_field[] = {
 943         [REG_NONE] = MLX5_MODI_OUT_NONE,
 944         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 945         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 946         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 947         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 948         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 949         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 950         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 951         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 952         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 953         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 954 };
 955
 956 /**
 957  * Convert register set to DV specification.
 958  *
 959  * @param[in,out] resource
 960  *   Pointer to the modify-header resource.
 961  * @param[in] action
 962  *   Pointer to action specification.
 963  * @param[out] error
 964  *   Pointer to the error structure.
 965  *
 966  * @return
 967  *   0 on success, a negative errno value otherwise and rte_errno is set.
 968  */
 969 static int
 970 flow_dv_convert_action_set_reg
 971                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 972                          const struct rte_flow_action *action,
 973                          struct rte_flow_error *error)
 974 {
 975         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 976         struct mlx5_modification_cmd *actions = resource->actions;
 977         uint32_t i = resource->actions_num;
 978
 979         if (i >= MLX5_MAX_MODIFY_NUM)
 980                 return rte_flow_error_set(error, EINVAL,
 981                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 982                                           "too many items to modify");
 983         MLX5_ASSERT(conf->id != REG_NONE);
 984         MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field));
 985         actions[i] = (struct mlx5_modification_cmd) {
 986                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 987                 .field = reg_to_field[conf->id],
 988         };
 989         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 990         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 991         ++i;
 992         resource->actions_num = i;
 993         return 0;
 994 }
 995
 996 /**
 997  * Convert SET_TAG action to DV specification.
 998  *
 999  * @param[in] dev
1000  *   Pointer to the rte_eth_dev structure.
1001  * @param[in,out] resource
1002  *   Pointer to the modify-header resource.
1003  * @param[in] conf
1004  *   Pointer to action specification.
1005  * @param[out] error
1006  *   Pointer to the error structure.
1007  *
1008  * @return
1009  *   0 on success, a negative errno value otherwise and rte_errno is set.
1010  */
1011 static int
1012 flow_dv_convert_action_set_tag
1013                         (struct rte_eth_dev *dev,
1014                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1015                          const struct rte_flow_action_set_tag *conf,
1016                          struct rte_flow_error *error)
1017 {
1018         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1019         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1020         struct rte_flow_item item = {
1021                 .spec = &data,
1022                 .mask = &mask,
1023         };
1024         struct field_modify_info reg_c_x[] = {
1025                 [1] = {0, 0, 0},
1026         };
1027         enum mlx5_modification_field reg_type;
1028         int ret;
1029
1030         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1031         if (ret < 0)
1032                 return ret;
1033         MLX5_ASSERT(ret != REG_NONE);
1034         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1035         reg_type = reg_to_field[ret];
1036         MLX5_ASSERT(reg_type > 0);
1037         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1038         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1039                                              MLX5_MODIFICATION_TYPE_SET, error);
1040 }
1041
1042 /**
1043  * Convert internal COPY_REG action to DV specification.
1044  *
1045  * @param[in] dev
1046  *   Pointer to the rte_eth_dev structure.
1047  * @param[in,out] res
1048  *   Pointer to the modify-header resource.
1049  * @param[in] action
1050  *   Pointer to action specification.
1051  * @param[out] error
1052  *   Pointer to the error structure.
1053  *
1054  * @return
1055  *   0 on success, a negative errno value otherwise and rte_errno is set.
1056  */
1057 static int
1058 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1059                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1060                                  const struct rte_flow_action *action,
1061                                  struct rte_flow_error *error)
1062 {
1063         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1064         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1065         struct rte_flow_item item = {
1066                 .spec = NULL,
1067                 .mask = &mask,
1068         };
1069         struct field_modify_info reg_src[] = {
1070                 {4, 0, reg_to_field[conf->src]},
1071                 {0, 0, 0},
1072         };
1073         struct field_modify_info reg_dst = {
1074                 .offset = 0,
1075                 .id = reg_to_field[conf->dst],
1076         };
1077         /* Adjust reg_c[0] usage according to reported mask. */
1078         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1079                 struct mlx5_priv *priv = dev->data->dev_private;
1080                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1081
1082                 MLX5_ASSERT(reg_c0);
1083                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1084                 if (conf->dst == REG_C_0) {
1085                         /* Copy to reg_c[0], within mask only. */
1086                         reg_dst.offset = rte_bsf32(reg_c0);
1087                         /*
1088                          * Mask is ignoring the enianness, because
1089                          * there is no conversion in datapath.
1090                          */
1091 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1092                         /* Copy from destination lower bits to reg_c[0]. */
1093                         mask = reg_c0 >> reg_dst.offset;
1094 #else
1095                         /* Copy from destination upper bits to reg_c[0]. */
1096                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1097                                           rte_fls_u32(reg_c0));
1098 #endif
1099                 } else {
1100                         mask = rte_cpu_to_be_32(reg_c0);
1101 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1102                         /* Copy from reg_c[0] to destination lower bits. */
1103                         reg_dst.offset = 0;
1104 #else
1105                         /* Copy from reg_c[0] to destination upper bits. */
1106                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1107                                          (rte_fls_u32(reg_c0) -
1108                                           rte_bsf32(reg_c0));
1109 #endif
1110                 }
1111         }
1112         return flow_dv_convert_modify_action(&item,
1113                                              reg_src, &reg_dst, res,
1114                                              MLX5_MODIFICATION_TYPE_COPY,
1115                                              error);
1116 }
1117
1118 /**
1119  * Convert MARK action to DV specification. This routine is used
1120  * in extensive metadata only and requires metadata register to be
1121  * handled. In legacy mode hardware tag resource is engaged.
1122  *
1123  * @param[in] dev
1124  *   Pointer to the rte_eth_dev structure.
1125  * @param[in] conf
1126  *   Pointer to MARK action specification.
1127  * @param[in,out] resource
1128  *   Pointer to the modify-header resource.
1129  * @param[out] error
1130  *   Pointer to the error structure.
1131  *
1132  * @return
1133  *   0 on success, a negative errno value otherwise and rte_errno is set.
1134  */
1135 static int
1136 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1137                             const struct rte_flow_action_mark *conf,
1138                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1139                             struct rte_flow_error *error)
1140 {
1141         struct mlx5_priv *priv = dev->data->dev_private;
1142         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1143                                            priv->sh->dv_mark_mask);
1144         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1145         struct rte_flow_item item = {
1146                 .spec = &data,
1147                 .mask = &mask,
1148         };
1149         struct field_modify_info reg_c_x[] = {
1150                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1151                 {0, 0, 0},
1152         };
1153         int reg;
1154
1155         if (!mask)
1156                 return rte_flow_error_set(error, EINVAL,
1157                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1158                                           NULL, "zero mark action mask");
1159         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1160         if (reg < 0)
1161                 return reg;
1162         MLX5_ASSERT(reg > 0);
1163         if (reg == REG_C_0) {
1164                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1165                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1166
1167                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1168                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1169                 mask = rte_cpu_to_be_32(mask << shl_c0);
1170         }
1171         reg_c_x[0].id = reg_to_field[reg];
1172         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1173                                              MLX5_MODIFICATION_TYPE_SET, error);
1174 }
1175
1176 /**
1177  * Get metadata register index for specified steering domain.
1178  *
1179  * @param[in] dev
1180  *   Pointer to the rte_eth_dev structure.
1181  * @param[in] attr
1182  *   Attributes of flow to determine steering domain.
1183  * @param[out] error
1184  *   Pointer to the error structure.
1185  *
1186  * @return
1187  *   positive index on success, a negative errno value otherwise
1188  *   and rte_errno is set.
1189  */
1190 static enum modify_reg
1191 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1192                          const struct rte_flow_attr *attr,
1193                          struct rte_flow_error *error)
1194 {
1195         int reg =
1196                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1197                                           MLX5_METADATA_FDB :
1198                                             attr->egress ?
1199                                             MLX5_METADATA_TX :
1200                                             MLX5_METADATA_RX, 0, error);
1201         if (reg < 0)
1202                 return rte_flow_error_set(error,
1203                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1204                                           NULL, "unavailable "
1205                                           "metadata register");
1206         return reg;
1207 }
1208
1209 /**
1210  * Convert SET_META action to DV specification.
1211  *
1212  * @param[in] dev
1213  *   Pointer to the rte_eth_dev structure.
1214  * @param[in,out] resource
1215  *   Pointer to the modify-header resource.
1216  * @param[in] attr
1217  *   Attributes of flow that includes this item.
1218  * @param[in] conf
1219  *   Pointer to action specification.
1220  * @param[out] error
1221  *   Pointer to the error structure.
1222  *
1223  * @return
1224  *   0 on success, a negative errno value otherwise and rte_errno is set.
1225  */
1226 static int
1227 flow_dv_convert_action_set_meta
1228                         (struct rte_eth_dev *dev,
1229                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1230                          const struct rte_flow_attr *attr,
1231                          const struct rte_flow_action_set_meta *conf,
1232                          struct rte_flow_error *error)
1233 {
1234         uint32_t data = conf->data;
1235         uint32_t mask = conf->mask;
1236         struct rte_flow_item item = {
1237                 .spec = &data,
1238                 .mask = &mask,
1239         };
1240         struct field_modify_info reg_c_x[] = {
1241                 [1] = {0, 0, 0},
1242         };
1243         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1244
1245         if (reg < 0)
1246                 return reg;
1247         /*
1248          * In datapath code there is no endianness
1249          * coversions for perfromance reasons, all
1250          * pattern conversions are done in rte_flow.
1251          */
1252         if (reg == REG_C_0) {
1253                 struct mlx5_priv *priv = dev->data->dev_private;
1254                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1255                 uint32_t shl_c0;
1256
1257                 MLX5_ASSERT(msk_c0);
1258 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1259                 shl_c0 = rte_bsf32(msk_c0);
1260 #else
1261                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1262 #endif
1263                 mask <<= shl_c0;
1264                 data <<= shl_c0;
1265                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1266         }
1267         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1268         /* The routine expects parameters in memory as big-endian ones. */
1269         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1270                                              MLX5_MODIFICATION_TYPE_SET, error);
1271 }
1272
1273 /**
1274  * Convert modify-header set IPv4 DSCP action to DV specification.
1275  *
1276  * @param[in,out] resource
1277  *   Pointer to the modify-header resource.
1278  * @param[in] action
1279  *   Pointer to action specification.
1280  * @param[out] error
1281  *   Pointer to the error structure.
1282  *
1283  * @return
1284  *   0 on success, a negative errno value otherwise and rte_errno is set.
1285  */
1286 static int
1287 flow_dv_convert_action_modify_ipv4_dscp
1288                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1289                          const struct rte_flow_action *action,
1290                          struct rte_flow_error *error)
1291 {
1292         const struct rte_flow_action_set_dscp *conf =
1293                 (const struct rte_flow_action_set_dscp *)(action->conf);
1294         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1295         struct rte_flow_item_ipv4 ipv4;
1296         struct rte_flow_item_ipv4 ipv4_mask;
1297
1298         memset(&ipv4, 0, sizeof(ipv4));
1299         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1300         ipv4.hdr.type_of_service = conf->dscp;
1301         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1302         item.spec = &ipv4;
1303         item.mask = &ipv4_mask;
1304         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1305                                              MLX5_MODIFICATION_TYPE_SET, error);
1306 }
1307
1308 /**
1309  * Convert modify-header set IPv6 DSCP action to DV specification.
1310  *
1311  * @param[in,out] resource
1312  *   Pointer to the modify-header resource.
1313  * @param[in] action
1314  *   Pointer to action specification.
1315  * @param[out] error
1316  *   Pointer to the error structure.
1317  *
1318  * @return
1319  *   0 on success, a negative errno value otherwise and rte_errno is set.
1320  */
1321 static int
1322 flow_dv_convert_action_modify_ipv6_dscp
1323                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1324                          const struct rte_flow_action *action,
1325                          struct rte_flow_error *error)
1326 {
1327         const struct rte_flow_action_set_dscp *conf =
1328                 (const struct rte_flow_action_set_dscp *)(action->conf);
1329         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1330         struct rte_flow_item_ipv6 ipv6;
1331         struct rte_flow_item_ipv6 ipv6_mask;
1332
1333         memset(&ipv6, 0, sizeof(ipv6));
1334         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1335         /*
1336          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1337          * rdma-core only accept the DSCP bits byte aligned start from
1338          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1339          * bits in IPv6 case as rdma-core requires byte aligned value.
1340          */
1341         ipv6.hdr.vtc_flow = conf->dscp;
1342         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1343         item.spec = &ipv6;
1344         item.mask = &ipv6_mask;
1345         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1346                                              MLX5_MODIFICATION_TYPE_SET, error);
1347 }
1348
1349 /**
1350  * Validate MARK item.
1351  *
1352  * @param[in] dev
1353  *   Pointer to the rte_eth_dev structure.
1354  * @param[in] item
1355  *   Item specification.
1356  * @param[in] attr
1357  *   Attributes of flow that includes this item.
1358  * @param[out] error
1359  *   Pointer to error structure.
1360  *
1361  * @return
1362  *   0 on success, a negative errno value otherwise and rte_errno is set.
1363  */
1364 static int
1365 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1366                            const struct rte_flow_item *item,
1367                            const struct rte_flow_attr *attr __rte_unused,
1368                            struct rte_flow_error *error)
1369 {
1370         struct mlx5_priv *priv = dev->data->dev_private;
1371         struct mlx5_dev_config *config = &priv->config;
1372         const struct rte_flow_item_mark *spec = item->spec;
1373         const struct rte_flow_item_mark *mask = item->mask;
1374         const struct rte_flow_item_mark nic_mask = {
1375                 .id = priv->sh->dv_mark_mask,
1376         };
1377         int ret;
1378
1379         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1380                 return rte_flow_error_set(error, ENOTSUP,
1381                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1382                                           "extended metadata feature"
1383                                           " isn't enabled");
1384         if (!mlx5_flow_ext_mreg_supported(dev))
1385                 return rte_flow_error_set(error, ENOTSUP,
1386                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1387                                           "extended metadata register"
1388                                           " isn't supported");
1389         if (!nic_mask.id)
1390                 return rte_flow_error_set(error, ENOTSUP,
1391                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1392                                           "extended metadata register"
1393                                           " isn't available");
1394         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1395         if (ret < 0)
1396                 return ret;
1397         if (!spec)
1398                 return rte_flow_error_set(error, EINVAL,
1399                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1400                                           item->spec,
1401                                           "data cannot be empty");
1402         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1403                 return rte_flow_error_set(error, EINVAL,
1404                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1405                                           &spec->id,
1406                                           "mark id exceeds the limit");
1407         if (!mask)
1408                 mask = &nic_mask;
1409         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1410                                         (const uint8_t *)&nic_mask,
1411                                         sizeof(struct rte_flow_item_mark),
1412                                         error);
1413         if (ret < 0)
1414                 return ret;
1415         return 0;
1416 }
1417
1418 /**
1419  * Validate META item.
1420  *
1421  * @param[in] dev
1422  *   Pointer to the rte_eth_dev structure.
1423  * @param[in] item
1424  *   Item specification.
1425  * @param[in] attr
1426  *   Attributes of flow that includes this item.
1427  * @param[out] error
1428  *   Pointer to error structure.
1429  *
1430  * @return
1431  *   0 on success, a negative errno value otherwise and rte_errno is set.
1432  */
1433 static int
1434 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1435                            const struct rte_flow_item *item,
1436                            const struct rte_flow_attr *attr,
1437                            struct rte_flow_error *error)
1438 {
1439         struct mlx5_priv *priv = dev->data->dev_private;
1440         struct mlx5_dev_config *config = &priv->config;
1441         const struct rte_flow_item_meta *spec = item->spec;
1442         const struct rte_flow_item_meta *mask = item->mask;
1443         struct rte_flow_item_meta nic_mask = {
1444                 .data = UINT32_MAX
1445         };
1446         int reg;
1447         int ret;
1448
1449         if (!spec)
1450                 return rte_flow_error_set(error, EINVAL,
1451                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1452                                           item->spec,
1453                                           "data cannot be empty");
1454         if (!spec->data)
1455                 return rte_flow_error_set(error, EINVAL,
1456                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1457                                           "data cannot be zero");
1458         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1459                 if (!mlx5_flow_ext_mreg_supported(dev))
1460                         return rte_flow_error_set(error, ENOTSUP,
1461                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1462                                           "extended metadata register"
1463                                           " isn't supported");
1464                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1465                 if (reg < 0)
1466                         return reg;
1467                 if (reg == REG_B)
1468                         return rte_flow_error_set(error, ENOTSUP,
1469                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1470                                           "match on reg_b "
1471                                           "isn't supported");
1472                 if (reg != REG_A)
1473                         nic_mask.data = priv->sh->dv_meta_mask;
1474         }
1475         if (!mask)
1476                 mask = &rte_flow_item_meta_mask;
1477         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1478                                         (const uint8_t *)&nic_mask,
1479                                         sizeof(struct rte_flow_item_meta),
1480                                         error);
1481         return ret;
1482 }
1483
1484 /**
1485  * Validate TAG item.
1486  *
1487  * @param[in] dev
1488  *   Pointer to the rte_eth_dev structure.
1489  * @param[in] item
1490  *   Item specification.
1491  * @param[in] attr
1492  *   Attributes of flow that includes this item.
1493  * @param[out] error
1494  *   Pointer to error structure.
1495  *
1496  * @return
1497  *   0 on success, a negative errno value otherwise and rte_errno is set.
1498  */
1499 static int
1500 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1501                           const struct rte_flow_item *item,
1502                           const struct rte_flow_attr *attr __rte_unused,
1503                           struct rte_flow_error *error)
1504 {
1505         const struct rte_flow_item_tag *spec = item->spec;
1506         const struct rte_flow_item_tag *mask = item->mask;
1507         const struct rte_flow_item_tag nic_mask = {
1508                 .data = RTE_BE32(UINT32_MAX),
1509                 .index = 0xff,
1510         };
1511         int ret;
1512
1513         if (!mlx5_flow_ext_mreg_supported(dev))
1514                 return rte_flow_error_set(error, ENOTSUP,
1515                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1516                                           "extensive metadata register"
1517                                           " isn't supported");
1518         if (!spec)
1519                 return rte_flow_error_set(error, EINVAL,
1520                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1521                                           item->spec,
1522                                           "data cannot be empty");
1523         if (!mask)
1524                 mask = &rte_flow_item_tag_mask;
1525         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1526                                         (const uint8_t *)&nic_mask,
1527                                         sizeof(struct rte_flow_item_tag),
1528                                         error);
1529         if (ret < 0)
1530                 return ret;
1531         if (mask->index != 0xff)
1532                 return rte_flow_error_set(error, EINVAL,
1533                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1534                                           "partial mask for tag index"
1535                                           " is not supported");
1536         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1537         if (ret < 0)
1538                 return ret;
1539         MLX5_ASSERT(ret != REG_NONE);
1540         return 0;
1541 }
1542
1543 /**
1544  * Validate vport item.
1545  *
1546  * @param[in] dev
1547  *   Pointer to the rte_eth_dev structure.
1548  * @param[in] item
1549  *   Item specification.
1550  * @param[in] attr
1551  *   Attributes of flow that includes this item.
1552  * @param[in] item_flags
1553  *   Bit-fields that holds the items detected until now.
1554  * @param[out] error
1555  *   Pointer to error structure.
1556  *
1557  * @return
1558  *   0 on success, a negative errno value otherwise and rte_errno is set.
1559  */
1560 static int
1561 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1562                               const struct rte_flow_item *item,
1563                               const struct rte_flow_attr *attr,
1564                               uint64_t item_flags,
1565                               struct rte_flow_error *error)
1566 {
1567         const struct rte_flow_item_port_id *spec = item->spec;
1568         const struct rte_flow_item_port_id *mask = item->mask;
1569         const struct rte_flow_item_port_id switch_mask = {
1570                         .id = 0xffffffff,
1571         };
1572         struct mlx5_priv *esw_priv;
1573         struct mlx5_priv *dev_priv;
1574         int ret;
1575
1576         if (!attr->transfer)
1577                 return rte_flow_error_set(error, EINVAL,
1578                                           RTE_FLOW_ERROR_TYPE_ITEM,
1579                                           NULL,
1580                                           "match on port id is valid only"
1581                                           " when transfer flag is enabled");
1582         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1583                 return rte_flow_error_set(error, ENOTSUP,
1584                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1585                                           "multiple source ports are not"
1586                                           " supported");
1587         if (!mask)
1588                 mask = &switch_mask;
1589         if (mask->id != 0xffffffff)
1590                 return rte_flow_error_set(error, ENOTSUP,
1591                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1592                                            mask,
1593                                            "no support for partial mask on"
1594                                            " \"id\" field");
1595         ret = mlx5_flow_item_acceptable
1596                                 (item, (const uint8_t *)mask,
1597                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1598                                  sizeof(struct rte_flow_item_port_id),
1599                                  error);
1600         if (ret)
1601                 return ret;
1602         if (!spec)
1603                 return 0;
1604         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1605         if (!esw_priv)
1606                 return rte_flow_error_set(error, rte_errno,
1607                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1608                                           "failed to obtain E-Switch info for"
1609                                           " port");
1610         dev_priv = mlx5_dev_to_eswitch_info(dev);
1611         if (!dev_priv)
1612                 return rte_flow_error_set(error, rte_errno,
1613                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1614                                           NULL,
1615                                           "failed to obtain E-Switch info");
1616         if (esw_priv->domain_id != dev_priv->domain_id)
1617                 return rte_flow_error_set(error, EINVAL,
1618                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1619                                           "cannot match on a port from a"
1620                                           " different E-Switch");
1621         return 0;
1622 }
1623
1624 /**
1625  * Validate GTP item.
1626  *
1627  * @param[in] dev
1628  *   Pointer to the rte_eth_dev structure.
1629  * @param[in] item
1630  *   Item specification.
1631  * @param[in] item_flags
1632  *   Bit-fields that holds the items detected until now.
1633  * @param[out] error
1634  *   Pointer to error structure.
1635  *
1636  * @return
1637  *   0 on success, a negative errno value otherwise and rte_errno is set.
1638  */
1639 static int
1640 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1641                           const struct rte_flow_item *item,
1642                           uint64_t item_flags,
1643                           struct rte_flow_error *error)
1644 {
1645         struct mlx5_priv *priv = dev->data->dev_private;
1646         const struct rte_flow_item_gtp *mask = item->mask;
1647         const struct rte_flow_item_gtp nic_mask = {
1648                 .msg_type = 0xff,
1649                 .teid = RTE_BE32(0xffffffff),
1650         };
1651
1652         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1653                 return rte_flow_error_set(error, ENOTSUP,
1654                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1655                                           "GTP support is not enabled");
1656         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1657                 return rte_flow_error_set(error, ENOTSUP,
1658                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1659                                           "multiple tunnel layers not"
1660                                           " supported");
1661         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1662                 return rte_flow_error_set(error, EINVAL,
1663                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1664                                           "no outer UDP layer found");
1665         if (!mask)
1666                 mask = &rte_flow_item_gtp_mask;
1667         return mlx5_flow_item_acceptable
1668                 (item, (const uint8_t *)mask,
1669                  (const uint8_t *)&nic_mask,
1670                  sizeof(struct rte_flow_item_gtp),
1671                  error);
1672 }
1673
1674 /**
1675  * Validate the pop VLAN action.
1676  *
1677  * @param[in] dev
1678  *   Pointer to the rte_eth_dev structure.
1679  * @param[in] action_flags
1680  *   Holds the actions detected until now.
1681  * @param[in] action
1682  *   Pointer to the pop vlan action.
1683  * @param[in] item_flags
1684  *   The items found in this flow rule.
1685  * @param[in] attr
1686  *   Pointer to flow attributes.
1687  * @param[out] error
1688  *   Pointer to error structure.
1689  *
1690  * @return
1691  *   0 on success, a negative errno value otherwise and rte_errno is set.
1692  */
1693 static int
1694 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1695                                  uint64_t action_flags,
1696                                  const struct rte_flow_action *action,
1697                                  uint64_t item_flags,
1698                                  const struct rte_flow_attr *attr,
1699                                  struct rte_flow_error *error)
1700 {
1701         const struct mlx5_priv *priv = dev->data->dev_private;
1702
1703         (void)action;
1704         (void)attr;
1705         if (!priv->sh->pop_vlan_action)
1706                 return rte_flow_error_set(error, ENOTSUP,
1707                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1708                                           NULL,
1709                                           "pop vlan action is not supported");
1710         if (attr->egress)
1711                 return rte_flow_error_set(error, ENOTSUP,
1712                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1713                                           NULL,
1714                                           "pop vlan action not supported for "
1715                                           "egress");
1716         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1717                 return rte_flow_error_set(error, ENOTSUP,
1718                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1719                                           "no support for multiple VLAN "
1720                                           "actions");
1721         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1722                 return rte_flow_error_set(error, ENOTSUP,
1723                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1724                                           NULL,
1725                                           "cannot pop vlan without a "
1726                                           "match on (outer) vlan in the flow");
1727         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1728                 return rte_flow_error_set(error, EINVAL,
1729                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1730                                           "wrong action order, port_id should "
1731                                           "be after pop VLAN action");
1732         if (!attr->transfer && priv->representor)
1733                 return rte_flow_error_set(error, ENOTSUP,
1734                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1735                                           "pop vlan action for VF representor "
1736                                           "not supported on NIC table");
1737         return 0;
1738 }
1739
1740 /**
1741  * Get VLAN default info from vlan match info.
1742  *
1743  * @param[in] items
1744  *   the list of item specifications.
1745  * @param[out] vlan
1746  *   pointer VLAN info to fill to.
1747  *
1748  * @return
1749  *   0 on success, a negative errno value otherwise and rte_errno is set.
1750  */
1751 static void
1752 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1753                                   struct rte_vlan_hdr *vlan)
1754 {
1755         const struct rte_flow_item_vlan nic_mask = {
1756                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1757                                 MLX5DV_FLOW_VLAN_VID_MASK),
1758                 .inner_type = RTE_BE16(0xffff),
1759         };
1760
1761         if (items == NULL)
1762                 return;
1763         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1764                 int type = items->type;
1765
1766                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
1767                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
1768                         break;
1769         }
1770         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
1771                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1772                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1773
1774                 if (!vlan_m)
1775                         vlan_m = &nic_mask;
1776                 /* Only full match values are accepted */
1777                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1778                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1779                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
1780                         vlan->vlan_tci |=
1781                                 rte_be_to_cpu_16(vlan_v->tci &
1782                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1783                 }
1784                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1785                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1786                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1787                         vlan->vlan_tci |=
1788                                 rte_be_to_cpu_16(vlan_v->tci &
1789                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1790                 }
1791                 if (vlan_m->inner_type == nic_mask.inner_type)
1792                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1793                                                            vlan_m->inner_type);
1794         }
1795 }
1796
1797 /**
1798  * Validate the push VLAN action.
1799  *
1800  * @param[in] dev
1801  *   Pointer to the rte_eth_dev structure.
1802  * @param[in] action_flags
1803  *   Holds the actions detected until now.
1804  * @param[in] item_flags
1805  *   The items found in this flow rule.
1806  * @param[in] action
1807  *   Pointer to the action structure.
1808  * @param[in] attr
1809  *   Pointer to flow attributes
1810  * @param[out] error
1811  *   Pointer to error structure.
1812  *
1813  * @return
1814  *   0 on success, a negative errno value otherwise and rte_errno is set.
1815  */
1816 static int
1817 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
1818                                   uint64_t action_flags,
1819                                   uint64_t item_flags __rte_unused,
1820                                   const struct rte_flow_action *action,
1821                                   const struct rte_flow_attr *attr,
1822                                   struct rte_flow_error *error)
1823 {
1824         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1825         const struct mlx5_priv *priv = dev->data->dev_private;
1826
1827         if (!attr->transfer && attr->ingress)
1828                 return rte_flow_error_set(error, ENOTSUP,
1829                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1830                                           NULL,
1831                                           "push VLAN action not supported for "
1832                                           "ingress");
1833         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1834             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1835                 return rte_flow_error_set(error, EINVAL,
1836                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1837                                           "invalid vlan ethertype");
1838         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1839                 return rte_flow_error_set(error, ENOTSUP,
1840                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1841                                           "no support for multiple VLAN "
1842                                           "actions");
1843         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1844                 return rte_flow_error_set(error, EINVAL,
1845                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1846                                           "wrong action order, port_id should "
1847                                           "be after push VLAN");
1848         if (!attr->transfer && priv->representor)
1849                 return rte_flow_error_set(error, ENOTSUP,
1850                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1851                                           "push vlan action for VF representor "
1852                                           "not supported on NIC table");
1853         (void)attr;
1854         return 0;
1855 }
1856
1857 /**
1858  * Validate the set VLAN PCP.
1859  *
1860  * @param[in] action_flags
1861  *   Holds the actions detected until now.
1862  * @param[in] actions
1863  *   Pointer to the list of actions remaining in the flow rule.
1864  * @param[out] error
1865  *   Pointer to error structure.
1866  *
1867  * @return
1868  *   0 on success, a negative errno value otherwise and rte_errno is set.
1869  */
1870 static int
1871 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1872                                      const struct rte_flow_action actions[],
1873                                      struct rte_flow_error *error)
1874 {
1875         const struct rte_flow_action *action = actions;
1876         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1877
1878         if (conf->vlan_pcp > 7)
1879                 return rte_flow_error_set(error, EINVAL,
1880                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1881                                           "VLAN PCP value is too big");
1882         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1883                 return rte_flow_error_set(error, ENOTSUP,
1884                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1885                                           "set VLAN PCP action must follow "
1886                                           "the push VLAN action");
1887         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1888                 return rte_flow_error_set(error, ENOTSUP,
1889                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1890                                           "Multiple VLAN PCP modification are "
1891                                           "not supported");
1892         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1893                 return rte_flow_error_set(error, EINVAL,
1894                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1895                                           "wrong action order, port_id should "
1896                                           "be after set VLAN PCP");
1897         return 0;
1898 }
1899
1900 /**
1901  * Validate the set VLAN VID.
1902  *
1903  * @param[in] item_flags
1904  *   Holds the items detected in this rule.
1905  * @param[in] action_flags
1906  *   Holds the actions detected until now.
1907  * @param[in] actions
1908  *   Pointer to the list of actions remaining in the flow rule.
1909  * @param[out] error
1910  *   Pointer to error structure.
1911  *
1912  * @return
1913  *   0 on success, a negative errno value otherwise and rte_errno is set.
1914  */
1915 static int
1916 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1917                                      uint64_t action_flags,
1918                                      const struct rte_flow_action actions[],
1919                                      struct rte_flow_error *error)
1920 {
1921         const struct rte_flow_action *action = actions;
1922         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1923
1924         if (conf->vlan_vid > RTE_BE16(0xFFE))
1925                 return rte_flow_error_set(error, EINVAL,
1926                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1927                                           "VLAN VID value is too big");
1928         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1929             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1930                 return rte_flow_error_set(error, ENOTSUP,
1931                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1932                                           "set VLAN VID action must follow push"
1933                                           " VLAN action or match on VLAN item");
1934         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1935                 return rte_flow_error_set(error, ENOTSUP,
1936                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1937                                           "Multiple VLAN VID modifications are "
1938                                           "not supported");
1939         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1940                 return rte_flow_error_set(error, EINVAL,
1941                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1942                                           "wrong action order, port_id should "
1943                                           "be after set VLAN VID");
1944         return 0;
1945 }
1946
1947 /*
1948  * Validate the FLAG action.
1949  *
1950  * @param[in] dev
1951  *   Pointer to the rte_eth_dev structure.
1952  * @param[in] action_flags
1953  *   Holds the actions detected until now.
1954  * @param[in] attr
1955  *   Pointer to flow attributes
1956  * @param[out] error
1957  *   Pointer to error structure.
1958  *
1959  * @return
1960  *   0 on success, a negative errno value otherwise and rte_errno is set.
1961  */
1962 static int
1963 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1964                              uint64_t action_flags,
1965                              const struct rte_flow_attr *attr,
1966                              struct rte_flow_error *error)
1967 {
1968         struct mlx5_priv *priv = dev->data->dev_private;
1969         struct mlx5_dev_config *config = &priv->config;
1970         int ret;
1971
1972         /* Fall back if no extended metadata register support. */
1973         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1974                 return mlx5_flow_validate_action_flag(action_flags, attr,
1975                                                       error);
1976         /* Extensive metadata mode requires registers. */
1977         if (!mlx5_flow_ext_mreg_supported(dev))
1978                 return rte_flow_error_set(error, ENOTSUP,
1979                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1980                                           "no metadata registers "
1981                                           "to support flag action");
1982         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1983                 return rte_flow_error_set(error, ENOTSUP,
1984                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1985                                           "extended metadata register"
1986                                           " isn't available");
1987         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1988         if (ret < 0)
1989                 return ret;
1990         MLX5_ASSERT(ret > 0);
1991         if (action_flags & MLX5_FLOW_ACTION_MARK)
1992                 return rte_flow_error_set(error, EINVAL,
1993                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1994                                           "can't mark and flag in same flow");
1995         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1996                 return rte_flow_error_set(error, EINVAL,
1997                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1998                                           "can't have 2 flag"
1999                                           " actions in same flow");
2000         return 0;
2001 }
2002
2003 /**
2004  * Validate MARK action.
2005  *
2006  * @param[in] dev
2007  *   Pointer to the rte_eth_dev structure.
2008  * @param[in] action
2009  *   Pointer to action.
2010  * @param[in] action_flags
2011  *   Holds the actions detected until now.
2012  * @param[in] attr
2013  *   Pointer to flow attributes
2014  * @param[out] error
2015  *   Pointer to error structure.
2016  *
2017  * @return
2018  *   0 on success, a negative errno value otherwise and rte_errno is set.
2019  */
2020 static int
2021 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
2022                              const struct rte_flow_action *action,
2023                              uint64_t action_flags,
2024                              const struct rte_flow_attr *attr,
2025                              struct rte_flow_error *error)
2026 {
2027         struct mlx5_priv *priv = dev->data->dev_private;
2028         struct mlx5_dev_config *config = &priv->config;
2029         const struct rte_flow_action_mark *mark = action->conf;
2030         int ret;
2031
2032         /* Fall back if no extended metadata register support. */
2033         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2034                 return mlx5_flow_validate_action_mark(action, action_flags,
2035                                                       attr, error);
2036         /* Extensive metadata mode requires registers. */
2037         if (!mlx5_flow_ext_mreg_supported(dev))
2038                 return rte_flow_error_set(error, ENOTSUP,
2039                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2040                                           "no metadata registers "
2041                                           "to support mark action");
2042         if (!priv->sh->dv_mark_mask)
2043                 return rte_flow_error_set(error, ENOTSUP,
2044                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2045                                           "extended metadata register"
2046                                           " isn't available");
2047         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2048         if (ret < 0)
2049                 return ret;
2050         MLX5_ASSERT(ret > 0);
2051         if (!mark)
2052                 return rte_flow_error_set(error, EINVAL,
2053                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2054                                           "configuration cannot be null");
2055         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
2056                 return rte_flow_error_set(error, EINVAL,
2057                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2058                                           &mark->id,
2059                                           "mark id exceeds the limit");
2060         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2061                 return rte_flow_error_set(error, EINVAL,
2062                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2063                                           "can't flag and mark in same flow");
2064         if (action_flags & MLX5_FLOW_ACTION_MARK)
2065                 return rte_flow_error_set(error, EINVAL,
2066                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2067                                           "can't have 2 mark actions in same"
2068                                           " flow");
2069         return 0;
2070 }
2071
2072 /**
2073  * Validate SET_META action.
2074  *
2075  * @param[in] dev
2076  *   Pointer to the rte_eth_dev structure.
2077  * @param[in] action
2078  *   Pointer to the action structure.
2079  * @param[in] action_flags
2080  *   Holds the actions detected until now.
2081  * @param[in] attr
2082  *   Pointer to flow attributes
2083  * @param[out] error
2084  *   Pointer to error structure.
2085  *
2086  * @return
2087  *   0 on success, a negative errno value otherwise and rte_errno is set.
2088  */
2089 static int
2090 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2091                                  const struct rte_flow_action *action,
2092                                  uint64_t action_flags __rte_unused,
2093                                  const struct rte_flow_attr *attr,
2094                                  struct rte_flow_error *error)
2095 {
2096         const struct rte_flow_action_set_meta *conf;
2097         uint32_t nic_mask = UINT32_MAX;
2098         int reg;
2099
2100         if (!mlx5_flow_ext_mreg_supported(dev))
2101                 return rte_flow_error_set(error, ENOTSUP,
2102                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2103                                           "extended metadata register"
2104                                           " isn't supported");
2105         reg = flow_dv_get_metadata_reg(dev, attr, error);
2106         if (reg < 0)
2107                 return reg;
2108         if (reg != REG_A && reg != REG_B) {
2109                 struct mlx5_priv *priv = dev->data->dev_private;
2110
2111                 nic_mask = priv->sh->dv_meta_mask;
2112         }
2113         if (!(action->conf))
2114                 return rte_flow_error_set(error, EINVAL,
2115                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2116                                           "configuration cannot be null");
2117         conf = (const struct rte_flow_action_set_meta *)action->conf;
2118         if (!conf->mask)
2119                 return rte_flow_error_set(error, EINVAL,
2120                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2121                                           "zero mask doesn't have any effect");
2122         if (conf->mask & ~nic_mask)
2123                 return rte_flow_error_set(error, EINVAL,
2124                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2125                                           "meta data must be within reg C0");
2126         return 0;
2127 }
2128
2129 /**
2130  * Validate SET_TAG action.
2131  *
2132  * @param[in] dev
2133  *   Pointer to the rte_eth_dev structure.
2134  * @param[in] action
2135  *   Pointer to the action structure.
2136  * @param[in] action_flags
2137  *   Holds the actions detected until now.
2138  * @param[in] attr
2139  *   Pointer to flow attributes
2140  * @param[out] error
2141  *   Pointer to error structure.
2142  *
2143  * @return
2144  *   0 on success, a negative errno value otherwise and rte_errno is set.
2145  */
2146 static int
2147 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2148                                 const struct rte_flow_action *action,
2149                                 uint64_t action_flags,
2150                                 const struct rte_flow_attr *attr,
2151                                 struct rte_flow_error *error)
2152 {
2153         const struct rte_flow_action_set_tag *conf;
2154         const uint64_t terminal_action_flags =
2155                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2156                 MLX5_FLOW_ACTION_RSS;
2157         int ret;
2158
2159         if (!mlx5_flow_ext_mreg_supported(dev))
2160                 return rte_flow_error_set(error, ENOTSUP,
2161                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2162                                           "extensive metadata register"
2163                                           " isn't supported");
2164         if (!(action->conf))
2165                 return rte_flow_error_set(error, EINVAL,
2166                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2167                                           "configuration cannot be null");
2168         conf = (const struct rte_flow_action_set_tag *)action->conf;
2169         if (!conf->mask)
2170                 return rte_flow_error_set(error, EINVAL,
2171                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2172                                           "zero mask doesn't have any effect");
2173         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2174         if (ret < 0)
2175                 return ret;
2176         if (!attr->transfer && attr->ingress &&
2177             (action_flags & terminal_action_flags))
2178                 return rte_flow_error_set(error, EINVAL,
2179                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2180                                           "set_tag has no effect"
2181                                           " with terminal actions");
2182         return 0;
2183 }
2184
2185 /**
2186  * Validate count action.
2187  *
2188  * @param[in] dev
2189  *   Pointer to rte_eth_dev structure.
2190  * @param[out] error
2191  *   Pointer to error structure.
2192  *
2193  * @return
2194  *   0 on success, a negative errno value otherwise and rte_errno is set.
2195  */
2196 static int
2197 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2198                               struct rte_flow_error *error)
2199 {
2200         struct mlx5_priv *priv = dev->data->dev_private;
2201
2202         if (!priv->config.devx)
2203                 goto notsup_err;
2204 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2205         return 0;
2206 #endif
2207 notsup_err:
2208         return rte_flow_error_set
2209                       (error, ENOTSUP,
2210                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2211                        NULL,
2212                        "count action not supported");
2213 }
2214
2215 /**
2216  * Validate the L2 encap action.
2217  *
2218  * @param[in] dev
2219  *   Pointer to the rte_eth_dev structure.
2220  * @param[in] action_flags
2221  *   Holds the actions detected until now.
2222  * @param[in] action
2223  *   Pointer to the action structure.
2224  * @param[in] attr
2225  *   Pointer to flow attributes.
2226  * @param[out] error
2227  *   Pointer to error structure.
2228  *
2229  * @return
2230  *   0 on success, a negative errno value otherwise and rte_errno is set.
2231  */
2232 static int
2233 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
2234                                  uint64_t action_flags,
2235                                  const struct rte_flow_action *action,
2236                                  const struct rte_flow_attr *attr,
2237                                  struct rte_flow_error *error)
2238 {
2239         const struct mlx5_priv *priv = dev->data->dev_private;
2240
2241         if (!(action->conf))
2242                 return rte_flow_error_set(error, EINVAL,
2243                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2244                                           "configuration cannot be null");
2245         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
2246                 return rte_flow_error_set(error, EINVAL,
2247                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2248                                           "can only have a single encap action "
2249                                           "in a flow");
2250         if (!attr->transfer && priv->representor)
2251                 return rte_flow_error_set(error, ENOTSUP,
2252                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2253                                           "encap action for VF representor "
2254                                           "not supported on NIC table");
2255         return 0;
2256 }
2257
2258 /**
2259  * Validate a decap action.
2260  *
2261  * @param[in] dev
2262  *   Pointer to the rte_eth_dev structure.
2263  * @param[in] action_flags
2264  *   Holds the actions detected until now.
2265  * @param[in] attr
2266  *   Pointer to flow attributes
2267  * @param[out] error
2268  *   Pointer to error structure.
2269  *
2270  * @return
2271  *   0 on success, a negative errno value otherwise and rte_errno is set.
2272  */
2273 static int
2274 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
2275                               uint64_t action_flags,
2276                               const struct rte_flow_attr *attr,
2277                               struct rte_flow_error *error)
2278 {
2279         const struct mlx5_priv *priv = dev->data->dev_private;
2280
2281         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
2282                 return rte_flow_error_set(error, ENOTSUP,
2283                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2284                                           action_flags &
2285                                           MLX5_FLOW_ACTION_DECAP ? "can only "
2286                                           "have a single decap action" : "decap "
2287                                           "after encap is not supported");
2288         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2289                 return rte_flow_error_set(error, EINVAL,
2290                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2291                                           "can't have decap action after"
2292                                           " modify action");
2293         if (attr->egress)
2294                 return rte_flow_error_set(error, ENOTSUP,
2295                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2296                                           NULL,
2297                                           "decap action not supported for "
2298                                           "egress");
2299         if (!attr->transfer && priv->representor)
2300                 return rte_flow_error_set(error, ENOTSUP,
2301                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2302                                           "decap action for VF representor "
2303                                           "not supported on NIC table");
2304         return 0;
2305 }
2306
2307 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
2308
2309 /**
2310  * Validate the raw encap and decap actions.
2311  *
2312  * @param[in] dev
2313  *   Pointer to the rte_eth_dev structure.
2314  * @param[in] decap
2315  *   Pointer to the decap action.
2316  * @param[in] encap
2317  *   Pointer to the encap action.
2318  * @param[in] attr
2319  *   Pointer to flow attributes
2320  * @param[in/out] action_flags
2321  *   Holds the actions detected until now.
2322  * @param[out] actions_n
2323  *   pointer to the number of actions counter.
2324  * @param[out] error
2325  *   Pointer to error structure.
2326  *
2327  * @return
2328  *   0 on success, a negative errno value otherwise and rte_errno is set.
2329  */
2330 static int
2331 flow_dv_validate_action_raw_encap_decap
2332         (struct rte_eth_dev *dev,
2333          const struct rte_flow_action_raw_decap *decap,
2334          const struct rte_flow_action_raw_encap *encap,
2335          const struct rte_flow_attr *attr, uint64_t *action_flags,
2336          int *actions_n, struct rte_flow_error *error)
2337 {
2338         const struct mlx5_priv *priv = dev->data->dev_private;
2339         int ret;
2340
2341         if (encap && (!encap->size || !encap->data))
2342                 return rte_flow_error_set(error, EINVAL,
2343                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2344                                           "raw encap data cannot be empty");
2345         if (decap && encap) {
2346                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
2347                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2348                         /* L3 encap. */
2349                         decap = NULL;
2350                 else if (encap->size <=
2351                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2352                            decap->size >
2353                            MLX5_ENCAPSULATION_DECISION_SIZE)
2354                         /* L3 decap. */
2355                         encap = NULL;
2356                 else if (encap->size >
2357                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2358                            decap->size >
2359                            MLX5_ENCAPSULATION_DECISION_SIZE)
2360                         /* 2 L2 actions: encap and decap. */
2361                         ;
2362                 else
2363                         return rte_flow_error_set(error,
2364                                 ENOTSUP,
2365                                 RTE_FLOW_ERROR_TYPE_ACTION,
2366                                 NULL, "unsupported too small "
2367                                 "raw decap and too small raw "
2368                                 "encap combination");
2369         }
2370         if (decap) {
2371                 ret = flow_dv_validate_action_decap(dev, *action_flags, attr,
2372                                                     error);
2373                 if (ret < 0)
2374                         return ret;
2375                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
2376                 ++(*actions_n);
2377         }
2378         if (encap) {
2379                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
2380                         return rte_flow_error_set(error, ENOTSUP,
2381                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2382                                                   NULL,
2383                                                   "small raw encap size");
2384                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
2385                         return rte_flow_error_set(error, EINVAL,
2386                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2387                                                   NULL,
2388                                                   "more than one encap action");
2389                 if (!attr->transfer && priv->representor)
2390                         return rte_flow_error_set
2391                                         (error, ENOTSUP,
2392                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2393                                          "encap action for VF representor "
2394                                          "not supported on NIC table");
2395                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
2396                 ++(*actions_n);
2397         }
2398         return 0;
2399 }
2400
2401 /**
2402  * Find existing encap/decap resource or create and register a new one.
2403  *
2404  * @param[in, out] dev
2405  *   Pointer to rte_eth_dev structure.
2406  * @param[in, out] resource
2407  *   Pointer to encap/decap resource.
2408  * @parm[in, out] dev_flow
2409  *   Pointer to the dev_flow.
2410  * @param[out] error
2411  *   pointer to error structure.
2412  *
2413  * @return
2414  *   0 on success otherwise -errno and errno is set.
2415  */
2416 static int
2417 flow_dv_encap_decap_resource_register
2418                         (struct rte_eth_dev *dev,
2419                          struct mlx5_flow_dv_encap_decap_resource *resource,
2420                          struct mlx5_flow *dev_flow,
2421                          struct rte_flow_error *error)
2422 {
2423         struct mlx5_priv *priv = dev->data->dev_private;
2424         struct mlx5_ibv_shared *sh = priv->sh;
2425         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2426         struct mlx5dv_dr_domain *domain;
2427
2428         resource->flags = dev_flow->group ? 0 : 1;
2429         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2430                 domain = sh->fdb_domain;
2431         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2432                 domain = sh->rx_domain;
2433         else
2434                 domain = sh->tx_domain;
2435         /* Lookup a matching resource from cache. */
2436         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2437                 if (resource->reformat_type == cache_resource->reformat_type &&
2438                     resource->ft_type == cache_resource->ft_type &&
2439                     resource->flags == cache_resource->flags &&
2440                     resource->size == cache_resource->size &&
2441                     !memcmp((const void *)resource->buf,
2442                             (const void *)cache_resource->buf,
2443                             resource->size)) {
2444                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2445                                 (void *)cache_resource,
2446                                 rte_atomic32_read(&cache_resource->refcnt));
2447                         rte_atomic32_inc(&cache_resource->refcnt);
2448                         dev_flow->dv.encap_decap = cache_resource;
2449                         return 0;
2450                 }
2451         }
2452         /* Register new encap/decap resource. */
2453         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2454         if (!cache_resource)
2455                 return rte_flow_error_set(error, ENOMEM,
2456                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2457                                           "cannot allocate resource memory");
2458         *cache_resource = *resource;
2459         cache_resource->verbs_action =
2460                 mlx5_glue->dv_create_flow_action_packet_reformat
2461                         (sh->ctx, cache_resource->reformat_type,
2462                          cache_resource->ft_type, domain, cache_resource->flags,
2463                          cache_resource->size,
2464                          (cache_resource->size ? cache_resource->buf : NULL));
2465         if (!cache_resource->verbs_action) {
2466                 rte_free(cache_resource);
2467                 return rte_flow_error_set(error, ENOMEM,
2468                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2469                                           NULL, "cannot create action");
2470         }
2471         rte_atomic32_init(&cache_resource->refcnt);
2472         rte_atomic32_inc(&cache_resource->refcnt);
2473         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2474         dev_flow->dv.encap_decap = cache_resource;
2475         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2476                 (void *)cache_resource,
2477                 rte_atomic32_read(&cache_resource->refcnt));
2478         return 0;
2479 }
2480
2481 /**
2482  * Find existing table jump resource or create and register a new one.
2483  *
2484  * @param[in, out] dev
2485  *   Pointer to rte_eth_dev structure.
2486  * @param[in, out] tbl
2487  *   Pointer to flow table resource.
2488  * @parm[in, out] dev_flow
2489  *   Pointer to the dev_flow.
2490  * @param[out] error
2491  *   pointer to error structure.
2492  *
2493  * @return
2494  *   0 on success otherwise -errno and errno is set.
2495  */
2496 static int
2497 flow_dv_jump_tbl_resource_register
2498                         (struct rte_eth_dev *dev __rte_unused,
2499                          struct mlx5_flow_tbl_resource *tbl,
2500                          struct mlx5_flow *dev_flow,
2501                          struct rte_flow_error *error)
2502 {
2503         struct mlx5_flow_tbl_data_entry *tbl_data =
2504                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2505         int cnt;
2506
2507         MLX5_ASSERT(tbl);
2508         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2509         if (!cnt) {
2510                 tbl_data->jump.action =
2511                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2512                         (tbl->obj);
2513                 if (!tbl_data->jump.action)
2514                         return rte_flow_error_set(error, ENOMEM,
2515                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2516                                         NULL, "cannot create jump action");
2517                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2518                         (void *)&tbl_data->jump, cnt);
2519         } else {
2520                 MLX5_ASSERT(tbl_data->jump.action);
2521                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2522                         (void *)&tbl_data->jump, cnt);
2523         }
2524         rte_atomic32_inc(&tbl_data->jump.refcnt);
2525         dev_flow->dv.jump = &tbl_data->jump;
2526         return 0;
2527 }
2528
2529 /**
2530  * Find existing table port ID resource or create and register a new one.
2531  *
2532  * @param[in, out] dev
2533  *   Pointer to rte_eth_dev structure.
2534  * @param[in, out] resource
2535  *   Pointer to port ID action resource.
2536  * @parm[in, out] dev_flow
2537  *   Pointer to the dev_flow.
2538  * @param[out] error
2539  *   pointer to error structure.
2540  *
2541  * @return
2542  *   0 on success otherwise -errno and errno is set.
2543  */
2544 static int
2545 flow_dv_port_id_action_resource_register
2546                         (struct rte_eth_dev *dev,
2547                          struct mlx5_flow_dv_port_id_action_resource *resource,
2548                          struct mlx5_flow *dev_flow,
2549                          struct rte_flow_error *error)
2550 {
2551         struct mlx5_priv *priv = dev->data->dev_private;
2552         struct mlx5_ibv_shared *sh = priv->sh;
2553         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2554
2555         /* Lookup a matching resource from cache. */
2556         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2557                 if (resource->port_id == cache_resource->port_id) {
2558                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2559                                 "refcnt %d++",
2560                                 (void *)cache_resource,
2561                                 rte_atomic32_read(&cache_resource->refcnt));
2562                         rte_atomic32_inc(&cache_resource->refcnt);
2563                         dev_flow->dv.port_id_action = cache_resource;
2564                         return 0;
2565                 }
2566         }
2567         /* Register new port id action resource. */
2568         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2569         if (!cache_resource)
2570                 return rte_flow_error_set(error, ENOMEM,
2571                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2572                                           "cannot allocate resource memory");
2573         *cache_resource = *resource;
2574         /*
2575          * Depending on rdma_core version the glue routine calls
2576          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2577          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2578          */
2579         cache_resource->action =
2580                 mlx5_glue->dr_create_flow_action_dest_port
2581                         (priv->sh->fdb_domain, resource->port_id);
2582         if (!cache_resource->action) {
2583                 rte_free(cache_resource);
2584                 return rte_flow_error_set(error, ENOMEM,
2585                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2586                                           NULL, "cannot create action");
2587         }
2588         rte_atomic32_init(&cache_resource->refcnt);
2589         rte_atomic32_inc(&cache_resource->refcnt);
2590         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2591         dev_flow->dv.port_id_action = cache_resource;
2592         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2593                 (void *)cache_resource,
2594                 rte_atomic32_read(&cache_resource->refcnt));
2595         return 0;
2596 }
2597
2598 /**
2599  * Find existing push vlan resource or create and register a new one.
2600  *
2601  * @param [in, out] dev
2602  *   Pointer to rte_eth_dev structure.
2603  * @param[in, out] resource
2604  *   Pointer to port ID action resource.
2605  * @parm[in, out] dev_flow
2606  *   Pointer to the dev_flow.
2607  * @param[out] error
2608  *   pointer to error structure.
2609  *
2610  * @return
2611  *   0 on success otherwise -errno and errno is set.
2612  */
2613 static int
2614 flow_dv_push_vlan_action_resource_register
2615                        (struct rte_eth_dev *dev,
2616                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2617                         struct mlx5_flow *dev_flow,
2618                         struct rte_flow_error *error)
2619 {
2620         struct mlx5_priv *priv = dev->data->dev_private;
2621         struct mlx5_ibv_shared *sh = priv->sh;
2622         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2623         struct mlx5dv_dr_domain *domain;
2624
2625         /* Lookup a matching resource from cache. */
2626         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2627                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2628                     resource->ft_type == cache_resource->ft_type) {
2629                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2630                                 "refcnt %d++",
2631                                 (void *)cache_resource,
2632                                 rte_atomic32_read(&cache_resource->refcnt));
2633                         rte_atomic32_inc(&cache_resource->refcnt);
2634                         dev_flow->dv.push_vlan_res = cache_resource;
2635                         return 0;
2636                 }
2637         }
2638         /* Register new push_vlan action resource. */
2639         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2640         if (!cache_resource)
2641                 return rte_flow_error_set(error, ENOMEM,
2642                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2643                                           "cannot allocate resource memory");
2644         *cache_resource = *resource;
2645         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2646                 domain = sh->fdb_domain;
2647         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2648                 domain = sh->rx_domain;
2649         else
2650                 domain = sh->tx_domain;
2651         cache_resource->action =
2652                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2653                                                            resource->vlan_tag);
2654         if (!cache_resource->action) {
2655                 rte_free(cache_resource);
2656                 return rte_flow_error_set(error, ENOMEM,
2657                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2658                                           NULL, "cannot create action");
2659         }
2660         rte_atomic32_init(&cache_resource->refcnt);
2661         rte_atomic32_inc(&cache_resource->refcnt);
2662         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2663         dev_flow->dv.push_vlan_res = cache_resource;
2664         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2665                 (void *)cache_resource,
2666                 rte_atomic32_read(&cache_resource->refcnt));
2667         return 0;
2668 }
2669 /**
2670  * Get the size of specific rte_flow_item_type
2671  *
2672  * @param[in] item_type
2673  *   Tested rte_flow_item_type.
2674  *
2675  * @return
2676  *   sizeof struct item_type, 0 if void or irrelevant.
2677  */
2678 static size_t
2679 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2680 {
2681         size_t retval;
2682
2683         switch (item_type) {
2684         case RTE_FLOW_ITEM_TYPE_ETH:
2685                 retval = sizeof(struct rte_flow_item_eth);
2686                 break;
2687         case RTE_FLOW_ITEM_TYPE_VLAN:
2688                 retval = sizeof(struct rte_flow_item_vlan);
2689                 break;
2690         case RTE_FLOW_ITEM_TYPE_IPV4:
2691                 retval = sizeof(struct rte_flow_item_ipv4);
2692                 break;
2693         case RTE_FLOW_ITEM_TYPE_IPV6:
2694                 retval = sizeof(struct rte_flow_item_ipv6);
2695                 break;
2696         case RTE_FLOW_ITEM_TYPE_UDP:
2697                 retval = sizeof(struct rte_flow_item_udp);
2698                 break;
2699         case RTE_FLOW_ITEM_TYPE_TCP:
2700                 retval = sizeof(struct rte_flow_item_tcp);
2701                 break;
2702         case RTE_FLOW_ITEM_TYPE_VXLAN:
2703                 retval = sizeof(struct rte_flow_item_vxlan);
2704                 break;
2705         case RTE_FLOW_ITEM_TYPE_GRE:
2706                 retval = sizeof(struct rte_flow_item_gre);
2707                 break;
2708         case RTE_FLOW_ITEM_TYPE_NVGRE:
2709                 retval = sizeof(struct rte_flow_item_nvgre);
2710                 break;
2711         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2712                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2713                 break;
2714         case RTE_FLOW_ITEM_TYPE_MPLS:
2715                 retval = sizeof(struct rte_flow_item_mpls);
2716                 break;
2717         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2718         default:
2719                 retval = 0;
2720                 break;
2721         }
2722         return retval;
2723 }
2724
2725 #define MLX5_ENCAP_IPV4_VERSION         0x40
2726 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2727 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2728 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2729 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2730 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2731 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2732
2733 /**
2734  * Convert the encap action data from list of rte_flow_item to raw buffer
2735  *
2736  * @param[in] items
2737  *   Pointer to rte_flow_item objects list.
2738  * @param[out] buf
2739  *   Pointer to the output buffer.
2740  * @param[out] size
2741  *   Pointer to the output buffer size.
2742  * @param[out] error
2743  *   Pointer to the error structure.
2744  *
2745  * @return
2746  *   0 on success, a negative errno value otherwise and rte_errno is set.
2747  */
2748 static int
2749 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2750                            size_t *size, struct rte_flow_error *error)
2751 {
2752         struct rte_ether_hdr *eth = NULL;
2753         struct rte_vlan_hdr *vlan = NULL;
2754         struct rte_ipv4_hdr *ipv4 = NULL;
2755         struct rte_ipv6_hdr *ipv6 = NULL;
2756         struct rte_udp_hdr *udp = NULL;
2757         struct rte_vxlan_hdr *vxlan = NULL;
2758         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2759         struct rte_gre_hdr *gre = NULL;
2760         size_t len;
2761         size_t temp_size = 0;
2762
2763         if (!items)
2764                 return rte_flow_error_set(error, EINVAL,
2765                                           RTE_FLOW_ERROR_TYPE_ACTION,
2766                                           NULL, "invalid empty data");
2767         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2768                 len = flow_dv_get_item_len(items->type);
2769                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2770                         return rte_flow_error_set(error, EINVAL,
2771                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2772                                                   (void *)items->type,
2773                                                   "items total size is too big"
2774                                                   " for encap action");
2775                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2776                 switch (items->type) {
2777                 case RTE_FLOW_ITEM_TYPE_ETH:
2778                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2779                         break;
2780                 case RTE_FLOW_ITEM_TYPE_VLAN:
2781                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2782                         if (!eth)
2783                                 return rte_flow_error_set(error, EINVAL,
2784                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2785                                                 (void *)items->type,
2786                                                 "eth header not found");
2787                         if (!eth->ether_type)
2788                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2789                         break;
2790                 case RTE_FLOW_ITEM_TYPE_IPV4:
2791                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2792                         if (!vlan && !eth)
2793                                 return rte_flow_error_set(error, EINVAL,
2794                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2795                                                 (void *)items->type,
2796                                                 "neither eth nor vlan"
2797                                                 " header found");
2798                         if (vlan && !vlan->eth_proto)
2799                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2800                         else if (eth && !eth->ether_type)
2801                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2802                         if (!ipv4->version_ihl)
2803                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2804                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2805                         if (!ipv4->time_to_live)
2806                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2807                         break;
2808                 case RTE_FLOW_ITEM_TYPE_IPV6:
2809                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2810                         if (!vlan && !eth)
2811                                 return rte_flow_error_set(error, EINVAL,
2812                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2813                                                 (void *)items->type,
2814                                                 "neither eth nor vlan"
2815                                                 " header found");
2816                         if (vlan && !vlan->eth_proto)
2817                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2818                         else if (eth && !eth->ether_type)
2819                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2820                         if (!ipv6->vtc_flow)
2821                                 ipv6->vtc_flow =
2822                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2823                         if (!ipv6->hop_limits)
2824                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2825                         break;
2826                 case RTE_FLOW_ITEM_TYPE_UDP:
2827                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2828                         if (!ipv4 && !ipv6)
2829                                 return rte_flow_error_set(error, EINVAL,
2830                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2831                                                 (void *)items->type,
2832                                                 "ip header not found");
2833                         if (ipv4 && !ipv4->next_proto_id)
2834                                 ipv4->next_proto_id = IPPROTO_UDP;
2835                         else if (ipv6 && !ipv6->proto)
2836                                 ipv6->proto = IPPROTO_UDP;
2837                         break;
2838                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2839                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2840                         if (!udp)
2841                                 return rte_flow_error_set(error, EINVAL,
2842                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2843                                                 (void *)items->type,
2844                                                 "udp header not found");
2845                         if (!udp->dst_port)
2846                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2847                         if (!vxlan->vx_flags)
2848                                 vxlan->vx_flags =
2849                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2850                         break;
2851                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2852                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2853                         if (!udp)
2854                                 return rte_flow_error_set(error, EINVAL,
2855                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2856                                                 (void *)items->type,
2857                                                 "udp header not found");
2858                         if (!vxlan_gpe->proto)
2859                                 return rte_flow_error_set(error, EINVAL,
2860                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2861                                                 (void *)items->type,
2862                                                 "next protocol not found");
2863                         if (!udp->dst_port)
2864                                 udp->dst_port =
2865                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2866                         if (!vxlan_gpe->vx_flags)
2867                                 vxlan_gpe->vx_flags =
2868                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2869                         break;
2870                 case RTE_FLOW_ITEM_TYPE_GRE:
2871                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2872                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2873                         if (!gre->proto)
2874                                 return rte_flow_error_set(error, EINVAL,
2875                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2876                                                 (void *)items->type,
2877                                                 "next protocol not found");
2878                         if (!ipv4 && !ipv6)
2879                                 return rte_flow_error_set(error, EINVAL,
2880                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2881                                                 (void *)items->type,
2882                                                 "ip header not found");
2883                         if (ipv4 && !ipv4->next_proto_id)
2884                                 ipv4->next_proto_id = IPPROTO_GRE;
2885                         else if (ipv6 && !ipv6->proto)
2886                                 ipv6->proto = IPPROTO_GRE;
2887                         break;
2888                 case RTE_FLOW_ITEM_TYPE_VOID:
2889                         break;
2890                 default:
2891                         return rte_flow_error_set(error, EINVAL,
2892                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2893                                                   (void *)items->type,
2894                                                   "unsupported item type");
2895                         break;
2896                 }
2897                 temp_size += len;
2898         }
2899         *size = temp_size;
2900         return 0;
2901 }
2902
2903 static int
2904 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2905 {
2906         struct rte_ether_hdr *eth = NULL;
2907         struct rte_vlan_hdr *vlan = NULL;
2908         struct rte_ipv6_hdr *ipv6 = NULL;
2909         struct rte_udp_hdr *udp = NULL;
2910         char *next_hdr;
2911         uint16_t proto;
2912
2913         eth = (struct rte_ether_hdr *)data;
2914         next_hdr = (char *)(eth + 1);
2915         proto = RTE_BE16(eth->ether_type);
2916
2917         /* VLAN skipping */
2918         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2919                 vlan = (struct rte_vlan_hdr *)next_hdr;
2920                 proto = RTE_BE16(vlan->eth_proto);
2921                 next_hdr += sizeof(struct rte_vlan_hdr);
2922         }
2923
2924         /* HW calculates IPv4 csum. no need to proceed */
2925         if (proto == RTE_ETHER_TYPE_IPV4)
2926                 return 0;
2927
2928         /* non IPv4/IPv6 header. not supported */
2929         if (proto != RTE_ETHER_TYPE_IPV6) {
2930                 return rte_flow_error_set(error, ENOTSUP,
2931                                           RTE_FLOW_ERROR_TYPE_ACTION,
2932                                           NULL, "Cannot offload non IPv4/IPv6");
2933         }
2934
2935         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2936
2937         /* ignore non UDP */
2938         if (ipv6->proto != IPPROTO_UDP)
2939                 return 0;
2940
2941         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2942         udp->dgram_cksum = 0;
2943
2944         return 0;
2945 }
2946
2947 /**
2948  * Convert L2 encap action to DV specification.
2949  *
2950  * @param[in] dev
2951  *   Pointer to rte_eth_dev structure.
2952  * @param[in] action
2953  *   Pointer to action structure.
2954  * @param[in, out] dev_flow
2955  *   Pointer to the mlx5_flow.
2956  * @param[in] transfer
2957  *   Mark if the flow is E-Switch flow.
2958  * @param[out] error
2959  *   Pointer to the error structure.
2960  *
2961  * @return
2962  *   0 on success, a negative errno value otherwise and rte_errno is set.
2963  */
2964 static int
2965 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2966                                const struct rte_flow_action *action,
2967                                struct mlx5_flow *dev_flow,
2968                                uint8_t transfer,
2969                                struct rte_flow_error *error)
2970 {
2971         const struct rte_flow_item *encap_data;
2972         const struct rte_flow_action_raw_encap *raw_encap_data;
2973         struct mlx5_flow_dv_encap_decap_resource res = {
2974                 .reformat_type =
2975                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2976                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2977                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2978         };
2979
2980         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2981                 raw_encap_data =
2982                         (const struct rte_flow_action_raw_encap *)action->conf;
2983                 res.size = raw_encap_data->size;
2984                 memcpy(res.buf, raw_encap_data->data, res.size);
2985         } else {
2986                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2987                         encap_data =
2988                                 ((const struct rte_flow_action_vxlan_encap *)
2989                                                 action->conf)->definition;
2990                 else
2991                         encap_data =
2992                                 ((const struct rte_flow_action_nvgre_encap *)
2993                                                 action->conf)->definition;
2994                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2995                                                &res.size, error))
2996                         return -rte_errno;
2997         }
2998         if (flow_dv_zero_encap_udp_csum(res.buf, error))
2999                 return -rte_errno;
3000         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3001                 return rte_flow_error_set(error, EINVAL,
3002                                           RTE_FLOW_ERROR_TYPE_ACTION,
3003                                           NULL, "can't create L2 encap action");
3004         return 0;
3005 }
3006
3007 /**
3008  * Convert L2 decap action to DV specification.
3009  *
3010  * @param[in] dev
3011  *   Pointer to rte_eth_dev structure.
3012  * @param[in, out] dev_flow
3013  *   Pointer to the mlx5_flow.
3014  * @param[in] transfer
3015  *   Mark if the flow is E-Switch flow.
3016  * @param[out] error
3017  *   Pointer to the error structure.
3018  *
3019  * @return
3020  *   0 on success, a negative errno value otherwise and rte_errno is set.
3021  */
3022 static int
3023 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
3024                                struct mlx5_flow *dev_flow,
3025                                uint8_t transfer,
3026                                struct rte_flow_error *error)
3027 {
3028         struct mlx5_flow_dv_encap_decap_resource res = {
3029                 .size = 0,
3030                 .reformat_type =
3031                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
3032                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
3033                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
3034         };
3035
3036         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3037                 return rte_flow_error_set(error, EINVAL,
3038                                           RTE_FLOW_ERROR_TYPE_ACTION,
3039                                           NULL, "can't create L2 decap action");
3040         return 0;
3041 }
3042
3043 /**
3044  * Convert raw decap/encap (L3 tunnel) action to DV specification.
3045  *
3046  * @param[in] dev
3047  *   Pointer to rte_eth_dev structure.
3048  * @param[in] action
3049  *   Pointer to action structure.
3050  * @param[in, out] dev_flow
3051  *   Pointer to the mlx5_flow.
3052  * @param[in] attr
3053  *   Pointer to the flow attributes.
3054  * @param[out] error
3055  *   Pointer to the error structure.
3056  *
3057  * @return
3058  *   0 on success, a negative errno value otherwise and rte_errno is set.
3059  */
3060 static int
3061 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
3062                                 const struct rte_flow_action *action,
3063                                 struct mlx5_flow *dev_flow,
3064                                 const struct rte_flow_attr *attr,
3065                                 struct rte_flow_error *error)
3066 {
3067         const struct rte_flow_action_raw_encap *encap_data;
3068         struct mlx5_flow_dv_encap_decap_resource res;
3069
3070         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3071         res.size = encap_data->size;
3072         memcpy(res.buf, encap_data->data, res.size);
3073         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3074                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3075                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3076         if (attr->transfer)
3077                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3078         else
3079                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3080                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3081         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3082                 return rte_flow_error_set(error, EINVAL,
3083                                           RTE_FLOW_ERROR_TYPE_ACTION,
3084                                           NULL, "can't create encap action");
3085         return 0;
3086 }
3087
3088 /**
3089  * Create action push VLAN.
3090  *
3091  * @param[in] dev
3092  *   Pointer to rte_eth_dev structure.
3093  * @param[in] attr
3094  *   Pointer to the flow attributes.
3095  * @param[in] vlan
3096  *   Pointer to the vlan to push to the Ethernet header.
3097  * @param[in, out] dev_flow
3098  *   Pointer to the mlx5_flow.
3099  * @param[out] error
3100  *   Pointer to the error structure.
3101  *
3102  * @return
3103  *   0 on success, a negative errno value otherwise and rte_errno is set.
3104  */
3105 static int
3106 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3107                                 const struct rte_flow_attr *attr,
3108                                 const struct rte_vlan_hdr *vlan,
3109                                 struct mlx5_flow *dev_flow,
3110                                 struct rte_flow_error *error)
3111 {
3112         struct mlx5_flow_dv_push_vlan_action_resource res;
3113
3114         res.vlan_tag =
3115                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3116                                  vlan->vlan_tci);
3117         if (attr->transfer)
3118                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3119         else
3120                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3121                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3122         return flow_dv_push_vlan_action_resource_register
3123                                             (dev, &res, dev_flow, error);
3124 }
3125
3126 /**
3127  * Validate the modify-header actions.
3128  *
3129  * @param[in] action_flags
3130  *   Holds the actions detected until now.
3131  * @param[in] action
3132  *   Pointer to the modify action.
3133  * @param[out] error
3134  *   Pointer to error structure.
3135  *
3136  * @return
3137  *   0 on success, a negative errno value otherwise and rte_errno is set.
3138  */
3139 static int
3140 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3141                                    const struct rte_flow_action *action,
3142                                    struct rte_flow_error *error)
3143 {
3144         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3145                 return rte_flow_error_set(error, EINVAL,
3146                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3147                                           NULL, "action configuration not set");
3148         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3149                 return rte_flow_error_set(error, EINVAL,
3150                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3151                                           "can't have encap action before"
3152                                           " modify action");
3153         return 0;
3154 }
3155
3156 /**
3157  * Validate the modify-header MAC address actions.
3158  *
3159  * @param[in] action_flags
3160  *   Holds the actions detected until now.
3161  * @param[in] action
3162  *   Pointer to the modify action.
3163  * @param[in] item_flags
3164  *   Holds the items detected.
3165  * @param[out] error
3166  *   Pointer to error structure.
3167  *
3168  * @return
3169  *   0 on success, a negative errno value otherwise and rte_errno is set.
3170  */
3171 static int
3172 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3173                                    const struct rte_flow_action *action,
3174                                    const uint64_t item_flags,
3175                                    struct rte_flow_error *error)
3176 {
3177         int ret = 0;
3178
3179         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3180         if (!ret) {
3181                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3182                         return rte_flow_error_set(error, EINVAL,
3183                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3184                                                   NULL,
3185                                                   "no L2 item in pattern");
3186         }
3187         return ret;
3188 }
3189
3190 /**
3191  * Validate the modify-header IPv4 address actions.
3192  *
3193  * @param[in] action_flags
3194  *   Holds the actions detected until now.
3195  * @param[in] action
3196  *   Pointer to the modify action.
3197  * @param[in] item_flags
3198  *   Holds the items detected.
3199  * @param[out] error
3200  *   Pointer to error structure.
3201  *
3202  * @return
3203  *   0 on success, a negative errno value otherwise and rte_errno is set.
3204  */
3205 static int
3206 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3207                                     const struct rte_flow_action *action,
3208                                     const uint64_t item_flags,
3209                                     struct rte_flow_error *error)
3210 {
3211         int ret = 0;
3212         uint64_t layer;
3213
3214         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3215         if (!ret) {
3216                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3217                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3218                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3219                 if (!(item_flags & layer))
3220                         return rte_flow_error_set(error, EINVAL,
3221                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3222                                                   NULL,
3223                                                   "no ipv4 item in pattern");
3224         }
3225         return ret;
3226 }
3227
3228 /**
3229  * Validate the modify-header IPv6 address actions.
3230  *
3231  * @param[in] action_flags
3232  *   Holds the actions detected until now.
3233  * @param[in] action
3234  *   Pointer to the modify action.
3235  * @param[in] item_flags
3236  *   Holds the items detected.
3237  * @param[out] error
3238  *   Pointer to error structure.
3239  *
3240  * @return
3241  *   0 on success, a negative errno value otherwise and rte_errno is set.
3242  */
3243 static int
3244 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3245                                     const struct rte_flow_action *action,
3246                                     const uint64_t item_flags,
3247                                     struct rte_flow_error *error)
3248 {
3249         int ret = 0;
3250         uint64_t layer;
3251
3252         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3253         if (!ret) {
3254                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3255                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3256                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3257                 if (!(item_flags & layer))
3258                         return rte_flow_error_set(error, EINVAL,
3259                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3260                                                   NULL,
3261                                                   "no ipv6 item in pattern");
3262         }
3263         return ret;
3264 }
3265
3266 /**
3267  * Validate the modify-header TP actions.
3268  *
3269  * @param[in] action_flags
3270  *   Holds the actions detected until now.
3271  * @param[in] action
3272  *   Pointer to the modify action.
3273  * @param[in] item_flags
3274  *   Holds the items detected.
3275  * @param[out] error
3276  *   Pointer to error structure.
3277  *
3278  * @return
3279  *   0 on success, a negative errno value otherwise and rte_errno is set.
3280  */
3281 static int
3282 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3283                                   const struct rte_flow_action *action,
3284                                   const uint64_t item_flags,
3285                                   struct rte_flow_error *error)
3286 {
3287         int ret = 0;
3288         uint64_t layer;
3289
3290         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3291         if (!ret) {
3292                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3293                                  MLX5_FLOW_LAYER_INNER_L4 :
3294                                  MLX5_FLOW_LAYER_OUTER_L4;
3295                 if (!(item_flags & layer))
3296                         return rte_flow_error_set(error, EINVAL,
3297                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3298                                                   NULL, "no transport layer "
3299                                                   "in pattern");
3300         }
3301         return ret;
3302 }
3303
3304 /**
3305  * Validate the modify-header actions of increment/decrement
3306  * TCP Sequence-number.
3307  *
3308  * @param[in] action_flags
3309  *   Holds the actions detected until now.
3310  * @param[in] action
3311  *   Pointer to the modify action.
3312  * @param[in] item_flags
3313  *   Holds the items detected.
3314  * @param[out] error
3315  *   Pointer to error structure.
3316  *
3317  * @return
3318  *   0 on success, a negative errno value otherwise and rte_errno is set.
3319  */
3320 static int
3321 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3322                                        const struct rte_flow_action *action,
3323                                        const uint64_t item_flags,
3324                                        struct rte_flow_error *error)
3325 {
3326         int ret = 0;
3327         uint64_t layer;
3328
3329         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3330         if (!ret) {
3331                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3332                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3333                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3334                 if (!(item_flags & layer))
3335                         return rte_flow_error_set(error, EINVAL,
3336                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3337                                                   NULL, "no TCP item in"
3338                                                   " pattern");
3339                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3340                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3341                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3342                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3343                         return rte_flow_error_set(error, EINVAL,
3344                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3345                                                   NULL,
3346                                                   "cannot decrease and increase"
3347                                                   " TCP sequence number"
3348                                                   " at the same time");
3349         }
3350         return ret;
3351 }
3352
3353 /**
3354  * Validate the modify-header actions of increment/decrement
3355  * TCP Acknowledgment number.
3356  *
3357  * @param[in] action_flags
3358  *   Holds the actions detected until now.
3359  * @param[in] action
3360  *   Pointer to the modify action.
3361  * @param[in] item_flags
3362  *   Holds the items detected.
3363  * @param[out] error
3364  *   Pointer to error structure.
3365  *
3366  * @return
3367  *   0 on success, a negative errno value otherwise and rte_errno is set.
3368  */
3369 static int
3370 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3371                                        const struct rte_flow_action *action,
3372                                        const uint64_t item_flags,
3373                                        struct rte_flow_error *error)
3374 {
3375         int ret = 0;
3376         uint64_t layer;
3377
3378         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3379         if (!ret) {
3380                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3381                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3382                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3383                 if (!(item_flags & layer))
3384                         return rte_flow_error_set(error, EINVAL,
3385                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3386                                                   NULL, "no TCP item in"
3387                                                   " pattern");
3388                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3389                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3390                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3391                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3392                         return rte_flow_error_set(error, EINVAL,
3393                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3394                                                   NULL,
3395                                                   "cannot decrease and increase"
3396                                                   " TCP acknowledgment number"
3397                                                   " at the same time");
3398         }
3399         return ret;
3400 }
3401
3402 /**
3403  * Validate the modify-header TTL actions.
3404  *
3405  * @param[in] action_flags
3406  *   Holds the actions detected until now.
3407  * @param[in] action
3408  *   Pointer to the modify action.
3409  * @param[in] item_flags
3410  *   Holds the items detected.
3411  * @param[out] error
3412  *   Pointer to error structure.
3413  *
3414  * @return
3415  *   0 on success, a negative errno value otherwise and rte_errno is set.
3416  */
3417 static int
3418 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3419                                    const struct rte_flow_action *action,
3420                                    const uint64_t item_flags,
3421                                    struct rte_flow_error *error)
3422 {
3423         int ret = 0;
3424         uint64_t layer;
3425
3426         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3427         if (!ret) {
3428                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3429                                  MLX5_FLOW_LAYER_INNER_L3 :
3430                                  MLX5_FLOW_LAYER_OUTER_L3;
3431                 if (!(item_flags & layer))
3432                         return rte_flow_error_set(error, EINVAL,
3433                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3434                                                   NULL,
3435                                                   "no IP protocol in pattern");
3436         }
3437         return ret;
3438 }
3439
3440 /**
3441  * Validate jump action.
3442  *
3443  * @param[in] action
3444  *   Pointer to the jump action.
3445  * @param[in] action_flags
3446  *   Holds the actions detected until now.
3447  * @param[in] attributes
3448  *   Pointer to flow attributes
3449  * @param[in] external
3450  *   Action belongs to flow rule created by request external to PMD.
3451  * @param[out] error
3452  *   Pointer to error structure.
3453  *
3454  * @return
3455  *   0 on success, a negative errno value otherwise and rte_errno is set.
3456  */
3457 static int
3458 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3459                              uint64_t action_flags,
3460                              const struct rte_flow_attr *attributes,
3461                              bool external, struct rte_flow_error *error)
3462 {
3463         uint32_t target_group, table;
3464         int ret = 0;
3465
3466         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3467                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3468                 return rte_flow_error_set(error, EINVAL,
3469                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3470                                           "can't have 2 fate actions in"
3471                                           " same flow");
3472         if (action_flags & MLX5_FLOW_ACTION_METER)
3473                 return rte_flow_error_set(error, ENOTSUP,
3474                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3475                                           "jump with meter not support");
3476         if (!action->conf)
3477                 return rte_flow_error_set(error, EINVAL,
3478                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3479                                           NULL, "action configuration not set");
3480         target_group =
3481                 ((const struct rte_flow_action_jump *)action->conf)->group;
3482         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3483                                        true, &table, error);
3484         if (ret)
3485                 return ret;
3486         if (attributes->group == target_group)
3487                 return rte_flow_error_set(error, EINVAL,
3488                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3489                                           "target group must be other than"
3490                                           " the current flow group");
3491         return 0;
3492 }
3493
3494 /*
3495  * Validate the port_id action.
3496  *
3497  * @param[in] dev
3498  *   Pointer to rte_eth_dev structure.
3499  * @param[in] action_flags
3500  *   Bit-fields that holds the actions detected until now.
3501  * @param[in] action
3502  *   Port_id RTE action structure.
3503  * @param[in] attr
3504  *   Attributes of flow that includes this action.
3505  * @param[out] error
3506  *   Pointer to error structure.
3507  *
3508  * @return
3509  *   0 on success, a negative errno value otherwise and rte_errno is set.
3510  */
3511 static int
3512 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3513                                 uint64_t action_flags,
3514                                 const struct rte_flow_action *action,
3515                                 const struct rte_flow_attr *attr,
3516                                 struct rte_flow_error *error)
3517 {
3518         const struct rte_flow_action_port_id *port_id;
3519         struct mlx5_priv *act_priv;
3520         struct mlx5_priv *dev_priv;
3521         uint16_t port;
3522
3523         if (!attr->transfer)
3524                 return rte_flow_error_set(error, ENOTSUP,
3525                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3526                                           NULL,
3527                                           "port id action is valid in transfer"
3528                                           " mode only");
3529         if (!action || !action->conf)
3530                 return rte_flow_error_set(error, ENOTSUP,
3531                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3532                                           NULL,
3533                                           "port id action parameters must be"
3534                                           " specified");
3535         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3536                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3537                 return rte_flow_error_set(error, EINVAL,
3538                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3539                                           "can have only one fate actions in"
3540                                           " a flow");
3541         dev_priv = mlx5_dev_to_eswitch_info(dev);
3542         if (!dev_priv)
3543                 return rte_flow_error_set(error, rte_errno,
3544                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3545                                           NULL,
3546                                           "failed to obtain E-Switch info");
3547         port_id = action->conf;
3548         port = port_id->original ? dev->data->port_id : port_id->id;
3549         act_priv = mlx5_port_to_eswitch_info(port, false);
3550         if (!act_priv)
3551                 return rte_flow_error_set
3552                                 (error, rte_errno,
3553                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3554                                  "failed to obtain E-Switch port id for port");
3555         if (act_priv->domain_id != dev_priv->domain_id)
3556                 return rte_flow_error_set
3557                                 (error, EINVAL,
3558                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3559                                  "port does not belong to"
3560                                  " E-Switch being configured");
3561         return 0;
3562 }
3563
3564 /**
3565  * Get the maximum number of modify header actions.
3566  *
3567  * @param dev
3568  *   Pointer to rte_eth_dev structure.
3569  * @param flags
3570  *   Flags bits to check if root level.
3571  *
3572  * @return
3573  *   Max number of modify header actions device can support.
3574  */
3575 static unsigned int
3576 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3577 {
3578         /*
3579          * There's no way to directly query the max cap. Although it has to be
3580          * acquried by iterative trial, it is a safe assumption that more
3581          * actions are supported by FW if extensive metadata register is
3582          * supported. (Only in the root table)
3583          */
3584         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3585                 return MLX5_MAX_MODIFY_NUM;
3586         else
3587                 return mlx5_flow_ext_mreg_supported(dev) ?
3588                                         MLX5_ROOT_TBL_MODIFY_NUM :
3589                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3590 }
3591
3592 /**
3593  * Validate the meter action.
3594  *
3595  * @param[in] dev
3596  *   Pointer to rte_eth_dev structure.
3597  * @param[in] action_flags
3598  *   Bit-fields that holds the actions detected until now.
3599  * @param[in] action
3600  *   Pointer to the meter action.
3601  * @param[in] attr
3602  *   Attributes of flow that includes this action.
3603  * @param[out] error
3604  *   Pointer to error structure.
3605  *
3606  * @return
3607  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3608  */
3609 static int
3610 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3611                                 uint64_t action_flags,
3612                                 const struct rte_flow_action *action,
3613                                 const struct rte_flow_attr *attr,
3614                                 struct rte_flow_error *error)
3615 {
3616         struct mlx5_priv *priv = dev->data->dev_private;
3617         const struct rte_flow_action_meter *am = action->conf;
3618         struct mlx5_flow_meter *fm;
3619
3620         if (!am)
3621                 return rte_flow_error_set(error, EINVAL,
3622                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3623                                           "meter action conf is NULL");
3624
3625         if (action_flags & MLX5_FLOW_ACTION_METER)
3626                 return rte_flow_error_set(error, ENOTSUP,
3627                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3628                                           "meter chaining not support");
3629         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3630                 return rte_flow_error_set(error, ENOTSUP,
3631                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3632                                           "meter with jump not support");
3633         if (!priv->mtr_en)
3634                 return rte_flow_error_set(error, ENOTSUP,
3635                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3636                                           NULL,
3637                                           "meter action not supported");
3638         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3639         if (!fm)
3640                 return rte_flow_error_set(error, EINVAL,
3641                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3642                                           "Meter not found");
3643         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3644               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3645               (!fm->attr.egress && !attr->egress && attr->ingress))))
3646                 return rte_flow_error_set(error, EINVAL,
3647                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3648                                           "Flow attributes are either invalid "
3649                                           "or have a conflict with current "
3650                                           "meter attributes");
3651         return 0;
3652 }
3653
3654 /**
3655  * Validate the modify-header IPv4 DSCP actions.
3656  *
3657  * @param[in] action_flags
3658  *   Holds the actions detected until now.
3659  * @param[in] action
3660  *   Pointer to the modify action.
3661  * @param[in] item_flags
3662  *   Holds the items detected.
3663  * @param[out] error
3664  *   Pointer to error structure.
3665  *
3666  * @return
3667  *   0 on success, a negative errno value otherwise and rte_errno is set.
3668  */
3669 static int
3670 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3671                                          const struct rte_flow_action *action,
3672                                          const uint64_t item_flags,
3673                                          struct rte_flow_error *error)
3674 {
3675         int ret = 0;
3676
3677         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3678         if (!ret) {
3679                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3680                         return rte_flow_error_set(error, EINVAL,
3681                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3682                                                   NULL,
3683                                                   "no ipv4 item in pattern");
3684         }
3685         return ret;
3686 }
3687
3688 /**
3689  * Validate the modify-header IPv6 DSCP actions.
3690  *
3691  * @param[in] action_flags
3692  *   Holds the actions detected until now.
3693  * @param[in] action
3694  *   Pointer to the modify action.
3695  * @param[in] item_flags
3696  *   Holds the items detected.
3697  * @param[out] error
3698  *   Pointer to error structure.
3699  *
3700  * @return
3701  *   0 on success, a negative errno value otherwise and rte_errno is set.
3702  */
3703 static int
3704 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3705                                          const struct rte_flow_action *action,
3706                                          const uint64_t item_flags,
3707                                          struct rte_flow_error *error)
3708 {
3709         int ret = 0;
3710
3711         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3712         if (!ret) {
3713                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3714                         return rte_flow_error_set(error, EINVAL,
3715                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3716                                                   NULL,
3717                                                   "no ipv6 item in pattern");
3718         }
3719         return ret;
3720 }
3721
3722 /**
3723  * Find existing modify-header resource or create and register a new one.
3724  *
3725  * @param dev[in, out]
3726  *   Pointer to rte_eth_dev structure.
3727  * @param[in, out] resource
3728  *   Pointer to modify-header resource.
3729  * @parm[in, out] dev_flow
3730  *   Pointer to the dev_flow.
3731  * @param[out] error
3732  *   pointer to error structure.
3733  *
3734  * @return
3735  *   0 on success otherwise -errno and errno is set.
3736  */
3737 static int
3738 flow_dv_modify_hdr_resource_register
3739                         (struct rte_eth_dev *dev,
3740                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3741                          struct mlx5_flow *dev_flow,
3742                          struct rte_flow_error *error)
3743 {
3744         struct mlx5_priv *priv = dev->data->dev_private;
3745         struct mlx5_ibv_shared *sh = priv->sh;
3746         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3747         struct mlx5dv_dr_domain *ns;
3748         uint32_t actions_len;
3749
3750         resource->flags =
3751                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3752         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3753                                     resource->flags))
3754                 return rte_flow_error_set(error, EOVERFLOW,
3755                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3756                                           "too many modify header items");
3757         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3758                 ns = sh->fdb_domain;
3759         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3760                 ns = sh->tx_domain;
3761         else
3762                 ns = sh->rx_domain;
3763         /* Lookup a matching resource from cache. */
3764         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3765         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3766                 if (resource->ft_type == cache_resource->ft_type &&
3767                     resource->actions_num == cache_resource->actions_num &&
3768                     resource->flags == cache_resource->flags &&
3769                     !memcmp((const void *)resource->actions,
3770                             (const void *)cache_resource->actions,
3771                             actions_len)) {
3772                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3773                                 (void *)cache_resource,
3774                                 rte_atomic32_read(&cache_resource->refcnt));
3775                         rte_atomic32_inc(&cache_resource->refcnt);
3776                         dev_flow->dv.modify_hdr = cache_resource;
3777                         return 0;
3778                 }
3779         }
3780         /* Register new modify-header resource. */
3781         cache_resource = rte_calloc(__func__, 1,
3782                                     sizeof(*cache_resource) + actions_len, 0);
3783         if (!cache_resource)
3784                 return rte_flow_error_set(error, ENOMEM,
3785                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3786                                           "cannot allocate resource memory");
3787         *cache_resource = *resource;
3788         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3789         cache_resource->verbs_action =
3790                 mlx5_glue->dv_create_flow_action_modify_header
3791                                         (sh->ctx, cache_resource->ft_type, ns,
3792                                          cache_resource->flags, actions_len,
3793                                          (uint64_t *)cache_resource->actions);
3794         if (!cache_resource->verbs_action) {
3795                 rte_free(cache_resource);
3796                 return rte_flow_error_set(error, ENOMEM,
3797                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3798                                           NULL, "cannot create action");
3799         }
3800         rte_atomic32_init(&cache_resource->refcnt);
3801         rte_atomic32_inc(&cache_resource->refcnt);
3802         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3803         dev_flow->dv.modify_hdr = cache_resource;
3804         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3805                 (void *)cache_resource,
3806                 rte_atomic32_read(&cache_resource->refcnt));
3807         return 0;
3808 }
3809
3810 #define MLX5_CNT_CONTAINER_RESIZE 64
3811
3812 /**
3813  * Get or create a flow counter.
3814  *
3815  * @param[in] dev
3816  *   Pointer to the Ethernet device structure.
3817  * @param[in] shared
3818  *   Indicate if this counter is shared with other flows.
3819  * @param[in] id
3820  *   Counter identifier.
3821  *
3822  * @return
3823  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3824  */
3825 static struct mlx5_flow_counter *
3826 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3827                                uint32_t id)
3828 {
3829         struct mlx5_priv *priv = dev->data->dev_private;
3830         struct mlx5_flow_counter *cnt = NULL;
3831         struct mlx5_devx_obj *dcs = NULL;
3832
3833         if (!priv->config.devx) {
3834                 rte_errno = ENOTSUP;
3835                 return NULL;
3836         }
3837         if (shared) {
3838                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3839                         if (cnt->shared && cnt->id == id) {
3840                                 cnt->ref_cnt++;
3841                                 return cnt;
3842                         }
3843                 }
3844         }
3845         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3846         if (!dcs)
3847                 return NULL;
3848         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3849         if (!cnt) {
3850                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3851                 rte_errno = ENOMEM;
3852                 return NULL;
3853         }
3854         struct mlx5_flow_counter tmpl = {
3855                 .shared = shared,
3856                 .ref_cnt = 1,
3857                 .id = id,
3858                 .dcs = dcs,
3859         };
3860         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3861         if (!tmpl.action) {
3862                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3863                 rte_errno = errno;
3864                 rte_free(cnt);
3865                 return NULL;
3866         }
3867         *cnt = tmpl;
3868         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3869         return cnt;
3870 }
3871
3872 /**
3873  * Release a flow counter.
3874  *
3875  * @param[in] dev
3876  *   Pointer to the Ethernet device structure.
3877  * @param[in] counter
3878  *   Pointer to the counter handler.
3879  */
3880 static void
3881 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3882                                  struct mlx5_flow_counter *counter)
3883 {
3884         struct mlx5_priv *priv = dev->data->dev_private;
3885
3886         if (!counter)
3887                 return;
3888         if (--counter->ref_cnt == 0) {
3889                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3890                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3891                 rte_free(counter);
3892         }
3893 }
3894
3895 /**
3896  * Query a devx flow counter.
3897  *
3898  * @param[in] dev
3899  *   Pointer to the Ethernet device structure.
3900  * @param[in] cnt
3901  *   Pointer to the flow counter.
3902  * @param[out] pkts
3903  *   The statistics value of packets.
3904  * @param[out] bytes
3905  *   The statistics value of bytes.
3906  *
3907  * @return
3908  *   0 on success, otherwise a negative errno value and rte_errno is set.
3909  */
3910 static inline int
3911 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3912                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3913                      uint64_t *bytes)
3914 {
3915         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3916                                                 0, NULL, NULL, 0);
3917 }
3918
3919 /**
3920  * Get a pool by a counter.
3921  *
3922  * @param[in] cnt
3923  *   Pointer to the counter.
3924  *
3925  * @return
3926  *   The counter pool.
3927  */
3928 static struct mlx5_flow_counter_pool *
3929 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3930 {
3931         if (!cnt->batch) {
3932                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3933                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3934         }
3935         return cnt->pool;
3936 }
3937
3938 /**
3939  * Get a pool by devx counter ID.
3940  *
3941  * @param[in] cont
3942  *   Pointer to the counter container.
3943  * @param[in] id
3944  *   The counter devx ID.
3945  *
3946  * @return
3947  *   The counter pool pointer if exists, NULL otherwise,
3948  */
3949 static struct mlx5_flow_counter_pool *
3950 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3951 {
3952         struct mlx5_flow_counter_pool *pool;
3953
3954         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3955                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3956                                 MLX5_COUNTERS_PER_POOL;
3957
3958                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3959                         return pool;
3960         };
3961         return NULL;
3962 }
3963
3964 /**
3965  * Allocate a new memory for the counter values wrapped by all the needed
3966  * management.
3967  *
3968  * @param[in] dev
3969  *   Pointer to the Ethernet device structure.
3970  * @param[in] raws_n
3971  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3972  *
3973  * @return
3974  *   The new memory management pointer on success, otherwise NULL and rte_errno
3975  *   is set.
3976  */
3977 static struct mlx5_counter_stats_mem_mng *
3978 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3979 {
3980         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3981                                         (dev->data->dev_private))->sh;
3982         struct mlx5_devx_mkey_attr mkey_attr;
3983         struct mlx5_counter_stats_mem_mng *mem_mng;
3984         volatile struct flow_counter_stats *raw_data;
3985         int size = (sizeof(struct flow_counter_stats) *
3986                         MLX5_COUNTERS_PER_POOL +
3987                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3988                         sizeof(struct mlx5_counter_stats_mem_mng);
3989         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3990         int i;
3991
3992         if (!mem) {
3993                 rte_errno = ENOMEM;
3994                 return NULL;
3995         }
3996         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3997         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3998         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3999                                                  IBV_ACCESS_LOCAL_WRITE);
4000         if (!mem_mng->umem) {
4001                 rte_errno = errno;
4002                 rte_free(mem);
4003                 return NULL;
4004         }
4005         mkey_attr.addr = (uintptr_t)mem;
4006         mkey_attr.size = size;
4007         mkey_attr.umem_id = mem_mng->umem->umem_id;
4008         mkey_attr.pd = sh->pdn;
4009         mkey_attr.log_entity_size = 0;
4010         mkey_attr.pg_access = 0;
4011         mkey_attr.klm_array = NULL;
4012         mkey_attr.klm_num = 0;
4013         mkey_attr.relaxed_ordering = 1;
4014         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
4015         if (!mem_mng->dm) {
4016                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
4017                 rte_errno = errno;
4018                 rte_free(mem);
4019                 return NULL;
4020         }
4021         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
4022         raw_data = (volatile struct flow_counter_stats *)mem;
4023         for (i = 0; i < raws_n; ++i) {
4024                 mem_mng->raws[i].mem_mng = mem_mng;
4025                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
4026         }
4027         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
4028         return mem_mng;
4029 }
4030
4031 /**
4032  * Resize a counter container.
4033  *
4034  * @param[in] dev
4035  *   Pointer to the Ethernet device structure.
4036  * @param[in] batch
4037  *   Whether the pool is for counter that was allocated by batch command.
4038  *
4039  * @return
4040  *   The new container pointer on success, otherwise NULL and rte_errno is set.
4041  */
4042 static struct mlx5_pools_container *
4043 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
4044 {
4045         struct mlx5_priv *priv = dev->data->dev_private;
4046         struct mlx5_pools_container *cont =
4047                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
4048         struct mlx5_pools_container *new_cont =
4049                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
4050         struct mlx5_counter_stats_mem_mng *mem_mng;
4051         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
4052         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
4053         int i;
4054
4055         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
4056                 /* The last resize still hasn't detected by the host thread. */
4057                 rte_errno = EAGAIN;
4058                 return NULL;
4059         }
4060         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
4061         if (!new_cont->pools) {
4062                 rte_errno = ENOMEM;
4063                 return NULL;
4064         }
4065         if (cont->n)
4066                 memcpy(new_cont->pools, cont->pools, cont->n *
4067                        sizeof(struct mlx5_flow_counter_pool *));
4068         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
4069                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
4070         if (!mem_mng) {
4071                 rte_free(new_cont->pools);
4072                 return NULL;
4073         }
4074         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
4075                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
4076                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
4077                                  i, next);
4078         new_cont->n = resize;
4079         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
4080         TAILQ_INIT(&new_cont->pool_list);
4081         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
4082         new_cont->init_mem_mng = mem_mng;
4083         rte_cio_wmb();
4084          /* Flip the master container. */
4085         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
4086         return new_cont;
4087 }
4088
4089 /**
4090  * Query a devx flow counter.
4091  *
4092  * @param[in] dev
4093  *   Pointer to the Ethernet device structure.
4094  * @param[in] cnt
4095  *   Pointer to the flow counter.
4096  * @param[out] pkts
4097  *   The statistics value of packets.
4098  * @param[out] bytes
4099  *   The statistics value of bytes.
4100  *
4101  * @return
4102  *   0 on success, otherwise a negative errno value and rte_errno is set.
4103  */
4104 static inline int
4105 _flow_dv_query_count(struct rte_eth_dev *dev,
4106                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
4107                      uint64_t *bytes)
4108 {
4109         struct mlx5_priv *priv = dev->data->dev_private;
4110         struct mlx5_flow_counter_pool *pool =
4111                         flow_dv_counter_pool_get(cnt);
4112         int offset = cnt - &pool->counters_raw[0];
4113
4114         if (priv->counter_fallback)
4115                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4116
4117         rte_spinlock_lock(&pool->sl);
4118         /*
4119          * The single counters allocation may allocate smaller ID than the
4120          * current allocated in parallel to the host reading.
4121          * In this case the new counter values must be reported as 0.
4122          */
4123         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4124                 *pkts = 0;
4125                 *bytes = 0;
4126         } else {
4127                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4128                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4129         }
4130         rte_spinlock_unlock(&pool->sl);
4131         return 0;
4132 }
4133
4134 /**
4135  * Create and initialize a new counter pool.
4136  *
4137  * @param[in] dev
4138  *   Pointer to the Ethernet device structure.
4139  * @param[out] dcs
4140  *   The devX counter handle.
4141  * @param[in] batch
4142  *   Whether the pool is for counter that was allocated by batch command.
4143  *
4144  * @return
4145  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4146  */
4147 static struct mlx5_flow_counter_pool *
4148 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4149                     uint32_t batch)
4150 {
4151         struct mlx5_priv *priv = dev->data->dev_private;
4152         struct mlx5_flow_counter_pool *pool;
4153         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4154                                                                0);
4155         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4156         uint32_t size;
4157
4158         if (cont->n == n_valid) {
4159                 cont = flow_dv_container_resize(dev, batch);
4160                 if (!cont)
4161                         return NULL;
4162         }
4163         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4164                         sizeof(struct mlx5_flow_counter);
4165         pool = rte_calloc(__func__, 1, size, 0);
4166         if (!pool) {
4167                 rte_errno = ENOMEM;
4168                 return NULL;
4169         }
4170         pool->min_dcs = dcs;
4171         pool->raw = cont->init_mem_mng->raws + n_valid %
4172                                                      MLX5_CNT_CONTAINER_RESIZE;
4173         pool->raw_hw = NULL;
4174         rte_spinlock_init(&pool->sl);
4175         /*
4176          * The generation of the new allocated counters in this pool is 0, 2 in
4177          * the pool generation makes all the counters valid for allocation.
4178          */
4179         rte_atomic64_set(&pool->query_gen, 0x2);
4180         TAILQ_INIT(&pool->counters);
4181         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4182         cont->pools[n_valid] = pool;
4183         /* Pool initialization must be updated before host thread access. */
4184         rte_cio_wmb();
4185         rte_atomic16_add(&cont->n_valid, 1);
4186         return pool;
4187 }
4188
4189 /**
4190  * Prepare a new counter and/or a new counter pool.
4191  *
4192  * @param[in] dev
4193  *   Pointer to the Ethernet device structure.
4194  * @param[out] cnt_free
4195  *   Where to put the pointer of a new counter.
4196  * @param[in] batch
4197  *   Whether the pool is for counter that was allocated by batch command.
4198  *
4199  * @return
4200  *   The free counter pool pointer and @p cnt_free is set on success,
4201  *   NULL otherwise and rte_errno is set.
4202  */
4203 static struct mlx5_flow_counter_pool *
4204 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4205                              struct mlx5_flow_counter **cnt_free,
4206                              uint32_t batch)
4207 {
4208         struct mlx5_priv *priv = dev->data->dev_private;
4209         struct mlx5_flow_counter_pool *pool;
4210         struct mlx5_devx_obj *dcs = NULL;
4211         struct mlx5_flow_counter *cnt;
4212         uint32_t i;
4213
4214         if (!batch) {
4215                 /* bulk_bitmap must be 0 for single counter allocation. */
4216                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4217                 if (!dcs)
4218                         return NULL;
4219                 pool = flow_dv_find_pool_by_id
4220                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4221                 if (!pool) {
4222                         pool = flow_dv_pool_create(dev, dcs, batch);
4223                         if (!pool) {
4224                                 mlx5_devx_cmd_destroy(dcs);
4225                                 return NULL;
4226                         }
4227                 } else if (dcs->id < pool->min_dcs->id) {
4228                         rte_atomic64_set(&pool->a64_dcs,
4229                                          (int64_t)(uintptr_t)dcs);
4230                 }
4231                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4232                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4233                 cnt->dcs = dcs;
4234                 *cnt_free = cnt;
4235                 return pool;
4236         }
4237         /* bulk_bitmap is in 128 counters units. */
4238         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4239                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4240         if (!dcs) {
4241                 rte_errno = ENODATA;
4242                 return NULL;
4243         }
4244         pool = flow_dv_pool_create(dev, dcs, batch);
4245         if (!pool) {
4246                 mlx5_devx_cmd_destroy(dcs);
4247                 return NULL;
4248         }
4249         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4250                 cnt = &pool->counters_raw[i];
4251                 cnt->pool = pool;
4252                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4253         }
4254         *cnt_free = &pool->counters_raw[0];
4255         return pool;
4256 }
4257
4258 /**
4259  * Search for existed shared counter.
4260  *
4261  * @param[in] cont
4262  *   Pointer to the relevant counter pool container.
4263  * @param[in] id
4264  *   The shared counter ID to search.
4265  *
4266  * @return
4267  *   NULL if not existed, otherwise pointer to the shared counter.
4268  */
4269 static struct mlx5_flow_counter *
4270 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4271                               uint32_t id)
4272 {
4273         static struct mlx5_flow_counter *cnt;
4274         struct mlx5_flow_counter_pool *pool;
4275         int i;
4276
4277         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4278                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4279                         cnt = &pool->counters_raw[i];
4280                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4281                                 return cnt;
4282                 }
4283         }
4284         return NULL;
4285 }
4286
4287 /**
4288  * Allocate a flow counter.
4289  *
4290  * @param[in] dev
4291  *   Pointer to the Ethernet device structure.
4292  * @param[in] shared
4293  *   Indicate if this counter is shared with other flows.
4294  * @param[in] id
4295  *   Counter identifier.
4296  * @param[in] group
4297  *   Counter flow group.
4298  *
4299  * @return
4300  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4301  */
4302 static struct mlx5_flow_counter *
4303 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4304                       uint16_t group)
4305 {
4306         struct mlx5_priv *priv = dev->data->dev_private;
4307         struct mlx5_flow_counter_pool *pool = NULL;
4308         struct mlx5_flow_counter *cnt_free = NULL;
4309         /*
4310          * Currently group 0 flow counter cannot be assigned to a flow if it is
4311          * not the first one in the batch counter allocation, so it is better
4312          * to allocate counters one by one for these flows in a separate
4313          * container.
4314          * A counter can be shared between different groups so need to take
4315          * shared counters from the single container.
4316          */
4317         uint32_t batch = (group && !shared) ? 1 : 0;
4318         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4319                                                                0);
4320
4321         if (priv->counter_fallback)
4322                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4323         if (!priv->config.devx) {
4324                 rte_errno = ENOTSUP;
4325                 return NULL;
4326         }
4327         if (shared) {
4328                 cnt_free = flow_dv_counter_shared_search(cont, id);
4329                 if (cnt_free) {
4330                         if (cnt_free->ref_cnt + 1 == 0) {
4331                                 rte_errno = E2BIG;
4332                                 return NULL;
4333                         }
4334                         cnt_free->ref_cnt++;
4335                         return cnt_free;
4336                 }
4337         }
4338         /* Pools which has a free counters are in the start. */
4339         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4340                 /*
4341                  * The free counter reset values must be updated between the
4342                  * counter release to the counter allocation, so, at least one
4343                  * query must be done in this time. ensure it by saving the
4344                  * query generation in the release time.
4345                  * The free list is sorted according to the generation - so if
4346                  * the first one is not updated, all the others are not
4347                  * updated too.
4348                  */
4349                 cnt_free = TAILQ_FIRST(&pool->counters);
4350                 if (cnt_free && cnt_free->query_gen + 1 <
4351                     rte_atomic64_read(&pool->query_gen))
4352                         break;
4353                 cnt_free = NULL;
4354         }
4355         if (!cnt_free) {
4356                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4357                 if (!pool)
4358                         return NULL;
4359         }
4360         cnt_free->batch = batch;
4361         /* Create a DV counter action only in the first time usage. */
4362         if (!cnt_free->action) {
4363                 uint16_t offset;
4364                 struct mlx5_devx_obj *dcs;
4365
4366                 if (batch) {
4367                         offset = cnt_free - &pool->counters_raw[0];
4368                         dcs = pool->min_dcs;
4369                 } else {
4370                         offset = 0;
4371                         dcs = cnt_free->dcs;
4372                 }
4373                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4374                                         (dcs->obj, offset);
4375                 if (!cnt_free->action) {
4376                         rte_errno = errno;
4377                         return NULL;
4378                 }
4379         }
4380         /* Update the counter reset values. */
4381         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4382                                  &cnt_free->bytes))
4383                 return NULL;
4384         cnt_free->shared = shared;
4385         cnt_free->ref_cnt = 1;
4386         cnt_free->id = id;
4387         if (!priv->sh->cmng.query_thread_on)
4388                 /* Start the asynchronous batch query by the host thread. */
4389                 mlx5_set_query_alarm(priv->sh);
4390         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4391         if (TAILQ_EMPTY(&pool->counters)) {
4392                 /* Move the pool to the end of the container pool list. */
4393                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4394                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4395         }
4396         return cnt_free;
4397 }
4398
4399 /**
4400  * Release a flow counter.
4401  *
4402  * @param[in] dev
4403  *   Pointer to the Ethernet device structure.
4404  * @param[in] counter
4405  *   Pointer to the counter handler.
4406  */
4407 static void
4408 flow_dv_counter_release(struct rte_eth_dev *dev,
4409                         struct mlx5_flow_counter *counter)
4410 {
4411         struct mlx5_priv *priv = dev->data->dev_private;
4412
4413         if (!counter)
4414                 return;
4415         if (priv->counter_fallback) {
4416                 flow_dv_counter_release_fallback(dev, counter);
4417                 return;
4418         }
4419         if (--counter->ref_cnt == 0) {
4420                 struct mlx5_flow_counter_pool *pool =
4421                                 flow_dv_counter_pool_get(counter);
4422
4423                 /* Put the counter in the end - the last updated one. */
4424                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4425                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4426         }
4427 }
4428
4429 /**
4430  * Verify the @p attributes will be correctly understood by the NIC and store
4431  * them in the @p flow if everything is correct.
4432  *
4433  * @param[in] dev
4434  *   Pointer to dev struct.
4435  * @param[in] attributes
4436  *   Pointer to flow attributes
4437  * @param[in] external
4438  *   This flow rule is created by request external to PMD.
4439  * @param[out] error
4440  *   Pointer to error structure.
4441  *
4442  * @return
4443  *   0 on success, a negative errno value otherwise and rte_errno is set.
4444  */
4445 static int
4446 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4447                             const struct rte_flow_attr *attributes,
4448                             bool external __rte_unused,
4449                             struct rte_flow_error *error)
4450 {
4451         struct mlx5_priv *priv = dev->data->dev_private;
4452         uint32_t priority_max = priv->config.flow_prio - 1;
4453
4454 #ifndef HAVE_MLX5DV_DR
4455         if (attributes->group)
4456                 return rte_flow_error_set(error, ENOTSUP,
4457                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4458                                           NULL,
4459                                           "groups are not supported");
4460 #else
4461         uint32_t table;
4462         int ret;
4463
4464         ret = mlx5_flow_group_to_table(attributes, external,
4465                                        attributes->group, !!priv->fdb_def_rule,
4466                                        &table, error);
4467         if (ret)
4468                 return ret;
4469 #endif
4470         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4471             attributes->priority >= priority_max)
4472                 return rte_flow_error_set(error, ENOTSUP,
4473                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4474                                           NULL,
4475                                           "priority out of range");
4476         if (attributes->transfer) {
4477                 if (!priv->config.dv_esw_en)
4478                         return rte_flow_error_set
4479                                 (error, ENOTSUP,
4480                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4481                                  "E-Switch dr is not supported");
4482                 if (!(priv->representor || priv->master))
4483                         return rte_flow_error_set
4484                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4485                                  NULL, "E-Switch configuration can only be"
4486                                  " done by a master or a representor device");
4487                 if (attributes->egress)
4488                         return rte_flow_error_set
4489                                 (error, ENOTSUP,
4490                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4491                                  "egress is not supported");
4492         }
4493         if (!(attributes->egress ^ attributes->ingress))
4494                 return rte_flow_error_set(error, ENOTSUP,
4495                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4496                                           "must specify exactly one of "
4497                                           "ingress or egress");
4498         return 0;
4499 }
4500
4501 /**
4502  * Internal validation function. For validating both actions and items.
4503  *
4504  * @param[in] dev
4505  *   Pointer to the rte_eth_dev structure.
4506  * @param[in] attr
4507  *   Pointer to the flow attributes.
4508  * @param[in] items
4509  *   Pointer to the list of items.
4510  * @param[in] actions
4511  *   Pointer to the list of actions.
4512  * @param[in] external
4513  *   This flow rule is created by request external to PMD.
4514  * @param[out] error
4515  *   Pointer to the error structure.
4516  *
4517  * @return
4518  *   0 on success, a negative errno value otherwise and rte_errno is set.
4519  */
4520 static int
4521 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4522                  const struct rte_flow_item items[],
4523                  const struct rte_flow_action actions[],
4524                  bool external, struct rte_flow_error *error)
4525 {
4526         int ret;
4527         uint64_t action_flags = 0;
4528         uint64_t item_flags = 0;
4529         uint64_t last_item = 0;
4530         uint8_t next_protocol = 0xff;
4531         uint16_t ether_type = 0;
4532         int actions_n = 0;
4533         uint8_t item_ipv6_proto = 0;
4534         const struct rte_flow_item *gre_item = NULL;
4535         const struct rte_flow_action_raw_decap *decap;
4536         const struct rte_flow_action_raw_encap *encap;
4537         const struct rte_flow_action_rss *rss;
4538         const struct rte_flow_item_tcp nic_tcp_mask = {
4539                 .hdr = {
4540                         .tcp_flags = 0xFF,
4541                         .src_port = RTE_BE16(UINT16_MAX),
4542                         .dst_port = RTE_BE16(UINT16_MAX),
4543                 }
4544         };
4545         const struct rte_flow_item_ipv4 nic_ipv4_mask = {
4546                 .hdr = {
4547                         .src_addr = RTE_BE32(0xffffffff),
4548                         .dst_addr = RTE_BE32(0xffffffff),
4549                         .type_of_service = 0xff,
4550                         .next_proto_id = 0xff,
4551                         .time_to_live = 0xff,
4552                 },
4553         };
4554         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
4555                 .hdr = {
4556                         .src_addr =
4557                         "\xff\xff\xff\xff\xff\xff\xff\xff"
4558                         "\xff\xff\xff\xff\xff\xff\xff\xff",
4559                         .dst_addr =
4560                         "\xff\xff\xff\xff\xff\xff\xff\xff"
4561                         "\xff\xff\xff\xff\xff\xff\xff\xff",
4562                         .vtc_flow = RTE_BE32(0xffffffff),
4563                         .proto = 0xff,
4564                         .hop_limits = 0xff,
4565                 },
4566         };
4567         struct mlx5_priv *priv = dev->data->dev_private;
4568         struct mlx5_dev_config *dev_conf = &priv->config;
4569         uint16_t queue_index = 0xFFFF;
4570
4571         if (items == NULL)
4572                 return -1;
4573         ret = flow_dv_validate_attributes(dev, attr, external, error);
4574         if (ret < 0)
4575                 return ret;
4576         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4577                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4578                 int type = items->type;
4579
4580                 switch (type) {
4581                 case RTE_FLOW_ITEM_TYPE_VOID:
4582                         break;
4583                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4584                         ret = flow_dv_validate_item_port_id
4585                                         (dev, items, attr, item_flags, error);
4586                         if (ret < 0)
4587                                 return ret;
4588                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4589                         break;
4590                 case RTE_FLOW_ITEM_TYPE_ETH:
4591                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4592                                                           error);
4593                         if (ret < 0)
4594                                 return ret;
4595                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4596                                              MLX5_FLOW_LAYER_OUTER_L2;
4597                         if (items->mask != NULL && items->spec != NULL) {
4598                                 ether_type =
4599                                         ((const struct rte_flow_item_eth *)
4600                                          items->spec)->type;
4601                                 ether_type &=
4602                                         ((const struct rte_flow_item_eth *)
4603                                          items->mask)->type;
4604                                 ether_type = rte_be_to_cpu_16(ether_type);
4605                         } else {
4606                                 ether_type = 0;
4607                         }
4608                         break;
4609                 case RTE_FLOW_ITEM_TYPE_VLAN:
4610                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4611                                                            dev, error);
4612                         if (ret < 0)
4613                                 return ret;
4614                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4615                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4616                         if (items->mask != NULL && items->spec != NULL) {
4617                                 ether_type =
4618                                         ((const struct rte_flow_item_vlan *)
4619                                          items->spec)->inner_type;
4620                                 ether_type &=
4621                                         ((const struct rte_flow_item_vlan *)
4622                                          items->mask)->inner_type;
4623                                 ether_type = rte_be_to_cpu_16(ether_type);
4624                         } else {
4625                                 ether_type = 0;
4626                         }
4627                         break;
4628                 case RTE_FLOW_ITEM_TYPE_IPV4:
4629                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4630                                                   &item_flags, &tunnel);
4631                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4632                                                            last_item,
4633                                                            ether_type,
4634                                                            &nic_ipv4_mask,
4635                                                            error);
4636                         if (ret < 0)
4637                                 return ret;
4638                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4639                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4640                         if (items->mask != NULL &&
4641                             ((const struct rte_flow_item_ipv4 *)
4642                              items->mask)->hdr.next_proto_id) {
4643                                 next_protocol =
4644                                         ((const struct rte_flow_item_ipv4 *)
4645                                          (items->spec))->hdr.next_proto_id;
4646                                 next_protocol &=
4647                                         ((const struct rte_flow_item_ipv4 *)
4648                                          (items->mask))->hdr.next_proto_id;
4649                         } else {
4650                                 /* Reset for inner layer. */
4651                                 next_protocol = 0xff;
4652                         }
4653                         break;
4654                 case RTE_FLOW_ITEM_TYPE_IPV6:
4655                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4656                                                   &item_flags, &tunnel);
4657                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4658                                                            last_item,
4659                                                            ether_type,
4660                                                            &nic_ipv6_mask,
4661                                                            error);
4662                         if (ret < 0)
4663                                 return ret;
4664                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4665                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4666                         if (items->mask != NULL &&
4667                             ((const struct rte_flow_item_ipv6 *)
4668                              items->mask)->hdr.proto) {
4669                                 item_ipv6_proto =
4670                                         ((const struct rte_flow_item_ipv6 *)
4671                                          items->spec)->hdr.proto;
4672                                 next_protocol =
4673                                         ((const struct rte_flow_item_ipv6 *)
4674                                          items->spec)->hdr.proto;
4675                                 next_protocol &=
4676                                         ((const struct rte_flow_item_ipv6 *)
4677                                          items->mask)->hdr.proto;
4678                         } else {
4679                                 /* Reset for inner layer. */
4680                                 next_protocol = 0xff;
4681                         }
4682                         break;
4683                 case RTE_FLOW_ITEM_TYPE_TCP:
4684                         ret = mlx5_flow_validate_item_tcp
4685                                                 (items, item_flags,
4686                                                  next_protocol,
4687                                                  &nic_tcp_mask,
4688                                                  error);
4689                         if (ret < 0)
4690                                 return ret;
4691                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4692                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4693                         break;
4694                 case RTE_FLOW_ITEM_TYPE_UDP:
4695                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4696                                                           next_protocol,
4697                                                           error);
4698                         if (ret < 0)
4699                                 return ret;
4700                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4701                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4702                         break;
4703                 case RTE_FLOW_ITEM_TYPE_GRE:
4704                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4705                                                           next_protocol, error);
4706                         if (ret < 0)
4707                                 return ret;
4708                         gre_item = items;
4709                         last_item = MLX5_FLOW_LAYER_GRE;
4710                         break;
4711                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4712                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4713                                                             next_protocol,
4714                                                             error);
4715                         if (ret < 0)
4716                                 return ret;
4717                         last_item = MLX5_FLOW_LAYER_NVGRE;
4718                         break;
4719                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4720                         ret = mlx5_flow_validate_item_gre_key
4721                                 (items, item_flags, gre_item, error);
4722                         if (ret < 0)
4723                                 return ret;
4724                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4725                         break;
4726                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4727                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4728                                                             error);
4729                         if (ret < 0)
4730                                 return ret;
4731                         last_item = MLX5_FLOW_LAYER_VXLAN;
4732                         break;
4733                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4734                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4735                                                                 item_flags, dev,
4736                                                                 error);
4737                         if (ret < 0)
4738                                 return ret;
4739                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4740                         break;
4741                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4742                         ret = mlx5_flow_validate_item_geneve(items,
4743                                                              item_flags, dev,
4744                                                              error);
4745                         if (ret < 0)
4746                                 return ret;
4747                         last_item = MLX5_FLOW_LAYER_GENEVE;
4748                         break;
4749                 case RTE_FLOW_ITEM_TYPE_MPLS:
4750                         ret = mlx5_flow_validate_item_mpls(dev, items,
4751                                                            item_flags,
4752                                                            last_item, error);
4753                         if (ret < 0)
4754                                 return ret;
4755                         last_item = MLX5_FLOW_LAYER_MPLS;
4756                         break;
4757
4758                 case RTE_FLOW_ITEM_TYPE_MARK:
4759                         ret = flow_dv_validate_item_mark(dev, items, attr,
4760                                                          error);
4761                         if (ret < 0)
4762                                 return ret;
4763                         last_item = MLX5_FLOW_ITEM_MARK;
4764                         break;
4765                 case RTE_FLOW_ITEM_TYPE_META:
4766                         ret = flow_dv_validate_item_meta(dev, items, attr,
4767                                                          error);
4768                         if (ret < 0)
4769                                 return ret;
4770                         last_item = MLX5_FLOW_ITEM_METADATA;
4771                         break;
4772                 case RTE_FLOW_ITEM_TYPE_ICMP:
4773                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4774                                                            next_protocol,
4775                                                            error);
4776                         if (ret < 0)
4777                                 return ret;
4778                         last_item = MLX5_FLOW_LAYER_ICMP;
4779                         break;
4780                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4781                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4782                                                             next_protocol,
4783                                                             error);
4784                         if (ret < 0)
4785                                 return ret;
4786                         item_ipv6_proto = IPPROTO_ICMPV6;
4787                         last_item = MLX5_FLOW_LAYER_ICMP6;
4788                         break;
4789                 case RTE_FLOW_ITEM_TYPE_TAG:
4790                         ret = flow_dv_validate_item_tag(dev, items,
4791                                                         attr, error);
4792                         if (ret < 0)
4793                                 return ret;
4794                         last_item = MLX5_FLOW_ITEM_TAG;
4795                         break;
4796                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4797                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4798                         break;
4799                 case RTE_FLOW_ITEM_TYPE_GTP:
4800                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4801                                                         error);
4802                         if (ret < 0)
4803                                 return ret;
4804                         last_item = MLX5_FLOW_LAYER_GTP;
4805                         break;
4806                 default:
4807                         return rte_flow_error_set(error, ENOTSUP,
4808                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4809                                                   NULL, "item not supported");
4810                 }
4811                 item_flags |= last_item;
4812         }
4813         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4814                 int type = actions->type;
4815                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4816                         return rte_flow_error_set(error, ENOTSUP,
4817                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4818                                                   actions, "too many actions");
4819                 switch (type) {
4820                 case RTE_FLOW_ACTION_TYPE_VOID:
4821                         break;
4822                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4823                         ret = flow_dv_validate_action_port_id(dev,
4824                                                               action_flags,
4825                                                               actions,
4826                                                               attr,
4827                                                               error);
4828                         if (ret)
4829                                 return ret;
4830                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4831                         ++actions_n;
4832                         break;
4833                 case RTE_FLOW_ACTION_TYPE_FLAG:
4834                         ret = flow_dv_validate_action_flag(dev, action_flags,
4835                                                            attr, error);
4836                         if (ret < 0)
4837                                 return ret;
4838                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4839                                 /* Count all modify-header actions as one. */
4840                                 if (!(action_flags &
4841                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4842                                         ++actions_n;
4843                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4844                                                 MLX5_FLOW_ACTION_MARK_EXT;
4845                         } else {
4846                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4847                                 ++actions_n;
4848                         }
4849                         break;
4850                 case RTE_FLOW_ACTION_TYPE_MARK:
4851                         ret = flow_dv_validate_action_mark(dev, actions,
4852                                                            action_flags,
4853                                                            attr, error);
4854                         if (ret < 0)
4855                                 return ret;
4856                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4857                                 /* Count all modify-header actions as one. */
4858                                 if (!(action_flags &
4859                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4860                                         ++actions_n;
4861                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4862                                                 MLX5_FLOW_ACTION_MARK_EXT;
4863                         } else {
4864                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4865                                 ++actions_n;
4866                         }
4867                         break;
4868                 case RTE_FLOW_ACTION_TYPE_SET_META:
4869                         ret = flow_dv_validate_action_set_meta(dev, actions,
4870                                                                action_flags,
4871                                                                attr, error);
4872                         if (ret < 0)
4873                                 return ret;
4874                         /* Count all modify-header actions as one action. */
4875                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4876                                 ++actions_n;
4877                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4878                         break;
4879                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4880                         ret = flow_dv_validate_action_set_tag(dev, actions,
4881                                                               action_flags,
4882                                                               attr, error);
4883                         if (ret < 0)
4884                                 return ret;
4885                         /* Count all modify-header actions as one action. */
4886                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4887                                 ++actions_n;
4888                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4889                         break;
4890                 case RTE_FLOW_ACTION_TYPE_DROP:
4891                         ret = mlx5_flow_validate_action_drop(action_flags,
4892                                                              attr, error);
4893                         if (ret < 0)
4894                                 return ret;
4895                         action_flags |= MLX5_FLOW_ACTION_DROP;
4896                         ++actions_n;
4897                         break;
4898                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4899                         ret = mlx5_flow_validate_action_queue(actions,
4900                                                               action_flags, dev,
4901                                                               attr, error);
4902                         if (ret < 0)
4903                                 return ret;
4904                         queue_index = ((const struct rte_flow_action_queue *)
4905                                                         (actions->conf))->index;
4906                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4907                         ++actions_n;
4908                         break;
4909                 case RTE_FLOW_ACTION_TYPE_RSS:
4910                         rss = actions->conf;
4911                         ret = mlx5_flow_validate_action_rss(actions,
4912                                                             action_flags, dev,
4913                                                             attr, item_flags,
4914                                                             error);
4915                         if (ret < 0)
4916                                 return ret;
4917                         if (rss != NULL && rss->queue_num)
4918                                 queue_index = rss->queue[0];
4919                         action_flags |= MLX5_FLOW_ACTION_RSS;
4920                         ++actions_n;
4921                         break;
4922                 case RTE_FLOW_ACTION_TYPE_COUNT:
4923                         ret = flow_dv_validate_action_count(dev, error);
4924                         if (ret < 0)
4925                                 return ret;
4926                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4927                         ++actions_n;
4928                         break;
4929                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4930                         if (flow_dv_validate_action_pop_vlan(dev,
4931                                                              action_flags,
4932                                                              actions,
4933                                                              item_flags, attr,
4934                                                              error))
4935                                 return -rte_errno;
4936                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4937                         ++actions_n;
4938                         break;
4939                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4940                         ret = flow_dv_validate_action_push_vlan(dev,
4941                                                                 action_flags,
4942                                                                 item_flags,
4943                                                                 actions, attr,
4944                                                                 error);
4945                         if (ret < 0)
4946                                 return ret;
4947                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4948                         ++actions_n;
4949                         break;
4950                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4951                         ret = flow_dv_validate_action_set_vlan_pcp
4952                                                 (action_flags, actions, error);
4953                         if (ret < 0)
4954                                 return ret;
4955                         /* Count PCP with push_vlan command. */
4956                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4957                         break;
4958                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4959                         ret = flow_dv_validate_action_set_vlan_vid
4960                                                 (item_flags, action_flags,
4961                                                  actions, error);
4962                         if (ret < 0)
4963                                 return ret;
4964                         /* Count VID with push_vlan command. */
4965                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4966                         break;
4967                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4968                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4969                         ret = flow_dv_validate_action_l2_encap(dev,
4970                                                                action_flags,
4971                                                                actions, attr,
4972                                                                error);
4973                         if (ret < 0)
4974                                 return ret;
4975                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
4976                         ++actions_n;
4977                         break;
4978                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4979                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4980                         ret = flow_dv_validate_action_decap(dev, action_flags,
4981                                                             attr, error);
4982                         if (ret < 0)
4983                                 return ret;
4984                         action_flags |= MLX5_FLOW_ACTION_DECAP;
4985                         ++actions_n;
4986                         break;
4987                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4988                         ret = flow_dv_validate_action_raw_encap_decap
4989                                 (dev, NULL, actions->conf, attr, &action_flags,
4990                                  &actions_n, error);
4991                         if (ret < 0)
4992                                 return ret;
4993                         break;
4994                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4995                         decap = actions->conf;
4996                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
4997                                 ;
4998                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4999                                 encap = NULL;
5000                                 actions--;
5001                         } else {
5002                                 encap = actions->conf;
5003                         }
5004                         ret = flow_dv_validate_action_raw_encap_decap
5005                                            (dev,
5006                                             decap ? decap : &empty_decap, encap,
5007                                             attr, &action_flags, &actions_n,
5008                                             error);
5009                         if (ret < 0)
5010                                 return ret;
5011                         break;
5012                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5013                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5014                         ret = flow_dv_validate_action_modify_mac(action_flags,
5015                                                                  actions,
5016                                                                  item_flags,
5017                                                                  error);
5018                         if (ret < 0)
5019                                 return ret;
5020                         /* Count all modify-header actions as one action. */
5021                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5022                                 ++actions_n;
5023                         action_flags |= actions->type ==
5024                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
5025                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
5026                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
5027                         break;
5028
5029                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5030                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5031                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
5032                                                                   actions,
5033                                                                   item_flags,
5034                                                                   error);
5035                         if (ret < 0)
5036                                 return ret;
5037                         /* Count all modify-header actions as one action. */
5038                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5039                                 ++actions_n;
5040                         action_flags |= actions->type ==
5041                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
5042                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
5043                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
5044                         break;
5045                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5046                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5047                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
5048                                                                   actions,
5049                                                                   item_flags,
5050                                                                   error);
5051                         if (ret < 0)
5052                                 return ret;
5053                         if (item_ipv6_proto == IPPROTO_ICMPV6)
5054                                 return rte_flow_error_set(error, ENOTSUP,
5055                                         RTE_FLOW_ERROR_TYPE_ACTION,
5056                                         actions,
5057                                         "Can't change header "
5058                                         "with ICMPv6 proto");
5059                         /* Count all modify-header actions as one action. */
5060                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5061                                 ++actions_n;
5062                         action_flags |= actions->type ==
5063                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
5064                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
5065                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
5066                         break;
5067                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5068                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5069                         ret = flow_dv_validate_action_modify_tp(action_flags,
5070                                                                 actions,
5071                                                                 item_flags,
5072                                                                 error);
5073                         if (ret < 0)
5074                                 return ret;
5075                         /* Count all modify-header actions as one action. */
5076                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5077                                 ++actions_n;
5078                         action_flags |= actions->type ==
5079                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5080                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
5081                                                 MLX5_FLOW_ACTION_SET_TP_DST;
5082                         break;
5083                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5084                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5085                         ret = flow_dv_validate_action_modify_ttl(action_flags,
5086                                                                  actions,
5087                                                                  item_flags,
5088                                                                  error);
5089                         if (ret < 0)
5090                                 return ret;
5091                         /* Count all modify-header actions as one action. */
5092                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5093                                 ++actions_n;
5094                         action_flags |= actions->type ==
5095                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
5096                                                 MLX5_FLOW_ACTION_SET_TTL :
5097                                                 MLX5_FLOW_ACTION_DEC_TTL;
5098                         break;
5099                 case RTE_FLOW_ACTION_TYPE_JUMP:
5100                         ret = flow_dv_validate_action_jump(actions,
5101                                                            action_flags,
5102                                                            attr, external,
5103                                                            error);
5104                         if (ret)
5105                                 return ret;
5106                         ++actions_n;
5107                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5108                         break;
5109                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5110                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5111                         ret = flow_dv_validate_action_modify_tcp_seq
5112                                                                 (action_flags,
5113                                                                  actions,
5114                                                                  item_flags,
5115                                                                  error);
5116                         if (ret < 0)
5117                                 return ret;
5118                         /* Count all modify-header actions as one action. */
5119                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5120                                 ++actions_n;
5121                         action_flags |= actions->type ==
5122                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5123                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
5124                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5125                         break;
5126                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5127                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5128                         ret = flow_dv_validate_action_modify_tcp_ack
5129                                                                 (action_flags,
5130                                                                  actions,
5131                                                                  item_flags,
5132                                                                  error);
5133                         if (ret < 0)
5134                                 return ret;
5135                         /* Count all modify-header actions as one action. */
5136                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5137                                 ++actions_n;
5138                         action_flags |= actions->type ==
5139                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5140                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5141                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5142                         break;
5143                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5144                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5145                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5146                         break;
5147                 case RTE_FLOW_ACTION_TYPE_METER:
5148                         ret = mlx5_flow_validate_action_meter(dev,
5149                                                               action_flags,
5150                                                               actions, attr,
5151                                                               error);
5152                         if (ret < 0)
5153                                 return ret;
5154                         action_flags |= MLX5_FLOW_ACTION_METER;
5155                         ++actions_n;
5156                         break;
5157                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5158                         ret = flow_dv_validate_action_modify_ipv4_dscp
5159                                                          (action_flags,
5160                                                           actions,
5161                                                           item_flags,
5162                                                           error);
5163                         if (ret < 0)
5164                                 return ret;
5165                         /* Count all modify-header actions as one action. */
5166                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5167                                 ++actions_n;
5168                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5169                         break;
5170                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5171                         ret = flow_dv_validate_action_modify_ipv6_dscp
5172                                                                 (action_flags,
5173                                                                  actions,
5174                                                                  item_flags,
5175                                                                  error);
5176                         if (ret < 0)
5177                                 return ret;
5178                         /* Count all modify-header actions as one action. */
5179                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5180                                 ++actions_n;
5181                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5182                         break;
5183                 default:
5184                         return rte_flow_error_set(error, ENOTSUP,
5185                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5186                                                   actions,
5187                                                   "action not supported");
5188                 }
5189         }
5190         /*
5191          * Validate the drop action mutual exclusion with other actions.
5192          * Drop action is mutually-exclusive with any other action, except for
5193          * Count action.
5194          */
5195         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5196             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5197                 return rte_flow_error_set(error, EINVAL,
5198                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5199                                           "Drop action is mutually-exclusive "
5200                                           "with any other action, except for "
5201                                           "Count action");
5202         /* Eswitch has few restrictions on using items and actions */
5203         if (attr->transfer) {
5204                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5205                     action_flags & MLX5_FLOW_ACTION_FLAG)
5206                         return rte_flow_error_set(error, ENOTSUP,
5207                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5208                                                   NULL,
5209                                                   "unsupported action FLAG");
5210                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5211                     action_flags & MLX5_FLOW_ACTION_MARK)
5212                         return rte_flow_error_set(error, ENOTSUP,
5213                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5214                                                   NULL,
5215                                                   "unsupported action MARK");
5216                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5217                         return rte_flow_error_set(error, ENOTSUP,
5218                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5219                                                   NULL,
5220                                                   "unsupported action QUEUE");
5221                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5222                         return rte_flow_error_set(error, ENOTSUP,
5223                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5224                                                   NULL,
5225                                                   "unsupported action RSS");
5226                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5227                         return rte_flow_error_set(error, EINVAL,
5228                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5229                                                   actions,
5230                                                   "no fate action is found");
5231         } else {
5232                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5233                         return rte_flow_error_set(error, EINVAL,
5234                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5235                                                   actions,
5236                                                   "no fate action is found");
5237         }
5238         /* Continue validation for Xcap actions.*/
5239         if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) && (queue_index == 0xFFFF ||
5240             mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5241                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5242                     MLX5_FLOW_XCAP_ACTIONS)
5243                         return rte_flow_error_set(error, ENOTSUP,
5244                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5245                                                   NULL, "encap and decap "
5246                                                   "combination aren't supported");
5247                 if (!attr->transfer && attr->ingress && (action_flags &
5248                                                         MLX5_FLOW_ACTION_ENCAP))
5249                         return rte_flow_error_set(error, ENOTSUP,
5250                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5251                                                   NULL, "encap is not supported"
5252                                                   " for ingress traffic");
5253         }
5254         return 0;
5255 }
5256
5257 /**
5258  * Internal preparation function. Allocates the DV flow size,
5259  * this size is constant.
5260  *
5261  * @param[in] attr
5262  *   Pointer to the flow attributes.
5263  * @param[in] items
5264  *   Pointer to the list of items.
5265  * @param[in] actions
5266  *   Pointer to the list of actions.
5267  * @param[out] error
5268  *   Pointer to the error structure.
5269  *
5270  * @return
5271  *   Pointer to mlx5_flow object on success,
5272  *   otherwise NULL and rte_errno is set.
5273  */
5274 static struct mlx5_flow *
5275 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5276                 const struct rte_flow_item items[] __rte_unused,
5277                 const struct rte_flow_action actions[] __rte_unused,
5278                 struct rte_flow_error *error)
5279 {
5280         size_t size = sizeof(struct mlx5_flow);
5281         struct mlx5_flow *dev_flow;
5282
5283         dev_flow = rte_calloc(__func__, 1, size, 0);
5284         if (!dev_flow) {
5285                 rte_flow_error_set(error, ENOMEM,
5286                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5287                                    "not enough memory to create flow");
5288                 return NULL;
5289         }
5290         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5291         dev_flow->ingress = attr->ingress;
5292         dev_flow->transfer = attr->transfer;
5293         return dev_flow;
5294 }
5295
5296 #ifdef RTE_LIBRTE_MLX5_DEBUG
5297 /**
5298  * Sanity check for match mask and value. Similar to check_valid_spec() in
5299  * kernel driver. If unmasked bit is present in value, it returns failure.
5300  *
5301  * @param match_mask
5302  *   pointer to match mask buffer.
5303  * @param match_value
5304  *   pointer to match value buffer.
5305  *
5306  * @return
5307  *   0 if valid, -EINVAL otherwise.
5308  */
5309 static int
5310 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5311 {
5312         uint8_t *m = match_mask;
5313         uint8_t *v = match_value;
5314         unsigned int i;
5315
5316         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5317                 if (v[i] & ~m[i]) {
5318                         DRV_LOG(ERR,
5319                                 "match_value differs from match_criteria"
5320                                 " %p[%u] != %p[%u]",
5321                                 match_value, i, match_mask, i);
5322                         return -EINVAL;
5323                 }
5324         }
5325         return 0;
5326 }
5327 #endif
5328
5329 /**
5330  * Add Ethernet item to matcher and to the value.
5331  *
5332  * @param[in, out] matcher
5333  *   Flow matcher.
5334  * @param[in, out] key
5335  *   Flow matcher value.
5336  * @param[in] item
5337  *   Flow pattern to translate.
5338  * @param[in] inner
5339  *   Item is inner pattern.
5340  */
5341 static void
5342 flow_dv_translate_item_eth(void *matcher, void *key,
5343                            const struct rte_flow_item *item, int inner)
5344 {
5345         const struct rte_flow_item_eth *eth_m = item->mask;
5346         const struct rte_flow_item_eth *eth_v = item->spec;
5347         const struct rte_flow_item_eth nic_mask = {
5348                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5349                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5350                 .type = RTE_BE16(0xffff),
5351         };
5352         void *headers_m;
5353         void *headers_v;
5354         char *l24_v;
5355         unsigned int i;
5356
5357         if (!eth_v)
5358                 return;
5359         if (!eth_m)
5360                 eth_m = &nic_mask;
5361         if (inner) {
5362                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5363                                          inner_headers);
5364                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5365         } else {
5366                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5367                                          outer_headers);
5368                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5369         }
5370         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5371                &eth_m->dst, sizeof(eth_m->dst));
5372         /* The value must be in the range of the mask. */
5373         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5374         for (i = 0; i < sizeof(eth_m->dst); ++i)
5375                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5376         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5377                &eth_m->src, sizeof(eth_m->src));
5378         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5379         /* The value must be in the range of the mask. */
5380         for (i = 0; i < sizeof(eth_m->dst); ++i)
5381                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5382         if (eth_v->type) {
5383                 /* When ethertype is present set mask for tagged VLAN. */
5384                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5385                 /* Set value for tagged VLAN if ethertype is 802.1Q. */
5386                 if (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_VLAN) ||
5387                     eth_v->type == RTE_BE16(RTE_ETHER_TYPE_QINQ)) {
5388                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag,
5389                                  1);
5390                         /* Return here to avoid setting match on ethertype. */
5391                         return;
5392                 }
5393         }
5394         /*
5395          * HW supports match on one Ethertype, the Ethertype following the last
5396          * VLAN tag of the packet (see PRM).
5397          * Set match on ethertype only if ETH header is not followed by VLAN.
5398          */
5399         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5400                  rte_be_to_cpu_16(eth_m->type));
5401         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5402         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5403 }
5404
5405 /**
5406  * Add VLAN item to matcher and to the value.
5407  *
5408  * @param[in, out] dev_flow
5409  *   Flow descriptor.
5410  * @param[in, out] matcher
5411  *   Flow matcher.
5412  * @param[in, out] key
5413  *   Flow matcher value.
5414  * @param[in] item
5415  *   Flow pattern to translate.
5416  * @param[in] inner
5417  *   Item is inner pattern.
5418  */
5419 static void
5420 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5421                             void *matcher, void *key,
5422                             const struct rte_flow_item *item,
5423                             int inner)
5424 {
5425         const struct rte_flow_item_vlan *vlan_m = item->mask;
5426         const struct rte_flow_item_vlan *vlan_v = item->spec;
5427         void *headers_m;
5428         void *headers_v;
5429         uint16_t tci_m;
5430         uint16_t tci_v;
5431
5432         if (!vlan_v)
5433                 return;
5434         if (!vlan_m)
5435                 vlan_m = &rte_flow_item_vlan_mask;
5436         if (inner) {
5437                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5438                                          inner_headers);
5439                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5440         } else {
5441                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5442                                          outer_headers);
5443                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5444                 /*
5445                  * This is workaround, masks are not supported,
5446                  * and pre-validated.
5447                  */
5448                 dev_flow->dv.vf_vlan.tag =
5449                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5450         }
5451         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5452         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5453         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5454         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5455         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5456         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5457         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5458         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5459         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5460         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5461         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5462                  rte_be_to_cpu_16(vlan_m->inner_type));
5463         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5464                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5465 }
5466
5467 /**
5468  * Add IPV4 item to matcher and to the value.
5469  *
5470  * @param[in, out] matcher
5471  *   Flow matcher.
5472  * @param[in, out] key
5473  *   Flow matcher value.
5474  * @param[in] item
5475  *   Flow pattern to translate.
5476  * @param[in] item_flags
5477  *   Bit-fields that holds the items detected until now.
5478  * @param[in] inner
5479  *   Item is inner pattern.
5480  * @param[in] group
5481  *   The group to insert the rule.
5482  */
5483 static void
5484 flow_dv_translate_item_ipv4(void *matcher, void *key,
5485                             const struct rte_flow_item *item,
5486                             const uint64_t item_flags,
5487                             int inner, uint32_t group)
5488 {
5489         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5490         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5491         const struct rte_flow_item_ipv4 nic_mask = {
5492                 .hdr = {
5493                         .src_addr = RTE_BE32(0xffffffff),
5494                         .dst_addr = RTE_BE32(0xffffffff),
5495                         .type_of_service = 0xff,
5496                         .next_proto_id = 0xff,
5497                         .time_to_live = 0xff,
5498                 },
5499         };
5500         void *headers_m;
5501         void *headers_v;
5502         char *l24_m;
5503         char *l24_v;
5504         uint8_t tos;
5505
5506         if (inner) {
5507                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5508                                          inner_headers);
5509                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5510         } else {
5511                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5512                                          outer_headers);
5513                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5514         }
5515         if (group == 0)
5516                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5517         else
5518                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5519         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5520         /*
5521          * On outer header (which must contains L2), or inner header with L2,
5522          * set cvlan_tag mask bit to mark this packet as untagged.
5523          * This should be done even if item->spec is empty.
5524          */
5525         if (!inner || item_flags & MLX5_FLOW_LAYER_INNER_L2)
5526                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5527         if (!ipv4_v)
5528                 return;
5529         if (!ipv4_m)
5530                 ipv4_m = &nic_mask;
5531         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5532                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5533         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5534                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5535         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5536         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5537         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5538                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5539         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5540                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5541         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5542         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5543         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5544         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5545                  ipv4_m->hdr.type_of_service);
5546         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5547         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5548                  ipv4_m->hdr.type_of_service >> 2);
5549         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5550         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5551                  ipv4_m->hdr.next_proto_id);
5552         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5553                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5554         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
5555                  ipv4_m->hdr.time_to_live);
5556         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
5557                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
5558 }
5559
5560 /**
5561  * Add IPV6 item to matcher and to the value.
5562  *
5563  * @param[in, out] matcher
5564  *   Flow matcher.
5565  * @param[in, out] key
5566  *   Flow matcher value.
5567  * @param[in] item
5568  *   Flow pattern to translate.
5569  * @param[in] item_flags
5570  *   Bit-fields that holds the items detected until now.
5571  * @param[in] inner
5572  *   Item is inner pattern.
5573  * @param[in] group
5574  *   The group to insert the rule.
5575  */
5576 static void
5577 flow_dv_translate_item_ipv6(void *matcher, void *key,
5578                             const struct rte_flow_item *item,
5579                             const uint64_t item_flags,
5580                             int inner, uint32_t group)
5581 {
5582         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5583         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5584         const struct rte_flow_item_ipv6 nic_mask = {
5585                 .hdr = {
5586                         .src_addr =
5587                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5588                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5589                         .dst_addr =
5590                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5591                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5592                         .vtc_flow = RTE_BE32(0xffffffff),
5593                         .proto = 0xff,
5594                         .hop_limits = 0xff,
5595                 },
5596         };
5597         void *headers_m;
5598         void *headers_v;
5599         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5600         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5601         char *l24_m;
5602         char *l24_v;
5603         uint32_t vtc_m;
5604         uint32_t vtc_v;
5605         int i;
5606         int size;
5607
5608         if (inner) {
5609                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5610                                          inner_headers);
5611                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5612         } else {
5613                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5614                                          outer_headers);
5615                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5616         }
5617         if (group == 0)
5618                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5619         else
5620                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5621         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5622         /*
5623          * On outer header (which must contains L2), or inner header with L2,
5624          * set cvlan_tag mask bit to mark this packet as untagged.
5625          * This should be done even if item->spec is empty.
5626          */
5627         if (!inner || item_flags & MLX5_FLOW_LAYER_INNER_L2)
5628                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5629         if (!ipv6_v)
5630                 return;
5631         if (!ipv6_m)
5632                 ipv6_m = &nic_mask;
5633         size = sizeof(ipv6_m->hdr.dst_addr);
5634         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5635                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5636         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5637                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5638         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5639         for (i = 0; i < size; ++i)
5640                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5641         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5642                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5643         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5644                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5645         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5646         for (i = 0; i < size; ++i)
5647                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5648         /* TOS. */
5649         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5650         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5651         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5652         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5653         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5654         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5655         /* Label. */
5656         if (inner) {
5657                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5658                          vtc_m);
5659                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5660                          vtc_v);
5661         } else {
5662                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5663                          vtc_m);
5664                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5665                          vtc_v);
5666         }
5667         /* Protocol. */
5668         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5669                  ipv6_m->hdr.proto);
5670         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5671                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5672         /* Hop limit. */
5673         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
5674                  ipv6_m->hdr.hop_limits);
5675         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
5676                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
5677 }
5678
5679 /**
5680  * Add TCP item to matcher and to the value.
5681  *
5682  * @param[in, out] matcher
5683  *   Flow matcher.
5684  * @param[in, out] key
5685  *   Flow matcher value.
5686  * @param[in] item
5687  *   Flow pattern to translate.
5688  * @param[in] inner
5689  *   Item is inner pattern.
5690  */
5691 static void
5692 flow_dv_translate_item_tcp(void *matcher, void *key,
5693                            const struct rte_flow_item *item,
5694                            int inner)
5695 {
5696         const struct rte_flow_item_tcp *tcp_m = item->mask;
5697         const struct rte_flow_item_tcp *tcp_v = item->spec;
5698         void *headers_m;
5699         void *headers_v;
5700
5701         if (inner) {
5702                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5703                                          inner_headers);
5704                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5705         } else {
5706                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5707                                          outer_headers);
5708                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5709         }
5710         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5711         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5712         if (!tcp_v)
5713                 return;
5714         if (!tcp_m)
5715                 tcp_m = &rte_flow_item_tcp_mask;
5716         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5717                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5718         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5719                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5720         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5721                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5722         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5723                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5724         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5725                  tcp_m->hdr.tcp_flags);
5726         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5727                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5728 }
5729
5730 /**
5731  * Add UDP item to matcher and to the value.
5732  *
5733  * @param[in, out] matcher
5734  *   Flow matcher.
5735  * @param[in, out] key
5736  *   Flow matcher value.
5737  * @param[in] item
5738  *   Flow pattern to translate.
5739  * @param[in] inner
5740  *   Item is inner pattern.
5741  */
5742 static void
5743 flow_dv_translate_item_udp(void *matcher, void *key,
5744                            const struct rte_flow_item *item,
5745                            int inner)
5746 {
5747         const struct rte_flow_item_udp *udp_m = item->mask;
5748         const struct rte_flow_item_udp *udp_v = item->spec;
5749         void *headers_m;
5750         void *headers_v;
5751
5752         if (inner) {
5753                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5754                                          inner_headers);
5755                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5756         } else {
5757                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5758                                          outer_headers);
5759                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5760         }
5761         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5762         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5763         if (!udp_v)
5764                 return;
5765         if (!udp_m)
5766                 udp_m = &rte_flow_item_udp_mask;
5767         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5768                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5769         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5770                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5771         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5772                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5773         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5774                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5775 }
5776
5777 /**
5778  * Add GRE optional Key item to matcher and to the value.
5779  *
5780  * @param[in, out] matcher
5781  *   Flow matcher.
5782  * @param[in, out] key
5783  *   Flow matcher value.
5784  * @param[in] item
5785  *   Flow pattern to translate.
5786  * @param[in] inner
5787  *   Item is inner pattern.
5788  */
5789 static void
5790 flow_dv_translate_item_gre_key(void *matcher, void *key,
5791                                    const struct rte_flow_item *item)
5792 {
5793         const rte_be32_t *key_m = item->mask;
5794         const rte_be32_t *key_v = item->spec;
5795         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5796         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5797         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5798
5799         /* GRE K bit must be on and should already be validated */
5800         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5801         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5802         if (!key_v)
5803                 return;
5804         if (!key_m)
5805                 key_m = &gre_key_default_mask;
5806         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5807                  rte_be_to_cpu_32(*key_m) >> 8);
5808         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5809                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5810         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5811                  rte_be_to_cpu_32(*key_m) & 0xFF);
5812         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5813                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5814 }
5815
5816 /**
5817  * Add GRE item to matcher and to the value.
5818  *
5819  * @param[in, out] matcher
5820  *   Flow matcher.
5821  * @param[in, out] key
5822  *   Flow matcher value.
5823  * @param[in] item
5824  *   Flow pattern to translate.
5825  * @param[in] inner
5826  *   Item is inner pattern.
5827  */
5828 static void
5829 flow_dv_translate_item_gre(void *matcher, void *key,
5830                            const struct rte_flow_item *item,
5831                            int inner)
5832 {
5833         const struct rte_flow_item_gre *gre_m = item->mask;
5834         const struct rte_flow_item_gre *gre_v = item->spec;
5835         void *headers_m;
5836         void *headers_v;
5837         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5838         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5839         struct {
5840                 union {
5841                         __extension__
5842                         struct {
5843                                 uint16_t version:3;
5844                                 uint16_t rsvd0:9;
5845                                 uint16_t s_present:1;
5846                                 uint16_t k_present:1;
5847                                 uint16_t rsvd_bit1:1;
5848                                 uint16_t c_present:1;
5849                         };
5850                         uint16_t value;
5851                 };
5852         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5853
5854         if (inner) {
5855                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5856                                          inner_headers);
5857                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5858         } else {
5859                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5860                                          outer_headers);
5861                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5862         }
5863         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5864         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5865         if (!gre_v)
5866                 return;
5867         if (!gre_m)
5868                 gre_m = &rte_flow_item_gre_mask;
5869         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5870                  rte_be_to_cpu_16(gre_m->protocol));
5871         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5872                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5873         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5874         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5875         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5876                  gre_crks_rsvd0_ver_m.c_present);
5877         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5878                  gre_crks_rsvd0_ver_v.c_present &
5879                  gre_crks_rsvd0_ver_m.c_present);
5880         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5881                  gre_crks_rsvd0_ver_m.k_present);
5882         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5883                  gre_crks_rsvd0_ver_v.k_present &
5884                  gre_crks_rsvd0_ver_m.k_present);
5885         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5886                  gre_crks_rsvd0_ver_m.s_present);
5887         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5888                  gre_crks_rsvd0_ver_v.s_present &
5889                  gre_crks_rsvd0_ver_m.s_present);
5890 }
5891
5892 /**
5893  * Add NVGRE item to matcher and to the value.
5894  *
5895  * @param[in, out] matcher
5896  *   Flow matcher.
5897  * @param[in, out] key
5898  *   Flow matcher value.
5899  * @param[in] item
5900  *   Flow pattern to translate.
5901  * @param[in] inner
5902  *   Item is inner pattern.
5903  */
5904 static void
5905 flow_dv_translate_item_nvgre(void *matcher, void *key,
5906                              const struct rte_flow_item *item,
5907                              int inner)
5908 {
5909         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5910         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5911         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5912         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5913         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5914         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5915         char *gre_key_m;
5916         char *gre_key_v;
5917         int size;
5918         int i;
5919
5920         /* For NVGRE, GRE header fields must be set with defined values. */
5921         const struct rte_flow_item_gre gre_spec = {
5922                 .c_rsvd0_ver = RTE_BE16(0x2000),
5923                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5924         };
5925         const struct rte_flow_item_gre gre_mask = {
5926                 .c_rsvd0_ver = RTE_BE16(0xB000),
5927                 .protocol = RTE_BE16(UINT16_MAX),
5928         };
5929         const struct rte_flow_item gre_item = {
5930                 .spec = &gre_spec,
5931                 .mask = &gre_mask,
5932                 .last = NULL,
5933         };
5934         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5935         if (!nvgre_v)
5936                 return;
5937         if (!nvgre_m)
5938                 nvgre_m = &rte_flow_item_nvgre_mask;
5939         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5940         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5941         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5942         memcpy(gre_key_m, tni_flow_id_m, size);
5943         for (i = 0; i < size; ++i)
5944                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5945 }
5946
5947 /**
5948  * Add VXLAN item to matcher and to the value.
5949  *
5950  * @param[in, out] matcher
5951  *   Flow matcher.
5952  * @param[in, out] key
5953  *   Flow matcher value.
5954  * @param[in] item
5955  *   Flow pattern to translate.
5956  * @param[in] inner
5957  *   Item is inner pattern.
5958  */
5959 static void
5960 flow_dv_translate_item_vxlan(void *matcher, void *key,
5961                              const struct rte_flow_item *item,
5962                              int inner)
5963 {
5964         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5965         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5966         void *headers_m;
5967         void *headers_v;
5968         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5969         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5970         char *vni_m;
5971         char *vni_v;
5972         uint16_t dport;
5973         int size;
5974         int i;
5975
5976         if (inner) {
5977                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5978                                          inner_headers);
5979                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5980         } else {
5981                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5982                                          outer_headers);
5983                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5984         }
5985         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5986                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5987         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5988                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5989                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5990         }
5991         if (!vxlan_v)
5992                 return;
5993         if (!vxlan_m)
5994                 vxlan_m = &rte_flow_item_vxlan_mask;
5995         size = sizeof(vxlan_m->vni);
5996         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5997         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5998         memcpy(vni_m, vxlan_m->vni, size);
5999         for (i = 0; i < size; ++i)
6000                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
6001 }
6002
6003 /**
6004  * Add VXLAN-GPE item to matcher and to the value.
6005  *
6006  * @param[in, out] matcher
6007  *   Flow matcher.
6008  * @param[in, out] key
6009  *   Flow matcher value.
6010  * @param[in] item
6011  *   Flow pattern to translate.
6012  * @param[in] inner
6013  *   Item is inner pattern.
6014  */
6015
6016 static void
6017 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
6018                                  const struct rte_flow_item *item, int inner)
6019 {
6020         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
6021         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
6022         void *headers_m;
6023         void *headers_v;
6024         void *misc_m =
6025                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
6026         void *misc_v =
6027                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6028         char *vni_m;
6029         char *vni_v;
6030         uint16_t dport;
6031         int size;
6032         int i;
6033         uint8_t flags_m = 0xff;
6034         uint8_t flags_v = 0xc;
6035
6036         if (inner) {
6037                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6038                                          inner_headers);
6039                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6040         } else {
6041                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6042                                          outer_headers);
6043                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6044         }
6045         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
6046                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
6047         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6048                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6049                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6050         }
6051         if (!vxlan_v)
6052                 return;
6053         if (!vxlan_m)
6054                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
6055         size = sizeof(vxlan_m->vni);
6056         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
6057         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
6058         memcpy(vni_m, vxlan_m->vni, size);
6059         for (i = 0; i < size; ++i)
6060                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
6061         if (vxlan_m->flags) {
6062                 flags_m = vxlan_m->flags;
6063                 flags_v = vxlan_v->flags;
6064         }
6065         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
6066         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
6067         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
6068                  vxlan_m->protocol);
6069         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
6070                  vxlan_v->protocol);
6071 }
6072
6073 /**
6074  * Add Geneve item to matcher and to the value.
6075  *
6076  * @param[in, out] matcher
6077  *   Flow matcher.
6078  * @param[in, out] key
6079  *   Flow matcher value.
6080  * @param[in] item
6081  *   Flow pattern to translate.
6082  * @param[in] inner
6083  *   Item is inner pattern.
6084  */
6085
6086 static void
6087 flow_dv_translate_item_geneve(void *matcher, void *key,
6088                               const struct rte_flow_item *item, int inner)
6089 {
6090         const struct rte_flow_item_geneve *geneve_m = item->mask;
6091         const struct rte_flow_item_geneve *geneve_v = item->spec;
6092         void *headers_m;
6093         void *headers_v;
6094         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6095         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6096         uint16_t dport;
6097         uint16_t gbhdr_m;
6098         uint16_t gbhdr_v;
6099         char *vni_m;
6100         char *vni_v;
6101         size_t size, i;
6102
6103         if (inner) {
6104                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6105                                          inner_headers);
6106                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6107         } else {
6108                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6109                                          outer_headers);
6110                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6111         }
6112         dport = MLX5_UDP_PORT_GENEVE;
6113         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6114                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6115                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6116         }
6117         if (!geneve_v)
6118                 return;
6119         if (!geneve_m)
6120                 geneve_m = &rte_flow_item_geneve_mask;
6121         size = sizeof(geneve_m->vni);
6122         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
6123         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
6124         memcpy(vni_m, geneve_m->vni, size);
6125         for (i = 0; i < size; ++i)
6126                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
6127         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
6128                  rte_be_to_cpu_16(geneve_m->protocol));
6129         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
6130                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
6131         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
6132         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
6133         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
6134                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6135         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
6136                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6137         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
6138                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6139         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
6140                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
6141                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6142 }
6143
6144 /**
6145  * Add MPLS item to matcher and to the value.
6146  *
6147  * @param[in, out] matcher
6148  *   Flow matcher.
6149  * @param[in, out] key
6150  *   Flow matcher value.
6151  * @param[in] item
6152  *   Flow pattern to translate.
6153  * @param[in] prev_layer
6154  *   The protocol layer indicated in previous item.
6155  * @param[in] inner
6156  *   Item is inner pattern.
6157  */
6158 static void
6159 flow_dv_translate_item_mpls(void *matcher, void *key,
6160                             const struct rte_flow_item *item,
6161                             uint64_t prev_layer,
6162                             int inner)
6163 {
6164         const uint32_t *in_mpls_m = item->mask;
6165         const uint32_t *in_mpls_v = item->spec;
6166         uint32_t *out_mpls_m = 0;
6167         uint32_t *out_mpls_v = 0;
6168         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6169         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6170         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
6171                                      misc_parameters_2);
6172         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6173         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
6174         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6175
6176         switch (prev_layer) {
6177         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6178                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
6179                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
6180                          MLX5_UDP_PORT_MPLS);
6181                 break;
6182         case MLX5_FLOW_LAYER_GRE:
6183                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
6184                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
6185                          RTE_ETHER_TYPE_MPLS);
6186                 break;
6187         default:
6188                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6189                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6190                          IPPROTO_MPLS);
6191                 break;
6192         }
6193         if (!in_mpls_v)
6194                 return;
6195         if (!in_mpls_m)
6196                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
6197         switch (prev_layer) {
6198         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6199                 out_mpls_m =
6200                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6201                                                  outer_first_mpls_over_udp);
6202                 out_mpls_v =
6203                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6204                                                  outer_first_mpls_over_udp);
6205                 break;
6206         case MLX5_FLOW_LAYER_GRE:
6207                 out_mpls_m =
6208                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6209                                                  outer_first_mpls_over_gre);
6210                 out_mpls_v =
6211                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6212                                                  outer_first_mpls_over_gre);
6213                 break;
6214         default:
6215                 /* Inner MPLS not over GRE is not supported. */
6216                 if (!inner) {
6217                         out_mpls_m =
6218                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6219                                                          misc2_m,
6220                                                          outer_first_mpls);
6221                         out_mpls_v =
6222                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6223                                                          misc2_v,
6224                                                          outer_first_mpls);
6225                 }
6226                 break;
6227         }
6228         if (out_mpls_m && out_mpls_v) {
6229                 *out_mpls_m = *in_mpls_m;
6230                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
6231         }
6232 }
6233
6234 /**
6235  * Add metadata register item to matcher
6236  *
6237  * @param[in, out] matcher
6238  *   Flow matcher.
6239  * @param[in, out] key
6240  *   Flow matcher value.
6241  * @param[in] reg_type
6242  *   Type of device metadata register
6243  * @param[in] value
6244  *   Register value
6245  * @param[in] mask
6246  *   Register mask
6247  */
6248 static void
6249 flow_dv_match_meta_reg(void *matcher, void *key,
6250                        enum modify_reg reg_type,
6251                        uint32_t data, uint32_t mask)
6252 {
6253         void *misc2_m =
6254                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
6255         void *misc2_v =
6256                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6257         uint32_t temp;
6258
6259         data &= mask;
6260         switch (reg_type) {
6261         case REG_A:
6262                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
6263                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
6264                 break;
6265         case REG_B:
6266                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
6267                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
6268                 break;
6269         case REG_C_0:
6270                 /*
6271                  * The metadata register C0 field might be divided into
6272                  * source vport index and META item value, we should set
6273                  * this field according to specified mask, not as whole one.
6274                  */
6275                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
6276                 temp |= mask;
6277                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
6278                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
6279                 temp &= ~mask;
6280                 temp |= data;
6281                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
6282                 break;
6283         case REG_C_1:
6284                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
6285                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
6286                 break;
6287         case REG_C_2:
6288                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
6289                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
6290                 break;
6291         case REG_C_3:
6292                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6293                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6294                 break;
6295         case REG_C_4:
6296                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6297                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6298                 break;
6299         case REG_C_5:
6300                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6301                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6302                 break;
6303         case REG_C_6:
6304                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6305                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6306                 break;
6307         case REG_C_7:
6308                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6309                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6310                 break;
6311         default:
6312                 MLX5_ASSERT(false);
6313                 break;
6314         }
6315 }
6316
6317 /**
6318  * Add MARK item to matcher
6319  *
6320  * @param[in] dev
6321  *   The device to configure through.
6322  * @param[in, out] matcher
6323  *   Flow matcher.
6324  * @param[in, out] key
6325  *   Flow matcher value.
6326  * @param[in] item
6327  *   Flow pattern to translate.
6328  */
6329 static void
6330 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6331                             void *matcher, void *key,
6332                             const struct rte_flow_item *item)
6333 {
6334         struct mlx5_priv *priv = dev->data->dev_private;
6335         const struct rte_flow_item_mark *mark;
6336         uint32_t value;
6337         uint32_t mask;
6338
6339         mark = item->mask ? (const void *)item->mask :
6340                             &rte_flow_item_mark_mask;
6341         mask = mark->id & priv->sh->dv_mark_mask;
6342         mark = (const void *)item->spec;
6343         MLX5_ASSERT(mark);
6344         value = mark->id & priv->sh->dv_mark_mask & mask;
6345         if (mask) {
6346                 enum modify_reg reg;
6347
6348                 /* Get the metadata register index for the mark. */
6349                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6350                 MLX5_ASSERT(reg > 0);
6351                 if (reg == REG_C_0) {
6352                         struct mlx5_priv *priv = dev->data->dev_private;
6353                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6354                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6355
6356                         mask &= msk_c0;
6357                         mask <<= shl_c0;
6358                         value <<= shl_c0;
6359                 }
6360                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6361         }
6362 }
6363
6364 /**
6365  * Add META item to matcher
6366  *
6367  * @param[in] dev
6368  *   The devich to configure through.
6369  * @param[in, out] matcher
6370  *   Flow matcher.
6371  * @param[in, out] key
6372  *   Flow matcher value.
6373  * @param[in] attr
6374  *   Attributes of flow that includes this item.
6375  * @param[in] item
6376  *   Flow pattern to translate.
6377  */
6378 static void
6379 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6380                             void *matcher, void *key,
6381                             const struct rte_flow_attr *attr,
6382                             const struct rte_flow_item *item)
6383 {
6384         const struct rte_flow_item_meta *meta_m;
6385         const struct rte_flow_item_meta *meta_v;
6386
6387         meta_m = (const void *)item->mask;
6388         if (!meta_m)
6389                 meta_m = &rte_flow_item_meta_mask;
6390         meta_v = (const void *)item->spec;
6391         if (meta_v) {
6392                 int reg;
6393                 uint32_t value = meta_v->data;
6394                 uint32_t mask = meta_m->data;
6395
6396                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6397                 if (reg < 0)
6398                         return;
6399                 /*
6400                  * In datapath code there is no endianness
6401                  * coversions for perfromance reasons, all
6402                  * pattern conversions are done in rte_flow.
6403                  */
6404                 value = rte_cpu_to_be_32(value);
6405                 mask = rte_cpu_to_be_32(mask);
6406                 if (reg == REG_C_0) {
6407                         struct mlx5_priv *priv = dev->data->dev_private;
6408                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6409                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6410 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6411                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6412
6413                         value >>= shr_c0;
6414                         mask >>= shr_c0;
6415 #endif
6416                         value <<= shl_c0;
6417                         mask <<= shl_c0;
6418                         MLX5_ASSERT(msk_c0);
6419                         MLX5_ASSERT(!(~msk_c0 & mask));
6420                 }
6421                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6422         }
6423 }
6424
6425 /**
6426  * Add vport metadata Reg C0 item to matcher
6427  *
6428  * @param[in, out] matcher
6429  *   Flow matcher.
6430  * @param[in, out] key
6431  *   Flow matcher value.
6432  * @param[in] reg
6433  *   Flow pattern to translate.
6434  */
6435 static void
6436 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6437                                   uint32_t value, uint32_t mask)
6438 {
6439         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6440 }
6441
6442 /**
6443  * Add tag item to matcher
6444  *
6445  * @param[in] dev
6446  *   The devich to configure through.
6447  * @param[in, out] matcher
6448  *   Flow matcher.
6449  * @param[in, out] key
6450  *   Flow matcher value.
6451  * @param[in] item
6452  *   Flow pattern to translate.
6453  */
6454 static void
6455 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6456                                 void *matcher, void *key,
6457                                 const struct rte_flow_item *item)
6458 {
6459         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6460         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6461         uint32_t mask, value;
6462
6463         MLX5_ASSERT(tag_v);
6464         value = tag_v->data;
6465         mask = tag_m ? tag_m->data : UINT32_MAX;
6466         if (tag_v->id == REG_C_0) {
6467                 struct mlx5_priv *priv = dev->data->dev_private;
6468                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6469                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6470
6471                 mask &= msk_c0;
6472                 mask <<= shl_c0;
6473                 value <<= shl_c0;
6474         }
6475         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6476 }
6477
6478 /**
6479  * Add TAG item to matcher
6480  *
6481  * @param[in] dev
6482  *   The devich to configure through.
6483  * @param[in, out] matcher
6484  *   Flow matcher.
6485  * @param[in, out] key
6486  *   Flow matcher value.
6487  * @param[in] item
6488  *   Flow pattern to translate.
6489  */
6490 static void
6491 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6492                            void *matcher, void *key,
6493                            const struct rte_flow_item *item)
6494 {
6495         const struct rte_flow_item_tag *tag_v = item->spec;
6496         const struct rte_flow_item_tag *tag_m = item->mask;
6497         enum modify_reg reg;
6498
6499         MLX5_ASSERT(tag_v);
6500         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6501         /* Get the metadata register index for the tag. */
6502         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6503         MLX5_ASSERT(reg > 0);
6504         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6505 }
6506
6507 /**
6508  * Add source vport match to the specified matcher.
6509  *
6510  * @param[in, out] matcher
6511  *   Flow matcher.
6512  * @param[in, out] key
6513  *   Flow matcher value.
6514  * @param[in] port
6515  *   Source vport value to match
6516  * @param[in] mask
6517  *   Mask
6518  */
6519 static void
6520 flow_dv_translate_item_source_vport(void *matcher, void *key,
6521                                     int16_t port, uint16_t mask)
6522 {
6523         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6524         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6525
6526         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6527         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6528 }
6529
6530 /**
6531  * Translate port-id item to eswitch match on  port-id.
6532  *
6533  * @param[in] dev
6534  *   The devich to configure through.
6535  * @param[in, out] matcher
6536  *   Flow matcher.
6537  * @param[in, out] key
6538  *   Flow matcher value.
6539  * @param[in] item
6540  *   Flow pattern to translate.
6541  *
6542  * @return
6543  *   0 on success, a negative errno value otherwise.
6544  */
6545 static int
6546 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6547                                void *key, const struct rte_flow_item *item)
6548 {
6549         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6550         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6551         struct mlx5_priv *priv;
6552         uint16_t mask, id;
6553
6554         mask = pid_m ? pid_m->id : 0xffff;
6555         id = pid_v ? pid_v->id : dev->data->port_id;
6556         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6557         if (!priv)
6558                 return -rte_errno;
6559         /* Translate to vport field or to metadata, depending on mode. */
6560         if (priv->vport_meta_mask)
6561                 flow_dv_translate_item_meta_vport(matcher, key,
6562                                                   priv->vport_meta_tag,
6563                                                   priv->vport_meta_mask);
6564         else
6565                 flow_dv_translate_item_source_vport(matcher, key,
6566                                                     priv->vport_id, mask);
6567         return 0;
6568 }
6569
6570 /**
6571  * Add ICMP6 item to matcher and to the value.
6572  *
6573  * @param[in, out] matcher
6574  *   Flow matcher.
6575  * @param[in, out] key
6576  *   Flow matcher value.
6577  * @param[in] item
6578  *   Flow pattern to translate.
6579  * @param[in] inner
6580  *   Item is inner pattern.
6581  */
6582 static void
6583 flow_dv_translate_item_icmp6(void *matcher, void *key,
6584                               const struct rte_flow_item *item,
6585                               int inner)
6586 {
6587         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6588         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6589         void *headers_m;
6590         void *headers_v;
6591         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6592                                      misc_parameters_3);
6593         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6594         if (inner) {
6595                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6596                                          inner_headers);
6597                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6598         } else {
6599                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6600                                          outer_headers);
6601                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6602         }
6603         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6604         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6605         if (!icmp6_v)
6606                 return;
6607         if (!icmp6_m)
6608                 icmp6_m = &rte_flow_item_icmp6_mask;
6609         /*
6610          * Force flow only to match the non-fragmented IPv6 ICMPv6 packets.
6611          * If only the protocol is specified, no need to match the frag.
6612          */
6613         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6614         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6615         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6616         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6617                  icmp6_v->type & icmp6_m->type);
6618         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6619         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6620                  icmp6_v->code & icmp6_m->code);
6621 }
6622
6623 /**
6624  * Add ICMP item to matcher and to the value.
6625  *
6626  * @param[in, out] matcher
6627  *   Flow matcher.
6628  * @param[in, out] key
6629  *   Flow matcher value.
6630  * @param[in] item
6631  *   Flow pattern to translate.
6632  * @param[in] inner
6633  *   Item is inner pattern.
6634  */
6635 static void
6636 flow_dv_translate_item_icmp(void *matcher, void *key,
6637                             const struct rte_flow_item *item,
6638                             int inner)
6639 {
6640         const struct rte_flow_item_icmp *icmp_m = item->mask;
6641         const struct rte_flow_item_icmp *icmp_v = item->spec;
6642         void *headers_m;
6643         void *headers_v;
6644         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6645                                      misc_parameters_3);
6646         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6647         if (inner) {
6648                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6649                                          inner_headers);
6650                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6651         } else {
6652                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6653                                          outer_headers);
6654                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6655         }
6656         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6657         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6658         if (!icmp_v)
6659                 return;
6660         if (!icmp_m)
6661                 icmp_m = &rte_flow_item_icmp_mask;
6662         /*
6663          * Force flow only to match the non-fragmented IPv4 ICMP packets.
6664          * If only the protocol is specified, no need to match the frag.
6665          */
6666         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6667         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6668         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6669                  icmp_m->hdr.icmp_type);
6670         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6671                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6672         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6673                  icmp_m->hdr.icmp_code);
6674         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6675                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6676 }
6677
6678 /**
6679  * Add GTP item to matcher and to the value.
6680  *
6681  * @param[in, out] matcher
6682  *   Flow matcher.
6683  * @param[in, out] key
6684  *   Flow matcher value.
6685  * @param[in] item
6686  *   Flow pattern to translate.
6687  * @param[in] inner
6688  *   Item is inner pattern.
6689  */
6690 static void
6691 flow_dv_translate_item_gtp(void *matcher, void *key,
6692                            const struct rte_flow_item *item, int inner)
6693 {
6694         const struct rte_flow_item_gtp *gtp_m = item->mask;
6695         const struct rte_flow_item_gtp *gtp_v = item->spec;
6696         void *headers_m;
6697         void *headers_v;
6698         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6699                                      misc_parameters_3);
6700         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6701         uint16_t dport = RTE_GTPU_UDP_PORT;
6702
6703         if (inner) {
6704                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6705                                          inner_headers);
6706                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6707         } else {
6708                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6709                                          outer_headers);
6710                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6711         }
6712         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6713                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6714                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6715         }
6716         if (!gtp_v)
6717                 return;
6718         if (!gtp_m)
6719                 gtp_m = &rte_flow_item_gtp_mask;
6720         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6721         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6722                  gtp_v->msg_type & gtp_m->msg_type);
6723         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6724                  rte_be_to_cpu_32(gtp_m->teid));
6725         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6726                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6727 }
6728
6729 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6730
6731 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6732         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6733                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6734
6735 /**
6736  * Calculate flow matcher enable bitmap.
6737  *
6738  * @param match_criteria
6739  *   Pointer to flow matcher criteria.
6740  *
6741  * @return
6742  *   Bitmap of enabled fields.
6743  */
6744 static uint8_t
6745 flow_dv_matcher_enable(uint32_t *match_criteria)
6746 {
6747         uint8_t match_criteria_enable;
6748
6749         match_criteria_enable =
6750                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6751                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6752         match_criteria_enable |=
6753                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6754                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6755         match_criteria_enable |=
6756                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6757                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6758         match_criteria_enable |=
6759                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6760                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6761         match_criteria_enable |=
6762                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6763                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6764         return match_criteria_enable;
6765 }
6766
6767
6768 /**
6769  * Get a flow table.
6770  *
6771  * @param[in, out] dev
6772  *   Pointer to rte_eth_dev structure.
6773  * @param[in] table_id
6774  *   Table id to use.
6775  * @param[in] egress
6776  *   Direction of the table.
6777  * @param[in] transfer
6778  *   E-Switch or NIC flow.
6779  * @param[out] error
6780  *   pointer to error structure.
6781  *
6782  * @return
6783  *   Returns tables resource based on the index, NULL in case of failed.
6784  */
6785 static struct mlx5_flow_tbl_resource *
6786 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6787                          uint32_t table_id, uint8_t egress,
6788                          uint8_t transfer,
6789                          struct rte_flow_error *error)
6790 {
6791         struct mlx5_priv *priv = dev->data->dev_private;
6792         struct mlx5_ibv_shared *sh = priv->sh;
6793         struct mlx5_flow_tbl_resource *tbl;
6794         union mlx5_flow_tbl_key table_key = {
6795                 {
6796                         .table_id = table_id,
6797                         .reserved = 0,
6798                         .domain = !!transfer,
6799                         .direction = !!egress,
6800                 }
6801         };
6802         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6803                                                          table_key.v64);
6804         struct mlx5_flow_tbl_data_entry *tbl_data;
6805         int ret;
6806         void *domain;
6807
6808         if (pos) {
6809                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6810                                         entry);
6811                 tbl = &tbl_data->tbl;
6812                 rte_atomic32_inc(&tbl->refcnt);
6813                 return tbl;
6814         }
6815         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6816         if (!tbl_data) {
6817                 rte_flow_error_set(error, ENOMEM,
6818                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6819                                    NULL,
6820                                    "cannot allocate flow table data entry");
6821                 return NULL;
6822         }
6823         tbl = &tbl_data->tbl;
6824         pos = &tbl_data->entry;
6825         if (transfer)
6826                 domain = sh->fdb_domain;
6827         else if (egress)
6828                 domain = sh->tx_domain;
6829         else
6830                 domain = sh->rx_domain;
6831         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6832         if (!tbl->obj) {
6833                 rte_flow_error_set(error, ENOMEM,
6834                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6835                                    NULL, "cannot create flow table object");
6836                 rte_free(tbl_data);
6837                 return NULL;
6838         }
6839         /*
6840          * No multi-threads now, but still better to initialize the reference
6841          * count before insert it into the hash list.
6842          */
6843         rte_atomic32_init(&tbl->refcnt);
6844         /* Jump action reference count is initialized here. */
6845         rte_atomic32_init(&tbl_data->jump.refcnt);
6846         pos->key = table_key.v64;
6847         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6848         if (ret < 0) {
6849                 rte_flow_error_set(error, -ret,
6850                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6851                                    "cannot insert flow table data entry");
6852                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6853                 rte_free(tbl_data);
6854         }
6855         rte_atomic32_inc(&tbl->refcnt);
6856         return tbl;
6857 }
6858
6859 /**
6860  * Release a flow table.
6861  *
6862  * @param[in] dev
6863  *   Pointer to rte_eth_dev structure.
6864  * @param[in] tbl
6865  *   Table resource to be released.
6866  *
6867  * @return
6868  *   Returns 0 if table was released, else return 1;
6869  */
6870 static int
6871 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6872                              struct mlx5_flow_tbl_resource *tbl)
6873 {
6874         struct mlx5_priv *priv = dev->data->dev_private;
6875         struct mlx5_ibv_shared *sh = priv->sh;
6876         struct mlx5_flow_tbl_data_entry *tbl_data =
6877                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6878
6879         if (!tbl)
6880                 return 0;
6881         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6882                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6883
6884                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6885                 tbl->obj = NULL;
6886                 /* remove the entry from the hash list and free memory. */
6887                 mlx5_hlist_remove(sh->flow_tbls, pos);
6888                 rte_free(tbl_data);
6889                 return 0;
6890         }
6891         return 1;
6892 }
6893
6894 /**
6895  * Register the flow matcher.
6896  *
6897  * @param[in, out] dev
6898  *   Pointer to rte_eth_dev structure.
6899  * @param[in, out] matcher
6900  *   Pointer to flow matcher.
6901  * @param[in, out] key
6902  *   Pointer to flow table key.
6903  * @parm[in, out] dev_flow
6904  *   Pointer to the dev_flow.
6905  * @param[out] error
6906  *   pointer to error structure.
6907  *
6908  * @return
6909  *   0 on success otherwise -errno and errno is set.
6910  */
6911 static int
6912 flow_dv_matcher_register(struct rte_eth_dev *dev,
6913                          struct mlx5_flow_dv_matcher *matcher,
6914                          union mlx5_flow_tbl_key *key,
6915                          struct mlx5_flow *dev_flow,
6916                          struct rte_flow_error *error)
6917 {
6918         struct mlx5_priv *priv = dev->data->dev_private;
6919         struct mlx5_ibv_shared *sh = priv->sh;
6920         struct mlx5_flow_dv_matcher *cache_matcher;
6921         struct mlx5dv_flow_matcher_attr dv_attr = {
6922                 .type = IBV_FLOW_ATTR_NORMAL,
6923                 .match_mask = (void *)&matcher->mask,
6924         };
6925         struct mlx5_flow_tbl_resource *tbl;
6926         struct mlx5_flow_tbl_data_entry *tbl_data;
6927
6928         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6929                                        key->domain, error);
6930         if (!tbl)
6931                 return -rte_errno;      /* No need to refill the error info */
6932         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6933         /* Lookup from cache. */
6934         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6935                 if (matcher->crc == cache_matcher->crc &&
6936                     matcher->priority == cache_matcher->priority &&
6937                     !memcmp((const void *)matcher->mask.buf,
6938                             (const void *)cache_matcher->mask.buf,
6939                             cache_matcher->mask.size)) {
6940                         DRV_LOG(DEBUG,
6941                                 "%s group %u priority %hd use %s "
6942                                 "matcher %p: refcnt %d++",
6943                                 key->domain ? "FDB" : "NIC", key->table_id,
6944                                 cache_matcher->priority,
6945                                 key->direction ? "tx" : "rx",
6946                                 (void *)cache_matcher,
6947                                 rte_atomic32_read(&cache_matcher->refcnt));
6948                         rte_atomic32_inc(&cache_matcher->refcnt);
6949                         dev_flow->dv.matcher = cache_matcher;
6950                         /* old matcher should not make the table ref++. */
6951                         flow_dv_tbl_resource_release(dev, tbl);
6952                         return 0;
6953                 }
6954         }
6955         /* Register new matcher. */
6956         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6957         if (!cache_matcher) {
6958                 flow_dv_tbl_resource_release(dev, tbl);
6959                 return rte_flow_error_set(error, ENOMEM,
6960                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6961                                           "cannot allocate matcher memory");
6962         }
6963         *cache_matcher = *matcher;
6964         dv_attr.match_criteria_enable =
6965                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6966         dv_attr.priority = matcher->priority;
6967         if (key->direction)
6968                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6969         cache_matcher->matcher_object =
6970                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6971         if (!cache_matcher->matcher_object) {
6972                 rte_free(cache_matcher);
6973 #ifdef HAVE_MLX5DV_DR
6974                 flow_dv_tbl_resource_release(dev, tbl);
6975 #endif
6976                 return rte_flow_error_set(error, ENOMEM,
6977                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6978                                           NULL, "cannot create matcher");
6979         }
6980         /* Save the table information */
6981         cache_matcher->tbl = tbl;
6982         rte_atomic32_init(&cache_matcher->refcnt);
6983         /* only matcher ref++, table ref++ already done above in get API. */
6984         rte_atomic32_inc(&cache_matcher->refcnt);
6985         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6986         dev_flow->dv.matcher = cache_matcher;
6987         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6988                 key->domain ? "FDB" : "NIC", key->table_id,
6989                 cache_matcher->priority,
6990                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6991                 rte_atomic32_read(&cache_matcher->refcnt));
6992         return 0;
6993 }
6994
6995 /**
6996  * Find existing tag resource or create and register a new one.
6997  *
6998  * @param dev[in, out]
6999  *   Pointer to rte_eth_dev structure.
7000  * @param[in, out] tag_be24
7001  *   Tag value in big endian then R-shift 8.
7002  * @parm[in, out] dev_flow
7003  *   Pointer to the dev_flow.
7004  * @param[out] error
7005  *   pointer to error structure.
7006  *
7007  * @return
7008  *   0 on success otherwise -errno and errno is set.
7009  */
7010 static int
7011 flow_dv_tag_resource_register
7012                         (struct rte_eth_dev *dev,
7013                          uint32_t tag_be24,
7014                          struct mlx5_flow *dev_flow,
7015                          struct rte_flow_error *error)
7016 {
7017         struct mlx5_priv *priv = dev->data->dev_private;
7018         struct mlx5_ibv_shared *sh = priv->sh;
7019         struct mlx5_flow_dv_tag_resource *cache_resource;
7020         struct mlx5_hlist_entry *entry;
7021
7022         /* Lookup a matching resource from cache. */
7023         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
7024         if (entry) {
7025                 cache_resource = container_of
7026                         (entry, struct mlx5_flow_dv_tag_resource, entry);
7027                 rte_atomic32_inc(&cache_resource->refcnt);
7028                 dev_flow->dv.tag_resource = cache_resource;
7029                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
7030                         (void *)cache_resource,
7031                         rte_atomic32_read(&cache_resource->refcnt));
7032                 return 0;
7033         }
7034         /* Register new resource. */
7035         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
7036         if (!cache_resource)
7037                 return rte_flow_error_set(error, ENOMEM,
7038                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7039                                           "cannot allocate resource memory");
7040         cache_resource->entry.key = (uint64_t)tag_be24;
7041         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
7042         if (!cache_resource->action) {
7043                 rte_free(cache_resource);
7044                 return rte_flow_error_set(error, ENOMEM,
7045                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7046                                           NULL, "cannot create action");
7047         }
7048         rte_atomic32_init(&cache_resource->refcnt);
7049         rte_atomic32_inc(&cache_resource->refcnt);
7050         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
7051                 mlx5_glue->destroy_flow_action(cache_resource->action);
7052                 rte_free(cache_resource);
7053                 return rte_flow_error_set(error, EEXIST,
7054                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7055                                           NULL, "cannot insert tag");
7056         }
7057         dev_flow->dv.tag_resource = cache_resource;
7058         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
7059                 (void *)cache_resource,
7060                 rte_atomic32_read(&cache_resource->refcnt));
7061         return 0;
7062 }
7063
7064 /**
7065  * Release the tag.
7066  *
7067  * @param dev
7068  *   Pointer to Ethernet device.
7069  * @param flow
7070  *   Pointer to mlx5_flow.
7071  *
7072  * @return
7073  *   1 while a reference on it exists, 0 when freed.
7074  */
7075 static int
7076 flow_dv_tag_release(struct rte_eth_dev *dev,
7077                     struct mlx5_flow_dv_tag_resource *tag)
7078 {
7079         struct mlx5_priv *priv = dev->data->dev_private;
7080         struct mlx5_ibv_shared *sh = priv->sh;
7081
7082         MLX5_ASSERT(tag);
7083         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
7084                 dev->data->port_id, (void *)tag,
7085                 rte_atomic32_read(&tag->refcnt));
7086         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
7087                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
7088                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
7089                 DRV_LOG(DEBUG, "port %u tag %p: removed",
7090                         dev->data->port_id, (void *)tag);
7091                 rte_free(tag);
7092                 return 0;
7093         }
7094         return 1;
7095 }
7096
7097 /**
7098  * Translate port ID action to vport.
7099  *
7100  * @param[in] dev
7101  *   Pointer to rte_eth_dev structure.
7102  * @param[in] action
7103  *   Pointer to the port ID action.
7104  * @param[out] dst_port_id
7105  *   The target port ID.
7106  * @param[out] error
7107  *   Pointer to the error structure.
7108  *
7109  * @return
7110  *   0 on success, a negative errno value otherwise and rte_errno is set.
7111  */
7112 static int
7113 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
7114                                  const struct rte_flow_action *action,
7115                                  uint32_t *dst_port_id,
7116                                  struct rte_flow_error *error)
7117 {
7118         uint32_t port;
7119         struct mlx5_priv *priv;
7120         const struct rte_flow_action_port_id *conf =
7121                         (const struct rte_flow_action_port_id *)action->conf;
7122
7123         port = conf->original ? dev->data->port_id : conf->id;
7124         priv = mlx5_port_to_eswitch_info(port, false);
7125         if (!priv)
7126                 return rte_flow_error_set(error, -rte_errno,
7127                                           RTE_FLOW_ERROR_TYPE_ACTION,
7128                                           NULL,
7129                                           "No eswitch info was found for port");
7130 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
7131         /*
7132          * This parameter is transferred to
7133          * mlx5dv_dr_action_create_dest_ib_port().
7134          */
7135         *dst_port_id = priv->ibv_port;
7136 #else
7137         /*
7138          * Legacy mode, no LAG configurations is supported.
7139          * This parameter is transferred to
7140          * mlx5dv_dr_action_create_dest_vport().
7141          */
7142         *dst_port_id = priv->vport_id;
7143 #endif
7144         return 0;
7145 }
7146
7147 /**
7148  * Add Tx queue matcher
7149  *
7150  * @param[in] dev
7151  *   Pointer to the dev struct.
7152  * @param[in, out] matcher
7153  *   Flow matcher.
7154  * @param[in, out] key
7155  *   Flow matcher value.
7156  * @param[in] item
7157  *   Flow pattern to translate.
7158  * @param[in] inner
7159  *   Item is inner pattern.
7160  */
7161 static void
7162 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
7163                                 void *matcher, void *key,
7164                                 const struct rte_flow_item *item)
7165 {
7166         const struct mlx5_rte_flow_item_tx_queue *queue_m;
7167         const struct mlx5_rte_flow_item_tx_queue *queue_v;
7168         void *misc_m =
7169                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7170         void *misc_v =
7171                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7172         struct mlx5_txq_ctrl *txq;
7173         uint32_t queue;
7174
7175
7176         queue_m = (const void *)item->mask;
7177         if (!queue_m)
7178                 return;
7179         queue_v = (const void *)item->spec;
7180         if (!queue_v)
7181                 return;
7182         txq = mlx5_txq_get(dev, queue_v->queue);
7183         if (!txq)
7184                 return;
7185         queue = txq->obj->sq->id;
7186         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
7187         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
7188                  queue & queue_m->queue);
7189         mlx5_txq_release(dev, queue_v->queue);
7190 }
7191
7192 /**
7193  * Set the hash fields according to the @p flow information.
7194  *
7195  * @param[in] dev_flow
7196  *   Pointer to the mlx5_flow.
7197  */
7198 static void
7199 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
7200 {
7201         struct rte_flow *flow = dev_flow->flow;
7202         uint64_t items = dev_flow->layers;
7203         int rss_inner = 0;
7204         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
7205
7206         dev_flow->hash_fields = 0;
7207 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
7208         if (flow->rss.level >= 2) {
7209                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
7210                 rss_inner = 1;
7211         }
7212 #endif
7213         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
7214             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
7215                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
7216                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7217                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
7218                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7219                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
7220                         else
7221                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
7222                 }
7223         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
7224                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
7225                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
7226                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7227                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
7228                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7229                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
7230                         else
7231                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
7232                 }
7233         }
7234         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
7235             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
7236                 if (rss_types & ETH_RSS_UDP) {
7237                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7238                                 dev_flow->hash_fields |=
7239                                                 IBV_RX_HASH_SRC_PORT_UDP;
7240                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7241                                 dev_flow->hash_fields |=
7242                                                 IBV_RX_HASH_DST_PORT_UDP;
7243                         else
7244                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
7245                 }
7246         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
7247                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
7248                 if (rss_types & ETH_RSS_TCP) {
7249                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7250                                 dev_flow->hash_fields |=
7251                                                 IBV_RX_HASH_SRC_PORT_TCP;
7252                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7253                                 dev_flow->hash_fields |=
7254                                                 IBV_RX_HASH_DST_PORT_TCP;
7255                         else
7256                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
7257                 }
7258         }
7259 }
7260
7261 /**
7262  * Fill the flow with DV spec, lock free
7263  * (mutex should be acquired by caller).
7264  *
7265  * @param[in] dev
7266  *   Pointer to rte_eth_dev structure.
7267  * @param[in, out] dev_flow
7268  *   Pointer to the sub flow.
7269  * @param[in] attr
7270  *   Pointer to the flow attributes.
7271  * @param[in] items
7272  *   Pointer to the list of items.
7273  * @param[in] actions
7274  *   Pointer to the list of actions.
7275  * @param[out] error
7276  *   Pointer to the error structure.
7277  *
7278  * @return
7279  *   0 on success, a negative errno value otherwise and rte_errno is set.
7280  */
7281 static int
7282 __flow_dv_translate(struct rte_eth_dev *dev,
7283                     struct mlx5_flow *dev_flow,
7284                     const struct rte_flow_attr *attr,
7285                     const struct rte_flow_item items[],
7286                     const struct rte_flow_action actions[],
7287                     struct rte_flow_error *error)
7288 {
7289         struct mlx5_priv *priv = dev->data->dev_private;
7290         struct mlx5_dev_config *dev_conf = &priv->config;
7291         struct rte_flow *flow = dev_flow->flow;
7292         uint64_t item_flags = 0;
7293         uint64_t last_item = 0;
7294         uint64_t action_flags = 0;
7295         uint64_t priority = attr->priority;
7296         struct mlx5_flow_dv_matcher matcher = {
7297                 .mask = {
7298                         .size = sizeof(matcher.mask.buf),
7299                 },
7300         };
7301         int actions_n = 0;
7302         bool actions_end = false;
7303         union {
7304                 struct mlx5_flow_dv_modify_hdr_resource res;
7305                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7306                             sizeof(struct mlx5_modification_cmd) *
7307                             (MLX5_MAX_MODIFY_NUM + 1)];
7308         } mhdr_dummy;
7309         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7310         union flow_dv_attr flow_attr = { .attr = 0 };
7311         uint32_t tag_be;
7312         union mlx5_flow_tbl_key tbl_key;
7313         uint32_t modify_action_position = UINT32_MAX;
7314         void *match_mask = matcher.mask.buf;
7315         void *match_value = dev_flow->dv.value.buf;
7316         uint8_t next_protocol = 0xff;
7317         struct rte_vlan_hdr vlan = { 0 };
7318         uint32_t table;
7319         int ret = 0;
7320
7321         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7322                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7323         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7324                                        !!priv->fdb_def_rule, &table, error);
7325         if (ret)
7326                 return ret;
7327         dev_flow->group = table;
7328         if (attr->transfer)
7329                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7330         if (priority == MLX5_FLOW_PRIO_RSVD)
7331                 priority = dev_conf->flow_prio - 1;
7332         /* number of actions must be set to 0 in case of dirty stack. */
7333         mhdr_res->actions_num = 0;
7334         for (; !actions_end ; actions++) {
7335                 const struct rte_flow_action_queue *queue;
7336                 const struct rte_flow_action_rss *rss;
7337                 const struct rte_flow_action *action = actions;
7338                 const struct rte_flow_action_count *count = action->conf;
7339                 const uint8_t *rss_key;
7340                 const struct rte_flow_action_jump *jump_data;
7341                 const struct rte_flow_action_meter *mtr;
7342                 struct mlx5_flow_tbl_resource *tbl;
7343                 uint32_t port_id = 0;
7344                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7345                 int action_type = actions->type;
7346                 const struct rte_flow_action *found_action = NULL;
7347
7348                 switch (action_type) {
7349                 case RTE_FLOW_ACTION_TYPE_VOID:
7350                         break;
7351                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7352                         if (flow_dv_translate_action_port_id(dev, action,
7353                                                              &port_id, error))
7354                                 return -rte_errno;
7355                         port_id_resource.port_id = port_id;
7356                         if (flow_dv_port_id_action_resource_register
7357                             (dev, &port_id_resource, dev_flow, error))
7358                                 return -rte_errno;
7359                         dev_flow->dv.actions[actions_n++] =
7360                                 dev_flow->dv.port_id_action->action;
7361                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7362                         break;
7363                 case RTE_FLOW_ACTION_TYPE_FLAG:
7364                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7365                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7366                                 struct rte_flow_action_mark mark = {
7367                                         .id = MLX5_FLOW_MARK_DEFAULT,
7368                                 };
7369
7370                                 if (flow_dv_convert_action_mark(dev, &mark,
7371                                                                 mhdr_res,
7372                                                                 error))
7373                                         return -rte_errno;
7374                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7375                                 break;
7376                         }
7377                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7378                         if (!dev_flow->dv.tag_resource)
7379                                 if (flow_dv_tag_resource_register
7380                                     (dev, tag_be, dev_flow, error))
7381                                         return -rte_errno;
7382                         dev_flow->dv.actions[actions_n++] =
7383                                 dev_flow->dv.tag_resource->action;
7384                         break;
7385                 case RTE_FLOW_ACTION_TYPE_MARK:
7386                         action_flags |= MLX5_FLOW_ACTION_MARK;
7387                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7388                                 const struct rte_flow_action_mark *mark =
7389                                         (const struct rte_flow_action_mark *)
7390                                                 actions->conf;
7391
7392                                 if (flow_dv_convert_action_mark(dev, mark,
7393                                                                 mhdr_res,
7394                                                                 error))
7395                                         return -rte_errno;
7396                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7397                                 break;
7398                         }
7399                         /* Fall-through */
7400                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7401                         /* Legacy (non-extensive) MARK action. */
7402                         tag_be = mlx5_flow_mark_set
7403                               (((const struct rte_flow_action_mark *)
7404                                (actions->conf))->id);
7405                         if (!dev_flow->dv.tag_resource)
7406                                 if (flow_dv_tag_resource_register
7407                                     (dev, tag_be, dev_flow, error))
7408                                         return -rte_errno;
7409                         dev_flow->dv.actions[actions_n++] =
7410                                 dev_flow->dv.tag_resource->action;
7411                         break;
7412                 case RTE_FLOW_ACTION_TYPE_SET_META:
7413                         if (flow_dv_convert_action_set_meta
7414                                 (dev, mhdr_res, attr,
7415                                  (const struct rte_flow_action_set_meta *)
7416                                   actions->conf, error))
7417                                 return -rte_errno;
7418                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7419                         break;
7420                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7421                         if (flow_dv_convert_action_set_tag
7422                                 (dev, mhdr_res,
7423                                  (const struct rte_flow_action_set_tag *)
7424                                   actions->conf, error))
7425                                 return -rte_errno;
7426                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7427                         break;
7428                 case RTE_FLOW_ACTION_TYPE_DROP:
7429                         action_flags |= MLX5_FLOW_ACTION_DROP;
7430                         break;
7431                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7432                         MLX5_ASSERT(flow->rss.queue);
7433                         queue = actions->conf;
7434                         flow->rss.queue_num = 1;
7435                         (*flow->rss.queue)[0] = queue->index;
7436                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7437                         break;
7438                 case RTE_FLOW_ACTION_TYPE_RSS:
7439                         MLX5_ASSERT(flow->rss.queue);
7440                         rss = actions->conf;
7441                         if (flow->rss.queue)
7442                                 memcpy((*flow->rss.queue), rss->queue,
7443                                        rss->queue_num * sizeof(uint16_t));
7444                         flow->rss.queue_num = rss->queue_num;
7445                         /* NULL RSS key indicates default RSS key. */
7446                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7447                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7448                         /*
7449                          * rss->level and rss.types should be set in advance
7450                          * when expanding items for RSS.
7451                          */
7452                         action_flags |= MLX5_FLOW_ACTION_RSS;
7453                         break;
7454                 case RTE_FLOW_ACTION_TYPE_COUNT:
7455                         if (!dev_conf->devx) {
7456                                 rte_errno = ENOTSUP;
7457                                 goto cnt_err;
7458                         }
7459                         flow->counter = flow_dv_counter_alloc(dev,
7460                                                               count->shared,
7461                                                               count->id,
7462                                                               dev_flow->group);
7463                         if (flow->counter == NULL)
7464                                 goto cnt_err;
7465                         dev_flow->dv.actions[actions_n++] =
7466                                 flow->counter->action;
7467                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7468                         break;
7469 cnt_err:
7470                         if (rte_errno == ENOTSUP)
7471                                 return rte_flow_error_set
7472                                               (error, ENOTSUP,
7473                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7474                                                NULL,
7475                                                "count action not supported");
7476                         else
7477                                 return rte_flow_error_set
7478                                                 (error, rte_errno,
7479                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7480                                                  action,
7481                                                  "cannot create counter"
7482                                                   " object.");
7483                         break;
7484                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7485                         dev_flow->dv.actions[actions_n++] =
7486                                                 priv->sh->pop_vlan_action;
7487                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7488                         break;
7489                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7490                         flow_dev_get_vlan_info_from_items(items, &vlan);
7491                         vlan.eth_proto = rte_be_to_cpu_16
7492                              ((((const struct rte_flow_action_of_push_vlan *)
7493                                                    actions->conf)->ethertype));
7494                         found_action = mlx5_flow_find_action
7495                                         (actions + 1,
7496                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7497                         if (found_action)
7498                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7499                         found_action = mlx5_flow_find_action
7500                                         (actions + 1,
7501                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7502                         if (found_action)
7503                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7504                         if (flow_dv_create_action_push_vlan
7505                                             (dev, attr, &vlan, dev_flow, error))
7506                                 return -rte_errno;
7507                         dev_flow->dv.actions[actions_n++] =
7508                                            dev_flow->dv.push_vlan_res->action;
7509                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7510                         break;
7511                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7512                         /* of_vlan_push action handled this action */
7513                         MLX5_ASSERT(action_flags &
7514                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7515                         break;
7516                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7517                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7518                                 break;
7519                         flow_dev_get_vlan_info_from_items(items, &vlan);
7520                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7521                         /* If no VLAN push - this is a modify header action */
7522                         if (flow_dv_convert_action_modify_vlan_vid
7523                                                 (mhdr_res, actions, error))
7524                                 return -rte_errno;
7525                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7526                         break;
7527                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7528                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7529                         if (flow_dv_create_action_l2_encap(dev, actions,
7530                                                            dev_flow,
7531                                                            attr->transfer,
7532                                                            error))
7533                                 return -rte_errno;
7534                         dev_flow->dv.actions[actions_n++] =
7535                                 dev_flow->dv.encap_decap->verbs_action;
7536                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7537                         break;
7538                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7539                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7540                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7541                                                            attr->transfer,
7542                                                            error))
7543                                 return -rte_errno;
7544                         dev_flow->dv.actions[actions_n++] =
7545                                 dev_flow->dv.encap_decap->verbs_action;
7546                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7547                         break;
7548                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7549                         /* Handle encap with preceding decap. */
7550                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
7551                                 if (flow_dv_create_action_raw_encap
7552                                         (dev, actions, dev_flow, attr, error))
7553                                         return -rte_errno;
7554                                 dev_flow->dv.actions[actions_n++] =
7555                                         dev_flow->dv.encap_decap->verbs_action;
7556                         } else {
7557                                 /* Handle encap without preceding decap. */
7558                                 if (flow_dv_create_action_l2_encap
7559                                     (dev, actions, dev_flow, attr->transfer,
7560                                      error))
7561                                         return -rte_errno;
7562                                 dev_flow->dv.actions[actions_n++] =
7563                                         dev_flow->dv.encap_decap->verbs_action;
7564                         }
7565                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7566                         break;
7567                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7568                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
7569                                 ;
7570                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7571                                 if (flow_dv_create_action_l2_decap
7572                                     (dev, dev_flow, attr->transfer, error))
7573                                         return -rte_errno;
7574                                 dev_flow->dv.actions[actions_n++] =
7575                                         dev_flow->dv.encap_decap->verbs_action;
7576                         }
7577                         /* If decap is followed by encap, handle it at encap. */
7578                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7579                         break;
7580                 case RTE_FLOW_ACTION_TYPE_JUMP:
7581                         jump_data = action->conf;
7582                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7583                                                        jump_data->group,
7584                                                        !!priv->fdb_def_rule,
7585                                                        &table, error);
7586                         if (ret)
7587                                 return ret;
7588                         tbl = flow_dv_tbl_resource_get(dev, table,
7589                                                        attr->egress,
7590                                                        attr->transfer, error);
7591                         if (!tbl)
7592                                 return rte_flow_error_set
7593                                                 (error, errno,
7594                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7595                                                  NULL,
7596                                                  "cannot create jump action.");
7597                         if (flow_dv_jump_tbl_resource_register
7598                             (dev, tbl, dev_flow, error)) {
7599                                 flow_dv_tbl_resource_release(dev, tbl);
7600                                 return rte_flow_error_set
7601                                                 (error, errno,
7602                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7603                                                  NULL,
7604                                                  "cannot create jump action.");
7605                         }
7606                         dev_flow->dv.actions[actions_n++] =
7607                                 dev_flow->dv.jump->action;
7608                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7609                         break;
7610                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7611                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7612                         if (flow_dv_convert_action_modify_mac
7613                                         (mhdr_res, actions, error))
7614                                 return -rte_errno;
7615                         action_flags |= actions->type ==
7616                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7617                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7618                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7619                         break;
7620                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7621                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7622                         if (flow_dv_convert_action_modify_ipv4
7623                                         (mhdr_res, actions, error))
7624                                 return -rte_errno;
7625                         action_flags |= actions->type ==
7626                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7627                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7628                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7629                         break;
7630                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7631                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7632                         if (flow_dv_convert_action_modify_ipv6
7633                                         (mhdr_res, actions, error))
7634                                 return -rte_errno;
7635                         action_flags |= actions->type ==
7636                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7637                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7638                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7639                         break;
7640                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7641                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7642                         if (flow_dv_convert_action_modify_tp
7643                                         (mhdr_res, actions, items,
7644                                          &flow_attr, dev_flow, !!(action_flags &
7645                                          MLX5_FLOW_ACTION_DECAP), error))
7646                                 return -rte_errno;
7647                         action_flags |= actions->type ==
7648                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7649                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7650                                         MLX5_FLOW_ACTION_SET_TP_DST;
7651                         break;
7652                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7653                         if (flow_dv_convert_action_modify_dec_ttl
7654                                         (mhdr_res, items, &flow_attr, dev_flow,
7655                                          !!(action_flags &
7656                                          MLX5_FLOW_ACTION_DECAP), error))
7657                                 return -rte_errno;
7658                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7659                         break;
7660                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7661                         if (flow_dv_convert_action_modify_ttl
7662                                         (mhdr_res, actions, items, &flow_attr,
7663                                          dev_flow, !!(action_flags &
7664                                          MLX5_FLOW_ACTION_DECAP), error))
7665                                 return -rte_errno;
7666                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7667                         break;
7668                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7669                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7670                         if (flow_dv_convert_action_modify_tcp_seq
7671                                         (mhdr_res, actions, error))
7672                                 return -rte_errno;
7673                         action_flags |= actions->type ==
7674                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7675                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7676                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7677                         break;
7678
7679                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7680                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7681                         if (flow_dv_convert_action_modify_tcp_ack
7682                                         (mhdr_res, actions, error))
7683                                 return -rte_errno;
7684                         action_flags |= actions->type ==
7685                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7686                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7687                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7688                         break;
7689                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7690                         if (flow_dv_convert_action_set_reg
7691                                         (mhdr_res, actions, error))
7692                                 return -rte_errno;
7693                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7694                         break;
7695                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7696                         if (flow_dv_convert_action_copy_mreg
7697                                         (dev, mhdr_res, actions, error))
7698                                 return -rte_errno;
7699                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7700                         break;
7701                 case RTE_FLOW_ACTION_TYPE_METER:
7702                         mtr = actions->conf;
7703                         if (!flow->meter) {
7704                                 flow->meter = mlx5_flow_meter_attach(priv,
7705                                                         mtr->mtr_id, attr,
7706                                                         error);
7707                                 if (!flow->meter)
7708                                         return rte_flow_error_set(error,
7709                                                 rte_errno,
7710                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7711                                                 NULL,
7712                                                 "meter not found "
7713                                                 "or invalid parameters");
7714                         }
7715                         /* Set the meter action. */
7716                         dev_flow->dv.actions[actions_n++] =
7717                                 flow->meter->mfts->meter_action;
7718                         action_flags |= MLX5_FLOW_ACTION_METER;
7719                         break;
7720                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7721                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7722                                                               actions, error))
7723                                 return -rte_errno;
7724                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7725                         break;
7726                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7727                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7728                                                               actions, error))
7729                                 return -rte_errno;
7730                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7731                         break;
7732                 case RTE_FLOW_ACTION_TYPE_END:
7733                         actions_end = true;
7734                         if (mhdr_res->actions_num) {
7735                                 /* create modify action if needed. */
7736                                 if (flow_dv_modify_hdr_resource_register
7737                                         (dev, mhdr_res, dev_flow, error))
7738                                         return -rte_errno;
7739                                 dev_flow->dv.actions[modify_action_position] =
7740                                         dev_flow->dv.modify_hdr->verbs_action;
7741                         }
7742                         break;
7743                 default:
7744                         break;
7745                 }
7746                 if (mhdr_res->actions_num &&
7747                     modify_action_position == UINT32_MAX)
7748                         modify_action_position = actions_n++;
7749         }
7750         dev_flow->dv.actions_n = actions_n;
7751         dev_flow->actions = action_flags;
7752         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7753                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7754                 int item_type = items->type;
7755
7756                 switch (item_type) {
7757                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7758                         flow_dv_translate_item_port_id(dev, match_mask,
7759                                                        match_value, items);
7760                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7761                         break;
7762                 case RTE_FLOW_ITEM_TYPE_ETH:
7763                         flow_dv_translate_item_eth(match_mask, match_value,
7764                                                    items, tunnel);
7765                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7766                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7767                                              MLX5_FLOW_LAYER_OUTER_L2;
7768                         break;
7769                 case RTE_FLOW_ITEM_TYPE_VLAN:
7770                         flow_dv_translate_item_vlan(dev_flow,
7771                                                     match_mask, match_value,
7772                                                     items, tunnel);
7773                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7774                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7775                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7776                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7777                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7778                         break;
7779                 case RTE_FLOW_ITEM_TYPE_IPV4:
7780                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7781                                                   &item_flags, &tunnel);
7782                         flow_dv_translate_item_ipv4(match_mask, match_value,
7783                                                     items, item_flags, tunnel,
7784                                                     dev_flow->group);
7785                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7786                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7787                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7788                         if (items->mask != NULL &&
7789                             ((const struct rte_flow_item_ipv4 *)
7790                              items->mask)->hdr.next_proto_id) {
7791                                 next_protocol =
7792                                         ((const struct rte_flow_item_ipv4 *)
7793                                          (items->spec))->hdr.next_proto_id;
7794                                 next_protocol &=
7795                                         ((const struct rte_flow_item_ipv4 *)
7796                                          (items->mask))->hdr.next_proto_id;
7797                         } else {
7798                                 /* Reset for inner layer. */
7799                                 next_protocol = 0xff;
7800                         }
7801                         break;
7802                 case RTE_FLOW_ITEM_TYPE_IPV6:
7803                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7804                                                   &item_flags, &tunnel);
7805                         flow_dv_translate_item_ipv6(match_mask, match_value,
7806                                                     items, item_flags, tunnel,
7807                                                     dev_flow->group);
7808                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7809                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7810                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7811                         if (items->mask != NULL &&
7812                             ((const struct rte_flow_item_ipv6 *)
7813                              items->mask)->hdr.proto) {
7814                                 next_protocol =
7815                                         ((const struct rte_flow_item_ipv6 *)
7816                                          items->spec)->hdr.proto;
7817                                 next_protocol &=
7818                                         ((const struct rte_flow_item_ipv6 *)
7819                                          items->mask)->hdr.proto;
7820                         } else {
7821                                 /* Reset for inner layer. */
7822                                 next_protocol = 0xff;
7823                         }
7824                         break;
7825                 case RTE_FLOW_ITEM_TYPE_TCP:
7826                         flow_dv_translate_item_tcp(match_mask, match_value,
7827                                                    items, tunnel);
7828                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7829                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7830                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7831                         break;
7832                 case RTE_FLOW_ITEM_TYPE_UDP:
7833                         flow_dv_translate_item_udp(match_mask, match_value,
7834                                                    items, tunnel);
7835                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7836                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7837                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7838                         break;
7839                 case RTE_FLOW_ITEM_TYPE_GRE:
7840                         flow_dv_translate_item_gre(match_mask, match_value,
7841                                                    items, tunnel);
7842                         matcher.priority = flow->rss.level >= 2 ?
7843                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7844                         last_item = MLX5_FLOW_LAYER_GRE;
7845                         break;
7846                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7847                         flow_dv_translate_item_gre_key(match_mask,
7848                                                        match_value, items);
7849                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7850                         break;
7851                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7852                         flow_dv_translate_item_nvgre(match_mask, match_value,
7853                                                      items, tunnel);
7854                         matcher.priority = flow->rss.level >= 2 ?
7855                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7856                         last_item = MLX5_FLOW_LAYER_GRE;
7857                         break;
7858                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7859                         flow_dv_translate_item_vxlan(match_mask, match_value,
7860                                                      items, tunnel);
7861                         matcher.priority = flow->rss.level >= 2 ?
7862                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7863                         last_item = MLX5_FLOW_LAYER_VXLAN;
7864                         break;
7865                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7866                         flow_dv_translate_item_vxlan_gpe(match_mask,
7867                                                          match_value, items,
7868                                                          tunnel);
7869                         matcher.priority = flow->rss.level >= 2 ?
7870                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7871                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7872                         break;
7873                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7874                         flow_dv_translate_item_geneve(match_mask, match_value,
7875                                                       items, tunnel);
7876                         matcher.priority = flow->rss.level >= 2 ?
7877                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7878                         last_item = MLX5_FLOW_LAYER_GENEVE;
7879                         break;
7880                 case RTE_FLOW_ITEM_TYPE_MPLS:
7881                         flow_dv_translate_item_mpls(match_mask, match_value,
7882                                                     items, last_item, tunnel);
7883                         matcher.priority = flow->rss.level >= 2 ?
7884                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7885                         last_item = MLX5_FLOW_LAYER_MPLS;
7886                         break;
7887                 case RTE_FLOW_ITEM_TYPE_MARK:
7888                         flow_dv_translate_item_mark(dev, match_mask,
7889                                                     match_value, items);
7890                         last_item = MLX5_FLOW_ITEM_MARK;
7891                         break;
7892                 case RTE_FLOW_ITEM_TYPE_META:
7893                         flow_dv_translate_item_meta(dev, match_mask,
7894                                                     match_value, attr, items);
7895                         last_item = MLX5_FLOW_ITEM_METADATA;
7896                         break;
7897                 case RTE_FLOW_ITEM_TYPE_ICMP:
7898                         flow_dv_translate_item_icmp(match_mask, match_value,
7899                                                     items, tunnel);
7900                         last_item = MLX5_FLOW_LAYER_ICMP;
7901                         break;
7902                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7903                         flow_dv_translate_item_icmp6(match_mask, match_value,
7904                                                       items, tunnel);
7905                         last_item = MLX5_FLOW_LAYER_ICMP6;
7906                         break;
7907                 case RTE_FLOW_ITEM_TYPE_TAG:
7908                         flow_dv_translate_item_tag(dev, match_mask,
7909                                                    match_value, items);
7910                         last_item = MLX5_FLOW_ITEM_TAG;
7911                         break;
7912                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7913                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7914                                                         match_value, items);
7915                         last_item = MLX5_FLOW_ITEM_TAG;
7916                         break;
7917                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7918                         flow_dv_translate_item_tx_queue(dev, match_mask,
7919                                                         match_value,
7920                                                         items);
7921                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7922                         break;
7923                 case RTE_FLOW_ITEM_TYPE_GTP:
7924                         flow_dv_translate_item_gtp(match_mask, match_value,
7925                                                    items, tunnel);
7926                         matcher.priority = flow->rss.level >= 2 ?
7927                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7928                         last_item = MLX5_FLOW_LAYER_GTP;
7929                         break;
7930                 default:
7931                         break;
7932                 }
7933                 item_flags |= last_item;
7934         }
7935         /*
7936          * When E-Switch mode is enabled, we have two cases where we need to
7937          * set the source port manually.
7938          * The first one, is in case of Nic steering rule, and the second is
7939          * E-Switch rule where no port_id item was found. In both cases
7940          * the source port is set according the current port in use.
7941          */
7942         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
7943             (priv->representor || priv->master)) {
7944                 if (flow_dv_translate_item_port_id(dev, match_mask,
7945                                                    match_value, NULL))
7946                         return -rte_errno;
7947         }
7948 #ifdef RTE_LIBRTE_MLX5_DEBUG
7949         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
7950                                               dev_flow->dv.value.buf));
7951 #endif
7952         /*
7953          * Layers may be already initialized from prefix flow if this dev_flow
7954          * is the suffix flow.
7955          */
7956         dev_flow->layers |= item_flags;
7957         if (action_flags & MLX5_FLOW_ACTION_RSS)
7958                 flow_dv_hashfields_set(dev_flow);
7959         /* Register matcher. */
7960         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7961                                     matcher.mask.size);
7962         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7963                                                      matcher.priority);
7964         /* reserved field no needs to be set to 0 here. */
7965         tbl_key.domain = attr->transfer;
7966         tbl_key.direction = attr->egress;
7967         tbl_key.table_id = dev_flow->group;
7968         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7969                 return -rte_errno;
7970         return 0;
7971 }
7972
7973 /**
7974  * Apply the flow to the NIC, lock free,
7975  * (mutex should be acquired by caller).
7976  *
7977  * @param[in] dev
7978  *   Pointer to the Ethernet device structure.
7979  * @param[in, out] flow
7980  *   Pointer to flow structure.
7981  * @param[out] error
7982  *   Pointer to error structure.
7983  *
7984  * @return
7985  *   0 on success, a negative errno value otherwise and rte_errno is set.
7986  */
7987 static int
7988 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7989                 struct rte_flow_error *error)
7990 {
7991         struct mlx5_flow_dv *dv;
7992         struct mlx5_flow *dev_flow;
7993         struct mlx5_priv *priv = dev->data->dev_private;
7994         int n;
7995         int err;
7996
7997         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7998                 dv = &dev_flow->dv;
7999                 n = dv->actions_n;
8000                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
8001                         if (dev_flow->transfer) {
8002                                 dv->actions[n++] = priv->sh->esw_drop_action;
8003                         } else {
8004                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
8005                                 if (!dv->hrxq) {
8006                                         rte_flow_error_set
8007                                                 (error, errno,
8008                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8009                                                  NULL,
8010                                                  "cannot get drop hash queue");
8011                                         goto error;
8012                                 }
8013                                 dv->actions[n++] = dv->hrxq->action;
8014                         }
8015                 } else if (dev_flow->actions &
8016                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
8017                         struct mlx5_hrxq *hrxq;
8018
8019                         MLX5_ASSERT(flow->rss.queue);
8020                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
8021                                              MLX5_RSS_HASH_KEY_LEN,
8022                                              dev_flow->hash_fields,
8023                                              (*flow->rss.queue),
8024                                              flow->rss.queue_num);
8025                         if (!hrxq) {
8026                                 hrxq = mlx5_hrxq_new
8027                                         (dev, flow->rss.key,
8028                                          MLX5_RSS_HASH_KEY_LEN,
8029                                          dev_flow->hash_fields,
8030                                          (*flow->rss.queue),
8031                                          flow->rss.queue_num,
8032                                          !!(dev_flow->layers &
8033                                             MLX5_FLOW_LAYER_TUNNEL));
8034                         }
8035                         if (!hrxq) {
8036                                 rte_flow_error_set
8037                                         (error, rte_errno,
8038                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8039                                          "cannot get hash queue");
8040                                 goto error;
8041                         }
8042                         dv->hrxq = hrxq;
8043                         dv->actions[n++] = dv->hrxq->action;
8044                 }
8045                 dv->flow =
8046                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
8047                                                   (void *)&dv->value, n,
8048                                                   dv->actions);
8049                 if (!dv->flow) {
8050                         rte_flow_error_set(error, errno,
8051                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8052                                            NULL,
8053                                            "hardware refuses to create flow");
8054                         goto error;
8055                 }
8056                 if (priv->vmwa_context &&
8057                     dev_flow->dv.vf_vlan.tag &&
8058                     !dev_flow->dv.vf_vlan.created) {
8059                         /*
8060                          * The rule contains the VLAN pattern.
8061                          * For VF we are going to create VLAN
8062                          * interface to make hypervisor set correct
8063                          * e-Switch vport context.
8064                          */
8065                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
8066                 }
8067         }
8068         return 0;
8069 error:
8070         err = rte_errno; /* Save rte_errno before cleanup. */
8071         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8072                 struct mlx5_flow_dv *dv = &dev_flow->dv;
8073                 if (dv->hrxq) {
8074                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8075                                 mlx5_hrxq_drop_release(dev);
8076                         else
8077                                 mlx5_hrxq_release(dev, dv->hrxq);
8078                         dv->hrxq = NULL;
8079                 }
8080                 if (dev_flow->dv.vf_vlan.tag &&
8081                     dev_flow->dv.vf_vlan.created)
8082                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8083         }
8084         rte_errno = err; /* Restore rte_errno. */
8085         return -rte_errno;
8086 }
8087
8088 /**
8089  * Release the flow matcher.
8090  *
8091  * @param dev
8092  *   Pointer to Ethernet device.
8093  * @param flow
8094  *   Pointer to mlx5_flow.
8095  *
8096  * @return
8097  *   1 while a reference on it exists, 0 when freed.
8098  */
8099 static int
8100 flow_dv_matcher_release(struct rte_eth_dev *dev,
8101                         struct mlx5_flow *flow)
8102 {
8103         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
8104
8105         MLX5_ASSERT(matcher->matcher_object);
8106         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
8107                 dev->data->port_id, (void *)matcher,
8108                 rte_atomic32_read(&matcher->refcnt));
8109         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
8110                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8111                            (matcher->matcher_object));
8112                 LIST_REMOVE(matcher, next);
8113                 /* table ref-- in release interface. */
8114                 flow_dv_tbl_resource_release(dev, matcher->tbl);
8115                 rte_free(matcher);
8116                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
8117                         dev->data->port_id, (void *)matcher);
8118                 return 0;
8119         }
8120         return 1;
8121 }
8122
8123 /**
8124  * Release an encap/decap resource.
8125  *
8126  * @param flow
8127  *   Pointer to mlx5_flow.
8128  *
8129  * @return
8130  *   1 while a reference on it exists, 0 when freed.
8131  */
8132 static int
8133 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
8134 {
8135         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
8136                                                 flow->dv.encap_decap;
8137
8138         MLX5_ASSERT(cache_resource->verbs_action);
8139         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
8140                 (void *)cache_resource,
8141                 rte_atomic32_read(&cache_resource->refcnt));
8142         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8143                 claim_zero(mlx5_glue->destroy_flow_action
8144                                 (cache_resource->verbs_action));
8145                 LIST_REMOVE(cache_resource, next);
8146                 rte_free(cache_resource);
8147                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
8148                         (void *)cache_resource);
8149                 return 0;
8150         }
8151         return 1;
8152 }
8153
8154 /**
8155  * Release an jump to table action resource.
8156  *
8157  * @param dev
8158  *   Pointer to Ethernet device.
8159  * @param flow
8160  *   Pointer to mlx5_flow.
8161  *
8162  * @return
8163  *   1 while a reference on it exists, 0 when freed.
8164  */
8165 static int
8166 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
8167                                   struct mlx5_flow *flow)
8168 {
8169         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
8170         struct mlx5_flow_tbl_data_entry *tbl_data =
8171                         container_of(cache_resource,
8172                                      struct mlx5_flow_tbl_data_entry, jump);
8173
8174         MLX5_ASSERT(cache_resource->action);
8175         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
8176                 (void *)cache_resource,
8177                 rte_atomic32_read(&cache_resource->refcnt));
8178         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8179                 claim_zero(mlx5_glue->destroy_flow_action
8180                                 (cache_resource->action));
8181                 /* jump action memory free is inside the table release. */
8182                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
8183                 DRV_LOG(DEBUG, "jump table resource %p: removed",
8184                         (void *)cache_resource);
8185                 return 0;
8186         }
8187         return 1;
8188 }
8189
8190 /**
8191  * Release a modify-header resource.
8192  *
8193  * @param flow
8194  *   Pointer to mlx5_flow.
8195  *
8196  * @return
8197  *   1 while a reference on it exists, 0 when freed.
8198  */
8199 static int
8200 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
8201 {
8202         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
8203                                                 flow->dv.modify_hdr;
8204
8205         MLX5_ASSERT(cache_resource->verbs_action);
8206         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
8207                 (void *)cache_resource,
8208                 rte_atomic32_read(&cache_resource->refcnt));
8209         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8210                 claim_zero(mlx5_glue->destroy_flow_action
8211                                 (cache_resource->verbs_action));
8212                 LIST_REMOVE(cache_resource, next);
8213                 rte_free(cache_resource);
8214                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
8215                         (void *)cache_resource);
8216                 return 0;
8217         }
8218         return 1;
8219 }
8220
8221 /**
8222  * Release port ID action resource.
8223  *
8224  * @param flow
8225  *   Pointer to mlx5_flow.
8226  *
8227  * @return
8228  *   1 while a reference on it exists, 0 when freed.
8229  */
8230 static int
8231 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
8232 {
8233         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
8234                 flow->dv.port_id_action;
8235
8236         MLX5_ASSERT(cache_resource->action);
8237         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
8238                 (void *)cache_resource,
8239                 rte_atomic32_read(&cache_resource->refcnt));
8240         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8241                 claim_zero(mlx5_glue->destroy_flow_action
8242                                 (cache_resource->action));
8243                 LIST_REMOVE(cache_resource, next);
8244                 rte_free(cache_resource);
8245                 DRV_LOG(DEBUG, "port id action resource %p: removed",
8246                         (void *)cache_resource);
8247                 return 0;
8248         }
8249         return 1;
8250 }
8251
8252 /**
8253  * Release push vlan action resource.
8254  *
8255  * @param flow
8256  *   Pointer to mlx5_flow.
8257  *
8258  * @return
8259  *   1 while a reference on it exists, 0 when freed.
8260  */
8261 static int
8262 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
8263 {
8264         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
8265                 flow->dv.push_vlan_res;
8266
8267         MLX5_ASSERT(cache_resource->action);
8268         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
8269                 (void *)cache_resource,
8270                 rte_atomic32_read(&cache_resource->refcnt));
8271         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8272                 claim_zero(mlx5_glue->destroy_flow_action
8273                                 (cache_resource->action));
8274                 LIST_REMOVE(cache_resource, next);
8275                 rte_free(cache_resource);
8276                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
8277                         (void *)cache_resource);
8278                 return 0;
8279         }
8280         return 1;
8281 }
8282
8283 /**
8284  * Remove the flow from the NIC but keeps it in memory.
8285  * Lock free, (mutex should be acquired by caller).
8286  *
8287  * @param[in] dev
8288  *   Pointer to Ethernet device.
8289  * @param[in, out] flow
8290  *   Pointer to flow structure.
8291  */
8292 static void
8293 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8294 {
8295         struct mlx5_flow_dv *dv;
8296         struct mlx5_flow *dev_flow;
8297
8298         if (!flow)
8299                 return;
8300         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8301                 dv = &dev_flow->dv;
8302                 if (dv->flow) {
8303                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
8304                         dv->flow = NULL;
8305                 }
8306                 if (dv->hrxq) {
8307                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8308                                 mlx5_hrxq_drop_release(dev);
8309                         else
8310                                 mlx5_hrxq_release(dev, dv->hrxq);
8311                         dv->hrxq = NULL;
8312                 }
8313                 if (dev_flow->dv.vf_vlan.tag &&
8314                     dev_flow->dv.vf_vlan.created)
8315                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8316         }
8317 }
8318
8319 /**
8320  * Remove the flow from the NIC and the memory.
8321  * Lock free, (mutex should be acquired by caller).
8322  *
8323  * @param[in] dev
8324  *   Pointer to the Ethernet device structure.
8325  * @param[in, out] flow
8326  *   Pointer to flow structure.
8327  */
8328 static void
8329 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8330 {
8331         struct mlx5_flow *dev_flow;
8332
8333         if (!flow)
8334                 return;
8335         __flow_dv_remove(dev, flow);
8336         if (flow->counter) {
8337                 flow_dv_counter_release(dev, flow->counter);
8338                 flow->counter = NULL;
8339         }
8340         if (flow->meter) {
8341                 mlx5_flow_meter_detach(flow->meter);
8342                 flow->meter = NULL;
8343         }
8344         while (!LIST_EMPTY(&flow->dev_flows)) {
8345                 dev_flow = LIST_FIRST(&flow->dev_flows);
8346                 LIST_REMOVE(dev_flow, next);
8347                 if (dev_flow->dv.matcher)
8348                         flow_dv_matcher_release(dev, dev_flow);
8349                 if (dev_flow->dv.encap_decap)
8350                         flow_dv_encap_decap_resource_release(dev_flow);
8351                 if (dev_flow->dv.modify_hdr)
8352                         flow_dv_modify_hdr_resource_release(dev_flow);
8353                 if (dev_flow->dv.jump)
8354                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8355                 if (dev_flow->dv.port_id_action)
8356                         flow_dv_port_id_action_resource_release(dev_flow);
8357                 if (dev_flow->dv.push_vlan_res)
8358                         flow_dv_push_vlan_action_resource_release(dev_flow);
8359                 if (dev_flow->dv.tag_resource)
8360                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8361                 rte_free(dev_flow);
8362         }
8363 }
8364
8365 /**
8366  * Query a dv flow  rule for its statistics via devx.
8367  *
8368  * @param[in] dev
8369  *   Pointer to Ethernet device.
8370  * @param[in] flow
8371  *   Pointer to the sub flow.
8372  * @param[out] data
8373  *   data retrieved by the query.
8374  * @param[out] error
8375  *   Perform verbose error reporting if not NULL.
8376  *
8377  * @return
8378  *   0 on success, a negative errno value otherwise and rte_errno is set.
8379  */
8380 static int
8381 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8382                     void *data, struct rte_flow_error *error)
8383 {
8384         struct mlx5_priv *priv = dev->data->dev_private;
8385         struct rte_flow_query_count *qc = data;
8386
8387         if (!priv->config.devx)
8388                 return rte_flow_error_set(error, ENOTSUP,
8389                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8390                                           NULL,
8391                                           "counters are not supported");
8392         if (flow->counter) {
8393                 uint64_t pkts, bytes;
8394                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8395                                                &bytes);
8396
8397                 if (err)
8398                         return rte_flow_error_set(error, -err,
8399                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8400                                         NULL, "cannot read counters");
8401                 qc->hits_set = 1;
8402                 qc->bytes_set = 1;
8403                 qc->hits = pkts - flow->counter->hits;
8404                 qc->bytes = bytes - flow->counter->bytes;
8405                 if (qc->reset) {
8406                         flow->counter->hits = pkts;
8407                         flow->counter->bytes = bytes;
8408                 }
8409                 return 0;
8410         }
8411         return rte_flow_error_set(error, EINVAL,
8412                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8413                                   NULL,
8414                                   "counters are not available");
8415 }
8416
8417 /**
8418  * Query a flow.
8419  *
8420  * @see rte_flow_query()
8421  * @see rte_flow_ops
8422  */
8423 static int
8424 flow_dv_query(struct rte_eth_dev *dev,
8425               struct rte_flow *flow __rte_unused,
8426               const struct rte_flow_action *actions __rte_unused,
8427               void *data __rte_unused,
8428               struct rte_flow_error *error __rte_unused)
8429 {
8430         int ret = -EINVAL;
8431
8432         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8433                 switch (actions->type) {
8434                 case RTE_FLOW_ACTION_TYPE_VOID:
8435                         break;
8436                 case RTE_FLOW_ACTION_TYPE_COUNT:
8437                         ret = flow_dv_query_count(dev, flow, data, error);
8438                         break;
8439                 default:
8440                         return rte_flow_error_set(error, ENOTSUP,
8441                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8442                                                   actions,
8443                                                   "action not supported");
8444                 }
8445         }
8446         return ret;
8447 }
8448
8449 /**
8450  * Destroy the meter table set.
8451  * Lock free, (mutex should be acquired by caller).
8452  *
8453  * @param[in] dev
8454  *   Pointer to Ethernet device.
8455  * @param[in] tbl
8456  *   Pointer to the meter table set.
8457  *
8458  * @return
8459  *   Always 0.
8460  */
8461 static int
8462 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8463                         struct mlx5_meter_domains_infos *tbl)
8464 {
8465         struct mlx5_priv *priv = dev->data->dev_private;
8466         struct mlx5_meter_domains_infos *mtd =
8467                                 (struct mlx5_meter_domains_infos *)tbl;
8468
8469         if (!mtd || !priv->config.dv_flow_en)
8470                 return 0;
8471         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8472                 claim_zero(mlx5_glue->dv_destroy_flow
8473                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8474         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8475                 claim_zero(mlx5_glue->dv_destroy_flow
8476                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8477         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8478                 claim_zero(mlx5_glue->dv_destroy_flow
8479                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8480         if (mtd->egress.color_matcher)
8481                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8482                           (mtd->egress.color_matcher));
8483         if (mtd->egress.any_matcher)
8484                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8485                           (mtd->egress.any_matcher));
8486         if (mtd->egress.tbl)
8487                 claim_zero(flow_dv_tbl_resource_release(dev,
8488                                                         mtd->egress.tbl));
8489         if (mtd->ingress.color_matcher)
8490                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8491                           (mtd->ingress.color_matcher));
8492         if (mtd->ingress.any_matcher)
8493                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8494                           (mtd->ingress.any_matcher));
8495         if (mtd->ingress.tbl)
8496                 claim_zero(flow_dv_tbl_resource_release(dev,
8497                                                         mtd->ingress.tbl));
8498         if (mtd->transfer.color_matcher)
8499                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8500                           (mtd->transfer.color_matcher));
8501         if (mtd->transfer.any_matcher)
8502                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8503                           (mtd->transfer.any_matcher));
8504         if (mtd->transfer.tbl)
8505                 claim_zero(flow_dv_tbl_resource_release(dev,
8506                                                         mtd->transfer.tbl));
8507         if (mtd->drop_actn)
8508                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8509         rte_free(mtd);
8510         return 0;
8511 }
8512
8513 /* Number of meter flow actions, count and jump or count and drop. */
8514 #define METER_ACTIONS 2
8515
8516 /**
8517  * Create specify domain meter table and suffix table.
8518  *
8519  * @param[in] dev
8520  *   Pointer to Ethernet device.
8521  * @param[in,out] mtb
8522  *   Pointer to DV meter table set.
8523  * @param[in] egress
8524  *   Table attribute.
8525  * @param[in] transfer
8526  *   Table attribute.
8527  * @param[in] color_reg_c_idx
8528  *   Reg C index for color match.
8529  *
8530  * @return
8531  *   0 on success, -1 otherwise and rte_errno is set.
8532  */
8533 static int
8534 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8535                            struct mlx5_meter_domains_infos *mtb,
8536                            uint8_t egress, uint8_t transfer,
8537                            uint32_t color_reg_c_idx)
8538 {
8539         struct mlx5_priv *priv = dev->data->dev_private;
8540         struct mlx5_ibv_shared *sh = priv->sh;
8541         struct mlx5_flow_dv_match_params mask = {
8542                 .size = sizeof(mask.buf),
8543         };
8544         struct mlx5_flow_dv_match_params value = {
8545                 .size = sizeof(value.buf),
8546         };
8547         struct mlx5dv_flow_matcher_attr dv_attr = {
8548                 .type = IBV_FLOW_ATTR_NORMAL,
8549                 .priority = 0,
8550                 .match_criteria_enable = 0,
8551                 .match_mask = (void *)&mask,
8552         };
8553         void *actions[METER_ACTIONS];
8554         struct mlx5_flow_tbl_resource **sfx_tbl;
8555         struct mlx5_meter_domain_info *dtb;
8556         struct rte_flow_error error;
8557         int i = 0;
8558
8559         if (transfer) {
8560                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8561                 dtb = &mtb->transfer;
8562         } else if (egress) {
8563                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8564                 dtb = &mtb->egress;
8565         } else {
8566                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8567                 dtb = &mtb->ingress;
8568         }
8569         /* If the suffix table in missing, create it. */
8570         if (!(*sfx_tbl)) {
8571                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8572                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8573                                                 egress, transfer, &error);
8574                 if (!(*sfx_tbl)) {
8575                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8576                         return -1;
8577                 }
8578         }
8579         /* Create the meter table with METER level. */
8580         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8581                                             egress, transfer, &error);
8582         if (!dtb->tbl) {
8583                 DRV_LOG(ERR, "Failed to create meter policer table.");
8584                 return -1;
8585         }
8586         /* Create matchers, Any and Color. */
8587         dv_attr.priority = 3;
8588         dv_attr.match_criteria_enable = 0;
8589         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8590                                                              &dv_attr,
8591                                                              dtb->tbl->obj);
8592         if (!dtb->any_matcher) {
8593                 DRV_LOG(ERR, "Failed to create meter"
8594                              " policer default matcher.");
8595                 goto error_exit;
8596         }
8597         dv_attr.priority = 0;
8598         dv_attr.match_criteria_enable =
8599                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8600         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8601                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
8602         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8603                                                                &dv_attr,
8604                                                                dtb->tbl->obj);
8605         if (!dtb->color_matcher) {
8606                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8607                 goto error_exit;
8608         }
8609         if (mtb->count_actns[RTE_MTR_DROPPED])
8610                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8611         actions[i++] = mtb->drop_actn;
8612         /* Default rule: lowest priority, match any, actions: drop. */
8613         dtb->policer_rules[RTE_MTR_DROPPED] =
8614                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8615                                                  (void *)&value, i, actions);
8616         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8617                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8618                 goto error_exit;
8619         }
8620         return 0;
8621 error_exit:
8622         return -1;
8623 }
8624
8625 /**
8626  * Create the needed meter and suffix tables.
8627  * Lock free, (mutex should be acquired by caller).
8628  *
8629  * @param[in] dev
8630  *   Pointer to Ethernet device.
8631  * @param[in] fm
8632  *   Pointer to the flow meter.
8633  *
8634  * @return
8635  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8636  */
8637 static struct mlx5_meter_domains_infos *
8638 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8639                        const struct mlx5_flow_meter *fm)
8640 {
8641         struct mlx5_priv *priv = dev->data->dev_private;
8642         struct mlx5_meter_domains_infos *mtb;
8643         int ret;
8644         int i;
8645
8646         if (!priv->mtr_en) {
8647                 rte_errno = ENOTSUP;
8648                 return NULL;
8649         }
8650         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8651         if (!mtb) {
8652                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8653                 return NULL;
8654         }
8655         /* Create meter count actions */
8656         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8657                 if (!fm->policer_stats.cnt[i])
8658                         continue;
8659                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8660         }
8661         /* Create drop action. */
8662         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8663         if (!mtb->drop_actn) {
8664                 DRV_LOG(ERR, "Failed to create drop action.");
8665                 goto error_exit;
8666         }
8667         /* Egress meter table. */
8668         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8669         if (ret) {
8670                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8671                 goto error_exit;
8672         }
8673         /* Ingress meter table. */
8674         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8675         if (ret) {
8676                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8677                 goto error_exit;
8678         }
8679         /* FDB meter table. */
8680         if (priv->config.dv_esw_en) {
8681                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8682                                                  priv->mtr_color_reg);
8683                 if (ret) {
8684                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8685                         goto error_exit;
8686                 }
8687         }
8688         return mtb;
8689 error_exit:
8690         flow_dv_destroy_mtr_tbl(dev, mtb);
8691         return NULL;
8692 }
8693
8694 /**
8695  * Destroy domain policer rule.
8696  *
8697  * @param[in] dt
8698  *   Pointer to domain table.
8699  */
8700 static void
8701 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8702 {
8703         int i;
8704
8705         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8706                 if (dt->policer_rules[i]) {
8707                         claim_zero(mlx5_glue->dv_destroy_flow
8708                                   (dt->policer_rules[i]));
8709                         dt->policer_rules[i] = NULL;
8710                 }
8711         }
8712         if (dt->jump_actn) {
8713                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8714                 dt->jump_actn = NULL;
8715         }
8716 }
8717
8718 /**
8719  * Destroy policer rules.
8720  *
8721  * @param[in] dev
8722  *   Pointer to Ethernet device.
8723  * @param[in] fm
8724  *   Pointer to flow meter structure.
8725  * @param[in] attr
8726  *   Pointer to flow attributes.
8727  *
8728  * @return
8729  *   Always 0.
8730  */
8731 static int
8732 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8733                               const struct mlx5_flow_meter *fm,
8734                               const struct rte_flow_attr *attr)
8735 {
8736         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8737
8738         if (!mtb)
8739                 return 0;
8740         if (attr->egress)
8741                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8742         if (attr->ingress)
8743                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8744         if (attr->transfer)
8745                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8746         return 0;
8747 }
8748
8749 /**
8750  * Create specify domain meter policer rule.
8751  *
8752  * @param[in] fm
8753  *   Pointer to flow meter structure.
8754  * @param[in] mtb
8755  *   Pointer to DV meter table set.
8756  * @param[in] sfx_tb
8757  *   Pointer to suffix table.
8758  * @param[in] mtr_reg_c
8759  *   Color match REG_C.
8760  *
8761  * @return
8762  *   0 on success, -1 otherwise.
8763  */
8764 static int
8765 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8766                                     struct mlx5_meter_domain_info *dtb,
8767                                     struct mlx5_flow_tbl_resource *sfx_tb,
8768                                     uint8_t mtr_reg_c)
8769 {
8770         struct mlx5_flow_dv_match_params matcher = {
8771                 .size = sizeof(matcher.buf),
8772         };
8773         struct mlx5_flow_dv_match_params value = {
8774                 .size = sizeof(value.buf),
8775         };
8776         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8777         void *actions[METER_ACTIONS];
8778         int i;
8779
8780         /* Create jump action. */
8781         if (!sfx_tb)
8782                 return -1;
8783         if (!dtb->jump_actn)
8784                 dtb->jump_actn =
8785                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8786                                                         (sfx_tb->obj);
8787         if (!dtb->jump_actn) {
8788                 DRV_LOG(ERR, "Failed to create policer jump action.");
8789                 goto error;
8790         }
8791         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8792                 int j = 0;
8793
8794                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8795                                        rte_col_2_mlx5_col(i), UINT8_MAX);
8796                 if (mtb->count_actns[i])
8797                         actions[j++] = mtb->count_actns[i];
8798                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8799                         actions[j++] = mtb->drop_actn;
8800                 else
8801                         actions[j++] = dtb->jump_actn;
8802                 dtb->policer_rules[i] =
8803                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8804                                                  (void *)&value,
8805                                                   j, actions);
8806                 if (!dtb->policer_rules[i]) {
8807                         DRV_LOG(ERR, "Failed to create policer rule.");
8808                         goto error;
8809                 }
8810         }
8811         return 0;
8812 error:
8813         rte_errno = errno;
8814         return -1;
8815 }
8816
8817 /**
8818  * Create policer rules.
8819  *
8820  * @param[in] dev
8821  *   Pointer to Ethernet device.
8822  * @param[in] fm
8823  *   Pointer to flow meter structure.
8824  * @param[in] attr
8825  *   Pointer to flow attributes.
8826  *
8827  * @return
8828  *   0 on success, -1 otherwise.
8829  */
8830 static int
8831 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8832                              struct mlx5_flow_meter *fm,
8833                              const struct rte_flow_attr *attr)
8834 {
8835         struct mlx5_priv *priv = dev->data->dev_private;
8836         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8837         int ret;
8838
8839         if (attr->egress) {
8840                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8841                                                 priv->sh->tx_mtr_sfx_tbl,
8842                                                 priv->mtr_color_reg);
8843                 if (ret) {
8844                         DRV_LOG(ERR, "Failed to create egress policer.");
8845                         goto error;
8846                 }
8847         }
8848         if (attr->ingress) {
8849                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8850                                                 priv->sh->rx_mtr_sfx_tbl,
8851                                                 priv->mtr_color_reg);
8852                 if (ret) {
8853                         DRV_LOG(ERR, "Failed to create ingress policer.");
8854                         goto error;
8855                 }
8856         }
8857         if (attr->transfer) {
8858                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8859                                                 priv->sh->fdb_mtr_sfx_tbl,
8860                                                 priv->mtr_color_reg);
8861                 if (ret) {
8862                         DRV_LOG(ERR, "Failed to create transfer policer.");
8863                         goto error;
8864                 }
8865         }
8866         return 0;
8867 error:
8868         flow_dv_destroy_policer_rules(dev, fm, attr);
8869         return -1;
8870 }
8871
8872 /**
8873  * Query a devx counter.
8874  *
8875  * @param[in] dev
8876  *   Pointer to the Ethernet device structure.
8877  * @param[in] cnt
8878  *   Pointer to the flow counter.
8879  * @param[in] clear
8880  *   Set to clear the counter statistics.
8881  * @param[out] pkts
8882  *   The statistics value of packets.
8883  * @param[out] bytes
8884  *   The statistics value of bytes.
8885  *
8886  * @return
8887  *   0 on success, otherwise return -1.
8888  */
8889 static int
8890 flow_dv_counter_query(struct rte_eth_dev *dev,
8891                       struct mlx5_flow_counter *cnt, bool clear,
8892                       uint64_t *pkts, uint64_t *bytes)
8893 {
8894         struct mlx5_priv *priv = dev->data->dev_private;
8895         uint64_t inn_pkts, inn_bytes;
8896         int ret;
8897
8898         if (!priv->config.devx)
8899                 return -1;
8900         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8901         if (ret)
8902                 return -1;
8903         *pkts = inn_pkts - cnt->hits;
8904         *bytes = inn_bytes - cnt->bytes;
8905         if (clear) {
8906                 cnt->hits = inn_pkts;
8907                 cnt->bytes = inn_bytes;
8908         }
8909         return 0;
8910 }
8911
8912 /*
8913  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8914  */
8915 static int
8916 flow_dv_translate(struct rte_eth_dev *dev,
8917                   struct mlx5_flow *dev_flow,
8918                   const struct rte_flow_attr *attr,
8919                   const struct rte_flow_item items[],
8920                   const struct rte_flow_action actions[],
8921                   struct rte_flow_error *error)
8922 {
8923         int ret;
8924
8925         flow_dv_shared_lock(dev);
8926         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8927         flow_dv_shared_unlock(dev);
8928         return ret;
8929 }
8930
8931 /*
8932  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8933  */
8934 static int
8935 flow_dv_apply(struct rte_eth_dev *dev,
8936               struct rte_flow *flow,
8937               struct rte_flow_error *error)
8938 {
8939         int ret;
8940
8941         flow_dv_shared_lock(dev);
8942         ret = __flow_dv_apply(dev, flow, error);
8943         flow_dv_shared_unlock(dev);
8944         return ret;
8945 }
8946
8947 /*
8948  * Mutex-protected thunk to lock-free __flow_dv_remove().
8949  */
8950 static void
8951 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8952 {
8953         flow_dv_shared_lock(dev);
8954         __flow_dv_remove(dev, flow);
8955         flow_dv_shared_unlock(dev);
8956 }
8957
8958 /*
8959  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8960  */
8961 static void
8962 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8963 {
8964         flow_dv_shared_lock(dev);
8965         __flow_dv_destroy(dev, flow);
8966         flow_dv_shared_unlock(dev);
8967 }
8968
8969 /*
8970  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8971  */
8972 static struct mlx5_flow_counter *
8973 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8974 {
8975         struct mlx5_flow_counter *cnt;
8976
8977         flow_dv_shared_lock(dev);
8978         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8979         flow_dv_shared_unlock(dev);
8980         return cnt;
8981 }
8982
8983 /*
8984  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8985  */
8986 static void
8987 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8988 {
8989         flow_dv_shared_lock(dev);
8990         flow_dv_counter_release(dev, cnt);
8991         flow_dv_shared_unlock(dev);
8992 }
8993
8994 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8995         .validate = flow_dv_validate,
8996         .prepare = flow_dv_prepare,
8997         .translate = flow_dv_translate,
8998         .apply = flow_dv_apply,
8999         .remove = flow_dv_remove,
9000         .destroy = flow_dv_destroy,
9001         .query = flow_dv_query,
9002         .create_mtr_tbls = flow_dv_create_mtr_tbl,
9003         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
9004         .create_policer_rules = flow_dv_create_policer_rules,
9005         .destroy_policer_rules = flow_dv_destroy_policer_rules,
9006         .counter_alloc = flow_dv_counter_allocate,
9007         .counter_free = flow_dv_counter_free,
9008         .counter_query = flow_dv_counter_query,
9009 };
9010
9011 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */