drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_prm.h>
  35
  36 #include "mlx5_defs.h"
  37 #include "mlx5.h"
  38 #include "mlx5_flow.h"
  39 #include "mlx5_rxtx.h"
  40
  41 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 #define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
  58                                           sizeof(struct rte_flow_item_ipv4))
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 /**
  79  * Initialize flow attributes structure according to flow items' types.
  80  *
  81  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  82  * mode. For tunnel mode, the items to be modified are the outermost ones.
  83  *
  84  * @param[in] item
  85  *   Pointer to item specification.
  86  * @param[out] attr
  87  *   Pointer to flow attributes structure.
  88  * @param[in] tunnel_decap
  89  *   Whether action is after tunnel decapsulation.
  90  */
  91 static void
  92 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
  93                   bool tunnel_decap)
  94 {
  95         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  96                 uint8_t next_protocol = 0xff;
  97
  98                 switch (item->type) {
  99                 case RTE_FLOW_ITEM_TYPE_GRE:
 100                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 101                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 102                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 103                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 104                 case RTE_FLOW_ITEM_TYPE_MPLS:
 105                         if (tunnel_decap)
 106                                 attr->attr = 0;
 107                         break;
 108                 case RTE_FLOW_ITEM_TYPE_IPV4:
 109                         if (!attr->ipv6)
 110                                 attr->ipv4 = 1;
 111                         if (item->mask != NULL &&
 112                             ((const struct rte_flow_item_ipv4 *)
 113                             item->mask)->hdr.next_proto_id)
 114                                 next_protocol =
 115                                     ((const struct rte_flow_item_ipv4 *)
 116                                       (item->spec))->hdr.next_proto_id &
 117                                     ((const struct rte_flow_item_ipv4 *)
 118                                       (item->mask))->hdr.next_proto_id;
 119                         if ((next_protocol == IPPROTO_IPIP ||
 120                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 121                                 attr->attr = 0;
 122                         break;
 123                 case RTE_FLOW_ITEM_TYPE_IPV6:
 124                         if (!attr->ipv4)
 125                                 attr->ipv6 = 1;
 126                         if (item->mask != NULL &&
 127                             ((const struct rte_flow_item_ipv6 *)
 128                             item->mask)->hdr.proto)
 129                                 next_protocol =
 130                                     ((const struct rte_flow_item_ipv6 *)
 131                                       (item->spec))->hdr.proto &
 132                                     ((const struct rte_flow_item_ipv6 *)
 133                                       (item->mask))->hdr.proto;
 134                         if ((next_protocol == IPPROTO_IPIP ||
 135                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 136                                 attr->attr = 0;
 137                         break;
 138                 case RTE_FLOW_ITEM_TYPE_UDP:
 139                         if (!attr->tcp)
 140                                 attr->udp = 1;
 141                         break;
 142                 case RTE_FLOW_ITEM_TYPE_TCP:
 143                         if (!attr->udp)
 144                                 attr->tcp = 1;
 145                         break;
 146                 default:
 147                         break;
 148                 }
 149         }
 150         attr->valid = 1;
 151 }
 152
 153 /**
 154  * Convert rte_mtr_color to mlx5 color.
 155  *
 156  * @param[in] rcol
 157  *   rte_mtr_color.
 158  *
 159  * @return
 160  *   mlx5 color.
 161  */
 162 static int
 163 rte_col_2_mlx5_col(enum rte_color rcol)
 164 {
 165         switch (rcol) {
 166         case RTE_COLOR_GREEN:
 167                 return MLX5_FLOW_COLOR_GREEN;
 168         case RTE_COLOR_YELLOW:
 169                 return MLX5_FLOW_COLOR_YELLOW;
 170         case RTE_COLOR_RED:
 171                 return MLX5_FLOW_COLOR_RED;
 172         default:
 173                 break;
 174         }
 175         return MLX5_FLOW_COLOR_UNDEFINED;
 176 }
 177
 178 struct field_modify_info {
 179         uint32_t size; /* Size of field in protocol header, in bytes. */
 180         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 181         enum mlx5_modification_field id;
 182 };
 183
 184 struct field_modify_info modify_eth[] = {
 185         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 186         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 187         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 188         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 189         {0, 0, 0},
 190 };
 191
 192 struct field_modify_info modify_vlan_out_first_vid[] = {
 193         /* Size in bits !!! */
 194         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 195         {0, 0, 0},
 196 };
 197
 198 struct field_modify_info modify_ipv4[] = {
 199         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 200         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 201         {4, 12, MLX5_MODI_OUT_SIPV4},
 202         {4, 16, MLX5_MODI_OUT_DIPV4},
 203         {0, 0, 0},
 204 };
 205
 206 struct field_modify_info modify_ipv6[] = {
 207         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 208         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 209         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 210         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 211         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 212         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 213         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 214         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 215         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 216         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 217         {0, 0, 0},
 218 };
 219
 220 struct field_modify_info modify_udp[] = {
 221         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 222         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 223         {0, 0, 0},
 224 };
 225
 226 struct field_modify_info modify_tcp[] = {
 227         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 228         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 229         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 230         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 231         {0, 0, 0},
 232 };
 233
 234 static void
 235 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 236                           uint8_t next_protocol, uint64_t *item_flags,
 237                           int *tunnel)
 238 {
 239         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 240                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 241         if (next_protocol == IPPROTO_IPIP) {
 242                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 243                 *tunnel = 1;
 244         }
 245         if (next_protocol == IPPROTO_IPV6) {
 246                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 247                 *tunnel = 1;
 248         }
 249 }
 250
 251 /**
 252  * Acquire the synchronizing object to protect multithreaded access
 253  * to shared dv context. Lock occurs only if context is actually
 254  * shared, i.e. we have multiport IB device and representors are
 255  * created.
 256  *
 257  * @param[in] dev
 258  *   Pointer to the rte_eth_dev structure.
 259  */
 260 static void
 261 flow_dv_shared_lock(struct rte_eth_dev *dev)
 262 {
 263         struct mlx5_priv *priv = dev->data->dev_private;
 264         struct mlx5_ibv_shared *sh = priv->sh;
 265
 266         if (sh->dv_refcnt > 1) {
 267                 int ret;
 268
 269                 ret = pthread_mutex_lock(&sh->dv_mutex);
 270                 MLX5_ASSERT(!ret);
 271                 (void)ret;
 272         }
 273 }
 274
 275 static void
 276 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 277 {
 278         struct mlx5_priv *priv = dev->data->dev_private;
 279         struct mlx5_ibv_shared *sh = priv->sh;
 280
 281         if (sh->dv_refcnt > 1) {
 282                 int ret;
 283
 284                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 285                 MLX5_ASSERT(!ret);
 286                 (void)ret;
 287         }
 288 }
 289
 290 /* Update VLAN's VID/PCP based on input rte_flow_action.
 291  *
 292  * @param[in] action
 293  *   Pointer to struct rte_flow_action.
 294  * @param[out] vlan
 295  *   Pointer to struct rte_vlan_hdr.
 296  */
 297 static void
 298 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 299                          struct rte_vlan_hdr *vlan)
 300 {
 301         uint16_t vlan_tci;
 302         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 303                 vlan_tci =
 304                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 305                                                action->conf)->vlan_pcp;
 306                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 307                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 308                 vlan->vlan_tci |= vlan_tci;
 309         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 310                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 311                 vlan->vlan_tci |= rte_be_to_cpu_16
 312                     (((const struct rte_flow_action_of_set_vlan_vid *)
 313                                              action->conf)->vlan_vid);
 314         }
 315 }
 316
 317 /**
 318  * Fetch 1, 2, 3 or 4 byte field from the byte array
 319  * and return as unsigned integer in host-endian format.
 320  *
 321  * @param[in] data
 322  *   Pointer to data array.
 323  * @param[in] size
 324  *   Size of field to extract.
 325  *
 326  * @return
 327  *   converted field in host endian format.
 328  */
 329 static inline uint32_t
 330 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 331 {
 332         uint32_t ret;
 333
 334         switch (size) {
 335         case 1:
 336                 ret = *data;
 337                 break;
 338         case 2:
 339                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 340                 break;
 341         case 3:
 342                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 343                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 344                 break;
 345         case 4:
 346                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 347                 break;
 348         default:
 349                 MLX5_ASSERT(false);
 350                 ret = 0;
 351                 break;
 352         }
 353         return ret;
 354 }
 355
 356 /**
 357  * Convert modify-header action to DV specification.
 358  *
 359  * Data length of each action is determined by provided field description
 360  * and the item mask. Data bit offset and width of each action is determined
 361  * by provided item mask.
 362  *
 363  * @param[in] item
 364  *   Pointer to item specification.
 365  * @param[in] field
 366  *   Pointer to field modification information.
 367  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 368  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 369  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 370  * @param[in] dcopy
 371  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 372  *   Negative offset value sets the same offset as source offset.
 373  *   size field is ignored, value is taken from source field.
 374  * @param[in,out] resource
 375  *   Pointer to the modify-header resource.
 376  * @param[in] type
 377  *   Type of modification.
 378  * @param[out] error
 379  *   Pointer to the error structure.
 380  *
 381  * @return
 382  *   0 on success, a negative errno value otherwise and rte_errno is set.
 383  */
 384 static int
 385 flow_dv_convert_modify_action(struct rte_flow_item *item,
 386                               struct field_modify_info *field,
 387                               struct field_modify_info *dcopy,
 388                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 389                               uint32_t type, struct rte_flow_error *error)
 390 {
 391         uint32_t i = resource->actions_num;
 392         struct mlx5_modification_cmd *actions = resource->actions;
 393
 394         /*
 395          * The item and mask are provided in big-endian format.
 396          * The fields should be presented as in big-endian format either.
 397          * Mask must be always present, it defines the actual field width.
 398          */
 399         MLX5_ASSERT(item->mask);
 400         MLX5_ASSERT(field->size);
 401         do {
 402                 unsigned int size_b;
 403                 unsigned int off_b;
 404                 uint32_t mask;
 405                 uint32_t data;
 406
 407                 if (i >= MLX5_MAX_MODIFY_NUM)
 408                         return rte_flow_error_set(error, EINVAL,
 409                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 410                                  "too many items to modify");
 411                 /* Fetch variable byte size mask from the array. */
 412                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 413                                            field->offset, field->size);
 414                 if (!mask) {
 415                         ++field;
 416                         continue;
 417                 }
 418                 /* Deduce actual data width in bits from mask value. */
 419                 off_b = rte_bsf32(mask);
 420                 size_b = sizeof(uint32_t) * CHAR_BIT -
 421                          off_b - __builtin_clz(mask);
 422                 MLX5_ASSERT(size_b);
 423                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 424                 actions[i] = (struct mlx5_modification_cmd) {
 425                         .action_type = type,
 426                         .field = field->id,
 427                         .offset = off_b,
 428                         .length = size_b,
 429                 };
 430                 /* Convert entire record to expected big-endian format. */
 431                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 432                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 433                         MLX5_ASSERT(dcopy);
 434                         actions[i].dst_field = dcopy->id;
 435                         actions[i].dst_offset =
 436                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 437                         /* Convert entire record to big-endian format. */
 438                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 439                 } else {
 440                         MLX5_ASSERT(item->spec);
 441                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 442                                                    field->offset, field->size);
 443                         /* Shift out the trailing masked bits from data. */
 444                         data = (data & mask) >> off_b;
 445                         actions[i].data1 = rte_cpu_to_be_32(data);
 446                 }
 447                 ++i;
 448                 ++field;
 449         } while (field->size);
 450         if (resource->actions_num == i)
 451                 return rte_flow_error_set(error, EINVAL,
 452                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 453                                           "invalid modification flow item");
 454         resource->actions_num = i;
 455         return 0;
 456 }
 457
 458 /**
 459  * Convert modify-header set IPv4 address action to DV specification.
 460  *
 461  * @param[in,out] resource
 462  *   Pointer to the modify-header resource.
 463  * @param[in] action
 464  *   Pointer to action specification.
 465  * @param[out] error
 466  *   Pointer to the error structure.
 467  *
 468  * @return
 469  *   0 on success, a negative errno value otherwise and rte_errno is set.
 470  */
 471 static int
 472 flow_dv_convert_action_modify_ipv4
 473                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 474                          const struct rte_flow_action *action,
 475                          struct rte_flow_error *error)
 476 {
 477         const struct rte_flow_action_set_ipv4 *conf =
 478                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 479         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 480         struct rte_flow_item_ipv4 ipv4;
 481         struct rte_flow_item_ipv4 ipv4_mask;
 482
 483         memset(&ipv4, 0, sizeof(ipv4));
 484         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 485         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 486                 ipv4.hdr.src_addr = conf->ipv4_addr;
 487                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 488         } else {
 489                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 490                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 491         }
 492         item.spec = &ipv4;
 493         item.mask = &ipv4_mask;
 494         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 495                                              MLX5_MODIFICATION_TYPE_SET, error);
 496 }
 497
 498 /**
 499  * Convert modify-header set IPv6 address action to DV specification.
 500  *
 501  * @param[in,out] resource
 502  *   Pointer to the modify-header resource.
 503  * @param[in] action
 504  *   Pointer to action specification.
 505  * @param[out] error
 506  *   Pointer to the error structure.
 507  *
 508  * @return
 509  *   0 on success, a negative errno value otherwise and rte_errno is set.
 510  */
 511 static int
 512 flow_dv_convert_action_modify_ipv6
 513                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 514                          const struct rte_flow_action *action,
 515                          struct rte_flow_error *error)
 516 {
 517         const struct rte_flow_action_set_ipv6 *conf =
 518                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 519         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 520         struct rte_flow_item_ipv6 ipv6;
 521         struct rte_flow_item_ipv6 ipv6_mask;
 522
 523         memset(&ipv6, 0, sizeof(ipv6));
 524         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 525         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 526                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 527                        sizeof(ipv6.hdr.src_addr));
 528                 memcpy(&ipv6_mask.hdr.src_addr,
 529                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 530                        sizeof(ipv6.hdr.src_addr));
 531         } else {
 532                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 533                        sizeof(ipv6.hdr.dst_addr));
 534                 memcpy(&ipv6_mask.hdr.dst_addr,
 535                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 536                        sizeof(ipv6.hdr.dst_addr));
 537         }
 538         item.spec = &ipv6;
 539         item.mask = &ipv6_mask;
 540         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 541                                              MLX5_MODIFICATION_TYPE_SET, error);
 542 }
 543
 544 /**
 545  * Convert modify-header set MAC address action to DV specification.
 546  *
 547  * @param[in,out] resource
 548  *   Pointer to the modify-header resource.
 549  * @param[in] action
 550  *   Pointer to action specification.
 551  * @param[out] error
 552  *   Pointer to the error structure.
 553  *
 554  * @return
 555  *   0 on success, a negative errno value otherwise and rte_errno is set.
 556  */
 557 static int
 558 flow_dv_convert_action_modify_mac
 559                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 560                          const struct rte_flow_action *action,
 561                          struct rte_flow_error *error)
 562 {
 563         const struct rte_flow_action_set_mac *conf =
 564                 (const struct rte_flow_action_set_mac *)(action->conf);
 565         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 566         struct rte_flow_item_eth eth;
 567         struct rte_flow_item_eth eth_mask;
 568
 569         memset(&eth, 0, sizeof(eth));
 570         memset(&eth_mask, 0, sizeof(eth_mask));
 571         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 572                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 573                        sizeof(eth.src.addr_bytes));
 574                 memcpy(&eth_mask.src.addr_bytes,
 575                        &rte_flow_item_eth_mask.src.addr_bytes,
 576                        sizeof(eth_mask.src.addr_bytes));
 577         } else {
 578                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 579                        sizeof(eth.dst.addr_bytes));
 580                 memcpy(&eth_mask.dst.addr_bytes,
 581                        &rte_flow_item_eth_mask.dst.addr_bytes,
 582                        sizeof(eth_mask.dst.addr_bytes));
 583         }
 584         item.spec = &eth;
 585         item.mask = &eth_mask;
 586         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 587                                              MLX5_MODIFICATION_TYPE_SET, error);
 588 }
 589
 590 /**
 591  * Convert modify-header set VLAN VID action to DV specification.
 592  *
 593  * @param[in,out] resource
 594  *   Pointer to the modify-header resource.
 595  * @param[in] action
 596  *   Pointer to action specification.
 597  * @param[out] error
 598  *   Pointer to the error structure.
 599  *
 600  * @return
 601  *   0 on success, a negative errno value otherwise and rte_errno is set.
 602  */
 603 static int
 604 flow_dv_convert_action_modify_vlan_vid
 605                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 606                          const struct rte_flow_action *action,
 607                          struct rte_flow_error *error)
 608 {
 609         const struct rte_flow_action_of_set_vlan_vid *conf =
 610                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 611         int i = resource->actions_num;
 612         struct mlx5_modification_cmd *actions = resource->actions;
 613         struct field_modify_info *field = modify_vlan_out_first_vid;
 614
 615         if (i >= MLX5_MAX_MODIFY_NUM)
 616                 return rte_flow_error_set(error, EINVAL,
 617                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 618                          "too many items to modify");
 619         actions[i] = (struct mlx5_modification_cmd) {
 620                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 621                 .field = field->id,
 622                 .length = field->size,
 623                 .offset = field->offset,
 624         };
 625         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 626         actions[i].data1 = conf->vlan_vid;
 627         actions[i].data1 = actions[i].data1 << 16;
 628         resource->actions_num = ++i;
 629         return 0;
 630 }
 631
 632 /**
 633  * Convert modify-header set TP action to DV specification.
 634  *
 635  * @param[in,out] resource
 636  *   Pointer to the modify-header resource.
 637  * @param[in] action
 638  *   Pointer to action specification.
 639  * @param[in] items
 640  *   Pointer to rte_flow_item objects list.
 641  * @param[in] attr
 642  *   Pointer to flow attributes structure.
 643  * @param[in] tunnel_decap
 644  *   Whether action is after tunnel decapsulation.
 645  * @param[out] error
 646  *   Pointer to the error structure.
 647  *
 648  * @return
 649  *   0 on success, a negative errno value otherwise and rte_errno is set.
 650  */
 651 static int
 652 flow_dv_convert_action_modify_tp
 653                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 654                          const struct rte_flow_action *action,
 655                          const struct rte_flow_item *items,
 656                          union flow_dv_attr *attr, bool tunnel_decap,
 657                          struct rte_flow_error *error)
 658 {
 659         const struct rte_flow_action_set_tp *conf =
 660                 (const struct rte_flow_action_set_tp *)(action->conf);
 661         struct rte_flow_item item;
 662         struct rte_flow_item_udp udp;
 663         struct rte_flow_item_udp udp_mask;
 664         struct rte_flow_item_tcp tcp;
 665         struct rte_flow_item_tcp tcp_mask;
 666         struct field_modify_info *field;
 667
 668         if (!attr->valid)
 669                 flow_dv_attr_init(items, attr, tunnel_decap);
 670         if (attr->udp) {
 671                 memset(&udp, 0, sizeof(udp));
 672                 memset(&udp_mask, 0, sizeof(udp_mask));
 673                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 674                         udp.hdr.src_port = conf->port;
 675                         udp_mask.hdr.src_port =
 676                                         rte_flow_item_udp_mask.hdr.src_port;
 677                 } else {
 678                         udp.hdr.dst_port = conf->port;
 679                         udp_mask.hdr.dst_port =
 680                                         rte_flow_item_udp_mask.hdr.dst_port;
 681                 }
 682                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 683                 item.spec = &udp;
 684                 item.mask = &udp_mask;
 685                 field = modify_udp;
 686         }
 687         if (attr->tcp) {
 688                 memset(&tcp, 0, sizeof(tcp));
 689                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 690                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 691                         tcp.hdr.src_port = conf->port;
 692                         tcp_mask.hdr.src_port =
 693                                         rte_flow_item_tcp_mask.hdr.src_port;
 694                 } else {
 695                         tcp.hdr.dst_port = conf->port;
 696                         tcp_mask.hdr.dst_port =
 697                                         rte_flow_item_tcp_mask.hdr.dst_port;
 698                 }
 699                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 700                 item.spec = &tcp;
 701                 item.mask = &tcp_mask;
 702                 field = modify_tcp;
 703         }
 704         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 705                                              MLX5_MODIFICATION_TYPE_SET, error);
 706 }
 707
 708 /**
 709  * Convert modify-header set TTL action to DV specification.
 710  *
 711  * @param[in,out] resource
 712  *   Pointer to the modify-header resource.
 713  * @param[in] action
 714  *   Pointer to action specification.
 715  * @param[in] items
 716  *   Pointer to rte_flow_item objects list.
 717  * @param[in] attr
 718  *   Pointer to flow attributes structure.
 719  * @param[in] tunnel_decap
 720  *   Whether action is after tunnel decapsulation.
 721  * @param[out] error
 722  *   Pointer to the error structure.
 723  *
 724  * @return
 725  *   0 on success, a negative errno value otherwise and rte_errno is set.
 726  */
 727 static int
 728 flow_dv_convert_action_modify_ttl
 729                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 730                          const struct rte_flow_action *action,
 731                          const struct rte_flow_item *items,
 732                          union flow_dv_attr *attr, bool tunnel_decap,
 733                          struct rte_flow_error *error)
 734 {
 735         const struct rte_flow_action_set_ttl *conf =
 736                 (const struct rte_flow_action_set_ttl *)(action->conf);
 737         struct rte_flow_item item;
 738         struct rte_flow_item_ipv4 ipv4;
 739         struct rte_flow_item_ipv4 ipv4_mask;
 740         struct rte_flow_item_ipv6 ipv6;
 741         struct rte_flow_item_ipv6 ipv6_mask;
 742         struct field_modify_info *field;
 743
 744         if (!attr->valid)
 745                 flow_dv_attr_init(items, attr, tunnel_decap);
 746         if (attr->ipv4) {
 747                 memset(&ipv4, 0, sizeof(ipv4));
 748                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 749                 ipv4.hdr.time_to_live = conf->ttl_value;
 750                 ipv4_mask.hdr.time_to_live = 0xFF;
 751                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 752                 item.spec = &ipv4;
 753                 item.mask = &ipv4_mask;
 754                 field = modify_ipv4;
 755         }
 756         if (attr->ipv6) {
 757                 memset(&ipv6, 0, sizeof(ipv6));
 758                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 759                 ipv6.hdr.hop_limits = conf->ttl_value;
 760                 ipv6_mask.hdr.hop_limits = 0xFF;
 761                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 762                 item.spec = &ipv6;
 763                 item.mask = &ipv6_mask;
 764                 field = modify_ipv6;
 765         }
 766         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 767                                              MLX5_MODIFICATION_TYPE_SET, error);
 768 }
 769
 770 /**
 771  * Convert modify-header decrement TTL action to DV specification.
 772  *
 773  * @param[in,out] resource
 774  *   Pointer to the modify-header resource.
 775  * @param[in] action
 776  *   Pointer to action specification.
 777  * @param[in] items
 778  *   Pointer to rte_flow_item objects list.
 779  * @param[in] attr
 780  *   Pointer to flow attributes structure.
 781  * @param[in] tunnel_decap
 782  *   Whether action is after tunnel decapsulation.
 783  * @param[out] error
 784  *   Pointer to the error structure.
 785  *
 786  * @return
 787  *   0 on success, a negative errno value otherwise and rte_errno is set.
 788  */
 789 static int
 790 flow_dv_convert_action_modify_dec_ttl
 791                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 792                          const struct rte_flow_item *items,
 793                          union flow_dv_attr *attr, bool tunnel_decap,
 794                          struct rte_flow_error *error)
 795 {
 796         struct rte_flow_item item;
 797         struct rte_flow_item_ipv4 ipv4;
 798         struct rte_flow_item_ipv4 ipv4_mask;
 799         struct rte_flow_item_ipv6 ipv6;
 800         struct rte_flow_item_ipv6 ipv6_mask;
 801         struct field_modify_info *field;
 802
 803         if (!attr->valid)
 804                 flow_dv_attr_init(items, attr, tunnel_decap);
 805         if (attr->ipv4) {
 806                 memset(&ipv4, 0, sizeof(ipv4));
 807                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 808                 ipv4.hdr.time_to_live = 0xFF;
 809                 ipv4_mask.hdr.time_to_live = 0xFF;
 810                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 811                 item.spec = &ipv4;
 812                 item.mask = &ipv4_mask;
 813                 field = modify_ipv4;
 814         }
 815         if (attr->ipv6) {
 816                 memset(&ipv6, 0, sizeof(ipv6));
 817                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 818                 ipv6.hdr.hop_limits = 0xFF;
 819                 ipv6_mask.hdr.hop_limits = 0xFF;
 820                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 821                 item.spec = &ipv6;
 822                 item.mask = &ipv6_mask;
 823                 field = modify_ipv6;
 824         }
 825         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 826                                              MLX5_MODIFICATION_TYPE_ADD, error);
 827 }
 828
 829 /**
 830  * Convert modify-header increment/decrement TCP Sequence number
 831  * to DV specification.
 832  *
 833  * @param[in,out] resource
 834  *   Pointer to the modify-header resource.
 835  * @param[in] action
 836  *   Pointer to action specification.
 837  * @param[out] error
 838  *   Pointer to the error structure.
 839  *
 840  * @return
 841  *   0 on success, a negative errno value otherwise and rte_errno is set.
 842  */
 843 static int
 844 flow_dv_convert_action_modify_tcp_seq
 845                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 846                          const struct rte_flow_action *action,
 847                          struct rte_flow_error *error)
 848 {
 849         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 850         uint64_t value = rte_be_to_cpu_32(*conf);
 851         struct rte_flow_item item;
 852         struct rte_flow_item_tcp tcp;
 853         struct rte_flow_item_tcp tcp_mask;
 854
 855         memset(&tcp, 0, sizeof(tcp));
 856         memset(&tcp_mask, 0, sizeof(tcp_mask));
 857         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 858                 /*
 859                  * The HW has no decrement operation, only increment operation.
 860                  * To simulate decrement X from Y using increment operation
 861                  * we need to add UINT32_MAX X times to Y.
 862                  * Each adding of UINT32_MAX decrements Y by 1.
 863                  */
 864                 value *= UINT32_MAX;
 865         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 866         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 867         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 868         item.spec = &tcp;
 869         item.mask = &tcp_mask;
 870         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 871                                              MLX5_MODIFICATION_TYPE_ADD, error);
 872 }
 873
 874 /**
 875  * Convert modify-header increment/decrement TCP Acknowledgment number
 876  * to DV specification.
 877  *
 878  * @param[in,out] resource
 879  *   Pointer to the modify-header resource.
 880  * @param[in] action
 881  *   Pointer to action specification.
 882  * @param[out] error
 883  *   Pointer to the error structure.
 884  *
 885  * @return
 886  *   0 on success, a negative errno value otherwise and rte_errno is set.
 887  */
 888 static int
 889 flow_dv_convert_action_modify_tcp_ack
 890                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 891                          const struct rte_flow_action *action,
 892                          struct rte_flow_error *error)
 893 {
 894         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 895         uint64_t value = rte_be_to_cpu_32(*conf);
 896         struct rte_flow_item item;
 897         struct rte_flow_item_tcp tcp;
 898         struct rte_flow_item_tcp tcp_mask;
 899
 900         memset(&tcp, 0, sizeof(tcp));
 901         memset(&tcp_mask, 0, sizeof(tcp_mask));
 902         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 903                 /*
 904                  * The HW has no decrement operation, only increment operation.
 905                  * To simulate decrement X from Y using increment operation
 906                  * we need to add UINT32_MAX X times to Y.
 907                  * Each adding of UINT32_MAX decrements Y by 1.
 908                  */
 909                 value *= UINT32_MAX;
 910         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 911         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 912         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 913         item.spec = &tcp;
 914         item.mask = &tcp_mask;
 915         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 916                                              MLX5_MODIFICATION_TYPE_ADD, error);
 917 }
 918
 919 static enum mlx5_modification_field reg_to_field[] = {
 920         [REG_NONE] = MLX5_MODI_OUT_NONE,
 921         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 922         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 923         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 924         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 925         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 926         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 927         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 928         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 929         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 930         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 931 };
 932
 933 /**
 934  * Convert register set to DV specification.
 935  *
 936  * @param[in,out] resource
 937  *   Pointer to the modify-header resource.
 938  * @param[in] action
 939  *   Pointer to action specification.
 940  * @param[out] error
 941  *   Pointer to the error structure.
 942  *
 943  * @return
 944  *   0 on success, a negative errno value otherwise and rte_errno is set.
 945  */
 946 static int
 947 flow_dv_convert_action_set_reg
 948                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 949                          const struct rte_flow_action *action,
 950                          struct rte_flow_error *error)
 951 {
 952         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 953         struct mlx5_modification_cmd *actions = resource->actions;
 954         uint32_t i = resource->actions_num;
 955
 956         if (i >= MLX5_MAX_MODIFY_NUM)
 957                 return rte_flow_error_set(error, EINVAL,
 958                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 959                                           "too many items to modify");
 960         MLX5_ASSERT(conf->id != REG_NONE);
 961         MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field));
 962         actions[i] = (struct mlx5_modification_cmd) {
 963                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 964                 .field = reg_to_field[conf->id],
 965         };
 966         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 967         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 968         ++i;
 969         resource->actions_num = i;
 970         return 0;
 971 }
 972
 973 /**
 974  * Convert SET_TAG action to DV specification.
 975  *
 976  * @param[in] dev
 977  *   Pointer to the rte_eth_dev structure.
 978  * @param[in,out] resource
 979  *   Pointer to the modify-header resource.
 980  * @param[in] conf
 981  *   Pointer to action specification.
 982  * @param[out] error
 983  *   Pointer to the error structure.
 984  *
 985  * @return
 986  *   0 on success, a negative errno value otherwise and rte_errno is set.
 987  */
 988 static int
 989 flow_dv_convert_action_set_tag
 990                         (struct rte_eth_dev *dev,
 991                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 992                          const struct rte_flow_action_set_tag *conf,
 993                          struct rte_flow_error *error)
 994 {
 995         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 996         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 997         struct rte_flow_item item = {
 998                 .spec = &data,
 999                 .mask = &mask,
1000         };
1001         struct field_modify_info reg_c_x[] = {
1002                 [1] = {0, 0, 0},
1003         };
1004         enum mlx5_modification_field reg_type;
1005         int ret;
1006
1007         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1008         if (ret < 0)
1009                 return ret;
1010         MLX5_ASSERT(ret != REG_NONE);
1011         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1012         reg_type = reg_to_field[ret];
1013         MLX5_ASSERT(reg_type > 0);
1014         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1015         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1016                                              MLX5_MODIFICATION_TYPE_SET, error);
1017 }
1018
1019 /**
1020  * Convert internal COPY_REG action to DV specification.
1021  *
1022  * @param[in] dev
1023  *   Pointer to the rte_eth_dev structure.
1024  * @param[in,out] res
1025  *   Pointer to the modify-header resource.
1026  * @param[in] action
1027  *   Pointer to action specification.
1028  * @param[out] error
1029  *   Pointer to the error structure.
1030  *
1031  * @return
1032  *   0 on success, a negative errno value otherwise and rte_errno is set.
1033  */
1034 static int
1035 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1036                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1037                                  const struct rte_flow_action *action,
1038                                  struct rte_flow_error *error)
1039 {
1040         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1041         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1042         struct rte_flow_item item = {
1043                 .spec = NULL,
1044                 .mask = &mask,
1045         };
1046         struct field_modify_info reg_src[] = {
1047                 {4, 0, reg_to_field[conf->src]},
1048                 {0, 0, 0},
1049         };
1050         struct field_modify_info reg_dst = {
1051                 .offset = 0,
1052                 .id = reg_to_field[conf->dst],
1053         };
1054         /* Adjust reg_c[0] usage according to reported mask. */
1055         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1056                 struct mlx5_priv *priv = dev->data->dev_private;
1057                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1058
1059                 MLX5_ASSERT(reg_c0);
1060                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1061                 if (conf->dst == REG_C_0) {
1062                         /* Copy to reg_c[0], within mask only. */
1063                         reg_dst.offset = rte_bsf32(reg_c0);
1064                         /*
1065                          * Mask is ignoring the enianness, because
1066                          * there is no conversion in datapath.
1067                          */
1068 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1069                         /* Copy from destination lower bits to reg_c[0]. */
1070                         mask = reg_c0 >> reg_dst.offset;
1071 #else
1072                         /* Copy from destination upper bits to reg_c[0]. */
1073                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1074                                           rte_fls_u32(reg_c0));
1075 #endif
1076                 } else {
1077                         mask = rte_cpu_to_be_32(reg_c0);
1078 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1079                         /* Copy from reg_c[0] to destination lower bits. */
1080                         reg_dst.offset = 0;
1081 #else
1082                         /* Copy from reg_c[0] to destination upper bits. */
1083                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1084                                          (rte_fls_u32(reg_c0) -
1085                                           rte_bsf32(reg_c0));
1086 #endif
1087                 }
1088         }
1089         return flow_dv_convert_modify_action(&item,
1090                                              reg_src, &reg_dst, res,
1091                                              MLX5_MODIFICATION_TYPE_COPY,
1092                                              error);
1093 }
1094
1095 /**
1096  * Convert MARK action to DV specification. This routine is used
1097  * in extensive metadata only and requires metadata register to be
1098  * handled. In legacy mode hardware tag resource is engaged.
1099  *
1100  * @param[in] dev
1101  *   Pointer to the rte_eth_dev structure.
1102  * @param[in] conf
1103  *   Pointer to MARK action specification.
1104  * @param[in,out] resource
1105  *   Pointer to the modify-header resource.
1106  * @param[out] error
1107  *   Pointer to the error structure.
1108  *
1109  * @return
1110  *   0 on success, a negative errno value otherwise and rte_errno is set.
1111  */
1112 static int
1113 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1114                             const struct rte_flow_action_mark *conf,
1115                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1116                             struct rte_flow_error *error)
1117 {
1118         struct mlx5_priv *priv = dev->data->dev_private;
1119         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1120                                            priv->sh->dv_mark_mask);
1121         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1122         struct rte_flow_item item = {
1123                 .spec = &data,
1124                 .mask = &mask,
1125         };
1126         struct field_modify_info reg_c_x[] = {
1127                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1128                 {0, 0, 0},
1129         };
1130         int reg;
1131
1132         if (!mask)
1133                 return rte_flow_error_set(error, EINVAL,
1134                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1135                                           NULL, "zero mark action mask");
1136         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1137         if (reg < 0)
1138                 return reg;
1139         MLX5_ASSERT(reg > 0);
1140         if (reg == REG_C_0) {
1141                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1142                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1143
1144                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1145                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1146                 mask = rte_cpu_to_be_32(mask << shl_c0);
1147         }
1148         reg_c_x[0].id = reg_to_field[reg];
1149         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1150                                              MLX5_MODIFICATION_TYPE_SET, error);
1151 }
1152
1153 /**
1154  * Get metadata register index for specified steering domain.
1155  *
1156  * @param[in] dev
1157  *   Pointer to the rte_eth_dev structure.
1158  * @param[in] attr
1159  *   Attributes of flow to determine steering domain.
1160  * @param[out] error
1161  *   Pointer to the error structure.
1162  *
1163  * @return
1164  *   positive index on success, a negative errno value otherwise
1165  *   and rte_errno is set.
1166  */
1167 static enum modify_reg
1168 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1169                          const struct rte_flow_attr *attr,
1170                          struct rte_flow_error *error)
1171 {
1172         int reg =
1173                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1174                                           MLX5_METADATA_FDB :
1175                                             attr->egress ?
1176                                             MLX5_METADATA_TX :
1177                                             MLX5_METADATA_RX, 0, error);
1178         if (reg < 0)
1179                 return rte_flow_error_set(error,
1180                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1181                                           NULL, "unavailable "
1182                                           "metadata register");
1183         return reg;
1184 }
1185
1186 /**
1187  * Convert SET_META action to DV specification.
1188  *
1189  * @param[in] dev
1190  *   Pointer to the rte_eth_dev structure.
1191  * @param[in,out] resource
1192  *   Pointer to the modify-header resource.
1193  * @param[in] attr
1194  *   Attributes of flow that includes this item.
1195  * @param[in] conf
1196  *   Pointer to action specification.
1197  * @param[out] error
1198  *   Pointer to the error structure.
1199  *
1200  * @return
1201  *   0 on success, a negative errno value otherwise and rte_errno is set.
1202  */
1203 static int
1204 flow_dv_convert_action_set_meta
1205                         (struct rte_eth_dev *dev,
1206                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1207                          const struct rte_flow_attr *attr,
1208                          const struct rte_flow_action_set_meta *conf,
1209                          struct rte_flow_error *error)
1210 {
1211         uint32_t data = conf->data;
1212         uint32_t mask = conf->mask;
1213         struct rte_flow_item item = {
1214                 .spec = &data,
1215                 .mask = &mask,
1216         };
1217         struct field_modify_info reg_c_x[] = {
1218                 [1] = {0, 0, 0},
1219         };
1220         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1221
1222         if (reg < 0)
1223                 return reg;
1224         /*
1225          * In datapath code there is no endianness
1226          * coversions for perfromance reasons, all
1227          * pattern conversions are done in rte_flow.
1228          */
1229         if (reg == REG_C_0) {
1230                 struct mlx5_priv *priv = dev->data->dev_private;
1231                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1232                 uint32_t shl_c0;
1233
1234                 MLX5_ASSERT(msk_c0);
1235 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1236                 shl_c0 = rte_bsf32(msk_c0);
1237 #else
1238                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1239 #endif
1240                 mask <<= shl_c0;
1241                 data <<= shl_c0;
1242                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1243         }
1244         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1245         /* The routine expects parameters in memory as big-endian ones. */
1246         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1247                                              MLX5_MODIFICATION_TYPE_SET, error);
1248 }
1249
1250 /**
1251  * Convert modify-header set IPv4 DSCP action to DV specification.
1252  *
1253  * @param[in,out] resource
1254  *   Pointer to the modify-header resource.
1255  * @param[in] action
1256  *   Pointer to action specification.
1257  * @param[out] error
1258  *   Pointer to the error structure.
1259  *
1260  * @return
1261  *   0 on success, a negative errno value otherwise and rte_errno is set.
1262  */
1263 static int
1264 flow_dv_convert_action_modify_ipv4_dscp
1265                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1266                          const struct rte_flow_action *action,
1267                          struct rte_flow_error *error)
1268 {
1269         const struct rte_flow_action_set_dscp *conf =
1270                 (const struct rte_flow_action_set_dscp *)(action->conf);
1271         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1272         struct rte_flow_item_ipv4 ipv4;
1273         struct rte_flow_item_ipv4 ipv4_mask;
1274
1275         memset(&ipv4, 0, sizeof(ipv4));
1276         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1277         ipv4.hdr.type_of_service = conf->dscp;
1278         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1279         item.spec = &ipv4;
1280         item.mask = &ipv4_mask;
1281         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1282                                              MLX5_MODIFICATION_TYPE_SET, error);
1283 }
1284
1285 /**
1286  * Convert modify-header set IPv6 DSCP action to DV specification.
1287  *
1288  * @param[in,out] resource
1289  *   Pointer to the modify-header resource.
1290  * @param[in] action
1291  *   Pointer to action specification.
1292  * @param[out] error
1293  *   Pointer to the error structure.
1294  *
1295  * @return
1296  *   0 on success, a negative errno value otherwise and rte_errno is set.
1297  */
1298 static int
1299 flow_dv_convert_action_modify_ipv6_dscp
1300                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1301                          const struct rte_flow_action *action,
1302                          struct rte_flow_error *error)
1303 {
1304         const struct rte_flow_action_set_dscp *conf =
1305                 (const struct rte_flow_action_set_dscp *)(action->conf);
1306         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1307         struct rte_flow_item_ipv6 ipv6;
1308         struct rte_flow_item_ipv6 ipv6_mask;
1309
1310         memset(&ipv6, 0, sizeof(ipv6));
1311         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1312         /*
1313          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1314          * rdma-core only accept the DSCP bits byte aligned start from
1315          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1316          * bits in IPv6 case as rdma-core requires byte aligned value.
1317          */
1318         ipv6.hdr.vtc_flow = conf->dscp;
1319         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1320         item.spec = &ipv6;
1321         item.mask = &ipv6_mask;
1322         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1323                                              MLX5_MODIFICATION_TYPE_SET, error);
1324 }
1325
1326 /**
1327  * Validate MARK item.
1328  *
1329  * @param[in] dev
1330  *   Pointer to the rte_eth_dev structure.
1331  * @param[in] item
1332  *   Item specification.
1333  * @param[in] attr
1334  *   Attributes of flow that includes this item.
1335  * @param[out] error
1336  *   Pointer to error structure.
1337  *
1338  * @return
1339  *   0 on success, a negative errno value otherwise and rte_errno is set.
1340  */
1341 static int
1342 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1343                            const struct rte_flow_item *item,
1344                            const struct rte_flow_attr *attr __rte_unused,
1345                            struct rte_flow_error *error)
1346 {
1347         struct mlx5_priv *priv = dev->data->dev_private;
1348         struct mlx5_dev_config *config = &priv->config;
1349         const struct rte_flow_item_mark *spec = item->spec;
1350         const struct rte_flow_item_mark *mask = item->mask;
1351         const struct rte_flow_item_mark nic_mask = {
1352                 .id = priv->sh->dv_mark_mask,
1353         };
1354         int ret;
1355
1356         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1357                 return rte_flow_error_set(error, ENOTSUP,
1358                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1359                                           "extended metadata feature"
1360                                           " isn't enabled");
1361         if (!mlx5_flow_ext_mreg_supported(dev))
1362                 return rte_flow_error_set(error, ENOTSUP,
1363                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1364                                           "extended metadata register"
1365                                           " isn't supported");
1366         if (!nic_mask.id)
1367                 return rte_flow_error_set(error, ENOTSUP,
1368                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1369                                           "extended metadata register"
1370                                           " isn't available");
1371         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1372         if (ret < 0)
1373                 return ret;
1374         if (!spec)
1375                 return rte_flow_error_set(error, EINVAL,
1376                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1377                                           item->spec,
1378                                           "data cannot be empty");
1379         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1380                 return rte_flow_error_set(error, EINVAL,
1381                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1382                                           &spec->id,
1383                                           "mark id exceeds the limit");
1384         if (!mask)
1385                 mask = &nic_mask;
1386         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1387                                         (const uint8_t *)&nic_mask,
1388                                         sizeof(struct rte_flow_item_mark),
1389                                         error);
1390         if (ret < 0)
1391                 return ret;
1392         return 0;
1393 }
1394
1395 /**
1396  * Validate META item.
1397  *
1398  * @param[in] dev
1399  *   Pointer to the rte_eth_dev structure.
1400  * @param[in] item
1401  *   Item specification.
1402  * @param[in] attr
1403  *   Attributes of flow that includes this item.
1404  * @param[out] error
1405  *   Pointer to error structure.
1406  *
1407  * @return
1408  *   0 on success, a negative errno value otherwise and rte_errno is set.
1409  */
1410 static int
1411 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1412                            const struct rte_flow_item *item,
1413                            const struct rte_flow_attr *attr,
1414                            struct rte_flow_error *error)
1415 {
1416         struct mlx5_priv *priv = dev->data->dev_private;
1417         struct mlx5_dev_config *config = &priv->config;
1418         const struct rte_flow_item_meta *spec = item->spec;
1419         const struct rte_flow_item_meta *mask = item->mask;
1420         struct rte_flow_item_meta nic_mask = {
1421                 .data = UINT32_MAX
1422         };
1423         int reg;
1424         int ret;
1425
1426         if (!spec)
1427                 return rte_flow_error_set(error, EINVAL,
1428                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1429                                           item->spec,
1430                                           "data cannot be empty");
1431         if (!spec->data)
1432                 return rte_flow_error_set(error, EINVAL,
1433                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1434                                           "data cannot be zero");
1435         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1436                 if (!mlx5_flow_ext_mreg_supported(dev))
1437                         return rte_flow_error_set(error, ENOTSUP,
1438                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1439                                           "extended metadata register"
1440                                           " isn't supported");
1441                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1442                 if (reg < 0)
1443                         return reg;
1444                 if (reg == REG_B)
1445                         return rte_flow_error_set(error, ENOTSUP,
1446                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1447                                           "match on reg_b "
1448                                           "isn't supported");
1449                 if (reg != REG_A)
1450                         nic_mask.data = priv->sh->dv_meta_mask;
1451         }
1452         if (!mask)
1453                 mask = &rte_flow_item_meta_mask;
1454         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1455                                         (const uint8_t *)&nic_mask,
1456                                         sizeof(struct rte_flow_item_meta),
1457                                         error);
1458         return ret;
1459 }
1460
1461 /**
1462  * Validate TAG item.
1463  *
1464  * @param[in] dev
1465  *   Pointer to the rte_eth_dev structure.
1466  * @param[in] item
1467  *   Item specification.
1468  * @param[in] attr
1469  *   Attributes of flow that includes this item.
1470  * @param[out] error
1471  *   Pointer to error structure.
1472  *
1473  * @return
1474  *   0 on success, a negative errno value otherwise and rte_errno is set.
1475  */
1476 static int
1477 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1478                           const struct rte_flow_item *item,
1479                           const struct rte_flow_attr *attr __rte_unused,
1480                           struct rte_flow_error *error)
1481 {
1482         const struct rte_flow_item_tag *spec = item->spec;
1483         const struct rte_flow_item_tag *mask = item->mask;
1484         const struct rte_flow_item_tag nic_mask = {
1485                 .data = RTE_BE32(UINT32_MAX),
1486                 .index = 0xff,
1487         };
1488         int ret;
1489
1490         if (!mlx5_flow_ext_mreg_supported(dev))
1491                 return rte_flow_error_set(error, ENOTSUP,
1492                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1493                                           "extensive metadata register"
1494                                           " isn't supported");
1495         if (!spec)
1496                 return rte_flow_error_set(error, EINVAL,
1497                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1498                                           item->spec,
1499                                           "data cannot be empty");
1500         if (!mask)
1501                 mask = &rte_flow_item_tag_mask;
1502         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1503                                         (const uint8_t *)&nic_mask,
1504                                         sizeof(struct rte_flow_item_tag),
1505                                         error);
1506         if (ret < 0)
1507                 return ret;
1508         if (mask->index != 0xff)
1509                 return rte_flow_error_set(error, EINVAL,
1510                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1511                                           "partial mask for tag index"
1512                                           " is not supported");
1513         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1514         if (ret < 0)
1515                 return ret;
1516         MLX5_ASSERT(ret != REG_NONE);
1517         return 0;
1518 }
1519
1520 /**
1521  * Validate vport item.
1522  *
1523  * @param[in] dev
1524  *   Pointer to the rte_eth_dev structure.
1525  * @param[in] item
1526  *   Item specification.
1527  * @param[in] attr
1528  *   Attributes of flow that includes this item.
1529  * @param[in] item_flags
1530  *   Bit-fields that holds the items detected until now.
1531  * @param[out] error
1532  *   Pointer to error structure.
1533  *
1534  * @return
1535  *   0 on success, a negative errno value otherwise and rte_errno is set.
1536  */
1537 static int
1538 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1539                               const struct rte_flow_item *item,
1540                               const struct rte_flow_attr *attr,
1541                               uint64_t item_flags,
1542                               struct rte_flow_error *error)
1543 {
1544         const struct rte_flow_item_port_id *spec = item->spec;
1545         const struct rte_flow_item_port_id *mask = item->mask;
1546         const struct rte_flow_item_port_id switch_mask = {
1547                         .id = 0xffffffff,
1548         };
1549         struct mlx5_priv *esw_priv;
1550         struct mlx5_priv *dev_priv;
1551         int ret;
1552
1553         if (!attr->transfer)
1554                 return rte_flow_error_set(error, EINVAL,
1555                                           RTE_FLOW_ERROR_TYPE_ITEM,
1556                                           NULL,
1557                                           "match on port id is valid only"
1558                                           " when transfer flag is enabled");
1559         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1560                 return rte_flow_error_set(error, ENOTSUP,
1561                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1562                                           "multiple source ports are not"
1563                                           " supported");
1564         if (!mask)
1565                 mask = &switch_mask;
1566         if (mask->id != 0xffffffff)
1567                 return rte_flow_error_set(error, ENOTSUP,
1568                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1569                                            mask,
1570                                            "no support for partial mask on"
1571                                            " \"id\" field");
1572         ret = mlx5_flow_item_acceptable
1573                                 (item, (const uint8_t *)mask,
1574                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1575                                  sizeof(struct rte_flow_item_port_id),
1576                                  error);
1577         if (ret)
1578                 return ret;
1579         if (!spec)
1580                 return 0;
1581         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1582         if (!esw_priv)
1583                 return rte_flow_error_set(error, rte_errno,
1584                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1585                                           "failed to obtain E-Switch info for"
1586                                           " port");
1587         dev_priv = mlx5_dev_to_eswitch_info(dev);
1588         if (!dev_priv)
1589                 return rte_flow_error_set(error, rte_errno,
1590                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1591                                           NULL,
1592                                           "failed to obtain E-Switch info");
1593         if (esw_priv->domain_id != dev_priv->domain_id)
1594                 return rte_flow_error_set(error, EINVAL,
1595                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1596                                           "cannot match on a port from a"
1597                                           " different E-Switch");
1598         return 0;
1599 }
1600
1601 /**
1602  * Validate GTP item.
1603  *
1604  * @param[in] dev
1605  *   Pointer to the rte_eth_dev structure.
1606  * @param[in] item
1607  *   Item specification.
1608  * @param[in] item_flags
1609  *   Bit-fields that holds the items detected until now.
1610  * @param[out] error
1611  *   Pointer to error structure.
1612  *
1613  * @return
1614  *   0 on success, a negative errno value otherwise and rte_errno is set.
1615  */
1616 static int
1617 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1618                           const struct rte_flow_item *item,
1619                           uint64_t item_flags,
1620                           struct rte_flow_error *error)
1621 {
1622         struct mlx5_priv *priv = dev->data->dev_private;
1623         const struct rte_flow_item_gtp *mask = item->mask;
1624         const struct rte_flow_item_gtp nic_mask = {
1625                 .msg_type = 0xff,
1626                 .teid = RTE_BE32(0xffffffff),
1627         };
1628
1629         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1630                 return rte_flow_error_set(error, ENOTSUP,
1631                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1632                                           "GTP support is not enabled");
1633         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1634                 return rte_flow_error_set(error, ENOTSUP,
1635                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1636                                           "multiple tunnel layers not"
1637                                           " supported");
1638         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1639                 return rte_flow_error_set(error, EINVAL,
1640                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1641                                           "no outer UDP layer found");
1642         if (!mask)
1643                 mask = &rte_flow_item_gtp_mask;
1644         return mlx5_flow_item_acceptable
1645                 (item, (const uint8_t *)mask,
1646                  (const uint8_t *)&nic_mask,
1647                  sizeof(struct rte_flow_item_gtp),
1648                  error);
1649 }
1650
1651 /**
1652  * Validate the pop VLAN action.
1653  *
1654  * @param[in] dev
1655  *   Pointer to the rte_eth_dev structure.
1656  * @param[in] action_flags
1657  *   Holds the actions detected until now.
1658  * @param[in] action
1659  *   Pointer to the pop vlan action.
1660  * @param[in] item_flags
1661  *   The items found in this flow rule.
1662  * @param[in] attr
1663  *   Pointer to flow attributes.
1664  * @param[out] error
1665  *   Pointer to error structure.
1666  *
1667  * @return
1668  *   0 on success, a negative errno value otherwise and rte_errno is set.
1669  */
1670 static int
1671 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1672                                  uint64_t action_flags,
1673                                  const struct rte_flow_action *action,
1674                                  uint64_t item_flags,
1675                                  const struct rte_flow_attr *attr,
1676                                  struct rte_flow_error *error)
1677 {
1678         struct mlx5_priv *priv = dev->data->dev_private;
1679
1680         (void)action;
1681         (void)attr;
1682         if (!priv->sh->pop_vlan_action)
1683                 return rte_flow_error_set(error, ENOTSUP,
1684                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1685                                           NULL,
1686                                           "pop vlan action is not supported");
1687         if (attr->egress)
1688                 return rte_flow_error_set(error, ENOTSUP,
1689                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1690                                           NULL,
1691                                           "pop vlan action not supported for "
1692                                           "egress");
1693         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1694                 return rte_flow_error_set(error, ENOTSUP,
1695                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1696                                           "no support for multiple VLAN "
1697                                           "actions");
1698         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1699                 return rte_flow_error_set(error, ENOTSUP,
1700                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1701                                           NULL,
1702                                           "cannot pop vlan without a "
1703                                           "match on (outer) vlan in the flow");
1704         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1705                 return rte_flow_error_set(error, EINVAL,
1706                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1707                                           "wrong action order, port_id should "
1708                                           "be after pop VLAN action");
1709         return 0;
1710 }
1711
1712 /**
1713  * Get VLAN default info from vlan match info.
1714  *
1715  * @param[in] items
1716  *   the list of item specifications.
1717  * @param[out] vlan
1718  *   pointer VLAN info to fill to.
1719  *
1720  * @return
1721  *   0 on success, a negative errno value otherwise and rte_errno is set.
1722  */
1723 static void
1724 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1725                                   struct rte_vlan_hdr *vlan)
1726 {
1727         const struct rte_flow_item_vlan nic_mask = {
1728                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1729                                 MLX5DV_FLOW_VLAN_VID_MASK),
1730                 .inner_type = RTE_BE16(0xffff),
1731         };
1732
1733         if (items == NULL)
1734                 return;
1735         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1736                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1737                 ;
1738         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1739                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1740                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1741
1742                 if (!vlan_m)
1743                         vlan_m = &nic_mask;
1744                 /* Only full match values are accepted */
1745                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1746                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1747                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1748                         vlan->vlan_tci |=
1749                                 rte_be_to_cpu_16(vlan_v->tci &
1750                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1751                 }
1752                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1753                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1754                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1755                         vlan->vlan_tci |=
1756                                 rte_be_to_cpu_16(vlan_v->tci &
1757                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1758                 }
1759                 if (vlan_m->inner_type == nic_mask.inner_type)
1760                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1761                                                            vlan_m->inner_type);
1762         }
1763 }
1764
1765 /**
1766  * Validate the push VLAN action.
1767  *
1768  * @param[in] action_flags
1769  *   Holds the actions detected until now.
1770  * @param[in] item_flags
1771  *   The items found in this flow rule.
1772  * @param[in] action
1773  *   Pointer to the action structure.
1774  * @param[in] attr
1775  *   Pointer to flow attributes
1776  * @param[out] error
1777  *   Pointer to error structure.
1778  *
1779  * @return
1780  *   0 on success, a negative errno value otherwise and rte_errno is set.
1781  */
1782 static int
1783 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1784                                   uint64_t item_flags __rte_unused,
1785                                   const struct rte_flow_action *action,
1786                                   const struct rte_flow_attr *attr,
1787                                   struct rte_flow_error *error)
1788 {
1789         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1790
1791         if (!attr->transfer && attr->ingress)
1792                 return rte_flow_error_set(error, ENOTSUP,
1793                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1794                                           NULL,
1795                                           "push VLAN action not supported for "
1796                                           "ingress");
1797         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1798             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1799                 return rte_flow_error_set(error, EINVAL,
1800                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1801                                           "invalid vlan ethertype");
1802         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1803                 return rte_flow_error_set(error, ENOTSUP,
1804                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1805                                           "no support for multiple VLAN "
1806                                           "actions");
1807         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1808                 return rte_flow_error_set(error, EINVAL,
1809                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1810                                           "wrong action order, port_id should "
1811                                           "be after push VLAN");
1812         (void)attr;
1813         return 0;
1814 }
1815
1816 /**
1817  * Validate the set VLAN PCP.
1818  *
1819  * @param[in] action_flags
1820  *   Holds the actions detected until now.
1821  * @param[in] actions
1822  *   Pointer to the list of actions remaining in the flow rule.
1823  * @param[out] error
1824  *   Pointer to error structure.
1825  *
1826  * @return
1827  *   0 on success, a negative errno value otherwise and rte_errno is set.
1828  */
1829 static int
1830 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1831                                      const struct rte_flow_action actions[],
1832                                      struct rte_flow_error *error)
1833 {
1834         const struct rte_flow_action *action = actions;
1835         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1836
1837         if (conf->vlan_pcp > 7)
1838                 return rte_flow_error_set(error, EINVAL,
1839                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1840                                           "VLAN PCP value is too big");
1841         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1842                 return rte_flow_error_set(error, ENOTSUP,
1843                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1844                                           "set VLAN PCP action must follow "
1845                                           "the push VLAN action");
1846         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1847                 return rte_flow_error_set(error, ENOTSUP,
1848                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1849                                           "Multiple VLAN PCP modification are "
1850                                           "not supported");
1851         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1852                 return rte_flow_error_set(error, EINVAL,
1853                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1854                                           "wrong action order, port_id should "
1855                                           "be after set VLAN PCP");
1856         return 0;
1857 }
1858
1859 /**
1860  * Validate the set VLAN VID.
1861  *
1862  * @param[in] item_flags
1863  *   Holds the items detected in this rule.
1864  * @param[in] action_flags
1865  *   Holds the actions detected until now.
1866  * @param[in] actions
1867  *   Pointer to the list of actions remaining in the flow rule.
1868  * @param[out] error
1869  *   Pointer to error structure.
1870  *
1871  * @return
1872  *   0 on success, a negative errno value otherwise and rte_errno is set.
1873  */
1874 static int
1875 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1876                                      uint64_t action_flags,
1877                                      const struct rte_flow_action actions[],
1878                                      struct rte_flow_error *error)
1879 {
1880         const struct rte_flow_action *action = actions;
1881         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1882
1883         if (conf->vlan_vid > RTE_BE16(0xFFE))
1884                 return rte_flow_error_set(error, EINVAL,
1885                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1886                                           "VLAN VID value is too big");
1887         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1888             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1889                 return rte_flow_error_set(error, ENOTSUP,
1890                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1891                                           "set VLAN VID action must follow push"
1892                                           " VLAN action or match on VLAN item");
1893         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1894                 return rte_flow_error_set(error, ENOTSUP,
1895                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1896                                           "Multiple VLAN VID modifications are "
1897                                           "not supported");
1898         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1899                 return rte_flow_error_set(error, EINVAL,
1900                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1901                                           "wrong action order, port_id should "
1902                                           "be after set VLAN VID");
1903         return 0;
1904 }
1905
1906 /*
1907  * Validate the FLAG action.
1908  *
1909  * @param[in] dev
1910  *   Pointer to the rte_eth_dev structure.
1911  * @param[in] action_flags
1912  *   Holds the actions detected until now.
1913  * @param[in] attr
1914  *   Pointer to flow attributes
1915  * @param[out] error
1916  *   Pointer to error structure.
1917  *
1918  * @return
1919  *   0 on success, a negative errno value otherwise and rte_errno is set.
1920  */
1921 static int
1922 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1923                              uint64_t action_flags,
1924                              const struct rte_flow_attr *attr,
1925                              struct rte_flow_error *error)
1926 {
1927         struct mlx5_priv *priv = dev->data->dev_private;
1928         struct mlx5_dev_config *config = &priv->config;
1929         int ret;
1930
1931         /* Fall back if no extended metadata register support. */
1932         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1933                 return mlx5_flow_validate_action_flag(action_flags, attr,
1934                                                       error);
1935         /* Extensive metadata mode requires registers. */
1936         if (!mlx5_flow_ext_mreg_supported(dev))
1937                 return rte_flow_error_set(error, ENOTSUP,
1938                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1939                                           "no metadata registers "
1940                                           "to support flag action");
1941         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1942                 return rte_flow_error_set(error, ENOTSUP,
1943                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1944                                           "extended metadata register"
1945                                           " isn't available");
1946         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1947         if (ret < 0)
1948                 return ret;
1949         MLX5_ASSERT(ret > 0);
1950         if (action_flags & MLX5_FLOW_ACTION_MARK)
1951                 return rte_flow_error_set(error, EINVAL,
1952                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1953                                           "can't mark and flag in same flow");
1954         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1955                 return rte_flow_error_set(error, EINVAL,
1956                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1957                                           "can't have 2 flag"
1958                                           " actions in same flow");
1959         return 0;
1960 }
1961
1962 /**
1963  * Validate MARK action.
1964  *
1965  * @param[in] dev
1966  *   Pointer to the rte_eth_dev structure.
1967  * @param[in] action
1968  *   Pointer to action.
1969  * @param[in] action_flags
1970  *   Holds the actions detected until now.
1971  * @param[in] attr
1972  *   Pointer to flow attributes
1973  * @param[out] error
1974  *   Pointer to error structure.
1975  *
1976  * @return
1977  *   0 on success, a negative errno value otherwise and rte_errno is set.
1978  */
1979 static int
1980 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1981                              const struct rte_flow_action *action,
1982                              uint64_t action_flags,
1983                              const struct rte_flow_attr *attr,
1984                              struct rte_flow_error *error)
1985 {
1986         struct mlx5_priv *priv = dev->data->dev_private;
1987         struct mlx5_dev_config *config = &priv->config;
1988         const struct rte_flow_action_mark *mark = action->conf;
1989         int ret;
1990
1991         /* Fall back if no extended metadata register support. */
1992         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1993                 return mlx5_flow_validate_action_mark(action, action_flags,
1994                                                       attr, error);
1995         /* Extensive metadata mode requires registers. */
1996         if (!mlx5_flow_ext_mreg_supported(dev))
1997                 return rte_flow_error_set(error, ENOTSUP,
1998                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1999                                           "no metadata registers "
2000                                           "to support mark action");
2001         if (!priv->sh->dv_mark_mask)
2002                 return rte_flow_error_set(error, ENOTSUP,
2003                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2004                                           "extended metadata register"
2005                                           " isn't available");
2006         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2007         if (ret < 0)
2008                 return ret;
2009         MLX5_ASSERT(ret > 0);
2010         if (!mark)
2011                 return rte_flow_error_set(error, EINVAL,
2012                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2013                                           "configuration cannot be null");
2014         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
2015                 return rte_flow_error_set(error, EINVAL,
2016                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2017                                           &mark->id,
2018                                           "mark id exceeds the limit");
2019         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2020                 return rte_flow_error_set(error, EINVAL,
2021                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2022                                           "can't flag and mark in same flow");
2023         if (action_flags & MLX5_FLOW_ACTION_MARK)
2024                 return rte_flow_error_set(error, EINVAL,
2025                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2026                                           "can't have 2 mark actions in same"
2027                                           " flow");
2028         return 0;
2029 }
2030
2031 /**
2032  * Validate SET_META action.
2033  *
2034  * @param[in] dev
2035  *   Pointer to the rte_eth_dev structure.
2036  * @param[in] action
2037  *   Pointer to the action structure.
2038  * @param[in] action_flags
2039  *   Holds the actions detected until now.
2040  * @param[in] attr
2041  *   Pointer to flow attributes
2042  * @param[out] error
2043  *   Pointer to error structure.
2044  *
2045  * @return
2046  *   0 on success, a negative errno value otherwise and rte_errno is set.
2047  */
2048 static int
2049 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2050                                  const struct rte_flow_action *action,
2051                                  uint64_t action_flags __rte_unused,
2052                                  const struct rte_flow_attr *attr,
2053                                  struct rte_flow_error *error)
2054 {
2055         const struct rte_flow_action_set_meta *conf;
2056         uint32_t nic_mask = UINT32_MAX;
2057         int reg;
2058
2059         if (!mlx5_flow_ext_mreg_supported(dev))
2060                 return rte_flow_error_set(error, ENOTSUP,
2061                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2062                                           "extended metadata register"
2063                                           " isn't supported");
2064         reg = flow_dv_get_metadata_reg(dev, attr, error);
2065         if (reg < 0)
2066                 return reg;
2067         if (reg != REG_A && reg != REG_B) {
2068                 struct mlx5_priv *priv = dev->data->dev_private;
2069
2070                 nic_mask = priv->sh->dv_meta_mask;
2071         }
2072         if (!(action->conf))
2073                 return rte_flow_error_set(error, EINVAL,
2074                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2075                                           "configuration cannot be null");
2076         conf = (const struct rte_flow_action_set_meta *)action->conf;
2077         if (!conf->mask)
2078                 return rte_flow_error_set(error, EINVAL,
2079                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2080                                           "zero mask doesn't have any effect");
2081         if (conf->mask & ~nic_mask)
2082                 return rte_flow_error_set(error, EINVAL,
2083                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2084                                           "meta data must be within reg C0");
2085         if (!(conf->data & conf->mask))
2086                 return rte_flow_error_set(error, EINVAL,
2087                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2088                                           "zero value has no effect");
2089         return 0;
2090 }
2091
2092 /**
2093  * Validate SET_TAG action.
2094  *
2095  * @param[in] dev
2096  *   Pointer to the rte_eth_dev structure.
2097  * @param[in] action
2098  *   Pointer to the action structure.
2099  * @param[in] action_flags
2100  *   Holds the actions detected until now.
2101  * @param[in] attr
2102  *   Pointer to flow attributes
2103  * @param[out] error
2104  *   Pointer to error structure.
2105  *
2106  * @return
2107  *   0 on success, a negative errno value otherwise and rte_errno is set.
2108  */
2109 static int
2110 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2111                                 const struct rte_flow_action *action,
2112                                 uint64_t action_flags,
2113                                 const struct rte_flow_attr *attr,
2114                                 struct rte_flow_error *error)
2115 {
2116         const struct rte_flow_action_set_tag *conf;
2117         const uint64_t terminal_action_flags =
2118                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2119                 MLX5_FLOW_ACTION_RSS;
2120         int ret;
2121
2122         if (!mlx5_flow_ext_mreg_supported(dev))
2123                 return rte_flow_error_set(error, ENOTSUP,
2124                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2125                                           "extensive metadata register"
2126                                           " isn't supported");
2127         if (!(action->conf))
2128                 return rte_flow_error_set(error, EINVAL,
2129                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2130                                           "configuration cannot be null");
2131         conf = (const struct rte_flow_action_set_tag *)action->conf;
2132         if (!conf->mask)
2133                 return rte_flow_error_set(error, EINVAL,
2134                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2135                                           "zero mask doesn't have any effect");
2136         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2137         if (ret < 0)
2138                 return ret;
2139         if (!attr->transfer && attr->ingress &&
2140             (action_flags & terminal_action_flags))
2141                 return rte_flow_error_set(error, EINVAL,
2142                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2143                                           "set_tag has no effect"
2144                                           " with terminal actions");
2145         return 0;
2146 }
2147
2148 /**
2149  * Validate count action.
2150  *
2151  * @param[in] dev
2152  *   Pointer to rte_eth_dev structure.
2153  * @param[out] error
2154  *   Pointer to error structure.
2155  *
2156  * @return
2157  *   0 on success, a negative errno value otherwise and rte_errno is set.
2158  */
2159 static int
2160 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2161                               struct rte_flow_error *error)
2162 {
2163         struct mlx5_priv *priv = dev->data->dev_private;
2164
2165         if (!priv->config.devx)
2166                 goto notsup_err;
2167 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2168         return 0;
2169 #endif
2170 notsup_err:
2171         return rte_flow_error_set
2172                       (error, ENOTSUP,
2173                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2174                        NULL,
2175                        "count action not supported");
2176 }
2177
2178 /**
2179  * Validate the L2 encap action.
2180  *
2181  * @param[in] action_flags
2182  *   Holds the actions detected until now.
2183  * @param[in] action
2184  *   Pointer to the action structure.
2185  * @param[out] error
2186  *   Pointer to error structure.
2187  *
2188  * @return
2189  *   0 on success, a negative errno value otherwise and rte_errno is set.
2190  */
2191 static int
2192 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2193                                  const struct rte_flow_action *action,
2194                                  struct rte_flow_error *error)
2195 {
2196         if (!(action->conf))
2197                 return rte_flow_error_set(error, EINVAL,
2198                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2199                                           "configuration cannot be null");
2200         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
2201                 return rte_flow_error_set(error, EINVAL,
2202                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2203                                           "can only have a single encap action "
2204                                           "in a flow");
2205         return 0;
2206 }
2207
2208 /**
2209  * Validate a decap action.
2210  *
2211  * @param[in] action_flags
2212  *   Holds the actions detected until now.
2213  * @param[in] attr
2214  *   Pointer to flow attributes
2215  * @param[out] error
2216  *   Pointer to error structure.
2217  *
2218  * @return
2219  *   0 on success, a negative errno value otherwise and rte_errno is set.
2220  */
2221 static int
2222 flow_dv_validate_action_decap(uint64_t action_flags,
2223                                  const struct rte_flow_attr *attr,
2224                                  struct rte_flow_error *error)
2225 {
2226         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
2227                 return rte_flow_error_set(error, ENOTSUP,
2228                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2229                                           action_flags &
2230                                           MLX5_FLOW_ACTION_DECAP ? "can only "
2231                                           "have a single decap action" : "decap "
2232                                           "after encap is not supported");
2233         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2234                 return rte_flow_error_set(error, EINVAL,
2235                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2236                                           "can't have decap action after"
2237                                           " modify action");
2238         if (attr->egress)
2239                 return rte_flow_error_set(error, ENOTSUP,
2240                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2241                                           NULL,
2242                                           "decap action not supported for "
2243                                           "egress");
2244         return 0;
2245 }
2246
2247 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
2248
2249 /**
2250  * Validate the raw encap and decap actions.
2251  *
2252  * @param[in] decap
2253  *   Pointer to the decap action.
2254  * @param[in] encap
2255  *   Pointer to the encap action.
2256  * @param[in] attr
2257  *   Pointer to flow attributes
2258  * @param[in/out] action_flags
2259  *   Holds the actions detected until now.
2260  * @param[out] actions_n
2261  *   pointer to the number of actions counter.
2262  * @param[out] error
2263  *   Pointer to error structure.
2264  *
2265  * @return
2266  *   0 on success, a negative errno value otherwise and rte_errno is set.
2267  */
2268 static int
2269 flow_dv_validate_action_raw_encap_decap
2270         (const struct rte_flow_action_raw_decap *decap,
2271          const struct rte_flow_action_raw_encap *encap,
2272          const struct rte_flow_attr *attr, uint64_t *action_flags,
2273          int *actions_n, struct rte_flow_error *error)
2274 {
2275         int ret;
2276
2277         if (encap && (!encap->size || !encap->data))
2278                 return rte_flow_error_set(error, EINVAL,
2279                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2280                                           "raw encap data cannot be empty");
2281         if (decap && encap) {
2282                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
2283                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2284                         /* L3 encap. */
2285                         decap = NULL;
2286                 else if (encap->size <=
2287                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2288                            decap->size >
2289                            MLX5_ENCAPSULATION_DECISION_SIZE)
2290                         /* L3 decap. */
2291                         encap = NULL;
2292                 else if (encap->size >
2293                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2294                            decap->size >
2295                            MLX5_ENCAPSULATION_DECISION_SIZE)
2296                         /* 2 L2 actions: encap and decap. */
2297                         ;
2298                 else
2299                         return rte_flow_error_set(error,
2300                                 ENOTSUP,
2301                                 RTE_FLOW_ERROR_TYPE_ACTION,
2302                                 NULL, "unsupported too small "
2303                                 "raw decap and too small raw "
2304                                 "encap combination");
2305         }
2306         if (decap) {
2307                 ret = flow_dv_validate_action_decap(*action_flags, attr, error);
2308                 if (ret < 0)
2309                         return ret;
2310                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
2311                 ++(*actions_n);
2312         }
2313         if (encap) {
2314                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
2315                         return rte_flow_error_set(error, ENOTSUP,
2316                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2317                                                   NULL,
2318                                                   "small raw encap size");
2319                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
2320                         return rte_flow_error_set(error, EINVAL,
2321                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2322                                                   NULL,
2323                                                   "more than one encap action");
2324                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
2325                 ++(*actions_n);
2326         }
2327         return 0;
2328 }
2329
2330 /**
2331  * Find existing encap/decap resource or create and register a new one.
2332  *
2333  * @param[in, out] dev
2334  *   Pointer to rte_eth_dev structure.
2335  * @param[in, out] resource
2336  *   Pointer to encap/decap resource.
2337  * @parm[in, out] dev_flow
2338  *   Pointer to the dev_flow.
2339  * @param[out] error
2340  *   pointer to error structure.
2341  *
2342  * @return
2343  *   0 on success otherwise -errno and errno is set.
2344  */
2345 static int
2346 flow_dv_encap_decap_resource_register
2347                         (struct rte_eth_dev *dev,
2348                          struct mlx5_flow_dv_encap_decap_resource *resource,
2349                          struct mlx5_flow *dev_flow,
2350                          struct rte_flow_error *error)
2351 {
2352         struct mlx5_priv *priv = dev->data->dev_private;
2353         struct mlx5_ibv_shared *sh = priv->sh;
2354         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2355         struct mlx5dv_dr_domain *domain;
2356
2357         resource->flags = dev_flow->group ? 0 : 1;
2358         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2359                 domain = sh->fdb_domain;
2360         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2361                 domain = sh->rx_domain;
2362         else
2363                 domain = sh->tx_domain;
2364         /* Lookup a matching resource from cache. */
2365         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2366                 if (resource->reformat_type == cache_resource->reformat_type &&
2367                     resource->ft_type == cache_resource->ft_type &&
2368                     resource->flags == cache_resource->flags &&
2369                     resource->size == cache_resource->size &&
2370                     !memcmp((const void *)resource->buf,
2371                             (const void *)cache_resource->buf,
2372                             resource->size)) {
2373                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2374                                 (void *)cache_resource,
2375                                 rte_atomic32_read(&cache_resource->refcnt));
2376                         rte_atomic32_inc(&cache_resource->refcnt);
2377                         dev_flow->dv.encap_decap = cache_resource;
2378                         return 0;
2379                 }
2380         }
2381         /* Register new encap/decap resource. */
2382         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2383         if (!cache_resource)
2384                 return rte_flow_error_set(error, ENOMEM,
2385                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2386                                           "cannot allocate resource memory");
2387         *cache_resource = *resource;
2388         cache_resource->verbs_action =
2389                 mlx5_glue->dv_create_flow_action_packet_reformat
2390                         (sh->ctx, cache_resource->reformat_type,
2391                          cache_resource->ft_type, domain, cache_resource->flags,
2392                          cache_resource->size,
2393                          (cache_resource->size ? cache_resource->buf : NULL));
2394         if (!cache_resource->verbs_action) {
2395                 rte_free(cache_resource);
2396                 return rte_flow_error_set(error, ENOMEM,
2397                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2398                                           NULL, "cannot create action");
2399         }
2400         rte_atomic32_init(&cache_resource->refcnt);
2401         rte_atomic32_inc(&cache_resource->refcnt);
2402         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2403         dev_flow->dv.encap_decap = cache_resource;
2404         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2405                 (void *)cache_resource,
2406                 rte_atomic32_read(&cache_resource->refcnt));
2407         return 0;
2408 }
2409
2410 /**
2411  * Find existing table jump resource or create and register a new one.
2412  *
2413  * @param[in, out] dev
2414  *   Pointer to rte_eth_dev structure.
2415  * @param[in, out] tbl
2416  *   Pointer to flow table resource.
2417  * @parm[in, out] dev_flow
2418  *   Pointer to the dev_flow.
2419  * @param[out] error
2420  *   pointer to error structure.
2421  *
2422  * @return
2423  *   0 on success otherwise -errno and errno is set.
2424  */
2425 static int
2426 flow_dv_jump_tbl_resource_register
2427                         (struct rte_eth_dev *dev __rte_unused,
2428                          struct mlx5_flow_tbl_resource *tbl,
2429                          struct mlx5_flow *dev_flow,
2430                          struct rte_flow_error *error)
2431 {
2432         struct mlx5_flow_tbl_data_entry *tbl_data =
2433                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2434         int cnt;
2435
2436         MLX5_ASSERT(tbl);
2437         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2438         if (!cnt) {
2439                 tbl_data->jump.action =
2440                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2441                         (tbl->obj);
2442                 if (!tbl_data->jump.action)
2443                         return rte_flow_error_set(error, ENOMEM,
2444                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2445                                         NULL, "cannot create jump action");
2446                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2447                         (void *)&tbl_data->jump, cnt);
2448         } else {
2449                 MLX5_ASSERT(tbl_data->jump.action);
2450                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2451                         (void *)&tbl_data->jump, cnt);
2452         }
2453         rte_atomic32_inc(&tbl_data->jump.refcnt);
2454         dev_flow->dv.jump = &tbl_data->jump;
2455         return 0;
2456 }
2457
2458 /**
2459  * Find existing table port ID resource or create and register a new one.
2460  *
2461  * @param[in, out] dev
2462  *   Pointer to rte_eth_dev structure.
2463  * @param[in, out] resource
2464  *   Pointer to port ID action resource.
2465  * @parm[in, out] dev_flow
2466  *   Pointer to the dev_flow.
2467  * @param[out] error
2468  *   pointer to error structure.
2469  *
2470  * @return
2471  *   0 on success otherwise -errno and errno is set.
2472  */
2473 static int
2474 flow_dv_port_id_action_resource_register
2475                         (struct rte_eth_dev *dev,
2476                          struct mlx5_flow_dv_port_id_action_resource *resource,
2477                          struct mlx5_flow *dev_flow,
2478                          struct rte_flow_error *error)
2479 {
2480         struct mlx5_priv *priv = dev->data->dev_private;
2481         struct mlx5_ibv_shared *sh = priv->sh;
2482         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2483
2484         /* Lookup a matching resource from cache. */
2485         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2486                 if (resource->port_id == cache_resource->port_id) {
2487                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2488                                 "refcnt %d++",
2489                                 (void *)cache_resource,
2490                                 rte_atomic32_read(&cache_resource->refcnt));
2491                         rte_atomic32_inc(&cache_resource->refcnt);
2492                         dev_flow->dv.port_id_action = cache_resource;
2493                         return 0;
2494                 }
2495         }
2496         /* Register new port id action resource. */
2497         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2498         if (!cache_resource)
2499                 return rte_flow_error_set(error, ENOMEM,
2500                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2501                                           "cannot allocate resource memory");
2502         *cache_resource = *resource;
2503         /*
2504          * Depending on rdma_core version the glue routine calls
2505          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2506          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2507          */
2508         cache_resource->action =
2509                 mlx5_glue->dr_create_flow_action_dest_port
2510                         (priv->sh->fdb_domain, resource->port_id);
2511         if (!cache_resource->action) {
2512                 rte_free(cache_resource);
2513                 return rte_flow_error_set(error, ENOMEM,
2514                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2515                                           NULL, "cannot create action");
2516         }
2517         rte_atomic32_init(&cache_resource->refcnt);
2518         rte_atomic32_inc(&cache_resource->refcnt);
2519         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2520         dev_flow->dv.port_id_action = cache_resource;
2521         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2522                 (void *)cache_resource,
2523                 rte_atomic32_read(&cache_resource->refcnt));
2524         return 0;
2525 }
2526
2527 /**
2528  * Find existing push vlan resource or create and register a new one.
2529  *
2530  * @param [in, out] dev
2531  *   Pointer to rte_eth_dev structure.
2532  * @param[in, out] resource
2533  *   Pointer to port ID action resource.
2534  * @parm[in, out] dev_flow
2535  *   Pointer to the dev_flow.
2536  * @param[out] error
2537  *   pointer to error structure.
2538  *
2539  * @return
2540  *   0 on success otherwise -errno and errno is set.
2541  */
2542 static int
2543 flow_dv_push_vlan_action_resource_register
2544                        (struct rte_eth_dev *dev,
2545                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2546                         struct mlx5_flow *dev_flow,
2547                         struct rte_flow_error *error)
2548 {
2549         struct mlx5_priv *priv = dev->data->dev_private;
2550         struct mlx5_ibv_shared *sh = priv->sh;
2551         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2552         struct mlx5dv_dr_domain *domain;
2553
2554         /* Lookup a matching resource from cache. */
2555         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2556                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2557                     resource->ft_type == cache_resource->ft_type) {
2558                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2559                                 "refcnt %d++",
2560                                 (void *)cache_resource,
2561                                 rte_atomic32_read(&cache_resource->refcnt));
2562                         rte_atomic32_inc(&cache_resource->refcnt);
2563                         dev_flow->dv.push_vlan_res = cache_resource;
2564                         return 0;
2565                 }
2566         }
2567         /* Register new push_vlan action resource. */
2568         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2569         if (!cache_resource)
2570                 return rte_flow_error_set(error, ENOMEM,
2571                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2572                                           "cannot allocate resource memory");
2573         *cache_resource = *resource;
2574         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2575                 domain = sh->fdb_domain;
2576         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2577                 domain = sh->rx_domain;
2578         else
2579                 domain = sh->tx_domain;
2580         cache_resource->action =
2581                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2582                                                            resource->vlan_tag);
2583         if (!cache_resource->action) {
2584                 rte_free(cache_resource);
2585                 return rte_flow_error_set(error, ENOMEM,
2586                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2587                                           NULL, "cannot create action");
2588         }
2589         rte_atomic32_init(&cache_resource->refcnt);
2590         rte_atomic32_inc(&cache_resource->refcnt);
2591         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2592         dev_flow->dv.push_vlan_res = cache_resource;
2593         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2594                 (void *)cache_resource,
2595                 rte_atomic32_read(&cache_resource->refcnt));
2596         return 0;
2597 }
2598 /**
2599  * Get the size of specific rte_flow_item_type
2600  *
2601  * @param[in] item_type
2602  *   Tested rte_flow_item_type.
2603  *
2604  * @return
2605  *   sizeof struct item_type, 0 if void or irrelevant.
2606  */
2607 static size_t
2608 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2609 {
2610         size_t retval;
2611
2612         switch (item_type) {
2613         case RTE_FLOW_ITEM_TYPE_ETH:
2614                 retval = sizeof(struct rte_flow_item_eth);
2615                 break;
2616         case RTE_FLOW_ITEM_TYPE_VLAN:
2617                 retval = sizeof(struct rte_flow_item_vlan);
2618                 break;
2619         case RTE_FLOW_ITEM_TYPE_IPV4:
2620                 retval = sizeof(struct rte_flow_item_ipv4);
2621                 break;
2622         case RTE_FLOW_ITEM_TYPE_IPV6:
2623                 retval = sizeof(struct rte_flow_item_ipv6);
2624                 break;
2625         case RTE_FLOW_ITEM_TYPE_UDP:
2626                 retval = sizeof(struct rte_flow_item_udp);
2627                 break;
2628         case RTE_FLOW_ITEM_TYPE_TCP:
2629                 retval = sizeof(struct rte_flow_item_tcp);
2630                 break;
2631         case RTE_FLOW_ITEM_TYPE_VXLAN:
2632                 retval = sizeof(struct rte_flow_item_vxlan);
2633                 break;
2634         case RTE_FLOW_ITEM_TYPE_GRE:
2635                 retval = sizeof(struct rte_flow_item_gre);
2636                 break;
2637         case RTE_FLOW_ITEM_TYPE_NVGRE:
2638                 retval = sizeof(struct rte_flow_item_nvgre);
2639                 break;
2640         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2641                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2642                 break;
2643         case RTE_FLOW_ITEM_TYPE_MPLS:
2644                 retval = sizeof(struct rte_flow_item_mpls);
2645                 break;
2646         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2647         default:
2648                 retval = 0;
2649                 break;
2650         }
2651         return retval;
2652 }
2653
2654 #define MLX5_ENCAP_IPV4_VERSION         0x40
2655 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2656 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2657 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2658 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2659 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2660 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2661
2662 /**
2663  * Convert the encap action data from list of rte_flow_item to raw buffer
2664  *
2665  * @param[in] items
2666  *   Pointer to rte_flow_item objects list.
2667  * @param[out] buf
2668  *   Pointer to the output buffer.
2669  * @param[out] size
2670  *   Pointer to the output buffer size.
2671  * @param[out] error
2672  *   Pointer to the error structure.
2673  *
2674  * @return
2675  *   0 on success, a negative errno value otherwise and rte_errno is set.
2676  */
2677 static int
2678 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2679                            size_t *size, struct rte_flow_error *error)
2680 {
2681         struct rte_ether_hdr *eth = NULL;
2682         struct rte_vlan_hdr *vlan = NULL;
2683         struct rte_ipv4_hdr *ipv4 = NULL;
2684         struct rte_ipv6_hdr *ipv6 = NULL;
2685         struct rte_udp_hdr *udp = NULL;
2686         struct rte_vxlan_hdr *vxlan = NULL;
2687         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2688         struct rte_gre_hdr *gre = NULL;
2689         size_t len;
2690         size_t temp_size = 0;
2691
2692         if (!items)
2693                 return rte_flow_error_set(error, EINVAL,
2694                                           RTE_FLOW_ERROR_TYPE_ACTION,
2695                                           NULL, "invalid empty data");
2696         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2697                 len = flow_dv_get_item_len(items->type);
2698                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2699                         return rte_flow_error_set(error, EINVAL,
2700                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2701                                                   (void *)items->type,
2702                                                   "items total size is too big"
2703                                                   " for encap action");
2704                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2705                 switch (items->type) {
2706                 case RTE_FLOW_ITEM_TYPE_ETH:
2707                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2708                         break;
2709                 case RTE_FLOW_ITEM_TYPE_VLAN:
2710                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2711                         if (!eth)
2712                                 return rte_flow_error_set(error, EINVAL,
2713                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2714                                                 (void *)items->type,
2715                                                 "eth header not found");
2716                         if (!eth->ether_type)
2717                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2718                         break;
2719                 case RTE_FLOW_ITEM_TYPE_IPV4:
2720                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2721                         if (!vlan && !eth)
2722                                 return rte_flow_error_set(error, EINVAL,
2723                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2724                                                 (void *)items->type,
2725                                                 "neither eth nor vlan"
2726                                                 " header found");
2727                         if (vlan && !vlan->eth_proto)
2728                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2729                         else if (eth && !eth->ether_type)
2730                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2731                         if (!ipv4->version_ihl)
2732                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2733                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2734                         if (!ipv4->time_to_live)
2735                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2736                         break;
2737                 case RTE_FLOW_ITEM_TYPE_IPV6:
2738                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2739                         if (!vlan && !eth)
2740                                 return rte_flow_error_set(error, EINVAL,
2741                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2742                                                 (void *)items->type,
2743                                                 "neither eth nor vlan"
2744                                                 " header found");
2745                         if (vlan && !vlan->eth_proto)
2746                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2747                         else if (eth && !eth->ether_type)
2748                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2749                         if (!ipv6->vtc_flow)
2750                                 ipv6->vtc_flow =
2751                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2752                         if (!ipv6->hop_limits)
2753                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2754                         break;
2755                 case RTE_FLOW_ITEM_TYPE_UDP:
2756                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2757                         if (!ipv4 && !ipv6)
2758                                 return rte_flow_error_set(error, EINVAL,
2759                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2760                                                 (void *)items->type,
2761                                                 "ip header not found");
2762                         if (ipv4 && !ipv4->next_proto_id)
2763                                 ipv4->next_proto_id = IPPROTO_UDP;
2764                         else if (ipv6 && !ipv6->proto)
2765                                 ipv6->proto = IPPROTO_UDP;
2766                         break;
2767                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2768                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2769                         if (!udp)
2770                                 return rte_flow_error_set(error, EINVAL,
2771                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2772                                                 (void *)items->type,
2773                                                 "udp header not found");
2774                         if (!udp->dst_port)
2775                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2776                         if (!vxlan->vx_flags)
2777                                 vxlan->vx_flags =
2778                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2779                         break;
2780                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2781                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2782                         if (!udp)
2783                                 return rte_flow_error_set(error, EINVAL,
2784                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2785                                                 (void *)items->type,
2786                                                 "udp header not found");
2787                         if (!vxlan_gpe->proto)
2788                                 return rte_flow_error_set(error, EINVAL,
2789                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2790                                                 (void *)items->type,
2791                                                 "next protocol not found");
2792                         if (!udp->dst_port)
2793                                 udp->dst_port =
2794                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2795                         if (!vxlan_gpe->vx_flags)
2796                                 vxlan_gpe->vx_flags =
2797                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2798                         break;
2799                 case RTE_FLOW_ITEM_TYPE_GRE:
2800                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2801                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2802                         if (!gre->proto)
2803                                 return rte_flow_error_set(error, EINVAL,
2804                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2805                                                 (void *)items->type,
2806                                                 "next protocol not found");
2807                         if (!ipv4 && !ipv6)
2808                                 return rte_flow_error_set(error, EINVAL,
2809                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2810                                                 (void *)items->type,
2811                                                 "ip header not found");
2812                         if (ipv4 && !ipv4->next_proto_id)
2813                                 ipv4->next_proto_id = IPPROTO_GRE;
2814                         else if (ipv6 && !ipv6->proto)
2815                                 ipv6->proto = IPPROTO_GRE;
2816                         break;
2817                 case RTE_FLOW_ITEM_TYPE_VOID:
2818                         break;
2819                 default:
2820                         return rte_flow_error_set(error, EINVAL,
2821                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2822                                                   (void *)items->type,
2823                                                   "unsupported item type");
2824                         break;
2825                 }
2826                 temp_size += len;
2827         }
2828         *size = temp_size;
2829         return 0;
2830 }
2831
2832 static int
2833 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2834 {
2835         struct rte_ether_hdr *eth = NULL;
2836         struct rte_vlan_hdr *vlan = NULL;
2837         struct rte_ipv6_hdr *ipv6 = NULL;
2838         struct rte_udp_hdr *udp = NULL;
2839         char *next_hdr;
2840         uint16_t proto;
2841
2842         eth = (struct rte_ether_hdr *)data;
2843         next_hdr = (char *)(eth + 1);
2844         proto = RTE_BE16(eth->ether_type);
2845
2846         /* VLAN skipping */
2847         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2848                 vlan = (struct rte_vlan_hdr *)next_hdr;
2849                 proto = RTE_BE16(vlan->eth_proto);
2850                 next_hdr += sizeof(struct rte_vlan_hdr);
2851         }
2852
2853         /* HW calculates IPv4 csum. no need to proceed */
2854         if (proto == RTE_ETHER_TYPE_IPV4)
2855                 return 0;
2856
2857         /* non IPv4/IPv6 header. not supported */
2858         if (proto != RTE_ETHER_TYPE_IPV6) {
2859                 return rte_flow_error_set(error, ENOTSUP,
2860                                           RTE_FLOW_ERROR_TYPE_ACTION,
2861                                           NULL, "Cannot offload non IPv4/IPv6");
2862         }
2863
2864         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2865
2866         /* ignore non UDP */
2867         if (ipv6->proto != IPPROTO_UDP)
2868                 return 0;
2869
2870         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2871         udp->dgram_cksum = 0;
2872
2873         return 0;
2874 }
2875
2876 /**
2877  * Convert L2 encap action to DV specification.
2878  *
2879  * @param[in] dev
2880  *   Pointer to rte_eth_dev structure.
2881  * @param[in] action
2882  *   Pointer to action structure.
2883  * @param[in, out] dev_flow
2884  *   Pointer to the mlx5_flow.
2885  * @param[in] transfer
2886  *   Mark if the flow is E-Switch flow.
2887  * @param[out] error
2888  *   Pointer to the error structure.
2889  *
2890  * @return
2891  *   0 on success, a negative errno value otherwise and rte_errno is set.
2892  */
2893 static int
2894 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2895                                const struct rte_flow_action *action,
2896                                struct mlx5_flow *dev_flow,
2897                                uint8_t transfer,
2898                                struct rte_flow_error *error)
2899 {
2900         const struct rte_flow_item *encap_data;
2901         const struct rte_flow_action_raw_encap *raw_encap_data;
2902         struct mlx5_flow_dv_encap_decap_resource res = {
2903                 .reformat_type =
2904                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2905                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2906                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2907         };
2908
2909         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2910                 raw_encap_data =
2911                         (const struct rte_flow_action_raw_encap *)action->conf;
2912                 res.size = raw_encap_data->size;
2913                 memcpy(res.buf, raw_encap_data->data, res.size);
2914         } else {
2915                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2916                         encap_data =
2917                                 ((const struct rte_flow_action_vxlan_encap *)
2918                                                 action->conf)->definition;
2919                 else
2920                         encap_data =
2921                                 ((const struct rte_flow_action_nvgre_encap *)
2922                                                 action->conf)->definition;
2923                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2924                                                &res.size, error))
2925                         return -rte_errno;
2926         }
2927         if (flow_dv_zero_encap_udp_csum(res.buf, error))
2928                 return -rte_errno;
2929         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2930                 return rte_flow_error_set(error, EINVAL,
2931                                           RTE_FLOW_ERROR_TYPE_ACTION,
2932                                           NULL, "can't create L2 encap action");
2933         return 0;
2934 }
2935
2936 /**
2937  * Convert L2 decap action to DV specification.
2938  *
2939  * @param[in] dev
2940  *   Pointer to rte_eth_dev structure.
2941  * @param[in, out] dev_flow
2942  *   Pointer to the mlx5_flow.
2943  * @param[in] transfer
2944  *   Mark if the flow is E-Switch flow.
2945  * @param[out] error
2946  *   Pointer to the error structure.
2947  *
2948  * @return
2949  *   0 on success, a negative errno value otherwise and rte_errno is set.
2950  */
2951 static int
2952 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2953                                struct mlx5_flow *dev_flow,
2954                                uint8_t transfer,
2955                                struct rte_flow_error *error)
2956 {
2957         struct mlx5_flow_dv_encap_decap_resource res = {
2958                 .size = 0,
2959                 .reformat_type =
2960                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2961                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2962                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2963         };
2964
2965         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2966                 return rte_flow_error_set(error, EINVAL,
2967                                           RTE_FLOW_ERROR_TYPE_ACTION,
2968                                           NULL, "can't create L2 decap action");
2969         return 0;
2970 }
2971
2972 /**
2973  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2974  *
2975  * @param[in] dev
2976  *   Pointer to rte_eth_dev structure.
2977  * @param[in] action
2978  *   Pointer to action structure.
2979  * @param[in, out] dev_flow
2980  *   Pointer to the mlx5_flow.
2981  * @param[in] attr
2982  *   Pointer to the flow attributes.
2983  * @param[out] error
2984  *   Pointer to the error structure.
2985  *
2986  * @return
2987  *   0 on success, a negative errno value otherwise and rte_errno is set.
2988  */
2989 static int
2990 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2991                                 const struct rte_flow_action *action,
2992                                 struct mlx5_flow *dev_flow,
2993                                 const struct rte_flow_attr *attr,
2994                                 struct rte_flow_error *error)
2995 {
2996         const struct rte_flow_action_raw_encap *encap_data;
2997         struct mlx5_flow_dv_encap_decap_resource res;
2998
2999         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3000         res.size = encap_data->size;
3001         memcpy(res.buf, encap_data->data, res.size);
3002         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3003                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3004                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3005         if (attr->transfer)
3006                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3007         else
3008                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3009                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3010         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3011                 return rte_flow_error_set(error, EINVAL,
3012                                           RTE_FLOW_ERROR_TYPE_ACTION,
3013                                           NULL, "can't create encap action");
3014         return 0;
3015 }
3016
3017 /**
3018  * Create action push VLAN.
3019  *
3020  * @param[in] dev
3021  *   Pointer to rte_eth_dev structure.
3022  * @param[in] attr
3023  *   Pointer to the flow attributes.
3024  * @param[in] vlan
3025  *   Pointer to the vlan to push to the Ethernet header.
3026  * @param[in, out] dev_flow
3027  *   Pointer to the mlx5_flow.
3028  * @param[out] error
3029  *   Pointer to the error structure.
3030  *
3031  * @return
3032  *   0 on success, a negative errno value otherwise and rte_errno is set.
3033  */
3034 static int
3035 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3036                                 const struct rte_flow_attr *attr,
3037                                 const struct rte_vlan_hdr *vlan,
3038                                 struct mlx5_flow *dev_flow,
3039                                 struct rte_flow_error *error)
3040 {
3041         struct mlx5_flow_dv_push_vlan_action_resource res;
3042
3043         res.vlan_tag =
3044                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3045                                  vlan->vlan_tci);
3046         if (attr->transfer)
3047                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3048         else
3049                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3050                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3051         return flow_dv_push_vlan_action_resource_register
3052                                             (dev, &res, dev_flow, error);
3053 }
3054
3055 /**
3056  * Validate the modify-header actions.
3057  *
3058  * @param[in] action_flags
3059  *   Holds the actions detected until now.
3060  * @param[in] action
3061  *   Pointer to the modify action.
3062  * @param[out] error
3063  *   Pointer to error structure.
3064  *
3065  * @return
3066  *   0 on success, a negative errno value otherwise and rte_errno is set.
3067  */
3068 static int
3069 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3070                                    const struct rte_flow_action *action,
3071                                    struct rte_flow_error *error)
3072 {
3073         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3074                 return rte_flow_error_set(error, EINVAL,
3075                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3076                                           NULL, "action configuration not set");
3077         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3078                 return rte_flow_error_set(error, EINVAL,
3079                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3080                                           "can't have encap action before"
3081                                           " modify action");
3082         return 0;
3083 }
3084
3085 /**
3086  * Validate the modify-header MAC address actions.
3087  *
3088  * @param[in] action_flags
3089  *   Holds the actions detected until now.
3090  * @param[in] action
3091  *   Pointer to the modify action.
3092  * @param[in] item_flags
3093  *   Holds the items detected.
3094  * @param[out] error
3095  *   Pointer to error structure.
3096  *
3097  * @return
3098  *   0 on success, a negative errno value otherwise and rte_errno is set.
3099  */
3100 static int
3101 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3102                                    const struct rte_flow_action *action,
3103                                    const uint64_t item_flags,
3104                                    struct rte_flow_error *error)
3105 {
3106         int ret = 0;
3107
3108         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3109         if (!ret) {
3110                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3111                         return rte_flow_error_set(error, EINVAL,
3112                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3113                                                   NULL,
3114                                                   "no L2 item in pattern");
3115         }
3116         return ret;
3117 }
3118
3119 /**
3120  * Validate the modify-header IPv4 address actions.
3121  *
3122  * @param[in] action_flags
3123  *   Holds the actions detected until now.
3124  * @param[in] action
3125  *   Pointer to the modify action.
3126  * @param[in] item_flags
3127  *   Holds the items detected.
3128  * @param[out] error
3129  *   Pointer to error structure.
3130  *
3131  * @return
3132  *   0 on success, a negative errno value otherwise and rte_errno is set.
3133  */
3134 static int
3135 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3136                                     const struct rte_flow_action *action,
3137                                     const uint64_t item_flags,
3138                                     struct rte_flow_error *error)
3139 {
3140         int ret = 0;
3141         uint64_t layer;
3142
3143         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3144         if (!ret) {
3145                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3146                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3147                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3148                 if (!(item_flags & layer))
3149                         return rte_flow_error_set(error, EINVAL,
3150                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3151                                                   NULL,
3152                                                   "no ipv4 item in pattern");
3153         }
3154         return ret;
3155 }
3156
3157 /**
3158  * Validate the modify-header IPv6 address actions.
3159  *
3160  * @param[in] action_flags
3161  *   Holds the actions detected until now.
3162  * @param[in] action
3163  *   Pointer to the modify action.
3164  * @param[in] item_flags
3165  *   Holds the items detected.
3166  * @param[out] error
3167  *   Pointer to error structure.
3168  *
3169  * @return
3170  *   0 on success, a negative errno value otherwise and rte_errno is set.
3171  */
3172 static int
3173 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3174                                     const struct rte_flow_action *action,
3175                                     const uint64_t item_flags,
3176                                     struct rte_flow_error *error)
3177 {
3178         int ret = 0;
3179         uint64_t layer;
3180
3181         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3182         if (!ret) {
3183                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3184                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3185                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3186                 if (!(item_flags & layer))
3187                         return rte_flow_error_set(error, EINVAL,
3188                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3189                                                   NULL,
3190                                                   "no ipv6 item in pattern");
3191         }
3192         return ret;
3193 }
3194
3195 /**
3196  * Validate the modify-header TP actions.
3197  *
3198  * @param[in] action_flags
3199  *   Holds the actions detected until now.
3200  * @param[in] action
3201  *   Pointer to the modify action.
3202  * @param[in] item_flags
3203  *   Holds the items detected.
3204  * @param[out] error
3205  *   Pointer to error structure.
3206  *
3207  * @return
3208  *   0 on success, a negative errno value otherwise and rte_errno is set.
3209  */
3210 static int
3211 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3212                                   const struct rte_flow_action *action,
3213                                   const uint64_t item_flags,
3214                                   struct rte_flow_error *error)
3215 {
3216         int ret = 0;
3217         uint64_t layer;
3218
3219         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3220         if (!ret) {
3221                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3222                                  MLX5_FLOW_LAYER_INNER_L4 :
3223                                  MLX5_FLOW_LAYER_OUTER_L4;
3224                 if (!(item_flags & layer))
3225                         return rte_flow_error_set(error, EINVAL,
3226                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3227                                                   NULL, "no transport layer "
3228                                                   "in pattern");
3229         }
3230         return ret;
3231 }
3232
3233 /**
3234  * Validate the modify-header actions of increment/decrement
3235  * TCP Sequence-number.
3236  *
3237  * @param[in] action_flags
3238  *   Holds the actions detected until now.
3239  * @param[in] action
3240  *   Pointer to the modify action.
3241  * @param[in] item_flags
3242  *   Holds the items detected.
3243  * @param[out] error
3244  *   Pointer to error structure.
3245  *
3246  * @return
3247  *   0 on success, a negative errno value otherwise and rte_errno is set.
3248  */
3249 static int
3250 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3251                                        const struct rte_flow_action *action,
3252                                        const uint64_t item_flags,
3253                                        struct rte_flow_error *error)
3254 {
3255         int ret = 0;
3256         uint64_t layer;
3257
3258         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3259         if (!ret) {
3260                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3261                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3262                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3263                 if (!(item_flags & layer))
3264                         return rte_flow_error_set(error, EINVAL,
3265                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3266                                                   NULL, "no TCP item in"
3267                                                   " pattern");
3268                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3269                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3270                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3271                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3272                         return rte_flow_error_set(error, EINVAL,
3273                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3274                                                   NULL,
3275                                                   "cannot decrease and increase"
3276                                                   " TCP sequence number"
3277                                                   " at the same time");
3278         }
3279         return ret;
3280 }
3281
3282 /**
3283  * Validate the modify-header actions of increment/decrement
3284  * TCP Acknowledgment number.
3285  *
3286  * @param[in] action_flags
3287  *   Holds the actions detected until now.
3288  * @param[in] action
3289  *   Pointer to the modify action.
3290  * @param[in] item_flags
3291  *   Holds the items detected.
3292  * @param[out] error
3293  *   Pointer to error structure.
3294  *
3295  * @return
3296  *   0 on success, a negative errno value otherwise and rte_errno is set.
3297  */
3298 static int
3299 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3300                                        const struct rte_flow_action *action,
3301                                        const uint64_t item_flags,
3302                                        struct rte_flow_error *error)
3303 {
3304         int ret = 0;
3305         uint64_t layer;
3306
3307         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3308         if (!ret) {
3309                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3310                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3311                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3312                 if (!(item_flags & layer))
3313                         return rte_flow_error_set(error, EINVAL,
3314                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3315                                                   NULL, "no TCP item in"
3316                                                   " pattern");
3317                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3318                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3319                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3320                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3321                         return rte_flow_error_set(error, EINVAL,
3322                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3323                                                   NULL,
3324                                                   "cannot decrease and increase"
3325                                                   " TCP acknowledgment number"
3326                                                   " at the same time");
3327         }
3328         return ret;
3329 }
3330
3331 /**
3332  * Validate the modify-header TTL actions.
3333  *
3334  * @param[in] action_flags
3335  *   Holds the actions detected until now.
3336  * @param[in] action
3337  *   Pointer to the modify action.
3338  * @param[in] item_flags
3339  *   Holds the items detected.
3340  * @param[out] error
3341  *   Pointer to error structure.
3342  *
3343  * @return
3344  *   0 on success, a negative errno value otherwise and rte_errno is set.
3345  */
3346 static int
3347 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3348                                    const struct rte_flow_action *action,
3349                                    const uint64_t item_flags,
3350                                    struct rte_flow_error *error)
3351 {
3352         int ret = 0;
3353         uint64_t layer;
3354
3355         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3356         if (!ret) {
3357                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3358                                  MLX5_FLOW_LAYER_INNER_L3 :
3359                                  MLX5_FLOW_LAYER_OUTER_L3;
3360                 if (!(item_flags & layer))
3361                         return rte_flow_error_set(error, EINVAL,
3362                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3363                                                   NULL,
3364                                                   "no IP protocol in pattern");
3365         }
3366         return ret;
3367 }
3368
3369 /**
3370  * Validate jump action.
3371  *
3372  * @param[in] action
3373  *   Pointer to the jump action.
3374  * @param[in] action_flags
3375  *   Holds the actions detected until now.
3376  * @param[in] attributes
3377  *   Pointer to flow attributes
3378  * @param[in] external
3379  *   Action belongs to flow rule created by request external to PMD.
3380  * @param[out] error
3381  *   Pointer to error structure.
3382  *
3383  * @return
3384  *   0 on success, a negative errno value otherwise and rte_errno is set.
3385  */
3386 static int
3387 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3388                              uint64_t action_flags,
3389                              const struct rte_flow_attr *attributes,
3390                              bool external, struct rte_flow_error *error)
3391 {
3392         uint32_t target_group, table;
3393         int ret = 0;
3394
3395         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3396                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3397                 return rte_flow_error_set(error, EINVAL,
3398                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3399                                           "can't have 2 fate actions in"
3400                                           " same flow");
3401         if (action_flags & MLX5_FLOW_ACTION_METER)
3402                 return rte_flow_error_set(error, ENOTSUP,
3403                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3404                                           "jump with meter not support");
3405         if (!action->conf)
3406                 return rte_flow_error_set(error, EINVAL,
3407                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3408                                           NULL, "action configuration not set");
3409         target_group =
3410                 ((const struct rte_flow_action_jump *)action->conf)->group;
3411         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3412                                        true, &table, error);
3413         if (ret)
3414                 return ret;
3415         if (attributes->group == target_group)
3416                 return rte_flow_error_set(error, EINVAL,
3417                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3418                                           "target group must be other than"
3419                                           " the current flow group");
3420         return 0;
3421 }
3422
3423 /*
3424  * Validate the port_id action.
3425  *
3426  * @param[in] dev
3427  *   Pointer to rte_eth_dev structure.
3428  * @param[in] action_flags
3429  *   Bit-fields that holds the actions detected until now.
3430  * @param[in] action
3431  *   Port_id RTE action structure.
3432  * @param[in] attr
3433  *   Attributes of flow that includes this action.
3434  * @param[out] error
3435  *   Pointer to error structure.
3436  *
3437  * @return
3438  *   0 on success, a negative errno value otherwise and rte_errno is set.
3439  */
3440 static int
3441 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3442                                 uint64_t action_flags,
3443                                 const struct rte_flow_action *action,
3444                                 const struct rte_flow_attr *attr,
3445                                 struct rte_flow_error *error)
3446 {
3447         const struct rte_flow_action_port_id *port_id;
3448         struct mlx5_priv *act_priv;
3449         struct mlx5_priv *dev_priv;
3450         uint16_t port;
3451
3452         if (!attr->transfer)
3453                 return rte_flow_error_set(error, ENOTSUP,
3454                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3455                                           NULL,
3456                                           "port id action is valid in transfer"
3457                                           " mode only");
3458         if (!action || !action->conf)
3459                 return rte_flow_error_set(error, ENOTSUP,
3460                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3461                                           NULL,
3462                                           "port id action parameters must be"
3463                                           " specified");
3464         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3465                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3466                 return rte_flow_error_set(error, EINVAL,
3467                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3468                                           "can have only one fate actions in"
3469                                           " a flow");
3470         dev_priv = mlx5_dev_to_eswitch_info(dev);
3471         if (!dev_priv)
3472                 return rte_flow_error_set(error, rte_errno,
3473                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3474                                           NULL,
3475                                           "failed to obtain E-Switch info");
3476         port_id = action->conf;
3477         port = port_id->original ? dev->data->port_id : port_id->id;
3478         act_priv = mlx5_port_to_eswitch_info(port, false);
3479         if (!act_priv)
3480                 return rte_flow_error_set
3481                                 (error, rte_errno,
3482                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3483                                  "failed to obtain E-Switch port id for port");
3484         if (act_priv->domain_id != dev_priv->domain_id)
3485                 return rte_flow_error_set
3486                                 (error, EINVAL,
3487                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3488                                  "port does not belong to"
3489                                  " E-Switch being configured");
3490         return 0;
3491 }
3492
3493 /**
3494  * Get the maximum number of modify header actions.
3495  *
3496  * @param dev
3497  *   Pointer to rte_eth_dev structure.
3498  * @param flags
3499  *   Flags bits to check if root level.
3500  *
3501  * @return
3502  *   Max number of modify header actions device can support.
3503  */
3504 static unsigned int
3505 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3506 {
3507         /*
3508          * There's no way to directly query the max cap. Although it has to be
3509          * acquried by iterative trial, it is a safe assumption that more
3510          * actions are supported by FW if extensive metadata register is
3511          * supported. (Only in the root table)
3512          */
3513         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3514                 return MLX5_MAX_MODIFY_NUM;
3515         else
3516                 return mlx5_flow_ext_mreg_supported(dev) ?
3517                                         MLX5_ROOT_TBL_MODIFY_NUM :
3518                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3519 }
3520
3521 /**
3522  * Validate the meter action.
3523  *
3524  * @param[in] dev
3525  *   Pointer to rte_eth_dev structure.
3526  * @param[in] action_flags
3527  *   Bit-fields that holds the actions detected until now.
3528  * @param[in] action
3529  *   Pointer to the meter action.
3530  * @param[in] attr
3531  *   Attributes of flow that includes this action.
3532  * @param[out] error
3533  *   Pointer to error structure.
3534  *
3535  * @return
3536  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3537  */
3538 static int
3539 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3540                                 uint64_t action_flags,
3541                                 const struct rte_flow_action *action,
3542                                 const struct rte_flow_attr *attr,
3543                                 struct rte_flow_error *error)
3544 {
3545         struct mlx5_priv *priv = dev->data->dev_private;
3546         const struct rte_flow_action_meter *am = action->conf;
3547         struct mlx5_flow_meter *fm;
3548
3549         if (!am)
3550                 return rte_flow_error_set(error, EINVAL,
3551                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3552                                           "meter action conf is NULL");
3553
3554         if (action_flags & MLX5_FLOW_ACTION_METER)
3555                 return rte_flow_error_set(error, ENOTSUP,
3556                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3557                                           "meter chaining not support");
3558         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3559                 return rte_flow_error_set(error, ENOTSUP,
3560                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3561                                           "meter with jump not support");
3562         if (!priv->mtr_en)
3563                 return rte_flow_error_set(error, ENOTSUP,
3564                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3565                                           NULL,
3566                                           "meter action not supported");
3567         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3568         if (!fm)
3569                 return rte_flow_error_set(error, EINVAL,
3570                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3571                                           "Meter not found");
3572         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3573               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3574               (!fm->attr.egress && !attr->egress && attr->ingress))))
3575                 return rte_flow_error_set(error, EINVAL,
3576                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3577                                           "Flow attributes are either invalid "
3578                                           "or have a conflict with current "
3579                                           "meter attributes");
3580         return 0;
3581 }
3582
3583 /**
3584  * Validate the modify-header IPv4 DSCP actions.
3585  *
3586  * @param[in] action_flags
3587  *   Holds the actions detected until now.
3588  * @param[in] action
3589  *   Pointer to the modify action.
3590  * @param[in] item_flags
3591  *   Holds the items detected.
3592  * @param[out] error
3593  *   Pointer to error structure.
3594  *
3595  * @return
3596  *   0 on success, a negative errno value otherwise and rte_errno is set.
3597  */
3598 static int
3599 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3600                                          const struct rte_flow_action *action,
3601                                          const uint64_t item_flags,
3602                                          struct rte_flow_error *error)
3603 {
3604         int ret = 0;
3605
3606         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3607         if (!ret) {
3608                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3609                         return rte_flow_error_set(error, EINVAL,
3610                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3611                                                   NULL,
3612                                                   "no ipv4 item in pattern");
3613         }
3614         return ret;
3615 }
3616
3617 /**
3618  * Validate the modify-header IPv6 DSCP actions.
3619  *
3620  * @param[in] action_flags
3621  *   Holds the actions detected until now.
3622  * @param[in] action
3623  *   Pointer to the modify action.
3624  * @param[in] item_flags
3625  *   Holds the items detected.
3626  * @param[out] error
3627  *   Pointer to error structure.
3628  *
3629  * @return
3630  *   0 on success, a negative errno value otherwise and rte_errno is set.
3631  */
3632 static int
3633 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3634                                          const struct rte_flow_action *action,
3635                                          const uint64_t item_flags,
3636                                          struct rte_flow_error *error)
3637 {
3638         int ret = 0;
3639
3640         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3641         if (!ret) {
3642                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3643                         return rte_flow_error_set(error, EINVAL,
3644                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3645                                                   NULL,
3646                                                   "no ipv6 item in pattern");
3647         }
3648         return ret;
3649 }
3650
3651 /**
3652  * Find existing modify-header resource or create and register a new one.
3653  *
3654  * @param dev[in, out]
3655  *   Pointer to rte_eth_dev structure.
3656  * @param[in, out] resource
3657  *   Pointer to modify-header resource.
3658  * @parm[in, out] dev_flow
3659  *   Pointer to the dev_flow.
3660  * @param[out] error
3661  *   pointer to error structure.
3662  *
3663  * @return
3664  *   0 on success otherwise -errno and errno is set.
3665  */
3666 static int
3667 flow_dv_modify_hdr_resource_register
3668                         (struct rte_eth_dev *dev,
3669                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3670                          struct mlx5_flow *dev_flow,
3671                          struct rte_flow_error *error)
3672 {
3673         struct mlx5_priv *priv = dev->data->dev_private;
3674         struct mlx5_ibv_shared *sh = priv->sh;
3675         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3676         struct mlx5dv_dr_domain *ns;
3677         uint32_t actions_len;
3678
3679         resource->flags =
3680                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3681         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3682                                     resource->flags))
3683                 return rte_flow_error_set(error, EOVERFLOW,
3684                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3685                                           "too many modify header items");
3686         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3687                 ns = sh->fdb_domain;
3688         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3689                 ns = sh->tx_domain;
3690         else
3691                 ns = sh->rx_domain;
3692         /* Lookup a matching resource from cache. */
3693         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3694         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3695                 if (resource->ft_type == cache_resource->ft_type &&
3696                     resource->actions_num == cache_resource->actions_num &&
3697                     resource->flags == cache_resource->flags &&
3698                     !memcmp((const void *)resource->actions,
3699                             (const void *)cache_resource->actions,
3700                             actions_len)) {
3701                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3702                                 (void *)cache_resource,
3703                                 rte_atomic32_read(&cache_resource->refcnt));
3704                         rte_atomic32_inc(&cache_resource->refcnt);
3705                         dev_flow->dv.modify_hdr = cache_resource;
3706                         return 0;
3707                 }
3708         }
3709         /* Register new modify-header resource. */
3710         cache_resource = rte_calloc(__func__, 1,
3711                                     sizeof(*cache_resource) + actions_len, 0);
3712         if (!cache_resource)
3713                 return rte_flow_error_set(error, ENOMEM,
3714                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3715                                           "cannot allocate resource memory");
3716         *cache_resource = *resource;
3717         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3718         cache_resource->verbs_action =
3719                 mlx5_glue->dv_create_flow_action_modify_header
3720                                         (sh->ctx, cache_resource->ft_type, ns,
3721                                          cache_resource->flags, actions_len,
3722                                          (uint64_t *)cache_resource->actions);
3723         if (!cache_resource->verbs_action) {
3724                 rte_free(cache_resource);
3725                 return rte_flow_error_set(error, ENOMEM,
3726                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3727                                           NULL, "cannot create action");
3728         }
3729         rte_atomic32_init(&cache_resource->refcnt);
3730         rte_atomic32_inc(&cache_resource->refcnt);
3731         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3732         dev_flow->dv.modify_hdr = cache_resource;
3733         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3734                 (void *)cache_resource,
3735                 rte_atomic32_read(&cache_resource->refcnt));
3736         return 0;
3737 }
3738
3739 #define MLX5_CNT_CONTAINER_RESIZE 64
3740
3741 /**
3742  * Get or create a flow counter.
3743  *
3744  * @param[in] dev
3745  *   Pointer to the Ethernet device structure.
3746  * @param[in] shared
3747  *   Indicate if this counter is shared with other flows.
3748  * @param[in] id
3749  *   Counter identifier.
3750  *
3751  * @return
3752  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3753  */
3754 static struct mlx5_flow_counter *
3755 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3756                                uint32_t id)
3757 {
3758         struct mlx5_priv *priv = dev->data->dev_private;
3759         struct mlx5_flow_counter *cnt = NULL;
3760         struct mlx5_devx_obj *dcs = NULL;
3761
3762         if (!priv->config.devx) {
3763                 rte_errno = ENOTSUP;
3764                 return NULL;
3765         }
3766         if (shared) {
3767                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3768                         if (cnt->shared && cnt->id == id) {
3769                                 cnt->ref_cnt++;
3770                                 return cnt;
3771                         }
3772                 }
3773         }
3774         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3775         if (!dcs)
3776                 return NULL;
3777         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3778         if (!cnt) {
3779                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3780                 rte_errno = ENOMEM;
3781                 return NULL;
3782         }
3783         struct mlx5_flow_counter tmpl = {
3784                 .shared = shared,
3785                 .ref_cnt = 1,
3786                 .id = id,
3787                 .dcs = dcs,
3788         };
3789         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3790         if (!tmpl.action) {
3791                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3792                 rte_errno = errno;
3793                 rte_free(cnt);
3794                 return NULL;
3795         }
3796         *cnt = tmpl;
3797         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3798         return cnt;
3799 }
3800
3801 /**
3802  * Release a flow counter.
3803  *
3804  * @param[in] dev
3805  *   Pointer to the Ethernet device structure.
3806  * @param[in] counter
3807  *   Pointer to the counter handler.
3808  */
3809 static void
3810 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3811                                  struct mlx5_flow_counter *counter)
3812 {
3813         struct mlx5_priv *priv = dev->data->dev_private;
3814
3815         if (!counter)
3816                 return;
3817         if (--counter->ref_cnt == 0) {
3818                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3819                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3820                 rte_free(counter);
3821         }
3822 }
3823
3824 /**
3825  * Query a devx flow counter.
3826  *
3827  * @param[in] dev
3828  *   Pointer to the Ethernet device structure.
3829  * @param[in] cnt
3830  *   Pointer to the flow counter.
3831  * @param[out] pkts
3832  *   The statistics value of packets.
3833  * @param[out] bytes
3834  *   The statistics value of bytes.
3835  *
3836  * @return
3837  *   0 on success, otherwise a negative errno value and rte_errno is set.
3838  */
3839 static inline int
3840 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3841                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3842                      uint64_t *bytes)
3843 {
3844         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3845                                                 0, NULL, NULL, 0);
3846 }
3847
3848 /**
3849  * Get a pool by a counter.
3850  *
3851  * @param[in] cnt
3852  *   Pointer to the counter.
3853  *
3854  * @return
3855  *   The counter pool.
3856  */
3857 static struct mlx5_flow_counter_pool *
3858 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3859 {
3860         if (!cnt->batch) {
3861                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3862                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3863         }
3864         return cnt->pool;
3865 }
3866
3867 /**
3868  * Get a pool by devx counter ID.
3869  *
3870  * @param[in] cont
3871  *   Pointer to the counter container.
3872  * @param[in] id
3873  *   The counter devx ID.
3874  *
3875  * @return
3876  *   The counter pool pointer if exists, NULL otherwise,
3877  */
3878 static struct mlx5_flow_counter_pool *
3879 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3880 {
3881         struct mlx5_flow_counter_pool *pool;
3882
3883         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3884                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3885                                 MLX5_COUNTERS_PER_POOL;
3886
3887                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3888                         return pool;
3889         };
3890         return NULL;
3891 }
3892
3893 /**
3894  * Allocate a new memory for the counter values wrapped by all the needed
3895  * management.
3896  *
3897  * @param[in] dev
3898  *   Pointer to the Ethernet device structure.
3899  * @param[in] raws_n
3900  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3901  *
3902  * @return
3903  *   The new memory management pointer on success, otherwise NULL and rte_errno
3904  *   is set.
3905  */
3906 static struct mlx5_counter_stats_mem_mng *
3907 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3908 {
3909         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3910                                         (dev->data->dev_private))->sh;
3911         struct mlx5_devx_mkey_attr mkey_attr;
3912         struct mlx5_counter_stats_mem_mng *mem_mng;
3913         volatile struct flow_counter_stats *raw_data;
3914         int size = (sizeof(struct flow_counter_stats) *
3915                         MLX5_COUNTERS_PER_POOL +
3916                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3917                         sizeof(struct mlx5_counter_stats_mem_mng);
3918         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3919         int i;
3920
3921         if (!mem) {
3922                 rte_errno = ENOMEM;
3923                 return NULL;
3924         }
3925         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3926         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3927         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3928                                                  IBV_ACCESS_LOCAL_WRITE);
3929         if (!mem_mng->umem) {
3930                 rte_errno = errno;
3931                 rte_free(mem);
3932                 return NULL;
3933         }
3934         mkey_attr.addr = (uintptr_t)mem;
3935         mkey_attr.size = size;
3936         mkey_attr.umem_id = mem_mng->umem->umem_id;
3937         mkey_attr.pd = sh->pdn;
3938         mkey_attr.log_entity_size = 0;
3939         mkey_attr.pg_access = 0;
3940         mkey_attr.klm_array = NULL;
3941         mkey_attr.klm_num = 0;
3942         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3943         if (!mem_mng->dm) {
3944                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3945                 rte_errno = errno;
3946                 rte_free(mem);
3947                 return NULL;
3948         }
3949         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3950         raw_data = (volatile struct flow_counter_stats *)mem;
3951         for (i = 0; i < raws_n; ++i) {
3952                 mem_mng->raws[i].mem_mng = mem_mng;
3953                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3954         }
3955         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3956         return mem_mng;
3957 }
3958
3959 /**
3960  * Resize a counter container.
3961  *
3962  * @param[in] dev
3963  *   Pointer to the Ethernet device structure.
3964  * @param[in] batch
3965  *   Whether the pool is for counter that was allocated by batch command.
3966  *
3967  * @return
3968  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3969  */
3970 static struct mlx5_pools_container *
3971 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3972 {
3973         struct mlx5_priv *priv = dev->data->dev_private;
3974         struct mlx5_pools_container *cont =
3975                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3976         struct mlx5_pools_container *new_cont =
3977                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3978         struct mlx5_counter_stats_mem_mng *mem_mng;
3979         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3980         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3981         int i;
3982
3983         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3984                 /* The last resize still hasn't detected by the host thread. */
3985                 rte_errno = EAGAIN;
3986                 return NULL;
3987         }
3988         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3989         if (!new_cont->pools) {
3990                 rte_errno = ENOMEM;
3991                 return NULL;
3992         }
3993         if (cont->n)
3994                 memcpy(new_cont->pools, cont->pools, cont->n *
3995                        sizeof(struct mlx5_flow_counter_pool *));
3996         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3997                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3998         if (!mem_mng) {
3999                 rte_free(new_cont->pools);
4000                 return NULL;
4001         }
4002         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
4003                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
4004                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
4005                                  i, next);
4006         new_cont->n = resize;
4007         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
4008         TAILQ_INIT(&new_cont->pool_list);
4009         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
4010         new_cont->init_mem_mng = mem_mng;
4011         rte_cio_wmb();
4012          /* Flip the master container. */
4013         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
4014         return new_cont;
4015 }
4016
4017 /**
4018  * Query a devx flow counter.
4019  *
4020  * @param[in] dev
4021  *   Pointer to the Ethernet device structure.
4022  * @param[in] cnt
4023  *   Pointer to the flow counter.
4024  * @param[out] pkts
4025  *   The statistics value of packets.
4026  * @param[out] bytes
4027  *   The statistics value of bytes.
4028  *
4029  * @return
4030  *   0 on success, otherwise a negative errno value and rte_errno is set.
4031  */
4032 static inline int
4033 _flow_dv_query_count(struct rte_eth_dev *dev,
4034                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
4035                      uint64_t *bytes)
4036 {
4037         struct mlx5_priv *priv = dev->data->dev_private;
4038         struct mlx5_flow_counter_pool *pool =
4039                         flow_dv_counter_pool_get(cnt);
4040         int offset = cnt - &pool->counters_raw[0];
4041
4042         if (priv->counter_fallback)
4043                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4044
4045         rte_spinlock_lock(&pool->sl);
4046         /*
4047          * The single counters allocation may allocate smaller ID than the
4048          * current allocated in parallel to the host reading.
4049          * In this case the new counter values must be reported as 0.
4050          */
4051         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4052                 *pkts = 0;
4053                 *bytes = 0;
4054         } else {
4055                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4056                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4057         }
4058         rte_spinlock_unlock(&pool->sl);
4059         return 0;
4060 }
4061
4062 /**
4063  * Create and initialize a new counter pool.
4064  *
4065  * @param[in] dev
4066  *   Pointer to the Ethernet device structure.
4067  * @param[out] dcs
4068  *   The devX counter handle.
4069  * @param[in] batch
4070  *   Whether the pool is for counter that was allocated by batch command.
4071  *
4072  * @return
4073  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4074  */
4075 static struct mlx5_flow_counter_pool *
4076 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4077                     uint32_t batch)
4078 {
4079         struct mlx5_priv *priv = dev->data->dev_private;
4080         struct mlx5_flow_counter_pool *pool;
4081         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4082                                                                0);
4083         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4084         uint32_t size;
4085
4086         if (cont->n == n_valid) {
4087                 cont = flow_dv_container_resize(dev, batch);
4088                 if (!cont)
4089                         return NULL;
4090         }
4091         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4092                         sizeof(struct mlx5_flow_counter);
4093         pool = rte_calloc(__func__, 1, size, 0);
4094         if (!pool) {
4095                 rte_errno = ENOMEM;
4096                 return NULL;
4097         }
4098         pool->min_dcs = dcs;
4099         pool->raw = cont->init_mem_mng->raws + n_valid %
4100                                                      MLX5_CNT_CONTAINER_RESIZE;
4101         pool->raw_hw = NULL;
4102         rte_spinlock_init(&pool->sl);
4103         /*
4104          * The generation of the new allocated counters in this pool is 0, 2 in
4105          * the pool generation makes all the counters valid for allocation.
4106          */
4107         rte_atomic64_set(&pool->query_gen, 0x2);
4108         TAILQ_INIT(&pool->counters);
4109         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4110         cont->pools[n_valid] = pool;
4111         /* Pool initialization must be updated before host thread access. */
4112         rte_cio_wmb();
4113         rte_atomic16_add(&cont->n_valid, 1);
4114         return pool;
4115 }
4116
4117 /**
4118  * Prepare a new counter and/or a new counter pool.
4119  *
4120  * @param[in] dev
4121  *   Pointer to the Ethernet device structure.
4122  * @param[out] cnt_free
4123  *   Where to put the pointer of a new counter.
4124  * @param[in] batch
4125  *   Whether the pool is for counter that was allocated by batch command.
4126  *
4127  * @return
4128  *   The free counter pool pointer and @p cnt_free is set on success,
4129  *   NULL otherwise and rte_errno is set.
4130  */
4131 static struct mlx5_flow_counter_pool *
4132 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4133                              struct mlx5_flow_counter **cnt_free,
4134                              uint32_t batch)
4135 {
4136         struct mlx5_priv *priv = dev->data->dev_private;
4137         struct mlx5_flow_counter_pool *pool;
4138         struct mlx5_devx_obj *dcs = NULL;
4139         struct mlx5_flow_counter *cnt;
4140         uint32_t i;
4141
4142         if (!batch) {
4143                 /* bulk_bitmap must be 0 for single counter allocation. */
4144                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4145                 if (!dcs)
4146                         return NULL;
4147                 pool = flow_dv_find_pool_by_id
4148                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4149                 if (!pool) {
4150                         pool = flow_dv_pool_create(dev, dcs, batch);
4151                         if (!pool) {
4152                                 mlx5_devx_cmd_destroy(dcs);
4153                                 return NULL;
4154                         }
4155                 } else if (dcs->id < pool->min_dcs->id) {
4156                         rte_atomic64_set(&pool->a64_dcs,
4157                                          (int64_t)(uintptr_t)dcs);
4158                 }
4159                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4160                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4161                 cnt->dcs = dcs;
4162                 *cnt_free = cnt;
4163                 return pool;
4164         }
4165         /* bulk_bitmap is in 128 counters units. */
4166         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4167                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4168         if (!dcs) {
4169                 rte_errno = ENODATA;
4170                 return NULL;
4171         }
4172         pool = flow_dv_pool_create(dev, dcs, batch);
4173         if (!pool) {
4174                 mlx5_devx_cmd_destroy(dcs);
4175                 return NULL;
4176         }
4177         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4178                 cnt = &pool->counters_raw[i];
4179                 cnt->pool = pool;
4180                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4181         }
4182         *cnt_free = &pool->counters_raw[0];
4183         return pool;
4184 }
4185
4186 /**
4187  * Search for existed shared counter.
4188  *
4189  * @param[in] cont
4190  *   Pointer to the relevant counter pool container.
4191  * @param[in] id
4192  *   The shared counter ID to search.
4193  *
4194  * @return
4195  *   NULL if not existed, otherwise pointer to the shared counter.
4196  */
4197 static struct mlx5_flow_counter *
4198 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4199                               uint32_t id)
4200 {
4201         static struct mlx5_flow_counter *cnt;
4202         struct mlx5_flow_counter_pool *pool;
4203         int i;
4204
4205         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4206                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4207                         cnt = &pool->counters_raw[i];
4208                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4209                                 return cnt;
4210                 }
4211         }
4212         return NULL;
4213 }
4214
4215 /**
4216  * Allocate a flow counter.
4217  *
4218  * @param[in] dev
4219  *   Pointer to the Ethernet device structure.
4220  * @param[in] shared
4221  *   Indicate if this counter is shared with other flows.
4222  * @param[in] id
4223  *   Counter identifier.
4224  * @param[in] group
4225  *   Counter flow group.
4226  *
4227  * @return
4228  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4229  */
4230 static struct mlx5_flow_counter *
4231 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4232                       uint16_t group)
4233 {
4234         struct mlx5_priv *priv = dev->data->dev_private;
4235         struct mlx5_flow_counter_pool *pool = NULL;
4236         struct mlx5_flow_counter *cnt_free = NULL;
4237         /*
4238          * Currently group 0 flow counter cannot be assigned to a flow if it is
4239          * not the first one in the batch counter allocation, so it is better
4240          * to allocate counters one by one for these flows in a separate
4241          * container.
4242          * A counter can be shared between different groups so need to take
4243          * shared counters from the single container.
4244          */
4245         uint32_t batch = (group && !shared) ? 1 : 0;
4246         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4247                                                                0);
4248
4249         if (priv->counter_fallback)
4250                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4251         if (!priv->config.devx) {
4252                 rte_errno = ENOTSUP;
4253                 return NULL;
4254         }
4255         if (shared) {
4256                 cnt_free = flow_dv_counter_shared_search(cont, id);
4257                 if (cnt_free) {
4258                         if (cnt_free->ref_cnt + 1 == 0) {
4259                                 rte_errno = E2BIG;
4260                                 return NULL;
4261                         }
4262                         cnt_free->ref_cnt++;
4263                         return cnt_free;
4264                 }
4265         }
4266         /* Pools which has a free counters are in the start. */
4267         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4268                 /*
4269                  * The free counter reset values must be updated between the
4270                  * counter release to the counter allocation, so, at least one
4271                  * query must be done in this time. ensure it by saving the
4272                  * query generation in the release time.
4273                  * The free list is sorted according to the generation - so if
4274                  * the first one is not updated, all the others are not
4275                  * updated too.
4276                  */
4277                 cnt_free = TAILQ_FIRST(&pool->counters);
4278                 if (cnt_free && cnt_free->query_gen + 1 <
4279                     rte_atomic64_read(&pool->query_gen))
4280                         break;
4281                 cnt_free = NULL;
4282         }
4283         if (!cnt_free) {
4284                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4285                 if (!pool)
4286                         return NULL;
4287         }
4288         cnt_free->batch = batch;
4289         /* Create a DV counter action only in the first time usage. */
4290         if (!cnt_free->action) {
4291                 uint16_t offset;
4292                 struct mlx5_devx_obj *dcs;
4293
4294                 if (batch) {
4295                         offset = cnt_free - &pool->counters_raw[0];
4296                         dcs = pool->min_dcs;
4297                 } else {
4298                         offset = 0;
4299                         dcs = cnt_free->dcs;
4300                 }
4301                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4302                                         (dcs->obj, offset);
4303                 if (!cnt_free->action) {
4304                         rte_errno = errno;
4305                         return NULL;
4306                 }
4307         }
4308         /* Update the counter reset values. */
4309         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4310                                  &cnt_free->bytes))
4311                 return NULL;
4312         cnt_free->shared = shared;
4313         cnt_free->ref_cnt = 1;
4314         cnt_free->id = id;
4315         if (!priv->sh->cmng.query_thread_on)
4316                 /* Start the asynchronous batch query by the host thread. */
4317                 mlx5_set_query_alarm(priv->sh);
4318         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4319         if (TAILQ_EMPTY(&pool->counters)) {
4320                 /* Move the pool to the end of the container pool list. */
4321                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4322                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4323         }
4324         return cnt_free;
4325 }
4326
4327 /**
4328  * Release a flow counter.
4329  *
4330  * @param[in] dev
4331  *   Pointer to the Ethernet device structure.
4332  * @param[in] counter
4333  *   Pointer to the counter handler.
4334  */
4335 static void
4336 flow_dv_counter_release(struct rte_eth_dev *dev,
4337                         struct mlx5_flow_counter *counter)
4338 {
4339         struct mlx5_priv *priv = dev->data->dev_private;
4340
4341         if (!counter)
4342                 return;
4343         if (priv->counter_fallback) {
4344                 flow_dv_counter_release_fallback(dev, counter);
4345                 return;
4346         }
4347         if (--counter->ref_cnt == 0) {
4348                 struct mlx5_flow_counter_pool *pool =
4349                                 flow_dv_counter_pool_get(counter);
4350
4351                 /* Put the counter in the end - the last updated one. */
4352                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4353                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4354         }
4355 }
4356
4357 /**
4358  * Verify the @p attributes will be correctly understood by the NIC and store
4359  * them in the @p flow if everything is correct.
4360  *
4361  * @param[in] dev
4362  *   Pointer to dev struct.
4363  * @param[in] attributes
4364  *   Pointer to flow attributes
4365  * @param[in] external
4366  *   This flow rule is created by request external to PMD.
4367  * @param[out] error
4368  *   Pointer to error structure.
4369  *
4370  * @return
4371  *   0 on success, a negative errno value otherwise and rte_errno is set.
4372  */
4373 static int
4374 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4375                             const struct rte_flow_attr *attributes,
4376                             bool external __rte_unused,
4377                             struct rte_flow_error *error)
4378 {
4379         struct mlx5_priv *priv = dev->data->dev_private;
4380         uint32_t priority_max = priv->config.flow_prio - 1;
4381
4382 #ifndef HAVE_MLX5DV_DR
4383         if (attributes->group)
4384                 return rte_flow_error_set(error, ENOTSUP,
4385                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4386                                           NULL,
4387                                           "groups are not supported");
4388 #else
4389         uint32_t table;
4390         int ret;
4391
4392         ret = mlx5_flow_group_to_table(attributes, external,
4393                                        attributes->group, !!priv->fdb_def_rule,
4394                                        &table, error);
4395         if (ret)
4396                 return ret;
4397 #endif
4398         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4399             attributes->priority >= priority_max)
4400                 return rte_flow_error_set(error, ENOTSUP,
4401                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4402                                           NULL,
4403                                           "priority out of range");
4404         if (attributes->transfer) {
4405                 if (!priv->config.dv_esw_en)
4406                         return rte_flow_error_set
4407                                 (error, ENOTSUP,
4408                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4409                                  "E-Switch dr is not supported");
4410                 if (!(priv->representor || priv->master))
4411                         return rte_flow_error_set
4412                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4413                                  NULL, "E-Switch configuration can only be"
4414                                  " done by a master or a representor device");
4415                 if (attributes->egress)
4416                         return rte_flow_error_set
4417                                 (error, ENOTSUP,
4418                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4419                                  "egress is not supported");
4420         }
4421         if (!(attributes->egress ^ attributes->ingress))
4422                 return rte_flow_error_set(error, ENOTSUP,
4423                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4424                                           "must specify exactly one of "
4425                                           "ingress or egress");
4426         return 0;
4427 }
4428
4429 /**
4430  * Internal validation function. For validating both actions and items.
4431  *
4432  * @param[in] dev
4433  *   Pointer to the rte_eth_dev structure.
4434  * @param[in] attr
4435  *   Pointer to the flow attributes.
4436  * @param[in] items
4437  *   Pointer to the list of items.
4438  * @param[in] actions
4439  *   Pointer to the list of actions.
4440  * @param[in] external
4441  *   This flow rule is created by request external to PMD.
4442  * @param[out] error
4443  *   Pointer to the error structure.
4444  *
4445  * @return
4446  *   0 on success, a negative errno value otherwise and rte_errno is set.
4447  */
4448 static int
4449 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4450                  const struct rte_flow_item items[],
4451                  const struct rte_flow_action actions[],
4452                  bool external, struct rte_flow_error *error)
4453 {
4454         int ret;
4455         uint64_t action_flags = 0;
4456         uint64_t item_flags = 0;
4457         uint64_t last_item = 0;
4458         uint8_t next_protocol = 0xff;
4459         uint16_t ether_type = 0;
4460         int actions_n = 0;
4461         uint8_t item_ipv6_proto = 0;
4462         const struct rte_flow_item *gre_item = NULL;
4463         const struct rte_flow_action_raw_decap *decap;
4464         const struct rte_flow_action_raw_encap *encap;
4465         const struct rte_flow_action_rss *rss;
4466         struct rte_flow_item_tcp nic_tcp_mask = {
4467                 .hdr = {
4468                         .tcp_flags = 0xFF,
4469                         .src_port = RTE_BE16(UINT16_MAX),
4470                         .dst_port = RTE_BE16(UINT16_MAX),
4471                 }
4472         };
4473         struct mlx5_priv *priv = dev->data->dev_private;
4474         struct mlx5_dev_config *dev_conf = &priv->config;
4475         uint16_t queue_index = 0xFFFF;
4476
4477         if (items == NULL)
4478                 return -1;
4479         ret = flow_dv_validate_attributes(dev, attr, external, error);
4480         if (ret < 0)
4481                 return ret;
4482         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4483                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4484                 int type = items->type;
4485
4486                 switch (type) {
4487                 case RTE_FLOW_ITEM_TYPE_VOID:
4488                         break;
4489                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4490                         ret = flow_dv_validate_item_port_id
4491                                         (dev, items, attr, item_flags, error);
4492                         if (ret < 0)
4493                                 return ret;
4494                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4495                         break;
4496                 case RTE_FLOW_ITEM_TYPE_ETH:
4497                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4498                                                           error);
4499                         if (ret < 0)
4500                                 return ret;
4501                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4502                                              MLX5_FLOW_LAYER_OUTER_L2;
4503                         if (items->mask != NULL && items->spec != NULL) {
4504                                 ether_type =
4505                                         ((const struct rte_flow_item_eth *)
4506                                          items->spec)->type;
4507                                 ether_type &=
4508                                         ((const struct rte_flow_item_eth *)
4509                                          items->mask)->type;
4510                                 ether_type = rte_be_to_cpu_16(ether_type);
4511                         } else {
4512                                 ether_type = 0;
4513                         }
4514                         break;
4515                 case RTE_FLOW_ITEM_TYPE_VLAN:
4516                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4517                                                            dev, error);
4518                         if (ret < 0)
4519                                 return ret;
4520                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4521                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4522                         if (items->mask != NULL && items->spec != NULL) {
4523                                 ether_type =
4524                                         ((const struct rte_flow_item_vlan *)
4525                                          items->spec)->inner_type;
4526                                 ether_type &=
4527                                         ((const struct rte_flow_item_vlan *)
4528                                          items->mask)->inner_type;
4529                                 ether_type = rte_be_to_cpu_16(ether_type);
4530                         } else {
4531                                 ether_type = 0;
4532                         }
4533                         break;
4534                 case RTE_FLOW_ITEM_TYPE_IPV4:
4535                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4536                                                   &item_flags, &tunnel);
4537                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4538                                                            last_item,
4539                                                            ether_type, NULL,
4540                                                            error);
4541                         if (ret < 0)
4542                                 return ret;
4543                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4544                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4545                         if (items->mask != NULL &&
4546                             ((const struct rte_flow_item_ipv4 *)
4547                              items->mask)->hdr.next_proto_id) {
4548                                 next_protocol =
4549                                         ((const struct rte_flow_item_ipv4 *)
4550                                          (items->spec))->hdr.next_proto_id;
4551                                 next_protocol &=
4552                                         ((const struct rte_flow_item_ipv4 *)
4553                                          (items->mask))->hdr.next_proto_id;
4554                         } else {
4555                                 /* Reset for inner layer. */
4556                                 next_protocol = 0xff;
4557                         }
4558                         break;
4559                 case RTE_FLOW_ITEM_TYPE_IPV6:
4560                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4561                                                   &item_flags, &tunnel);
4562                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4563                                                            last_item,
4564                                                            ether_type, NULL,
4565                                                            error);
4566                         if (ret < 0)
4567                                 return ret;
4568                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4569                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4570                         if (items->mask != NULL &&
4571                             ((const struct rte_flow_item_ipv6 *)
4572                              items->mask)->hdr.proto) {
4573                                 item_ipv6_proto =
4574                                         ((const struct rte_flow_item_ipv6 *)
4575                                          items->spec)->hdr.proto;
4576                                 next_protocol =
4577                                         ((const struct rte_flow_item_ipv6 *)
4578                                          items->spec)->hdr.proto;
4579                                 next_protocol &=
4580                                         ((const struct rte_flow_item_ipv6 *)
4581                                          items->mask)->hdr.proto;
4582                         } else {
4583                                 /* Reset for inner layer. */
4584                                 next_protocol = 0xff;
4585                         }
4586                         break;
4587                 case RTE_FLOW_ITEM_TYPE_TCP:
4588                         ret = mlx5_flow_validate_item_tcp
4589                                                 (items, item_flags,
4590                                                  next_protocol,
4591                                                  &nic_tcp_mask,
4592                                                  error);
4593                         if (ret < 0)
4594                                 return ret;
4595                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4596                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4597                         break;
4598                 case RTE_FLOW_ITEM_TYPE_UDP:
4599                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4600                                                           next_protocol,
4601                                                           error);
4602                         if (ret < 0)
4603                                 return ret;
4604                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4605                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4606                         break;
4607                 case RTE_FLOW_ITEM_TYPE_GRE:
4608                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4609                                                           next_protocol, error);
4610                         if (ret < 0)
4611                                 return ret;
4612                         gre_item = items;
4613                         last_item = MLX5_FLOW_LAYER_GRE;
4614                         break;
4615                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4616                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4617                                                             next_protocol,
4618                                                             error);
4619                         if (ret < 0)
4620                                 return ret;
4621                         last_item = MLX5_FLOW_LAYER_NVGRE;
4622                         break;
4623                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4624                         ret = mlx5_flow_validate_item_gre_key
4625                                 (items, item_flags, gre_item, error);
4626                         if (ret < 0)
4627                                 return ret;
4628                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4629                         break;
4630                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4631                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4632                                                             error);
4633                         if (ret < 0)
4634                                 return ret;
4635                         last_item = MLX5_FLOW_LAYER_VXLAN;
4636                         break;
4637                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4638                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4639                                                                 item_flags, dev,
4640                                                                 error);
4641                         if (ret < 0)
4642                                 return ret;
4643                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4644                         break;
4645                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4646                         ret = mlx5_flow_validate_item_geneve(items,
4647                                                              item_flags, dev,
4648                                                              error);
4649                         if (ret < 0)
4650                                 return ret;
4651                         last_item = MLX5_FLOW_LAYER_GENEVE;
4652                         break;
4653                 case RTE_FLOW_ITEM_TYPE_MPLS:
4654                         ret = mlx5_flow_validate_item_mpls(dev, items,
4655                                                            item_flags,
4656                                                            last_item, error);
4657                         if (ret < 0)
4658                                 return ret;
4659                         last_item = MLX5_FLOW_LAYER_MPLS;
4660                         break;
4661
4662                 case RTE_FLOW_ITEM_TYPE_MARK:
4663                         ret = flow_dv_validate_item_mark(dev, items, attr,
4664                                                          error);
4665                         if (ret < 0)
4666                                 return ret;
4667                         last_item = MLX5_FLOW_ITEM_MARK;
4668                         break;
4669                 case RTE_FLOW_ITEM_TYPE_META:
4670                         ret = flow_dv_validate_item_meta(dev, items, attr,
4671                                                          error);
4672                         if (ret < 0)
4673                                 return ret;
4674                         last_item = MLX5_FLOW_ITEM_METADATA;
4675                         break;
4676                 case RTE_FLOW_ITEM_TYPE_ICMP:
4677                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4678                                                            next_protocol,
4679                                                            error);
4680                         if (ret < 0)
4681                                 return ret;
4682                         last_item = MLX5_FLOW_LAYER_ICMP;
4683                         break;
4684                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4685                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4686                                                             next_protocol,
4687                                                             error);
4688                         if (ret < 0)
4689                                 return ret;
4690                         item_ipv6_proto = IPPROTO_ICMPV6;
4691                         last_item = MLX5_FLOW_LAYER_ICMP6;
4692                         break;
4693                 case RTE_FLOW_ITEM_TYPE_TAG:
4694                         ret = flow_dv_validate_item_tag(dev, items,
4695                                                         attr, error);
4696                         if (ret < 0)
4697                                 return ret;
4698                         last_item = MLX5_FLOW_ITEM_TAG;
4699                         break;
4700                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4701                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4702                         break;
4703                 case RTE_FLOW_ITEM_TYPE_GTP:
4704                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4705                                                         error);
4706                         if (ret < 0)
4707                                 return ret;
4708                         last_item = MLX5_FLOW_LAYER_GTP;
4709                         break;
4710                 default:
4711                         return rte_flow_error_set(error, ENOTSUP,
4712                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4713                                                   NULL, "item not supported");
4714                 }
4715                 item_flags |= last_item;
4716         }
4717         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4718                 int type = actions->type;
4719                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4720                         return rte_flow_error_set(error, ENOTSUP,
4721                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4722                                                   actions, "too many actions");
4723                 switch (type) {
4724                 case RTE_FLOW_ACTION_TYPE_VOID:
4725                         break;
4726                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4727                         ret = flow_dv_validate_action_port_id(dev,
4728                                                               action_flags,
4729                                                               actions,
4730                                                               attr,
4731                                                               error);
4732                         if (ret)
4733                                 return ret;
4734                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4735                         ++actions_n;
4736                         break;
4737                 case RTE_FLOW_ACTION_TYPE_FLAG:
4738                         ret = flow_dv_validate_action_flag(dev, action_flags,
4739                                                            attr, error);
4740                         if (ret < 0)
4741                                 return ret;
4742                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4743                                 /* Count all modify-header actions as one. */
4744                                 if (!(action_flags &
4745                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4746                                         ++actions_n;
4747                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4748                                                 MLX5_FLOW_ACTION_MARK_EXT;
4749                         } else {
4750                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4751                                 ++actions_n;
4752                         }
4753                         break;
4754                 case RTE_FLOW_ACTION_TYPE_MARK:
4755                         ret = flow_dv_validate_action_mark(dev, actions,
4756                                                            action_flags,
4757                                                            attr, error);
4758                         if (ret < 0)
4759                                 return ret;
4760                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4761                                 /* Count all modify-header actions as one. */
4762                                 if (!(action_flags &
4763                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4764                                         ++actions_n;
4765                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4766                                                 MLX5_FLOW_ACTION_MARK_EXT;
4767                         } else {
4768                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4769                                 ++actions_n;
4770                         }
4771                         break;
4772                 case RTE_FLOW_ACTION_TYPE_SET_META:
4773                         ret = flow_dv_validate_action_set_meta(dev, actions,
4774                                                                action_flags,
4775                                                                attr, error);
4776                         if (ret < 0)
4777                                 return ret;
4778                         /* Count all modify-header actions as one action. */
4779                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4780                                 ++actions_n;
4781                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4782                         break;
4783                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4784                         ret = flow_dv_validate_action_set_tag(dev, actions,
4785                                                               action_flags,
4786                                                               attr, error);
4787                         if (ret < 0)
4788                                 return ret;
4789                         /* Count all modify-header actions as one action. */
4790                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4791                                 ++actions_n;
4792                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4793                         break;
4794                 case RTE_FLOW_ACTION_TYPE_DROP:
4795                         ret = mlx5_flow_validate_action_drop(action_flags,
4796                                                              attr, error);
4797                         if (ret < 0)
4798                                 return ret;
4799                         action_flags |= MLX5_FLOW_ACTION_DROP;
4800                         ++actions_n;
4801                         break;
4802                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4803                         ret = mlx5_flow_validate_action_queue(actions,
4804                                                               action_flags, dev,
4805                                                               attr, error);
4806                         if (ret < 0)
4807                                 return ret;
4808                         queue_index = ((const struct rte_flow_action_queue *)
4809                                                         (actions->conf))->index;
4810                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4811                         ++actions_n;
4812                         break;
4813                 case RTE_FLOW_ACTION_TYPE_RSS:
4814                         rss = actions->conf;
4815                         ret = mlx5_flow_validate_action_rss(actions,
4816                                                             action_flags, dev,
4817                                                             attr, item_flags,
4818                                                             error);
4819                         if (ret < 0)
4820                                 return ret;
4821                         if (rss != NULL && rss->queue_num)
4822                                 queue_index = rss->queue[0];
4823                         action_flags |= MLX5_FLOW_ACTION_RSS;
4824                         ++actions_n;
4825                         break;
4826                 case RTE_FLOW_ACTION_TYPE_COUNT:
4827                         ret = flow_dv_validate_action_count(dev, error);
4828                         if (ret < 0)
4829                                 return ret;
4830                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4831                         ++actions_n;
4832                         break;
4833                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4834                         if (flow_dv_validate_action_pop_vlan(dev,
4835                                                              action_flags,
4836                                                              actions,
4837                                                              item_flags, attr,
4838                                                              error))
4839                                 return -rte_errno;
4840                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4841                         ++actions_n;
4842                         break;
4843                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4844                         ret = flow_dv_validate_action_push_vlan(action_flags,
4845                                                                 item_flags,
4846                                                                 actions, attr,
4847                                                                 error);
4848                         if (ret < 0)
4849                                 return ret;
4850                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4851                         ++actions_n;
4852                         break;
4853                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4854                         ret = flow_dv_validate_action_set_vlan_pcp
4855                                                 (action_flags, actions, error);
4856                         if (ret < 0)
4857                                 return ret;
4858                         /* Count PCP with push_vlan command. */
4859                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4860                         break;
4861                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4862                         ret = flow_dv_validate_action_set_vlan_vid
4863                                                 (item_flags, action_flags,
4864                                                  actions, error);
4865                         if (ret < 0)
4866                                 return ret;
4867                         /* Count VID with push_vlan command. */
4868                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4869                         break;
4870                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4871                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4872                         ret = flow_dv_validate_action_l2_encap(action_flags,
4873                                                                actions, error);
4874                         if (ret < 0)
4875                                 return ret;
4876                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
4877                         ++actions_n;
4878                         break;
4879                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4880                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4881                         ret = flow_dv_validate_action_decap(action_flags, attr,
4882                                                             error);
4883                         if (ret < 0)
4884                                 return ret;
4885                         action_flags |= MLX5_FLOW_ACTION_DECAP;
4886                         ++actions_n;
4887                         break;
4888                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4889                         ret = flow_dv_validate_action_raw_encap_decap
4890                                 (NULL, actions->conf, attr, &action_flags,
4891                                  &actions_n, error);
4892                         if (ret < 0)
4893                                 return ret;
4894                         break;
4895                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4896                         decap = actions->conf;
4897                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
4898                                 ;
4899                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4900                                 encap = NULL;
4901                                 actions--;
4902                         } else {
4903                                 encap = actions->conf;
4904                         }
4905                         ret = flow_dv_validate_action_raw_encap_decap
4906                                            (decap ? decap : &empty_decap, encap,
4907                                             attr, &action_flags, &actions_n,
4908                                             error);
4909                         if (ret < 0)
4910                                 return ret;
4911                         break;
4912                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4913                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4914                         ret = flow_dv_validate_action_modify_mac(action_flags,
4915                                                                  actions,
4916                                                                  item_flags,
4917                                                                  error);
4918                         if (ret < 0)
4919                                 return ret;
4920                         /* Count all modify-header actions as one action. */
4921                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4922                                 ++actions_n;
4923                         action_flags |= actions->type ==
4924                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4925                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4926                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4927                         break;
4928
4929                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4930                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4931                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4932                                                                   actions,
4933                                                                   item_flags,
4934                                                                   error);
4935                         if (ret < 0)
4936                                 return ret;
4937                         /* Count all modify-header actions as one action. */
4938                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4939                                 ++actions_n;
4940                         action_flags |= actions->type ==
4941                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4942                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4943                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4944                         break;
4945                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4946                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4947                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4948                                                                   actions,
4949                                                                   item_flags,
4950                                                                   error);
4951                         if (ret < 0)
4952                                 return ret;
4953                         if (item_ipv6_proto == IPPROTO_ICMPV6)
4954                                 return rte_flow_error_set(error, ENOTSUP,
4955                                         RTE_FLOW_ERROR_TYPE_ACTION,
4956                                         actions,
4957                                         "Can't change header "
4958                                         "with ICMPv6 proto");
4959                         /* Count all modify-header actions as one action. */
4960                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4961                                 ++actions_n;
4962                         action_flags |= actions->type ==
4963                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4964                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4965                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4966                         break;
4967                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4968                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4969                         ret = flow_dv_validate_action_modify_tp(action_flags,
4970                                                                 actions,
4971                                                                 item_flags,
4972                                                                 error);
4973                         if (ret < 0)
4974                                 return ret;
4975                         /* Count all modify-header actions as one action. */
4976                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4977                                 ++actions_n;
4978                         action_flags |= actions->type ==
4979                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4980                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4981                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4982                         break;
4983                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4984                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4985                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4986                                                                  actions,
4987                                                                  item_flags,
4988                                                                  error);
4989                         if (ret < 0)
4990                                 return ret;
4991                         /* Count all modify-header actions as one action. */
4992                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4993                                 ++actions_n;
4994                         action_flags |= actions->type ==
4995                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4996                                                 MLX5_FLOW_ACTION_SET_TTL :
4997                                                 MLX5_FLOW_ACTION_DEC_TTL;
4998                         break;
4999                 case RTE_FLOW_ACTION_TYPE_JUMP:
5000                         ret = flow_dv_validate_action_jump(actions,
5001                                                            action_flags,
5002                                                            attr, external,
5003                                                            error);
5004                         if (ret)
5005                                 return ret;
5006                         ++actions_n;
5007                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5008                         break;
5009                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5010                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5011                         ret = flow_dv_validate_action_modify_tcp_seq
5012                                                                 (action_flags,
5013                                                                  actions,
5014                                                                  item_flags,
5015                                                                  error);
5016                         if (ret < 0)
5017                                 return ret;
5018                         /* Count all modify-header actions as one action. */
5019                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5020                                 ++actions_n;
5021                         action_flags |= actions->type ==
5022                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5023                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
5024                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5025                         break;
5026                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5027                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5028                         ret = flow_dv_validate_action_modify_tcp_ack
5029                                                                 (action_flags,
5030                                                                  actions,
5031                                                                  item_flags,
5032                                                                  error);
5033                         if (ret < 0)
5034                                 return ret;
5035                         /* Count all modify-header actions as one action. */
5036                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5037                                 ++actions_n;
5038                         action_flags |= actions->type ==
5039                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5040                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5041                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5042                         break;
5043                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5044                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5045                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5046                         break;
5047                 case RTE_FLOW_ACTION_TYPE_METER:
5048                         ret = mlx5_flow_validate_action_meter(dev,
5049                                                               action_flags,
5050                                                               actions, attr,
5051                                                               error);
5052                         if (ret < 0)
5053                                 return ret;
5054                         action_flags |= MLX5_FLOW_ACTION_METER;
5055                         ++actions_n;
5056                         break;
5057                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5058                         ret = flow_dv_validate_action_modify_ipv4_dscp
5059                                                          (action_flags,
5060                                                           actions,
5061                                                           item_flags,
5062                                                           error);
5063                         if (ret < 0)
5064                                 return ret;
5065                         /* Count all modify-header actions as one action. */
5066                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5067                                 ++actions_n;
5068                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5069                         break;
5070                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5071                         ret = flow_dv_validate_action_modify_ipv6_dscp
5072                                                                 (action_flags,
5073                                                                  actions,
5074                                                                  item_flags,
5075                                                                  error);
5076                         if (ret < 0)
5077                                 return ret;
5078                         /* Count all modify-header actions as one action. */
5079                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5080                                 ++actions_n;
5081                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5082                         break;
5083                 default:
5084                         return rte_flow_error_set(error, ENOTSUP,
5085                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5086                                                   actions,
5087                                                   "action not supported");
5088                 }
5089         }
5090         /*
5091          * Validate the drop action mutual exclusion with other actions.
5092          * Drop action is mutually-exclusive with any other action, except for
5093          * Count action.
5094          */
5095         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5096             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5097                 return rte_flow_error_set(error, EINVAL,
5098                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5099                                           "Drop action is mutually-exclusive "
5100                                           "with any other action, except for "
5101                                           "Count action");
5102         /* Eswitch has few restrictions on using items and actions */
5103         if (attr->transfer) {
5104                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5105                     action_flags & MLX5_FLOW_ACTION_FLAG)
5106                         return rte_flow_error_set(error, ENOTSUP,
5107                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5108                                                   NULL,
5109                                                   "unsupported action FLAG");
5110                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5111                     action_flags & MLX5_FLOW_ACTION_MARK)
5112                         return rte_flow_error_set(error, ENOTSUP,
5113                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5114                                                   NULL,
5115                                                   "unsupported action MARK");
5116                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5117                         return rte_flow_error_set(error, ENOTSUP,
5118                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5119                                                   NULL,
5120                                                   "unsupported action QUEUE");
5121                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5122                         return rte_flow_error_set(error, ENOTSUP,
5123                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5124                                                   NULL,
5125                                                   "unsupported action RSS");
5126                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5127                         return rte_flow_error_set(error, EINVAL,
5128                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5129                                                   actions,
5130                                                   "no fate action is found");
5131         } else {
5132                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5133                         return rte_flow_error_set(error, EINVAL,
5134                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5135                                                   actions,
5136                                                   "no fate action is found");
5137         }
5138         /* Continue validation for Xcap actions.*/
5139         if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) && (queue_index == 0xFFFF ||
5140             mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5141                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5142                     MLX5_FLOW_XCAP_ACTIONS)
5143                         return rte_flow_error_set(error, ENOTSUP,
5144                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5145                                                   NULL, "encap and decap "
5146                                                   "combination aren't supported");
5147                 if (!attr->transfer && attr->ingress && (action_flags &
5148                                                         MLX5_FLOW_ACTION_ENCAP))
5149                         return rte_flow_error_set(error, ENOTSUP,
5150                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5151                                                   NULL, "encap is not supported"
5152                                                   " for ingress traffic");
5153         }
5154         return 0;
5155 }
5156
5157 /**
5158  * Internal preparation function. Allocates the DV flow size,
5159  * this size is constant.
5160  *
5161  * @param[in] attr
5162  *   Pointer to the flow attributes.
5163  * @param[in] items
5164  *   Pointer to the list of items.
5165  * @param[in] actions
5166  *   Pointer to the list of actions.
5167  * @param[out] error
5168  *   Pointer to the error structure.
5169  *
5170  * @return
5171  *   Pointer to mlx5_flow object on success,
5172  *   otherwise NULL and rte_errno is set.
5173  */
5174 static struct mlx5_flow *
5175 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5176                 const struct rte_flow_item items[] __rte_unused,
5177                 const struct rte_flow_action actions[] __rte_unused,
5178                 struct rte_flow_error *error)
5179 {
5180         size_t size = sizeof(struct mlx5_flow);
5181         struct mlx5_flow *dev_flow;
5182
5183         dev_flow = rte_calloc(__func__, 1, size, 0);
5184         if (!dev_flow) {
5185                 rte_flow_error_set(error, ENOMEM,
5186                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5187                                    "not enough memory to create flow");
5188                 return NULL;
5189         }
5190         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5191         dev_flow->ingress = attr->ingress;
5192         dev_flow->transfer = attr->transfer;
5193         return dev_flow;
5194 }
5195
5196 #ifdef RTE_LIBRTE_MLX5_DEBUG
5197 /**
5198  * Sanity check for match mask and value. Similar to check_valid_spec() in
5199  * kernel driver. If unmasked bit is present in value, it returns failure.
5200  *
5201  * @param match_mask
5202  *   pointer to match mask buffer.
5203  * @param match_value
5204  *   pointer to match value buffer.
5205  *
5206  * @return
5207  *   0 if valid, -EINVAL otherwise.
5208  */
5209 static int
5210 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5211 {
5212         uint8_t *m = match_mask;
5213         uint8_t *v = match_value;
5214         unsigned int i;
5215
5216         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5217                 if (v[i] & ~m[i]) {
5218                         DRV_LOG(ERR,
5219                                 "match_value differs from match_criteria"
5220                                 " %p[%u] != %p[%u]",
5221                                 match_value, i, match_mask, i);
5222                         return -EINVAL;
5223                 }
5224         }
5225         return 0;
5226 }
5227 #endif
5228
5229 /**
5230  * Add Ethernet item to matcher and to the value.
5231  *
5232  * @param[in, out] matcher
5233  *   Flow matcher.
5234  * @param[in, out] key
5235  *   Flow matcher value.
5236  * @param[in] item
5237  *   Flow pattern to translate.
5238  * @param[in] inner
5239  *   Item is inner pattern.
5240  */
5241 static void
5242 flow_dv_translate_item_eth(void *matcher, void *key,
5243                            const struct rte_flow_item *item, int inner)
5244 {
5245         const struct rte_flow_item_eth *eth_m = item->mask;
5246         const struct rte_flow_item_eth *eth_v = item->spec;
5247         const struct rte_flow_item_eth nic_mask = {
5248                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5249                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5250                 .type = RTE_BE16(0xffff),
5251         };
5252         void *headers_m;
5253         void *headers_v;
5254         char *l24_v;
5255         unsigned int i;
5256
5257         if (!eth_v)
5258                 return;
5259         if (!eth_m)
5260                 eth_m = &nic_mask;
5261         if (inner) {
5262                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5263                                          inner_headers);
5264                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5265         } else {
5266                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5267                                          outer_headers);
5268                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5269         }
5270         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5271                &eth_m->dst, sizeof(eth_m->dst));
5272         /* The value must be in the range of the mask. */
5273         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5274         for (i = 0; i < sizeof(eth_m->dst); ++i)
5275                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5276         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5277                &eth_m->src, sizeof(eth_m->src));
5278         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5279         /* The value must be in the range of the mask. */
5280         for (i = 0; i < sizeof(eth_m->dst); ++i)
5281                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5282         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5283                  rte_be_to_cpu_16(eth_m->type));
5284         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5285         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5286         if (eth_v->type) {
5287                 /* When ethertype is present set mask for tagged VLAN. */
5288                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5289                 /* Set value for tagged VLAN if ethertype is 802.1Q. */
5290                 if (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_VLAN) ||
5291                     eth_v->type == RTE_BE16(RTE_ETHER_TYPE_QINQ))
5292                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag,
5293                                  1);
5294         }
5295 }
5296
5297 /**
5298  * Add VLAN item to matcher and to the value.
5299  *
5300  * @param[in, out] dev_flow
5301  *   Flow descriptor.
5302  * @param[in, out] matcher
5303  *   Flow matcher.
5304  * @param[in, out] key
5305  *   Flow matcher value.
5306  * @param[in] item
5307  *   Flow pattern to translate.
5308  * @param[in] inner
5309  *   Item is inner pattern.
5310  */
5311 static void
5312 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5313                             void *matcher, void *key,
5314                             const struct rte_flow_item *item,
5315                             int inner)
5316 {
5317         const struct rte_flow_item_vlan *vlan_m = item->mask;
5318         const struct rte_flow_item_vlan *vlan_v = item->spec;
5319         void *headers_m;
5320         void *headers_v;
5321         uint16_t tci_m;
5322         uint16_t tci_v;
5323
5324         if (!vlan_v)
5325                 return;
5326         if (!vlan_m)
5327                 vlan_m = &rte_flow_item_vlan_mask;
5328         if (inner) {
5329                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5330                                          inner_headers);
5331                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5332         } else {
5333                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5334                                          outer_headers);
5335                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5336                 /*
5337                  * This is workaround, masks are not supported,
5338                  * and pre-validated.
5339                  */
5340                 dev_flow->dv.vf_vlan.tag =
5341                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5342         }
5343         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5344         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5345         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5346         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5347         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5348         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5349         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5350         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5351         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5352         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5353         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5354                  rte_be_to_cpu_16(vlan_m->inner_type));
5355         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5356                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5357 }
5358
5359 /**
5360  * Add IPV4 item to matcher and to the value.
5361  *
5362  * @param[in, out] matcher
5363  *   Flow matcher.
5364  * @param[in, out] key
5365  *   Flow matcher value.
5366  * @param[in] item
5367  *   Flow pattern to translate.
5368  * @param[in] inner
5369  *   Item is inner pattern.
5370  * @param[in] group
5371  *   The group to insert the rule.
5372  */
5373 static void
5374 flow_dv_translate_item_ipv4(void *matcher, void *key,
5375                             const struct rte_flow_item *item,
5376                             int inner, uint32_t group)
5377 {
5378         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5379         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5380         const struct rte_flow_item_ipv4 nic_mask = {
5381                 .hdr = {
5382                         .src_addr = RTE_BE32(0xffffffff),
5383                         .dst_addr = RTE_BE32(0xffffffff),
5384                         .type_of_service = 0xff,
5385                         .next_proto_id = 0xff,
5386                 },
5387         };
5388         void *headers_m;
5389         void *headers_v;
5390         char *l24_m;
5391         char *l24_v;
5392         uint8_t tos;
5393
5394         if (inner) {
5395                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5396                                          inner_headers);
5397                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5398         } else {
5399                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5400                                          outer_headers);
5401                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5402         }
5403         if (group == 0)
5404                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5405         else
5406                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5407         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5408         if (!ipv4_v)
5409                 return;
5410         if (!ipv4_m)
5411                 ipv4_m = &nic_mask;
5412         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5413                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5414         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5415                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5416         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5417         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5418         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5419                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5420         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5421                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5422         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5423         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5424         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5425         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5426                  ipv4_m->hdr.type_of_service);
5427         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5428         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5429                  ipv4_m->hdr.type_of_service >> 2);
5430         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5431         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5432                  ipv4_m->hdr.next_proto_id);
5433         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5434                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5435         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5436 }
5437
5438 /**
5439  * Add IPV6 item to matcher and to the value.
5440  *
5441  * @param[in, out] matcher
5442  *   Flow matcher.
5443  * @param[in, out] key
5444  *   Flow matcher value.
5445  * @param[in] item
5446  *   Flow pattern to translate.
5447  * @param[in] inner
5448  *   Item is inner pattern.
5449  * @param[in] group
5450  *   The group to insert the rule.
5451  */
5452 static void
5453 flow_dv_translate_item_ipv6(void *matcher, void *key,
5454                             const struct rte_flow_item *item,
5455                             int inner, uint32_t group)
5456 {
5457         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5458         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5459         const struct rte_flow_item_ipv6 nic_mask = {
5460                 .hdr = {
5461                         .src_addr =
5462                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5463                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5464                         .dst_addr =
5465                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5466                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5467                         .vtc_flow = RTE_BE32(0xffffffff),
5468                         .proto = 0xff,
5469                         .hop_limits = 0xff,
5470                 },
5471         };
5472         void *headers_m;
5473         void *headers_v;
5474         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5475         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5476         char *l24_m;
5477         char *l24_v;
5478         uint32_t vtc_m;
5479         uint32_t vtc_v;
5480         int i;
5481         int size;
5482
5483         if (inner) {
5484                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5485                                          inner_headers);
5486                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5487         } else {
5488                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5489                                          outer_headers);
5490                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5491         }
5492         if (group == 0)
5493                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5494         else
5495                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5496         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5497         if (!ipv6_v)
5498                 return;
5499         if (!ipv6_m)
5500                 ipv6_m = &nic_mask;
5501         size = sizeof(ipv6_m->hdr.dst_addr);
5502         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5503                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5504         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5505                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5506         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5507         for (i = 0; i < size; ++i)
5508                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5509         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5510                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5511         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5512                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5513         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5514         for (i = 0; i < size; ++i)
5515                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5516         /* TOS. */
5517         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5518         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5519         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5520         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5521         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5522         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5523         /* Label. */
5524         if (inner) {
5525                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5526                          vtc_m);
5527                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5528                          vtc_v);
5529         } else {
5530                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5531                          vtc_m);
5532                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5533                          vtc_v);
5534         }
5535         /* Protocol. */
5536         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5537                  ipv6_m->hdr.proto);
5538         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5539                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5540         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5541 }
5542
5543 /**
5544  * Add TCP item to matcher and to the value.
5545  *
5546  * @param[in, out] matcher
5547  *   Flow matcher.
5548  * @param[in, out] key
5549  *   Flow matcher value.
5550  * @param[in] item
5551  *   Flow pattern to translate.
5552  * @param[in] inner
5553  *   Item is inner pattern.
5554  */
5555 static void
5556 flow_dv_translate_item_tcp(void *matcher, void *key,
5557                            const struct rte_flow_item *item,
5558                            int inner)
5559 {
5560         const struct rte_flow_item_tcp *tcp_m = item->mask;
5561         const struct rte_flow_item_tcp *tcp_v = item->spec;
5562         void *headers_m;
5563         void *headers_v;
5564
5565         if (inner) {
5566                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5567                                          inner_headers);
5568                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5569         } else {
5570                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5571                                          outer_headers);
5572                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5573         }
5574         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5575         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5576         if (!tcp_v)
5577                 return;
5578         if (!tcp_m)
5579                 tcp_m = &rte_flow_item_tcp_mask;
5580         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5581                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5582         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5583                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5584         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5585                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5586         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5587                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5588         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5589                  tcp_m->hdr.tcp_flags);
5590         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5591                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5592 }
5593
5594 /**
5595  * Add UDP item to matcher and to the value.
5596  *
5597  * @param[in, out] matcher
5598  *   Flow matcher.
5599  * @param[in, out] key
5600  *   Flow matcher value.
5601  * @param[in] item
5602  *   Flow pattern to translate.
5603  * @param[in] inner
5604  *   Item is inner pattern.
5605  */
5606 static void
5607 flow_dv_translate_item_udp(void *matcher, void *key,
5608                            const struct rte_flow_item *item,
5609                            int inner)
5610 {
5611         const struct rte_flow_item_udp *udp_m = item->mask;
5612         const struct rte_flow_item_udp *udp_v = item->spec;
5613         void *headers_m;
5614         void *headers_v;
5615
5616         if (inner) {
5617                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5618                                          inner_headers);
5619                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5620         } else {
5621                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5622                                          outer_headers);
5623                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5624         }
5625         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5626         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5627         if (!udp_v)
5628                 return;
5629         if (!udp_m)
5630                 udp_m = &rte_flow_item_udp_mask;
5631         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5632                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5633         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5634                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5635         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5636                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5637         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5638                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5639 }
5640
5641 /**
5642  * Add GRE optional Key item to matcher and to the value.
5643  *
5644  * @param[in, out] matcher
5645  *   Flow matcher.
5646  * @param[in, out] key
5647  *   Flow matcher value.
5648  * @param[in] item
5649  *   Flow pattern to translate.
5650  * @param[in] inner
5651  *   Item is inner pattern.
5652  */
5653 static void
5654 flow_dv_translate_item_gre_key(void *matcher, void *key,
5655                                    const struct rte_flow_item *item)
5656 {
5657         const rte_be32_t *key_m = item->mask;
5658         const rte_be32_t *key_v = item->spec;
5659         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5660         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5661         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5662
5663         /* GRE K bit must be on and should already be validated */
5664         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5665         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5666         if (!key_v)
5667                 return;
5668         if (!key_m)
5669                 key_m = &gre_key_default_mask;
5670         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5671                  rte_be_to_cpu_32(*key_m) >> 8);
5672         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5673                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5674         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5675                  rte_be_to_cpu_32(*key_m) & 0xFF);
5676         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5677                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5678 }
5679
5680 /**
5681  * Add GRE item to matcher and to the value.
5682  *
5683  * @param[in, out] matcher
5684  *   Flow matcher.
5685  * @param[in, out] key
5686  *   Flow matcher value.
5687  * @param[in] item
5688  *   Flow pattern to translate.
5689  * @param[in] inner
5690  *   Item is inner pattern.
5691  */
5692 static void
5693 flow_dv_translate_item_gre(void *matcher, void *key,
5694                            const struct rte_flow_item *item,
5695                            int inner)
5696 {
5697         const struct rte_flow_item_gre *gre_m = item->mask;
5698         const struct rte_flow_item_gre *gre_v = item->spec;
5699         void *headers_m;
5700         void *headers_v;
5701         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5702         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5703         struct {
5704                 union {
5705                         __extension__
5706                         struct {
5707                                 uint16_t version:3;
5708                                 uint16_t rsvd0:9;
5709                                 uint16_t s_present:1;
5710                                 uint16_t k_present:1;
5711                                 uint16_t rsvd_bit1:1;
5712                                 uint16_t c_present:1;
5713                         };
5714                         uint16_t value;
5715                 };
5716         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5717
5718         if (inner) {
5719                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5720                                          inner_headers);
5721                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5722         } else {
5723                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5724                                          outer_headers);
5725                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5726         }
5727         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5728         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5729         if (!gre_v)
5730                 return;
5731         if (!gre_m)
5732                 gre_m = &rte_flow_item_gre_mask;
5733         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5734                  rte_be_to_cpu_16(gre_m->protocol));
5735         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5736                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5737         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5738         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5739         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5740                  gre_crks_rsvd0_ver_m.c_present);
5741         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5742                  gre_crks_rsvd0_ver_v.c_present &
5743                  gre_crks_rsvd0_ver_m.c_present);
5744         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5745                  gre_crks_rsvd0_ver_m.k_present);
5746         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5747                  gre_crks_rsvd0_ver_v.k_present &
5748                  gre_crks_rsvd0_ver_m.k_present);
5749         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5750                  gre_crks_rsvd0_ver_m.s_present);
5751         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5752                  gre_crks_rsvd0_ver_v.s_present &
5753                  gre_crks_rsvd0_ver_m.s_present);
5754 }
5755
5756 /**
5757  * Add NVGRE item to matcher and to the value.
5758  *
5759  * @param[in, out] matcher
5760  *   Flow matcher.
5761  * @param[in, out] key
5762  *   Flow matcher value.
5763  * @param[in] item
5764  *   Flow pattern to translate.
5765  * @param[in] inner
5766  *   Item is inner pattern.
5767  */
5768 static void
5769 flow_dv_translate_item_nvgre(void *matcher, void *key,
5770                              const struct rte_flow_item *item,
5771                              int inner)
5772 {
5773         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5774         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5775         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5776         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5777         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5778         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5779         char *gre_key_m;
5780         char *gre_key_v;
5781         int size;
5782         int i;
5783
5784         /* For NVGRE, GRE header fields must be set with defined values. */
5785         const struct rte_flow_item_gre gre_spec = {
5786                 .c_rsvd0_ver = RTE_BE16(0x2000),
5787                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5788         };
5789         const struct rte_flow_item_gre gre_mask = {
5790                 .c_rsvd0_ver = RTE_BE16(0xB000),
5791                 .protocol = RTE_BE16(UINT16_MAX),
5792         };
5793         const struct rte_flow_item gre_item = {
5794                 .spec = &gre_spec,
5795                 .mask = &gre_mask,
5796                 .last = NULL,
5797         };
5798         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5799         if (!nvgre_v)
5800                 return;
5801         if (!nvgre_m)
5802                 nvgre_m = &rte_flow_item_nvgre_mask;
5803         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5804         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5805         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5806         memcpy(gre_key_m, tni_flow_id_m, size);
5807         for (i = 0; i < size; ++i)
5808                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5809 }
5810
5811 /**
5812  * Add VXLAN item to matcher and to the value.
5813  *
5814  * @param[in, out] matcher
5815  *   Flow matcher.
5816  * @param[in, out] key
5817  *   Flow matcher value.
5818  * @param[in] item
5819  *   Flow pattern to translate.
5820  * @param[in] inner
5821  *   Item is inner pattern.
5822  */
5823 static void
5824 flow_dv_translate_item_vxlan(void *matcher, void *key,
5825                              const struct rte_flow_item *item,
5826                              int inner)
5827 {
5828         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5829         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5830         void *headers_m;
5831         void *headers_v;
5832         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5833         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5834         char *vni_m;
5835         char *vni_v;
5836         uint16_t dport;
5837         int size;
5838         int i;
5839
5840         if (inner) {
5841                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5842                                          inner_headers);
5843                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5844         } else {
5845                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5846                                          outer_headers);
5847                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5848         }
5849         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5850                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5851         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5852                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5853                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5854         }
5855         if (!vxlan_v)
5856                 return;
5857         if (!vxlan_m)
5858                 vxlan_m = &rte_flow_item_vxlan_mask;
5859         size = sizeof(vxlan_m->vni);
5860         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5861         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5862         memcpy(vni_m, vxlan_m->vni, size);
5863         for (i = 0; i < size; ++i)
5864                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5865 }
5866
5867 /**
5868  * Add VXLAN-GPE item to matcher and to the value.
5869  *
5870  * @param[in, out] matcher
5871  *   Flow matcher.
5872  * @param[in, out] key
5873  *   Flow matcher value.
5874  * @param[in] item
5875  *   Flow pattern to translate.
5876  * @param[in] inner
5877  *   Item is inner pattern.
5878  */
5879
5880 static void
5881 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
5882                                  const struct rte_flow_item *item, int inner)
5883 {
5884         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
5885         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
5886         void *headers_m;
5887         void *headers_v;
5888         void *misc_m =
5889                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
5890         void *misc_v =
5891                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
5892         char *vni_m;
5893         char *vni_v;
5894         uint16_t dport;
5895         int size;
5896         int i;
5897         uint8_t flags_m = 0xff;
5898         uint8_t flags_v = 0xc;
5899
5900         if (inner) {
5901                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5902                                          inner_headers);
5903                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5904         } else {
5905                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5906                                          outer_headers);
5907                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5908         }
5909         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5910                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5911         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5912                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5913                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5914         }
5915         if (!vxlan_v)
5916                 return;
5917         if (!vxlan_m)
5918                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
5919         size = sizeof(vxlan_m->vni);
5920         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
5921         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
5922         memcpy(vni_m, vxlan_m->vni, size);
5923         for (i = 0; i < size; ++i)
5924                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5925         if (vxlan_m->flags) {
5926                 flags_m = vxlan_m->flags;
5927                 flags_v = vxlan_v->flags;
5928         }
5929         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
5930         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
5931         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
5932                  vxlan_m->protocol);
5933         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
5934                  vxlan_v->protocol);
5935 }
5936
5937 /**
5938  * Add Geneve item to matcher and to the value.
5939  *
5940  * @param[in, out] matcher
5941  *   Flow matcher.
5942  * @param[in, out] key
5943  *   Flow matcher value.
5944  * @param[in] item
5945  *   Flow pattern to translate.
5946  * @param[in] inner
5947  *   Item is inner pattern.
5948  */
5949
5950 static void
5951 flow_dv_translate_item_geneve(void *matcher, void *key,
5952                               const struct rte_flow_item *item, int inner)
5953 {
5954         const struct rte_flow_item_geneve *geneve_m = item->mask;
5955         const struct rte_flow_item_geneve *geneve_v = item->spec;
5956         void *headers_m;
5957         void *headers_v;
5958         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5959         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5960         uint16_t dport;
5961         uint16_t gbhdr_m;
5962         uint16_t gbhdr_v;
5963         char *vni_m;
5964         char *vni_v;
5965         size_t size, i;
5966
5967         if (inner) {
5968                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5969                                          inner_headers);
5970                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5971         } else {
5972                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5973                                          outer_headers);
5974                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5975         }
5976         dport = MLX5_UDP_PORT_GENEVE;
5977         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5978                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5979                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5980         }
5981         if (!geneve_v)
5982                 return;
5983         if (!geneve_m)
5984                 geneve_m = &rte_flow_item_geneve_mask;
5985         size = sizeof(geneve_m->vni);
5986         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5987         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5988         memcpy(vni_m, geneve_m->vni, size);
5989         for (i = 0; i < size; ++i)
5990                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5991         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5992                  rte_be_to_cpu_16(geneve_m->protocol));
5993         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5994                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5995         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5996         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5997         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5998                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5999         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
6000                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6001         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
6002                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6003         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
6004                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
6005                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6006 }
6007
6008 /**
6009  * Add MPLS item to matcher and to the value.
6010  *
6011  * @param[in, out] matcher
6012  *   Flow matcher.
6013  * @param[in, out] key
6014  *   Flow matcher value.
6015  * @param[in] item
6016  *   Flow pattern to translate.
6017  * @param[in] prev_layer
6018  *   The protocol layer indicated in previous item.
6019  * @param[in] inner
6020  *   Item is inner pattern.
6021  */
6022 static void
6023 flow_dv_translate_item_mpls(void *matcher, void *key,
6024                             const struct rte_flow_item *item,
6025                             uint64_t prev_layer,
6026                             int inner)
6027 {
6028         const uint32_t *in_mpls_m = item->mask;
6029         const uint32_t *in_mpls_v = item->spec;
6030         uint32_t *out_mpls_m = 0;
6031         uint32_t *out_mpls_v = 0;
6032         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6033         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6034         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
6035                                      misc_parameters_2);
6036         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6037         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
6038         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6039
6040         switch (prev_layer) {
6041         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6042                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
6043                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
6044                          MLX5_UDP_PORT_MPLS);
6045                 break;
6046         case MLX5_FLOW_LAYER_GRE:
6047                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
6048                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
6049                          RTE_ETHER_TYPE_MPLS);
6050                 break;
6051         default:
6052                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6053                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6054                          IPPROTO_MPLS);
6055                 break;
6056         }
6057         if (!in_mpls_v)
6058                 return;
6059         if (!in_mpls_m)
6060                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
6061         switch (prev_layer) {
6062         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6063                 out_mpls_m =
6064                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6065                                                  outer_first_mpls_over_udp);
6066                 out_mpls_v =
6067                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6068                                                  outer_first_mpls_over_udp);
6069                 break;
6070         case MLX5_FLOW_LAYER_GRE:
6071                 out_mpls_m =
6072                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6073                                                  outer_first_mpls_over_gre);
6074                 out_mpls_v =
6075                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6076                                                  outer_first_mpls_over_gre);
6077                 break;
6078         default:
6079                 /* Inner MPLS not over GRE is not supported. */
6080                 if (!inner) {
6081                         out_mpls_m =
6082                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6083                                                          misc2_m,
6084                                                          outer_first_mpls);
6085                         out_mpls_v =
6086                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6087                                                          misc2_v,
6088                                                          outer_first_mpls);
6089                 }
6090                 break;
6091         }
6092         if (out_mpls_m && out_mpls_v) {
6093                 *out_mpls_m = *in_mpls_m;
6094                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
6095         }
6096 }
6097
6098 /**
6099  * Add metadata register item to matcher
6100  *
6101  * @param[in, out] matcher
6102  *   Flow matcher.
6103  * @param[in, out] key
6104  *   Flow matcher value.
6105  * @param[in] reg_type
6106  *   Type of device metadata register
6107  * @param[in] value
6108  *   Register value
6109  * @param[in] mask
6110  *   Register mask
6111  */
6112 static void
6113 flow_dv_match_meta_reg(void *matcher, void *key,
6114                        enum modify_reg reg_type,
6115                        uint32_t data, uint32_t mask)
6116 {
6117         void *misc2_m =
6118                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
6119         void *misc2_v =
6120                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6121         uint32_t temp;
6122
6123         data &= mask;
6124         switch (reg_type) {
6125         case REG_A:
6126                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
6127                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
6128                 break;
6129         case REG_B:
6130                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
6131                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
6132                 break;
6133         case REG_C_0:
6134                 /*
6135                  * The metadata register C0 field might be divided into
6136                  * source vport index and META item value, we should set
6137                  * this field according to specified mask, not as whole one.
6138                  */
6139                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
6140                 temp |= mask;
6141                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
6142                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
6143                 temp &= ~mask;
6144                 temp |= data;
6145                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
6146                 break;
6147         case REG_C_1:
6148                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
6149                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
6150                 break;
6151         case REG_C_2:
6152                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
6153                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
6154                 break;
6155         case REG_C_3:
6156                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6157                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6158                 break;
6159         case REG_C_4:
6160                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6161                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6162                 break;
6163         case REG_C_5:
6164                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6165                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6166                 break;
6167         case REG_C_6:
6168                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6169                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6170                 break;
6171         case REG_C_7:
6172                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6173                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6174                 break;
6175         default:
6176                 MLX5_ASSERT(false);
6177                 break;
6178         }
6179 }
6180
6181 /**
6182  * Add MARK item to matcher
6183  *
6184  * @param[in] dev
6185  *   The device to configure through.
6186  * @param[in, out] matcher
6187  *   Flow matcher.
6188  * @param[in, out] key
6189  *   Flow matcher value.
6190  * @param[in] item
6191  *   Flow pattern to translate.
6192  */
6193 static void
6194 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6195                             void *matcher, void *key,
6196                             const struct rte_flow_item *item)
6197 {
6198         struct mlx5_priv *priv = dev->data->dev_private;
6199         const struct rte_flow_item_mark *mark;
6200         uint32_t value;
6201         uint32_t mask;
6202
6203         mark = item->mask ? (const void *)item->mask :
6204                             &rte_flow_item_mark_mask;
6205         mask = mark->id & priv->sh->dv_mark_mask;
6206         mark = (const void *)item->spec;
6207         MLX5_ASSERT(mark);
6208         value = mark->id & priv->sh->dv_mark_mask & mask;
6209         if (mask) {
6210                 enum modify_reg reg;
6211
6212                 /* Get the metadata register index for the mark. */
6213                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6214                 MLX5_ASSERT(reg > 0);
6215                 if (reg == REG_C_0) {
6216                         struct mlx5_priv *priv = dev->data->dev_private;
6217                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6218                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6219
6220                         mask &= msk_c0;
6221                         mask <<= shl_c0;
6222                         value <<= shl_c0;
6223                 }
6224                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6225         }
6226 }
6227
6228 /**
6229  * Add META item to matcher
6230  *
6231  * @param[in] dev
6232  *   The devich to configure through.
6233  * @param[in, out] matcher
6234  *   Flow matcher.
6235  * @param[in, out] key
6236  *   Flow matcher value.
6237  * @param[in] attr
6238  *   Attributes of flow that includes this item.
6239  * @param[in] item
6240  *   Flow pattern to translate.
6241  */
6242 static void
6243 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6244                             void *matcher, void *key,
6245                             const struct rte_flow_attr *attr,
6246                             const struct rte_flow_item *item)
6247 {
6248         const struct rte_flow_item_meta *meta_m;
6249         const struct rte_flow_item_meta *meta_v;
6250
6251         meta_m = (const void *)item->mask;
6252         if (!meta_m)
6253                 meta_m = &rte_flow_item_meta_mask;
6254         meta_v = (const void *)item->spec;
6255         if (meta_v) {
6256                 int reg;
6257                 uint32_t value = meta_v->data;
6258                 uint32_t mask = meta_m->data;
6259
6260                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6261                 if (reg < 0)
6262                         return;
6263                 /*
6264                  * In datapath code there is no endianness
6265                  * coversions for perfromance reasons, all
6266                  * pattern conversions are done in rte_flow.
6267                  */
6268                 value = rte_cpu_to_be_32(value);
6269                 mask = rte_cpu_to_be_32(mask);
6270                 if (reg == REG_C_0) {
6271                         struct mlx5_priv *priv = dev->data->dev_private;
6272                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6273                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6274 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6275                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6276
6277                         value >>= shr_c0;
6278                         mask >>= shr_c0;
6279 #endif
6280                         value <<= shl_c0;
6281                         mask <<= shl_c0;
6282                         MLX5_ASSERT(msk_c0);
6283                         MLX5_ASSERT(!(~msk_c0 & mask));
6284                 }
6285                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6286         }
6287 }
6288
6289 /**
6290  * Add vport metadata Reg C0 item to matcher
6291  *
6292  * @param[in, out] matcher
6293  *   Flow matcher.
6294  * @param[in, out] key
6295  *   Flow matcher value.
6296  * @param[in] reg
6297  *   Flow pattern to translate.
6298  */
6299 static void
6300 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6301                                   uint32_t value, uint32_t mask)
6302 {
6303         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6304 }
6305
6306 /**
6307  * Add tag item to matcher
6308  *
6309  * @param[in] dev
6310  *   The devich to configure through.
6311  * @param[in, out] matcher
6312  *   Flow matcher.
6313  * @param[in, out] key
6314  *   Flow matcher value.
6315  * @param[in] item
6316  *   Flow pattern to translate.
6317  */
6318 static void
6319 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6320                                 void *matcher, void *key,
6321                                 const struct rte_flow_item *item)
6322 {
6323         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6324         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6325         uint32_t mask, value;
6326
6327         MLX5_ASSERT(tag_v);
6328         value = tag_v->data;
6329         mask = tag_m ? tag_m->data : UINT32_MAX;
6330         if (tag_v->id == REG_C_0) {
6331                 struct mlx5_priv *priv = dev->data->dev_private;
6332                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6333                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6334
6335                 mask &= msk_c0;
6336                 mask <<= shl_c0;
6337                 value <<= shl_c0;
6338         }
6339         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6340 }
6341
6342 /**
6343  * Add TAG item to matcher
6344  *
6345  * @param[in] dev
6346  *   The devich to configure through.
6347  * @param[in, out] matcher
6348  *   Flow matcher.
6349  * @param[in, out] key
6350  *   Flow matcher value.
6351  * @param[in] item
6352  *   Flow pattern to translate.
6353  */
6354 static void
6355 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6356                            void *matcher, void *key,
6357                            const struct rte_flow_item *item)
6358 {
6359         const struct rte_flow_item_tag *tag_v = item->spec;
6360         const struct rte_flow_item_tag *tag_m = item->mask;
6361         enum modify_reg reg;
6362
6363         MLX5_ASSERT(tag_v);
6364         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6365         /* Get the metadata register index for the tag. */
6366         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6367         MLX5_ASSERT(reg > 0);
6368         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6369 }
6370
6371 /**
6372  * Add source vport match to the specified matcher.
6373  *
6374  * @param[in, out] matcher
6375  *   Flow matcher.
6376  * @param[in, out] key
6377  *   Flow matcher value.
6378  * @param[in] port
6379  *   Source vport value to match
6380  * @param[in] mask
6381  *   Mask
6382  */
6383 static void
6384 flow_dv_translate_item_source_vport(void *matcher, void *key,
6385                                     int16_t port, uint16_t mask)
6386 {
6387         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6388         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6389
6390         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6391         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6392 }
6393
6394 /**
6395  * Translate port-id item to eswitch match on  port-id.
6396  *
6397  * @param[in] dev
6398  *   The devich to configure through.
6399  * @param[in, out] matcher
6400  *   Flow matcher.
6401  * @param[in, out] key
6402  *   Flow matcher value.
6403  * @param[in] item
6404  *   Flow pattern to translate.
6405  *
6406  * @return
6407  *   0 on success, a negative errno value otherwise.
6408  */
6409 static int
6410 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6411                                void *key, const struct rte_flow_item *item)
6412 {
6413         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6414         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6415         struct mlx5_priv *priv;
6416         uint16_t mask, id;
6417
6418         mask = pid_m ? pid_m->id : 0xffff;
6419         id = pid_v ? pid_v->id : dev->data->port_id;
6420         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6421         if (!priv)
6422                 return -rte_errno;
6423         /* Translate to vport field or to metadata, depending on mode. */
6424         if (priv->vport_meta_mask)
6425                 flow_dv_translate_item_meta_vport(matcher, key,
6426                                                   priv->vport_meta_tag,
6427                                                   priv->vport_meta_mask);
6428         else
6429                 flow_dv_translate_item_source_vport(matcher, key,
6430                                                     priv->vport_id, mask);
6431         return 0;
6432 }
6433
6434 /**
6435  * Add ICMP6 item to matcher and to the value.
6436  *
6437  * @param[in, out] matcher
6438  *   Flow matcher.
6439  * @param[in, out] key
6440  *   Flow matcher value.
6441  * @param[in] item
6442  *   Flow pattern to translate.
6443  * @param[in] inner
6444  *   Item is inner pattern.
6445  */
6446 static void
6447 flow_dv_translate_item_icmp6(void *matcher, void *key,
6448                               const struct rte_flow_item *item,
6449                               int inner)
6450 {
6451         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6452         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6453         void *headers_m;
6454         void *headers_v;
6455         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6456                                      misc_parameters_3);
6457         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6458         if (inner) {
6459                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6460                                          inner_headers);
6461                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6462         } else {
6463                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6464                                          outer_headers);
6465                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6466         }
6467         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6468         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6469         if (!icmp6_v)
6470                 return;
6471         if (!icmp6_m)
6472                 icmp6_m = &rte_flow_item_icmp6_mask;
6473         /*
6474          * Force flow only to match the non-fragmented IPv6 ICMPv6 packets.
6475          * If only the protocol is specified, no need to match the frag.
6476          */
6477         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6478         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6479         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6480         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6481                  icmp6_v->type & icmp6_m->type);
6482         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6483         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6484                  icmp6_v->code & icmp6_m->code);
6485 }
6486
6487 /**
6488  * Add ICMP item to matcher and to the value.
6489  *
6490  * @param[in, out] matcher
6491  *   Flow matcher.
6492  * @param[in, out] key
6493  *   Flow matcher value.
6494  * @param[in] item
6495  *   Flow pattern to translate.
6496  * @param[in] inner
6497  *   Item is inner pattern.
6498  */
6499 static void
6500 flow_dv_translate_item_icmp(void *matcher, void *key,
6501                             const struct rte_flow_item *item,
6502                             int inner)
6503 {
6504         const struct rte_flow_item_icmp *icmp_m = item->mask;
6505         const struct rte_flow_item_icmp *icmp_v = item->spec;
6506         void *headers_m;
6507         void *headers_v;
6508         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6509                                      misc_parameters_3);
6510         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6511         if (inner) {
6512                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6513                                          inner_headers);
6514                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6515         } else {
6516                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6517                                          outer_headers);
6518                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6519         }
6520         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6521         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6522         if (!icmp_v)
6523                 return;
6524         if (!icmp_m)
6525                 icmp_m = &rte_flow_item_icmp_mask;
6526         /*
6527          * Force flow only to match the non-fragmented IPv4 ICMP packets.
6528          * If only the protocol is specified, no need to match the frag.
6529          */
6530         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6531         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6532         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6533                  icmp_m->hdr.icmp_type);
6534         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6535                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6536         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6537                  icmp_m->hdr.icmp_code);
6538         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6539                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6540 }
6541
6542 /**
6543  * Add GTP item to matcher and to the value.
6544  *
6545  * @param[in, out] matcher
6546  *   Flow matcher.
6547  * @param[in, out] key
6548  *   Flow matcher value.
6549  * @param[in] item
6550  *   Flow pattern to translate.
6551  * @param[in] inner
6552  *   Item is inner pattern.
6553  */
6554 static void
6555 flow_dv_translate_item_gtp(void *matcher, void *key,
6556                            const struct rte_flow_item *item, int inner)
6557 {
6558         const struct rte_flow_item_gtp *gtp_m = item->mask;
6559         const struct rte_flow_item_gtp *gtp_v = item->spec;
6560         void *headers_m;
6561         void *headers_v;
6562         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6563                                      misc_parameters_3);
6564         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6565         uint16_t dport = RTE_GTPU_UDP_PORT;
6566
6567         if (inner) {
6568                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6569                                          inner_headers);
6570                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6571         } else {
6572                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6573                                          outer_headers);
6574                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6575         }
6576         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6577                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6578                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6579         }
6580         if (!gtp_v)
6581                 return;
6582         if (!gtp_m)
6583                 gtp_m = &rte_flow_item_gtp_mask;
6584         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6585         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6586                  gtp_v->msg_type & gtp_m->msg_type);
6587         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6588                  rte_be_to_cpu_32(gtp_m->teid));
6589         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6590                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6591 }
6592
6593 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6594
6595 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6596         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6597                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6598
6599 /**
6600  * Calculate flow matcher enable bitmap.
6601  *
6602  * @param match_criteria
6603  *   Pointer to flow matcher criteria.
6604  *
6605  * @return
6606  *   Bitmap of enabled fields.
6607  */
6608 static uint8_t
6609 flow_dv_matcher_enable(uint32_t *match_criteria)
6610 {
6611         uint8_t match_criteria_enable;
6612
6613         match_criteria_enable =
6614                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6615                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6616         match_criteria_enable |=
6617                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6618                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6619         match_criteria_enable |=
6620                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6621                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6622         match_criteria_enable |=
6623                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6624                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6625         match_criteria_enable |=
6626                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6627                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6628         return match_criteria_enable;
6629 }
6630
6631
6632 /**
6633  * Get a flow table.
6634  *
6635  * @param[in, out] dev
6636  *   Pointer to rte_eth_dev structure.
6637  * @param[in] table_id
6638  *   Table id to use.
6639  * @param[in] egress
6640  *   Direction of the table.
6641  * @param[in] transfer
6642  *   E-Switch or NIC flow.
6643  * @param[out] error
6644  *   pointer to error structure.
6645  *
6646  * @return
6647  *   Returns tables resource based on the index, NULL in case of failed.
6648  */
6649 static struct mlx5_flow_tbl_resource *
6650 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6651                          uint32_t table_id, uint8_t egress,
6652                          uint8_t transfer,
6653                          struct rte_flow_error *error)
6654 {
6655         struct mlx5_priv *priv = dev->data->dev_private;
6656         struct mlx5_ibv_shared *sh = priv->sh;
6657         struct mlx5_flow_tbl_resource *tbl;
6658         union mlx5_flow_tbl_key table_key = {
6659                 {
6660                         .table_id = table_id,
6661                         .reserved = 0,
6662                         .domain = !!transfer,
6663                         .direction = !!egress,
6664                 }
6665         };
6666         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6667                                                          table_key.v64);
6668         struct mlx5_flow_tbl_data_entry *tbl_data;
6669         int ret;
6670         void *domain;
6671
6672         if (pos) {
6673                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6674                                         entry);
6675                 tbl = &tbl_data->tbl;
6676                 rte_atomic32_inc(&tbl->refcnt);
6677                 return tbl;
6678         }
6679         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6680         if (!tbl_data) {
6681                 rte_flow_error_set(error, ENOMEM,
6682                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6683                                    NULL,
6684                                    "cannot allocate flow table data entry");
6685                 return NULL;
6686         }
6687         tbl = &tbl_data->tbl;
6688         pos = &tbl_data->entry;
6689         if (transfer)
6690                 domain = sh->fdb_domain;
6691         else if (egress)
6692                 domain = sh->tx_domain;
6693         else
6694                 domain = sh->rx_domain;
6695         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6696         if (!tbl->obj) {
6697                 rte_flow_error_set(error, ENOMEM,
6698                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6699                                    NULL, "cannot create flow table object");
6700                 rte_free(tbl_data);
6701                 return NULL;
6702         }
6703         /*
6704          * No multi-threads now, but still better to initialize the reference
6705          * count before insert it into the hash list.
6706          */
6707         rte_atomic32_init(&tbl->refcnt);
6708         /* Jump action reference count is initialized here. */
6709         rte_atomic32_init(&tbl_data->jump.refcnt);
6710         pos->key = table_key.v64;
6711         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6712         if (ret < 0) {
6713                 rte_flow_error_set(error, -ret,
6714                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6715                                    "cannot insert flow table data entry");
6716                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6717                 rte_free(tbl_data);
6718         }
6719         rte_atomic32_inc(&tbl->refcnt);
6720         return tbl;
6721 }
6722
6723 /**
6724  * Release a flow table.
6725  *
6726  * @param[in] dev
6727  *   Pointer to rte_eth_dev structure.
6728  * @param[in] tbl
6729  *   Table resource to be released.
6730  *
6731  * @return
6732  *   Returns 0 if table was released, else return 1;
6733  */
6734 static int
6735 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6736                              struct mlx5_flow_tbl_resource *tbl)
6737 {
6738         struct mlx5_priv *priv = dev->data->dev_private;
6739         struct mlx5_ibv_shared *sh = priv->sh;
6740         struct mlx5_flow_tbl_data_entry *tbl_data =
6741                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6742
6743         if (!tbl)
6744                 return 0;
6745         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6746                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6747
6748                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6749                 tbl->obj = NULL;
6750                 /* remove the entry from the hash list and free memory. */
6751                 mlx5_hlist_remove(sh->flow_tbls, pos);
6752                 rte_free(tbl_data);
6753                 return 0;
6754         }
6755         return 1;
6756 }
6757
6758 /**
6759  * Register the flow matcher.
6760  *
6761  * @param[in, out] dev
6762  *   Pointer to rte_eth_dev structure.
6763  * @param[in, out] matcher
6764  *   Pointer to flow matcher.
6765  * @param[in, out] key
6766  *   Pointer to flow table key.
6767  * @parm[in, out] dev_flow
6768  *   Pointer to the dev_flow.
6769  * @param[out] error
6770  *   pointer to error structure.
6771  *
6772  * @return
6773  *   0 on success otherwise -errno and errno is set.
6774  */
6775 static int
6776 flow_dv_matcher_register(struct rte_eth_dev *dev,
6777                          struct mlx5_flow_dv_matcher *matcher,
6778                          union mlx5_flow_tbl_key *key,
6779                          struct mlx5_flow *dev_flow,
6780                          struct rte_flow_error *error)
6781 {
6782         struct mlx5_priv *priv = dev->data->dev_private;
6783         struct mlx5_ibv_shared *sh = priv->sh;
6784         struct mlx5_flow_dv_matcher *cache_matcher;
6785         struct mlx5dv_flow_matcher_attr dv_attr = {
6786                 .type = IBV_FLOW_ATTR_NORMAL,
6787                 .match_mask = (void *)&matcher->mask,
6788         };
6789         struct mlx5_flow_tbl_resource *tbl;
6790         struct mlx5_flow_tbl_data_entry *tbl_data;
6791
6792         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6793                                        key->domain, error);
6794         if (!tbl)
6795                 return -rte_errno;      /* No need to refill the error info */
6796         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6797         /* Lookup from cache. */
6798         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6799                 if (matcher->crc == cache_matcher->crc &&
6800                     matcher->priority == cache_matcher->priority &&
6801                     !memcmp((const void *)matcher->mask.buf,
6802                             (const void *)cache_matcher->mask.buf,
6803                             cache_matcher->mask.size)) {
6804                         DRV_LOG(DEBUG,
6805                                 "%s group %u priority %hd use %s "
6806                                 "matcher %p: refcnt %d++",
6807                                 key->domain ? "FDB" : "NIC", key->table_id,
6808                                 cache_matcher->priority,
6809                                 key->direction ? "tx" : "rx",
6810                                 (void *)cache_matcher,
6811                                 rte_atomic32_read(&cache_matcher->refcnt));
6812                         rte_atomic32_inc(&cache_matcher->refcnt);
6813                         dev_flow->dv.matcher = cache_matcher;
6814                         /* old matcher should not make the table ref++. */
6815                         flow_dv_tbl_resource_release(dev, tbl);
6816                         return 0;
6817                 }
6818         }
6819         /* Register new matcher. */
6820         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6821         if (!cache_matcher) {
6822                 flow_dv_tbl_resource_release(dev, tbl);
6823                 return rte_flow_error_set(error, ENOMEM,
6824                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6825                                           "cannot allocate matcher memory");
6826         }
6827         *cache_matcher = *matcher;
6828         dv_attr.match_criteria_enable =
6829                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6830         dv_attr.priority = matcher->priority;
6831         if (key->direction)
6832                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6833         cache_matcher->matcher_object =
6834                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6835         if (!cache_matcher->matcher_object) {
6836                 rte_free(cache_matcher);
6837 #ifdef HAVE_MLX5DV_DR
6838                 flow_dv_tbl_resource_release(dev, tbl);
6839 #endif
6840                 return rte_flow_error_set(error, ENOMEM,
6841                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6842                                           NULL, "cannot create matcher");
6843         }
6844         /* Save the table information */
6845         cache_matcher->tbl = tbl;
6846         rte_atomic32_init(&cache_matcher->refcnt);
6847         /* only matcher ref++, table ref++ already done above in get API. */
6848         rte_atomic32_inc(&cache_matcher->refcnt);
6849         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6850         dev_flow->dv.matcher = cache_matcher;
6851         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6852                 key->domain ? "FDB" : "NIC", key->table_id,
6853                 cache_matcher->priority,
6854                 key->direction ? "tx" : "rx", (void *)cache_matcher,
6855                 rte_atomic32_read(&cache_matcher->refcnt));
6856         return 0;
6857 }
6858
6859 /**
6860  * Find existing tag resource or create and register a new one.
6861  *
6862  * @param dev[in, out]
6863  *   Pointer to rte_eth_dev structure.
6864  * @param[in, out] tag_be24
6865  *   Tag value in big endian then R-shift 8.
6866  * @parm[in, out] dev_flow
6867  *   Pointer to the dev_flow.
6868  * @param[out] error
6869  *   pointer to error structure.
6870  *
6871  * @return
6872  *   0 on success otherwise -errno and errno is set.
6873  */
6874 static int
6875 flow_dv_tag_resource_register
6876                         (struct rte_eth_dev *dev,
6877                          uint32_t tag_be24,
6878                          struct mlx5_flow *dev_flow,
6879                          struct rte_flow_error *error)
6880 {
6881         struct mlx5_priv *priv = dev->data->dev_private;
6882         struct mlx5_ibv_shared *sh = priv->sh;
6883         struct mlx5_flow_dv_tag_resource *cache_resource;
6884         struct mlx5_hlist_entry *entry;
6885
6886         /* Lookup a matching resource from cache. */
6887         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
6888         if (entry) {
6889                 cache_resource = container_of
6890                         (entry, struct mlx5_flow_dv_tag_resource, entry);
6891                 rte_atomic32_inc(&cache_resource->refcnt);
6892                 dev_flow->dv.tag_resource = cache_resource;
6893                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
6894                         (void *)cache_resource,
6895                         rte_atomic32_read(&cache_resource->refcnt));
6896                 return 0;
6897         }
6898         /* Register new resource. */
6899         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6900         if (!cache_resource)
6901                 return rte_flow_error_set(error, ENOMEM,
6902                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6903                                           "cannot allocate resource memory");
6904         cache_resource->entry.key = (uint64_t)tag_be24;
6905         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
6906         if (!cache_resource->action) {
6907                 rte_free(cache_resource);
6908                 return rte_flow_error_set(error, ENOMEM,
6909                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6910                                           NULL, "cannot create action");
6911         }
6912         rte_atomic32_init(&cache_resource->refcnt);
6913         rte_atomic32_inc(&cache_resource->refcnt);
6914         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
6915                 mlx5_glue->destroy_flow_action(cache_resource->action);
6916                 rte_free(cache_resource);
6917                 return rte_flow_error_set(error, EEXIST,
6918                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6919                                           NULL, "cannot insert tag");
6920         }
6921         dev_flow->dv.tag_resource = cache_resource;
6922         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
6923                 (void *)cache_resource,
6924                 rte_atomic32_read(&cache_resource->refcnt));
6925         return 0;
6926 }
6927
6928 /**
6929  * Release the tag.
6930  *
6931  * @param dev
6932  *   Pointer to Ethernet device.
6933  * @param flow
6934  *   Pointer to mlx5_flow.
6935  *
6936  * @return
6937  *   1 while a reference on it exists, 0 when freed.
6938  */
6939 static int
6940 flow_dv_tag_release(struct rte_eth_dev *dev,
6941                     struct mlx5_flow_dv_tag_resource *tag)
6942 {
6943         struct mlx5_priv *priv = dev->data->dev_private;
6944         struct mlx5_ibv_shared *sh = priv->sh;
6945
6946         MLX5_ASSERT(tag);
6947         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6948                 dev->data->port_id, (void *)tag,
6949                 rte_atomic32_read(&tag->refcnt));
6950         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6951                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6952                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
6953                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6954                         dev->data->port_id, (void *)tag);
6955                 rte_free(tag);
6956                 return 0;
6957         }
6958         return 1;
6959 }
6960
6961 /**
6962  * Translate port ID action to vport.
6963  *
6964  * @param[in] dev
6965  *   Pointer to rte_eth_dev structure.
6966  * @param[in] action
6967  *   Pointer to the port ID action.
6968  * @param[out] dst_port_id
6969  *   The target port ID.
6970  * @param[out] error
6971  *   Pointer to the error structure.
6972  *
6973  * @return
6974  *   0 on success, a negative errno value otherwise and rte_errno is set.
6975  */
6976 static int
6977 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6978                                  const struct rte_flow_action *action,
6979                                  uint32_t *dst_port_id,
6980                                  struct rte_flow_error *error)
6981 {
6982         uint32_t port;
6983         struct mlx5_priv *priv;
6984         const struct rte_flow_action_port_id *conf =
6985                         (const struct rte_flow_action_port_id *)action->conf;
6986
6987         port = conf->original ? dev->data->port_id : conf->id;
6988         priv = mlx5_port_to_eswitch_info(port, false);
6989         if (!priv)
6990                 return rte_flow_error_set(error, -rte_errno,
6991                                           RTE_FLOW_ERROR_TYPE_ACTION,
6992                                           NULL,
6993                                           "No eswitch info was found for port");
6994 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
6995         /*
6996          * This parameter is transferred to
6997          * mlx5dv_dr_action_create_dest_ib_port().
6998          */
6999         *dst_port_id = priv->ibv_port;
7000 #else
7001         /*
7002          * Legacy mode, no LAG configurations is supported.
7003          * This parameter is transferred to
7004          * mlx5dv_dr_action_create_dest_vport().
7005          */
7006         *dst_port_id = priv->vport_id;
7007 #endif
7008         return 0;
7009 }
7010
7011 /**
7012  * Add Tx queue matcher
7013  *
7014  * @param[in] dev
7015  *   Pointer to the dev struct.
7016  * @param[in, out] matcher
7017  *   Flow matcher.
7018  * @param[in, out] key
7019  *   Flow matcher value.
7020  * @param[in] item
7021  *   Flow pattern to translate.
7022  * @param[in] inner
7023  *   Item is inner pattern.
7024  */
7025 static void
7026 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
7027                                 void *matcher, void *key,
7028                                 const struct rte_flow_item *item)
7029 {
7030         const struct mlx5_rte_flow_item_tx_queue *queue_m;
7031         const struct mlx5_rte_flow_item_tx_queue *queue_v;
7032         void *misc_m =
7033                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7034         void *misc_v =
7035                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7036         struct mlx5_txq_ctrl *txq;
7037         uint32_t queue;
7038
7039
7040         queue_m = (const void *)item->mask;
7041         if (!queue_m)
7042                 return;
7043         queue_v = (const void *)item->spec;
7044         if (!queue_v)
7045                 return;
7046         txq = mlx5_txq_get(dev, queue_v->queue);
7047         if (!txq)
7048                 return;
7049         queue = txq->obj->sq->id;
7050         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
7051         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
7052                  queue & queue_m->queue);
7053         mlx5_txq_release(dev, queue_v->queue);
7054 }
7055
7056 /**
7057  * Set the hash fields according to the @p flow information.
7058  *
7059  * @param[in] dev_flow
7060  *   Pointer to the mlx5_flow.
7061  */
7062 static void
7063 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
7064 {
7065         struct rte_flow *flow = dev_flow->flow;
7066         uint64_t items = dev_flow->layers;
7067         int rss_inner = 0;
7068         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
7069
7070         dev_flow->hash_fields = 0;
7071 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
7072         if (flow->rss.level >= 2) {
7073                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
7074                 rss_inner = 1;
7075         }
7076 #endif
7077         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
7078             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
7079                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
7080                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7081                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
7082                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7083                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
7084                         else
7085                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
7086                 }
7087         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
7088                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
7089                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
7090                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7091                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
7092                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7093                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
7094                         else
7095                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
7096                 }
7097         }
7098         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
7099             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
7100                 if (rss_types & ETH_RSS_UDP) {
7101                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7102                                 dev_flow->hash_fields |=
7103                                                 IBV_RX_HASH_SRC_PORT_UDP;
7104                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7105                                 dev_flow->hash_fields |=
7106                                                 IBV_RX_HASH_DST_PORT_UDP;
7107                         else
7108                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
7109                 }
7110         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
7111                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
7112                 if (rss_types & ETH_RSS_TCP) {
7113                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7114                                 dev_flow->hash_fields |=
7115                                                 IBV_RX_HASH_SRC_PORT_TCP;
7116                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7117                                 dev_flow->hash_fields |=
7118                                                 IBV_RX_HASH_DST_PORT_TCP;
7119                         else
7120                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
7121                 }
7122         }
7123 }
7124
7125 /**
7126  * Fill the flow with DV spec, lock free
7127  * (mutex should be acquired by caller).
7128  *
7129  * @param[in] dev
7130  *   Pointer to rte_eth_dev structure.
7131  * @param[in, out] dev_flow
7132  *   Pointer to the sub flow.
7133  * @param[in] attr
7134  *   Pointer to the flow attributes.
7135  * @param[in] items
7136  *   Pointer to the list of items.
7137  * @param[in] actions
7138  *   Pointer to the list of actions.
7139  * @param[out] error
7140  *   Pointer to the error structure.
7141  *
7142  * @return
7143  *   0 on success, a negative errno value otherwise and rte_errno is set.
7144  */
7145 static int
7146 __flow_dv_translate(struct rte_eth_dev *dev,
7147                     struct mlx5_flow *dev_flow,
7148                     const struct rte_flow_attr *attr,
7149                     const struct rte_flow_item items[],
7150                     const struct rte_flow_action actions[],
7151                     struct rte_flow_error *error)
7152 {
7153         struct mlx5_priv *priv = dev->data->dev_private;
7154         struct mlx5_dev_config *dev_conf = &priv->config;
7155         struct rte_flow *flow = dev_flow->flow;
7156         uint64_t item_flags = 0;
7157         uint64_t last_item = 0;
7158         uint64_t action_flags = 0;
7159         uint64_t priority = attr->priority;
7160         struct mlx5_flow_dv_matcher matcher = {
7161                 .mask = {
7162                         .size = sizeof(matcher.mask.buf),
7163                 },
7164         };
7165         int actions_n = 0;
7166         bool actions_end = false;
7167         union {
7168                 struct mlx5_flow_dv_modify_hdr_resource res;
7169                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7170                             sizeof(struct mlx5_modification_cmd) *
7171                             (MLX5_MAX_MODIFY_NUM + 1)];
7172         } mhdr_dummy;
7173         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7174         union flow_dv_attr flow_attr = { .attr = 0 };
7175         uint32_t tag_be;
7176         union mlx5_flow_tbl_key tbl_key;
7177         uint32_t modify_action_position = UINT32_MAX;
7178         void *match_mask = matcher.mask.buf;
7179         void *match_value = dev_flow->dv.value.buf;
7180         uint8_t next_protocol = 0xff;
7181         struct rte_vlan_hdr vlan = { 0 };
7182         uint32_t table;
7183         int ret = 0;
7184
7185         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7186                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7187         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7188                                        !!priv->fdb_def_rule, &table, error);
7189         if (ret)
7190                 return ret;
7191         dev_flow->group = table;
7192         if (attr->transfer)
7193                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7194         if (priority == MLX5_FLOW_PRIO_RSVD)
7195                 priority = dev_conf->flow_prio - 1;
7196         /* number of actions must be set to 0 in case of dirty stack. */
7197         mhdr_res->actions_num = 0;
7198         for (; !actions_end ; actions++) {
7199                 const struct rte_flow_action_queue *queue;
7200                 const struct rte_flow_action_rss *rss;
7201                 const struct rte_flow_action *action = actions;
7202                 const struct rte_flow_action_count *count = action->conf;
7203                 const uint8_t *rss_key;
7204                 const struct rte_flow_action_jump *jump_data;
7205                 const struct rte_flow_action_meter *mtr;
7206                 struct mlx5_flow_tbl_resource *tbl;
7207                 uint32_t port_id = 0;
7208                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7209                 int action_type = actions->type;
7210                 const struct rte_flow_action *found_action = NULL;
7211
7212                 switch (action_type) {
7213                 case RTE_FLOW_ACTION_TYPE_VOID:
7214                         break;
7215                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7216                         if (flow_dv_translate_action_port_id(dev, action,
7217                                                              &port_id, error))
7218                                 return -rte_errno;
7219                         port_id_resource.port_id = port_id;
7220                         if (flow_dv_port_id_action_resource_register
7221                             (dev, &port_id_resource, dev_flow, error))
7222                                 return -rte_errno;
7223                         dev_flow->dv.actions[actions_n++] =
7224                                 dev_flow->dv.port_id_action->action;
7225                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7226                         break;
7227                 case RTE_FLOW_ACTION_TYPE_FLAG:
7228                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7229                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7230                                 struct rte_flow_action_mark mark = {
7231                                         .id = MLX5_FLOW_MARK_DEFAULT,
7232                                 };
7233
7234                                 if (flow_dv_convert_action_mark(dev, &mark,
7235                                                                 mhdr_res,
7236                                                                 error))
7237                                         return -rte_errno;
7238                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7239                                 break;
7240                         }
7241                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7242                         if (!dev_flow->dv.tag_resource)
7243                                 if (flow_dv_tag_resource_register
7244                                     (dev, tag_be, dev_flow, error))
7245                                         return -rte_errno;
7246                         dev_flow->dv.actions[actions_n++] =
7247                                 dev_flow->dv.tag_resource->action;
7248                         break;
7249                 case RTE_FLOW_ACTION_TYPE_MARK:
7250                         action_flags |= MLX5_FLOW_ACTION_MARK;
7251                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7252                                 const struct rte_flow_action_mark *mark =
7253                                         (const struct rte_flow_action_mark *)
7254                                                 actions->conf;
7255
7256                                 if (flow_dv_convert_action_mark(dev, mark,
7257                                                                 mhdr_res,
7258                                                                 error))
7259                                         return -rte_errno;
7260                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7261                                 break;
7262                         }
7263                         /* Fall-through */
7264                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7265                         /* Legacy (non-extensive) MARK action. */
7266                         tag_be = mlx5_flow_mark_set
7267                               (((const struct rte_flow_action_mark *)
7268                                (actions->conf))->id);
7269                         if (!dev_flow->dv.tag_resource)
7270                                 if (flow_dv_tag_resource_register
7271                                     (dev, tag_be, dev_flow, error))
7272                                         return -rte_errno;
7273                         dev_flow->dv.actions[actions_n++] =
7274                                 dev_flow->dv.tag_resource->action;
7275                         break;
7276                 case RTE_FLOW_ACTION_TYPE_SET_META:
7277                         if (flow_dv_convert_action_set_meta
7278                                 (dev, mhdr_res, attr,
7279                                  (const struct rte_flow_action_set_meta *)
7280                                   actions->conf, error))
7281                                 return -rte_errno;
7282                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7283                         break;
7284                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7285                         if (flow_dv_convert_action_set_tag
7286                                 (dev, mhdr_res,
7287                                  (const struct rte_flow_action_set_tag *)
7288                                   actions->conf, error))
7289                                 return -rte_errno;
7290                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7291                         break;
7292                 case RTE_FLOW_ACTION_TYPE_DROP:
7293                         action_flags |= MLX5_FLOW_ACTION_DROP;
7294                         break;
7295                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7296                         MLX5_ASSERT(flow->rss.queue);
7297                         queue = actions->conf;
7298                         flow->rss.queue_num = 1;
7299                         (*flow->rss.queue)[0] = queue->index;
7300                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7301                         break;
7302                 case RTE_FLOW_ACTION_TYPE_RSS:
7303                         MLX5_ASSERT(flow->rss.queue);
7304                         rss = actions->conf;
7305                         if (flow->rss.queue)
7306                                 memcpy((*flow->rss.queue), rss->queue,
7307                                        rss->queue_num * sizeof(uint16_t));
7308                         flow->rss.queue_num = rss->queue_num;
7309                         /* NULL RSS key indicates default RSS key. */
7310                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7311                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7312                         /*
7313                          * rss->level and rss.types should be set in advance
7314                          * when expanding items for RSS.
7315                          */
7316                         action_flags |= MLX5_FLOW_ACTION_RSS;
7317                         break;
7318                 case RTE_FLOW_ACTION_TYPE_COUNT:
7319                         if (!dev_conf->devx) {
7320                                 rte_errno = ENOTSUP;
7321                                 goto cnt_err;
7322                         }
7323                         flow->counter = flow_dv_counter_alloc(dev,
7324                                                               count->shared,
7325                                                               count->id,
7326                                                               dev_flow->group);
7327                         if (flow->counter == NULL)
7328                                 goto cnt_err;
7329                         dev_flow->dv.actions[actions_n++] =
7330                                 flow->counter->action;
7331                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7332                         break;
7333 cnt_err:
7334                         if (rte_errno == ENOTSUP)
7335                                 return rte_flow_error_set
7336                                               (error, ENOTSUP,
7337                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7338                                                NULL,
7339                                                "count action not supported");
7340                         else
7341                                 return rte_flow_error_set
7342                                                 (error, rte_errno,
7343                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7344                                                  action,
7345                                                  "cannot create counter"
7346                                                   " object.");
7347                         break;
7348                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7349                         dev_flow->dv.actions[actions_n++] =
7350                                                 priv->sh->pop_vlan_action;
7351                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7352                         break;
7353                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7354                         flow_dev_get_vlan_info_from_items(items, &vlan);
7355                         vlan.eth_proto = rte_be_to_cpu_16
7356                              ((((const struct rte_flow_action_of_push_vlan *)
7357                                                    actions->conf)->ethertype));
7358                         found_action = mlx5_flow_find_action
7359                                         (actions + 1,
7360                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7361                         if (found_action)
7362                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7363                         found_action = mlx5_flow_find_action
7364                                         (actions + 1,
7365                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7366                         if (found_action)
7367                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7368                         if (flow_dv_create_action_push_vlan
7369                                             (dev, attr, &vlan, dev_flow, error))
7370                                 return -rte_errno;
7371                         dev_flow->dv.actions[actions_n++] =
7372                                            dev_flow->dv.push_vlan_res->action;
7373                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7374                         break;
7375                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7376                         /* of_vlan_push action handled this action */
7377                         MLX5_ASSERT(action_flags &
7378                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7379                         break;
7380                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7381                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7382                                 break;
7383                         flow_dev_get_vlan_info_from_items(items, &vlan);
7384                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7385                         /* If no VLAN push - this is a modify header action */
7386                         if (flow_dv_convert_action_modify_vlan_vid
7387                                                 (mhdr_res, actions, error))
7388                                 return -rte_errno;
7389                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7390                         break;
7391                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7392                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7393                         if (flow_dv_create_action_l2_encap(dev, actions,
7394                                                            dev_flow,
7395                                                            attr->transfer,
7396                                                            error))
7397                                 return -rte_errno;
7398                         dev_flow->dv.actions[actions_n++] =
7399                                 dev_flow->dv.encap_decap->verbs_action;
7400                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7401                         break;
7402                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7403                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7404                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7405                                                            attr->transfer,
7406                                                            error))
7407                                 return -rte_errno;
7408                         dev_flow->dv.actions[actions_n++] =
7409                                 dev_flow->dv.encap_decap->verbs_action;
7410                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7411                         break;
7412                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7413                         /* Handle encap with preceding decap. */
7414                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
7415                                 if (flow_dv_create_action_raw_encap
7416                                         (dev, actions, dev_flow, attr, error))
7417                                         return -rte_errno;
7418                                 dev_flow->dv.actions[actions_n++] =
7419                                         dev_flow->dv.encap_decap->verbs_action;
7420                         } else {
7421                                 /* Handle encap without preceding decap. */
7422                                 if (flow_dv_create_action_l2_encap
7423                                     (dev, actions, dev_flow, attr->transfer,
7424                                      error))
7425                                         return -rte_errno;
7426                                 dev_flow->dv.actions[actions_n++] =
7427                                         dev_flow->dv.encap_decap->verbs_action;
7428                         }
7429                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7430                         break;
7431                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7432                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
7433                                 ;
7434                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7435                                 if (flow_dv_create_action_l2_decap
7436                                     (dev, dev_flow, attr->transfer, error))
7437                                         return -rte_errno;
7438                                 dev_flow->dv.actions[actions_n++] =
7439                                         dev_flow->dv.encap_decap->verbs_action;
7440                         }
7441                         /* If decap is followed by encap, handle it at encap. */
7442                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7443                         break;
7444                 case RTE_FLOW_ACTION_TYPE_JUMP:
7445                         jump_data = action->conf;
7446                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7447                                                        jump_data->group,
7448                                                        !!priv->fdb_def_rule,
7449                                                        &table, error);
7450                         if (ret)
7451                                 return ret;
7452                         tbl = flow_dv_tbl_resource_get(dev, table,
7453                                                        attr->egress,
7454                                                        attr->transfer, error);
7455                         if (!tbl)
7456                                 return rte_flow_error_set
7457                                                 (error, errno,
7458                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7459                                                  NULL,
7460                                                  "cannot create jump action.");
7461                         if (flow_dv_jump_tbl_resource_register
7462                             (dev, tbl, dev_flow, error)) {
7463                                 flow_dv_tbl_resource_release(dev, tbl);
7464                                 return rte_flow_error_set
7465                                                 (error, errno,
7466                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7467                                                  NULL,
7468                                                  "cannot create jump action.");
7469                         }
7470                         dev_flow->dv.actions[actions_n++] =
7471                                 dev_flow->dv.jump->action;
7472                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7473                         break;
7474                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7475                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7476                         if (flow_dv_convert_action_modify_mac
7477                                         (mhdr_res, actions, error))
7478                                 return -rte_errno;
7479                         action_flags |= actions->type ==
7480                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7481                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7482                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7483                         break;
7484                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7485                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7486                         if (flow_dv_convert_action_modify_ipv4
7487                                         (mhdr_res, actions, error))
7488                                 return -rte_errno;
7489                         action_flags |= actions->type ==
7490                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7491                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7492                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7493                         break;
7494                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7495                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7496                         if (flow_dv_convert_action_modify_ipv6
7497                                         (mhdr_res, actions, error))
7498                                 return -rte_errno;
7499                         action_flags |= actions->type ==
7500                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7501                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7502                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7503                         break;
7504                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7505                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7506                         if (flow_dv_convert_action_modify_tp
7507                                         (mhdr_res, actions, items,
7508                                          &flow_attr, !!(action_flags &
7509                                          MLX5_FLOW_ACTION_DECAP), error))
7510                                 return -rte_errno;
7511                         action_flags |= actions->type ==
7512                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7513                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7514                                         MLX5_FLOW_ACTION_SET_TP_DST;
7515                         break;
7516                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7517                         if (flow_dv_convert_action_modify_dec_ttl
7518                                         (mhdr_res, items, &flow_attr,
7519                                          !!(action_flags &
7520                                          MLX5_FLOW_ACTION_DECAP), error))
7521                                 return -rte_errno;
7522                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7523                         break;
7524                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7525                         if (flow_dv_convert_action_modify_ttl
7526                                         (mhdr_res, actions, items, &flow_attr,
7527                                          !!(action_flags &
7528                                          MLX5_FLOW_ACTION_DECAP), error))
7529                                 return -rte_errno;
7530                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7531                         break;
7532                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7533                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7534                         if (flow_dv_convert_action_modify_tcp_seq
7535                                         (mhdr_res, actions, error))
7536                                 return -rte_errno;
7537                         action_flags |= actions->type ==
7538                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7539                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7540                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7541                         break;
7542
7543                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7544                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7545                         if (flow_dv_convert_action_modify_tcp_ack
7546                                         (mhdr_res, actions, error))
7547                                 return -rte_errno;
7548                         action_flags |= actions->type ==
7549                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7550                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7551                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7552                         break;
7553                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7554                         if (flow_dv_convert_action_set_reg
7555                                         (mhdr_res, actions, error))
7556                                 return -rte_errno;
7557                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7558                         break;
7559                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7560                         if (flow_dv_convert_action_copy_mreg
7561                                         (dev, mhdr_res, actions, error))
7562                                 return -rte_errno;
7563                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7564                         break;
7565                 case RTE_FLOW_ACTION_TYPE_METER:
7566                         mtr = actions->conf;
7567                         if (!flow->meter) {
7568                                 flow->meter = mlx5_flow_meter_attach(priv,
7569                                                         mtr->mtr_id, attr,
7570                                                         error);
7571                                 if (!flow->meter)
7572                                         return rte_flow_error_set(error,
7573                                                 rte_errno,
7574                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7575                                                 NULL,
7576                                                 "meter not found "
7577                                                 "or invalid parameters");
7578                         }
7579                         /* Set the meter action. */
7580                         dev_flow->dv.actions[actions_n++] =
7581                                 flow->meter->mfts->meter_action;
7582                         action_flags |= MLX5_FLOW_ACTION_METER;
7583                         break;
7584                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7585                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7586                                                               actions, error))
7587                                 return -rte_errno;
7588                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7589                         break;
7590                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7591                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7592                                                               actions, error))
7593                                 return -rte_errno;
7594                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7595                         break;
7596                 case RTE_FLOW_ACTION_TYPE_END:
7597                         actions_end = true;
7598                         if (mhdr_res->actions_num) {
7599                                 /* create modify action if needed. */
7600                                 if (flow_dv_modify_hdr_resource_register
7601                                         (dev, mhdr_res, dev_flow, error))
7602                                         return -rte_errno;
7603                                 dev_flow->dv.actions[modify_action_position] =
7604                                         dev_flow->dv.modify_hdr->verbs_action;
7605                         }
7606                         break;
7607                 default:
7608                         break;
7609                 }
7610                 if (mhdr_res->actions_num &&
7611                     modify_action_position == UINT32_MAX)
7612                         modify_action_position = actions_n++;
7613         }
7614         dev_flow->dv.actions_n = actions_n;
7615         dev_flow->actions = action_flags;
7616         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7617                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7618                 int item_type = items->type;
7619
7620                 switch (item_type) {
7621                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7622                         flow_dv_translate_item_port_id(dev, match_mask,
7623                                                        match_value, items);
7624                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7625                         break;
7626                 case RTE_FLOW_ITEM_TYPE_ETH:
7627                         flow_dv_translate_item_eth(match_mask, match_value,
7628                                                    items, tunnel);
7629                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7630                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7631                                              MLX5_FLOW_LAYER_OUTER_L2;
7632                         break;
7633                 case RTE_FLOW_ITEM_TYPE_VLAN:
7634                         flow_dv_translate_item_vlan(dev_flow,
7635                                                     match_mask, match_value,
7636                                                     items, tunnel);
7637                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7638                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7639                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7640                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7641                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7642                         break;
7643                 case RTE_FLOW_ITEM_TYPE_IPV4:
7644                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7645                                                   &item_flags, &tunnel);
7646                         flow_dv_translate_item_ipv4(match_mask, match_value,
7647                                                     items, tunnel,
7648                                                     dev_flow->group);
7649                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7650                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7651                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7652                         if (items->mask != NULL &&
7653                             ((const struct rte_flow_item_ipv4 *)
7654                              items->mask)->hdr.next_proto_id) {
7655                                 next_protocol =
7656                                         ((const struct rte_flow_item_ipv4 *)
7657                                          (items->spec))->hdr.next_proto_id;
7658                                 next_protocol &=
7659                                         ((const struct rte_flow_item_ipv4 *)
7660                                          (items->mask))->hdr.next_proto_id;
7661                         } else {
7662                                 /* Reset for inner layer. */
7663                                 next_protocol = 0xff;
7664                         }
7665                         break;
7666                 case RTE_FLOW_ITEM_TYPE_IPV6:
7667                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7668                                                   &item_flags, &tunnel);
7669                         flow_dv_translate_item_ipv6(match_mask, match_value,
7670                                                     items, tunnel,
7671                                                     dev_flow->group);
7672                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7673                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7674                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7675                         if (items->mask != NULL &&
7676                             ((const struct rte_flow_item_ipv6 *)
7677                              items->mask)->hdr.proto) {
7678                                 next_protocol =
7679                                         ((const struct rte_flow_item_ipv6 *)
7680                                          items->spec)->hdr.proto;
7681                                 next_protocol &=
7682                                         ((const struct rte_flow_item_ipv6 *)
7683                                          items->mask)->hdr.proto;
7684                         } else {
7685                                 /* Reset for inner layer. */
7686                                 next_protocol = 0xff;
7687                         }
7688                         break;
7689                 case RTE_FLOW_ITEM_TYPE_TCP:
7690                         flow_dv_translate_item_tcp(match_mask, match_value,
7691                                                    items, tunnel);
7692                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7693                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7694                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7695                         break;
7696                 case RTE_FLOW_ITEM_TYPE_UDP:
7697                         flow_dv_translate_item_udp(match_mask, match_value,
7698                                                    items, tunnel);
7699                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7700                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7701                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7702                         break;
7703                 case RTE_FLOW_ITEM_TYPE_GRE:
7704                         flow_dv_translate_item_gre(match_mask, match_value,
7705                                                    items, tunnel);
7706                         matcher.priority = flow->rss.level >= 2 ?
7707                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7708                         last_item = MLX5_FLOW_LAYER_GRE;
7709                         break;
7710                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7711                         flow_dv_translate_item_gre_key(match_mask,
7712                                                        match_value, items);
7713                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7714                         break;
7715                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7716                         flow_dv_translate_item_nvgre(match_mask, match_value,
7717                                                      items, tunnel);
7718                         matcher.priority = flow->rss.level >= 2 ?
7719                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7720                         last_item = MLX5_FLOW_LAYER_GRE;
7721                         break;
7722                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7723                         flow_dv_translate_item_vxlan(match_mask, match_value,
7724                                                      items, tunnel);
7725                         matcher.priority = flow->rss.level >= 2 ?
7726                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7727                         last_item = MLX5_FLOW_LAYER_VXLAN;
7728                         break;
7729                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7730                         flow_dv_translate_item_vxlan_gpe(match_mask,
7731                                                          match_value, items,
7732                                                          tunnel);
7733                         matcher.priority = flow->rss.level >= 2 ?
7734                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7735                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7736                         break;
7737                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7738                         flow_dv_translate_item_geneve(match_mask, match_value,
7739                                                       items, tunnel);
7740                         matcher.priority = flow->rss.level >= 2 ?
7741                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7742                         last_item = MLX5_FLOW_LAYER_GENEVE;
7743                         break;
7744                 case RTE_FLOW_ITEM_TYPE_MPLS:
7745                         flow_dv_translate_item_mpls(match_mask, match_value,
7746                                                     items, last_item, tunnel);
7747                         matcher.priority = flow->rss.level >= 2 ?
7748                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7749                         last_item = MLX5_FLOW_LAYER_MPLS;
7750                         break;
7751                 case RTE_FLOW_ITEM_TYPE_MARK:
7752                         flow_dv_translate_item_mark(dev, match_mask,
7753                                                     match_value, items);
7754                         last_item = MLX5_FLOW_ITEM_MARK;
7755                         break;
7756                 case RTE_FLOW_ITEM_TYPE_META:
7757                         flow_dv_translate_item_meta(dev, match_mask,
7758                                                     match_value, attr, items);
7759                         last_item = MLX5_FLOW_ITEM_METADATA;
7760                         break;
7761                 case RTE_FLOW_ITEM_TYPE_ICMP:
7762                         flow_dv_translate_item_icmp(match_mask, match_value,
7763                                                     items, tunnel);
7764                         last_item = MLX5_FLOW_LAYER_ICMP;
7765                         break;
7766                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7767                         flow_dv_translate_item_icmp6(match_mask, match_value,
7768                                                       items, tunnel);
7769                         last_item = MLX5_FLOW_LAYER_ICMP6;
7770                         break;
7771                 case RTE_FLOW_ITEM_TYPE_TAG:
7772                         flow_dv_translate_item_tag(dev, match_mask,
7773                                                    match_value, items);
7774                         last_item = MLX5_FLOW_ITEM_TAG;
7775                         break;
7776                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7777                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7778                                                         match_value, items);
7779                         last_item = MLX5_FLOW_ITEM_TAG;
7780                         break;
7781                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7782                         flow_dv_translate_item_tx_queue(dev, match_mask,
7783                                                         match_value,
7784                                                         items);
7785                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7786                         break;
7787                 case RTE_FLOW_ITEM_TYPE_GTP:
7788                         flow_dv_translate_item_gtp(match_mask, match_value,
7789                                                    items, tunnel);
7790                         matcher.priority = flow->rss.level >= 2 ?
7791                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7792                         last_item = MLX5_FLOW_LAYER_GTP;
7793                         break;
7794                 default:
7795                         break;
7796                 }
7797                 item_flags |= last_item;
7798         }
7799         /*
7800          * When E-Switch mode is enabled, we have two cases where we need to
7801          * set the source port manually.
7802          * The first one, is in case of Nic steering rule, and the second is
7803          * E-Switch rule where no port_id item was found. In both cases
7804          * the source port is set according the current port in use.
7805          */
7806         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
7807             (priv->representor || priv->master)) {
7808                 if (flow_dv_translate_item_port_id(dev, match_mask,
7809                                                    match_value, NULL))
7810                         return -rte_errno;
7811         }
7812 #ifdef RTE_LIBRTE_MLX5_DEBUG
7813         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
7814                                               dev_flow->dv.value.buf));
7815 #endif
7816         /*
7817          * Layers may be already initialized from prefix flow if this dev_flow
7818          * is the suffix flow.
7819          */
7820         dev_flow->layers |= item_flags;
7821         if (action_flags & MLX5_FLOW_ACTION_RSS)
7822                 flow_dv_hashfields_set(dev_flow);
7823         /* Register matcher. */
7824         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7825                                     matcher.mask.size);
7826         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7827                                                      matcher.priority);
7828         /* reserved field no needs to be set to 0 here. */
7829         tbl_key.domain = attr->transfer;
7830         tbl_key.direction = attr->egress;
7831         tbl_key.table_id = dev_flow->group;
7832         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7833                 return -rte_errno;
7834         return 0;
7835 }
7836
7837 /**
7838  * Apply the flow to the NIC, lock free,
7839  * (mutex should be acquired by caller).
7840  *
7841  * @param[in] dev
7842  *   Pointer to the Ethernet device structure.
7843  * @param[in, out] flow
7844  *   Pointer to flow structure.
7845  * @param[out] error
7846  *   Pointer to error structure.
7847  *
7848  * @return
7849  *   0 on success, a negative errno value otherwise and rte_errno is set.
7850  */
7851 static int
7852 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7853                 struct rte_flow_error *error)
7854 {
7855         struct mlx5_flow_dv *dv;
7856         struct mlx5_flow *dev_flow;
7857         struct mlx5_priv *priv = dev->data->dev_private;
7858         int n;
7859         int err;
7860
7861         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7862                 dv = &dev_flow->dv;
7863                 n = dv->actions_n;
7864                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7865                         if (dev_flow->transfer) {
7866                                 dv->actions[n++] = priv->sh->esw_drop_action;
7867                         } else {
7868                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7869                                 if (!dv->hrxq) {
7870                                         rte_flow_error_set
7871                                                 (error, errno,
7872                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7873                                                  NULL,
7874                                                  "cannot get drop hash queue");
7875                                         goto error;
7876                                 }
7877                                 dv->actions[n++] = dv->hrxq->action;
7878                         }
7879                 } else if (dev_flow->actions &
7880                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7881                         struct mlx5_hrxq *hrxq;
7882
7883                         MLX5_ASSERT(flow->rss.queue);
7884                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7885                                              MLX5_RSS_HASH_KEY_LEN,
7886                                              dev_flow->hash_fields,
7887                                              (*flow->rss.queue),
7888                                              flow->rss.queue_num);
7889                         if (!hrxq) {
7890                                 hrxq = mlx5_hrxq_new
7891                                         (dev, flow->rss.key,
7892                                          MLX5_RSS_HASH_KEY_LEN,
7893                                          dev_flow->hash_fields,
7894                                          (*flow->rss.queue),
7895                                          flow->rss.queue_num,
7896                                          !!(dev_flow->layers &
7897                                             MLX5_FLOW_LAYER_TUNNEL));
7898                         }
7899                         if (!hrxq) {
7900                                 rte_flow_error_set
7901                                         (error, rte_errno,
7902                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7903                                          "cannot get hash queue");
7904                                 goto error;
7905                         }
7906                         dv->hrxq = hrxq;
7907                         dv->actions[n++] = dv->hrxq->action;
7908                 }
7909                 dv->flow =
7910                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7911                                                   (void *)&dv->value, n,
7912                                                   dv->actions);
7913                 if (!dv->flow) {
7914                         rte_flow_error_set(error, errno,
7915                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7916                                            NULL,
7917                                            "hardware refuses to create flow");
7918                         goto error;
7919                 }
7920                 if (priv->vmwa_context &&
7921                     dev_flow->dv.vf_vlan.tag &&
7922                     !dev_flow->dv.vf_vlan.created) {
7923                         /*
7924                          * The rule contains the VLAN pattern.
7925                          * For VF we are going to create VLAN
7926                          * interface to make hypervisor set correct
7927                          * e-Switch vport context.
7928                          */
7929                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7930                 }
7931         }
7932         return 0;
7933 error:
7934         err = rte_errno; /* Save rte_errno before cleanup. */
7935         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7936                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7937                 if (dv->hrxq) {
7938                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7939                                 mlx5_hrxq_drop_release(dev);
7940                         else
7941                                 mlx5_hrxq_release(dev, dv->hrxq);
7942                         dv->hrxq = NULL;
7943                 }
7944                 if (dev_flow->dv.vf_vlan.tag &&
7945                     dev_flow->dv.vf_vlan.created)
7946                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7947         }
7948         rte_errno = err; /* Restore rte_errno. */
7949         return -rte_errno;
7950 }
7951
7952 /**
7953  * Release the flow matcher.
7954  *
7955  * @param dev
7956  *   Pointer to Ethernet device.
7957  * @param flow
7958  *   Pointer to mlx5_flow.
7959  *
7960  * @return
7961  *   1 while a reference on it exists, 0 when freed.
7962  */
7963 static int
7964 flow_dv_matcher_release(struct rte_eth_dev *dev,
7965                         struct mlx5_flow *flow)
7966 {
7967         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7968
7969         MLX5_ASSERT(matcher->matcher_object);
7970         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7971                 dev->data->port_id, (void *)matcher,
7972                 rte_atomic32_read(&matcher->refcnt));
7973         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7974                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7975                            (matcher->matcher_object));
7976                 LIST_REMOVE(matcher, next);
7977                 /* table ref-- in release interface. */
7978                 flow_dv_tbl_resource_release(dev, matcher->tbl);
7979                 rte_free(matcher);
7980                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7981                         dev->data->port_id, (void *)matcher);
7982                 return 0;
7983         }
7984         return 1;
7985 }
7986
7987 /**
7988  * Release an encap/decap resource.
7989  *
7990  * @param flow
7991  *   Pointer to mlx5_flow.
7992  *
7993  * @return
7994  *   1 while a reference on it exists, 0 when freed.
7995  */
7996 static int
7997 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7998 {
7999         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
8000                                                 flow->dv.encap_decap;
8001
8002         MLX5_ASSERT(cache_resource->verbs_action);
8003         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
8004                 (void *)cache_resource,
8005                 rte_atomic32_read(&cache_resource->refcnt));
8006         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8007                 claim_zero(mlx5_glue->destroy_flow_action
8008                                 (cache_resource->verbs_action));
8009                 LIST_REMOVE(cache_resource, next);
8010                 rte_free(cache_resource);
8011                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
8012                         (void *)cache_resource);
8013                 return 0;
8014         }
8015         return 1;
8016 }
8017
8018 /**
8019  * Release an jump to table action resource.
8020  *
8021  * @param dev
8022  *   Pointer to Ethernet device.
8023  * @param flow
8024  *   Pointer to mlx5_flow.
8025  *
8026  * @return
8027  *   1 while a reference on it exists, 0 when freed.
8028  */
8029 static int
8030 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
8031                                   struct mlx5_flow *flow)
8032 {
8033         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
8034         struct mlx5_flow_tbl_data_entry *tbl_data =
8035                         container_of(cache_resource,
8036                                      struct mlx5_flow_tbl_data_entry, jump);
8037
8038         MLX5_ASSERT(cache_resource->action);
8039         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
8040                 (void *)cache_resource,
8041                 rte_atomic32_read(&cache_resource->refcnt));
8042         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8043                 claim_zero(mlx5_glue->destroy_flow_action
8044                                 (cache_resource->action));
8045                 /* jump action memory free is inside the table release. */
8046                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
8047                 DRV_LOG(DEBUG, "jump table resource %p: removed",
8048                         (void *)cache_resource);
8049                 return 0;
8050         }
8051         return 1;
8052 }
8053
8054 /**
8055  * Release a modify-header resource.
8056  *
8057  * @param flow
8058  *   Pointer to mlx5_flow.
8059  *
8060  * @return
8061  *   1 while a reference on it exists, 0 when freed.
8062  */
8063 static int
8064 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
8065 {
8066         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
8067                                                 flow->dv.modify_hdr;
8068
8069         MLX5_ASSERT(cache_resource->verbs_action);
8070         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
8071                 (void *)cache_resource,
8072                 rte_atomic32_read(&cache_resource->refcnt));
8073         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8074                 claim_zero(mlx5_glue->destroy_flow_action
8075                                 (cache_resource->verbs_action));
8076                 LIST_REMOVE(cache_resource, next);
8077                 rte_free(cache_resource);
8078                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
8079                         (void *)cache_resource);
8080                 return 0;
8081         }
8082         return 1;
8083 }
8084
8085 /**
8086  * Release port ID action resource.
8087  *
8088  * @param flow
8089  *   Pointer to mlx5_flow.
8090  *
8091  * @return
8092  *   1 while a reference on it exists, 0 when freed.
8093  */
8094 static int
8095 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
8096 {
8097         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
8098                 flow->dv.port_id_action;
8099
8100         MLX5_ASSERT(cache_resource->action);
8101         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
8102                 (void *)cache_resource,
8103                 rte_atomic32_read(&cache_resource->refcnt));
8104         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8105                 claim_zero(mlx5_glue->destroy_flow_action
8106                                 (cache_resource->action));
8107                 LIST_REMOVE(cache_resource, next);
8108                 rte_free(cache_resource);
8109                 DRV_LOG(DEBUG, "port id action resource %p: removed",
8110                         (void *)cache_resource);
8111                 return 0;
8112         }
8113         return 1;
8114 }
8115
8116 /**
8117  * Release push vlan action resource.
8118  *
8119  * @param flow
8120  *   Pointer to mlx5_flow.
8121  *
8122  * @return
8123  *   1 while a reference on it exists, 0 when freed.
8124  */
8125 static int
8126 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
8127 {
8128         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
8129                 flow->dv.push_vlan_res;
8130
8131         MLX5_ASSERT(cache_resource->action);
8132         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
8133                 (void *)cache_resource,
8134                 rte_atomic32_read(&cache_resource->refcnt));
8135         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8136                 claim_zero(mlx5_glue->destroy_flow_action
8137                                 (cache_resource->action));
8138                 LIST_REMOVE(cache_resource, next);
8139                 rte_free(cache_resource);
8140                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
8141                         (void *)cache_resource);
8142                 return 0;
8143         }
8144         return 1;
8145 }
8146
8147 /**
8148  * Remove the flow from the NIC but keeps it in memory.
8149  * Lock free, (mutex should be acquired by caller).
8150  *
8151  * @param[in] dev
8152  *   Pointer to Ethernet device.
8153  * @param[in, out] flow
8154  *   Pointer to flow structure.
8155  */
8156 static void
8157 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8158 {
8159         struct mlx5_flow_dv *dv;
8160         struct mlx5_flow *dev_flow;
8161
8162         if (!flow)
8163                 return;
8164         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8165                 dv = &dev_flow->dv;
8166                 if (dv->flow) {
8167                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
8168                         dv->flow = NULL;
8169                 }
8170                 if (dv->hrxq) {
8171                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8172                                 mlx5_hrxq_drop_release(dev);
8173                         else
8174                                 mlx5_hrxq_release(dev, dv->hrxq);
8175                         dv->hrxq = NULL;
8176                 }
8177                 if (dev_flow->dv.vf_vlan.tag &&
8178                     dev_flow->dv.vf_vlan.created)
8179                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8180         }
8181 }
8182
8183 /**
8184  * Remove the flow from the NIC and the memory.
8185  * Lock free, (mutex should be acquired by caller).
8186  *
8187  * @param[in] dev
8188  *   Pointer to the Ethernet device structure.
8189  * @param[in, out] flow
8190  *   Pointer to flow structure.
8191  */
8192 static void
8193 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8194 {
8195         struct mlx5_flow *dev_flow;
8196
8197         if (!flow)
8198                 return;
8199         __flow_dv_remove(dev, flow);
8200         if (flow->counter) {
8201                 flow_dv_counter_release(dev, flow->counter);
8202                 flow->counter = NULL;
8203         }
8204         if (flow->meter) {
8205                 mlx5_flow_meter_detach(flow->meter);
8206                 flow->meter = NULL;
8207         }
8208         while (!LIST_EMPTY(&flow->dev_flows)) {
8209                 dev_flow = LIST_FIRST(&flow->dev_flows);
8210                 LIST_REMOVE(dev_flow, next);
8211                 if (dev_flow->dv.matcher)
8212                         flow_dv_matcher_release(dev, dev_flow);
8213                 if (dev_flow->dv.encap_decap)
8214                         flow_dv_encap_decap_resource_release(dev_flow);
8215                 if (dev_flow->dv.modify_hdr)
8216                         flow_dv_modify_hdr_resource_release(dev_flow);
8217                 if (dev_flow->dv.jump)
8218                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8219                 if (dev_flow->dv.port_id_action)
8220                         flow_dv_port_id_action_resource_release(dev_flow);
8221                 if (dev_flow->dv.push_vlan_res)
8222                         flow_dv_push_vlan_action_resource_release(dev_flow);
8223                 if (dev_flow->dv.tag_resource)
8224                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8225                 rte_free(dev_flow);
8226         }
8227 }
8228
8229 /**
8230  * Query a dv flow  rule for its statistics via devx.
8231  *
8232  * @param[in] dev
8233  *   Pointer to Ethernet device.
8234  * @param[in] flow
8235  *   Pointer to the sub flow.
8236  * @param[out] data
8237  *   data retrieved by the query.
8238  * @param[out] error
8239  *   Perform verbose error reporting if not NULL.
8240  *
8241  * @return
8242  *   0 on success, a negative errno value otherwise and rte_errno is set.
8243  */
8244 static int
8245 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8246                     void *data, struct rte_flow_error *error)
8247 {
8248         struct mlx5_priv *priv = dev->data->dev_private;
8249         struct rte_flow_query_count *qc = data;
8250
8251         if (!priv->config.devx)
8252                 return rte_flow_error_set(error, ENOTSUP,
8253                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8254                                           NULL,
8255                                           "counters are not supported");
8256         if (flow->counter) {
8257                 uint64_t pkts, bytes;
8258                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8259                                                &bytes);
8260
8261                 if (err)
8262                         return rte_flow_error_set(error, -err,
8263                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8264                                         NULL, "cannot read counters");
8265                 qc->hits_set = 1;
8266                 qc->bytes_set = 1;
8267                 qc->hits = pkts - flow->counter->hits;
8268                 qc->bytes = bytes - flow->counter->bytes;
8269                 if (qc->reset) {
8270                         flow->counter->hits = pkts;
8271                         flow->counter->bytes = bytes;
8272                 }
8273                 return 0;
8274         }
8275         return rte_flow_error_set(error, EINVAL,
8276                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8277                                   NULL,
8278                                   "counters are not available");
8279 }
8280
8281 /**
8282  * Query a flow.
8283  *
8284  * @see rte_flow_query()
8285  * @see rte_flow_ops
8286  */
8287 static int
8288 flow_dv_query(struct rte_eth_dev *dev,
8289               struct rte_flow *flow __rte_unused,
8290               const struct rte_flow_action *actions __rte_unused,
8291               void *data __rte_unused,
8292               struct rte_flow_error *error __rte_unused)
8293 {
8294         int ret = -EINVAL;
8295
8296         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8297                 switch (actions->type) {
8298                 case RTE_FLOW_ACTION_TYPE_VOID:
8299                         break;
8300                 case RTE_FLOW_ACTION_TYPE_COUNT:
8301                         ret = flow_dv_query_count(dev, flow, data, error);
8302                         break;
8303                 default:
8304                         return rte_flow_error_set(error, ENOTSUP,
8305                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8306                                                   actions,
8307                                                   "action not supported");
8308                 }
8309         }
8310         return ret;
8311 }
8312
8313 /**
8314  * Destroy the meter table set.
8315  * Lock free, (mutex should be acquired by caller).
8316  *
8317  * @param[in] dev
8318  *   Pointer to Ethernet device.
8319  * @param[in] tbl
8320  *   Pointer to the meter table set.
8321  *
8322  * @return
8323  *   Always 0.
8324  */
8325 static int
8326 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8327                         struct mlx5_meter_domains_infos *tbl)
8328 {
8329         struct mlx5_priv *priv = dev->data->dev_private;
8330         struct mlx5_meter_domains_infos *mtd =
8331                                 (struct mlx5_meter_domains_infos *)tbl;
8332
8333         if (!mtd || !priv->config.dv_flow_en)
8334                 return 0;
8335         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8336                 claim_zero(mlx5_glue->dv_destroy_flow
8337                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8338         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8339                 claim_zero(mlx5_glue->dv_destroy_flow
8340                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8341         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8342                 claim_zero(mlx5_glue->dv_destroy_flow
8343                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8344         if (mtd->egress.color_matcher)
8345                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8346                           (mtd->egress.color_matcher));
8347         if (mtd->egress.any_matcher)
8348                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8349                           (mtd->egress.any_matcher));
8350         if (mtd->egress.tbl)
8351                 claim_zero(flow_dv_tbl_resource_release(dev,
8352                                                         mtd->egress.tbl));
8353         if (mtd->ingress.color_matcher)
8354                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8355                           (mtd->ingress.color_matcher));
8356         if (mtd->ingress.any_matcher)
8357                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8358                           (mtd->ingress.any_matcher));
8359         if (mtd->ingress.tbl)
8360                 claim_zero(flow_dv_tbl_resource_release(dev,
8361                                                         mtd->ingress.tbl));
8362         if (mtd->transfer.color_matcher)
8363                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8364                           (mtd->transfer.color_matcher));
8365         if (mtd->transfer.any_matcher)
8366                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8367                           (mtd->transfer.any_matcher));
8368         if (mtd->transfer.tbl)
8369                 claim_zero(flow_dv_tbl_resource_release(dev,
8370                                                         mtd->transfer.tbl));
8371         if (mtd->drop_actn)
8372                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8373         rte_free(mtd);
8374         return 0;
8375 }
8376
8377 /* Number of meter flow actions, count and jump or count and drop. */
8378 #define METER_ACTIONS 2
8379
8380 /**
8381  * Create specify domain meter table and suffix table.
8382  *
8383  * @param[in] dev
8384  *   Pointer to Ethernet device.
8385  * @param[in,out] mtb
8386  *   Pointer to DV meter table set.
8387  * @param[in] egress
8388  *   Table attribute.
8389  * @param[in] transfer
8390  *   Table attribute.
8391  * @param[in] color_reg_c_idx
8392  *   Reg C index for color match.
8393  *
8394  * @return
8395  *   0 on success, -1 otherwise and rte_errno is set.
8396  */
8397 static int
8398 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8399                            struct mlx5_meter_domains_infos *mtb,
8400                            uint8_t egress, uint8_t transfer,
8401                            uint32_t color_reg_c_idx)
8402 {
8403         struct mlx5_priv *priv = dev->data->dev_private;
8404         struct mlx5_ibv_shared *sh = priv->sh;
8405         struct mlx5_flow_dv_match_params mask = {
8406                 .size = sizeof(mask.buf),
8407         };
8408         struct mlx5_flow_dv_match_params value = {
8409                 .size = sizeof(value.buf),
8410         };
8411         struct mlx5dv_flow_matcher_attr dv_attr = {
8412                 .type = IBV_FLOW_ATTR_NORMAL,
8413                 .priority = 0,
8414                 .match_criteria_enable = 0,
8415                 .match_mask = (void *)&mask,
8416         };
8417         void *actions[METER_ACTIONS];
8418         struct mlx5_flow_tbl_resource **sfx_tbl;
8419         struct mlx5_meter_domain_info *dtb;
8420         struct rte_flow_error error;
8421         int i = 0;
8422
8423         if (transfer) {
8424                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8425                 dtb = &mtb->transfer;
8426         } else if (egress) {
8427                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8428                 dtb = &mtb->egress;
8429         } else {
8430                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8431                 dtb = &mtb->ingress;
8432         }
8433         /* If the suffix table in missing, create it. */
8434         if (!(*sfx_tbl)) {
8435                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8436                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8437                                                 egress, transfer, &error);
8438                 if (!(*sfx_tbl)) {
8439                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8440                         return -1;
8441                 }
8442         }
8443         /* Create the meter table with METER level. */
8444         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8445                                             egress, transfer, &error);
8446         if (!dtb->tbl) {
8447                 DRV_LOG(ERR, "Failed to create meter policer table.");
8448                 return -1;
8449         }
8450         /* Create matchers, Any and Color. */
8451         dv_attr.priority = 3;
8452         dv_attr.match_criteria_enable = 0;
8453         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8454                                                              &dv_attr,
8455                                                              dtb->tbl->obj);
8456         if (!dtb->any_matcher) {
8457                 DRV_LOG(ERR, "Failed to create meter"
8458                              " policer default matcher.");
8459                 goto error_exit;
8460         }
8461         dv_attr.priority = 0;
8462         dv_attr.match_criteria_enable =
8463                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8464         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8465                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
8466         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8467                                                                &dv_attr,
8468                                                                dtb->tbl->obj);
8469         if (!dtb->color_matcher) {
8470                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8471                 goto error_exit;
8472         }
8473         if (mtb->count_actns[RTE_MTR_DROPPED])
8474                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8475         actions[i++] = mtb->drop_actn;
8476         /* Default rule: lowest priority, match any, actions: drop. */
8477         dtb->policer_rules[RTE_MTR_DROPPED] =
8478                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8479                                                  (void *)&value, i, actions);
8480         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8481                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8482                 goto error_exit;
8483         }
8484         return 0;
8485 error_exit:
8486         return -1;
8487 }
8488
8489 /**
8490  * Create the needed meter and suffix tables.
8491  * Lock free, (mutex should be acquired by caller).
8492  *
8493  * @param[in] dev
8494  *   Pointer to Ethernet device.
8495  * @param[in] fm
8496  *   Pointer to the flow meter.
8497  *
8498  * @return
8499  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8500  */
8501 static struct mlx5_meter_domains_infos *
8502 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8503                        const struct mlx5_flow_meter *fm)
8504 {
8505         struct mlx5_priv *priv = dev->data->dev_private;
8506         struct mlx5_meter_domains_infos *mtb;
8507         int ret;
8508         int i;
8509
8510         if (!priv->mtr_en) {
8511                 rte_errno = ENOTSUP;
8512                 return NULL;
8513         }
8514         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8515         if (!mtb) {
8516                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8517                 return NULL;
8518         }
8519         /* Create meter count actions */
8520         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8521                 if (!fm->policer_stats.cnt[i])
8522                         continue;
8523                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8524         }
8525         /* Create drop action. */
8526         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8527         if (!mtb->drop_actn) {
8528                 DRV_LOG(ERR, "Failed to create drop action.");
8529                 goto error_exit;
8530         }
8531         /* Egress meter table. */
8532         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8533         if (ret) {
8534                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8535                 goto error_exit;
8536         }
8537         /* Ingress meter table. */
8538         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8539         if (ret) {
8540                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8541                 goto error_exit;
8542         }
8543         /* FDB meter table. */
8544         if (priv->config.dv_esw_en) {
8545                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8546                                                  priv->mtr_color_reg);
8547                 if (ret) {
8548                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8549                         goto error_exit;
8550                 }
8551         }
8552         return mtb;
8553 error_exit:
8554         flow_dv_destroy_mtr_tbl(dev, mtb);
8555         return NULL;
8556 }
8557
8558 /**
8559  * Destroy domain policer rule.
8560  *
8561  * @param[in] dt
8562  *   Pointer to domain table.
8563  */
8564 static void
8565 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8566 {
8567         int i;
8568
8569         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8570                 if (dt->policer_rules[i]) {
8571                         claim_zero(mlx5_glue->dv_destroy_flow
8572                                   (dt->policer_rules[i]));
8573                         dt->policer_rules[i] = NULL;
8574                 }
8575         }
8576         if (dt->jump_actn) {
8577                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8578                 dt->jump_actn = NULL;
8579         }
8580 }
8581
8582 /**
8583  * Destroy policer rules.
8584  *
8585  * @param[in] dev
8586  *   Pointer to Ethernet device.
8587  * @param[in] fm
8588  *   Pointer to flow meter structure.
8589  * @param[in] attr
8590  *   Pointer to flow attributes.
8591  *
8592  * @return
8593  *   Always 0.
8594  */
8595 static int
8596 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8597                               const struct mlx5_flow_meter *fm,
8598                               const struct rte_flow_attr *attr)
8599 {
8600         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8601
8602         if (!mtb)
8603                 return 0;
8604         if (attr->egress)
8605                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8606         if (attr->ingress)
8607                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8608         if (attr->transfer)
8609                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8610         return 0;
8611 }
8612
8613 /**
8614  * Create specify domain meter policer rule.
8615  *
8616  * @param[in] fm
8617  *   Pointer to flow meter structure.
8618  * @param[in] mtb
8619  *   Pointer to DV meter table set.
8620  * @param[in] sfx_tb
8621  *   Pointer to suffix table.
8622  * @param[in] mtr_reg_c
8623  *   Color match REG_C.
8624  *
8625  * @return
8626  *   0 on success, -1 otherwise.
8627  */
8628 static int
8629 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8630                                     struct mlx5_meter_domain_info *dtb,
8631                                     struct mlx5_flow_tbl_resource *sfx_tb,
8632                                     uint8_t mtr_reg_c)
8633 {
8634         struct mlx5_flow_dv_match_params matcher = {
8635                 .size = sizeof(matcher.buf),
8636         };
8637         struct mlx5_flow_dv_match_params value = {
8638                 .size = sizeof(value.buf),
8639         };
8640         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8641         void *actions[METER_ACTIONS];
8642         int i;
8643
8644         /* Create jump action. */
8645         if (!sfx_tb)
8646                 return -1;
8647         if (!dtb->jump_actn)
8648                 dtb->jump_actn =
8649                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8650                                                         (sfx_tb->obj);
8651         if (!dtb->jump_actn) {
8652                 DRV_LOG(ERR, "Failed to create policer jump action.");
8653                 goto error;
8654         }
8655         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8656                 int j = 0;
8657
8658                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8659                                        rte_col_2_mlx5_col(i), UINT8_MAX);
8660                 if (mtb->count_actns[i])
8661                         actions[j++] = mtb->count_actns[i];
8662                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8663                         actions[j++] = mtb->drop_actn;
8664                 else
8665                         actions[j++] = dtb->jump_actn;
8666                 dtb->policer_rules[i] =
8667                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8668                                                  (void *)&value,
8669                                                   j, actions);
8670                 if (!dtb->policer_rules[i]) {
8671                         DRV_LOG(ERR, "Failed to create policer rule.");
8672                         goto error;
8673                 }
8674         }
8675         return 0;
8676 error:
8677         rte_errno = errno;
8678         return -1;
8679 }
8680
8681 /**
8682  * Create policer rules.
8683  *
8684  * @param[in] dev
8685  *   Pointer to Ethernet device.
8686  * @param[in] fm
8687  *   Pointer to flow meter structure.
8688  * @param[in] attr
8689  *   Pointer to flow attributes.
8690  *
8691  * @return
8692  *   0 on success, -1 otherwise.
8693  */
8694 static int
8695 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8696                              struct mlx5_flow_meter *fm,
8697                              const struct rte_flow_attr *attr)
8698 {
8699         struct mlx5_priv *priv = dev->data->dev_private;
8700         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8701         int ret;
8702
8703         if (attr->egress) {
8704                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8705                                                 priv->sh->tx_mtr_sfx_tbl,
8706                                                 priv->mtr_color_reg);
8707                 if (ret) {
8708                         DRV_LOG(ERR, "Failed to create egress policer.");
8709                         goto error;
8710                 }
8711         }
8712         if (attr->ingress) {
8713                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8714                                                 priv->sh->rx_mtr_sfx_tbl,
8715                                                 priv->mtr_color_reg);
8716                 if (ret) {
8717                         DRV_LOG(ERR, "Failed to create ingress policer.");
8718                         goto error;
8719                 }
8720         }
8721         if (attr->transfer) {
8722                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8723                                                 priv->sh->fdb_mtr_sfx_tbl,
8724                                                 priv->mtr_color_reg);
8725                 if (ret) {
8726                         DRV_LOG(ERR, "Failed to create transfer policer.");
8727                         goto error;
8728                 }
8729         }
8730         return 0;
8731 error:
8732         flow_dv_destroy_policer_rules(dev, fm, attr);
8733         return -1;
8734 }
8735
8736 /**
8737  * Query a devx counter.
8738  *
8739  * @param[in] dev
8740  *   Pointer to the Ethernet device structure.
8741  * @param[in] cnt
8742  *   Pointer to the flow counter.
8743  * @param[in] clear
8744  *   Set to clear the counter statistics.
8745  * @param[out] pkts
8746  *   The statistics value of packets.
8747  * @param[out] bytes
8748  *   The statistics value of bytes.
8749  *
8750  * @return
8751  *   0 on success, otherwise return -1.
8752  */
8753 static int
8754 flow_dv_counter_query(struct rte_eth_dev *dev,
8755                       struct mlx5_flow_counter *cnt, bool clear,
8756                       uint64_t *pkts, uint64_t *bytes)
8757 {
8758         struct mlx5_priv *priv = dev->data->dev_private;
8759         uint64_t inn_pkts, inn_bytes;
8760         int ret;
8761
8762         if (!priv->config.devx)
8763                 return -1;
8764         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8765         if (ret)
8766                 return -1;
8767         *pkts = inn_pkts - cnt->hits;
8768         *bytes = inn_bytes - cnt->bytes;
8769         if (clear) {
8770                 cnt->hits = inn_pkts;
8771                 cnt->bytes = inn_bytes;
8772         }
8773         return 0;
8774 }
8775
8776 /*
8777  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8778  */
8779 static int
8780 flow_dv_translate(struct rte_eth_dev *dev,
8781                   struct mlx5_flow *dev_flow,
8782                   const struct rte_flow_attr *attr,
8783                   const struct rte_flow_item items[],
8784                   const struct rte_flow_action actions[],
8785                   struct rte_flow_error *error)
8786 {
8787         int ret;
8788
8789         flow_dv_shared_lock(dev);
8790         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8791         flow_dv_shared_unlock(dev);
8792         return ret;
8793 }
8794
8795 /*
8796  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8797  */
8798 static int
8799 flow_dv_apply(struct rte_eth_dev *dev,
8800               struct rte_flow *flow,
8801               struct rte_flow_error *error)
8802 {
8803         int ret;
8804
8805         flow_dv_shared_lock(dev);
8806         ret = __flow_dv_apply(dev, flow, error);
8807         flow_dv_shared_unlock(dev);
8808         return ret;
8809 }
8810
8811 /*
8812  * Mutex-protected thunk to lock-free __flow_dv_remove().
8813  */
8814 static void
8815 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8816 {
8817         flow_dv_shared_lock(dev);
8818         __flow_dv_remove(dev, flow);
8819         flow_dv_shared_unlock(dev);
8820 }
8821
8822 /*
8823  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8824  */
8825 static void
8826 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8827 {
8828         flow_dv_shared_lock(dev);
8829         __flow_dv_destroy(dev, flow);
8830         flow_dv_shared_unlock(dev);
8831 }
8832
8833 /*
8834  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8835  */
8836 static struct mlx5_flow_counter *
8837 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8838 {
8839         struct mlx5_flow_counter *cnt;
8840
8841         flow_dv_shared_lock(dev);
8842         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8843         flow_dv_shared_unlock(dev);
8844         return cnt;
8845 }
8846
8847 /*
8848  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8849  */
8850 static void
8851 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8852 {
8853         flow_dv_shared_lock(dev);
8854         flow_dv_counter_release(dev, cnt);
8855         flow_dv_shared_unlock(dev);
8856 }
8857
8858 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8859         .validate = flow_dv_validate,
8860         .prepare = flow_dv_prepare,
8861         .translate = flow_dv_translate,
8862         .apply = flow_dv_apply,
8863         .remove = flow_dv_remove,
8864         .destroy = flow_dv_destroy,
8865         .query = flow_dv_query,
8866         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8867         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8868         .create_policer_rules = flow_dv_create_policer_rules,
8869         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8870         .counter_alloc = flow_dv_counter_allocate,
8871         .counter_free = flow_dv_counter_free,
8872         .counter_query = flow_dv_counter_query,
8873 };
8874
8875 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */