drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_prm.h>
  35
  36 #include "mlx5_defs.h"
  37 #include "mlx5.h"
  38 #include "mlx5_flow.h"
  39 #include "mlx5_rxtx.h"
  40
  41 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 /**
  77  * Initialize flow attributes structure according to flow items' types.
  78  *
  79  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  80  * mode. For tunnel mode, the items to be modified are the outermost ones.
  81  *
  82  * @param[in] item
  83  *   Pointer to item specification.
  84  * @param[out] attr
  85  *   Pointer to flow attributes structure.
  86  * @param[in] dev_flow
  87  *   Pointer to the sub flow.
  88  * @param[in] tunnel_decap
  89  *   Whether action is after tunnel decapsulation.
  90  */
  91 static void
  92 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
  93                   struct mlx5_flow *dev_flow, bool tunnel_decap)
  94 {
  95         uint64_t layers = dev_flow->handle->layers;
  96
  97         /*
  98          * If layers is already initialized, it means this dev_flow is the
  99          * suffix flow, the layers flags is set by the prefix flow. Need to
 100          * use the layer flags from prefix flow as the suffix flow may not
 101          * have the user defined items as the flow is split.
 102          */
 103         if (layers) {
 104                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 105                         attr->ipv4 = 1;
 106                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 107                         attr->ipv6 = 1;
 108                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 109                         attr->tcp = 1;
 110                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 111                         attr->udp = 1;
 112                 attr->valid = 1;
 113                 return;
 114         }
 115         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 116                 uint8_t next_protocol = 0xff;
 117                 switch (item->type) {
 118                 case RTE_FLOW_ITEM_TYPE_GRE:
 119                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 120                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 121                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 122                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 123                 case RTE_FLOW_ITEM_TYPE_MPLS:
 124                         if (tunnel_decap)
 125                                 attr->attr = 0;
 126                         break;
 127                 case RTE_FLOW_ITEM_TYPE_IPV4:
 128                         if (!attr->ipv6)
 129                                 attr->ipv4 = 1;
 130                         if (item->mask != NULL &&
 131                             ((const struct rte_flow_item_ipv4 *)
 132                             item->mask)->hdr.next_proto_id)
 133                                 next_protocol =
 134                                     ((const struct rte_flow_item_ipv4 *)
 135                                       (item->spec))->hdr.next_proto_id &
 136                                     ((const struct rte_flow_item_ipv4 *)
 137                                       (item->mask))->hdr.next_proto_id;
 138                         if ((next_protocol == IPPROTO_IPIP ||
 139                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 140                                 attr->attr = 0;
 141                         break;
 142                 case RTE_FLOW_ITEM_TYPE_IPV6:
 143                         if (!attr->ipv4)
 144                                 attr->ipv6 = 1;
 145                         if (item->mask != NULL &&
 146                             ((const struct rte_flow_item_ipv6 *)
 147                             item->mask)->hdr.proto)
 148                                 next_protocol =
 149                                     ((const struct rte_flow_item_ipv6 *)
 150                                       (item->spec))->hdr.proto &
 151                                     ((const struct rte_flow_item_ipv6 *)
 152                                       (item->mask))->hdr.proto;
 153                         if ((next_protocol == IPPROTO_IPIP ||
 154                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 155                                 attr->attr = 0;
 156                         break;
 157                 case RTE_FLOW_ITEM_TYPE_UDP:
 158                         if (!attr->tcp)
 159                                 attr->udp = 1;
 160                         break;
 161                 case RTE_FLOW_ITEM_TYPE_TCP:
 162                         if (!attr->udp)
 163                                 attr->tcp = 1;
 164                         break;
 165                 default:
 166                         break;
 167                 }
 168         }
 169         attr->valid = 1;
 170 }
 171
 172 /**
 173  * Convert rte_mtr_color to mlx5 color.
 174  *
 175  * @param[in] rcol
 176  *   rte_mtr_color.
 177  *
 178  * @return
 179  *   mlx5 color.
 180  */
 181 static int
 182 rte_col_2_mlx5_col(enum rte_color rcol)
 183 {
 184         switch (rcol) {
 185         case RTE_COLOR_GREEN:
 186                 return MLX5_FLOW_COLOR_GREEN;
 187         case RTE_COLOR_YELLOW:
 188                 return MLX5_FLOW_COLOR_YELLOW;
 189         case RTE_COLOR_RED:
 190                 return MLX5_FLOW_COLOR_RED;
 191         default:
 192                 break;
 193         }
 194         return MLX5_FLOW_COLOR_UNDEFINED;
 195 }
 196
 197 struct field_modify_info {
 198         uint32_t size; /* Size of field in protocol header, in bytes. */
 199         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 200         enum mlx5_modification_field id;
 201 };
 202
 203 struct field_modify_info modify_eth[] = {
 204         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 205         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 206         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 207         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 208         {0, 0, 0},
 209 };
 210
 211 struct field_modify_info modify_vlan_out_first_vid[] = {
 212         /* Size in bits !!! */
 213         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 214         {0, 0, 0},
 215 };
 216
 217 struct field_modify_info modify_ipv4[] = {
 218         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 219         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 220         {4, 12, MLX5_MODI_OUT_SIPV4},
 221         {4, 16, MLX5_MODI_OUT_DIPV4},
 222         {0, 0, 0},
 223 };
 224
 225 struct field_modify_info modify_ipv6[] = {
 226         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 227         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 228         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 229         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 230         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 231         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 232         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 233         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 234         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 235         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 236         {0, 0, 0},
 237 };
 238
 239 struct field_modify_info modify_udp[] = {
 240         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 241         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 242         {0, 0, 0},
 243 };
 244
 245 struct field_modify_info modify_tcp[] = {
 246         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 247         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 248         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 249         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 250         {0, 0, 0},
 251 };
 252
 253 static void
 254 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 255                           uint8_t next_protocol, uint64_t *item_flags,
 256                           int *tunnel)
 257 {
 258         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 259                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 260         if (next_protocol == IPPROTO_IPIP) {
 261                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 262                 *tunnel = 1;
 263         }
 264         if (next_protocol == IPPROTO_IPV6) {
 265                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 266                 *tunnel = 1;
 267         }
 268 }
 269
 270 /**
 271  * Acquire the synchronizing object to protect multithreaded access
 272  * to shared dv context. Lock occurs only if context is actually
 273  * shared, i.e. we have multiport IB device and representors are
 274  * created.
 275  *
 276  * @param[in] dev
 277  *   Pointer to the rte_eth_dev structure.
 278  */
 279 static void
 280 flow_dv_shared_lock(struct rte_eth_dev *dev)
 281 {
 282         struct mlx5_priv *priv = dev->data->dev_private;
 283         struct mlx5_ibv_shared *sh = priv->sh;
 284
 285         if (sh->dv_refcnt > 1) {
 286                 int ret;
 287
 288                 ret = pthread_mutex_lock(&sh->dv_mutex);
 289                 MLX5_ASSERT(!ret);
 290                 (void)ret;
 291         }
 292 }
 293
 294 static void
 295 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 296 {
 297         struct mlx5_priv *priv = dev->data->dev_private;
 298         struct mlx5_ibv_shared *sh = priv->sh;
 299
 300         if (sh->dv_refcnt > 1) {
 301                 int ret;
 302
 303                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 304                 MLX5_ASSERT(!ret);
 305                 (void)ret;
 306         }
 307 }
 308
 309 /* Update VLAN's VID/PCP based on input rte_flow_action.
 310  *
 311  * @param[in] action
 312  *   Pointer to struct rte_flow_action.
 313  * @param[out] vlan
 314  *   Pointer to struct rte_vlan_hdr.
 315  */
 316 static void
 317 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 318                          struct rte_vlan_hdr *vlan)
 319 {
 320         uint16_t vlan_tci;
 321         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 322                 vlan_tci =
 323                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 324                                                action->conf)->vlan_pcp;
 325                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 326                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 327                 vlan->vlan_tci |= vlan_tci;
 328         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 329                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 330                 vlan->vlan_tci |= rte_be_to_cpu_16
 331                     (((const struct rte_flow_action_of_set_vlan_vid *)
 332                                              action->conf)->vlan_vid);
 333         }
 334 }
 335
 336 /**
 337  * Fetch 1, 2, 3 or 4 byte field from the byte array
 338  * and return as unsigned integer in host-endian format.
 339  *
 340  * @param[in] data
 341  *   Pointer to data array.
 342  * @param[in] size
 343  *   Size of field to extract.
 344  *
 345  * @return
 346  *   converted field in host endian format.
 347  */
 348 static inline uint32_t
 349 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 350 {
 351         uint32_t ret;
 352
 353         switch (size) {
 354         case 1:
 355                 ret = *data;
 356                 break;
 357         case 2:
 358                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 359                 break;
 360         case 3:
 361                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 362                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 363                 break;
 364         case 4:
 365                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 366                 break;
 367         default:
 368                 MLX5_ASSERT(false);
 369                 ret = 0;
 370                 break;
 371         }
 372         return ret;
 373 }
 374
 375 /**
 376  * Convert modify-header action to DV specification.
 377  *
 378  * Data length of each action is determined by provided field description
 379  * and the item mask. Data bit offset and width of each action is determined
 380  * by provided item mask.
 381  *
 382  * @param[in] item
 383  *   Pointer to item specification.
 384  * @param[in] field
 385  *   Pointer to field modification information.
 386  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 387  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 388  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 389  * @param[in] dcopy
 390  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 391  *   Negative offset value sets the same offset as source offset.
 392  *   size field is ignored, value is taken from source field.
 393  * @param[in,out] resource
 394  *   Pointer to the modify-header resource.
 395  * @param[in] type
 396  *   Type of modification.
 397  * @param[out] error
 398  *   Pointer to the error structure.
 399  *
 400  * @return
 401  *   0 on success, a negative errno value otherwise and rte_errno is set.
 402  */
 403 static int
 404 flow_dv_convert_modify_action(struct rte_flow_item *item,
 405                               struct field_modify_info *field,
 406                               struct field_modify_info *dcopy,
 407                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 408                               uint32_t type, struct rte_flow_error *error)
 409 {
 410         uint32_t i = resource->actions_num;
 411         struct mlx5_modification_cmd *actions = resource->actions;
 412
 413         /*
 414          * The item and mask are provided in big-endian format.
 415          * The fields should be presented as in big-endian format either.
 416          * Mask must be always present, it defines the actual field width.
 417          */
 418         MLX5_ASSERT(item->mask);
 419         MLX5_ASSERT(field->size);
 420         do {
 421                 unsigned int size_b;
 422                 unsigned int off_b;
 423                 uint32_t mask;
 424                 uint32_t data;
 425
 426                 if (i >= MLX5_MAX_MODIFY_NUM)
 427                         return rte_flow_error_set(error, EINVAL,
 428                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 429                                  "too many items to modify");
 430                 /* Fetch variable byte size mask from the array. */
 431                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 432                                            field->offset, field->size);
 433                 if (!mask) {
 434                         ++field;
 435                         continue;
 436                 }
 437                 /* Deduce actual data width in bits from mask value. */
 438                 off_b = rte_bsf32(mask);
 439                 size_b = sizeof(uint32_t) * CHAR_BIT -
 440                          off_b - __builtin_clz(mask);
 441                 MLX5_ASSERT(size_b);
 442                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 443                 actions[i] = (struct mlx5_modification_cmd) {
 444                         .action_type = type,
 445                         .field = field->id,
 446                         .offset = off_b,
 447                         .length = size_b,
 448                 };
 449                 /* Convert entire record to expected big-endian format. */
 450                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 451                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 452                         MLX5_ASSERT(dcopy);
 453                         actions[i].dst_field = dcopy->id;
 454                         actions[i].dst_offset =
 455                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 456                         /* Convert entire record to big-endian format. */
 457                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 458                 } else {
 459                         MLX5_ASSERT(item->spec);
 460                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 461                                                    field->offset, field->size);
 462                         /* Shift out the trailing masked bits from data. */
 463                         data = (data & mask) >> off_b;
 464                         actions[i].data1 = rte_cpu_to_be_32(data);
 465                 }
 466                 ++i;
 467                 ++field;
 468         } while (field->size);
 469         if (resource->actions_num == i)
 470                 return rte_flow_error_set(error, EINVAL,
 471                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 472                                           "invalid modification flow item");
 473         resource->actions_num = i;
 474         return 0;
 475 }
 476
 477 /**
 478  * Convert modify-header set IPv4 address action to DV specification.
 479  *
 480  * @param[in,out] resource
 481  *   Pointer to the modify-header resource.
 482  * @param[in] action
 483  *   Pointer to action specification.
 484  * @param[out] error
 485  *   Pointer to the error structure.
 486  *
 487  * @return
 488  *   0 on success, a negative errno value otherwise and rte_errno is set.
 489  */
 490 static int
 491 flow_dv_convert_action_modify_ipv4
 492                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 493                          const struct rte_flow_action *action,
 494                          struct rte_flow_error *error)
 495 {
 496         const struct rte_flow_action_set_ipv4 *conf =
 497                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 498         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 499         struct rte_flow_item_ipv4 ipv4;
 500         struct rte_flow_item_ipv4 ipv4_mask;
 501
 502         memset(&ipv4, 0, sizeof(ipv4));
 503         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 504         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 505                 ipv4.hdr.src_addr = conf->ipv4_addr;
 506                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 507         } else {
 508                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 509                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 510         }
 511         item.spec = &ipv4;
 512         item.mask = &ipv4_mask;
 513         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 514                                              MLX5_MODIFICATION_TYPE_SET, error);
 515 }
 516
 517 /**
 518  * Convert modify-header set IPv6 address action to DV specification.
 519  *
 520  * @param[in,out] resource
 521  *   Pointer to the modify-header resource.
 522  * @param[in] action
 523  *   Pointer to action specification.
 524  * @param[out] error
 525  *   Pointer to the error structure.
 526  *
 527  * @return
 528  *   0 on success, a negative errno value otherwise and rte_errno is set.
 529  */
 530 static int
 531 flow_dv_convert_action_modify_ipv6
 532                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 533                          const struct rte_flow_action *action,
 534                          struct rte_flow_error *error)
 535 {
 536         const struct rte_flow_action_set_ipv6 *conf =
 537                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 538         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 539         struct rte_flow_item_ipv6 ipv6;
 540         struct rte_flow_item_ipv6 ipv6_mask;
 541
 542         memset(&ipv6, 0, sizeof(ipv6));
 543         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 544         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 545                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 546                        sizeof(ipv6.hdr.src_addr));
 547                 memcpy(&ipv6_mask.hdr.src_addr,
 548                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 549                        sizeof(ipv6.hdr.src_addr));
 550         } else {
 551                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 552                        sizeof(ipv6.hdr.dst_addr));
 553                 memcpy(&ipv6_mask.hdr.dst_addr,
 554                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 555                        sizeof(ipv6.hdr.dst_addr));
 556         }
 557         item.spec = &ipv6;
 558         item.mask = &ipv6_mask;
 559         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 560                                              MLX5_MODIFICATION_TYPE_SET, error);
 561 }
 562
 563 /**
 564  * Convert modify-header set MAC address action to DV specification.
 565  *
 566  * @param[in,out] resource
 567  *   Pointer to the modify-header resource.
 568  * @param[in] action
 569  *   Pointer to action specification.
 570  * @param[out] error
 571  *   Pointer to the error structure.
 572  *
 573  * @return
 574  *   0 on success, a negative errno value otherwise and rte_errno is set.
 575  */
 576 static int
 577 flow_dv_convert_action_modify_mac
 578                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 579                          const struct rte_flow_action *action,
 580                          struct rte_flow_error *error)
 581 {
 582         const struct rte_flow_action_set_mac *conf =
 583                 (const struct rte_flow_action_set_mac *)(action->conf);
 584         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 585         struct rte_flow_item_eth eth;
 586         struct rte_flow_item_eth eth_mask;
 587
 588         memset(&eth, 0, sizeof(eth));
 589         memset(&eth_mask, 0, sizeof(eth_mask));
 590         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 591                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 592                        sizeof(eth.src.addr_bytes));
 593                 memcpy(&eth_mask.src.addr_bytes,
 594                        &rte_flow_item_eth_mask.src.addr_bytes,
 595                        sizeof(eth_mask.src.addr_bytes));
 596         } else {
 597                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 598                        sizeof(eth.dst.addr_bytes));
 599                 memcpy(&eth_mask.dst.addr_bytes,
 600                        &rte_flow_item_eth_mask.dst.addr_bytes,
 601                        sizeof(eth_mask.dst.addr_bytes));
 602         }
 603         item.spec = &eth;
 604         item.mask = &eth_mask;
 605         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 606                                              MLX5_MODIFICATION_TYPE_SET, error);
 607 }
 608
 609 /**
 610  * Convert modify-header set VLAN VID action to DV specification.
 611  *
 612  * @param[in,out] resource
 613  *   Pointer to the modify-header resource.
 614  * @param[in] action
 615  *   Pointer to action specification.
 616  * @param[out] error
 617  *   Pointer to the error structure.
 618  *
 619  * @return
 620  *   0 on success, a negative errno value otherwise and rte_errno is set.
 621  */
 622 static int
 623 flow_dv_convert_action_modify_vlan_vid
 624                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 625                          const struct rte_flow_action *action,
 626                          struct rte_flow_error *error)
 627 {
 628         const struct rte_flow_action_of_set_vlan_vid *conf =
 629                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 630         int i = resource->actions_num;
 631         struct mlx5_modification_cmd *actions = resource->actions;
 632         struct field_modify_info *field = modify_vlan_out_first_vid;
 633
 634         if (i >= MLX5_MAX_MODIFY_NUM)
 635                 return rte_flow_error_set(error, EINVAL,
 636                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 637                          "too many items to modify");
 638         actions[i] = (struct mlx5_modification_cmd) {
 639                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 640                 .field = field->id,
 641                 .length = field->size,
 642                 .offset = field->offset,
 643         };
 644         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 645         actions[i].data1 = conf->vlan_vid;
 646         actions[i].data1 = actions[i].data1 << 16;
 647         resource->actions_num = ++i;
 648         return 0;
 649 }
 650
 651 /**
 652  * Convert modify-header set TP action to DV specification.
 653  *
 654  * @param[in,out] resource
 655  *   Pointer to the modify-header resource.
 656  * @param[in] action
 657  *   Pointer to action specification.
 658  * @param[in] items
 659  *   Pointer to rte_flow_item objects list.
 660  * @param[in] attr
 661  *   Pointer to flow attributes structure.
 662  * @param[in] dev_flow
 663  *   Pointer to the sub flow.
 664  * @param[in] tunnel_decap
 665  *   Whether action is after tunnel decapsulation.
 666  * @param[out] error
 667  *   Pointer to the error structure.
 668  *
 669  * @return
 670  *   0 on success, a negative errno value otherwise and rte_errno is set.
 671  */
 672 static int
 673 flow_dv_convert_action_modify_tp
 674                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 675                          const struct rte_flow_action *action,
 676                          const struct rte_flow_item *items,
 677                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 678                          bool tunnel_decap, struct rte_flow_error *error)
 679 {
 680         const struct rte_flow_action_set_tp *conf =
 681                 (const struct rte_flow_action_set_tp *)(action->conf);
 682         struct rte_flow_item item;
 683         struct rte_flow_item_udp udp;
 684         struct rte_flow_item_udp udp_mask;
 685         struct rte_flow_item_tcp tcp;
 686         struct rte_flow_item_tcp tcp_mask;
 687         struct field_modify_info *field;
 688
 689         if (!attr->valid)
 690                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 691         if (attr->udp) {
 692                 memset(&udp, 0, sizeof(udp));
 693                 memset(&udp_mask, 0, sizeof(udp_mask));
 694                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 695                         udp.hdr.src_port = conf->port;
 696                         udp_mask.hdr.src_port =
 697                                         rte_flow_item_udp_mask.hdr.src_port;
 698                 } else {
 699                         udp.hdr.dst_port = conf->port;
 700                         udp_mask.hdr.dst_port =
 701                                         rte_flow_item_udp_mask.hdr.dst_port;
 702                 }
 703                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 704                 item.spec = &udp;
 705                 item.mask = &udp_mask;
 706                 field = modify_udp;
 707         } else {
 708                 MLX5_ASSERT(attr->tcp);
 709                 memset(&tcp, 0, sizeof(tcp));
 710                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 711                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 712                         tcp.hdr.src_port = conf->port;
 713                         tcp_mask.hdr.src_port =
 714                                         rte_flow_item_tcp_mask.hdr.src_port;
 715                 } else {
 716                         tcp.hdr.dst_port = conf->port;
 717                         tcp_mask.hdr.dst_port =
 718                                         rte_flow_item_tcp_mask.hdr.dst_port;
 719                 }
 720                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 721                 item.spec = &tcp;
 722                 item.mask = &tcp_mask;
 723                 field = modify_tcp;
 724         }
 725         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 726                                              MLX5_MODIFICATION_TYPE_SET, error);
 727 }
 728
 729 /**
 730  * Convert modify-header set TTL action to DV specification.
 731  *
 732  * @param[in,out] resource
 733  *   Pointer to the modify-header resource.
 734  * @param[in] action
 735  *   Pointer to action specification.
 736  * @param[in] items
 737  *   Pointer to rte_flow_item objects list.
 738  * @param[in] attr
 739  *   Pointer to flow attributes structure.
 740  * @param[in] dev_flow
 741  *   Pointer to the sub flow.
 742  * @param[in] tunnel_decap
 743  *   Whether action is after tunnel decapsulation.
 744  * @param[out] error
 745  *   Pointer to the error structure.
 746  *
 747  * @return
 748  *   0 on success, a negative errno value otherwise and rte_errno is set.
 749  */
 750 static int
 751 flow_dv_convert_action_modify_ttl
 752                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 753                          const struct rte_flow_action *action,
 754                          const struct rte_flow_item *items,
 755                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 756                          bool tunnel_decap, struct rte_flow_error *error)
 757 {
 758         const struct rte_flow_action_set_ttl *conf =
 759                 (const struct rte_flow_action_set_ttl *)(action->conf);
 760         struct rte_flow_item item;
 761         struct rte_flow_item_ipv4 ipv4;
 762         struct rte_flow_item_ipv4 ipv4_mask;
 763         struct rte_flow_item_ipv6 ipv6;
 764         struct rte_flow_item_ipv6 ipv6_mask;
 765         struct field_modify_info *field;
 766
 767         if (!attr->valid)
 768                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 769         if (attr->ipv4) {
 770                 memset(&ipv4, 0, sizeof(ipv4));
 771                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 772                 ipv4.hdr.time_to_live = conf->ttl_value;
 773                 ipv4_mask.hdr.time_to_live = 0xFF;
 774                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 775                 item.spec = &ipv4;
 776                 item.mask = &ipv4_mask;
 777                 field = modify_ipv4;
 778         } else {
 779                 MLX5_ASSERT(attr->ipv6);
 780                 memset(&ipv6, 0, sizeof(ipv6));
 781                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 782                 ipv6.hdr.hop_limits = conf->ttl_value;
 783                 ipv6_mask.hdr.hop_limits = 0xFF;
 784                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 785                 item.spec = &ipv6;
 786                 item.mask = &ipv6_mask;
 787                 field = modify_ipv6;
 788         }
 789         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 790                                              MLX5_MODIFICATION_TYPE_SET, error);
 791 }
 792
 793 /**
 794  * Convert modify-header decrement TTL action to DV specification.
 795  *
 796  * @param[in,out] resource
 797  *   Pointer to the modify-header resource.
 798  * @param[in] action
 799  *   Pointer to action specification.
 800  * @param[in] items
 801  *   Pointer to rte_flow_item objects list.
 802  * @param[in] attr
 803  *   Pointer to flow attributes structure.
 804  * @param[in] dev_flow
 805  *   Pointer to the sub flow.
 806  * @param[in] tunnel_decap
 807  *   Whether action is after tunnel decapsulation.
 808  * @param[out] error
 809  *   Pointer to the error structure.
 810  *
 811  * @return
 812  *   0 on success, a negative errno value otherwise and rte_errno is set.
 813  */
 814 static int
 815 flow_dv_convert_action_modify_dec_ttl
 816                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 817                          const struct rte_flow_item *items,
 818                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 819                          bool tunnel_decap, struct rte_flow_error *error)
 820 {
 821         struct rte_flow_item item;
 822         struct rte_flow_item_ipv4 ipv4;
 823         struct rte_flow_item_ipv4 ipv4_mask;
 824         struct rte_flow_item_ipv6 ipv6;
 825         struct rte_flow_item_ipv6 ipv6_mask;
 826         struct field_modify_info *field;
 827
 828         if (!attr->valid)
 829                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 830         if (attr->ipv4) {
 831                 memset(&ipv4, 0, sizeof(ipv4));
 832                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 833                 ipv4.hdr.time_to_live = 0xFF;
 834                 ipv4_mask.hdr.time_to_live = 0xFF;
 835                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 836                 item.spec = &ipv4;
 837                 item.mask = &ipv4_mask;
 838                 field = modify_ipv4;
 839         } else {
 840                 MLX5_ASSERT(attr->ipv6);
 841                 memset(&ipv6, 0, sizeof(ipv6));
 842                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 843                 ipv6.hdr.hop_limits = 0xFF;
 844                 ipv6_mask.hdr.hop_limits = 0xFF;
 845                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 846                 item.spec = &ipv6;
 847                 item.mask = &ipv6_mask;
 848                 field = modify_ipv6;
 849         }
 850         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 851                                              MLX5_MODIFICATION_TYPE_ADD, error);
 852 }
 853
 854 /**
 855  * Convert modify-header increment/decrement TCP Sequence number
 856  * to DV specification.
 857  *
 858  * @param[in,out] resource
 859  *   Pointer to the modify-header resource.
 860  * @param[in] action
 861  *   Pointer to action specification.
 862  * @param[out] error
 863  *   Pointer to the error structure.
 864  *
 865  * @return
 866  *   0 on success, a negative errno value otherwise and rte_errno is set.
 867  */
 868 static int
 869 flow_dv_convert_action_modify_tcp_seq
 870                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 871                          const struct rte_flow_action *action,
 872                          struct rte_flow_error *error)
 873 {
 874         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 875         uint64_t value = rte_be_to_cpu_32(*conf);
 876         struct rte_flow_item item;
 877         struct rte_flow_item_tcp tcp;
 878         struct rte_flow_item_tcp tcp_mask;
 879
 880         memset(&tcp, 0, sizeof(tcp));
 881         memset(&tcp_mask, 0, sizeof(tcp_mask));
 882         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 883                 /*
 884                  * The HW has no decrement operation, only increment operation.
 885                  * To simulate decrement X from Y using increment operation
 886                  * we need to add UINT32_MAX X times to Y.
 887                  * Each adding of UINT32_MAX decrements Y by 1.
 888                  */
 889                 value *= UINT32_MAX;
 890         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 891         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 892         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 893         item.spec = &tcp;
 894         item.mask = &tcp_mask;
 895         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 896                                              MLX5_MODIFICATION_TYPE_ADD, error);
 897 }
 898
 899 /**
 900  * Convert modify-header increment/decrement TCP Acknowledgment number
 901  * to DV specification.
 902  *
 903  * @param[in,out] resource
 904  *   Pointer to the modify-header resource.
 905  * @param[in] action
 906  *   Pointer to action specification.
 907  * @param[out] error
 908  *   Pointer to the error structure.
 909  *
 910  * @return
 911  *   0 on success, a negative errno value otherwise and rte_errno is set.
 912  */
 913 static int
 914 flow_dv_convert_action_modify_tcp_ack
 915                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 916                          const struct rte_flow_action *action,
 917                          struct rte_flow_error *error)
 918 {
 919         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 920         uint64_t value = rte_be_to_cpu_32(*conf);
 921         struct rte_flow_item item;
 922         struct rte_flow_item_tcp tcp;
 923         struct rte_flow_item_tcp tcp_mask;
 924
 925         memset(&tcp, 0, sizeof(tcp));
 926         memset(&tcp_mask, 0, sizeof(tcp_mask));
 927         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 928                 /*
 929                  * The HW has no decrement operation, only increment operation.
 930                  * To simulate decrement X from Y using increment operation
 931                  * we need to add UINT32_MAX X times to Y.
 932                  * Each adding of UINT32_MAX decrements Y by 1.
 933                  */
 934                 value *= UINT32_MAX;
 935         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 936         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 937         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 938         item.spec = &tcp;
 939         item.mask = &tcp_mask;
 940         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 941                                              MLX5_MODIFICATION_TYPE_ADD, error);
 942 }
 943
 944 static enum mlx5_modification_field reg_to_field[] = {
 945         [REG_NONE] = MLX5_MODI_OUT_NONE,
 946         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 947         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 948         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 949         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 950         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 951         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 952         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 953         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 954         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 955         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 956 };
 957
 958 /**
 959  * Convert register set to DV specification.
 960  *
 961  * @param[in,out] resource
 962  *   Pointer to the modify-header resource.
 963  * @param[in] action
 964  *   Pointer to action specification.
 965  * @param[out] error
 966  *   Pointer to the error structure.
 967  *
 968  * @return
 969  *   0 on success, a negative errno value otherwise and rte_errno is set.
 970  */
 971 static int
 972 flow_dv_convert_action_set_reg
 973                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 974                          const struct rte_flow_action *action,
 975                          struct rte_flow_error *error)
 976 {
 977         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 978         struct mlx5_modification_cmd *actions = resource->actions;
 979         uint32_t i = resource->actions_num;
 980
 981         if (i >= MLX5_MAX_MODIFY_NUM)
 982                 return rte_flow_error_set(error, EINVAL,
 983                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 984                                           "too many items to modify");
 985         MLX5_ASSERT(conf->id != REG_NONE);
 986         MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field));
 987         actions[i] = (struct mlx5_modification_cmd) {
 988                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 989                 .field = reg_to_field[conf->id],
 990         };
 991         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 992         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 993         ++i;
 994         resource->actions_num = i;
 995         return 0;
 996 }
 997
 998 /**
 999  * Convert SET_TAG action to DV specification.
1000  *
1001  * @param[in] dev
1002  *   Pointer to the rte_eth_dev structure.
1003  * @param[in,out] resource
1004  *   Pointer to the modify-header resource.
1005  * @param[in] conf
1006  *   Pointer to action specification.
1007  * @param[out] error
1008  *   Pointer to the error structure.
1009  *
1010  * @return
1011  *   0 on success, a negative errno value otherwise and rte_errno is set.
1012  */
1013 static int
1014 flow_dv_convert_action_set_tag
1015                         (struct rte_eth_dev *dev,
1016                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1017                          const struct rte_flow_action_set_tag *conf,
1018                          struct rte_flow_error *error)
1019 {
1020         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1021         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1022         struct rte_flow_item item = {
1023                 .spec = &data,
1024                 .mask = &mask,
1025         };
1026         struct field_modify_info reg_c_x[] = {
1027                 [1] = {0, 0, 0},
1028         };
1029         enum mlx5_modification_field reg_type;
1030         int ret;
1031
1032         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1033         if (ret < 0)
1034                 return ret;
1035         MLX5_ASSERT(ret != REG_NONE);
1036         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1037         reg_type = reg_to_field[ret];
1038         MLX5_ASSERT(reg_type > 0);
1039         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1040         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1041                                              MLX5_MODIFICATION_TYPE_SET, error);
1042 }
1043
1044 /**
1045  * Convert internal COPY_REG action to DV specification.
1046  *
1047  * @param[in] dev
1048  *   Pointer to the rte_eth_dev structure.
1049  * @param[in,out] res
1050  *   Pointer to the modify-header resource.
1051  * @param[in] action
1052  *   Pointer to action specification.
1053  * @param[out] error
1054  *   Pointer to the error structure.
1055  *
1056  * @return
1057  *   0 on success, a negative errno value otherwise and rte_errno is set.
1058  */
1059 static int
1060 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1061                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1062                                  const struct rte_flow_action *action,
1063                                  struct rte_flow_error *error)
1064 {
1065         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1066         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1067         struct rte_flow_item item = {
1068                 .spec = NULL,
1069                 .mask = &mask,
1070         };
1071         struct field_modify_info reg_src[] = {
1072                 {4, 0, reg_to_field[conf->src]},
1073                 {0, 0, 0},
1074         };
1075         struct field_modify_info reg_dst = {
1076                 .offset = 0,
1077                 .id = reg_to_field[conf->dst],
1078         };
1079         /* Adjust reg_c[0] usage according to reported mask. */
1080         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1081                 struct mlx5_priv *priv = dev->data->dev_private;
1082                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1083
1084                 MLX5_ASSERT(reg_c0);
1085                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1086                 if (conf->dst == REG_C_0) {
1087                         /* Copy to reg_c[0], within mask only. */
1088                         reg_dst.offset = rte_bsf32(reg_c0);
1089                         /*
1090                          * Mask is ignoring the enianness, because
1091                          * there is no conversion in datapath.
1092                          */
1093 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1094                         /* Copy from destination lower bits to reg_c[0]. */
1095                         mask = reg_c0 >> reg_dst.offset;
1096 #else
1097                         /* Copy from destination upper bits to reg_c[0]. */
1098                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1099                                           rte_fls_u32(reg_c0));
1100 #endif
1101                 } else {
1102                         mask = rte_cpu_to_be_32(reg_c0);
1103 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1104                         /* Copy from reg_c[0] to destination lower bits. */
1105                         reg_dst.offset = 0;
1106 #else
1107                         /* Copy from reg_c[0] to destination upper bits. */
1108                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1109                                          (rte_fls_u32(reg_c0) -
1110                                           rte_bsf32(reg_c0));
1111 #endif
1112                 }
1113         }
1114         return flow_dv_convert_modify_action(&item,
1115                                              reg_src, &reg_dst, res,
1116                                              MLX5_MODIFICATION_TYPE_COPY,
1117                                              error);
1118 }
1119
1120 /**
1121  * Convert MARK action to DV specification. This routine is used
1122  * in extensive metadata only and requires metadata register to be
1123  * handled. In legacy mode hardware tag resource is engaged.
1124  *
1125  * @param[in] dev
1126  *   Pointer to the rte_eth_dev structure.
1127  * @param[in] conf
1128  *   Pointer to MARK action specification.
1129  * @param[in,out] resource
1130  *   Pointer to the modify-header resource.
1131  * @param[out] error
1132  *   Pointer to the error structure.
1133  *
1134  * @return
1135  *   0 on success, a negative errno value otherwise and rte_errno is set.
1136  */
1137 static int
1138 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1139                             const struct rte_flow_action_mark *conf,
1140                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1141                             struct rte_flow_error *error)
1142 {
1143         struct mlx5_priv *priv = dev->data->dev_private;
1144         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1145                                            priv->sh->dv_mark_mask);
1146         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1147         struct rte_flow_item item = {
1148                 .spec = &data,
1149                 .mask = &mask,
1150         };
1151         struct field_modify_info reg_c_x[] = {
1152                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1153                 {0, 0, 0},
1154         };
1155         int reg;
1156
1157         if (!mask)
1158                 return rte_flow_error_set(error, EINVAL,
1159                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1160                                           NULL, "zero mark action mask");
1161         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1162         if (reg < 0)
1163                 return reg;
1164         MLX5_ASSERT(reg > 0);
1165         if (reg == REG_C_0) {
1166                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1167                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1168
1169                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1170                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1171                 mask = rte_cpu_to_be_32(mask << shl_c0);
1172         }
1173         reg_c_x[0].id = reg_to_field[reg];
1174         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1175                                              MLX5_MODIFICATION_TYPE_SET, error);
1176 }
1177
1178 /**
1179  * Get metadata register index for specified steering domain.
1180  *
1181  * @param[in] dev
1182  *   Pointer to the rte_eth_dev structure.
1183  * @param[in] attr
1184  *   Attributes of flow to determine steering domain.
1185  * @param[out] error
1186  *   Pointer to the error structure.
1187  *
1188  * @return
1189  *   positive index on success, a negative errno value otherwise
1190  *   and rte_errno is set.
1191  */
1192 static enum modify_reg
1193 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1194                          const struct rte_flow_attr *attr,
1195                          struct rte_flow_error *error)
1196 {
1197         int reg =
1198                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1199                                           MLX5_METADATA_FDB :
1200                                             attr->egress ?
1201                                             MLX5_METADATA_TX :
1202                                             MLX5_METADATA_RX, 0, error);
1203         if (reg < 0)
1204                 return rte_flow_error_set(error,
1205                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1206                                           NULL, "unavailable "
1207                                           "metadata register");
1208         return reg;
1209 }
1210
1211 /**
1212  * Convert SET_META action to DV specification.
1213  *
1214  * @param[in] dev
1215  *   Pointer to the rte_eth_dev structure.
1216  * @param[in,out] resource
1217  *   Pointer to the modify-header resource.
1218  * @param[in] attr
1219  *   Attributes of flow that includes this item.
1220  * @param[in] conf
1221  *   Pointer to action specification.
1222  * @param[out] error
1223  *   Pointer to the error structure.
1224  *
1225  * @return
1226  *   0 on success, a negative errno value otherwise and rte_errno is set.
1227  */
1228 static int
1229 flow_dv_convert_action_set_meta
1230                         (struct rte_eth_dev *dev,
1231                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1232                          const struct rte_flow_attr *attr,
1233                          const struct rte_flow_action_set_meta *conf,
1234                          struct rte_flow_error *error)
1235 {
1236         uint32_t data = conf->data;
1237         uint32_t mask = conf->mask;
1238         struct rte_flow_item item = {
1239                 .spec = &data,
1240                 .mask = &mask,
1241         };
1242         struct field_modify_info reg_c_x[] = {
1243                 [1] = {0, 0, 0},
1244         };
1245         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1246
1247         if (reg < 0)
1248                 return reg;
1249         /*
1250          * In datapath code there is no endianness
1251          * coversions for perfromance reasons, all
1252          * pattern conversions are done in rte_flow.
1253          */
1254         if (reg == REG_C_0) {
1255                 struct mlx5_priv *priv = dev->data->dev_private;
1256                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1257                 uint32_t shl_c0;
1258
1259                 MLX5_ASSERT(msk_c0);
1260 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1261                 shl_c0 = rte_bsf32(msk_c0);
1262 #else
1263                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1264 #endif
1265                 mask <<= shl_c0;
1266                 data <<= shl_c0;
1267                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1268         }
1269         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1270         /* The routine expects parameters in memory as big-endian ones. */
1271         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1272                                              MLX5_MODIFICATION_TYPE_SET, error);
1273 }
1274
1275 /**
1276  * Convert modify-header set IPv4 DSCP action to DV specification.
1277  *
1278  * @param[in,out] resource
1279  *   Pointer to the modify-header resource.
1280  * @param[in] action
1281  *   Pointer to action specification.
1282  * @param[out] error
1283  *   Pointer to the error structure.
1284  *
1285  * @return
1286  *   0 on success, a negative errno value otherwise and rte_errno is set.
1287  */
1288 static int
1289 flow_dv_convert_action_modify_ipv4_dscp
1290                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1291                          const struct rte_flow_action *action,
1292                          struct rte_flow_error *error)
1293 {
1294         const struct rte_flow_action_set_dscp *conf =
1295                 (const struct rte_flow_action_set_dscp *)(action->conf);
1296         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1297         struct rte_flow_item_ipv4 ipv4;
1298         struct rte_flow_item_ipv4 ipv4_mask;
1299
1300         memset(&ipv4, 0, sizeof(ipv4));
1301         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1302         ipv4.hdr.type_of_service = conf->dscp;
1303         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1304         item.spec = &ipv4;
1305         item.mask = &ipv4_mask;
1306         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1307                                              MLX5_MODIFICATION_TYPE_SET, error);
1308 }
1309
1310 /**
1311  * Convert modify-header set IPv6 DSCP action to DV specification.
1312  *
1313  * @param[in,out] resource
1314  *   Pointer to the modify-header resource.
1315  * @param[in] action
1316  *   Pointer to action specification.
1317  * @param[out] error
1318  *   Pointer to the error structure.
1319  *
1320  * @return
1321  *   0 on success, a negative errno value otherwise and rte_errno is set.
1322  */
1323 static int
1324 flow_dv_convert_action_modify_ipv6_dscp
1325                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1326                          const struct rte_flow_action *action,
1327                          struct rte_flow_error *error)
1328 {
1329         const struct rte_flow_action_set_dscp *conf =
1330                 (const struct rte_flow_action_set_dscp *)(action->conf);
1331         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1332         struct rte_flow_item_ipv6 ipv6;
1333         struct rte_flow_item_ipv6 ipv6_mask;
1334
1335         memset(&ipv6, 0, sizeof(ipv6));
1336         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1337         /*
1338          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1339          * rdma-core only accept the DSCP bits byte aligned start from
1340          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1341          * bits in IPv6 case as rdma-core requires byte aligned value.
1342          */
1343         ipv6.hdr.vtc_flow = conf->dscp;
1344         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1345         item.spec = &ipv6;
1346         item.mask = &ipv6_mask;
1347         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1348                                              MLX5_MODIFICATION_TYPE_SET, error);
1349 }
1350
1351 /**
1352  * Validate MARK item.
1353  *
1354  * @param[in] dev
1355  *   Pointer to the rte_eth_dev structure.
1356  * @param[in] item
1357  *   Item specification.
1358  * @param[in] attr
1359  *   Attributes of flow that includes this item.
1360  * @param[out] error
1361  *   Pointer to error structure.
1362  *
1363  * @return
1364  *   0 on success, a negative errno value otherwise and rte_errno is set.
1365  */
1366 static int
1367 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1368                            const struct rte_flow_item *item,
1369                            const struct rte_flow_attr *attr __rte_unused,
1370                            struct rte_flow_error *error)
1371 {
1372         struct mlx5_priv *priv = dev->data->dev_private;
1373         struct mlx5_dev_config *config = &priv->config;
1374         const struct rte_flow_item_mark *spec = item->spec;
1375         const struct rte_flow_item_mark *mask = item->mask;
1376         const struct rte_flow_item_mark nic_mask = {
1377                 .id = priv->sh->dv_mark_mask,
1378         };
1379         int ret;
1380
1381         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1382                 return rte_flow_error_set(error, ENOTSUP,
1383                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1384                                           "extended metadata feature"
1385                                           " isn't enabled");
1386         if (!mlx5_flow_ext_mreg_supported(dev))
1387                 return rte_flow_error_set(error, ENOTSUP,
1388                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1389                                           "extended metadata register"
1390                                           " isn't supported");
1391         if (!nic_mask.id)
1392                 return rte_flow_error_set(error, ENOTSUP,
1393                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1394                                           "extended metadata register"
1395                                           " isn't available");
1396         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1397         if (ret < 0)
1398                 return ret;
1399         if (!spec)
1400                 return rte_flow_error_set(error, EINVAL,
1401                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1402                                           item->spec,
1403                                           "data cannot be empty");
1404         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1405                 return rte_flow_error_set(error, EINVAL,
1406                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1407                                           &spec->id,
1408                                           "mark id exceeds the limit");
1409         if (!mask)
1410                 mask = &nic_mask;
1411         if (!mask->id)
1412                 return rte_flow_error_set(error, EINVAL,
1413                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1414                                         "mask cannot be zero");
1415
1416         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1417                                         (const uint8_t *)&nic_mask,
1418                                         sizeof(struct rte_flow_item_mark),
1419                                         error);
1420         if (ret < 0)
1421                 return ret;
1422         return 0;
1423 }
1424
1425 /**
1426  * Validate META item.
1427  *
1428  * @param[in] dev
1429  *   Pointer to the rte_eth_dev structure.
1430  * @param[in] item
1431  *   Item specification.
1432  * @param[in] attr
1433  *   Attributes of flow that includes this item.
1434  * @param[out] error
1435  *   Pointer to error structure.
1436  *
1437  * @return
1438  *   0 on success, a negative errno value otherwise and rte_errno is set.
1439  */
1440 static int
1441 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1442                            const struct rte_flow_item *item,
1443                            const struct rte_flow_attr *attr,
1444                            struct rte_flow_error *error)
1445 {
1446         struct mlx5_priv *priv = dev->data->dev_private;
1447         struct mlx5_dev_config *config = &priv->config;
1448         const struct rte_flow_item_meta *spec = item->spec;
1449         const struct rte_flow_item_meta *mask = item->mask;
1450         struct rte_flow_item_meta nic_mask = {
1451                 .data = UINT32_MAX
1452         };
1453         int reg;
1454         int ret;
1455
1456         if (!spec)
1457                 return rte_flow_error_set(error, EINVAL,
1458                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1459                                           item->spec,
1460                                           "data cannot be empty");
1461         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1462                 if (!mlx5_flow_ext_mreg_supported(dev))
1463                         return rte_flow_error_set(error, ENOTSUP,
1464                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1465                                           "extended metadata register"
1466                                           " isn't supported");
1467                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1468                 if (reg < 0)
1469                         return reg;
1470                 if (reg == REG_B)
1471                         return rte_flow_error_set(error, ENOTSUP,
1472                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1473                                           "match on reg_b "
1474                                           "isn't supported");
1475                 if (reg != REG_A)
1476                         nic_mask.data = priv->sh->dv_meta_mask;
1477         }
1478         if (!mask)
1479                 mask = &rte_flow_item_meta_mask;
1480         if (!mask->data)
1481                 return rte_flow_error_set(error, EINVAL,
1482                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1483                                         "mask cannot be zero");
1484
1485         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1486                                         (const uint8_t *)&nic_mask,
1487                                         sizeof(struct rte_flow_item_meta),
1488                                         error);
1489         return ret;
1490 }
1491
1492 /**
1493  * Validate TAG item.
1494  *
1495  * @param[in] dev
1496  *   Pointer to the rte_eth_dev structure.
1497  * @param[in] item
1498  *   Item specification.
1499  * @param[in] attr
1500  *   Attributes of flow that includes this item.
1501  * @param[out] error
1502  *   Pointer to error structure.
1503  *
1504  * @return
1505  *   0 on success, a negative errno value otherwise and rte_errno is set.
1506  */
1507 static int
1508 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1509                           const struct rte_flow_item *item,
1510                           const struct rte_flow_attr *attr __rte_unused,
1511                           struct rte_flow_error *error)
1512 {
1513         const struct rte_flow_item_tag *spec = item->spec;
1514         const struct rte_flow_item_tag *mask = item->mask;
1515         const struct rte_flow_item_tag nic_mask = {
1516                 .data = RTE_BE32(UINT32_MAX),
1517                 .index = 0xff,
1518         };
1519         int ret;
1520
1521         if (!mlx5_flow_ext_mreg_supported(dev))
1522                 return rte_flow_error_set(error, ENOTSUP,
1523                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1524                                           "extensive metadata register"
1525                                           " isn't supported");
1526         if (!spec)
1527                 return rte_flow_error_set(error, EINVAL,
1528                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1529                                           item->spec,
1530                                           "data cannot be empty");
1531         if (!mask)
1532                 mask = &rte_flow_item_tag_mask;
1533         if (!mask->data)
1534                 return rte_flow_error_set(error, EINVAL,
1535                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1536                                         "mask cannot be zero");
1537
1538         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1539                                         (const uint8_t *)&nic_mask,
1540                                         sizeof(struct rte_flow_item_tag),
1541                                         error);
1542         if (ret < 0)
1543                 return ret;
1544         if (mask->index != 0xff)
1545                 return rte_flow_error_set(error, EINVAL,
1546                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1547                                           "partial mask for tag index"
1548                                           " is not supported");
1549         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1550         if (ret < 0)
1551                 return ret;
1552         MLX5_ASSERT(ret != REG_NONE);
1553         return 0;
1554 }
1555
1556 /**
1557  * Validate vport item.
1558  *
1559  * @param[in] dev
1560  *   Pointer to the rte_eth_dev structure.
1561  * @param[in] item
1562  *   Item specification.
1563  * @param[in] attr
1564  *   Attributes of flow that includes this item.
1565  * @param[in] item_flags
1566  *   Bit-fields that holds the items detected until now.
1567  * @param[out] error
1568  *   Pointer to error structure.
1569  *
1570  * @return
1571  *   0 on success, a negative errno value otherwise and rte_errno is set.
1572  */
1573 static int
1574 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1575                               const struct rte_flow_item *item,
1576                               const struct rte_flow_attr *attr,
1577                               uint64_t item_flags,
1578                               struct rte_flow_error *error)
1579 {
1580         const struct rte_flow_item_port_id *spec = item->spec;
1581         const struct rte_flow_item_port_id *mask = item->mask;
1582         const struct rte_flow_item_port_id switch_mask = {
1583                         .id = 0xffffffff,
1584         };
1585         struct mlx5_priv *esw_priv;
1586         struct mlx5_priv *dev_priv;
1587         int ret;
1588
1589         if (!attr->transfer)
1590                 return rte_flow_error_set(error, EINVAL,
1591                                           RTE_FLOW_ERROR_TYPE_ITEM,
1592                                           NULL,
1593                                           "match on port id is valid only"
1594                                           " when transfer flag is enabled");
1595         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1596                 return rte_flow_error_set(error, ENOTSUP,
1597                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1598                                           "multiple source ports are not"
1599                                           " supported");
1600         if (!mask)
1601                 mask = &switch_mask;
1602         if (mask->id != 0xffffffff)
1603                 return rte_flow_error_set(error, ENOTSUP,
1604                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1605                                            mask,
1606                                            "no support for partial mask on"
1607                                            " \"id\" field");
1608         ret = mlx5_flow_item_acceptable
1609                                 (item, (const uint8_t *)mask,
1610                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1611                                  sizeof(struct rte_flow_item_port_id),
1612                                  error);
1613         if (ret)
1614                 return ret;
1615         if (!spec)
1616                 return 0;
1617         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1618         if (!esw_priv)
1619                 return rte_flow_error_set(error, rte_errno,
1620                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1621                                           "failed to obtain E-Switch info for"
1622                                           " port");
1623         dev_priv = mlx5_dev_to_eswitch_info(dev);
1624         if (!dev_priv)
1625                 return rte_flow_error_set(error, rte_errno,
1626                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1627                                           NULL,
1628                                           "failed to obtain E-Switch info");
1629         if (esw_priv->domain_id != dev_priv->domain_id)
1630                 return rte_flow_error_set(error, EINVAL,
1631                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1632                                           "cannot match on a port from a"
1633                                           " different E-Switch");
1634         return 0;
1635 }
1636
1637 /**
1638  * Validate GTP item.
1639  *
1640  * @param[in] dev
1641  *   Pointer to the rte_eth_dev structure.
1642  * @param[in] item
1643  *   Item specification.
1644  * @param[in] item_flags
1645  *   Bit-fields that holds the items detected until now.
1646  * @param[out] error
1647  *   Pointer to error structure.
1648  *
1649  * @return
1650  *   0 on success, a negative errno value otherwise and rte_errno is set.
1651  */
1652 static int
1653 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1654                           const struct rte_flow_item *item,
1655                           uint64_t item_flags,
1656                           struct rte_flow_error *error)
1657 {
1658         struct mlx5_priv *priv = dev->data->dev_private;
1659         const struct rte_flow_item_gtp *mask = item->mask;
1660         const struct rte_flow_item_gtp nic_mask = {
1661                 .msg_type = 0xff,
1662                 .teid = RTE_BE32(0xffffffff),
1663         };
1664
1665         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1666                 return rte_flow_error_set(error, ENOTSUP,
1667                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1668                                           "GTP support is not enabled");
1669         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1670                 return rte_flow_error_set(error, ENOTSUP,
1671                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1672                                           "multiple tunnel layers not"
1673                                           " supported");
1674         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1675                 return rte_flow_error_set(error, EINVAL,
1676                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1677                                           "no outer UDP layer found");
1678         if (!mask)
1679                 mask = &rte_flow_item_gtp_mask;
1680         return mlx5_flow_item_acceptable
1681                 (item, (const uint8_t *)mask,
1682                  (const uint8_t *)&nic_mask,
1683                  sizeof(struct rte_flow_item_gtp),
1684                  error);
1685 }
1686
1687 /**
1688  * Validate the pop VLAN action.
1689  *
1690  * @param[in] dev
1691  *   Pointer to the rte_eth_dev structure.
1692  * @param[in] action_flags
1693  *   Holds the actions detected until now.
1694  * @param[in] action
1695  *   Pointer to the pop vlan action.
1696  * @param[in] item_flags
1697  *   The items found in this flow rule.
1698  * @param[in] attr
1699  *   Pointer to flow attributes.
1700  * @param[out] error
1701  *   Pointer to error structure.
1702  *
1703  * @return
1704  *   0 on success, a negative errno value otherwise and rte_errno is set.
1705  */
1706 static int
1707 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1708                                  uint64_t action_flags,
1709                                  const struct rte_flow_action *action,
1710                                  uint64_t item_flags,
1711                                  const struct rte_flow_attr *attr,
1712                                  struct rte_flow_error *error)
1713 {
1714         const struct mlx5_priv *priv = dev->data->dev_private;
1715
1716         (void)action;
1717         (void)attr;
1718         if (!priv->sh->pop_vlan_action)
1719                 return rte_flow_error_set(error, ENOTSUP,
1720                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1721                                           NULL,
1722                                           "pop vlan action is not supported");
1723         if (attr->egress)
1724                 return rte_flow_error_set(error, ENOTSUP,
1725                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1726                                           NULL,
1727                                           "pop vlan action not supported for "
1728                                           "egress");
1729         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1730                 return rte_flow_error_set(error, ENOTSUP,
1731                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1732                                           "no support for multiple VLAN "
1733                                           "actions");
1734         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1735                 return rte_flow_error_set(error, ENOTSUP,
1736                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1737                                           NULL,
1738                                           "cannot pop vlan without a "
1739                                           "match on (outer) vlan in the flow");
1740         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1741                 return rte_flow_error_set(error, EINVAL,
1742                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1743                                           "wrong action order, port_id should "
1744                                           "be after pop VLAN action");
1745         if (!attr->transfer && priv->representor)
1746                 return rte_flow_error_set(error, ENOTSUP,
1747                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1748                                           "pop vlan action for VF representor "
1749                                           "not supported on NIC table");
1750         return 0;
1751 }
1752
1753 /**
1754  * Get VLAN default info from vlan match info.
1755  *
1756  * @param[in] items
1757  *   the list of item specifications.
1758  * @param[out] vlan
1759  *   pointer VLAN info to fill to.
1760  *
1761  * @return
1762  *   0 on success, a negative errno value otherwise and rte_errno is set.
1763  */
1764 static void
1765 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1766                                   struct rte_vlan_hdr *vlan)
1767 {
1768         const struct rte_flow_item_vlan nic_mask = {
1769                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1770                                 MLX5DV_FLOW_VLAN_VID_MASK),
1771                 .inner_type = RTE_BE16(0xffff),
1772         };
1773
1774         if (items == NULL)
1775                 return;
1776         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1777                 int type = items->type;
1778
1779                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
1780                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
1781                         break;
1782         }
1783         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
1784                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1785                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1786
1787                 if (!vlan_m)
1788                         vlan_m = &nic_mask;
1789                 /* Only full match values are accepted */
1790                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1791                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1792                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
1793                         vlan->vlan_tci |=
1794                                 rte_be_to_cpu_16(vlan_v->tci &
1795                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1796                 }
1797                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1798                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1799                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1800                         vlan->vlan_tci |=
1801                                 rte_be_to_cpu_16(vlan_v->tci &
1802                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1803                 }
1804                 if (vlan_m->inner_type == nic_mask.inner_type)
1805                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1806                                                            vlan_m->inner_type);
1807         }
1808 }
1809
1810 /**
1811  * Validate the push VLAN action.
1812  *
1813  * @param[in] dev
1814  *   Pointer to the rte_eth_dev structure.
1815  * @param[in] action_flags
1816  *   Holds the actions detected until now.
1817  * @param[in] item_flags
1818  *   The items found in this flow rule.
1819  * @param[in] action
1820  *   Pointer to the action structure.
1821  * @param[in] attr
1822  *   Pointer to flow attributes
1823  * @param[out] error
1824  *   Pointer to error structure.
1825  *
1826  * @return
1827  *   0 on success, a negative errno value otherwise and rte_errno is set.
1828  */
1829 static int
1830 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
1831                                   uint64_t action_flags,
1832                                   uint64_t item_flags __rte_unused,
1833                                   const struct rte_flow_action *action,
1834                                   const struct rte_flow_attr *attr,
1835                                   struct rte_flow_error *error)
1836 {
1837         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1838         const struct mlx5_priv *priv = dev->data->dev_private;
1839
1840         if (!attr->transfer && attr->ingress)
1841                 return rte_flow_error_set(error, ENOTSUP,
1842                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1843                                           NULL,
1844                                           "push VLAN action not supported for "
1845                                           "ingress");
1846         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1847             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1848                 return rte_flow_error_set(error, EINVAL,
1849                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1850                                           "invalid vlan ethertype");
1851         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1852                 return rte_flow_error_set(error, ENOTSUP,
1853                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1854                                           "no support for multiple VLAN "
1855                                           "actions");
1856         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1857                 return rte_flow_error_set(error, EINVAL,
1858                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1859                                           "wrong action order, port_id should "
1860                                           "be after push VLAN");
1861         if (!attr->transfer && priv->representor)
1862                 return rte_flow_error_set(error, ENOTSUP,
1863                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1864                                           "push vlan action for VF representor "
1865                                           "not supported on NIC table");
1866         (void)attr;
1867         return 0;
1868 }
1869
1870 /**
1871  * Validate the set VLAN PCP.
1872  *
1873  * @param[in] action_flags
1874  *   Holds the actions detected until now.
1875  * @param[in] actions
1876  *   Pointer to the list of actions remaining in the flow rule.
1877  * @param[out] error
1878  *   Pointer to error structure.
1879  *
1880  * @return
1881  *   0 on success, a negative errno value otherwise and rte_errno is set.
1882  */
1883 static int
1884 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1885                                      const struct rte_flow_action actions[],
1886                                      struct rte_flow_error *error)
1887 {
1888         const struct rte_flow_action *action = actions;
1889         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1890
1891         if (conf->vlan_pcp > 7)
1892                 return rte_flow_error_set(error, EINVAL,
1893                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1894                                           "VLAN PCP value is too big");
1895         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1896                 return rte_flow_error_set(error, ENOTSUP,
1897                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1898                                           "set VLAN PCP action must follow "
1899                                           "the push VLAN action");
1900         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1901                 return rte_flow_error_set(error, ENOTSUP,
1902                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1903                                           "Multiple VLAN PCP modification are "
1904                                           "not supported");
1905         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1906                 return rte_flow_error_set(error, EINVAL,
1907                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1908                                           "wrong action order, port_id should "
1909                                           "be after set VLAN PCP");
1910         return 0;
1911 }
1912
1913 /**
1914  * Validate the set VLAN VID.
1915  *
1916  * @param[in] item_flags
1917  *   Holds the items detected in this rule.
1918  * @param[in] action_flags
1919  *   Holds the actions detected until now.
1920  * @param[in] actions
1921  *   Pointer to the list of actions remaining in the flow rule.
1922  * @param[out] error
1923  *   Pointer to error structure.
1924  *
1925  * @return
1926  *   0 on success, a negative errno value otherwise and rte_errno is set.
1927  */
1928 static int
1929 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1930                                      uint64_t action_flags,
1931                                      const struct rte_flow_action actions[],
1932                                      struct rte_flow_error *error)
1933 {
1934         const struct rte_flow_action *action = actions;
1935         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1936
1937         if (conf->vlan_vid > RTE_BE16(0xFFE))
1938                 return rte_flow_error_set(error, EINVAL,
1939                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1940                                           "VLAN VID value is too big");
1941         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1942             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1943                 return rte_flow_error_set(error, ENOTSUP,
1944                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1945                                           "set VLAN VID action must follow push"
1946                                           " VLAN action or match on VLAN item");
1947         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1948                 return rte_flow_error_set(error, ENOTSUP,
1949                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1950                                           "Multiple VLAN VID modifications are "
1951                                           "not supported");
1952         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1953                 return rte_flow_error_set(error, EINVAL,
1954                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1955                                           "wrong action order, port_id should "
1956                                           "be after set VLAN VID");
1957         return 0;
1958 }
1959
1960 /*
1961  * Validate the FLAG action.
1962  *
1963  * @param[in] dev
1964  *   Pointer to the rte_eth_dev structure.
1965  * @param[in] action_flags
1966  *   Holds the actions detected until now.
1967  * @param[in] attr
1968  *   Pointer to flow attributes
1969  * @param[out] error
1970  *   Pointer to error structure.
1971  *
1972  * @return
1973  *   0 on success, a negative errno value otherwise and rte_errno is set.
1974  */
1975 static int
1976 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1977                              uint64_t action_flags,
1978                              const struct rte_flow_attr *attr,
1979                              struct rte_flow_error *error)
1980 {
1981         struct mlx5_priv *priv = dev->data->dev_private;
1982         struct mlx5_dev_config *config = &priv->config;
1983         int ret;
1984
1985         /* Fall back if no extended metadata register support. */
1986         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1987                 return mlx5_flow_validate_action_flag(action_flags, attr,
1988                                                       error);
1989         /* Extensive metadata mode requires registers. */
1990         if (!mlx5_flow_ext_mreg_supported(dev))
1991                 return rte_flow_error_set(error, ENOTSUP,
1992                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1993                                           "no metadata registers "
1994                                           "to support flag action");
1995         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1996                 return rte_flow_error_set(error, ENOTSUP,
1997                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1998                                           "extended metadata register"
1999                                           " isn't available");
2000         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2001         if (ret < 0)
2002                 return ret;
2003         MLX5_ASSERT(ret > 0);
2004         if (action_flags & MLX5_FLOW_ACTION_MARK)
2005                 return rte_flow_error_set(error, EINVAL,
2006                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2007                                           "can't mark and flag in same flow");
2008         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2009                 return rte_flow_error_set(error, EINVAL,
2010                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2011                                           "can't have 2 flag"
2012                                           " actions in same flow");
2013         return 0;
2014 }
2015
2016 /**
2017  * Validate MARK action.
2018  *
2019  * @param[in] dev
2020  *   Pointer to the rte_eth_dev structure.
2021  * @param[in] action
2022  *   Pointer to action.
2023  * @param[in] action_flags
2024  *   Holds the actions detected until now.
2025  * @param[in] attr
2026  *   Pointer to flow attributes
2027  * @param[out] error
2028  *   Pointer to error structure.
2029  *
2030  * @return
2031  *   0 on success, a negative errno value otherwise and rte_errno is set.
2032  */
2033 static int
2034 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
2035                              const struct rte_flow_action *action,
2036                              uint64_t action_flags,
2037                              const struct rte_flow_attr *attr,
2038                              struct rte_flow_error *error)
2039 {
2040         struct mlx5_priv *priv = dev->data->dev_private;
2041         struct mlx5_dev_config *config = &priv->config;
2042         const struct rte_flow_action_mark *mark = action->conf;
2043         int ret;
2044
2045         /* Fall back if no extended metadata register support. */
2046         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2047                 return mlx5_flow_validate_action_mark(action, action_flags,
2048                                                       attr, error);
2049         /* Extensive metadata mode requires registers. */
2050         if (!mlx5_flow_ext_mreg_supported(dev))
2051                 return rte_flow_error_set(error, ENOTSUP,
2052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2053                                           "no metadata registers "
2054                                           "to support mark action");
2055         if (!priv->sh->dv_mark_mask)
2056                 return rte_flow_error_set(error, ENOTSUP,
2057                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2058                                           "extended metadata register"
2059                                           " isn't available");
2060         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2061         if (ret < 0)
2062                 return ret;
2063         MLX5_ASSERT(ret > 0);
2064         if (!mark)
2065                 return rte_flow_error_set(error, EINVAL,
2066                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2067                                           "configuration cannot be null");
2068         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
2069                 return rte_flow_error_set(error, EINVAL,
2070                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2071                                           &mark->id,
2072                                           "mark id exceeds the limit");
2073         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2074                 return rte_flow_error_set(error, EINVAL,
2075                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2076                                           "can't flag and mark in same flow");
2077         if (action_flags & MLX5_FLOW_ACTION_MARK)
2078                 return rte_flow_error_set(error, EINVAL,
2079                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2080                                           "can't have 2 mark actions in same"
2081                                           " flow");
2082         return 0;
2083 }
2084
2085 /**
2086  * Validate SET_META action.
2087  *
2088  * @param[in] dev
2089  *   Pointer to the rte_eth_dev structure.
2090  * @param[in] action
2091  *   Pointer to the action structure.
2092  * @param[in] action_flags
2093  *   Holds the actions detected until now.
2094  * @param[in] attr
2095  *   Pointer to flow attributes
2096  * @param[out] error
2097  *   Pointer to error structure.
2098  *
2099  * @return
2100  *   0 on success, a negative errno value otherwise and rte_errno is set.
2101  */
2102 static int
2103 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2104                                  const struct rte_flow_action *action,
2105                                  uint64_t action_flags __rte_unused,
2106                                  const struct rte_flow_attr *attr,
2107                                  struct rte_flow_error *error)
2108 {
2109         const struct rte_flow_action_set_meta *conf;
2110         uint32_t nic_mask = UINT32_MAX;
2111         int reg;
2112
2113         if (!mlx5_flow_ext_mreg_supported(dev))
2114                 return rte_flow_error_set(error, ENOTSUP,
2115                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2116                                           "extended metadata register"
2117                                           " isn't supported");
2118         reg = flow_dv_get_metadata_reg(dev, attr, error);
2119         if (reg < 0)
2120                 return reg;
2121         if (reg != REG_A && reg != REG_B) {
2122                 struct mlx5_priv *priv = dev->data->dev_private;
2123
2124                 nic_mask = priv->sh->dv_meta_mask;
2125         }
2126         if (!(action->conf))
2127                 return rte_flow_error_set(error, EINVAL,
2128                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2129                                           "configuration cannot be null");
2130         conf = (const struct rte_flow_action_set_meta *)action->conf;
2131         if (!conf->mask)
2132                 return rte_flow_error_set(error, EINVAL,
2133                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2134                                           "zero mask doesn't have any effect");
2135         if (conf->mask & ~nic_mask)
2136                 return rte_flow_error_set(error, EINVAL,
2137                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2138                                           "meta data must be within reg C0");
2139         return 0;
2140 }
2141
2142 /**
2143  * Validate SET_TAG action.
2144  *
2145  * @param[in] dev
2146  *   Pointer to the rte_eth_dev structure.
2147  * @param[in] action
2148  *   Pointer to the action structure.
2149  * @param[in] action_flags
2150  *   Holds the actions detected until now.
2151  * @param[in] attr
2152  *   Pointer to flow attributes
2153  * @param[out] error
2154  *   Pointer to error structure.
2155  *
2156  * @return
2157  *   0 on success, a negative errno value otherwise and rte_errno is set.
2158  */
2159 static int
2160 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2161                                 const struct rte_flow_action *action,
2162                                 uint64_t action_flags,
2163                                 const struct rte_flow_attr *attr,
2164                                 struct rte_flow_error *error)
2165 {
2166         const struct rte_flow_action_set_tag *conf;
2167         const uint64_t terminal_action_flags =
2168                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2169                 MLX5_FLOW_ACTION_RSS;
2170         int ret;
2171
2172         if (!mlx5_flow_ext_mreg_supported(dev))
2173                 return rte_flow_error_set(error, ENOTSUP,
2174                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2175                                           "extensive metadata register"
2176                                           " isn't supported");
2177         if (!(action->conf))
2178                 return rte_flow_error_set(error, EINVAL,
2179                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2180                                           "configuration cannot be null");
2181         conf = (const struct rte_flow_action_set_tag *)action->conf;
2182         if (!conf->mask)
2183                 return rte_flow_error_set(error, EINVAL,
2184                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2185                                           "zero mask doesn't have any effect");
2186         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2187         if (ret < 0)
2188                 return ret;
2189         if (!attr->transfer && attr->ingress &&
2190             (action_flags & terminal_action_flags))
2191                 return rte_flow_error_set(error, EINVAL,
2192                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2193                                           "set_tag has no effect"
2194                                           " with terminal actions");
2195         return 0;
2196 }
2197
2198 /**
2199  * Validate count action.
2200  *
2201  * @param[in] dev
2202  *   Pointer to rte_eth_dev structure.
2203  * @param[out] error
2204  *   Pointer to error structure.
2205  *
2206  * @return
2207  *   0 on success, a negative errno value otherwise and rte_errno is set.
2208  */
2209 static int
2210 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2211                               struct rte_flow_error *error)
2212 {
2213         struct mlx5_priv *priv = dev->data->dev_private;
2214
2215         if (!priv->config.devx)
2216                 goto notsup_err;
2217 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2218         return 0;
2219 #endif
2220 notsup_err:
2221         return rte_flow_error_set
2222                       (error, ENOTSUP,
2223                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2224                        NULL,
2225                        "count action not supported");
2226 }
2227
2228 /**
2229  * Validate the L2 encap action.
2230  *
2231  * @param[in] dev
2232  *   Pointer to the rte_eth_dev structure.
2233  * @param[in] action_flags
2234  *   Holds the actions detected until now.
2235  * @param[in] action
2236  *   Pointer to the action structure.
2237  * @param[in] attr
2238  *   Pointer to flow attributes.
2239  * @param[out] error
2240  *   Pointer to error structure.
2241  *
2242  * @return
2243  *   0 on success, a negative errno value otherwise and rte_errno is set.
2244  */
2245 static int
2246 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
2247                                  uint64_t action_flags,
2248                                  const struct rte_flow_action *action,
2249                                  const struct rte_flow_attr *attr,
2250                                  struct rte_flow_error *error)
2251 {
2252         const struct mlx5_priv *priv = dev->data->dev_private;
2253
2254         if (!(action->conf))
2255                 return rte_flow_error_set(error, EINVAL,
2256                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2257                                           "configuration cannot be null");
2258         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
2259                 return rte_flow_error_set(error, EINVAL,
2260                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2261                                           "can only have a single encap action "
2262                                           "in a flow");
2263         if (!attr->transfer && priv->representor)
2264                 return rte_flow_error_set(error, ENOTSUP,
2265                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2266                                           "encap action for VF representor "
2267                                           "not supported on NIC table");
2268         return 0;
2269 }
2270
2271 /**
2272  * Validate a decap action.
2273  *
2274  * @param[in] dev
2275  *   Pointer to the rte_eth_dev structure.
2276  * @param[in] action_flags
2277  *   Holds the actions detected until now.
2278  * @param[in] attr
2279  *   Pointer to flow attributes
2280  * @param[out] error
2281  *   Pointer to error structure.
2282  *
2283  * @return
2284  *   0 on success, a negative errno value otherwise and rte_errno is set.
2285  */
2286 static int
2287 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
2288                               uint64_t action_flags,
2289                               const struct rte_flow_attr *attr,
2290                               struct rte_flow_error *error)
2291 {
2292         const struct mlx5_priv *priv = dev->data->dev_private;
2293
2294         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
2295                 return rte_flow_error_set(error, ENOTSUP,
2296                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2297                                           action_flags &
2298                                           MLX5_FLOW_ACTION_DECAP ? "can only "
2299                                           "have a single decap action" : "decap "
2300                                           "after encap is not supported");
2301         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2302                 return rte_flow_error_set(error, EINVAL,
2303                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2304                                           "can't have decap action after"
2305                                           " modify action");
2306         if (attr->egress)
2307                 return rte_flow_error_set(error, ENOTSUP,
2308                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2309                                           NULL,
2310                                           "decap action not supported for "
2311                                           "egress");
2312         if (!attr->transfer && priv->representor)
2313                 return rte_flow_error_set(error, ENOTSUP,
2314                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2315                                           "decap action for VF representor "
2316                                           "not supported on NIC table");
2317         return 0;
2318 }
2319
2320 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
2321
2322 /**
2323  * Validate the raw encap and decap actions.
2324  *
2325  * @param[in] dev
2326  *   Pointer to the rte_eth_dev structure.
2327  * @param[in] decap
2328  *   Pointer to the decap action.
2329  * @param[in] encap
2330  *   Pointer to the encap action.
2331  * @param[in] attr
2332  *   Pointer to flow attributes
2333  * @param[in/out] action_flags
2334  *   Holds the actions detected until now.
2335  * @param[out] actions_n
2336  *   pointer to the number of actions counter.
2337  * @param[out] error
2338  *   Pointer to error structure.
2339  *
2340  * @return
2341  *   0 on success, a negative errno value otherwise and rte_errno is set.
2342  */
2343 static int
2344 flow_dv_validate_action_raw_encap_decap
2345         (struct rte_eth_dev *dev,
2346          const struct rte_flow_action_raw_decap *decap,
2347          const struct rte_flow_action_raw_encap *encap,
2348          const struct rte_flow_attr *attr, uint64_t *action_flags,
2349          int *actions_n, struct rte_flow_error *error)
2350 {
2351         const struct mlx5_priv *priv = dev->data->dev_private;
2352         int ret;
2353
2354         if (encap && (!encap->size || !encap->data))
2355                 return rte_flow_error_set(error, EINVAL,
2356                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2357                                           "raw encap data cannot be empty");
2358         if (decap && encap) {
2359                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
2360                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2361                         /* L3 encap. */
2362                         decap = NULL;
2363                 else if (encap->size <=
2364                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2365                            decap->size >
2366                            MLX5_ENCAPSULATION_DECISION_SIZE)
2367                         /* L3 decap. */
2368                         encap = NULL;
2369                 else if (encap->size >
2370                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2371                            decap->size >
2372                            MLX5_ENCAPSULATION_DECISION_SIZE)
2373                         /* 2 L2 actions: encap and decap. */
2374                         ;
2375                 else
2376                         return rte_flow_error_set(error,
2377                                 ENOTSUP,
2378                                 RTE_FLOW_ERROR_TYPE_ACTION,
2379                                 NULL, "unsupported too small "
2380                                 "raw decap and too small raw "
2381                                 "encap combination");
2382         }
2383         if (decap) {
2384                 ret = flow_dv_validate_action_decap(dev, *action_flags, attr,
2385                                                     error);
2386                 if (ret < 0)
2387                         return ret;
2388                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
2389                 ++(*actions_n);
2390         }
2391         if (encap) {
2392                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
2393                         return rte_flow_error_set(error, ENOTSUP,
2394                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2395                                                   NULL,
2396                                                   "small raw encap size");
2397                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
2398                         return rte_flow_error_set(error, EINVAL,
2399                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2400                                                   NULL,
2401                                                   "more than one encap action");
2402                 if (!attr->transfer && priv->representor)
2403                         return rte_flow_error_set
2404                                         (error, ENOTSUP,
2405                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2406                                          "encap action for VF representor "
2407                                          "not supported on NIC table");
2408                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
2409                 ++(*actions_n);
2410         }
2411         return 0;
2412 }
2413
2414 /**
2415  * Find existing encap/decap resource or create and register a new one.
2416  *
2417  * @param[in, out] dev
2418  *   Pointer to rte_eth_dev structure.
2419  * @param[in, out] resource
2420  *   Pointer to encap/decap resource.
2421  * @parm[in, out] dev_flow
2422  *   Pointer to the dev_flow.
2423  * @param[out] error
2424  *   pointer to error structure.
2425  *
2426  * @return
2427  *   0 on success otherwise -errno and errno is set.
2428  */
2429 static int
2430 flow_dv_encap_decap_resource_register
2431                         (struct rte_eth_dev *dev,
2432                          struct mlx5_flow_dv_encap_decap_resource *resource,
2433                          struct mlx5_flow *dev_flow,
2434                          struct rte_flow_error *error)
2435 {
2436         struct mlx5_priv *priv = dev->data->dev_private;
2437         struct mlx5_ibv_shared *sh = priv->sh;
2438         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2439         struct mlx5dv_dr_domain *domain;
2440
2441         resource->flags = dev_flow->dv.group ? 0 : 1;
2442         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2443                 domain = sh->fdb_domain;
2444         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2445                 domain = sh->rx_domain;
2446         else
2447                 domain = sh->tx_domain;
2448         /* Lookup a matching resource from cache. */
2449         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2450                 if (resource->reformat_type == cache_resource->reformat_type &&
2451                     resource->ft_type == cache_resource->ft_type &&
2452                     resource->flags == cache_resource->flags &&
2453                     resource->size == cache_resource->size &&
2454                     !memcmp((const void *)resource->buf,
2455                             (const void *)cache_resource->buf,
2456                             resource->size)) {
2457                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2458                                 (void *)cache_resource,
2459                                 rte_atomic32_read(&cache_resource->refcnt));
2460                         rte_atomic32_inc(&cache_resource->refcnt);
2461                         dev_flow->handle->dvh.encap_decap = cache_resource;
2462                         return 0;
2463                 }
2464         }
2465         /* Register new encap/decap resource. */
2466         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2467         if (!cache_resource)
2468                 return rte_flow_error_set(error, ENOMEM,
2469                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2470                                           "cannot allocate resource memory");
2471         *cache_resource = *resource;
2472         cache_resource->verbs_action =
2473                 mlx5_glue->dv_create_flow_action_packet_reformat
2474                         (sh->ctx, cache_resource->reformat_type,
2475                          cache_resource->ft_type, domain, cache_resource->flags,
2476                          cache_resource->size,
2477                          (cache_resource->size ? cache_resource->buf : NULL));
2478         if (!cache_resource->verbs_action) {
2479                 rte_free(cache_resource);
2480                 return rte_flow_error_set(error, ENOMEM,
2481                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2482                                           NULL, "cannot create action");
2483         }
2484         rte_atomic32_init(&cache_resource->refcnt);
2485         rte_atomic32_inc(&cache_resource->refcnt);
2486         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2487         dev_flow->handle->dvh.encap_decap = cache_resource;
2488         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2489                 (void *)cache_resource,
2490                 rte_atomic32_read(&cache_resource->refcnt));
2491         return 0;
2492 }
2493
2494 /**
2495  * Find existing table jump resource or create and register a new one.
2496  *
2497  * @param[in, out] dev
2498  *   Pointer to rte_eth_dev structure.
2499  * @param[in, out] tbl
2500  *   Pointer to flow table resource.
2501  * @parm[in, out] dev_flow
2502  *   Pointer to the dev_flow.
2503  * @param[out] error
2504  *   pointer to error structure.
2505  *
2506  * @return
2507  *   0 on success otherwise -errno and errno is set.
2508  */
2509 static int
2510 flow_dv_jump_tbl_resource_register
2511                         (struct rte_eth_dev *dev __rte_unused,
2512                          struct mlx5_flow_tbl_resource *tbl,
2513                          struct mlx5_flow *dev_flow,
2514                          struct rte_flow_error *error)
2515 {
2516         struct mlx5_flow_tbl_data_entry *tbl_data =
2517                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2518         int cnt;
2519
2520         MLX5_ASSERT(tbl);
2521         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2522         if (!cnt) {
2523                 tbl_data->jump.action =
2524                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2525                         (tbl->obj);
2526                 if (!tbl_data->jump.action)
2527                         return rte_flow_error_set(error, ENOMEM,
2528                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2529                                         NULL, "cannot create jump action");
2530                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2531                         (void *)&tbl_data->jump, cnt);
2532         } else {
2533                 MLX5_ASSERT(tbl_data->jump.action);
2534                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2535                         (void *)&tbl_data->jump, cnt);
2536         }
2537         rte_atomic32_inc(&tbl_data->jump.refcnt);
2538         dev_flow->handle->dvh.jump = &tbl_data->jump;
2539         return 0;
2540 }
2541
2542 /**
2543  * Find existing table port ID resource or create and register a new one.
2544  *
2545  * @param[in, out] dev
2546  *   Pointer to rte_eth_dev structure.
2547  * @param[in, out] resource
2548  *   Pointer to port ID action resource.
2549  * @parm[in, out] dev_flow
2550  *   Pointer to the dev_flow.
2551  * @param[out] error
2552  *   pointer to error structure.
2553  *
2554  * @return
2555  *   0 on success otherwise -errno and errno is set.
2556  */
2557 static int
2558 flow_dv_port_id_action_resource_register
2559                         (struct rte_eth_dev *dev,
2560                          struct mlx5_flow_dv_port_id_action_resource *resource,
2561                          struct mlx5_flow *dev_flow,
2562                          struct rte_flow_error *error)
2563 {
2564         struct mlx5_priv *priv = dev->data->dev_private;
2565         struct mlx5_ibv_shared *sh = priv->sh;
2566         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2567
2568         /* Lookup a matching resource from cache. */
2569         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2570                 if (resource->port_id == cache_resource->port_id) {
2571                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2572                                 "refcnt %d++",
2573                                 (void *)cache_resource,
2574                                 rte_atomic32_read(&cache_resource->refcnt));
2575                         rte_atomic32_inc(&cache_resource->refcnt);
2576                         dev_flow->handle->dvh.port_id_action = cache_resource;
2577                         return 0;
2578                 }
2579         }
2580         /* Register new port id action resource. */
2581         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2582         if (!cache_resource)
2583                 return rte_flow_error_set(error, ENOMEM,
2584                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2585                                           "cannot allocate resource memory");
2586         *cache_resource = *resource;
2587         /*
2588          * Depending on rdma_core version the glue routine calls
2589          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2590          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2591          */
2592         cache_resource->action =
2593                 mlx5_glue->dr_create_flow_action_dest_port
2594                         (priv->sh->fdb_domain, resource->port_id);
2595         if (!cache_resource->action) {
2596                 rte_free(cache_resource);
2597                 return rte_flow_error_set(error, ENOMEM,
2598                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2599                                           NULL, "cannot create action");
2600         }
2601         rte_atomic32_init(&cache_resource->refcnt);
2602         rte_atomic32_inc(&cache_resource->refcnt);
2603         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2604         dev_flow->handle->dvh.port_id_action = cache_resource;
2605         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2606                 (void *)cache_resource,
2607                 rte_atomic32_read(&cache_resource->refcnt));
2608         return 0;
2609 }
2610
2611 /**
2612  * Find existing push vlan resource or create and register a new one.
2613  *
2614  * @param [in, out] dev
2615  *   Pointer to rte_eth_dev structure.
2616  * @param[in, out] resource
2617  *   Pointer to port ID action resource.
2618  * @parm[in, out] dev_flow
2619  *   Pointer to the dev_flow.
2620  * @param[out] error
2621  *   pointer to error structure.
2622  *
2623  * @return
2624  *   0 on success otherwise -errno and errno is set.
2625  */
2626 static int
2627 flow_dv_push_vlan_action_resource_register
2628                        (struct rte_eth_dev *dev,
2629                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2630                         struct mlx5_flow *dev_flow,
2631                         struct rte_flow_error *error)
2632 {
2633         struct mlx5_priv *priv = dev->data->dev_private;
2634         struct mlx5_ibv_shared *sh = priv->sh;
2635         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2636         struct mlx5dv_dr_domain *domain;
2637
2638         /* Lookup a matching resource from cache. */
2639         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2640                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2641                     resource->ft_type == cache_resource->ft_type) {
2642                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2643                                 "refcnt %d++",
2644                                 (void *)cache_resource,
2645                                 rte_atomic32_read(&cache_resource->refcnt));
2646                         rte_atomic32_inc(&cache_resource->refcnt);
2647                         dev_flow->handle->dvh.push_vlan_res = cache_resource;
2648                         return 0;
2649                 }
2650         }
2651         /* Register new push_vlan action resource. */
2652         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2653         if (!cache_resource)
2654                 return rte_flow_error_set(error, ENOMEM,
2655                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2656                                           "cannot allocate resource memory");
2657         *cache_resource = *resource;
2658         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2659                 domain = sh->fdb_domain;
2660         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2661                 domain = sh->rx_domain;
2662         else
2663                 domain = sh->tx_domain;
2664         cache_resource->action =
2665                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2666                                                            resource->vlan_tag);
2667         if (!cache_resource->action) {
2668                 rte_free(cache_resource);
2669                 return rte_flow_error_set(error, ENOMEM,
2670                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2671                                           NULL, "cannot create action");
2672         }
2673         rte_atomic32_init(&cache_resource->refcnt);
2674         rte_atomic32_inc(&cache_resource->refcnt);
2675         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2676         dev_flow->handle->dvh.push_vlan_res = cache_resource;
2677         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2678                 (void *)cache_resource,
2679                 rte_atomic32_read(&cache_resource->refcnt));
2680         return 0;
2681 }
2682 /**
2683  * Get the size of specific rte_flow_item_type
2684  *
2685  * @param[in] item_type
2686  *   Tested rte_flow_item_type.
2687  *
2688  * @return
2689  *   sizeof struct item_type, 0 if void or irrelevant.
2690  */
2691 static size_t
2692 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2693 {
2694         size_t retval;
2695
2696         switch (item_type) {
2697         case RTE_FLOW_ITEM_TYPE_ETH:
2698                 retval = sizeof(struct rte_flow_item_eth);
2699                 break;
2700         case RTE_FLOW_ITEM_TYPE_VLAN:
2701                 retval = sizeof(struct rte_flow_item_vlan);
2702                 break;
2703         case RTE_FLOW_ITEM_TYPE_IPV4:
2704                 retval = sizeof(struct rte_flow_item_ipv4);
2705                 break;
2706         case RTE_FLOW_ITEM_TYPE_IPV6:
2707                 retval = sizeof(struct rte_flow_item_ipv6);
2708                 break;
2709         case RTE_FLOW_ITEM_TYPE_UDP:
2710                 retval = sizeof(struct rte_flow_item_udp);
2711                 break;
2712         case RTE_FLOW_ITEM_TYPE_TCP:
2713                 retval = sizeof(struct rte_flow_item_tcp);
2714                 break;
2715         case RTE_FLOW_ITEM_TYPE_VXLAN:
2716                 retval = sizeof(struct rte_flow_item_vxlan);
2717                 break;
2718         case RTE_FLOW_ITEM_TYPE_GRE:
2719                 retval = sizeof(struct rte_flow_item_gre);
2720                 break;
2721         case RTE_FLOW_ITEM_TYPE_NVGRE:
2722                 retval = sizeof(struct rte_flow_item_nvgre);
2723                 break;
2724         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2725                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2726                 break;
2727         case RTE_FLOW_ITEM_TYPE_MPLS:
2728                 retval = sizeof(struct rte_flow_item_mpls);
2729                 break;
2730         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2731         default:
2732                 retval = 0;
2733                 break;
2734         }
2735         return retval;
2736 }
2737
2738 #define MLX5_ENCAP_IPV4_VERSION         0x40
2739 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2740 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2741 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2742 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2743 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2744 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2745
2746 /**
2747  * Convert the encap action data from list of rte_flow_item to raw buffer
2748  *
2749  * @param[in] items
2750  *   Pointer to rte_flow_item objects list.
2751  * @param[out] buf
2752  *   Pointer to the output buffer.
2753  * @param[out] size
2754  *   Pointer to the output buffer size.
2755  * @param[out] error
2756  *   Pointer to the error structure.
2757  *
2758  * @return
2759  *   0 on success, a negative errno value otherwise and rte_errno is set.
2760  */
2761 static int
2762 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2763                            size_t *size, struct rte_flow_error *error)
2764 {
2765         struct rte_ether_hdr *eth = NULL;
2766         struct rte_vlan_hdr *vlan = NULL;
2767         struct rte_ipv4_hdr *ipv4 = NULL;
2768         struct rte_ipv6_hdr *ipv6 = NULL;
2769         struct rte_udp_hdr *udp = NULL;
2770         struct rte_vxlan_hdr *vxlan = NULL;
2771         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2772         struct rte_gre_hdr *gre = NULL;
2773         size_t len;
2774         size_t temp_size = 0;
2775
2776         if (!items)
2777                 return rte_flow_error_set(error, EINVAL,
2778                                           RTE_FLOW_ERROR_TYPE_ACTION,
2779                                           NULL, "invalid empty data");
2780         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2781                 len = flow_dv_get_item_len(items->type);
2782                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2783                         return rte_flow_error_set(error, EINVAL,
2784                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2785                                                   (void *)items->type,
2786                                                   "items total size is too big"
2787                                                   " for encap action");
2788                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2789                 switch (items->type) {
2790                 case RTE_FLOW_ITEM_TYPE_ETH:
2791                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2792                         break;
2793                 case RTE_FLOW_ITEM_TYPE_VLAN:
2794                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2795                         if (!eth)
2796                                 return rte_flow_error_set(error, EINVAL,
2797                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2798                                                 (void *)items->type,
2799                                                 "eth header not found");
2800                         if (!eth->ether_type)
2801                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2802                         break;
2803                 case RTE_FLOW_ITEM_TYPE_IPV4:
2804                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2805                         if (!vlan && !eth)
2806                                 return rte_flow_error_set(error, EINVAL,
2807                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2808                                                 (void *)items->type,
2809                                                 "neither eth nor vlan"
2810                                                 " header found");
2811                         if (vlan && !vlan->eth_proto)
2812                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2813                         else if (eth && !eth->ether_type)
2814                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2815                         if (!ipv4->version_ihl)
2816                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2817                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2818                         if (!ipv4->time_to_live)
2819                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2820                         break;
2821                 case RTE_FLOW_ITEM_TYPE_IPV6:
2822                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2823                         if (!vlan && !eth)
2824                                 return rte_flow_error_set(error, EINVAL,
2825                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2826                                                 (void *)items->type,
2827                                                 "neither eth nor vlan"
2828                                                 " header found");
2829                         if (vlan && !vlan->eth_proto)
2830                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2831                         else if (eth && !eth->ether_type)
2832                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2833                         if (!ipv6->vtc_flow)
2834                                 ipv6->vtc_flow =
2835                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2836                         if (!ipv6->hop_limits)
2837                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2838                         break;
2839                 case RTE_FLOW_ITEM_TYPE_UDP:
2840                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2841                         if (!ipv4 && !ipv6)
2842                                 return rte_flow_error_set(error, EINVAL,
2843                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2844                                                 (void *)items->type,
2845                                                 "ip header not found");
2846                         if (ipv4 && !ipv4->next_proto_id)
2847                                 ipv4->next_proto_id = IPPROTO_UDP;
2848                         else if (ipv6 && !ipv6->proto)
2849                                 ipv6->proto = IPPROTO_UDP;
2850                         break;
2851                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2852                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2853                         if (!udp)
2854                                 return rte_flow_error_set(error, EINVAL,
2855                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2856                                                 (void *)items->type,
2857                                                 "udp header not found");
2858                         if (!udp->dst_port)
2859                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2860                         if (!vxlan->vx_flags)
2861                                 vxlan->vx_flags =
2862                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2863                         break;
2864                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2865                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2866                         if (!udp)
2867                                 return rte_flow_error_set(error, EINVAL,
2868                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2869                                                 (void *)items->type,
2870                                                 "udp header not found");
2871                         if (!vxlan_gpe->proto)
2872                                 return rte_flow_error_set(error, EINVAL,
2873                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2874                                                 (void *)items->type,
2875                                                 "next protocol not found");
2876                         if (!udp->dst_port)
2877                                 udp->dst_port =
2878                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2879                         if (!vxlan_gpe->vx_flags)
2880                                 vxlan_gpe->vx_flags =
2881                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2882                         break;
2883                 case RTE_FLOW_ITEM_TYPE_GRE:
2884                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2885                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2886                         if (!gre->proto)
2887                                 return rte_flow_error_set(error, EINVAL,
2888                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2889                                                 (void *)items->type,
2890                                                 "next protocol not found");
2891                         if (!ipv4 && !ipv6)
2892                                 return rte_flow_error_set(error, EINVAL,
2893                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2894                                                 (void *)items->type,
2895                                                 "ip header not found");
2896                         if (ipv4 && !ipv4->next_proto_id)
2897                                 ipv4->next_proto_id = IPPROTO_GRE;
2898                         else if (ipv6 && !ipv6->proto)
2899                                 ipv6->proto = IPPROTO_GRE;
2900                         break;
2901                 case RTE_FLOW_ITEM_TYPE_VOID:
2902                         break;
2903                 default:
2904                         return rte_flow_error_set(error, EINVAL,
2905                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2906                                                   (void *)items->type,
2907                                                   "unsupported item type");
2908                         break;
2909                 }
2910                 temp_size += len;
2911         }
2912         *size = temp_size;
2913         return 0;
2914 }
2915
2916 static int
2917 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2918 {
2919         struct rte_ether_hdr *eth = NULL;
2920         struct rte_vlan_hdr *vlan = NULL;
2921         struct rte_ipv6_hdr *ipv6 = NULL;
2922         struct rte_udp_hdr *udp = NULL;
2923         char *next_hdr;
2924         uint16_t proto;
2925
2926         eth = (struct rte_ether_hdr *)data;
2927         next_hdr = (char *)(eth + 1);
2928         proto = RTE_BE16(eth->ether_type);
2929
2930         /* VLAN skipping */
2931         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2932                 vlan = (struct rte_vlan_hdr *)next_hdr;
2933                 proto = RTE_BE16(vlan->eth_proto);
2934                 next_hdr += sizeof(struct rte_vlan_hdr);
2935         }
2936
2937         /* HW calculates IPv4 csum. no need to proceed */
2938         if (proto == RTE_ETHER_TYPE_IPV4)
2939                 return 0;
2940
2941         /* non IPv4/IPv6 header. not supported */
2942         if (proto != RTE_ETHER_TYPE_IPV6) {
2943                 return rte_flow_error_set(error, ENOTSUP,
2944                                           RTE_FLOW_ERROR_TYPE_ACTION,
2945                                           NULL, "Cannot offload non IPv4/IPv6");
2946         }
2947
2948         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2949
2950         /* ignore non UDP */
2951         if (ipv6->proto != IPPROTO_UDP)
2952                 return 0;
2953
2954         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2955         udp->dgram_cksum = 0;
2956
2957         return 0;
2958 }
2959
2960 /**
2961  * Convert L2 encap action to DV specification.
2962  *
2963  * @param[in] dev
2964  *   Pointer to rte_eth_dev structure.
2965  * @param[in] action
2966  *   Pointer to action structure.
2967  * @param[in, out] dev_flow
2968  *   Pointer to the mlx5_flow.
2969  * @param[in] transfer
2970  *   Mark if the flow is E-Switch flow.
2971  * @param[out] error
2972  *   Pointer to the error structure.
2973  *
2974  * @return
2975  *   0 on success, a negative errno value otherwise and rte_errno is set.
2976  */
2977 static int
2978 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2979                                const struct rte_flow_action *action,
2980                                struct mlx5_flow *dev_flow,
2981                                uint8_t transfer,
2982                                struct rte_flow_error *error)
2983 {
2984         const struct rte_flow_item *encap_data;
2985         const struct rte_flow_action_raw_encap *raw_encap_data;
2986         struct mlx5_flow_dv_encap_decap_resource res = {
2987                 .reformat_type =
2988                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2989                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2990                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2991         };
2992
2993         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2994                 raw_encap_data =
2995                         (const struct rte_flow_action_raw_encap *)action->conf;
2996                 res.size = raw_encap_data->size;
2997                 memcpy(res.buf, raw_encap_data->data, res.size);
2998         } else {
2999                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
3000                         encap_data =
3001                                 ((const struct rte_flow_action_vxlan_encap *)
3002                                                 action->conf)->definition;
3003                 else
3004                         encap_data =
3005                                 ((const struct rte_flow_action_nvgre_encap *)
3006                                                 action->conf)->definition;
3007                 if (flow_dv_convert_encap_data(encap_data, res.buf,
3008                                                &res.size, error))
3009                         return -rte_errno;
3010         }
3011         if (flow_dv_zero_encap_udp_csum(res.buf, error))
3012                 return -rte_errno;
3013         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3014                 return rte_flow_error_set(error, EINVAL,
3015                                           RTE_FLOW_ERROR_TYPE_ACTION,
3016                                           NULL, "can't create L2 encap action");
3017         return 0;
3018 }
3019
3020 /**
3021  * Convert L2 decap action to DV specification.
3022  *
3023  * @param[in] dev
3024  *   Pointer to rte_eth_dev structure.
3025  * @param[in, out] dev_flow
3026  *   Pointer to the mlx5_flow.
3027  * @param[in] transfer
3028  *   Mark if the flow is E-Switch flow.
3029  * @param[out] error
3030  *   Pointer to the error structure.
3031  *
3032  * @return
3033  *   0 on success, a negative errno value otherwise and rte_errno is set.
3034  */
3035 static int
3036 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
3037                                struct mlx5_flow *dev_flow,
3038                                uint8_t transfer,
3039                                struct rte_flow_error *error)
3040 {
3041         struct mlx5_flow_dv_encap_decap_resource res = {
3042                 .size = 0,
3043                 .reformat_type =
3044                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
3045                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
3046                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
3047         };
3048
3049         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3050                 return rte_flow_error_set(error, EINVAL,
3051                                           RTE_FLOW_ERROR_TYPE_ACTION,
3052                                           NULL, "can't create L2 decap action");
3053         return 0;
3054 }
3055
3056 /**
3057  * Convert raw decap/encap (L3 tunnel) action to DV specification.
3058  *
3059  * @param[in] dev
3060  *   Pointer to rte_eth_dev structure.
3061  * @param[in] action
3062  *   Pointer to action structure.
3063  * @param[in, out] dev_flow
3064  *   Pointer to the mlx5_flow.
3065  * @param[in] attr
3066  *   Pointer to the flow attributes.
3067  * @param[out] error
3068  *   Pointer to the error structure.
3069  *
3070  * @return
3071  *   0 on success, a negative errno value otherwise and rte_errno is set.
3072  */
3073 static int
3074 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
3075                                 const struct rte_flow_action *action,
3076                                 struct mlx5_flow *dev_flow,
3077                                 const struct rte_flow_attr *attr,
3078                                 struct rte_flow_error *error)
3079 {
3080         const struct rte_flow_action_raw_encap *encap_data;
3081         struct mlx5_flow_dv_encap_decap_resource res;
3082
3083         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3084         res.size = encap_data->size;
3085         memcpy(res.buf, encap_data->data, res.size);
3086         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3087                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3088                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3089         if (attr->transfer)
3090                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3091         else
3092                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3093                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3094         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3095                 return rte_flow_error_set(error, EINVAL,
3096                                           RTE_FLOW_ERROR_TYPE_ACTION,
3097                                           NULL, "can't create encap action");
3098         return 0;
3099 }
3100
3101 /**
3102  * Create action push VLAN.
3103  *
3104  * @param[in] dev
3105  *   Pointer to rte_eth_dev structure.
3106  * @param[in] attr
3107  *   Pointer to the flow attributes.
3108  * @param[in] vlan
3109  *   Pointer to the vlan to push to the Ethernet header.
3110  * @param[in, out] dev_flow
3111  *   Pointer to the mlx5_flow.
3112  * @param[out] error
3113  *   Pointer to the error structure.
3114  *
3115  * @return
3116  *   0 on success, a negative errno value otherwise and rte_errno is set.
3117  */
3118 static int
3119 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3120                                 const struct rte_flow_attr *attr,
3121                                 const struct rte_vlan_hdr *vlan,
3122                                 struct mlx5_flow *dev_flow,
3123                                 struct rte_flow_error *error)
3124 {
3125         struct mlx5_flow_dv_push_vlan_action_resource res;
3126
3127         res.vlan_tag =
3128                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3129                                  vlan->vlan_tci);
3130         if (attr->transfer)
3131                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3132         else
3133                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3134                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3135         return flow_dv_push_vlan_action_resource_register
3136                                             (dev, &res, dev_flow, error);
3137 }
3138
3139 /**
3140  * Validate the modify-header actions.
3141  *
3142  * @param[in] action_flags
3143  *   Holds the actions detected until now.
3144  * @param[in] action
3145  *   Pointer to the modify action.
3146  * @param[out] error
3147  *   Pointer to error structure.
3148  *
3149  * @return
3150  *   0 on success, a negative errno value otherwise and rte_errno is set.
3151  */
3152 static int
3153 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3154                                    const struct rte_flow_action *action,
3155                                    struct rte_flow_error *error)
3156 {
3157         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3158                 return rte_flow_error_set(error, EINVAL,
3159                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3160                                           NULL, "action configuration not set");
3161         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3162                 return rte_flow_error_set(error, EINVAL,
3163                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3164                                           "can't have encap action before"
3165                                           " modify action");
3166         return 0;
3167 }
3168
3169 /**
3170  * Validate the modify-header MAC address actions.
3171  *
3172  * @param[in] action_flags
3173  *   Holds the actions detected until now.
3174  * @param[in] action
3175  *   Pointer to the modify action.
3176  * @param[in] item_flags
3177  *   Holds the items detected.
3178  * @param[out] error
3179  *   Pointer to error structure.
3180  *
3181  * @return
3182  *   0 on success, a negative errno value otherwise and rte_errno is set.
3183  */
3184 static int
3185 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3186                                    const struct rte_flow_action *action,
3187                                    const uint64_t item_flags,
3188                                    struct rte_flow_error *error)
3189 {
3190         int ret = 0;
3191
3192         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3193         if (!ret) {
3194                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3195                         return rte_flow_error_set(error, EINVAL,
3196                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3197                                                   NULL,
3198                                                   "no L2 item in pattern");
3199         }
3200         return ret;
3201 }
3202
3203 /**
3204  * Validate the modify-header IPv4 address actions.
3205  *
3206  * @param[in] action_flags
3207  *   Holds the actions detected until now.
3208  * @param[in] action
3209  *   Pointer to the modify action.
3210  * @param[in] item_flags
3211  *   Holds the items detected.
3212  * @param[out] error
3213  *   Pointer to error structure.
3214  *
3215  * @return
3216  *   0 on success, a negative errno value otherwise and rte_errno is set.
3217  */
3218 static int
3219 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3220                                     const struct rte_flow_action *action,
3221                                     const uint64_t item_flags,
3222                                     struct rte_flow_error *error)
3223 {
3224         int ret = 0;
3225         uint64_t layer;
3226
3227         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3228         if (!ret) {
3229                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3230                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3231                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3232                 if (!(item_flags & layer))
3233                         return rte_flow_error_set(error, EINVAL,
3234                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3235                                                   NULL,
3236                                                   "no ipv4 item in pattern");
3237         }
3238         return ret;
3239 }
3240
3241 /**
3242  * Validate the modify-header IPv6 address actions.
3243  *
3244  * @param[in] action_flags
3245  *   Holds the actions detected until now.
3246  * @param[in] action
3247  *   Pointer to the modify action.
3248  * @param[in] item_flags
3249  *   Holds the items detected.
3250  * @param[out] error
3251  *   Pointer to error structure.
3252  *
3253  * @return
3254  *   0 on success, a negative errno value otherwise and rte_errno is set.
3255  */
3256 static int
3257 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3258                                     const struct rte_flow_action *action,
3259                                     const uint64_t item_flags,
3260                                     struct rte_flow_error *error)
3261 {
3262         int ret = 0;
3263         uint64_t layer;
3264
3265         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3266         if (!ret) {
3267                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3268                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3269                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3270                 if (!(item_flags & layer))
3271                         return rte_flow_error_set(error, EINVAL,
3272                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3273                                                   NULL,
3274                                                   "no ipv6 item in pattern");
3275         }
3276         return ret;
3277 }
3278
3279 /**
3280  * Validate the modify-header TP actions.
3281  *
3282  * @param[in] action_flags
3283  *   Holds the actions detected until now.
3284  * @param[in] action
3285  *   Pointer to the modify action.
3286  * @param[in] item_flags
3287  *   Holds the items detected.
3288  * @param[out] error
3289  *   Pointer to error structure.
3290  *
3291  * @return
3292  *   0 on success, a negative errno value otherwise and rte_errno is set.
3293  */
3294 static int
3295 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3296                                   const struct rte_flow_action *action,
3297                                   const uint64_t item_flags,
3298                                   struct rte_flow_error *error)
3299 {
3300         int ret = 0;
3301         uint64_t layer;
3302
3303         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3304         if (!ret) {
3305                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3306                                  MLX5_FLOW_LAYER_INNER_L4 :
3307                                  MLX5_FLOW_LAYER_OUTER_L4;
3308                 if (!(item_flags & layer))
3309                         return rte_flow_error_set(error, EINVAL,
3310                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3311                                                   NULL, "no transport layer "
3312                                                   "in pattern");
3313         }
3314         return ret;
3315 }
3316
3317 /**
3318  * Validate the modify-header actions of increment/decrement
3319  * TCP Sequence-number.
3320  *
3321  * @param[in] action_flags
3322  *   Holds the actions detected until now.
3323  * @param[in] action
3324  *   Pointer to the modify action.
3325  * @param[in] item_flags
3326  *   Holds the items detected.
3327  * @param[out] error
3328  *   Pointer to error structure.
3329  *
3330  * @return
3331  *   0 on success, a negative errno value otherwise and rte_errno is set.
3332  */
3333 static int
3334 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3335                                        const struct rte_flow_action *action,
3336                                        const uint64_t item_flags,
3337                                        struct rte_flow_error *error)
3338 {
3339         int ret = 0;
3340         uint64_t layer;
3341
3342         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3343         if (!ret) {
3344                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3345                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3346                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3347                 if (!(item_flags & layer))
3348                         return rte_flow_error_set(error, EINVAL,
3349                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3350                                                   NULL, "no TCP item in"
3351                                                   " pattern");
3352                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3353                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3354                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3355                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3356                         return rte_flow_error_set(error, EINVAL,
3357                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3358                                                   NULL,
3359                                                   "cannot decrease and increase"
3360                                                   " TCP sequence number"
3361                                                   " at the same time");
3362         }
3363         return ret;
3364 }
3365
3366 /**
3367  * Validate the modify-header actions of increment/decrement
3368  * TCP Acknowledgment number.
3369  *
3370  * @param[in] action_flags
3371  *   Holds the actions detected until now.
3372  * @param[in] action
3373  *   Pointer to the modify action.
3374  * @param[in] item_flags
3375  *   Holds the items detected.
3376  * @param[out] error
3377  *   Pointer to error structure.
3378  *
3379  * @return
3380  *   0 on success, a negative errno value otherwise and rte_errno is set.
3381  */
3382 static int
3383 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3384                                        const struct rte_flow_action *action,
3385                                        const uint64_t item_flags,
3386                                        struct rte_flow_error *error)
3387 {
3388         int ret = 0;
3389         uint64_t layer;
3390
3391         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3392         if (!ret) {
3393                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3394                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3395                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3396                 if (!(item_flags & layer))
3397                         return rte_flow_error_set(error, EINVAL,
3398                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3399                                                   NULL, "no TCP item in"
3400                                                   " pattern");
3401                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3402                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3403                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3404                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3405                         return rte_flow_error_set(error, EINVAL,
3406                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3407                                                   NULL,
3408                                                   "cannot decrease and increase"
3409                                                   " TCP acknowledgment number"
3410                                                   " at the same time");
3411         }
3412         return ret;
3413 }
3414
3415 /**
3416  * Validate the modify-header TTL actions.
3417  *
3418  * @param[in] action_flags
3419  *   Holds the actions detected until now.
3420  * @param[in] action
3421  *   Pointer to the modify action.
3422  * @param[in] item_flags
3423  *   Holds the items detected.
3424  * @param[out] error
3425  *   Pointer to error structure.
3426  *
3427  * @return
3428  *   0 on success, a negative errno value otherwise and rte_errno is set.
3429  */
3430 static int
3431 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3432                                    const struct rte_flow_action *action,
3433                                    const uint64_t item_flags,
3434                                    struct rte_flow_error *error)
3435 {
3436         int ret = 0;
3437         uint64_t layer;
3438
3439         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3440         if (!ret) {
3441                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3442                                  MLX5_FLOW_LAYER_INNER_L3 :
3443                                  MLX5_FLOW_LAYER_OUTER_L3;
3444                 if (!(item_flags & layer))
3445                         return rte_flow_error_set(error, EINVAL,
3446                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3447                                                   NULL,
3448                                                   "no IP protocol in pattern");
3449         }
3450         return ret;
3451 }
3452
3453 /**
3454  * Validate jump action.
3455  *
3456  * @param[in] action
3457  *   Pointer to the jump action.
3458  * @param[in] action_flags
3459  *   Holds the actions detected until now.
3460  * @param[in] attributes
3461  *   Pointer to flow attributes
3462  * @param[in] external
3463  *   Action belongs to flow rule created by request external to PMD.
3464  * @param[out] error
3465  *   Pointer to error structure.
3466  *
3467  * @return
3468  *   0 on success, a negative errno value otherwise and rte_errno is set.
3469  */
3470 static int
3471 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3472                              uint64_t action_flags,
3473                              const struct rte_flow_attr *attributes,
3474                              bool external, struct rte_flow_error *error)
3475 {
3476         uint32_t target_group, table;
3477         int ret = 0;
3478
3479         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3480                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3481                 return rte_flow_error_set(error, EINVAL,
3482                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3483                                           "can't have 2 fate actions in"
3484                                           " same flow");
3485         if (action_flags & MLX5_FLOW_ACTION_METER)
3486                 return rte_flow_error_set(error, ENOTSUP,
3487                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3488                                           "jump with meter not support");
3489         if (!action->conf)
3490                 return rte_flow_error_set(error, EINVAL,
3491                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3492                                           NULL, "action configuration not set");
3493         target_group =
3494                 ((const struct rte_flow_action_jump *)action->conf)->group;
3495         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3496                                        true, &table, error);
3497         if (ret)
3498                 return ret;
3499         if (attributes->group == target_group)
3500                 return rte_flow_error_set(error, EINVAL,
3501                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3502                                           "target group must be other than"
3503                                           " the current flow group");
3504         return 0;
3505 }
3506
3507 /*
3508  * Validate the port_id action.
3509  *
3510  * @param[in] dev
3511  *   Pointer to rte_eth_dev structure.
3512  * @param[in] action_flags
3513  *   Bit-fields that holds the actions detected until now.
3514  * @param[in] action
3515  *   Port_id RTE action structure.
3516  * @param[in] attr
3517  *   Attributes of flow that includes this action.
3518  * @param[out] error
3519  *   Pointer to error structure.
3520  *
3521  * @return
3522  *   0 on success, a negative errno value otherwise and rte_errno is set.
3523  */
3524 static int
3525 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3526                                 uint64_t action_flags,
3527                                 const struct rte_flow_action *action,
3528                                 const struct rte_flow_attr *attr,
3529                                 struct rte_flow_error *error)
3530 {
3531         const struct rte_flow_action_port_id *port_id;
3532         struct mlx5_priv *act_priv;
3533         struct mlx5_priv *dev_priv;
3534         uint16_t port;
3535
3536         if (!attr->transfer)
3537                 return rte_flow_error_set(error, ENOTSUP,
3538                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3539                                           NULL,
3540                                           "port id action is valid in transfer"
3541                                           " mode only");
3542         if (!action || !action->conf)
3543                 return rte_flow_error_set(error, ENOTSUP,
3544                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3545                                           NULL,
3546                                           "port id action parameters must be"
3547                                           " specified");
3548         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3549                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3550                 return rte_flow_error_set(error, EINVAL,
3551                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3552                                           "can have only one fate actions in"
3553                                           " a flow");
3554         dev_priv = mlx5_dev_to_eswitch_info(dev);
3555         if (!dev_priv)
3556                 return rte_flow_error_set(error, rte_errno,
3557                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3558                                           NULL,
3559                                           "failed to obtain E-Switch info");
3560         port_id = action->conf;
3561         port = port_id->original ? dev->data->port_id : port_id->id;
3562         act_priv = mlx5_port_to_eswitch_info(port, false);
3563         if (!act_priv)
3564                 return rte_flow_error_set
3565                                 (error, rte_errno,
3566                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3567                                  "failed to obtain E-Switch port id for port");
3568         if (act_priv->domain_id != dev_priv->domain_id)
3569                 return rte_flow_error_set
3570                                 (error, EINVAL,
3571                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3572                                  "port does not belong to"
3573                                  " E-Switch being configured");
3574         return 0;
3575 }
3576
3577 /**
3578  * Get the maximum number of modify header actions.
3579  *
3580  * @param dev
3581  *   Pointer to rte_eth_dev structure.
3582  * @param flags
3583  *   Flags bits to check if root level.
3584  *
3585  * @return
3586  *   Max number of modify header actions device can support.
3587  */
3588 static unsigned int
3589 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3590 {
3591         /*
3592          * There's no way to directly query the max cap. Although it has to be
3593          * acquried by iterative trial, it is a safe assumption that more
3594          * actions are supported by FW if extensive metadata register is
3595          * supported. (Only in the root table)
3596          */
3597         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3598                 return MLX5_MAX_MODIFY_NUM;
3599         else
3600                 return mlx5_flow_ext_mreg_supported(dev) ?
3601                                         MLX5_ROOT_TBL_MODIFY_NUM :
3602                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3603 }
3604
3605 /**
3606  * Validate the meter action.
3607  *
3608  * @param[in] dev
3609  *   Pointer to rte_eth_dev structure.
3610  * @param[in] action_flags
3611  *   Bit-fields that holds the actions detected until now.
3612  * @param[in] action
3613  *   Pointer to the meter action.
3614  * @param[in] attr
3615  *   Attributes of flow that includes this action.
3616  * @param[out] error
3617  *   Pointer to error structure.
3618  *
3619  * @return
3620  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3621  */
3622 static int
3623 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3624                                 uint64_t action_flags,
3625                                 const struct rte_flow_action *action,
3626                                 const struct rte_flow_attr *attr,
3627                                 struct rte_flow_error *error)
3628 {
3629         struct mlx5_priv *priv = dev->data->dev_private;
3630         const struct rte_flow_action_meter *am = action->conf;
3631         struct mlx5_flow_meter *fm;
3632
3633         if (!am)
3634                 return rte_flow_error_set(error, EINVAL,
3635                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3636                                           "meter action conf is NULL");
3637
3638         if (action_flags & MLX5_FLOW_ACTION_METER)
3639                 return rte_flow_error_set(error, ENOTSUP,
3640                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3641                                           "meter chaining not support");
3642         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3643                 return rte_flow_error_set(error, ENOTSUP,
3644                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3645                                           "meter with jump not support");
3646         if (!priv->mtr_en)
3647                 return rte_flow_error_set(error, ENOTSUP,
3648                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3649                                           NULL,
3650                                           "meter action not supported");
3651         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3652         if (!fm)
3653                 return rte_flow_error_set(error, EINVAL,
3654                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3655                                           "Meter not found");
3656         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3657               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3658               (!fm->attr.egress && !attr->egress && attr->ingress))))
3659                 return rte_flow_error_set(error, EINVAL,
3660                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3661                                           "Flow attributes are either invalid "
3662                                           "or have a conflict with current "
3663                                           "meter attributes");
3664         return 0;
3665 }
3666
3667 /**
3668  * Validate the modify-header IPv4 DSCP actions.
3669  *
3670  * @param[in] action_flags
3671  *   Holds the actions detected until now.
3672  * @param[in] action
3673  *   Pointer to the modify action.
3674  * @param[in] item_flags
3675  *   Holds the items detected.
3676  * @param[out] error
3677  *   Pointer to error structure.
3678  *
3679  * @return
3680  *   0 on success, a negative errno value otherwise and rte_errno is set.
3681  */
3682 static int
3683 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3684                                          const struct rte_flow_action *action,
3685                                          const uint64_t item_flags,
3686                                          struct rte_flow_error *error)
3687 {
3688         int ret = 0;
3689
3690         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3691         if (!ret) {
3692                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3693                         return rte_flow_error_set(error, EINVAL,
3694                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3695                                                   NULL,
3696                                                   "no ipv4 item in pattern");
3697         }
3698         return ret;
3699 }
3700
3701 /**
3702  * Validate the modify-header IPv6 DSCP actions.
3703  *
3704  * @param[in] action_flags
3705  *   Holds the actions detected until now.
3706  * @param[in] action
3707  *   Pointer to the modify action.
3708  * @param[in] item_flags
3709  *   Holds the items detected.
3710  * @param[out] error
3711  *   Pointer to error structure.
3712  *
3713  * @return
3714  *   0 on success, a negative errno value otherwise and rte_errno is set.
3715  */
3716 static int
3717 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3718                                          const struct rte_flow_action *action,
3719                                          const uint64_t item_flags,
3720                                          struct rte_flow_error *error)
3721 {
3722         int ret = 0;
3723
3724         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3725         if (!ret) {
3726                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3727                         return rte_flow_error_set(error, EINVAL,
3728                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3729                                                   NULL,
3730                                                   "no ipv6 item in pattern");
3731         }
3732         return ret;
3733 }
3734
3735 /**
3736  * Find existing modify-header resource or create and register a new one.
3737  *
3738  * @param dev[in, out]
3739  *   Pointer to rte_eth_dev structure.
3740  * @param[in, out] resource
3741  *   Pointer to modify-header resource.
3742  * @parm[in, out] dev_flow
3743  *   Pointer to the dev_flow.
3744  * @param[out] error
3745  *   pointer to error structure.
3746  *
3747  * @return
3748  *   0 on success otherwise -errno and errno is set.
3749  */
3750 static int
3751 flow_dv_modify_hdr_resource_register
3752                         (struct rte_eth_dev *dev,
3753                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3754                          struct mlx5_flow *dev_flow,
3755                          struct rte_flow_error *error)
3756 {
3757         struct mlx5_priv *priv = dev->data->dev_private;
3758         struct mlx5_ibv_shared *sh = priv->sh;
3759         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3760         struct mlx5dv_dr_domain *ns;
3761         uint32_t actions_len;
3762
3763         resource->flags = dev_flow->dv.group ? 0 :
3764                           MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3765         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3766                                     resource->flags))
3767                 return rte_flow_error_set(error, EOVERFLOW,
3768                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3769                                           "too many modify header items");
3770         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3771                 ns = sh->fdb_domain;
3772         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3773                 ns = sh->tx_domain;
3774         else
3775                 ns = sh->rx_domain;
3776         /* Lookup a matching resource from cache. */
3777         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3778         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3779                 if (resource->ft_type == cache_resource->ft_type &&
3780                     resource->actions_num == cache_resource->actions_num &&
3781                     resource->flags == cache_resource->flags &&
3782                     !memcmp((const void *)resource->actions,
3783                             (const void *)cache_resource->actions,
3784                             actions_len)) {
3785                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3786                                 (void *)cache_resource,
3787                                 rte_atomic32_read(&cache_resource->refcnt));
3788                         rte_atomic32_inc(&cache_resource->refcnt);
3789                         dev_flow->handle->dvh.modify_hdr = cache_resource;
3790                         return 0;
3791                 }
3792         }
3793         /* Register new modify-header resource. */
3794         cache_resource = rte_calloc(__func__, 1,
3795                                     sizeof(*cache_resource) + actions_len, 0);
3796         if (!cache_resource)
3797                 return rte_flow_error_set(error, ENOMEM,
3798                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3799                                           "cannot allocate resource memory");
3800         *cache_resource = *resource;
3801         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3802         cache_resource->verbs_action =
3803                 mlx5_glue->dv_create_flow_action_modify_header
3804                                         (sh->ctx, cache_resource->ft_type, ns,
3805                                          cache_resource->flags, actions_len,
3806                                          (uint64_t *)cache_resource->actions);
3807         if (!cache_resource->verbs_action) {
3808                 rte_free(cache_resource);
3809                 return rte_flow_error_set(error, ENOMEM,
3810                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3811                                           NULL, "cannot create action");
3812         }
3813         rte_atomic32_init(&cache_resource->refcnt);
3814         rte_atomic32_inc(&cache_resource->refcnt);
3815         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3816         dev_flow->handle->dvh.modify_hdr = cache_resource;
3817         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3818                 (void *)cache_resource,
3819                 rte_atomic32_read(&cache_resource->refcnt));
3820         return 0;
3821 }
3822
3823 #define MLX5_CNT_CONTAINER_RESIZE 64
3824
3825 /**
3826  * Get or create a flow counter.
3827  *
3828  * @param[in] dev
3829  *   Pointer to the Ethernet device structure.
3830  * @param[in] shared
3831  *   Indicate if this counter is shared with other flows.
3832  * @param[in] id
3833  *   Counter identifier.
3834  *
3835  * @return
3836  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3837  */
3838 static struct mlx5_flow_counter *
3839 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3840                                uint32_t id)
3841 {
3842         struct mlx5_priv *priv = dev->data->dev_private;
3843         struct mlx5_flow_counter *cnt = NULL;
3844         struct mlx5_devx_obj *dcs = NULL;
3845
3846         if (!priv->config.devx) {
3847                 rte_errno = ENOTSUP;
3848                 return NULL;
3849         }
3850         if (shared) {
3851                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3852                         if (cnt->shared && cnt->id == id) {
3853                                 cnt->ref_cnt++;
3854                                 return cnt;
3855                         }
3856                 }
3857         }
3858         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3859         if (!dcs)
3860                 return NULL;
3861         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3862         if (!cnt) {
3863                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3864                 rte_errno = ENOMEM;
3865                 return NULL;
3866         }
3867         struct mlx5_flow_counter tmpl = {
3868                 .shared = shared,
3869                 .ref_cnt = 1,
3870                 .id = id,
3871                 .dcs = dcs,
3872         };
3873         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3874         if (!tmpl.action) {
3875                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3876                 rte_errno = errno;
3877                 rte_free(cnt);
3878                 return NULL;
3879         }
3880         *cnt = tmpl;
3881         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3882         return cnt;
3883 }
3884
3885 /**
3886  * Release a flow counter.
3887  *
3888  * @param[in] dev
3889  *   Pointer to the Ethernet device structure.
3890  * @param[in] counter
3891  *   Pointer to the counter handler.
3892  */
3893 static void
3894 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3895                                  struct mlx5_flow_counter *counter)
3896 {
3897         struct mlx5_priv *priv = dev->data->dev_private;
3898
3899         if (!counter)
3900                 return;
3901         if (--counter->ref_cnt == 0) {
3902                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3903                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3904                 rte_free(counter);
3905         }
3906 }
3907
3908 /**
3909  * Query a devx flow counter.
3910  *
3911  * @param[in] dev
3912  *   Pointer to the Ethernet device structure.
3913  * @param[in] cnt
3914  *   Pointer to the flow counter.
3915  * @param[out] pkts
3916  *   The statistics value of packets.
3917  * @param[out] bytes
3918  *   The statistics value of bytes.
3919  *
3920  * @return
3921  *   0 on success, otherwise a negative errno value and rte_errno is set.
3922  */
3923 static inline int
3924 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3925                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3926                      uint64_t *bytes)
3927 {
3928         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3929                                                 0, NULL, NULL, 0);
3930 }
3931
3932 /**
3933  * Get a pool by a counter.
3934  *
3935  * @param[in] cnt
3936  *   Pointer to the counter.
3937  *
3938  * @return
3939  *   The counter pool.
3940  */
3941 static struct mlx5_flow_counter_pool *
3942 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3943 {
3944         if (!cnt->batch) {
3945                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3946                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3947         }
3948         return cnt->pool;
3949 }
3950
3951 /**
3952  * Get a pool by devx counter ID.
3953  *
3954  * @param[in] cont
3955  *   Pointer to the counter container.
3956  * @param[in] id
3957  *   The counter devx ID.
3958  *
3959  * @return
3960  *   The counter pool pointer if exists, NULL otherwise,
3961  */
3962 static struct mlx5_flow_counter_pool *
3963 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3964 {
3965         struct mlx5_flow_counter_pool *pool;
3966
3967         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3968                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3969                                 MLX5_COUNTERS_PER_POOL;
3970
3971                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3972                         return pool;
3973         };
3974         return NULL;
3975 }
3976
3977 /**
3978  * Allocate a new memory for the counter values wrapped by all the needed
3979  * management.
3980  *
3981  * @param[in] dev
3982  *   Pointer to the Ethernet device structure.
3983  * @param[in] raws_n
3984  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3985  *
3986  * @return
3987  *   The new memory management pointer on success, otherwise NULL and rte_errno
3988  *   is set.
3989  */
3990 static struct mlx5_counter_stats_mem_mng *
3991 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3992 {
3993         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3994                                         (dev->data->dev_private))->sh;
3995         struct mlx5_devx_mkey_attr mkey_attr;
3996         struct mlx5_counter_stats_mem_mng *mem_mng;
3997         volatile struct flow_counter_stats *raw_data;
3998         int size = (sizeof(struct flow_counter_stats) *
3999                         MLX5_COUNTERS_PER_POOL +
4000                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
4001                         sizeof(struct mlx5_counter_stats_mem_mng);
4002         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
4003         int i;
4004
4005         if (!mem) {
4006                 rte_errno = ENOMEM;
4007                 return NULL;
4008         }
4009         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
4010         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
4011         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
4012                                                  IBV_ACCESS_LOCAL_WRITE);
4013         if (!mem_mng->umem) {
4014                 rte_errno = errno;
4015                 rte_free(mem);
4016                 return NULL;
4017         }
4018         mkey_attr.addr = (uintptr_t)mem;
4019         mkey_attr.size = size;
4020         mkey_attr.umem_id = mem_mng->umem->umem_id;
4021         mkey_attr.pd = sh->pdn;
4022         mkey_attr.log_entity_size = 0;
4023         mkey_attr.pg_access = 0;
4024         mkey_attr.klm_array = NULL;
4025         mkey_attr.klm_num = 0;
4026         mkey_attr.relaxed_ordering = 1;
4027         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
4028         if (!mem_mng->dm) {
4029                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
4030                 rte_errno = errno;
4031                 rte_free(mem);
4032                 return NULL;
4033         }
4034         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
4035         raw_data = (volatile struct flow_counter_stats *)mem;
4036         for (i = 0; i < raws_n; ++i) {
4037                 mem_mng->raws[i].mem_mng = mem_mng;
4038                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
4039         }
4040         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
4041         return mem_mng;
4042 }
4043
4044 /**
4045  * Resize a counter container.
4046  *
4047  * @param[in] dev
4048  *   Pointer to the Ethernet device structure.
4049  * @param[in] batch
4050  *   Whether the pool is for counter that was allocated by batch command.
4051  *
4052  * @return
4053  *   The new container pointer on success, otherwise NULL and rte_errno is set.
4054  */
4055 static struct mlx5_pools_container *
4056 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
4057 {
4058         struct mlx5_priv *priv = dev->data->dev_private;
4059         struct mlx5_pools_container *cont =
4060                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
4061         struct mlx5_pools_container *new_cont =
4062                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
4063         struct mlx5_counter_stats_mem_mng *mem_mng;
4064         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
4065         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
4066         int i;
4067
4068         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
4069                 /* The last resize still hasn't detected by the host thread. */
4070                 rte_errno = EAGAIN;
4071                 return NULL;
4072         }
4073         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
4074         if (!new_cont->pools) {
4075                 rte_errno = ENOMEM;
4076                 return NULL;
4077         }
4078         if (cont->n)
4079                 memcpy(new_cont->pools, cont->pools, cont->n *
4080                        sizeof(struct mlx5_flow_counter_pool *));
4081         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
4082                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
4083         if (!mem_mng) {
4084                 rte_free(new_cont->pools);
4085                 return NULL;
4086         }
4087         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
4088                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
4089                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
4090                                  i, next);
4091         new_cont->n = resize;
4092         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
4093         TAILQ_INIT(&new_cont->pool_list);
4094         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
4095         new_cont->init_mem_mng = mem_mng;
4096         rte_cio_wmb();
4097          /* Flip the master container. */
4098         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
4099         return new_cont;
4100 }
4101
4102 /**
4103  * Query a devx flow counter.
4104  *
4105  * @param[in] dev
4106  *   Pointer to the Ethernet device structure.
4107  * @param[in] cnt
4108  *   Pointer to the flow counter.
4109  * @param[out] pkts
4110  *   The statistics value of packets.
4111  * @param[out] bytes
4112  *   The statistics value of bytes.
4113  *
4114  * @return
4115  *   0 on success, otherwise a negative errno value and rte_errno is set.
4116  */
4117 static inline int
4118 _flow_dv_query_count(struct rte_eth_dev *dev,
4119                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
4120                      uint64_t *bytes)
4121 {
4122         struct mlx5_priv *priv = dev->data->dev_private;
4123         struct mlx5_flow_counter_pool *pool =
4124                         flow_dv_counter_pool_get(cnt);
4125         int offset = cnt - &pool->counters_raw[0];
4126
4127         if (priv->counter_fallback)
4128                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4129
4130         rte_spinlock_lock(&pool->sl);
4131         /*
4132          * The single counters allocation may allocate smaller ID than the
4133          * current allocated in parallel to the host reading.
4134          * In this case the new counter values must be reported as 0.
4135          */
4136         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4137                 *pkts = 0;
4138                 *bytes = 0;
4139         } else {
4140                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4141                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4142         }
4143         rte_spinlock_unlock(&pool->sl);
4144         return 0;
4145 }
4146
4147 /**
4148  * Create and initialize a new counter pool.
4149  *
4150  * @param[in] dev
4151  *   Pointer to the Ethernet device structure.
4152  * @param[out] dcs
4153  *   The devX counter handle.
4154  * @param[in] batch
4155  *   Whether the pool is for counter that was allocated by batch command.
4156  * @param[in/out] cont_cur
4157  *   Pointer to the container pointer, it will be update in pool resize.
4158  *
4159  * @return
4160  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
4161  */
4162 static struct mlx5_pools_container *
4163 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4164                     uint32_t batch)
4165 {
4166         struct mlx5_priv *priv = dev->data->dev_private;
4167         struct mlx5_flow_counter_pool *pool;
4168         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4169                                                                0);
4170         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4171         uint32_t size;
4172
4173         if (cont->n == n_valid) {
4174                 cont = flow_dv_container_resize(dev, batch);
4175                 if (!cont)
4176                         return NULL;
4177         }
4178         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4179                         sizeof(struct mlx5_flow_counter);
4180         pool = rte_calloc(__func__, 1, size, 0);
4181         if (!pool) {
4182                 rte_errno = ENOMEM;
4183                 return NULL;
4184         }
4185         pool->min_dcs = dcs;
4186         pool->raw = cont->init_mem_mng->raws + n_valid %
4187                                                      MLX5_CNT_CONTAINER_RESIZE;
4188         pool->raw_hw = NULL;
4189         rte_spinlock_init(&pool->sl);
4190         /*
4191          * The generation of the new allocated counters in this pool is 0, 2 in
4192          * the pool generation makes all the counters valid for allocation.
4193          * The start and end query generation protect the counters be released
4194          * between the query and update gap period will not be reallocated
4195          * without the last query finished and stats updated to the memory.
4196          */
4197         rte_atomic64_set(&pool->start_query_gen, 0x2);
4198         rte_atomic64_set(&pool->end_query_gen, 0x2);
4199         TAILQ_INIT(&pool->counters);
4200         TAILQ_INSERT_HEAD(&cont->pool_list, pool, next);
4201         cont->pools[n_valid] = pool;
4202         /* Pool initialization must be updated before host thread access. */
4203         rte_cio_wmb();
4204         rte_atomic16_add(&cont->n_valid, 1);
4205         return cont;
4206 }
4207
4208 /**
4209  * Prepare a new counter and/or a new counter pool.
4210  *
4211  * @param[in] dev
4212  *   Pointer to the Ethernet device structure.
4213  * @param[out] cnt_free
4214  *   Where to put the pointer of a new counter.
4215  * @param[in] batch
4216  *   Whether the pool is for counter that was allocated by batch command.
4217  *
4218  * @return
4219  *   The counter container pointer and @p cnt_free is set on success,
4220  *   NULL otherwise and rte_errno is set.
4221  */
4222 static struct mlx5_pools_container *
4223 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4224                              struct mlx5_flow_counter **cnt_free,
4225                              uint32_t batch)
4226 {
4227         struct mlx5_priv *priv = dev->data->dev_private;
4228         struct mlx5_pools_container *cont;
4229         struct mlx5_flow_counter_pool *pool;
4230         struct mlx5_devx_obj *dcs = NULL;
4231         struct mlx5_flow_counter *cnt;
4232         uint32_t i;
4233
4234         cont = MLX5_CNT_CONTAINER(priv->sh, batch, 0);
4235         if (!batch) {
4236                 /* bulk_bitmap must be 0 for single counter allocation. */
4237                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4238                 if (!dcs)
4239                         return NULL;
4240                 pool = flow_dv_find_pool_by_id(cont, dcs->id);
4241                 if (!pool) {
4242                         cont = flow_dv_pool_create(dev, dcs, batch);
4243                         if (!cont) {
4244                                 mlx5_devx_cmd_destroy(dcs);
4245                                 return NULL;
4246                         }
4247                         pool = TAILQ_FIRST(&cont->pool_list);
4248                 } else if (dcs->id < pool->min_dcs->id) {
4249                         rte_atomic64_set(&pool->a64_dcs,
4250                                          (int64_t)(uintptr_t)dcs);
4251                 }
4252                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4253                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4254                 cnt->dcs = dcs;
4255                 *cnt_free = cnt;
4256                 return cont;
4257         }
4258         /* bulk_bitmap is in 128 counters units. */
4259         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4260                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4261         if (!dcs) {
4262                 rte_errno = ENODATA;
4263                 return NULL;
4264         }
4265         cont = flow_dv_pool_create(dev, dcs, batch);
4266         if (!cont) {
4267                 mlx5_devx_cmd_destroy(dcs);
4268                 return NULL;
4269         }
4270         pool = TAILQ_FIRST(&cont->pool_list);
4271         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4272                 cnt = &pool->counters_raw[i];
4273                 cnt->pool = pool;
4274                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4275         }
4276         *cnt_free = &pool->counters_raw[0];
4277         return cont;
4278 }
4279
4280 /**
4281  * Search for existed shared counter.
4282  *
4283  * @param[in] cont
4284  *   Pointer to the relevant counter pool container.
4285  * @param[in] id
4286  *   The shared counter ID to search.
4287  *
4288  * @return
4289  *   NULL if not existed, otherwise pointer to the shared counter.
4290  */
4291 static struct mlx5_flow_counter *
4292 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4293                               uint32_t id)
4294 {
4295         static struct mlx5_flow_counter *cnt;
4296         struct mlx5_flow_counter_pool *pool;
4297         int i;
4298
4299         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4300                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4301                         cnt = &pool->counters_raw[i];
4302                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4303                                 return cnt;
4304                 }
4305         }
4306         return NULL;
4307 }
4308
4309 /**
4310  * Allocate a flow counter.
4311  *
4312  * @param[in] dev
4313  *   Pointer to the Ethernet device structure.
4314  * @param[in] shared
4315  *   Indicate if this counter is shared with other flows.
4316  * @param[in] id
4317  *   Counter identifier.
4318  * @param[in] group
4319  *   Counter flow group.
4320  *
4321  * @return
4322  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4323  */
4324 static struct mlx5_flow_counter *
4325 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4326                       uint16_t group)
4327 {
4328         struct mlx5_priv *priv = dev->data->dev_private;
4329         struct mlx5_flow_counter_pool *pool = NULL;
4330         struct mlx5_flow_counter *cnt_free = NULL;
4331         /*
4332          * Currently group 0 flow counter cannot be assigned to a flow if it is
4333          * not the first one in the batch counter allocation, so it is better
4334          * to allocate counters one by one for these flows in a separate
4335          * container.
4336          * A counter can be shared between different groups so need to take
4337          * shared counters from the single container.
4338          */
4339         uint32_t batch = (group && !shared) ? 1 : 0;
4340         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4341                                                                0);
4342
4343         if (priv->counter_fallback)
4344                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4345         if (!priv->config.devx) {
4346                 rte_errno = ENOTSUP;
4347                 return NULL;
4348         }
4349         if (shared) {
4350                 cnt_free = flow_dv_counter_shared_search(cont, id);
4351                 if (cnt_free) {
4352                         if (cnt_free->ref_cnt + 1 == 0) {
4353                                 rte_errno = E2BIG;
4354                                 return NULL;
4355                         }
4356                         cnt_free->ref_cnt++;
4357                         return cnt_free;
4358                 }
4359         }
4360         /* Pools which has a free counters are in the start. */
4361         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4362                 /*
4363                  * The free counter reset values must be updated between the
4364                  * counter release to the counter allocation, so, at least one
4365                  * query must be done in this time. ensure it by saving the
4366                  * query generation in the release time.
4367                  * The free list is sorted according to the generation - so if
4368                  * the first one is not updated, all the others are not
4369                  * updated too.
4370                  */
4371                 cnt_free = TAILQ_FIRST(&pool->counters);
4372                 if (cnt_free && cnt_free->query_gen <
4373                     rte_atomic64_read(&pool->end_query_gen))
4374                         break;
4375                 cnt_free = NULL;
4376         }
4377         if (!cnt_free) {
4378                 cont = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4379                 if (!cont)
4380                         return NULL;
4381                 pool = TAILQ_FIRST(&cont->pool_list);
4382         }
4383         cnt_free->batch = batch;
4384         /* Create a DV counter action only in the first time usage. */
4385         if (!cnt_free->action) {
4386                 uint16_t offset;
4387                 struct mlx5_devx_obj *dcs;
4388
4389                 if (batch) {
4390                         offset = cnt_free - &pool->counters_raw[0];
4391                         dcs = pool->min_dcs;
4392                 } else {
4393                         offset = 0;
4394                         dcs = cnt_free->dcs;
4395                 }
4396                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4397                                         (dcs->obj, offset);
4398                 if (!cnt_free->action) {
4399                         rte_errno = errno;
4400                         return NULL;
4401                 }
4402         }
4403         /* Update the counter reset values. */
4404         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4405                                  &cnt_free->bytes))
4406                 return NULL;
4407         cnt_free->shared = shared;
4408         cnt_free->ref_cnt = 1;
4409         cnt_free->id = id;
4410         if (!priv->sh->cmng.query_thread_on)
4411                 /* Start the asynchronous batch query by the host thread. */
4412                 mlx5_set_query_alarm(priv->sh);
4413         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4414         if (TAILQ_EMPTY(&pool->counters)) {
4415                 /* Move the pool to the end of the container pool list. */
4416                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4417                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4418         }
4419         return cnt_free;
4420 }
4421
4422 /**
4423  * Release a flow counter.
4424  *
4425  * @param[in] dev
4426  *   Pointer to the Ethernet device structure.
4427  * @param[in] counter
4428  *   Pointer to the counter handler.
4429  */
4430 static void
4431 flow_dv_counter_release(struct rte_eth_dev *dev,
4432                         struct mlx5_flow_counter *counter)
4433 {
4434         struct mlx5_priv *priv = dev->data->dev_private;
4435
4436         if (!counter)
4437                 return;
4438         if (priv->counter_fallback) {
4439                 flow_dv_counter_release_fallback(dev, counter);
4440                 return;
4441         }
4442         if (--counter->ref_cnt == 0) {
4443                 struct mlx5_flow_counter_pool *pool =
4444                                 flow_dv_counter_pool_get(counter);
4445
4446                 /* Put the counter in the end - the last updated one. */
4447                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4448                 /*
4449                  * Counters released between query trigger and handler need
4450                  * to wait the next round of query. Since the packets arrive
4451                  * in the gap period will not be taken into account to the
4452                  * old counter.
4453                  */
4454                 counter->query_gen = rte_atomic64_read(&pool->start_query_gen);
4455         }
4456 }
4457
4458 /**
4459  * Verify the @p attributes will be correctly understood by the NIC and store
4460  * them in the @p flow if everything is correct.
4461  *
4462  * @param[in] dev
4463  *   Pointer to dev struct.
4464  * @param[in] attributes
4465  *   Pointer to flow attributes
4466  * @param[in] external
4467  *   This flow rule is created by request external to PMD.
4468  * @param[out] error
4469  *   Pointer to error structure.
4470  *
4471  * @return
4472  *   0 on success, a negative errno value otherwise and rte_errno is set.
4473  */
4474 static int
4475 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4476                             const struct rte_flow_attr *attributes,
4477                             bool external __rte_unused,
4478                             struct rte_flow_error *error)
4479 {
4480         struct mlx5_priv *priv = dev->data->dev_private;
4481         uint32_t priority_max = priv->config.flow_prio - 1;
4482
4483 #ifndef HAVE_MLX5DV_DR
4484         if (attributes->group)
4485                 return rte_flow_error_set(error, ENOTSUP,
4486                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4487                                           NULL,
4488                                           "groups are not supported");
4489 #else
4490         uint32_t table;
4491         int ret;
4492
4493         ret = mlx5_flow_group_to_table(attributes, external,
4494                                        attributes->group, !!priv->fdb_def_rule,
4495                                        &table, error);
4496         if (ret)
4497                 return ret;
4498 #endif
4499         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4500             attributes->priority >= priority_max)
4501                 return rte_flow_error_set(error, ENOTSUP,
4502                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4503                                           NULL,
4504                                           "priority out of range");
4505         if (attributes->transfer) {
4506                 if (!priv->config.dv_esw_en)
4507                         return rte_flow_error_set
4508                                 (error, ENOTSUP,
4509                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4510                                  "E-Switch dr is not supported");
4511                 if (!(priv->representor || priv->master))
4512                         return rte_flow_error_set
4513                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4514                                  NULL, "E-Switch configuration can only be"
4515                                  " done by a master or a representor device");
4516                 if (attributes->egress)
4517                         return rte_flow_error_set
4518                                 (error, ENOTSUP,
4519                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4520                                  "egress is not supported");
4521         }
4522         if (!(attributes->egress ^ attributes->ingress))
4523                 return rte_flow_error_set(error, ENOTSUP,
4524                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4525                                           "must specify exactly one of "
4526                                           "ingress or egress");
4527         return 0;
4528 }
4529
4530 /**
4531  * Internal validation function. For validating both actions and items.
4532  *
4533  * @param[in] dev
4534  *   Pointer to the rte_eth_dev structure.
4535  * @param[in] attr
4536  *   Pointer to the flow attributes.
4537  * @param[in] items
4538  *   Pointer to the list of items.
4539  * @param[in] actions
4540  *   Pointer to the list of actions.
4541  * @param[in] external
4542  *   This flow rule is created by request external to PMD.
4543  * @param[out] error
4544  *   Pointer to the error structure.
4545  *
4546  * @return
4547  *   0 on success, a negative errno value otherwise and rte_errno is set.
4548  */
4549 static int
4550 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4551                  const struct rte_flow_item items[],
4552                  const struct rte_flow_action actions[],
4553                  bool external, struct rte_flow_error *error)
4554 {
4555         int ret;
4556         uint64_t action_flags = 0;
4557         uint64_t item_flags = 0;
4558         uint64_t last_item = 0;
4559         uint8_t next_protocol = 0xff;
4560         uint16_t ether_type = 0;
4561         int actions_n = 0;
4562         uint8_t item_ipv6_proto = 0;
4563         const struct rte_flow_item *gre_item = NULL;
4564         const struct rte_flow_action_raw_decap *decap;
4565         const struct rte_flow_action_raw_encap *encap;
4566         const struct rte_flow_action_rss *rss;
4567         const struct rte_flow_item_tcp nic_tcp_mask = {
4568                 .hdr = {
4569                         .tcp_flags = 0xFF,
4570                         .src_port = RTE_BE16(UINT16_MAX),
4571                         .dst_port = RTE_BE16(UINT16_MAX),
4572                 }
4573         };
4574         const struct rte_flow_item_ipv4 nic_ipv4_mask = {
4575                 .hdr = {
4576                         .src_addr = RTE_BE32(0xffffffff),
4577                         .dst_addr = RTE_BE32(0xffffffff),
4578                         .type_of_service = 0xff,
4579                         .next_proto_id = 0xff,
4580                         .time_to_live = 0xff,
4581                 },
4582         };
4583         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
4584                 .hdr = {
4585                         .src_addr =
4586                         "\xff\xff\xff\xff\xff\xff\xff\xff"
4587                         "\xff\xff\xff\xff\xff\xff\xff\xff",
4588                         .dst_addr =
4589                         "\xff\xff\xff\xff\xff\xff\xff\xff"
4590                         "\xff\xff\xff\xff\xff\xff\xff\xff",
4591                         .vtc_flow = RTE_BE32(0xffffffff),
4592                         .proto = 0xff,
4593                         .hop_limits = 0xff,
4594                 },
4595         };
4596         struct mlx5_priv *priv = dev->data->dev_private;
4597         struct mlx5_dev_config *dev_conf = &priv->config;
4598         uint16_t queue_index = 0xFFFF;
4599
4600         if (items == NULL)
4601                 return -1;
4602         ret = flow_dv_validate_attributes(dev, attr, external, error);
4603         if (ret < 0)
4604                 return ret;
4605         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4606                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4607                 int type = items->type;
4608
4609                 switch (type) {
4610                 case RTE_FLOW_ITEM_TYPE_VOID:
4611                         break;
4612                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4613                         ret = flow_dv_validate_item_port_id
4614                                         (dev, items, attr, item_flags, error);
4615                         if (ret < 0)
4616                                 return ret;
4617                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4618                         break;
4619                 case RTE_FLOW_ITEM_TYPE_ETH:
4620                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4621                                                           error);
4622                         if (ret < 0)
4623                                 return ret;
4624                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4625                                              MLX5_FLOW_LAYER_OUTER_L2;
4626                         if (items->mask != NULL && items->spec != NULL) {
4627                                 ether_type =
4628                                         ((const struct rte_flow_item_eth *)
4629                                          items->spec)->type;
4630                                 ether_type &=
4631                                         ((const struct rte_flow_item_eth *)
4632                                          items->mask)->type;
4633                                 ether_type = rte_be_to_cpu_16(ether_type);
4634                         } else {
4635                                 ether_type = 0;
4636                         }
4637                         break;
4638                 case RTE_FLOW_ITEM_TYPE_VLAN:
4639                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4640                                                            dev, error);
4641                         if (ret < 0)
4642                                 return ret;
4643                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4644                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4645                         if (items->mask != NULL && items->spec != NULL) {
4646                                 ether_type =
4647                                         ((const struct rte_flow_item_vlan *)
4648                                          items->spec)->inner_type;
4649                                 ether_type &=
4650                                         ((const struct rte_flow_item_vlan *)
4651                                          items->mask)->inner_type;
4652                                 ether_type = rte_be_to_cpu_16(ether_type);
4653                         } else {
4654                                 ether_type = 0;
4655                         }
4656                         break;
4657                 case RTE_FLOW_ITEM_TYPE_IPV4:
4658                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4659                                                   &item_flags, &tunnel);
4660                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4661                                                            last_item,
4662                                                            ether_type,
4663                                                            &nic_ipv4_mask,
4664                                                            error);
4665                         if (ret < 0)
4666                                 return ret;
4667                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4668                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4669                         if (items->mask != NULL &&
4670                             ((const struct rte_flow_item_ipv4 *)
4671                              items->mask)->hdr.next_proto_id) {
4672                                 next_protocol =
4673                                         ((const struct rte_flow_item_ipv4 *)
4674                                          (items->spec))->hdr.next_proto_id;
4675                                 next_protocol &=
4676                                         ((const struct rte_flow_item_ipv4 *)
4677                                          (items->mask))->hdr.next_proto_id;
4678                         } else {
4679                                 /* Reset for inner layer. */
4680                                 next_protocol = 0xff;
4681                         }
4682                         break;
4683                 case RTE_FLOW_ITEM_TYPE_IPV6:
4684                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4685                                                   &item_flags, &tunnel);
4686                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4687                                                            last_item,
4688                                                            ether_type,
4689                                                            &nic_ipv6_mask,
4690                                                            error);
4691                         if (ret < 0)
4692                                 return ret;
4693                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4694                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4695                         if (items->mask != NULL &&
4696                             ((const struct rte_flow_item_ipv6 *)
4697                              items->mask)->hdr.proto) {
4698                                 item_ipv6_proto =
4699                                         ((const struct rte_flow_item_ipv6 *)
4700                                          items->spec)->hdr.proto;
4701                                 next_protocol =
4702                                         ((const struct rte_flow_item_ipv6 *)
4703                                          items->spec)->hdr.proto;
4704                                 next_protocol &=
4705                                         ((const struct rte_flow_item_ipv6 *)
4706                                          items->mask)->hdr.proto;
4707                         } else {
4708                                 /* Reset for inner layer. */
4709                                 next_protocol = 0xff;
4710                         }
4711                         break;
4712                 case RTE_FLOW_ITEM_TYPE_TCP:
4713                         ret = mlx5_flow_validate_item_tcp
4714                                                 (items, item_flags,
4715                                                  next_protocol,
4716                                                  &nic_tcp_mask,
4717                                                  error);
4718                         if (ret < 0)
4719                                 return ret;
4720                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4721                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4722                         break;
4723                 case RTE_FLOW_ITEM_TYPE_UDP:
4724                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4725                                                           next_protocol,
4726                                                           error);
4727                         if (ret < 0)
4728                                 return ret;
4729                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4730                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4731                         break;
4732                 case RTE_FLOW_ITEM_TYPE_GRE:
4733                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4734                                                           next_protocol, error);
4735                         if (ret < 0)
4736                                 return ret;
4737                         gre_item = items;
4738                         last_item = MLX5_FLOW_LAYER_GRE;
4739                         break;
4740                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4741                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4742                                                             next_protocol,
4743                                                             error);
4744                         if (ret < 0)
4745                                 return ret;
4746                         last_item = MLX5_FLOW_LAYER_NVGRE;
4747                         break;
4748                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4749                         ret = mlx5_flow_validate_item_gre_key
4750                                 (items, item_flags, gre_item, error);
4751                         if (ret < 0)
4752                                 return ret;
4753                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4754                         break;
4755                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4756                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4757                                                             error);
4758                         if (ret < 0)
4759                                 return ret;
4760                         last_item = MLX5_FLOW_LAYER_VXLAN;
4761                         break;
4762                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4763                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4764                                                                 item_flags, dev,
4765                                                                 error);
4766                         if (ret < 0)
4767                                 return ret;
4768                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4769                         break;
4770                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4771                         ret = mlx5_flow_validate_item_geneve(items,
4772                                                              item_flags, dev,
4773                                                              error);
4774                         if (ret < 0)
4775                                 return ret;
4776                         last_item = MLX5_FLOW_LAYER_GENEVE;
4777                         break;
4778                 case RTE_FLOW_ITEM_TYPE_MPLS:
4779                         ret = mlx5_flow_validate_item_mpls(dev, items,
4780                                                            item_flags,
4781                                                            last_item, error);
4782                         if (ret < 0)
4783                                 return ret;
4784                         last_item = MLX5_FLOW_LAYER_MPLS;
4785                         break;
4786
4787                 case RTE_FLOW_ITEM_TYPE_MARK:
4788                         ret = flow_dv_validate_item_mark(dev, items, attr,
4789                                                          error);
4790                         if (ret < 0)
4791                                 return ret;
4792                         last_item = MLX5_FLOW_ITEM_MARK;
4793                         break;
4794                 case RTE_FLOW_ITEM_TYPE_META:
4795                         ret = flow_dv_validate_item_meta(dev, items, attr,
4796                                                          error);
4797                         if (ret < 0)
4798                                 return ret;
4799                         last_item = MLX5_FLOW_ITEM_METADATA;
4800                         break;
4801                 case RTE_FLOW_ITEM_TYPE_ICMP:
4802                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4803                                                            next_protocol,
4804                                                            error);
4805                         if (ret < 0)
4806                                 return ret;
4807                         last_item = MLX5_FLOW_LAYER_ICMP;
4808                         break;
4809                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4810                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4811                                                             next_protocol,
4812                                                             error);
4813                         if (ret < 0)
4814                                 return ret;
4815                         item_ipv6_proto = IPPROTO_ICMPV6;
4816                         last_item = MLX5_FLOW_LAYER_ICMP6;
4817                         break;
4818                 case RTE_FLOW_ITEM_TYPE_TAG:
4819                         ret = flow_dv_validate_item_tag(dev, items,
4820                                                         attr, error);
4821                         if (ret < 0)
4822                                 return ret;
4823                         last_item = MLX5_FLOW_ITEM_TAG;
4824                         break;
4825                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4826                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4827                         break;
4828                 case RTE_FLOW_ITEM_TYPE_GTP:
4829                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4830                                                         error);
4831                         if (ret < 0)
4832                                 return ret;
4833                         last_item = MLX5_FLOW_LAYER_GTP;
4834                         break;
4835                 default:
4836                         return rte_flow_error_set(error, ENOTSUP,
4837                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4838                                                   NULL, "item not supported");
4839                 }
4840                 item_flags |= last_item;
4841         }
4842         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4843                 int type = actions->type;
4844                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4845                         return rte_flow_error_set(error, ENOTSUP,
4846                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4847                                                   actions, "too many actions");
4848                 switch (type) {
4849                 case RTE_FLOW_ACTION_TYPE_VOID:
4850                         break;
4851                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4852                         ret = flow_dv_validate_action_port_id(dev,
4853                                                               action_flags,
4854                                                               actions,
4855                                                               attr,
4856                                                               error);
4857                         if (ret)
4858                                 return ret;
4859                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4860                         ++actions_n;
4861                         break;
4862                 case RTE_FLOW_ACTION_TYPE_FLAG:
4863                         ret = flow_dv_validate_action_flag(dev, action_flags,
4864                                                            attr, error);
4865                         if (ret < 0)
4866                                 return ret;
4867                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4868                                 /* Count all modify-header actions as one. */
4869                                 if (!(action_flags &
4870                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4871                                         ++actions_n;
4872                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4873                                                 MLX5_FLOW_ACTION_MARK_EXT;
4874                         } else {
4875                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4876                                 ++actions_n;
4877                         }
4878                         break;
4879                 case RTE_FLOW_ACTION_TYPE_MARK:
4880                         ret = flow_dv_validate_action_mark(dev, actions,
4881                                                            action_flags,
4882                                                            attr, error);
4883                         if (ret < 0)
4884                                 return ret;
4885                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4886                                 /* Count all modify-header actions as one. */
4887                                 if (!(action_flags &
4888                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4889                                         ++actions_n;
4890                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4891                                                 MLX5_FLOW_ACTION_MARK_EXT;
4892                         } else {
4893                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4894                                 ++actions_n;
4895                         }
4896                         break;
4897                 case RTE_FLOW_ACTION_TYPE_SET_META:
4898                         ret = flow_dv_validate_action_set_meta(dev, actions,
4899                                                                action_flags,
4900                                                                attr, error);
4901                         if (ret < 0)
4902                                 return ret;
4903                         /* Count all modify-header actions as one action. */
4904                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4905                                 ++actions_n;
4906                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4907                         break;
4908                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4909                         ret = flow_dv_validate_action_set_tag(dev, actions,
4910                                                               action_flags,
4911                                                               attr, error);
4912                         if (ret < 0)
4913                                 return ret;
4914                         /* Count all modify-header actions as one action. */
4915                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4916                                 ++actions_n;
4917                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4918                         break;
4919                 case RTE_FLOW_ACTION_TYPE_DROP:
4920                         ret = mlx5_flow_validate_action_drop(action_flags,
4921                                                              attr, error);
4922                         if (ret < 0)
4923                                 return ret;
4924                         action_flags |= MLX5_FLOW_ACTION_DROP;
4925                         ++actions_n;
4926                         break;
4927                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4928                         ret = mlx5_flow_validate_action_queue(actions,
4929                                                               action_flags, dev,
4930                                                               attr, error);
4931                         if (ret < 0)
4932                                 return ret;
4933                         queue_index = ((const struct rte_flow_action_queue *)
4934                                                         (actions->conf))->index;
4935                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4936                         ++actions_n;
4937                         break;
4938                 case RTE_FLOW_ACTION_TYPE_RSS:
4939                         rss = actions->conf;
4940                         ret = mlx5_flow_validate_action_rss(actions,
4941                                                             action_flags, dev,
4942                                                             attr, item_flags,
4943                                                             error);
4944                         if (ret < 0)
4945                                 return ret;
4946                         if (rss != NULL && rss->queue_num)
4947                                 queue_index = rss->queue[0];
4948                         action_flags |= MLX5_FLOW_ACTION_RSS;
4949                         ++actions_n;
4950                         break;
4951                 case RTE_FLOW_ACTION_TYPE_COUNT:
4952                         ret = flow_dv_validate_action_count(dev, error);
4953                         if (ret < 0)
4954                                 return ret;
4955                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4956                         ++actions_n;
4957                         break;
4958                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4959                         if (flow_dv_validate_action_pop_vlan(dev,
4960                                                              action_flags,
4961                                                              actions,
4962                                                              item_flags, attr,
4963                                                              error))
4964                                 return -rte_errno;
4965                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4966                         ++actions_n;
4967                         break;
4968                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4969                         ret = flow_dv_validate_action_push_vlan(dev,
4970                                                                 action_flags,
4971                                                                 item_flags,
4972                                                                 actions, attr,
4973                                                                 error);
4974                         if (ret < 0)
4975                                 return ret;
4976                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4977                         ++actions_n;
4978                         break;
4979                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4980                         ret = flow_dv_validate_action_set_vlan_pcp
4981                                                 (action_flags, actions, error);
4982                         if (ret < 0)
4983                                 return ret;
4984                         /* Count PCP with push_vlan command. */
4985                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4986                         break;
4987                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4988                         ret = flow_dv_validate_action_set_vlan_vid
4989                                                 (item_flags, action_flags,
4990                                                  actions, error);
4991                         if (ret < 0)
4992                                 return ret;
4993                         /* Count VID with push_vlan command. */
4994                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4995                         break;
4996                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4997                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4998                         ret = flow_dv_validate_action_l2_encap(dev,
4999                                                                action_flags,
5000                                                                actions, attr,
5001                                                                error);
5002                         if (ret < 0)
5003                                 return ret;
5004                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
5005                         ++actions_n;
5006                         break;
5007                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5008                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5009                         ret = flow_dv_validate_action_decap(dev, action_flags,
5010                                                             attr, error);
5011                         if (ret < 0)
5012                                 return ret;
5013                         action_flags |= MLX5_FLOW_ACTION_DECAP;
5014                         ++actions_n;
5015                         break;
5016                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5017                         ret = flow_dv_validate_action_raw_encap_decap
5018                                 (dev, NULL, actions->conf, attr, &action_flags,
5019                                  &actions_n, error);
5020                         if (ret < 0)
5021                                 return ret;
5022                         break;
5023                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5024                         decap = actions->conf;
5025                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5026                                 ;
5027                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5028                                 encap = NULL;
5029                                 actions--;
5030                         } else {
5031                                 encap = actions->conf;
5032                         }
5033                         ret = flow_dv_validate_action_raw_encap_decap
5034                                            (dev,
5035                                             decap ? decap : &empty_decap, encap,
5036                                             attr, &action_flags, &actions_n,
5037                                             error);
5038                         if (ret < 0)
5039                                 return ret;
5040                         break;
5041                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5042                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5043                         ret = flow_dv_validate_action_modify_mac(action_flags,
5044                                                                  actions,
5045                                                                  item_flags,
5046                                                                  error);
5047                         if (ret < 0)
5048                                 return ret;
5049                         /* Count all modify-header actions as one action. */
5050                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5051                                 ++actions_n;
5052                         action_flags |= actions->type ==
5053                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
5054                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
5055                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
5056                         break;
5057
5058                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5059                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5060                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
5061                                                                   actions,
5062                                                                   item_flags,
5063                                                                   error);
5064                         if (ret < 0)
5065                                 return ret;
5066                         /* Count all modify-header actions as one action. */
5067                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5068                                 ++actions_n;
5069                         action_flags |= actions->type ==
5070                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
5071                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
5072                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
5073                         break;
5074                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5075                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5076                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
5077                                                                   actions,
5078                                                                   item_flags,
5079                                                                   error);
5080                         if (ret < 0)
5081                                 return ret;
5082                         if (item_ipv6_proto == IPPROTO_ICMPV6)
5083                                 return rte_flow_error_set(error, ENOTSUP,
5084                                         RTE_FLOW_ERROR_TYPE_ACTION,
5085                                         actions,
5086                                         "Can't change header "
5087                                         "with ICMPv6 proto");
5088                         /* Count all modify-header actions as one action. */
5089                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5090                                 ++actions_n;
5091                         action_flags |= actions->type ==
5092                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
5093                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
5094                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
5095                         break;
5096                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5097                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5098                         ret = flow_dv_validate_action_modify_tp(action_flags,
5099                                                                 actions,
5100                                                                 item_flags,
5101                                                                 error);
5102                         if (ret < 0)
5103                                 return ret;
5104                         /* Count all modify-header actions as one action. */
5105                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5106                                 ++actions_n;
5107                         action_flags |= actions->type ==
5108                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5109                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
5110                                                 MLX5_FLOW_ACTION_SET_TP_DST;
5111                         break;
5112                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5113                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5114                         ret = flow_dv_validate_action_modify_ttl(action_flags,
5115                                                                  actions,
5116                                                                  item_flags,
5117                                                                  error);
5118                         if (ret < 0)
5119                                 return ret;
5120                         /* Count all modify-header actions as one action. */
5121                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5122                                 ++actions_n;
5123                         action_flags |= actions->type ==
5124                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
5125                                                 MLX5_FLOW_ACTION_SET_TTL :
5126                                                 MLX5_FLOW_ACTION_DEC_TTL;
5127                         break;
5128                 case RTE_FLOW_ACTION_TYPE_JUMP:
5129                         ret = flow_dv_validate_action_jump(actions,
5130                                                            action_flags,
5131                                                            attr, external,
5132                                                            error);
5133                         if (ret)
5134                                 return ret;
5135                         ++actions_n;
5136                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5137                         break;
5138                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5139                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5140                         ret = flow_dv_validate_action_modify_tcp_seq
5141                                                                 (action_flags,
5142                                                                  actions,
5143                                                                  item_flags,
5144                                                                  error);
5145                         if (ret < 0)
5146                                 return ret;
5147                         /* Count all modify-header actions as one action. */
5148                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5149                                 ++actions_n;
5150                         action_flags |= actions->type ==
5151                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5152                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
5153                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5154                         break;
5155                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5156                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5157                         ret = flow_dv_validate_action_modify_tcp_ack
5158                                                                 (action_flags,
5159                                                                  actions,
5160                                                                  item_flags,
5161                                                                  error);
5162                         if (ret < 0)
5163                                 return ret;
5164                         /* Count all modify-header actions as one action. */
5165                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5166                                 ++actions_n;
5167                         action_flags |= actions->type ==
5168                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5169                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5170                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5171                         break;
5172                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5173                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5174                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5175                         break;
5176                 case RTE_FLOW_ACTION_TYPE_METER:
5177                         ret = mlx5_flow_validate_action_meter(dev,
5178                                                               action_flags,
5179                                                               actions, attr,
5180                                                               error);
5181                         if (ret < 0)
5182                                 return ret;
5183                         action_flags |= MLX5_FLOW_ACTION_METER;
5184                         ++actions_n;
5185                         break;
5186                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5187                         ret = flow_dv_validate_action_modify_ipv4_dscp
5188                                                          (action_flags,
5189                                                           actions,
5190                                                           item_flags,
5191                                                           error);
5192                         if (ret < 0)
5193                                 return ret;
5194                         /* Count all modify-header actions as one action. */
5195                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5196                                 ++actions_n;
5197                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5198                         break;
5199                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5200                         ret = flow_dv_validate_action_modify_ipv6_dscp
5201                                                                 (action_flags,
5202                                                                  actions,
5203                                                                  item_flags,
5204                                                                  error);
5205                         if (ret < 0)
5206                                 return ret;
5207                         /* Count all modify-header actions as one action. */
5208                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5209                                 ++actions_n;
5210                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5211                         break;
5212                 default:
5213                         return rte_flow_error_set(error, ENOTSUP,
5214                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5215                                                   actions,
5216                                                   "action not supported");
5217                 }
5218         }
5219         /*
5220          * Validate the drop action mutual exclusion with other actions.
5221          * Drop action is mutually-exclusive with any other action, except for
5222          * Count action.
5223          */
5224         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5225             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5226                 return rte_flow_error_set(error, EINVAL,
5227                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5228                                           "Drop action is mutually-exclusive "
5229                                           "with any other action, except for "
5230                                           "Count action");
5231         /* Eswitch has few restrictions on using items and actions */
5232         if (attr->transfer) {
5233                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5234                     action_flags & MLX5_FLOW_ACTION_FLAG)
5235                         return rte_flow_error_set(error, ENOTSUP,
5236                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5237                                                   NULL,
5238                                                   "unsupported action FLAG");
5239                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5240                     action_flags & MLX5_FLOW_ACTION_MARK)
5241                         return rte_flow_error_set(error, ENOTSUP,
5242                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5243                                                   NULL,
5244                                                   "unsupported action MARK");
5245                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5246                         return rte_flow_error_set(error, ENOTSUP,
5247                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5248                                                   NULL,
5249                                                   "unsupported action QUEUE");
5250                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5251                         return rte_flow_error_set(error, ENOTSUP,
5252                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5253                                                   NULL,
5254                                                   "unsupported action RSS");
5255                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5256                         return rte_flow_error_set(error, EINVAL,
5257                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5258                                                   actions,
5259                                                   "no fate action is found");
5260         } else {
5261                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5262                         return rte_flow_error_set(error, EINVAL,
5263                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5264                                                   actions,
5265                                                   "no fate action is found");
5266         }
5267         /* Continue validation for Xcap actions.*/
5268         if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) && (queue_index == 0xFFFF ||
5269             mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5270                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5271                     MLX5_FLOW_XCAP_ACTIONS)
5272                         return rte_flow_error_set(error, ENOTSUP,
5273                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5274                                                   NULL, "encap and decap "
5275                                                   "combination aren't supported");
5276                 if (!attr->transfer && attr->ingress && (action_flags &
5277                                                         MLX5_FLOW_ACTION_ENCAP))
5278                         return rte_flow_error_set(error, ENOTSUP,
5279                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5280                                                   NULL, "encap is not supported"
5281                                                   " for ingress traffic");
5282         }
5283         return 0;
5284 }
5285
5286 /**
5287  * Internal preparation function. Allocates the DV flow size,
5288  * this size is constant.
5289  *
5290  * @param[in] dev
5291  *   Pointer to the rte_eth_dev structure.
5292  * @param[in] attr
5293  *   Pointer to the flow attributes.
5294  * @param[in] items
5295  *   Pointer to the list of items.
5296  * @param[in] actions
5297  *   Pointer to the list of actions.
5298  * @param[out] error
5299  *   Pointer to the error structure.
5300  *
5301  * @return
5302  *   Pointer to mlx5_flow object on success,
5303  *   otherwise NULL and rte_errno is set.
5304  */
5305 static struct mlx5_flow *
5306 flow_dv_prepare(struct rte_eth_dev *dev,
5307                 const struct rte_flow_attr *attr __rte_unused,
5308                 const struct rte_flow_item items[] __rte_unused,
5309                 const struct rte_flow_action actions[] __rte_unused,
5310                 struct rte_flow_error *error)
5311 {
5312         size_t size = sizeof(struct mlx5_flow_handle);
5313         struct mlx5_flow *dev_flow;
5314         struct mlx5_flow_handle *dev_handle;
5315         struct mlx5_priv *priv = dev->data->dev_private;
5316
5317         /* In case of corrupting the memory. */
5318         if (priv->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
5319                 rte_flow_error_set(error, ENOSPC,
5320                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5321                                    "not free temporary device flow");
5322                 return NULL;
5323         }
5324         dev_handle = rte_calloc(__func__, 1, size, 0);
5325         if (!dev_handle) {
5326                 rte_flow_error_set(error, ENOMEM,
5327                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5328                                    "not enough memory to create flow handle");
5329                 return NULL;
5330         }
5331         /* No multi-thread supporting. */
5332         dev_flow = &((struct mlx5_flow *)priv->inter_flows)[priv->flow_idx++];
5333         dev_flow->handle = dev_handle;
5334         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5335         /*
5336          * The matching value needs to be cleared to 0 before using. In the
5337          * past, it will be automatically cleared when using rte_*alloc
5338          * API. The time consumption will be almost the same as before.
5339          */
5340         memset(dev_flow->dv.value.buf, 0, MLX5_ST_SZ_BYTES(fte_match_param));
5341         dev_flow->ingress = attr->ingress;
5342         dev_flow->dv.transfer = attr->transfer;
5343         return dev_flow;
5344 }
5345
5346 #ifdef RTE_LIBRTE_MLX5_DEBUG
5347 /**
5348  * Sanity check for match mask and value. Similar to check_valid_spec() in
5349  * kernel driver. If unmasked bit is present in value, it returns failure.
5350  *
5351  * @param match_mask
5352  *   pointer to match mask buffer.
5353  * @param match_value
5354  *   pointer to match value buffer.
5355  *
5356  * @return
5357  *   0 if valid, -EINVAL otherwise.
5358  */
5359 static int
5360 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5361 {
5362         uint8_t *m = match_mask;
5363         uint8_t *v = match_value;
5364         unsigned int i;
5365
5366         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5367                 if (v[i] & ~m[i]) {
5368                         DRV_LOG(ERR,
5369                                 "match_value differs from match_criteria"
5370                                 " %p[%u] != %p[%u]",
5371                                 match_value, i, match_mask, i);
5372                         return -EINVAL;
5373                 }
5374         }
5375         return 0;
5376 }
5377 #endif
5378
5379 /**
5380  * Add Ethernet item to matcher and to the value.
5381  *
5382  * @param[in, out] matcher
5383  *   Flow matcher.
5384  * @param[in, out] key
5385  *   Flow matcher value.
5386  * @param[in] item
5387  *   Flow pattern to translate.
5388  * @param[in] inner
5389  *   Item is inner pattern.
5390  */
5391 static void
5392 flow_dv_translate_item_eth(void *matcher, void *key,
5393                            const struct rte_flow_item *item, int inner)
5394 {
5395         const struct rte_flow_item_eth *eth_m = item->mask;
5396         const struct rte_flow_item_eth *eth_v = item->spec;
5397         const struct rte_flow_item_eth nic_mask = {
5398                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5399                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5400                 .type = RTE_BE16(0xffff),
5401         };
5402         void *headers_m;
5403         void *headers_v;
5404         char *l24_v;
5405         unsigned int i;
5406
5407         if (!eth_v)
5408                 return;
5409         if (!eth_m)
5410                 eth_m = &nic_mask;
5411         if (inner) {
5412                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5413                                          inner_headers);
5414                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5415         } else {
5416                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5417                                          outer_headers);
5418                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5419         }
5420         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5421                &eth_m->dst, sizeof(eth_m->dst));
5422         /* The value must be in the range of the mask. */
5423         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5424         for (i = 0; i < sizeof(eth_m->dst); ++i)
5425                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5426         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5427                &eth_m->src, sizeof(eth_m->src));
5428         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5429         /* The value must be in the range of the mask. */
5430         for (i = 0; i < sizeof(eth_m->dst); ++i)
5431                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5432         if (eth_v->type) {
5433                 /* When ethertype is present set mask for tagged VLAN. */
5434                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5435                 /* Set value for tagged VLAN if ethertype is 802.1Q. */
5436                 if (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_VLAN) ||
5437                     eth_v->type == RTE_BE16(RTE_ETHER_TYPE_QINQ)) {
5438                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag,
5439                                  1);
5440                         /* Return here to avoid setting match on ethertype. */
5441                         return;
5442                 }
5443         }
5444         /*
5445          * HW supports match on one Ethertype, the Ethertype following the last
5446          * VLAN tag of the packet (see PRM).
5447          * Set match on ethertype only if ETH header is not followed by VLAN.
5448          */
5449         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5450                  rte_be_to_cpu_16(eth_m->type));
5451         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5452         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5453 }
5454
5455 /**
5456  * Add VLAN item to matcher and to the value.
5457  *
5458  * @param[in, out] dev_flow
5459  *   Flow descriptor.
5460  * @param[in, out] matcher
5461  *   Flow matcher.
5462  * @param[in, out] key
5463  *   Flow matcher value.
5464  * @param[in] item
5465  *   Flow pattern to translate.
5466  * @param[in] inner
5467  *   Item is inner pattern.
5468  */
5469 static void
5470 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5471                             void *matcher, void *key,
5472                             const struct rte_flow_item *item,
5473                             int inner)
5474 {
5475         const struct rte_flow_item_vlan *vlan_m = item->mask;
5476         const struct rte_flow_item_vlan *vlan_v = item->spec;
5477         void *headers_m;
5478         void *headers_v;
5479         uint16_t tci_m;
5480         uint16_t tci_v;
5481
5482         if (!vlan_v)
5483                 return;
5484         if (!vlan_m)
5485                 vlan_m = &rte_flow_item_vlan_mask;
5486         if (inner) {
5487                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5488                                          inner_headers);
5489                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5490         } else {
5491                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5492                                          outer_headers);
5493                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5494                 /*
5495                  * This is workaround, masks are not supported,
5496                  * and pre-validated.
5497                  */
5498                 dev_flow->handle->vf_vlan.tag =
5499                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5500         }
5501         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5502         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5503         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5504         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5505         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5506         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5507         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5508         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5509         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5510         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5511         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5512                  rte_be_to_cpu_16(vlan_m->inner_type));
5513         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5514                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5515 }
5516
5517 /**
5518  * Add IPV4 item to matcher and to the value.
5519  *
5520  * @param[in, out] matcher
5521  *   Flow matcher.
5522  * @param[in, out] key
5523  *   Flow matcher value.
5524  * @param[in] item
5525  *   Flow pattern to translate.
5526  * @param[in] item_flags
5527  *   Bit-fields that holds the items detected until now.
5528  * @param[in] inner
5529  *   Item is inner pattern.
5530  * @param[in] group
5531  *   The group to insert the rule.
5532  */
5533 static void
5534 flow_dv_translate_item_ipv4(void *matcher, void *key,
5535                             const struct rte_flow_item *item,
5536                             const uint64_t item_flags,
5537                             int inner, uint32_t group)
5538 {
5539         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5540         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5541         const struct rte_flow_item_ipv4 nic_mask = {
5542                 .hdr = {
5543                         .src_addr = RTE_BE32(0xffffffff),
5544                         .dst_addr = RTE_BE32(0xffffffff),
5545                         .type_of_service = 0xff,
5546                         .next_proto_id = 0xff,
5547                         .time_to_live = 0xff,
5548                 },
5549         };
5550         void *headers_m;
5551         void *headers_v;
5552         char *l24_m;
5553         char *l24_v;
5554         uint8_t tos;
5555
5556         if (inner) {
5557                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5558                                          inner_headers);
5559                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5560         } else {
5561                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5562                                          outer_headers);
5563                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5564         }
5565         if (group == 0)
5566                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5567         else
5568                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5569         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5570         /*
5571          * On outer header (which must contains L2), or inner header with L2,
5572          * set cvlan_tag mask bit to mark this packet as untagged.
5573          * This should be done even if item->spec is empty.
5574          */
5575         if (!inner || item_flags & MLX5_FLOW_LAYER_INNER_L2)
5576                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5577         if (!ipv4_v)
5578                 return;
5579         if (!ipv4_m)
5580                 ipv4_m = &nic_mask;
5581         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5582                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5583         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5584                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5585         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5586         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5587         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5588                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5589         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5590                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5591         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5592         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5593         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5594         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5595                  ipv4_m->hdr.type_of_service);
5596         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5597         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5598                  ipv4_m->hdr.type_of_service >> 2);
5599         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5600         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5601                  ipv4_m->hdr.next_proto_id);
5602         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5603                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5604         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
5605                  ipv4_m->hdr.time_to_live);
5606         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
5607                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
5608 }
5609
5610 /**
5611  * Add IPV6 item to matcher and to the value.
5612  *
5613  * @param[in, out] matcher
5614  *   Flow matcher.
5615  * @param[in, out] key
5616  *   Flow matcher value.
5617  * @param[in] item
5618  *   Flow pattern to translate.
5619  * @param[in] item_flags
5620  *   Bit-fields that holds the items detected until now.
5621  * @param[in] inner
5622  *   Item is inner pattern.
5623  * @param[in] group
5624  *   The group to insert the rule.
5625  */
5626 static void
5627 flow_dv_translate_item_ipv6(void *matcher, void *key,
5628                             const struct rte_flow_item *item,
5629                             const uint64_t item_flags,
5630                             int inner, uint32_t group)
5631 {
5632         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5633         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5634         const struct rte_flow_item_ipv6 nic_mask = {
5635                 .hdr = {
5636                         .src_addr =
5637                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5638                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5639                         .dst_addr =
5640                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5641                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5642                         .vtc_flow = RTE_BE32(0xffffffff),
5643                         .proto = 0xff,
5644                         .hop_limits = 0xff,
5645                 },
5646         };
5647         void *headers_m;
5648         void *headers_v;
5649         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5650         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5651         char *l24_m;
5652         char *l24_v;
5653         uint32_t vtc_m;
5654         uint32_t vtc_v;
5655         int i;
5656         int size;
5657
5658         if (inner) {
5659                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5660                                          inner_headers);
5661                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5662         } else {
5663                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5664                                          outer_headers);
5665                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5666         }
5667         if (group == 0)
5668                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5669         else
5670                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5671         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5672         /*
5673          * On outer header (which must contains L2), or inner header with L2,
5674          * set cvlan_tag mask bit to mark this packet as untagged.
5675          * This should be done even if item->spec is empty.
5676          */
5677         if (!inner || item_flags & MLX5_FLOW_LAYER_INNER_L2)
5678                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5679         if (!ipv6_v)
5680                 return;
5681         if (!ipv6_m)
5682                 ipv6_m = &nic_mask;
5683         size = sizeof(ipv6_m->hdr.dst_addr);
5684         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5685                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5686         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5687                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5688         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5689         for (i = 0; i < size; ++i)
5690                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5691         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5692                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5693         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5694                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5695         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5696         for (i = 0; i < size; ++i)
5697                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5698         /* TOS. */
5699         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5700         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5701         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5702         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5703         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5704         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5705         /* Label. */
5706         if (inner) {
5707                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5708                          vtc_m);
5709                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5710                          vtc_v);
5711         } else {
5712                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5713                          vtc_m);
5714                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5715                          vtc_v);
5716         }
5717         /* Protocol. */
5718         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5719                  ipv6_m->hdr.proto);
5720         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5721                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5722         /* Hop limit. */
5723         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
5724                  ipv6_m->hdr.hop_limits);
5725         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
5726                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
5727 }
5728
5729 /**
5730  * Add TCP item to matcher and to the value.
5731  *
5732  * @param[in, out] matcher
5733  *   Flow matcher.
5734  * @param[in, out] key
5735  *   Flow matcher value.
5736  * @param[in] item
5737  *   Flow pattern to translate.
5738  * @param[in] inner
5739  *   Item is inner pattern.
5740  */
5741 static void
5742 flow_dv_translate_item_tcp(void *matcher, void *key,
5743                            const struct rte_flow_item *item,
5744                            int inner)
5745 {
5746         const struct rte_flow_item_tcp *tcp_m = item->mask;
5747         const struct rte_flow_item_tcp *tcp_v = item->spec;
5748         void *headers_m;
5749         void *headers_v;
5750
5751         if (inner) {
5752                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5753                                          inner_headers);
5754                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5755         } else {
5756                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5757                                          outer_headers);
5758                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5759         }
5760         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5761         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5762         if (!tcp_v)
5763                 return;
5764         if (!tcp_m)
5765                 tcp_m = &rte_flow_item_tcp_mask;
5766         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5767                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5768         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5769                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5770         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5771                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5772         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5773                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5774         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5775                  tcp_m->hdr.tcp_flags);
5776         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5777                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5778 }
5779
5780 /**
5781  * Add UDP item to matcher and to the value.
5782  *
5783  * @param[in, out] matcher
5784  *   Flow matcher.
5785  * @param[in, out] key
5786  *   Flow matcher value.
5787  * @param[in] item
5788  *   Flow pattern to translate.
5789  * @param[in] inner
5790  *   Item is inner pattern.
5791  */
5792 static void
5793 flow_dv_translate_item_udp(void *matcher, void *key,
5794                            const struct rte_flow_item *item,
5795                            int inner)
5796 {
5797         const struct rte_flow_item_udp *udp_m = item->mask;
5798         const struct rte_flow_item_udp *udp_v = item->spec;
5799         void *headers_m;
5800         void *headers_v;
5801
5802         if (inner) {
5803                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5804                                          inner_headers);
5805                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5806         } else {
5807                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5808                                          outer_headers);
5809                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5810         }
5811         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5812         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5813         if (!udp_v)
5814                 return;
5815         if (!udp_m)
5816                 udp_m = &rte_flow_item_udp_mask;
5817         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5818                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5819         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5820                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5821         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5822                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5823         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5824                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5825 }
5826
5827 /**
5828  * Add GRE optional Key item to matcher and to the value.
5829  *
5830  * @param[in, out] matcher
5831  *   Flow matcher.
5832  * @param[in, out] key
5833  *   Flow matcher value.
5834  * @param[in] item
5835  *   Flow pattern to translate.
5836  * @param[in] inner
5837  *   Item is inner pattern.
5838  */
5839 static void
5840 flow_dv_translate_item_gre_key(void *matcher, void *key,
5841                                    const struct rte_flow_item *item)
5842 {
5843         const rte_be32_t *key_m = item->mask;
5844         const rte_be32_t *key_v = item->spec;
5845         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5846         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5847         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5848
5849         /* GRE K bit must be on and should already be validated */
5850         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5851         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5852         if (!key_v)
5853                 return;
5854         if (!key_m)
5855                 key_m = &gre_key_default_mask;
5856         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5857                  rte_be_to_cpu_32(*key_m) >> 8);
5858         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5859                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5860         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5861                  rte_be_to_cpu_32(*key_m) & 0xFF);
5862         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5863                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5864 }
5865
5866 /**
5867  * Add GRE item to matcher and to the value.
5868  *
5869  * @param[in, out] matcher
5870  *   Flow matcher.
5871  * @param[in, out] key
5872  *   Flow matcher value.
5873  * @param[in] item
5874  *   Flow pattern to translate.
5875  * @param[in] inner
5876  *   Item is inner pattern.
5877  */
5878 static void
5879 flow_dv_translate_item_gre(void *matcher, void *key,
5880                            const struct rte_flow_item *item,
5881                            int inner)
5882 {
5883         const struct rte_flow_item_gre *gre_m = item->mask;
5884         const struct rte_flow_item_gre *gre_v = item->spec;
5885         void *headers_m;
5886         void *headers_v;
5887         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5888         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5889         struct {
5890                 union {
5891                         __extension__
5892                         struct {
5893                                 uint16_t version:3;
5894                                 uint16_t rsvd0:9;
5895                                 uint16_t s_present:1;
5896                                 uint16_t k_present:1;
5897                                 uint16_t rsvd_bit1:1;
5898                                 uint16_t c_present:1;
5899                         };
5900                         uint16_t value;
5901                 };
5902         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5903
5904         if (inner) {
5905                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5906                                          inner_headers);
5907                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5908         } else {
5909                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5910                                          outer_headers);
5911                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5912         }
5913         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5914         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5915         if (!gre_v)
5916                 return;
5917         if (!gre_m)
5918                 gre_m = &rte_flow_item_gre_mask;
5919         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5920                  rte_be_to_cpu_16(gre_m->protocol));
5921         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5922                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5923         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5924         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5925         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5926                  gre_crks_rsvd0_ver_m.c_present);
5927         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5928                  gre_crks_rsvd0_ver_v.c_present &
5929                  gre_crks_rsvd0_ver_m.c_present);
5930         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5931                  gre_crks_rsvd0_ver_m.k_present);
5932         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5933                  gre_crks_rsvd0_ver_v.k_present &
5934                  gre_crks_rsvd0_ver_m.k_present);
5935         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5936                  gre_crks_rsvd0_ver_m.s_present);
5937         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5938                  gre_crks_rsvd0_ver_v.s_present &
5939                  gre_crks_rsvd0_ver_m.s_present);
5940 }
5941
5942 /**
5943  * Add NVGRE item to matcher and to the value.
5944  *
5945  * @param[in, out] matcher
5946  *   Flow matcher.
5947  * @param[in, out] key
5948  *   Flow matcher value.
5949  * @param[in] item
5950  *   Flow pattern to translate.
5951  * @param[in] inner
5952  *   Item is inner pattern.
5953  */
5954 static void
5955 flow_dv_translate_item_nvgre(void *matcher, void *key,
5956                              const struct rte_flow_item *item,
5957                              int inner)
5958 {
5959         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5960         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5961         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5962         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5963         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5964         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5965         char *gre_key_m;
5966         char *gre_key_v;
5967         int size;
5968         int i;
5969
5970         /* For NVGRE, GRE header fields must be set with defined values. */
5971         const struct rte_flow_item_gre gre_spec = {
5972                 .c_rsvd0_ver = RTE_BE16(0x2000),
5973                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5974         };
5975         const struct rte_flow_item_gre gre_mask = {
5976                 .c_rsvd0_ver = RTE_BE16(0xB000),
5977                 .protocol = RTE_BE16(UINT16_MAX),
5978         };
5979         const struct rte_flow_item gre_item = {
5980                 .spec = &gre_spec,
5981                 .mask = &gre_mask,
5982                 .last = NULL,
5983         };
5984         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5985         if (!nvgre_v)
5986                 return;
5987         if (!nvgre_m)
5988                 nvgre_m = &rte_flow_item_nvgre_mask;
5989         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5990         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5991         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5992         memcpy(gre_key_m, tni_flow_id_m, size);
5993         for (i = 0; i < size; ++i)
5994                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5995 }
5996
5997 /**
5998  * Add VXLAN item to matcher and to the value.
5999  *
6000  * @param[in, out] matcher
6001  *   Flow matcher.
6002  * @param[in, out] key
6003  *   Flow matcher value.
6004  * @param[in] item
6005  *   Flow pattern to translate.
6006  * @param[in] inner
6007  *   Item is inner pattern.
6008  */
6009 static void
6010 flow_dv_translate_item_vxlan(void *matcher, void *key,
6011                              const struct rte_flow_item *item,
6012                              int inner)
6013 {
6014         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
6015         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
6016         void *headers_m;
6017         void *headers_v;
6018         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6019         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6020         char *vni_m;
6021         char *vni_v;
6022         uint16_t dport;
6023         int size;
6024         int i;
6025
6026         if (inner) {
6027                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6028                                          inner_headers);
6029                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6030         } else {
6031                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6032                                          outer_headers);
6033                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6034         }
6035         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
6036                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
6037         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6038                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6039                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6040         }
6041         if (!vxlan_v)
6042                 return;
6043         if (!vxlan_m)
6044                 vxlan_m = &rte_flow_item_vxlan_mask;
6045         size = sizeof(vxlan_m->vni);
6046         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
6047         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
6048         memcpy(vni_m, vxlan_m->vni, size);
6049         for (i = 0; i < size; ++i)
6050                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
6051 }
6052
6053 /**
6054  * Add VXLAN-GPE item to matcher and to the value.
6055  *
6056  * @param[in, out] matcher
6057  *   Flow matcher.
6058  * @param[in, out] key
6059  *   Flow matcher value.
6060  * @param[in] item
6061  *   Flow pattern to translate.
6062  * @param[in] inner
6063  *   Item is inner pattern.
6064  */
6065
6066 static void
6067 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
6068                                  const struct rte_flow_item *item, int inner)
6069 {
6070         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
6071         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
6072         void *headers_m;
6073         void *headers_v;
6074         void *misc_m =
6075                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
6076         void *misc_v =
6077                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6078         char *vni_m;
6079         char *vni_v;
6080         uint16_t dport;
6081         int size;
6082         int i;
6083         uint8_t flags_m = 0xff;
6084         uint8_t flags_v = 0xc;
6085
6086         if (inner) {
6087                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6088                                          inner_headers);
6089                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6090         } else {
6091                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6092                                          outer_headers);
6093                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6094         }
6095         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
6096                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
6097         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6098                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6099                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6100         }
6101         if (!vxlan_v)
6102                 return;
6103         if (!vxlan_m)
6104                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
6105         size = sizeof(vxlan_m->vni);
6106         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
6107         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
6108         memcpy(vni_m, vxlan_m->vni, size);
6109         for (i = 0; i < size; ++i)
6110                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
6111         if (vxlan_m->flags) {
6112                 flags_m = vxlan_m->flags;
6113                 flags_v = vxlan_v->flags;
6114         }
6115         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
6116         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
6117         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
6118                  vxlan_m->protocol);
6119         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
6120                  vxlan_v->protocol);
6121 }
6122
6123 /**
6124  * Add Geneve item to matcher and to the value.
6125  *
6126  * @param[in, out] matcher
6127  *   Flow matcher.
6128  * @param[in, out] key
6129  *   Flow matcher value.
6130  * @param[in] item
6131  *   Flow pattern to translate.
6132  * @param[in] inner
6133  *   Item is inner pattern.
6134  */
6135
6136 static void
6137 flow_dv_translate_item_geneve(void *matcher, void *key,
6138                               const struct rte_flow_item *item, int inner)
6139 {
6140         const struct rte_flow_item_geneve *geneve_m = item->mask;
6141         const struct rte_flow_item_geneve *geneve_v = item->spec;
6142         void *headers_m;
6143         void *headers_v;
6144         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6145         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6146         uint16_t dport;
6147         uint16_t gbhdr_m;
6148         uint16_t gbhdr_v;
6149         char *vni_m;
6150         char *vni_v;
6151         size_t size, i;
6152
6153         if (inner) {
6154                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6155                                          inner_headers);
6156                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6157         } else {
6158                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6159                                          outer_headers);
6160                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6161         }
6162         dport = MLX5_UDP_PORT_GENEVE;
6163         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6164                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6165                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6166         }
6167         if (!geneve_v)
6168                 return;
6169         if (!geneve_m)
6170                 geneve_m = &rte_flow_item_geneve_mask;
6171         size = sizeof(geneve_m->vni);
6172         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
6173         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
6174         memcpy(vni_m, geneve_m->vni, size);
6175         for (i = 0; i < size; ++i)
6176                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
6177         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
6178                  rte_be_to_cpu_16(geneve_m->protocol));
6179         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
6180                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
6181         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
6182         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
6183         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
6184                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6185         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
6186                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6187         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
6188                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6189         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
6190                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
6191                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6192 }
6193
6194 /**
6195  * Add MPLS item to matcher and to the value.
6196  *
6197  * @param[in, out] matcher
6198  *   Flow matcher.
6199  * @param[in, out] key
6200  *   Flow matcher value.
6201  * @param[in] item
6202  *   Flow pattern to translate.
6203  * @param[in] prev_layer
6204  *   The protocol layer indicated in previous item.
6205  * @param[in] inner
6206  *   Item is inner pattern.
6207  */
6208 static void
6209 flow_dv_translate_item_mpls(void *matcher, void *key,
6210                             const struct rte_flow_item *item,
6211                             uint64_t prev_layer,
6212                             int inner)
6213 {
6214         const uint32_t *in_mpls_m = item->mask;
6215         const uint32_t *in_mpls_v = item->spec;
6216         uint32_t *out_mpls_m = 0;
6217         uint32_t *out_mpls_v = 0;
6218         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6219         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6220         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
6221                                      misc_parameters_2);
6222         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6223         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
6224         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6225
6226         switch (prev_layer) {
6227         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6228                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
6229                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
6230                          MLX5_UDP_PORT_MPLS);
6231                 break;
6232         case MLX5_FLOW_LAYER_GRE:
6233                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
6234                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
6235                          RTE_ETHER_TYPE_MPLS);
6236                 break;
6237         default:
6238                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6239                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6240                          IPPROTO_MPLS);
6241                 break;
6242         }
6243         if (!in_mpls_v)
6244                 return;
6245         if (!in_mpls_m)
6246                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
6247         switch (prev_layer) {
6248         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6249                 out_mpls_m =
6250                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6251                                                  outer_first_mpls_over_udp);
6252                 out_mpls_v =
6253                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6254                                                  outer_first_mpls_over_udp);
6255                 break;
6256         case MLX5_FLOW_LAYER_GRE:
6257                 out_mpls_m =
6258                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6259                                                  outer_first_mpls_over_gre);
6260                 out_mpls_v =
6261                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6262                                                  outer_first_mpls_over_gre);
6263                 break;
6264         default:
6265                 /* Inner MPLS not over GRE is not supported. */
6266                 if (!inner) {
6267                         out_mpls_m =
6268                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6269                                                          misc2_m,
6270                                                          outer_first_mpls);
6271                         out_mpls_v =
6272                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6273                                                          misc2_v,
6274                                                          outer_first_mpls);
6275                 }
6276                 break;
6277         }
6278         if (out_mpls_m && out_mpls_v) {
6279                 *out_mpls_m = *in_mpls_m;
6280                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
6281         }
6282 }
6283
6284 /**
6285  * Add metadata register item to matcher
6286  *
6287  * @param[in, out] matcher
6288  *   Flow matcher.
6289  * @param[in, out] key
6290  *   Flow matcher value.
6291  * @param[in] reg_type
6292  *   Type of device metadata register
6293  * @param[in] value
6294  *   Register value
6295  * @param[in] mask
6296  *   Register mask
6297  */
6298 static void
6299 flow_dv_match_meta_reg(void *matcher, void *key,
6300                        enum modify_reg reg_type,
6301                        uint32_t data, uint32_t mask)
6302 {
6303         void *misc2_m =
6304                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
6305         void *misc2_v =
6306                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6307         uint32_t temp;
6308
6309         data &= mask;
6310         switch (reg_type) {
6311         case REG_A:
6312                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
6313                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
6314                 break;
6315         case REG_B:
6316                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
6317                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
6318                 break;
6319         case REG_C_0:
6320                 /*
6321                  * The metadata register C0 field might be divided into
6322                  * source vport index and META item value, we should set
6323                  * this field according to specified mask, not as whole one.
6324                  */
6325                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
6326                 temp |= mask;
6327                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
6328                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
6329                 temp &= ~mask;
6330                 temp |= data;
6331                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
6332                 break;
6333         case REG_C_1:
6334                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
6335                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
6336                 break;
6337         case REG_C_2:
6338                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
6339                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
6340                 break;
6341         case REG_C_3:
6342                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6343                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6344                 break;
6345         case REG_C_4:
6346                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6347                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6348                 break;
6349         case REG_C_5:
6350                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6351                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6352                 break;
6353         case REG_C_6:
6354                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6355                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6356                 break;
6357         case REG_C_7:
6358                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6359                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6360                 break;
6361         default:
6362                 MLX5_ASSERT(false);
6363                 break;
6364         }
6365 }
6366
6367 /**
6368  * Add MARK item to matcher
6369  *
6370  * @param[in] dev
6371  *   The device to configure through.
6372  * @param[in, out] matcher
6373  *   Flow matcher.
6374  * @param[in, out] key
6375  *   Flow matcher value.
6376  * @param[in] item
6377  *   Flow pattern to translate.
6378  */
6379 static void
6380 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6381                             void *matcher, void *key,
6382                             const struct rte_flow_item *item)
6383 {
6384         struct mlx5_priv *priv = dev->data->dev_private;
6385         const struct rte_flow_item_mark *mark;
6386         uint32_t value;
6387         uint32_t mask;
6388
6389         mark = item->mask ? (const void *)item->mask :
6390                             &rte_flow_item_mark_mask;
6391         mask = mark->id & priv->sh->dv_mark_mask;
6392         mark = (const void *)item->spec;
6393         MLX5_ASSERT(mark);
6394         value = mark->id & priv->sh->dv_mark_mask & mask;
6395         if (mask) {
6396                 enum modify_reg reg;
6397
6398                 /* Get the metadata register index for the mark. */
6399                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6400                 MLX5_ASSERT(reg > 0);
6401                 if (reg == REG_C_0) {
6402                         struct mlx5_priv *priv = dev->data->dev_private;
6403                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6404                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6405
6406                         mask &= msk_c0;
6407                         mask <<= shl_c0;
6408                         value <<= shl_c0;
6409                 }
6410                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6411         }
6412 }
6413
6414 /**
6415  * Add META item to matcher
6416  *
6417  * @param[in] dev
6418  *   The devich to configure through.
6419  * @param[in, out] matcher
6420  *   Flow matcher.
6421  * @param[in, out] key
6422  *   Flow matcher value.
6423  * @param[in] attr
6424  *   Attributes of flow that includes this item.
6425  * @param[in] item
6426  *   Flow pattern to translate.
6427  */
6428 static void
6429 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6430                             void *matcher, void *key,
6431                             const struct rte_flow_attr *attr,
6432                             const struct rte_flow_item *item)
6433 {
6434         const struct rte_flow_item_meta *meta_m;
6435         const struct rte_flow_item_meta *meta_v;
6436
6437         meta_m = (const void *)item->mask;
6438         if (!meta_m)
6439                 meta_m = &rte_flow_item_meta_mask;
6440         meta_v = (const void *)item->spec;
6441         if (meta_v) {
6442                 int reg;
6443                 uint32_t value = meta_v->data;
6444                 uint32_t mask = meta_m->data;
6445
6446                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6447                 if (reg < 0)
6448                         return;
6449                 /*
6450                  * In datapath code there is no endianness
6451                  * coversions for perfromance reasons, all
6452                  * pattern conversions are done in rte_flow.
6453                  */
6454                 value = rte_cpu_to_be_32(value);
6455                 mask = rte_cpu_to_be_32(mask);
6456                 if (reg == REG_C_0) {
6457                         struct mlx5_priv *priv = dev->data->dev_private;
6458                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6459                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6460 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6461                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6462
6463                         value >>= shr_c0;
6464                         mask >>= shr_c0;
6465 #endif
6466                         value <<= shl_c0;
6467                         mask <<= shl_c0;
6468                         MLX5_ASSERT(msk_c0);
6469                         MLX5_ASSERT(!(~msk_c0 & mask));
6470                 }
6471                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6472         }
6473 }
6474
6475 /**
6476  * Add vport metadata Reg C0 item to matcher
6477  *
6478  * @param[in, out] matcher
6479  *   Flow matcher.
6480  * @param[in, out] key
6481  *   Flow matcher value.
6482  * @param[in] reg
6483  *   Flow pattern to translate.
6484  */
6485 static void
6486 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6487                                   uint32_t value, uint32_t mask)
6488 {
6489         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6490 }
6491
6492 /**
6493  * Add tag item to matcher
6494  *
6495  * @param[in] dev
6496  *   The devich to configure through.
6497  * @param[in, out] matcher
6498  *   Flow matcher.
6499  * @param[in, out] key
6500  *   Flow matcher value.
6501  * @param[in] item
6502  *   Flow pattern to translate.
6503  */
6504 static void
6505 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6506                                 void *matcher, void *key,
6507                                 const struct rte_flow_item *item)
6508 {
6509         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6510         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6511         uint32_t mask, value;
6512
6513         MLX5_ASSERT(tag_v);
6514         value = tag_v->data;
6515         mask = tag_m ? tag_m->data : UINT32_MAX;
6516         if (tag_v->id == REG_C_0) {
6517                 struct mlx5_priv *priv = dev->data->dev_private;
6518                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6519                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6520
6521                 mask &= msk_c0;
6522                 mask <<= shl_c0;
6523                 value <<= shl_c0;
6524         }
6525         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6526 }
6527
6528 /**
6529  * Add TAG item to matcher
6530  *
6531  * @param[in] dev
6532  *   The devich to configure through.
6533  * @param[in, out] matcher
6534  *   Flow matcher.
6535  * @param[in, out] key
6536  *   Flow matcher value.
6537  * @param[in] item
6538  *   Flow pattern to translate.
6539  */
6540 static void
6541 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6542                            void *matcher, void *key,
6543                            const struct rte_flow_item *item)
6544 {
6545         const struct rte_flow_item_tag *tag_v = item->spec;
6546         const struct rte_flow_item_tag *tag_m = item->mask;
6547         enum modify_reg reg;
6548
6549         MLX5_ASSERT(tag_v);
6550         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6551         /* Get the metadata register index for the tag. */
6552         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6553         MLX5_ASSERT(reg > 0);
6554         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6555 }
6556
6557 /**
6558  * Add source vport match to the specified matcher.
6559  *
6560  * @param[in, out] matcher
6561  *   Flow matcher.
6562  * @param[in, out] key
6563  *   Flow matcher value.
6564  * @param[in] port
6565  *   Source vport value to match
6566  * @param[in] mask
6567  *   Mask
6568  */
6569 static void
6570 flow_dv_translate_item_source_vport(void *matcher, void *key,
6571                                     int16_t port, uint16_t mask)
6572 {
6573         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6574         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6575
6576         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6577         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6578 }
6579
6580 /**
6581  * Translate port-id item to eswitch match on  port-id.
6582  *
6583  * @param[in] dev
6584  *   The devich to configure through.
6585  * @param[in, out] matcher
6586  *   Flow matcher.
6587  * @param[in, out] key
6588  *   Flow matcher value.
6589  * @param[in] item
6590  *   Flow pattern to translate.
6591  *
6592  * @return
6593  *   0 on success, a negative errno value otherwise.
6594  */
6595 static int
6596 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6597                                void *key, const struct rte_flow_item *item)
6598 {
6599         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6600         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6601         struct mlx5_priv *priv;
6602         uint16_t mask, id;
6603
6604         mask = pid_m ? pid_m->id : 0xffff;
6605         id = pid_v ? pid_v->id : dev->data->port_id;
6606         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6607         if (!priv)
6608                 return -rte_errno;
6609         /* Translate to vport field or to metadata, depending on mode. */
6610         if (priv->vport_meta_mask)
6611                 flow_dv_translate_item_meta_vport(matcher, key,
6612                                                   priv->vport_meta_tag,
6613                                                   priv->vport_meta_mask);
6614         else
6615                 flow_dv_translate_item_source_vport(matcher, key,
6616                                                     priv->vport_id, mask);
6617         return 0;
6618 }
6619
6620 /**
6621  * Add ICMP6 item to matcher and to the value.
6622  *
6623  * @param[in, out] matcher
6624  *   Flow matcher.
6625  * @param[in, out] key
6626  *   Flow matcher value.
6627  * @param[in] item
6628  *   Flow pattern to translate.
6629  * @param[in] inner
6630  *   Item is inner pattern.
6631  */
6632 static void
6633 flow_dv_translate_item_icmp6(void *matcher, void *key,
6634                               const struct rte_flow_item *item,
6635                               int inner)
6636 {
6637         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6638         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6639         void *headers_m;
6640         void *headers_v;
6641         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6642                                      misc_parameters_3);
6643         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6644         if (inner) {
6645                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6646                                          inner_headers);
6647                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6648         } else {
6649                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6650                                          outer_headers);
6651                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6652         }
6653         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6654         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6655         if (!icmp6_v)
6656                 return;
6657         if (!icmp6_m)
6658                 icmp6_m = &rte_flow_item_icmp6_mask;
6659         /*
6660          * Force flow only to match the non-fragmented IPv6 ICMPv6 packets.
6661          * If only the protocol is specified, no need to match the frag.
6662          */
6663         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6664         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6665         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6666         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6667                  icmp6_v->type & icmp6_m->type);
6668         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6669         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6670                  icmp6_v->code & icmp6_m->code);
6671 }
6672
6673 /**
6674  * Add ICMP item to matcher and to the value.
6675  *
6676  * @param[in, out] matcher
6677  *   Flow matcher.
6678  * @param[in, out] key
6679  *   Flow matcher value.
6680  * @param[in] item
6681  *   Flow pattern to translate.
6682  * @param[in] inner
6683  *   Item is inner pattern.
6684  */
6685 static void
6686 flow_dv_translate_item_icmp(void *matcher, void *key,
6687                             const struct rte_flow_item *item,
6688                             int inner)
6689 {
6690         const struct rte_flow_item_icmp *icmp_m = item->mask;
6691         const struct rte_flow_item_icmp *icmp_v = item->spec;
6692         void *headers_m;
6693         void *headers_v;
6694         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6695                                      misc_parameters_3);
6696         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6697         if (inner) {
6698                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6699                                          inner_headers);
6700                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6701         } else {
6702                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6703                                          outer_headers);
6704                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6705         }
6706         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6707         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6708         if (!icmp_v)
6709                 return;
6710         if (!icmp_m)
6711                 icmp_m = &rte_flow_item_icmp_mask;
6712         /*
6713          * Force flow only to match the non-fragmented IPv4 ICMP packets.
6714          * If only the protocol is specified, no need to match the frag.
6715          */
6716         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6717         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6718         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6719                  icmp_m->hdr.icmp_type);
6720         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6721                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6722         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6723                  icmp_m->hdr.icmp_code);
6724         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6725                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6726 }
6727
6728 /**
6729  * Add GTP item to matcher and to the value.
6730  *
6731  * @param[in, out] matcher
6732  *   Flow matcher.
6733  * @param[in, out] key
6734  *   Flow matcher value.
6735  * @param[in] item
6736  *   Flow pattern to translate.
6737  * @param[in] inner
6738  *   Item is inner pattern.
6739  */
6740 static void
6741 flow_dv_translate_item_gtp(void *matcher, void *key,
6742                            const struct rte_flow_item *item, int inner)
6743 {
6744         const struct rte_flow_item_gtp *gtp_m = item->mask;
6745         const struct rte_flow_item_gtp *gtp_v = item->spec;
6746         void *headers_m;
6747         void *headers_v;
6748         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6749                                      misc_parameters_3);
6750         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6751         uint16_t dport = RTE_GTPU_UDP_PORT;
6752
6753         if (inner) {
6754                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6755                                          inner_headers);
6756                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6757         } else {
6758                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6759                                          outer_headers);
6760                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6761         }
6762         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6763                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6764                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6765         }
6766         if (!gtp_v)
6767                 return;
6768         if (!gtp_m)
6769                 gtp_m = &rte_flow_item_gtp_mask;
6770         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6771         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6772                  gtp_v->msg_type & gtp_m->msg_type);
6773         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6774                  rte_be_to_cpu_32(gtp_m->teid));
6775         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6776                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6777 }
6778
6779 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6780
6781 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6782         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6783                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6784
6785 /**
6786  * Calculate flow matcher enable bitmap.
6787  *
6788  * @param match_criteria
6789  *   Pointer to flow matcher criteria.
6790  *
6791  * @return
6792  *   Bitmap of enabled fields.
6793  */
6794 static uint8_t
6795 flow_dv_matcher_enable(uint32_t *match_criteria)
6796 {
6797         uint8_t match_criteria_enable;
6798
6799         match_criteria_enable =
6800                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6801                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6802         match_criteria_enable |=
6803                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6804                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6805         match_criteria_enable |=
6806                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6807                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6808         match_criteria_enable |=
6809                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6810                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6811         match_criteria_enable |=
6812                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6813                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6814         return match_criteria_enable;
6815 }
6816
6817
6818 /**
6819  * Get a flow table.
6820  *
6821  * @param[in, out] dev
6822  *   Pointer to rte_eth_dev structure.
6823  * @param[in] table_id
6824  *   Table id to use.
6825  * @param[in] egress
6826  *   Direction of the table.
6827  * @param[in] transfer
6828  *   E-Switch or NIC flow.
6829  * @param[out] error
6830  *   pointer to error structure.
6831  *
6832  * @return
6833  *   Returns tables resource based on the index, NULL in case of failed.
6834  */
6835 static struct mlx5_flow_tbl_resource *
6836 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6837                          uint32_t table_id, uint8_t egress,
6838                          uint8_t transfer,
6839                          struct rte_flow_error *error)
6840 {
6841         struct mlx5_priv *priv = dev->data->dev_private;
6842         struct mlx5_ibv_shared *sh = priv->sh;
6843         struct mlx5_flow_tbl_resource *tbl;
6844         union mlx5_flow_tbl_key table_key = {
6845                 {
6846                         .table_id = table_id,
6847                         .reserved = 0,
6848                         .domain = !!transfer,
6849                         .direction = !!egress,
6850                 }
6851         };
6852         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6853                                                          table_key.v64);
6854         struct mlx5_flow_tbl_data_entry *tbl_data;
6855         int ret;
6856         void *domain;
6857
6858         if (pos) {
6859                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6860                                         entry);
6861                 tbl = &tbl_data->tbl;
6862                 rte_atomic32_inc(&tbl->refcnt);
6863                 return tbl;
6864         }
6865         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6866         if (!tbl_data) {
6867                 rte_flow_error_set(error, ENOMEM,
6868                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6869                                    NULL,
6870                                    "cannot allocate flow table data entry");
6871                 return NULL;
6872         }
6873         tbl = &tbl_data->tbl;
6874         pos = &tbl_data->entry;
6875         if (transfer)
6876                 domain = sh->fdb_domain;
6877         else if (egress)
6878                 domain = sh->tx_domain;
6879         else
6880                 domain = sh->rx_domain;
6881         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6882         if (!tbl->obj) {
6883                 rte_flow_error_set(error, ENOMEM,
6884                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6885                                    NULL, "cannot create flow table object");
6886                 rte_free(tbl_data);
6887                 return NULL;
6888         }
6889         /*
6890          * No multi-threads now, but still better to initialize the reference
6891          * count before insert it into the hash list.
6892          */
6893         rte_atomic32_init(&tbl->refcnt);
6894         /* Jump action reference count is initialized here. */
6895         rte_atomic32_init(&tbl_data->jump.refcnt);
6896         pos->key = table_key.v64;
6897         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6898         if (ret < 0) {
6899                 rte_flow_error_set(error, -ret,
6900                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6901                                    "cannot insert flow table data entry");
6902                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6903                 rte_free(tbl_data);
6904         }
6905         rte_atomic32_inc(&tbl->refcnt);
6906         return tbl;
6907 }
6908
6909 /**
6910  * Release a flow table.
6911  *
6912  * @param[in] dev
6913  *   Pointer to rte_eth_dev structure.
6914  * @param[in] tbl
6915  *   Table resource to be released.
6916  *
6917  * @return
6918  *   Returns 0 if table was released, else return 1;
6919  */
6920 static int
6921 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6922                              struct mlx5_flow_tbl_resource *tbl)
6923 {
6924         struct mlx5_priv *priv = dev->data->dev_private;
6925         struct mlx5_ibv_shared *sh = priv->sh;
6926         struct mlx5_flow_tbl_data_entry *tbl_data =
6927                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6928
6929         if (!tbl)
6930                 return 0;
6931         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6932                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6933
6934                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6935                 tbl->obj = NULL;
6936                 /* remove the entry from the hash list and free memory. */
6937                 mlx5_hlist_remove(sh->flow_tbls, pos);
6938                 rte_free(tbl_data);
6939                 return 0;
6940         }
6941         return 1;
6942 }
6943
6944 /**
6945  * Register the flow matcher.
6946  *
6947  * @param[in, out] dev
6948  *   Pointer to rte_eth_dev structure.
6949  * @param[in, out] matcher
6950  *   Pointer to flow matcher.
6951  * @param[in, out] key
6952  *   Pointer to flow table key.
6953  * @parm[in, out] dev_flow
6954  *   Pointer to the dev_flow.
6955  * @param[out] error
6956  *   pointer to error structure.
6957  *
6958  * @return
6959  *   0 on success otherwise -errno and errno is set.
6960  */
6961 static int
6962 flow_dv_matcher_register(struct rte_eth_dev *dev,
6963                          struct mlx5_flow_dv_matcher *matcher,
6964                          union mlx5_flow_tbl_key *key,
6965                          struct mlx5_flow *dev_flow,
6966                          struct rte_flow_error *error)
6967 {
6968         struct mlx5_priv *priv = dev->data->dev_private;
6969         struct mlx5_ibv_shared *sh = priv->sh;
6970         struct mlx5_flow_dv_matcher *cache_matcher;
6971         struct mlx5dv_flow_matcher_attr dv_attr = {
6972                 .type = IBV_FLOW_ATTR_NORMAL,
6973                 .match_mask = (void *)&matcher->mask,
6974         };
6975         struct mlx5_flow_tbl_resource *tbl;
6976         struct mlx5_flow_tbl_data_entry *tbl_data;
6977
6978         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6979                                        key->domain, error);
6980         if (!tbl)
6981                 return -rte_errno;      /* No need to refill the error info */
6982         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6983         /* Lookup from cache. */
6984         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6985                 if (matcher->crc == cache_matcher->crc &&
6986                     matcher->priority == cache_matcher->priority &&
6987                     !memcmp((const void *)matcher->mask.buf,
6988                             (const void *)cache_matcher->mask.buf,
6989                             cache_matcher->mask.size)) {
6990                         DRV_LOG(DEBUG,
6991                                 "%s group %u priority %hd use %s "
6992                                 "matcher %p: refcnt %d++",
6993                                 key->domain ? "FDB" : "NIC", key->table_id,
6994                                 cache_matcher->priority,
6995                                 key->direction ? "tx" : "rx",
6996                                 (void *)cache_matcher,
6997                                 rte_atomic32_read(&cache_matcher->refcnt));
6998                         rte_atomic32_inc(&cache_matcher->refcnt);
6999                         dev_flow->handle->dvh.matcher = cache_matcher;
7000                         /* old matcher should not make the table ref++. */
7001                         flow_dv_tbl_resource_release(dev, tbl);
7002                         return 0;
7003                 }
7004         }
7005         /* Register new matcher. */
7006         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
7007         if (!cache_matcher) {
7008                 flow_dv_tbl_resource_release(dev, tbl);
7009                 return rte_flow_error_set(error, ENOMEM,
7010                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7011                                           "cannot allocate matcher memory");
7012         }
7013         *cache_matcher = *matcher;
7014         dv_attr.match_criteria_enable =
7015                 flow_dv_matcher_enable(cache_matcher->mask.buf);
7016         dv_attr.priority = matcher->priority;
7017         if (key->direction)
7018                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
7019         cache_matcher->matcher_object =
7020                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
7021         if (!cache_matcher->matcher_object) {
7022                 rte_free(cache_matcher);
7023 #ifdef HAVE_MLX5DV_DR
7024                 flow_dv_tbl_resource_release(dev, tbl);
7025 #endif
7026                 return rte_flow_error_set(error, ENOMEM,
7027                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7028                                           NULL, "cannot create matcher");
7029         }
7030         /* Save the table information */
7031         cache_matcher->tbl = tbl;
7032         rte_atomic32_init(&cache_matcher->refcnt);
7033         /* only matcher ref++, table ref++ already done above in get API. */
7034         rte_atomic32_inc(&cache_matcher->refcnt);
7035         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
7036         dev_flow->handle->dvh.matcher = cache_matcher;
7037         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
7038                 key->domain ? "FDB" : "NIC", key->table_id,
7039                 cache_matcher->priority,
7040                 key->direction ? "tx" : "rx", (void *)cache_matcher,
7041                 rte_atomic32_read(&cache_matcher->refcnt));
7042         return 0;
7043 }
7044
7045 /**
7046  * Find existing tag resource or create and register a new one.
7047  *
7048  * @param dev[in, out]
7049  *   Pointer to rte_eth_dev structure.
7050  * @param[in, out] tag_be24
7051  *   Tag value in big endian then R-shift 8.
7052  * @parm[in, out] dev_flow
7053  *   Pointer to the dev_flow.
7054  * @param[out] error
7055  *   pointer to error structure.
7056  *
7057  * @return
7058  *   0 on success otherwise -errno and errno is set.
7059  */
7060 static int
7061 flow_dv_tag_resource_register
7062                         (struct rte_eth_dev *dev,
7063                          uint32_t tag_be24,
7064                          struct mlx5_flow *dev_flow,
7065                          struct rte_flow_error *error)
7066 {
7067         struct mlx5_priv *priv = dev->data->dev_private;
7068         struct mlx5_ibv_shared *sh = priv->sh;
7069         struct mlx5_flow_dv_tag_resource *cache_resource;
7070         struct mlx5_hlist_entry *entry;
7071
7072         /* Lookup a matching resource from cache. */
7073         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
7074         if (entry) {
7075                 cache_resource = container_of
7076                         (entry, struct mlx5_flow_dv_tag_resource, entry);
7077                 rte_atomic32_inc(&cache_resource->refcnt);
7078                 dev_flow->handle->dvh.tag_resource = cache_resource;
7079                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
7080                         (void *)cache_resource,
7081                         rte_atomic32_read(&cache_resource->refcnt));
7082                 return 0;
7083         }
7084         /* Register new resource. */
7085         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
7086         if (!cache_resource)
7087                 return rte_flow_error_set(error, ENOMEM,
7088                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7089                                           "cannot allocate resource memory");
7090         cache_resource->entry.key = (uint64_t)tag_be24;
7091         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
7092         if (!cache_resource->action) {
7093                 rte_free(cache_resource);
7094                 return rte_flow_error_set(error, ENOMEM,
7095                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7096                                           NULL, "cannot create action");
7097         }
7098         rte_atomic32_init(&cache_resource->refcnt);
7099         rte_atomic32_inc(&cache_resource->refcnt);
7100         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
7101                 mlx5_glue->destroy_flow_action(cache_resource->action);
7102                 rte_free(cache_resource);
7103                 return rte_flow_error_set(error, EEXIST,
7104                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7105                                           NULL, "cannot insert tag");
7106         }
7107         dev_flow->handle->dvh.tag_resource = cache_resource;
7108         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
7109                 (void *)cache_resource,
7110                 rte_atomic32_read(&cache_resource->refcnt));
7111         return 0;
7112 }
7113
7114 /**
7115  * Release the tag.
7116  *
7117  * @param dev
7118  *   Pointer to Ethernet device.
7119  * @param flow
7120  *   Pointer to mlx5_flow.
7121  *
7122  * @return
7123  *   1 while a reference on it exists, 0 when freed.
7124  */
7125 static int
7126 flow_dv_tag_release(struct rte_eth_dev *dev,
7127                     struct mlx5_flow_dv_tag_resource *tag)
7128 {
7129         struct mlx5_priv *priv = dev->data->dev_private;
7130         struct mlx5_ibv_shared *sh = priv->sh;
7131
7132         MLX5_ASSERT(tag);
7133         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
7134                 dev->data->port_id, (void *)tag,
7135                 rte_atomic32_read(&tag->refcnt));
7136         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
7137                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
7138                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
7139                 DRV_LOG(DEBUG, "port %u tag %p: removed",
7140                         dev->data->port_id, (void *)tag);
7141                 rte_free(tag);
7142                 return 0;
7143         }
7144         return 1;
7145 }
7146
7147 /**
7148  * Translate port ID action to vport.
7149  *
7150  * @param[in] dev
7151  *   Pointer to rte_eth_dev structure.
7152  * @param[in] action
7153  *   Pointer to the port ID action.
7154  * @param[out] dst_port_id
7155  *   The target port ID.
7156  * @param[out] error
7157  *   Pointer to the error structure.
7158  *
7159  * @return
7160  *   0 on success, a negative errno value otherwise and rte_errno is set.
7161  */
7162 static int
7163 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
7164                                  const struct rte_flow_action *action,
7165                                  uint32_t *dst_port_id,
7166                                  struct rte_flow_error *error)
7167 {
7168         uint32_t port;
7169         struct mlx5_priv *priv;
7170         const struct rte_flow_action_port_id *conf =
7171                         (const struct rte_flow_action_port_id *)action->conf;
7172
7173         port = conf->original ? dev->data->port_id : conf->id;
7174         priv = mlx5_port_to_eswitch_info(port, false);
7175         if (!priv)
7176                 return rte_flow_error_set(error, -rte_errno,
7177                                           RTE_FLOW_ERROR_TYPE_ACTION,
7178                                           NULL,
7179                                           "No eswitch info was found for port");
7180 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
7181         /*
7182          * This parameter is transferred to
7183          * mlx5dv_dr_action_create_dest_ib_port().
7184          */
7185         *dst_port_id = priv->ibv_port;
7186 #else
7187         /*
7188          * Legacy mode, no LAG configurations is supported.
7189          * This parameter is transferred to
7190          * mlx5dv_dr_action_create_dest_vport().
7191          */
7192         *dst_port_id = priv->vport_id;
7193 #endif
7194         return 0;
7195 }
7196
7197 /**
7198  * Add Tx queue matcher
7199  *
7200  * @param[in] dev
7201  *   Pointer to the dev struct.
7202  * @param[in, out] matcher
7203  *   Flow matcher.
7204  * @param[in, out] key
7205  *   Flow matcher value.
7206  * @param[in] item
7207  *   Flow pattern to translate.
7208  * @param[in] inner
7209  *   Item is inner pattern.
7210  */
7211 static void
7212 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
7213                                 void *matcher, void *key,
7214                                 const struct rte_flow_item *item)
7215 {
7216         const struct mlx5_rte_flow_item_tx_queue *queue_m;
7217         const struct mlx5_rte_flow_item_tx_queue *queue_v;
7218         void *misc_m =
7219                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7220         void *misc_v =
7221                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7222         struct mlx5_txq_ctrl *txq;
7223         uint32_t queue;
7224
7225
7226         queue_m = (const void *)item->mask;
7227         if (!queue_m)
7228                 return;
7229         queue_v = (const void *)item->spec;
7230         if (!queue_v)
7231                 return;
7232         txq = mlx5_txq_get(dev, queue_v->queue);
7233         if (!txq)
7234                 return;
7235         queue = txq->obj->sq->id;
7236         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
7237         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
7238                  queue & queue_m->queue);
7239         mlx5_txq_release(dev, queue_v->queue);
7240 }
7241
7242 /**
7243  * Set the hash fields according to the @p flow information.
7244  *
7245  * @param[in] dev_flow
7246  *   Pointer to the mlx5_flow.
7247  */
7248 static void
7249 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
7250 {
7251         struct rte_flow *flow = dev_flow->flow;
7252         uint64_t items = dev_flow->handle->layers;
7253         int rss_inner = 0;
7254         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
7255
7256         dev_flow->hash_fields = 0;
7257 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
7258         if (flow->rss.level >= 2) {
7259                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
7260                 rss_inner = 1;
7261         }
7262 #endif
7263         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
7264             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
7265                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
7266                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7267                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
7268                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7269                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
7270                         else
7271                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
7272                 }
7273         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
7274                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
7275                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
7276                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7277                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
7278                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7279                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
7280                         else
7281                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
7282                 }
7283         }
7284         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
7285             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
7286                 if (rss_types & ETH_RSS_UDP) {
7287                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7288                                 dev_flow->hash_fields |=
7289                                                 IBV_RX_HASH_SRC_PORT_UDP;
7290                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7291                                 dev_flow->hash_fields |=
7292                                                 IBV_RX_HASH_DST_PORT_UDP;
7293                         else
7294                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
7295                 }
7296         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
7297                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
7298                 if (rss_types & ETH_RSS_TCP) {
7299                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7300                                 dev_flow->hash_fields |=
7301                                                 IBV_RX_HASH_SRC_PORT_TCP;
7302                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7303                                 dev_flow->hash_fields |=
7304                                                 IBV_RX_HASH_DST_PORT_TCP;
7305                         else
7306                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
7307                 }
7308         }
7309 }
7310
7311 /**
7312  * Fill the flow with DV spec, lock free
7313  * (mutex should be acquired by caller).
7314  *
7315  * @param[in] dev
7316  *   Pointer to rte_eth_dev structure.
7317  * @param[in, out] dev_flow
7318  *   Pointer to the sub flow.
7319  * @param[in] attr
7320  *   Pointer to the flow attributes.
7321  * @param[in] items
7322  *   Pointer to the list of items.
7323  * @param[in] actions
7324  *   Pointer to the list of actions.
7325  * @param[out] error
7326  *   Pointer to the error structure.
7327  *
7328  * @return
7329  *   0 on success, a negative errno value otherwise and rte_errno is set.
7330  */
7331 static int
7332 __flow_dv_translate(struct rte_eth_dev *dev,
7333                     struct mlx5_flow *dev_flow,
7334                     const struct rte_flow_attr *attr,
7335                     const struct rte_flow_item items[],
7336                     const struct rte_flow_action actions[],
7337                     struct rte_flow_error *error)
7338 {
7339         struct mlx5_priv *priv = dev->data->dev_private;
7340         struct mlx5_dev_config *dev_conf = &priv->config;
7341         struct rte_flow *flow = dev_flow->flow;
7342         struct mlx5_flow_handle *handle = dev_flow->handle;
7343         uint64_t item_flags = 0;
7344         uint64_t last_item = 0;
7345         uint64_t action_flags = 0;
7346         uint64_t priority = attr->priority;
7347         struct mlx5_flow_dv_matcher matcher = {
7348                 .mask = {
7349                         .size = sizeof(matcher.mask.buf),
7350                 },
7351         };
7352         int actions_n = 0;
7353         bool actions_end = false;
7354         union {
7355                 struct mlx5_flow_dv_modify_hdr_resource res;
7356                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7357                             sizeof(struct mlx5_modification_cmd) *
7358                             (MLX5_MAX_MODIFY_NUM + 1)];
7359         } mhdr_dummy;
7360         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7361         union flow_dv_attr flow_attr = { .attr = 0 };
7362         uint32_t tag_be;
7363         union mlx5_flow_tbl_key tbl_key;
7364         uint32_t modify_action_position = UINT32_MAX;
7365         void *match_mask = matcher.mask.buf;
7366         void *match_value = dev_flow->dv.value.buf;
7367         uint8_t next_protocol = 0xff;
7368         struct rte_vlan_hdr vlan = { 0 };
7369         uint32_t table;
7370         int ret = 0;
7371
7372         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7373                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7374         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7375                                        !!priv->fdb_def_rule, &table, error);
7376         if (ret)
7377                 return ret;
7378         dev_flow->dv.group = table;
7379         if (attr->transfer)
7380                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7381         if (priority == MLX5_FLOW_PRIO_RSVD)
7382                 priority = dev_conf->flow_prio - 1;
7383         /* number of actions must be set to 0 in case of dirty stack. */
7384         mhdr_res->actions_num = 0;
7385         for (; !actions_end ; actions++) {
7386                 const struct rte_flow_action_queue *queue;
7387                 const struct rte_flow_action_rss *rss;
7388                 const struct rte_flow_action *action = actions;
7389                 const struct rte_flow_action_count *count = action->conf;
7390                 const uint8_t *rss_key;
7391                 const struct rte_flow_action_jump *jump_data;
7392                 const struct rte_flow_action_meter *mtr;
7393                 struct mlx5_flow_tbl_resource *tbl;
7394                 uint32_t port_id = 0;
7395                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7396                 int action_type = actions->type;
7397                 const struct rte_flow_action *found_action = NULL;
7398
7399                 switch (action_type) {
7400                 case RTE_FLOW_ACTION_TYPE_VOID:
7401                         break;
7402                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7403                         if (flow_dv_translate_action_port_id(dev, action,
7404                                                              &port_id, error))
7405                                 return -rte_errno;
7406                         port_id_resource.port_id = port_id;
7407                         if (flow_dv_port_id_action_resource_register
7408                             (dev, &port_id_resource, dev_flow, error))
7409                                 return -rte_errno;
7410                         dev_flow->dv.actions[actions_n++] =
7411                                         handle->dvh.port_id_action->action;
7412                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7413                         break;
7414                 case RTE_FLOW_ACTION_TYPE_FLAG:
7415                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7416                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7417                                 struct rte_flow_action_mark mark = {
7418                                         .id = MLX5_FLOW_MARK_DEFAULT,
7419                                 };
7420
7421                                 if (flow_dv_convert_action_mark(dev, &mark,
7422                                                                 mhdr_res,
7423                                                                 error))
7424                                         return -rte_errno;
7425                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7426                                 break;
7427                         }
7428                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7429                         /*
7430                          * Only one FLAG or MARK is supported per device flow
7431                          * right now. So the pointer to the tag resource must be
7432                          * zero before the register process.
7433                          */
7434                         MLX5_ASSERT(!handle->dvh.tag_resource);
7435                         if (flow_dv_tag_resource_register(dev, tag_be,
7436                                                           dev_flow, error))
7437                                 return -rte_errno;
7438                         dev_flow->dv.actions[actions_n++] =
7439                                         handle->dvh.tag_resource->action;
7440                         break;
7441                 case RTE_FLOW_ACTION_TYPE_MARK:
7442                         action_flags |= MLX5_FLOW_ACTION_MARK;
7443                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7444                                 const struct rte_flow_action_mark *mark =
7445                                         (const struct rte_flow_action_mark *)
7446                                                 actions->conf;
7447
7448                                 if (flow_dv_convert_action_mark(dev, mark,
7449                                                                 mhdr_res,
7450                                                                 error))
7451                                         return -rte_errno;
7452                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7453                                 break;
7454                         }
7455                         /* Fall-through */
7456                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7457                         /* Legacy (non-extensive) MARK action. */
7458                         tag_be = mlx5_flow_mark_set
7459                               (((const struct rte_flow_action_mark *)
7460                                (actions->conf))->id);
7461                         MLX5_ASSERT(!handle->dvh.tag_resource);
7462                         if (flow_dv_tag_resource_register(dev, tag_be,
7463                                                           dev_flow, error))
7464                                 return -rte_errno;
7465                         dev_flow->dv.actions[actions_n++] =
7466                                         handle->dvh.tag_resource->action;
7467                         break;
7468                 case RTE_FLOW_ACTION_TYPE_SET_META:
7469                         if (flow_dv_convert_action_set_meta
7470                                 (dev, mhdr_res, attr,
7471                                  (const struct rte_flow_action_set_meta *)
7472                                   actions->conf, error))
7473                                 return -rte_errno;
7474                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7475                         break;
7476                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7477                         if (flow_dv_convert_action_set_tag
7478                                 (dev, mhdr_res,
7479                                  (const struct rte_flow_action_set_tag *)
7480                                   actions->conf, error))
7481                                 return -rte_errno;
7482                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7483                         break;
7484                 case RTE_FLOW_ACTION_TYPE_DROP:
7485                         action_flags |= MLX5_FLOW_ACTION_DROP;
7486                         break;
7487                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7488                         MLX5_ASSERT(flow->rss.queue);
7489                         queue = actions->conf;
7490                         flow->rss.queue_num = 1;
7491                         (*flow->rss.queue)[0] = queue->index;
7492                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7493                         break;
7494                 case RTE_FLOW_ACTION_TYPE_RSS:
7495                         MLX5_ASSERT(flow->rss.queue);
7496                         rss = actions->conf;
7497                         if (flow->rss.queue)
7498                                 memcpy((*flow->rss.queue), rss->queue,
7499                                        rss->queue_num * sizeof(uint16_t));
7500                         flow->rss.queue_num = rss->queue_num;
7501                         /* NULL RSS key indicates default RSS key. */
7502                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7503                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7504                         /*
7505                          * rss->level and rss.types should be set in advance
7506                          * when expanding items for RSS.
7507                          */
7508                         action_flags |= MLX5_FLOW_ACTION_RSS;
7509                         break;
7510                 case RTE_FLOW_ACTION_TYPE_COUNT:
7511                         if (!dev_conf->devx) {
7512                                 rte_errno = ENOTSUP;
7513                                 goto cnt_err;
7514                         }
7515                         flow->counter = flow_dv_counter_alloc(dev,
7516                                                         count->shared,
7517                                                         count->id,
7518                                                         dev_flow->dv.group);
7519                         if (flow->counter == NULL)
7520                                 goto cnt_err;
7521                         dev_flow->dv.actions[actions_n++] =
7522                                 flow->counter->action;
7523                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7524                         break;
7525 cnt_err:
7526                         if (rte_errno == ENOTSUP)
7527                                 return rte_flow_error_set
7528                                               (error, ENOTSUP,
7529                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7530                                                NULL,
7531                                                "count action not supported");
7532                         else
7533                                 return rte_flow_error_set
7534                                                 (error, rte_errno,
7535                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7536                                                  action,
7537                                                  "cannot create counter"
7538                                                   " object.");
7539                         break;
7540                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7541                         dev_flow->dv.actions[actions_n++] =
7542                                                 priv->sh->pop_vlan_action;
7543                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7544                         break;
7545                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7546                         flow_dev_get_vlan_info_from_items(items, &vlan);
7547                         vlan.eth_proto = rte_be_to_cpu_16
7548                              ((((const struct rte_flow_action_of_push_vlan *)
7549                                                    actions->conf)->ethertype));
7550                         found_action = mlx5_flow_find_action
7551                                         (actions + 1,
7552                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7553                         if (found_action)
7554                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7555                         found_action = mlx5_flow_find_action
7556                                         (actions + 1,
7557                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7558                         if (found_action)
7559                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7560                         if (flow_dv_create_action_push_vlan
7561                                             (dev, attr, &vlan, dev_flow, error))
7562                                 return -rte_errno;
7563                         dev_flow->dv.actions[actions_n++] =
7564                                         handle->dvh.push_vlan_res->action;
7565                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7566                         break;
7567                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7568                         /* of_vlan_push action handled this action */
7569                         MLX5_ASSERT(action_flags &
7570                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7571                         break;
7572                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7573                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7574                                 break;
7575                         flow_dev_get_vlan_info_from_items(items, &vlan);
7576                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7577                         /* If no VLAN push - this is a modify header action */
7578                         if (flow_dv_convert_action_modify_vlan_vid
7579                                                 (mhdr_res, actions, error))
7580                                 return -rte_errno;
7581                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7582                         break;
7583                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7584                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7585                         if (flow_dv_create_action_l2_encap(dev, actions,
7586                                                            dev_flow,
7587                                                            attr->transfer,
7588                                                            error))
7589                                 return -rte_errno;
7590                         dev_flow->dv.actions[actions_n++] =
7591                                         handle->dvh.encap_decap->verbs_action;
7592                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7593                         break;
7594                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7595                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7596                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7597                                                            attr->transfer,
7598                                                            error))
7599                                 return -rte_errno;
7600                         dev_flow->dv.actions[actions_n++] =
7601                                         handle->dvh.encap_decap->verbs_action;
7602                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7603                         break;
7604                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7605                         /* Handle encap with preceding decap. */
7606                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
7607                                 if (flow_dv_create_action_raw_encap
7608                                         (dev, actions, dev_flow, attr, error))
7609                                         return -rte_errno;
7610                                 dev_flow->dv.actions[actions_n++] =
7611                                         handle->dvh.encap_decap->verbs_action;
7612                         } else {
7613                                 /* Handle encap without preceding decap. */
7614                                 if (flow_dv_create_action_l2_encap
7615                                     (dev, actions, dev_flow, attr->transfer,
7616                                      error))
7617                                         return -rte_errno;
7618                                 dev_flow->dv.actions[actions_n++] =
7619                                         handle->dvh.encap_decap->verbs_action;
7620                         }
7621                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7622                         break;
7623                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7624                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
7625                                 ;
7626                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7627                                 if (flow_dv_create_action_l2_decap
7628                                     (dev, dev_flow, attr->transfer, error))
7629                                         return -rte_errno;
7630                                 dev_flow->dv.actions[actions_n++] =
7631                                         handle->dvh.encap_decap->verbs_action;
7632                         }
7633                         /* If decap is followed by encap, handle it at encap. */
7634                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7635                         break;
7636                 case RTE_FLOW_ACTION_TYPE_JUMP:
7637                         jump_data = action->conf;
7638                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7639                                                        jump_data->group,
7640                                                        !!priv->fdb_def_rule,
7641                                                        &table, error);
7642                         if (ret)
7643                                 return ret;
7644                         tbl = flow_dv_tbl_resource_get(dev, table,
7645                                                        attr->egress,
7646                                                        attr->transfer, error);
7647                         if (!tbl)
7648                                 return rte_flow_error_set
7649                                                 (error, errno,
7650                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7651                                                  NULL,
7652                                                  "cannot create jump action.");
7653                         if (flow_dv_jump_tbl_resource_register
7654                             (dev, tbl, dev_flow, error)) {
7655                                 flow_dv_tbl_resource_release(dev, tbl);
7656                                 return rte_flow_error_set
7657                                                 (error, errno,
7658                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7659                                                  NULL,
7660                                                  "cannot create jump action.");
7661                         }
7662                         dev_flow->dv.actions[actions_n++] =
7663                                         handle->dvh.jump->action;
7664                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7665                         break;
7666                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7667                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7668                         if (flow_dv_convert_action_modify_mac
7669                                         (mhdr_res, actions, error))
7670                                 return -rte_errno;
7671                         action_flags |= actions->type ==
7672                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7673                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7674                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7675                         break;
7676                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7677                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7678                         if (flow_dv_convert_action_modify_ipv4
7679                                         (mhdr_res, actions, error))
7680                                 return -rte_errno;
7681                         action_flags |= actions->type ==
7682                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7683                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7684                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7685                         break;
7686                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7687                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7688                         if (flow_dv_convert_action_modify_ipv6
7689                                         (mhdr_res, actions, error))
7690                                 return -rte_errno;
7691                         action_flags |= actions->type ==
7692                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7693                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7694                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7695                         break;
7696                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7697                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7698                         if (flow_dv_convert_action_modify_tp
7699                                         (mhdr_res, actions, items,
7700                                          &flow_attr, dev_flow, !!(action_flags &
7701                                          MLX5_FLOW_ACTION_DECAP), error))
7702                                 return -rte_errno;
7703                         action_flags |= actions->type ==
7704                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7705                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7706                                         MLX5_FLOW_ACTION_SET_TP_DST;
7707                         break;
7708                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7709                         if (flow_dv_convert_action_modify_dec_ttl
7710                                         (mhdr_res, items, &flow_attr, dev_flow,
7711                                          !!(action_flags &
7712                                          MLX5_FLOW_ACTION_DECAP), error))
7713                                 return -rte_errno;
7714                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7715                         break;
7716                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7717                         if (flow_dv_convert_action_modify_ttl
7718                                         (mhdr_res, actions, items, &flow_attr,
7719                                          dev_flow, !!(action_flags &
7720                                          MLX5_FLOW_ACTION_DECAP), error))
7721                                 return -rte_errno;
7722                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7723                         break;
7724                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7725                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7726                         if (flow_dv_convert_action_modify_tcp_seq
7727                                         (mhdr_res, actions, error))
7728                                 return -rte_errno;
7729                         action_flags |= actions->type ==
7730                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7731                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7732                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7733                         break;
7734
7735                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7736                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7737                         if (flow_dv_convert_action_modify_tcp_ack
7738                                         (mhdr_res, actions, error))
7739                                 return -rte_errno;
7740                         action_flags |= actions->type ==
7741                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7742                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7743                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7744                         break;
7745                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7746                         if (flow_dv_convert_action_set_reg
7747                                         (mhdr_res, actions, error))
7748                                 return -rte_errno;
7749                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7750                         break;
7751                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7752                         if (flow_dv_convert_action_copy_mreg
7753                                         (dev, mhdr_res, actions, error))
7754                                 return -rte_errno;
7755                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7756                         break;
7757                 case RTE_FLOW_ACTION_TYPE_METER:
7758                         mtr = actions->conf;
7759                         if (!flow->meter) {
7760                                 flow->meter = mlx5_flow_meter_attach(priv,
7761                                                         mtr->mtr_id, attr,
7762                                                         error);
7763                                 if (!flow->meter)
7764                                         return rte_flow_error_set(error,
7765                                                 rte_errno,
7766                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7767                                                 NULL,
7768                                                 "meter not found "
7769                                                 "or invalid parameters");
7770                         }
7771                         /* Set the meter action. */
7772                         dev_flow->dv.actions[actions_n++] =
7773                                 flow->meter->mfts->meter_action;
7774                         action_flags |= MLX5_FLOW_ACTION_METER;
7775                         break;
7776                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7777                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7778                                                               actions, error))
7779                                 return -rte_errno;
7780                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7781                         break;
7782                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7783                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7784                                                               actions, error))
7785                                 return -rte_errno;
7786                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7787                         break;
7788                 case RTE_FLOW_ACTION_TYPE_END:
7789                         actions_end = true;
7790                         if (mhdr_res->actions_num) {
7791                                 /* create modify action if needed. */
7792                                 if (flow_dv_modify_hdr_resource_register
7793                                         (dev, mhdr_res, dev_flow, error))
7794                                         return -rte_errno;
7795                                 dev_flow->dv.actions[modify_action_position] =
7796                                         handle->dvh.modify_hdr->verbs_action;
7797                         }
7798                         break;
7799                 default:
7800                         break;
7801                 }
7802                 if (mhdr_res->actions_num &&
7803                     modify_action_position == UINT32_MAX)
7804                         modify_action_position = actions_n++;
7805         }
7806         dev_flow->dv.actions_n = actions_n;
7807         handle->act_flags = action_flags;
7808         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7809                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7810                 int item_type = items->type;
7811
7812                 switch (item_type) {
7813                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7814                         flow_dv_translate_item_port_id(dev, match_mask,
7815                                                        match_value, items);
7816                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7817                         break;
7818                 case RTE_FLOW_ITEM_TYPE_ETH:
7819                         flow_dv_translate_item_eth(match_mask, match_value,
7820                                                    items, tunnel);
7821                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7822                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7823                                              MLX5_FLOW_LAYER_OUTER_L2;
7824                         break;
7825                 case RTE_FLOW_ITEM_TYPE_VLAN:
7826                         flow_dv_translate_item_vlan(dev_flow,
7827                                                     match_mask, match_value,
7828                                                     items, tunnel);
7829                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7830                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7831                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7832                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7833                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7834                         break;
7835                 case RTE_FLOW_ITEM_TYPE_IPV4:
7836                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7837                                                   &item_flags, &tunnel);
7838                         flow_dv_translate_item_ipv4(match_mask, match_value,
7839                                                     items, item_flags, tunnel,
7840                                                     dev_flow->dv.group);
7841                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7842                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7843                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7844                         if (items->mask != NULL &&
7845                             ((const struct rte_flow_item_ipv4 *)
7846                              items->mask)->hdr.next_proto_id) {
7847                                 next_protocol =
7848                                         ((const struct rte_flow_item_ipv4 *)
7849                                          (items->spec))->hdr.next_proto_id;
7850                                 next_protocol &=
7851                                         ((const struct rte_flow_item_ipv4 *)
7852                                          (items->mask))->hdr.next_proto_id;
7853                         } else {
7854                                 /* Reset for inner layer. */
7855                                 next_protocol = 0xff;
7856                         }
7857                         break;
7858                 case RTE_FLOW_ITEM_TYPE_IPV6:
7859                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7860                                                   &item_flags, &tunnel);
7861                         flow_dv_translate_item_ipv6(match_mask, match_value,
7862                                                     items, item_flags, tunnel,
7863                                                     dev_flow->dv.group);
7864                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7865                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7866                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7867                         if (items->mask != NULL &&
7868                             ((const struct rte_flow_item_ipv6 *)
7869                              items->mask)->hdr.proto) {
7870                                 next_protocol =
7871                                         ((const struct rte_flow_item_ipv6 *)
7872                                          items->spec)->hdr.proto;
7873                                 next_protocol &=
7874                                         ((const struct rte_flow_item_ipv6 *)
7875                                          items->mask)->hdr.proto;
7876                         } else {
7877                                 /* Reset for inner layer. */
7878                                 next_protocol = 0xff;
7879                         }
7880                         break;
7881                 case RTE_FLOW_ITEM_TYPE_TCP:
7882                         flow_dv_translate_item_tcp(match_mask, match_value,
7883                                                    items, tunnel);
7884                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7885                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7886                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7887                         break;
7888                 case RTE_FLOW_ITEM_TYPE_UDP:
7889                         flow_dv_translate_item_udp(match_mask, match_value,
7890                                                    items, tunnel);
7891                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7892                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7893                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7894                         break;
7895                 case RTE_FLOW_ITEM_TYPE_GRE:
7896                         flow_dv_translate_item_gre(match_mask, match_value,
7897                                                    items, tunnel);
7898                         matcher.priority = flow->rss.level >= 2 ?
7899                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7900                         last_item = MLX5_FLOW_LAYER_GRE;
7901                         break;
7902                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7903                         flow_dv_translate_item_gre_key(match_mask,
7904                                                        match_value, items);
7905                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7906                         break;
7907                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7908                         flow_dv_translate_item_nvgre(match_mask, match_value,
7909                                                      items, tunnel);
7910                         matcher.priority = flow->rss.level >= 2 ?
7911                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7912                         last_item = MLX5_FLOW_LAYER_GRE;
7913                         break;
7914                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7915                         flow_dv_translate_item_vxlan(match_mask, match_value,
7916                                                      items, tunnel);
7917                         matcher.priority = flow->rss.level >= 2 ?
7918                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7919                         last_item = MLX5_FLOW_LAYER_VXLAN;
7920                         break;
7921                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7922                         flow_dv_translate_item_vxlan_gpe(match_mask,
7923                                                          match_value, items,
7924                                                          tunnel);
7925                         matcher.priority = flow->rss.level >= 2 ?
7926                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7927                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7928                         break;
7929                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7930                         flow_dv_translate_item_geneve(match_mask, match_value,
7931                                                       items, tunnel);
7932                         matcher.priority = flow->rss.level >= 2 ?
7933                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7934                         last_item = MLX5_FLOW_LAYER_GENEVE;
7935                         break;
7936                 case RTE_FLOW_ITEM_TYPE_MPLS:
7937                         flow_dv_translate_item_mpls(match_mask, match_value,
7938                                                     items, last_item, tunnel);
7939                         matcher.priority = flow->rss.level >= 2 ?
7940                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7941                         last_item = MLX5_FLOW_LAYER_MPLS;
7942                         break;
7943                 case RTE_FLOW_ITEM_TYPE_MARK:
7944                         flow_dv_translate_item_mark(dev, match_mask,
7945                                                     match_value, items);
7946                         last_item = MLX5_FLOW_ITEM_MARK;
7947                         break;
7948                 case RTE_FLOW_ITEM_TYPE_META:
7949                         flow_dv_translate_item_meta(dev, match_mask,
7950                                                     match_value, attr, items);
7951                         last_item = MLX5_FLOW_ITEM_METADATA;
7952                         break;
7953                 case RTE_FLOW_ITEM_TYPE_ICMP:
7954                         flow_dv_translate_item_icmp(match_mask, match_value,
7955                                                     items, tunnel);
7956                         last_item = MLX5_FLOW_LAYER_ICMP;
7957                         break;
7958                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7959                         flow_dv_translate_item_icmp6(match_mask, match_value,
7960                                                       items, tunnel);
7961                         last_item = MLX5_FLOW_LAYER_ICMP6;
7962                         break;
7963                 case RTE_FLOW_ITEM_TYPE_TAG:
7964                         flow_dv_translate_item_tag(dev, match_mask,
7965                                                    match_value, items);
7966                         last_item = MLX5_FLOW_ITEM_TAG;
7967                         break;
7968                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7969                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7970                                                         match_value, items);
7971                         last_item = MLX5_FLOW_ITEM_TAG;
7972                         break;
7973                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7974                         flow_dv_translate_item_tx_queue(dev, match_mask,
7975                                                         match_value,
7976                                                         items);
7977                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7978                         break;
7979                 case RTE_FLOW_ITEM_TYPE_GTP:
7980                         flow_dv_translate_item_gtp(match_mask, match_value,
7981                                                    items, tunnel);
7982                         matcher.priority = flow->rss.level >= 2 ?
7983                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7984                         last_item = MLX5_FLOW_LAYER_GTP;
7985                         break;
7986                 default:
7987                         break;
7988                 }
7989                 item_flags |= last_item;
7990         }
7991         /*
7992          * When E-Switch mode is enabled, we have two cases where we need to
7993          * set the source port manually.
7994          * The first one, is in case of Nic steering rule, and the second is
7995          * E-Switch rule where no port_id item was found. In both cases
7996          * the source port is set according the current port in use.
7997          */
7998         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
7999             (priv->representor || priv->master)) {
8000                 if (flow_dv_translate_item_port_id(dev, match_mask,
8001                                                    match_value, NULL))
8002                         return -rte_errno;
8003         }
8004 #ifdef RTE_LIBRTE_MLX5_DEBUG
8005         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
8006                                               dev_flow->dv.value.buf));
8007 #endif
8008         /*
8009          * Layers may be already initialized from prefix flow if this dev_flow
8010          * is the suffix flow.
8011          */
8012         handle->layers |= item_flags;
8013         if (action_flags & MLX5_FLOW_ACTION_RSS)
8014                 flow_dv_hashfields_set(dev_flow);
8015         /* Register matcher. */
8016         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
8017                                     matcher.mask.size);
8018         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
8019                                                      matcher.priority);
8020         /* reserved field no needs to be set to 0 here. */
8021         tbl_key.domain = attr->transfer;
8022         tbl_key.direction = attr->egress;
8023         tbl_key.table_id = dev_flow->dv.group;
8024         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
8025                 return -rte_errno;
8026         return 0;
8027 }
8028
8029 /**
8030  * Apply the flow to the NIC, lock free,
8031  * (mutex should be acquired by caller).
8032  *
8033  * @param[in] dev
8034  *   Pointer to the Ethernet device structure.
8035  * @param[in, out] flow
8036  *   Pointer to flow structure.
8037  * @param[out] error
8038  *   Pointer to error structure.
8039  *
8040  * @return
8041  *   0 on success, a negative errno value otherwise and rte_errno is set.
8042  */
8043 static int
8044 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
8045                 struct rte_flow_error *error)
8046 {
8047         struct mlx5_flow_dv_workspace *dv;
8048         struct mlx5_flow_handle *dh;
8049         struct mlx5_flow_handle_dv *dv_h;
8050         struct mlx5_flow *dev_flow;
8051         struct mlx5_priv *priv = dev->data->dev_private;
8052         int n;
8053         int err;
8054         int idx;
8055
8056         for (idx = priv->flow_idx - 1; idx >= 0; idx--) {
8057                 dev_flow = &((struct mlx5_flow *)priv->inter_flows)[idx];
8058                 dv = &dev_flow->dv;
8059                 dh = dev_flow->handle;
8060                 dv_h = &dh->dvh;
8061                 n = dv->actions_n;
8062                 if (dh->act_flags & MLX5_FLOW_ACTION_DROP) {
8063                         if (dv->transfer) {
8064                                 dv->actions[n++] = priv->sh->esw_drop_action;
8065                         } else {
8066                                 dh->hrxq = mlx5_hrxq_drop_new(dev);
8067                                 if (!dh->hrxq) {
8068                                         rte_flow_error_set
8069                                                 (error, errno,
8070                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8071                                                  NULL,
8072                                                  "cannot get drop hash queue");
8073                                         goto error;
8074                                 }
8075                                 dv->actions[n++] = dh->hrxq->action;
8076                         }
8077                 } else if (dh->act_flags &
8078                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
8079                         struct mlx5_hrxq *hrxq;
8080
8081                         MLX5_ASSERT(flow->rss.queue);
8082                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
8083                                              MLX5_RSS_HASH_KEY_LEN,
8084                                              dev_flow->hash_fields,
8085                                              (*flow->rss.queue),
8086                                              flow->rss.queue_num);
8087                         if (!hrxq) {
8088                                 hrxq = mlx5_hrxq_new
8089                                         (dev, flow->rss.key,
8090                                          MLX5_RSS_HASH_KEY_LEN,
8091                                          dev_flow->hash_fields,
8092                                          (*flow->rss.queue),
8093                                          flow->rss.queue_num,
8094                                          !!(dh->layers &
8095                                             MLX5_FLOW_LAYER_TUNNEL));
8096                         }
8097                         if (!hrxq) {
8098                                 rte_flow_error_set
8099                                         (error, rte_errno,
8100                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8101                                          "cannot get hash queue");
8102                                 goto error;
8103                         }
8104                         dh->hrxq = hrxq;
8105                         dv->actions[n++] = dh->hrxq->action;
8106                 }
8107                 dh->ib_flow =
8108                         mlx5_glue->dv_create_flow(dv_h->matcher->matcher_object,
8109                                                   (void *)&dv->value, n,
8110                                                   dv->actions);
8111                 if (!dh->ib_flow) {
8112                         rte_flow_error_set(error, errno,
8113                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8114                                            NULL,
8115                                            "hardware refuses to create flow");
8116                         goto error;
8117                 }
8118                 if (priv->vmwa_context &&
8119                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
8120                         /*
8121                          * The rule contains the VLAN pattern.
8122                          * For VF we are going to create VLAN
8123                          * interface to make hypervisor set correct
8124                          * e-Switch vport context.
8125                          */
8126                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
8127                 }
8128         }
8129         return 0;
8130 error:
8131         err = rte_errno; /* Save rte_errno before cleanup. */
8132         LIST_FOREACH(dh, &flow->dev_handles, next) {
8133                 if (dh->hrxq) {
8134                         if (dh->act_flags & MLX5_FLOW_ACTION_DROP)
8135                                 mlx5_hrxq_drop_release(dev);
8136                         else
8137                                 mlx5_hrxq_release(dev, dh->hrxq);
8138                         dh->hrxq = NULL;
8139                 }
8140                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
8141                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
8142         }
8143         rte_errno = err; /* Restore rte_errno. */
8144         return -rte_errno;
8145 }
8146
8147 /**
8148  * Release the flow matcher.
8149  *
8150  * @param dev
8151  *   Pointer to Ethernet device.
8152  * @param handle
8153  *   Pointer to mlx5_flow_handle.
8154  *
8155  * @return
8156  *   1 while a reference on it exists, 0 when freed.
8157  */
8158 static int
8159 flow_dv_matcher_release(struct rte_eth_dev *dev,
8160                         struct mlx5_flow_handle *handle)
8161 {
8162         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
8163
8164         MLX5_ASSERT(matcher->matcher_object);
8165         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
8166                 dev->data->port_id, (void *)matcher,
8167                 rte_atomic32_read(&matcher->refcnt));
8168         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
8169                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8170                            (matcher->matcher_object));
8171                 LIST_REMOVE(matcher, next);
8172                 /* table ref-- in release interface. */
8173                 flow_dv_tbl_resource_release(dev, matcher->tbl);
8174                 rte_free(matcher);
8175                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
8176                         dev->data->port_id, (void *)matcher);
8177                 return 0;
8178         }
8179         return 1;
8180 }
8181
8182 /**
8183  * Release an encap/decap resource.
8184  *
8185  * @param handle
8186  *   Pointer to mlx5_flow_handle.
8187  *
8188  * @return
8189  *   1 while a reference on it exists, 0 when freed.
8190  */
8191 static int
8192 flow_dv_encap_decap_resource_release(struct mlx5_flow_handle *handle)
8193 {
8194         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
8195                                                 handle->dvh.encap_decap;
8196
8197         MLX5_ASSERT(cache_resource->verbs_action);
8198         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
8199                 (void *)cache_resource,
8200                 rte_atomic32_read(&cache_resource->refcnt));
8201         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8202                 claim_zero(mlx5_glue->destroy_flow_action
8203                                 (cache_resource->verbs_action));
8204                 LIST_REMOVE(cache_resource, next);
8205                 rte_free(cache_resource);
8206                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
8207                         (void *)cache_resource);
8208                 return 0;
8209         }
8210         return 1;
8211 }
8212
8213 /**
8214  * Release an jump to table action resource.
8215  *
8216  * @param dev
8217  *   Pointer to Ethernet device.
8218  * @param handle
8219  *   Pointer to mlx5_flow_handle.
8220  *
8221  * @return
8222  *   1 while a reference on it exists, 0 when freed.
8223  */
8224 static int
8225 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
8226                                   struct mlx5_flow_handle *handle)
8227 {
8228         struct mlx5_flow_dv_jump_tbl_resource *cache_resource =
8229                                                         handle->dvh.jump;
8230         struct mlx5_flow_tbl_data_entry *tbl_data =
8231                         container_of(cache_resource,
8232                                      struct mlx5_flow_tbl_data_entry, jump);
8233
8234         MLX5_ASSERT(cache_resource->action);
8235         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
8236                 (void *)cache_resource,
8237                 rte_atomic32_read(&cache_resource->refcnt));
8238         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8239                 claim_zero(mlx5_glue->destroy_flow_action
8240                                 (cache_resource->action));
8241                 /* jump action memory free is inside the table release. */
8242                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
8243                 DRV_LOG(DEBUG, "jump table resource %p: removed",
8244                         (void *)cache_resource);
8245                 return 0;
8246         }
8247         return 1;
8248 }
8249
8250 /**
8251  * Release a modify-header resource.
8252  *
8253  * @param handle
8254  *   Pointer to mlx5_flow_handle.
8255  *
8256  * @return
8257  *   1 while a reference on it exists, 0 when freed.
8258  */
8259 static int
8260 flow_dv_modify_hdr_resource_release(struct mlx5_flow_handle *handle)
8261 {
8262         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
8263                                                         handle->dvh.modify_hdr;
8264
8265         MLX5_ASSERT(cache_resource->verbs_action);
8266         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
8267                 (void *)cache_resource,
8268                 rte_atomic32_read(&cache_resource->refcnt));
8269         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8270                 claim_zero(mlx5_glue->destroy_flow_action
8271                                 (cache_resource->verbs_action));
8272                 LIST_REMOVE(cache_resource, next);
8273                 rte_free(cache_resource);
8274                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
8275                         (void *)cache_resource);
8276                 return 0;
8277         }
8278         return 1;
8279 }
8280
8281 /**
8282  * Release port ID action resource.
8283  *
8284  * @param handle
8285  *   Pointer to mlx5_flow_handle.
8286  *
8287  * @return
8288  *   1 while a reference on it exists, 0 when freed.
8289  */
8290 static int
8291 flow_dv_port_id_action_resource_release(struct mlx5_flow_handle *handle)
8292 {
8293         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
8294                                                 handle->dvh.port_id_action;
8295
8296         MLX5_ASSERT(cache_resource->action);
8297         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
8298                 (void *)cache_resource,
8299                 rte_atomic32_read(&cache_resource->refcnt));
8300         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8301                 claim_zero(mlx5_glue->destroy_flow_action
8302                                 (cache_resource->action));
8303                 LIST_REMOVE(cache_resource, next);
8304                 rte_free(cache_resource);
8305                 DRV_LOG(DEBUG, "port id action resource %p: removed",
8306                         (void *)cache_resource);
8307                 return 0;
8308         }
8309         return 1;
8310 }
8311
8312 /**
8313  * Release push vlan action resource.
8314  *
8315  * @param handle
8316  *   Pointer to mlx5_flow_handle.
8317  *
8318  * @return
8319  *   1 while a reference on it exists, 0 when freed.
8320  */
8321 static int
8322 flow_dv_push_vlan_action_resource_release(struct mlx5_flow_handle *handle)
8323 {
8324         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
8325                                                 handle->dvh.push_vlan_res;
8326
8327         MLX5_ASSERT(cache_resource->action);
8328         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
8329                 (void *)cache_resource,
8330                 rte_atomic32_read(&cache_resource->refcnt));
8331         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8332                 claim_zero(mlx5_glue->destroy_flow_action
8333                                 (cache_resource->action));
8334                 LIST_REMOVE(cache_resource, next);
8335                 rte_free(cache_resource);
8336                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
8337                         (void *)cache_resource);
8338                 return 0;
8339         }
8340         return 1;
8341 }
8342
8343 /**
8344  * Remove the flow from the NIC but keeps it in memory.
8345  * Lock free, (mutex should be acquired by caller).
8346  *
8347  * @param[in] dev
8348  *   Pointer to Ethernet device.
8349  * @param[in, out] flow
8350  *   Pointer to flow structure.
8351  */
8352 static void
8353 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8354 {
8355         struct mlx5_flow_handle *dh;
8356
8357         if (!flow)
8358                 return;
8359         LIST_FOREACH(dh, &flow->dev_handles, next) {
8360                 if (dh->ib_flow) {
8361                         claim_zero(mlx5_glue->dv_destroy_flow(dh->ib_flow));
8362                         dh->ib_flow = NULL;
8363                 }
8364                 if (dh->hrxq) {
8365                         if (dh->act_flags & MLX5_FLOW_ACTION_DROP)
8366                                 mlx5_hrxq_drop_release(dev);
8367                         else
8368                                 mlx5_hrxq_release(dev, dh->hrxq);
8369                         dh->hrxq = NULL;
8370                 }
8371                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
8372                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
8373         }
8374 }
8375
8376 /**
8377  * Remove the flow from the NIC and the memory.
8378  * Lock free, (mutex should be acquired by caller).
8379  *
8380  * @param[in] dev
8381  *   Pointer to the Ethernet device structure.
8382  * @param[in, out] flow
8383  *   Pointer to flow structure.
8384  */
8385 static void
8386 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8387 {
8388         struct mlx5_flow_handle *dev_handle;
8389
8390         if (!flow)
8391                 return;
8392         __flow_dv_remove(dev, flow);
8393         if (flow->counter) {
8394                 flow_dv_counter_release(dev, flow->counter);
8395                 flow->counter = NULL;
8396         }
8397         if (flow->meter) {
8398                 mlx5_flow_meter_detach(flow->meter);
8399                 flow->meter = NULL;
8400         }
8401         while (!LIST_EMPTY(&flow->dev_handles)) {
8402                 dev_handle = LIST_FIRST(&flow->dev_handles);
8403                 LIST_REMOVE(dev_handle, next);
8404                 if (dev_handle->dvh.matcher)
8405                         flow_dv_matcher_release(dev, dev_handle);
8406                 if (dev_handle->dvh.encap_decap)
8407                         flow_dv_encap_decap_resource_release(dev_handle);
8408                 if (dev_handle->dvh.modify_hdr)
8409                         flow_dv_modify_hdr_resource_release(dev_handle);
8410                 if (dev_handle->dvh.jump)
8411                         flow_dv_jump_tbl_resource_release(dev, dev_handle);
8412                 if (dev_handle->dvh.port_id_action)
8413                         flow_dv_port_id_action_resource_release(dev_handle);
8414                 if (dev_handle->dvh.push_vlan_res)
8415                         flow_dv_push_vlan_action_resource_release(dev_handle);
8416                 if (dev_handle->dvh.tag_resource)
8417                         flow_dv_tag_release(dev,
8418                                             dev_handle->dvh.tag_resource);
8419                 rte_free(dev_handle);
8420         }
8421 }
8422
8423 /**
8424  * Query a dv flow  rule for its statistics via devx.
8425  *
8426  * @param[in] dev
8427  *   Pointer to Ethernet device.
8428  * @param[in] flow
8429  *   Pointer to the sub flow.
8430  * @param[out] data
8431  *   data retrieved by the query.
8432  * @param[out] error
8433  *   Perform verbose error reporting if not NULL.
8434  *
8435  * @return
8436  *   0 on success, a negative errno value otherwise and rte_errno is set.
8437  */
8438 static int
8439 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8440                     void *data, struct rte_flow_error *error)
8441 {
8442         struct mlx5_priv *priv = dev->data->dev_private;
8443         struct rte_flow_query_count *qc = data;
8444
8445         if (!priv->config.devx)
8446                 return rte_flow_error_set(error, ENOTSUP,
8447                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8448                                           NULL,
8449                                           "counters are not supported");
8450         if (flow->counter) {
8451                 uint64_t pkts, bytes;
8452                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8453                                                &bytes);
8454
8455                 if (err)
8456                         return rte_flow_error_set(error, -err,
8457                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8458                                         NULL, "cannot read counters");
8459                 qc->hits_set = 1;
8460                 qc->bytes_set = 1;
8461                 qc->hits = pkts - flow->counter->hits;
8462                 qc->bytes = bytes - flow->counter->bytes;
8463                 if (qc->reset) {
8464                         flow->counter->hits = pkts;
8465                         flow->counter->bytes = bytes;
8466                 }
8467                 return 0;
8468         }
8469         return rte_flow_error_set(error, EINVAL,
8470                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8471                                   NULL,
8472                                   "counters are not available");
8473 }
8474
8475 /**
8476  * Query a flow.
8477  *
8478  * @see rte_flow_query()
8479  * @see rte_flow_ops
8480  */
8481 static int
8482 flow_dv_query(struct rte_eth_dev *dev,
8483               struct rte_flow *flow __rte_unused,
8484               const struct rte_flow_action *actions __rte_unused,
8485               void *data __rte_unused,
8486               struct rte_flow_error *error __rte_unused)
8487 {
8488         int ret = -EINVAL;
8489
8490         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8491                 switch (actions->type) {
8492                 case RTE_FLOW_ACTION_TYPE_VOID:
8493                         break;
8494                 case RTE_FLOW_ACTION_TYPE_COUNT:
8495                         ret = flow_dv_query_count(dev, flow, data, error);
8496                         break;
8497                 default:
8498                         return rte_flow_error_set(error, ENOTSUP,
8499                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8500                                                   actions,
8501                                                   "action not supported");
8502                 }
8503         }
8504         return ret;
8505 }
8506
8507 /**
8508  * Destroy the meter table set.
8509  * Lock free, (mutex should be acquired by caller).
8510  *
8511  * @param[in] dev
8512  *   Pointer to Ethernet device.
8513  * @param[in] tbl
8514  *   Pointer to the meter table set.
8515  *
8516  * @return
8517  *   Always 0.
8518  */
8519 static int
8520 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8521                         struct mlx5_meter_domains_infos *tbl)
8522 {
8523         struct mlx5_priv *priv = dev->data->dev_private;
8524         struct mlx5_meter_domains_infos *mtd =
8525                                 (struct mlx5_meter_domains_infos *)tbl;
8526
8527         if (!mtd || !priv->config.dv_flow_en)
8528                 return 0;
8529         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8530                 claim_zero(mlx5_glue->dv_destroy_flow
8531                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8532         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8533                 claim_zero(mlx5_glue->dv_destroy_flow
8534                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8535         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8536                 claim_zero(mlx5_glue->dv_destroy_flow
8537                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8538         if (mtd->egress.color_matcher)
8539                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8540                           (mtd->egress.color_matcher));
8541         if (mtd->egress.any_matcher)
8542                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8543                           (mtd->egress.any_matcher));
8544         if (mtd->egress.tbl)
8545                 claim_zero(flow_dv_tbl_resource_release(dev,
8546                                                         mtd->egress.tbl));
8547         if (mtd->ingress.color_matcher)
8548                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8549                           (mtd->ingress.color_matcher));
8550         if (mtd->ingress.any_matcher)
8551                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8552                           (mtd->ingress.any_matcher));
8553         if (mtd->ingress.tbl)
8554                 claim_zero(flow_dv_tbl_resource_release(dev,
8555                                                         mtd->ingress.tbl));
8556         if (mtd->transfer.color_matcher)
8557                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8558                           (mtd->transfer.color_matcher));
8559         if (mtd->transfer.any_matcher)
8560                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8561                           (mtd->transfer.any_matcher));
8562         if (mtd->transfer.tbl)
8563                 claim_zero(flow_dv_tbl_resource_release(dev,
8564                                                         mtd->transfer.tbl));
8565         if (mtd->drop_actn)
8566                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8567         rte_free(mtd);
8568         return 0;
8569 }
8570
8571 /* Number of meter flow actions, count and jump or count and drop. */
8572 #define METER_ACTIONS 2
8573
8574 /**
8575  * Create specify domain meter table and suffix table.
8576  *
8577  * @param[in] dev
8578  *   Pointer to Ethernet device.
8579  * @param[in,out] mtb
8580  *   Pointer to DV meter table set.
8581  * @param[in] egress
8582  *   Table attribute.
8583  * @param[in] transfer
8584  *   Table attribute.
8585  * @param[in] color_reg_c_idx
8586  *   Reg C index for color match.
8587  *
8588  * @return
8589  *   0 on success, -1 otherwise and rte_errno is set.
8590  */
8591 static int
8592 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8593                            struct mlx5_meter_domains_infos *mtb,
8594                            uint8_t egress, uint8_t transfer,
8595                            uint32_t color_reg_c_idx)
8596 {
8597         struct mlx5_priv *priv = dev->data->dev_private;
8598         struct mlx5_ibv_shared *sh = priv->sh;
8599         struct mlx5_flow_dv_match_params mask = {
8600                 .size = sizeof(mask.buf),
8601         };
8602         struct mlx5_flow_dv_match_params value = {
8603                 .size = sizeof(value.buf),
8604         };
8605         struct mlx5dv_flow_matcher_attr dv_attr = {
8606                 .type = IBV_FLOW_ATTR_NORMAL,
8607                 .priority = 0,
8608                 .match_criteria_enable = 0,
8609                 .match_mask = (void *)&mask,
8610         };
8611         void *actions[METER_ACTIONS];
8612         struct mlx5_flow_tbl_resource **sfx_tbl;
8613         struct mlx5_meter_domain_info *dtb;
8614         struct rte_flow_error error;
8615         int i = 0;
8616
8617         if (transfer) {
8618                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8619                 dtb = &mtb->transfer;
8620         } else if (egress) {
8621                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8622                 dtb = &mtb->egress;
8623         } else {
8624                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8625                 dtb = &mtb->ingress;
8626         }
8627         /* If the suffix table in missing, create it. */
8628         if (!(*sfx_tbl)) {
8629                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8630                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8631                                                 egress, transfer, &error);
8632                 if (!(*sfx_tbl)) {
8633                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8634                         return -1;
8635                 }
8636         }
8637         /* Create the meter table with METER level. */
8638         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8639                                             egress, transfer, &error);
8640         if (!dtb->tbl) {
8641                 DRV_LOG(ERR, "Failed to create meter policer table.");
8642                 return -1;
8643         }
8644         /* Create matchers, Any and Color. */
8645         dv_attr.priority = 3;
8646         dv_attr.match_criteria_enable = 0;
8647         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8648                                                              &dv_attr,
8649                                                              dtb->tbl->obj);
8650         if (!dtb->any_matcher) {
8651                 DRV_LOG(ERR, "Failed to create meter"
8652                              " policer default matcher.");
8653                 goto error_exit;
8654         }
8655         dv_attr.priority = 0;
8656         dv_attr.match_criteria_enable =
8657                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8658         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8659                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
8660         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8661                                                                &dv_attr,
8662                                                                dtb->tbl->obj);
8663         if (!dtb->color_matcher) {
8664                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8665                 goto error_exit;
8666         }
8667         if (mtb->count_actns[RTE_MTR_DROPPED])
8668                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8669         actions[i++] = mtb->drop_actn;
8670         /* Default rule: lowest priority, match any, actions: drop. */
8671         dtb->policer_rules[RTE_MTR_DROPPED] =
8672                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8673                                                  (void *)&value, i, actions);
8674         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8675                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8676                 goto error_exit;
8677         }
8678         return 0;
8679 error_exit:
8680         return -1;
8681 }
8682
8683 /**
8684  * Create the needed meter and suffix tables.
8685  * Lock free, (mutex should be acquired by caller).
8686  *
8687  * @param[in] dev
8688  *   Pointer to Ethernet device.
8689  * @param[in] fm
8690  *   Pointer to the flow meter.
8691  *
8692  * @return
8693  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8694  */
8695 static struct mlx5_meter_domains_infos *
8696 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8697                        const struct mlx5_flow_meter *fm)
8698 {
8699         struct mlx5_priv *priv = dev->data->dev_private;
8700         struct mlx5_meter_domains_infos *mtb;
8701         int ret;
8702         int i;
8703
8704         if (!priv->mtr_en) {
8705                 rte_errno = ENOTSUP;
8706                 return NULL;
8707         }
8708         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8709         if (!mtb) {
8710                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8711                 return NULL;
8712         }
8713         /* Create meter count actions */
8714         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8715                 if (!fm->policer_stats.cnt[i])
8716                         continue;
8717                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8718         }
8719         /* Create drop action. */
8720         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8721         if (!mtb->drop_actn) {
8722                 DRV_LOG(ERR, "Failed to create drop action.");
8723                 goto error_exit;
8724         }
8725         /* Egress meter table. */
8726         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8727         if (ret) {
8728                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8729                 goto error_exit;
8730         }
8731         /* Ingress meter table. */
8732         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8733         if (ret) {
8734                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8735                 goto error_exit;
8736         }
8737         /* FDB meter table. */
8738         if (priv->config.dv_esw_en) {
8739                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8740                                                  priv->mtr_color_reg);
8741                 if (ret) {
8742                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8743                         goto error_exit;
8744                 }
8745         }
8746         return mtb;
8747 error_exit:
8748         flow_dv_destroy_mtr_tbl(dev, mtb);
8749         return NULL;
8750 }
8751
8752 /**
8753  * Destroy domain policer rule.
8754  *
8755  * @param[in] dt
8756  *   Pointer to domain table.
8757  */
8758 static void
8759 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8760 {
8761         int i;
8762
8763         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8764                 if (dt->policer_rules[i]) {
8765                         claim_zero(mlx5_glue->dv_destroy_flow
8766                                   (dt->policer_rules[i]));
8767                         dt->policer_rules[i] = NULL;
8768                 }
8769         }
8770         if (dt->jump_actn) {
8771                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8772                 dt->jump_actn = NULL;
8773         }
8774 }
8775
8776 /**
8777  * Destroy policer rules.
8778  *
8779  * @param[in] dev
8780  *   Pointer to Ethernet device.
8781  * @param[in] fm
8782  *   Pointer to flow meter structure.
8783  * @param[in] attr
8784  *   Pointer to flow attributes.
8785  *
8786  * @return
8787  *   Always 0.
8788  */
8789 static int
8790 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8791                               const struct mlx5_flow_meter *fm,
8792                               const struct rte_flow_attr *attr)
8793 {
8794         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8795
8796         if (!mtb)
8797                 return 0;
8798         if (attr->egress)
8799                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8800         if (attr->ingress)
8801                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8802         if (attr->transfer)
8803                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8804         return 0;
8805 }
8806
8807 /**
8808  * Create specify domain meter policer rule.
8809  *
8810  * @param[in] fm
8811  *   Pointer to flow meter structure.
8812  * @param[in] mtb
8813  *   Pointer to DV meter table set.
8814  * @param[in] sfx_tb
8815  *   Pointer to suffix table.
8816  * @param[in] mtr_reg_c
8817  *   Color match REG_C.
8818  *
8819  * @return
8820  *   0 on success, -1 otherwise.
8821  */
8822 static int
8823 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8824                                     struct mlx5_meter_domain_info *dtb,
8825                                     struct mlx5_flow_tbl_resource *sfx_tb,
8826                                     uint8_t mtr_reg_c)
8827 {
8828         struct mlx5_flow_dv_match_params matcher = {
8829                 .size = sizeof(matcher.buf),
8830         };
8831         struct mlx5_flow_dv_match_params value = {
8832                 .size = sizeof(value.buf),
8833         };
8834         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8835         void *actions[METER_ACTIONS];
8836         int i;
8837
8838         /* Create jump action. */
8839         if (!sfx_tb)
8840                 return -1;
8841         if (!dtb->jump_actn)
8842                 dtb->jump_actn =
8843                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8844                                                         (sfx_tb->obj);
8845         if (!dtb->jump_actn) {
8846                 DRV_LOG(ERR, "Failed to create policer jump action.");
8847                 goto error;
8848         }
8849         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8850                 int j = 0;
8851
8852                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8853                                        rte_col_2_mlx5_col(i), UINT8_MAX);
8854                 if (mtb->count_actns[i])
8855                         actions[j++] = mtb->count_actns[i];
8856                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8857                         actions[j++] = mtb->drop_actn;
8858                 else
8859                         actions[j++] = dtb->jump_actn;
8860                 dtb->policer_rules[i] =
8861                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8862                                                  (void *)&value,
8863                                                   j, actions);
8864                 if (!dtb->policer_rules[i]) {
8865                         DRV_LOG(ERR, "Failed to create policer rule.");
8866                         goto error;
8867                 }
8868         }
8869         return 0;
8870 error:
8871         rte_errno = errno;
8872         return -1;
8873 }
8874
8875 /**
8876  * Create policer rules.
8877  *
8878  * @param[in] dev
8879  *   Pointer to Ethernet device.
8880  * @param[in] fm
8881  *   Pointer to flow meter structure.
8882  * @param[in] attr
8883  *   Pointer to flow attributes.
8884  *
8885  * @return
8886  *   0 on success, -1 otherwise.
8887  */
8888 static int
8889 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8890                              struct mlx5_flow_meter *fm,
8891                              const struct rte_flow_attr *attr)
8892 {
8893         struct mlx5_priv *priv = dev->data->dev_private;
8894         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8895         int ret;
8896
8897         if (attr->egress) {
8898                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8899                                                 priv->sh->tx_mtr_sfx_tbl,
8900                                                 priv->mtr_color_reg);
8901                 if (ret) {
8902                         DRV_LOG(ERR, "Failed to create egress policer.");
8903                         goto error;
8904                 }
8905         }
8906         if (attr->ingress) {
8907                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8908                                                 priv->sh->rx_mtr_sfx_tbl,
8909                                                 priv->mtr_color_reg);
8910                 if (ret) {
8911                         DRV_LOG(ERR, "Failed to create ingress policer.");
8912                         goto error;
8913                 }
8914         }
8915         if (attr->transfer) {
8916                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8917                                                 priv->sh->fdb_mtr_sfx_tbl,
8918                                                 priv->mtr_color_reg);
8919                 if (ret) {
8920                         DRV_LOG(ERR, "Failed to create transfer policer.");
8921                         goto error;
8922                 }
8923         }
8924         return 0;
8925 error:
8926         flow_dv_destroy_policer_rules(dev, fm, attr);
8927         return -1;
8928 }
8929
8930 /**
8931  * Query a devx counter.
8932  *
8933  * @param[in] dev
8934  *   Pointer to the Ethernet device structure.
8935  * @param[in] cnt
8936  *   Pointer to the flow counter.
8937  * @param[in] clear
8938  *   Set to clear the counter statistics.
8939  * @param[out] pkts
8940  *   The statistics value of packets.
8941  * @param[out] bytes
8942  *   The statistics value of bytes.
8943  *
8944  * @return
8945  *   0 on success, otherwise return -1.
8946  */
8947 static int
8948 flow_dv_counter_query(struct rte_eth_dev *dev,
8949                       struct mlx5_flow_counter *cnt, bool clear,
8950                       uint64_t *pkts, uint64_t *bytes)
8951 {
8952         struct mlx5_priv *priv = dev->data->dev_private;
8953         uint64_t inn_pkts, inn_bytes;
8954         int ret;
8955
8956         if (!priv->config.devx)
8957                 return -1;
8958         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8959         if (ret)
8960                 return -1;
8961         *pkts = inn_pkts - cnt->hits;
8962         *bytes = inn_bytes - cnt->bytes;
8963         if (clear) {
8964                 cnt->hits = inn_pkts;
8965                 cnt->bytes = inn_bytes;
8966         }
8967         return 0;
8968 }
8969
8970 /*
8971  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8972  */
8973 static int
8974 flow_dv_translate(struct rte_eth_dev *dev,
8975                   struct mlx5_flow *dev_flow,
8976                   const struct rte_flow_attr *attr,
8977                   const struct rte_flow_item items[],
8978                   const struct rte_flow_action actions[],
8979                   struct rte_flow_error *error)
8980 {
8981         int ret;
8982
8983         flow_dv_shared_lock(dev);
8984         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8985         flow_dv_shared_unlock(dev);
8986         return ret;
8987 }
8988
8989 /*
8990  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8991  */
8992 static int
8993 flow_dv_apply(struct rte_eth_dev *dev,
8994               struct rte_flow *flow,
8995               struct rte_flow_error *error)
8996 {
8997         int ret;
8998
8999         flow_dv_shared_lock(dev);
9000         ret = __flow_dv_apply(dev, flow, error);
9001         flow_dv_shared_unlock(dev);
9002         return ret;
9003 }
9004
9005 /*
9006  * Mutex-protected thunk to lock-free __flow_dv_remove().
9007  */
9008 static void
9009 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
9010 {
9011         flow_dv_shared_lock(dev);
9012         __flow_dv_remove(dev, flow);
9013         flow_dv_shared_unlock(dev);
9014 }
9015
9016 /*
9017  * Mutex-protected thunk to lock-free __flow_dv_destroy().
9018  */
9019 static void
9020 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
9021 {
9022         flow_dv_shared_lock(dev);
9023         __flow_dv_destroy(dev, flow);
9024         flow_dv_shared_unlock(dev);
9025 }
9026
9027 /*
9028  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
9029  */
9030 static struct mlx5_flow_counter *
9031 flow_dv_counter_allocate(struct rte_eth_dev *dev)
9032 {
9033         struct mlx5_flow_counter *cnt;
9034
9035         flow_dv_shared_lock(dev);
9036         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
9037         flow_dv_shared_unlock(dev);
9038         return cnt;
9039 }
9040
9041 /*
9042  * Mutex-protected thunk to lock-free flow_dv_counter_release().
9043  */
9044 static void
9045 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
9046 {
9047         flow_dv_shared_lock(dev);
9048         flow_dv_counter_release(dev, cnt);
9049         flow_dv_shared_unlock(dev);
9050 }
9051
9052 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
9053         .validate = flow_dv_validate,
9054         .prepare = flow_dv_prepare,
9055         .translate = flow_dv_translate,
9056         .apply = flow_dv_apply,
9057         .remove = flow_dv_remove,
9058         .destroy = flow_dv_destroy,
9059         .query = flow_dv_query,
9060         .create_mtr_tbls = flow_dv_create_mtr_tbl,
9061         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
9062         .create_policer_rules = flow_dv_create_policer_rules,
9063         .destroy_policer_rules = flow_dv_destroy_policer_rules,
9064         .counter_alloc = flow_dv_counter_allocate,
9065         .counter_free = flow_dv_counter_free,
9066         .counter_query = flow_dv_counter_query,
9067 };
9068
9069 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */