drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30 #include <rte_gtp.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_prm.h>
  35
  36 #include "mlx5_defs.h"
  37 #include "mlx5.h"
  38 #include "mlx5_flow.h"
  39 #include "mlx5_rxtx.h"
  40
  41 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 /**
  77  * Initialize flow attributes structure according to flow items' types.
  78  *
  79  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  80  * mode. For tunnel mode, the items to be modified are the outermost ones.
  81  *
  82  * @param[in] item
  83  *   Pointer to item specification.
  84  * @param[out] attr
  85  *   Pointer to flow attributes structure.
  86  * @param[in] dev_flow
  87  *   Pointer to the sub flow.
  88  * @param[in] tunnel_decap
  89  *   Whether action is after tunnel decapsulation.
  90  */
  91 static void
  92 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
  93                   struct mlx5_flow *dev_flow, bool tunnel_decap)
  94 {
  95         /*
  96          * If layers is already initialized, it means this dev_flow is the
  97          * suffix flow, the layers flags is set by the prefix flow. Need to
  98          * use the layer flags from prefix flow as the suffix flow may not
  99          * have the user defined items as the flow is split.
 100          */
 101         if (dev_flow->layers) {
 102                 if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 103                         attr->ipv4 = 1;
 104                 else if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 105                         attr->ipv6 = 1;
 106                 if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 107                         attr->tcp = 1;
 108                 else if (dev_flow->layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 109                         attr->udp = 1;
 110                 attr->valid = 1;
 111                 return;
 112         }
 113         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 114                 uint8_t next_protocol = 0xff;
 115                 switch (item->type) {
 116                 case RTE_FLOW_ITEM_TYPE_GRE:
 117                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 118                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 119                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 120                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 121                 case RTE_FLOW_ITEM_TYPE_MPLS:
 122                         if (tunnel_decap)
 123                                 attr->attr = 0;
 124                         break;
 125                 case RTE_FLOW_ITEM_TYPE_IPV4:
 126                         if (!attr->ipv6)
 127                                 attr->ipv4 = 1;
 128                         if (item->mask != NULL &&
 129                             ((const struct rte_flow_item_ipv4 *)
 130                             item->mask)->hdr.next_proto_id)
 131                                 next_protocol =
 132                                     ((const struct rte_flow_item_ipv4 *)
 133                                       (item->spec))->hdr.next_proto_id &
 134                                     ((const struct rte_flow_item_ipv4 *)
 135                                       (item->mask))->hdr.next_proto_id;
 136                         if ((next_protocol == IPPROTO_IPIP ||
 137                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 138                                 attr->attr = 0;
 139                         break;
 140                 case RTE_FLOW_ITEM_TYPE_IPV6:
 141                         if (!attr->ipv4)
 142                                 attr->ipv6 = 1;
 143                         if (item->mask != NULL &&
 144                             ((const struct rte_flow_item_ipv6 *)
 145                             item->mask)->hdr.proto)
 146                                 next_protocol =
 147                                     ((const struct rte_flow_item_ipv6 *)
 148                                       (item->spec))->hdr.proto &
 149                                     ((const struct rte_flow_item_ipv6 *)
 150                                       (item->mask))->hdr.proto;
 151                         if ((next_protocol == IPPROTO_IPIP ||
 152                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 153                                 attr->attr = 0;
 154                         break;
 155                 case RTE_FLOW_ITEM_TYPE_UDP:
 156                         if (!attr->tcp)
 157                                 attr->udp = 1;
 158                         break;
 159                 case RTE_FLOW_ITEM_TYPE_TCP:
 160                         if (!attr->udp)
 161                                 attr->tcp = 1;
 162                         break;
 163                 default:
 164                         break;
 165                 }
 166         }
 167         attr->valid = 1;
 168 }
 169
 170 /**
 171  * Convert rte_mtr_color to mlx5 color.
 172  *
 173  * @param[in] rcol
 174  *   rte_mtr_color.
 175  *
 176  * @return
 177  *   mlx5 color.
 178  */
 179 static int
 180 rte_col_2_mlx5_col(enum rte_color rcol)
 181 {
 182         switch (rcol) {
 183         case RTE_COLOR_GREEN:
 184                 return MLX5_FLOW_COLOR_GREEN;
 185         case RTE_COLOR_YELLOW:
 186                 return MLX5_FLOW_COLOR_YELLOW;
 187         case RTE_COLOR_RED:
 188                 return MLX5_FLOW_COLOR_RED;
 189         default:
 190                 break;
 191         }
 192         return MLX5_FLOW_COLOR_UNDEFINED;
 193 }
 194
 195 struct field_modify_info {
 196         uint32_t size; /* Size of field in protocol header, in bytes. */
 197         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 198         enum mlx5_modification_field id;
 199 };
 200
 201 struct field_modify_info modify_eth[] = {
 202         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 203         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 204         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 205         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 206         {0, 0, 0},
 207 };
 208
 209 struct field_modify_info modify_vlan_out_first_vid[] = {
 210         /* Size in bits !!! */
 211         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 212         {0, 0, 0},
 213 };
 214
 215 struct field_modify_info modify_ipv4[] = {
 216         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 217         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 218         {4, 12, MLX5_MODI_OUT_SIPV4},
 219         {4, 16, MLX5_MODI_OUT_DIPV4},
 220         {0, 0, 0},
 221 };
 222
 223 struct field_modify_info modify_ipv6[] = {
 224         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 225         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 226         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 227         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 228         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 229         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 230         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 231         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 232         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 233         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 234         {0, 0, 0},
 235 };
 236
 237 struct field_modify_info modify_udp[] = {
 238         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 239         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 240         {0, 0, 0},
 241 };
 242
 243 struct field_modify_info modify_tcp[] = {
 244         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 245         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 246         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 247         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 248         {0, 0, 0},
 249 };
 250
 251 static void
 252 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 253                           uint8_t next_protocol, uint64_t *item_flags,
 254                           int *tunnel)
 255 {
 256         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 257                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 258         if (next_protocol == IPPROTO_IPIP) {
 259                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 260                 *tunnel = 1;
 261         }
 262         if (next_protocol == IPPROTO_IPV6) {
 263                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 264                 *tunnel = 1;
 265         }
 266 }
 267
 268 /**
 269  * Acquire the synchronizing object to protect multithreaded access
 270  * to shared dv context. Lock occurs only if context is actually
 271  * shared, i.e. we have multiport IB device and representors are
 272  * created.
 273  *
 274  * @param[in] dev
 275  *   Pointer to the rte_eth_dev structure.
 276  */
 277 static void
 278 flow_dv_shared_lock(struct rte_eth_dev *dev)
 279 {
 280         struct mlx5_priv *priv = dev->data->dev_private;
 281         struct mlx5_ibv_shared *sh = priv->sh;
 282
 283         if (sh->dv_refcnt > 1) {
 284                 int ret;
 285
 286                 ret = pthread_mutex_lock(&sh->dv_mutex);
 287                 MLX5_ASSERT(!ret);
 288                 (void)ret;
 289         }
 290 }
 291
 292 static void
 293 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 294 {
 295         struct mlx5_priv *priv = dev->data->dev_private;
 296         struct mlx5_ibv_shared *sh = priv->sh;
 297
 298         if (sh->dv_refcnt > 1) {
 299                 int ret;
 300
 301                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 302                 MLX5_ASSERT(!ret);
 303                 (void)ret;
 304         }
 305 }
 306
 307 /* Update VLAN's VID/PCP based on input rte_flow_action.
 308  *
 309  * @param[in] action
 310  *   Pointer to struct rte_flow_action.
 311  * @param[out] vlan
 312  *   Pointer to struct rte_vlan_hdr.
 313  */
 314 static void
 315 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 316                          struct rte_vlan_hdr *vlan)
 317 {
 318         uint16_t vlan_tci;
 319         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 320                 vlan_tci =
 321                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 322                                                action->conf)->vlan_pcp;
 323                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 324                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 325                 vlan->vlan_tci |= vlan_tci;
 326         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 327                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 328                 vlan->vlan_tci |= rte_be_to_cpu_16
 329                     (((const struct rte_flow_action_of_set_vlan_vid *)
 330                                              action->conf)->vlan_vid);
 331         }
 332 }
 333
 334 /**
 335  * Fetch 1, 2, 3 or 4 byte field from the byte array
 336  * and return as unsigned integer in host-endian format.
 337  *
 338  * @param[in] data
 339  *   Pointer to data array.
 340  * @param[in] size
 341  *   Size of field to extract.
 342  *
 343  * @return
 344  *   converted field in host endian format.
 345  */
 346 static inline uint32_t
 347 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 348 {
 349         uint32_t ret;
 350
 351         switch (size) {
 352         case 1:
 353                 ret = *data;
 354                 break;
 355         case 2:
 356                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 357                 break;
 358         case 3:
 359                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 360                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 361                 break;
 362         case 4:
 363                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 364                 break;
 365         default:
 366                 MLX5_ASSERT(false);
 367                 ret = 0;
 368                 break;
 369         }
 370         return ret;
 371 }
 372
 373 /**
 374  * Convert modify-header action to DV specification.
 375  *
 376  * Data length of each action is determined by provided field description
 377  * and the item mask. Data bit offset and width of each action is determined
 378  * by provided item mask.
 379  *
 380  * @param[in] item
 381  *   Pointer to item specification.
 382  * @param[in] field
 383  *   Pointer to field modification information.
 384  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 385  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 386  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 387  * @param[in] dcopy
 388  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 389  *   Negative offset value sets the same offset as source offset.
 390  *   size field is ignored, value is taken from source field.
 391  * @param[in,out] resource
 392  *   Pointer to the modify-header resource.
 393  * @param[in] type
 394  *   Type of modification.
 395  * @param[out] error
 396  *   Pointer to the error structure.
 397  *
 398  * @return
 399  *   0 on success, a negative errno value otherwise and rte_errno is set.
 400  */
 401 static int
 402 flow_dv_convert_modify_action(struct rte_flow_item *item,
 403                               struct field_modify_info *field,
 404                               struct field_modify_info *dcopy,
 405                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 406                               uint32_t type, struct rte_flow_error *error)
 407 {
 408         uint32_t i = resource->actions_num;
 409         struct mlx5_modification_cmd *actions = resource->actions;
 410
 411         /*
 412          * The item and mask are provided in big-endian format.
 413          * The fields should be presented as in big-endian format either.
 414          * Mask must be always present, it defines the actual field width.
 415          */
 416         MLX5_ASSERT(item->mask);
 417         MLX5_ASSERT(field->size);
 418         do {
 419                 unsigned int size_b;
 420                 unsigned int off_b;
 421                 uint32_t mask;
 422                 uint32_t data;
 423
 424                 if (i >= MLX5_MAX_MODIFY_NUM)
 425                         return rte_flow_error_set(error, EINVAL,
 426                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 427                                  "too many items to modify");
 428                 /* Fetch variable byte size mask from the array. */
 429                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 430                                            field->offset, field->size);
 431                 if (!mask) {
 432                         ++field;
 433                         continue;
 434                 }
 435                 /* Deduce actual data width in bits from mask value. */
 436                 off_b = rte_bsf32(mask);
 437                 size_b = sizeof(uint32_t) * CHAR_BIT -
 438                          off_b - __builtin_clz(mask);
 439                 MLX5_ASSERT(size_b);
 440                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 441                 actions[i] = (struct mlx5_modification_cmd) {
 442                         .action_type = type,
 443                         .field = field->id,
 444                         .offset = off_b,
 445                         .length = size_b,
 446                 };
 447                 /* Convert entire record to expected big-endian format. */
 448                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 449                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 450                         MLX5_ASSERT(dcopy);
 451                         actions[i].dst_field = dcopy->id;
 452                         actions[i].dst_offset =
 453                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 454                         /* Convert entire record to big-endian format. */
 455                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 456                 } else {
 457                         MLX5_ASSERT(item->spec);
 458                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 459                                                    field->offset, field->size);
 460                         /* Shift out the trailing masked bits from data. */
 461                         data = (data & mask) >> off_b;
 462                         actions[i].data1 = rte_cpu_to_be_32(data);
 463                 }
 464                 ++i;
 465                 ++field;
 466         } while (field->size);
 467         if (resource->actions_num == i)
 468                 return rte_flow_error_set(error, EINVAL,
 469                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 470                                           "invalid modification flow item");
 471         resource->actions_num = i;
 472         return 0;
 473 }
 474
 475 /**
 476  * Convert modify-header set IPv4 address action to DV specification.
 477  *
 478  * @param[in,out] resource
 479  *   Pointer to the modify-header resource.
 480  * @param[in] action
 481  *   Pointer to action specification.
 482  * @param[out] error
 483  *   Pointer to the error structure.
 484  *
 485  * @return
 486  *   0 on success, a negative errno value otherwise and rte_errno is set.
 487  */
 488 static int
 489 flow_dv_convert_action_modify_ipv4
 490                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 491                          const struct rte_flow_action *action,
 492                          struct rte_flow_error *error)
 493 {
 494         const struct rte_flow_action_set_ipv4 *conf =
 495                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 496         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 497         struct rte_flow_item_ipv4 ipv4;
 498         struct rte_flow_item_ipv4 ipv4_mask;
 499
 500         memset(&ipv4, 0, sizeof(ipv4));
 501         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 502         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 503                 ipv4.hdr.src_addr = conf->ipv4_addr;
 504                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 505         } else {
 506                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 507                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 508         }
 509         item.spec = &ipv4;
 510         item.mask = &ipv4_mask;
 511         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 512                                              MLX5_MODIFICATION_TYPE_SET, error);
 513 }
 514
 515 /**
 516  * Convert modify-header set IPv6 address action to DV specification.
 517  *
 518  * @param[in,out] resource
 519  *   Pointer to the modify-header resource.
 520  * @param[in] action
 521  *   Pointer to action specification.
 522  * @param[out] error
 523  *   Pointer to the error structure.
 524  *
 525  * @return
 526  *   0 on success, a negative errno value otherwise and rte_errno is set.
 527  */
 528 static int
 529 flow_dv_convert_action_modify_ipv6
 530                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 531                          const struct rte_flow_action *action,
 532                          struct rte_flow_error *error)
 533 {
 534         const struct rte_flow_action_set_ipv6 *conf =
 535                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 536         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 537         struct rte_flow_item_ipv6 ipv6;
 538         struct rte_flow_item_ipv6 ipv6_mask;
 539
 540         memset(&ipv6, 0, sizeof(ipv6));
 541         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 542         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 543                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 544                        sizeof(ipv6.hdr.src_addr));
 545                 memcpy(&ipv6_mask.hdr.src_addr,
 546                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 547                        sizeof(ipv6.hdr.src_addr));
 548         } else {
 549                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 550                        sizeof(ipv6.hdr.dst_addr));
 551                 memcpy(&ipv6_mask.hdr.dst_addr,
 552                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 553                        sizeof(ipv6.hdr.dst_addr));
 554         }
 555         item.spec = &ipv6;
 556         item.mask = &ipv6_mask;
 557         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 558                                              MLX5_MODIFICATION_TYPE_SET, error);
 559 }
 560
 561 /**
 562  * Convert modify-header set MAC address action to DV specification.
 563  *
 564  * @param[in,out] resource
 565  *   Pointer to the modify-header resource.
 566  * @param[in] action
 567  *   Pointer to action specification.
 568  * @param[out] error
 569  *   Pointer to the error structure.
 570  *
 571  * @return
 572  *   0 on success, a negative errno value otherwise and rte_errno is set.
 573  */
 574 static int
 575 flow_dv_convert_action_modify_mac
 576                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 577                          const struct rte_flow_action *action,
 578                          struct rte_flow_error *error)
 579 {
 580         const struct rte_flow_action_set_mac *conf =
 581                 (const struct rte_flow_action_set_mac *)(action->conf);
 582         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 583         struct rte_flow_item_eth eth;
 584         struct rte_flow_item_eth eth_mask;
 585
 586         memset(&eth, 0, sizeof(eth));
 587         memset(&eth_mask, 0, sizeof(eth_mask));
 588         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 589                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 590                        sizeof(eth.src.addr_bytes));
 591                 memcpy(&eth_mask.src.addr_bytes,
 592                        &rte_flow_item_eth_mask.src.addr_bytes,
 593                        sizeof(eth_mask.src.addr_bytes));
 594         } else {
 595                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 596                        sizeof(eth.dst.addr_bytes));
 597                 memcpy(&eth_mask.dst.addr_bytes,
 598                        &rte_flow_item_eth_mask.dst.addr_bytes,
 599                        sizeof(eth_mask.dst.addr_bytes));
 600         }
 601         item.spec = &eth;
 602         item.mask = &eth_mask;
 603         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 604                                              MLX5_MODIFICATION_TYPE_SET, error);
 605 }
 606
 607 /**
 608  * Convert modify-header set VLAN VID action to DV specification.
 609  *
 610  * @param[in,out] resource
 611  *   Pointer to the modify-header resource.
 612  * @param[in] action
 613  *   Pointer to action specification.
 614  * @param[out] error
 615  *   Pointer to the error structure.
 616  *
 617  * @return
 618  *   0 on success, a negative errno value otherwise and rte_errno is set.
 619  */
 620 static int
 621 flow_dv_convert_action_modify_vlan_vid
 622                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 623                          const struct rte_flow_action *action,
 624                          struct rte_flow_error *error)
 625 {
 626         const struct rte_flow_action_of_set_vlan_vid *conf =
 627                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 628         int i = resource->actions_num;
 629         struct mlx5_modification_cmd *actions = resource->actions;
 630         struct field_modify_info *field = modify_vlan_out_first_vid;
 631
 632         if (i >= MLX5_MAX_MODIFY_NUM)
 633                 return rte_flow_error_set(error, EINVAL,
 634                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 635                          "too many items to modify");
 636         actions[i] = (struct mlx5_modification_cmd) {
 637                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 638                 .field = field->id,
 639                 .length = field->size,
 640                 .offset = field->offset,
 641         };
 642         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 643         actions[i].data1 = conf->vlan_vid;
 644         actions[i].data1 = actions[i].data1 << 16;
 645         resource->actions_num = ++i;
 646         return 0;
 647 }
 648
 649 /**
 650  * Convert modify-header set TP action to DV specification.
 651  *
 652  * @param[in,out] resource
 653  *   Pointer to the modify-header resource.
 654  * @param[in] action
 655  *   Pointer to action specification.
 656  * @param[in] items
 657  *   Pointer to rte_flow_item objects list.
 658  * @param[in] attr
 659  *   Pointer to flow attributes structure.
 660  * @param[in] dev_flow
 661  *   Pointer to the sub flow.
 662  * @param[in] tunnel_decap
 663  *   Whether action is after tunnel decapsulation.
 664  * @param[out] error
 665  *   Pointer to the error structure.
 666  *
 667  * @return
 668  *   0 on success, a negative errno value otherwise and rte_errno is set.
 669  */
 670 static int
 671 flow_dv_convert_action_modify_tp
 672                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 673                          const struct rte_flow_action *action,
 674                          const struct rte_flow_item *items,
 675                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 676                          bool tunnel_decap, struct rte_flow_error *error)
 677 {
 678         const struct rte_flow_action_set_tp *conf =
 679                 (const struct rte_flow_action_set_tp *)(action->conf);
 680         struct rte_flow_item item;
 681         struct rte_flow_item_udp udp;
 682         struct rte_flow_item_udp udp_mask;
 683         struct rte_flow_item_tcp tcp;
 684         struct rte_flow_item_tcp tcp_mask;
 685         struct field_modify_info *field;
 686
 687         if (!attr->valid)
 688                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 689         if (attr->udp) {
 690                 memset(&udp, 0, sizeof(udp));
 691                 memset(&udp_mask, 0, sizeof(udp_mask));
 692                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 693                         udp.hdr.src_port = conf->port;
 694                         udp_mask.hdr.src_port =
 695                                         rte_flow_item_udp_mask.hdr.src_port;
 696                 } else {
 697                         udp.hdr.dst_port = conf->port;
 698                         udp_mask.hdr.dst_port =
 699                                         rte_flow_item_udp_mask.hdr.dst_port;
 700                 }
 701                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 702                 item.spec = &udp;
 703                 item.mask = &udp_mask;
 704                 field = modify_udp;
 705         } else {
 706                 MLX5_ASSERT(attr->tcp);
 707                 memset(&tcp, 0, sizeof(tcp));
 708                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 709                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 710                         tcp.hdr.src_port = conf->port;
 711                         tcp_mask.hdr.src_port =
 712                                         rte_flow_item_tcp_mask.hdr.src_port;
 713                 } else {
 714                         tcp.hdr.dst_port = conf->port;
 715                         tcp_mask.hdr.dst_port =
 716                                         rte_flow_item_tcp_mask.hdr.dst_port;
 717                 }
 718                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 719                 item.spec = &tcp;
 720                 item.mask = &tcp_mask;
 721                 field = modify_tcp;
 722         }
 723         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 724                                              MLX5_MODIFICATION_TYPE_SET, error);
 725 }
 726
 727 /**
 728  * Convert modify-header set TTL action to DV specification.
 729  *
 730  * @param[in,out] resource
 731  *   Pointer to the modify-header resource.
 732  * @param[in] action
 733  *   Pointer to action specification.
 734  * @param[in] items
 735  *   Pointer to rte_flow_item objects list.
 736  * @param[in] attr
 737  *   Pointer to flow attributes structure.
 738  * @param[in] dev_flow
 739  *   Pointer to the sub flow.
 740  * @param[in] tunnel_decap
 741  *   Whether action is after tunnel decapsulation.
 742  * @param[out] error
 743  *   Pointer to the error structure.
 744  *
 745  * @return
 746  *   0 on success, a negative errno value otherwise and rte_errno is set.
 747  */
 748 static int
 749 flow_dv_convert_action_modify_ttl
 750                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 751                          const struct rte_flow_action *action,
 752                          const struct rte_flow_item *items,
 753                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 754                          bool tunnel_decap, struct rte_flow_error *error)
 755 {
 756         const struct rte_flow_action_set_ttl *conf =
 757                 (const struct rte_flow_action_set_ttl *)(action->conf);
 758         struct rte_flow_item item;
 759         struct rte_flow_item_ipv4 ipv4;
 760         struct rte_flow_item_ipv4 ipv4_mask;
 761         struct rte_flow_item_ipv6 ipv6;
 762         struct rte_flow_item_ipv6 ipv6_mask;
 763         struct field_modify_info *field;
 764
 765         if (!attr->valid)
 766                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 767         if (attr->ipv4) {
 768                 memset(&ipv4, 0, sizeof(ipv4));
 769                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 770                 ipv4.hdr.time_to_live = conf->ttl_value;
 771                 ipv4_mask.hdr.time_to_live = 0xFF;
 772                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 773                 item.spec = &ipv4;
 774                 item.mask = &ipv4_mask;
 775                 field = modify_ipv4;
 776         } else {
 777                 MLX5_ASSERT(attr->ipv6);
 778                 memset(&ipv6, 0, sizeof(ipv6));
 779                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 780                 ipv6.hdr.hop_limits = conf->ttl_value;
 781                 ipv6_mask.hdr.hop_limits = 0xFF;
 782                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 783                 item.spec = &ipv6;
 784                 item.mask = &ipv6_mask;
 785                 field = modify_ipv6;
 786         }
 787         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 788                                              MLX5_MODIFICATION_TYPE_SET, error);
 789 }
 790
 791 /**
 792  * Convert modify-header decrement TTL action to DV specification.
 793  *
 794  * @param[in,out] resource
 795  *   Pointer to the modify-header resource.
 796  * @param[in] action
 797  *   Pointer to action specification.
 798  * @param[in] items
 799  *   Pointer to rte_flow_item objects list.
 800  * @param[in] attr
 801  *   Pointer to flow attributes structure.
 802  * @param[in] dev_flow
 803  *   Pointer to the sub flow.
 804  * @param[in] tunnel_decap
 805  *   Whether action is after tunnel decapsulation.
 806  * @param[out] error
 807  *   Pointer to the error structure.
 808  *
 809  * @return
 810  *   0 on success, a negative errno value otherwise and rte_errno is set.
 811  */
 812 static int
 813 flow_dv_convert_action_modify_dec_ttl
 814                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 815                          const struct rte_flow_item *items,
 816                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 817                          bool tunnel_decap, struct rte_flow_error *error)
 818 {
 819         struct rte_flow_item item;
 820         struct rte_flow_item_ipv4 ipv4;
 821         struct rte_flow_item_ipv4 ipv4_mask;
 822         struct rte_flow_item_ipv6 ipv6;
 823         struct rte_flow_item_ipv6 ipv6_mask;
 824         struct field_modify_info *field;
 825
 826         if (!attr->valid)
 827                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 828         if (attr->ipv4) {
 829                 memset(&ipv4, 0, sizeof(ipv4));
 830                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 831                 ipv4.hdr.time_to_live = 0xFF;
 832                 ipv4_mask.hdr.time_to_live = 0xFF;
 833                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 834                 item.spec = &ipv4;
 835                 item.mask = &ipv4_mask;
 836                 field = modify_ipv4;
 837         } else {
 838                 MLX5_ASSERT(attr->ipv6);
 839                 memset(&ipv6, 0, sizeof(ipv6));
 840                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 841                 ipv6.hdr.hop_limits = 0xFF;
 842                 ipv6_mask.hdr.hop_limits = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 844                 item.spec = &ipv6;
 845                 item.mask = &ipv6_mask;
 846                 field = modify_ipv6;
 847         }
 848         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 849                                              MLX5_MODIFICATION_TYPE_ADD, error);
 850 }
 851
 852 /**
 853  * Convert modify-header increment/decrement TCP Sequence number
 854  * to DV specification.
 855  *
 856  * @param[in,out] resource
 857  *   Pointer to the modify-header resource.
 858  * @param[in] action
 859  *   Pointer to action specification.
 860  * @param[out] error
 861  *   Pointer to the error structure.
 862  *
 863  * @return
 864  *   0 on success, a negative errno value otherwise and rte_errno is set.
 865  */
 866 static int
 867 flow_dv_convert_action_modify_tcp_seq
 868                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 869                          const struct rte_flow_action *action,
 870                          struct rte_flow_error *error)
 871 {
 872         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 873         uint64_t value = rte_be_to_cpu_32(*conf);
 874         struct rte_flow_item item;
 875         struct rte_flow_item_tcp tcp;
 876         struct rte_flow_item_tcp tcp_mask;
 877
 878         memset(&tcp, 0, sizeof(tcp));
 879         memset(&tcp_mask, 0, sizeof(tcp_mask));
 880         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 881                 /*
 882                  * The HW has no decrement operation, only increment operation.
 883                  * To simulate decrement X from Y using increment operation
 884                  * we need to add UINT32_MAX X times to Y.
 885                  * Each adding of UINT32_MAX decrements Y by 1.
 886                  */
 887                 value *= UINT32_MAX;
 888         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 889         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 890         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 891         item.spec = &tcp;
 892         item.mask = &tcp_mask;
 893         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 894                                              MLX5_MODIFICATION_TYPE_ADD, error);
 895 }
 896
 897 /**
 898  * Convert modify-header increment/decrement TCP Acknowledgment number
 899  * to DV specification.
 900  *
 901  * @param[in,out] resource
 902  *   Pointer to the modify-header resource.
 903  * @param[in] action
 904  *   Pointer to action specification.
 905  * @param[out] error
 906  *   Pointer to the error structure.
 907  *
 908  * @return
 909  *   0 on success, a negative errno value otherwise and rte_errno is set.
 910  */
 911 static int
 912 flow_dv_convert_action_modify_tcp_ack
 913                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 914                          const struct rte_flow_action *action,
 915                          struct rte_flow_error *error)
 916 {
 917         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 918         uint64_t value = rte_be_to_cpu_32(*conf);
 919         struct rte_flow_item item;
 920         struct rte_flow_item_tcp tcp;
 921         struct rte_flow_item_tcp tcp_mask;
 922
 923         memset(&tcp, 0, sizeof(tcp));
 924         memset(&tcp_mask, 0, sizeof(tcp_mask));
 925         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 926                 /*
 927                  * The HW has no decrement operation, only increment operation.
 928                  * To simulate decrement X from Y using increment operation
 929                  * we need to add UINT32_MAX X times to Y.
 930                  * Each adding of UINT32_MAX decrements Y by 1.
 931                  */
 932                 value *= UINT32_MAX;
 933         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 934         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 935         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 936         item.spec = &tcp;
 937         item.mask = &tcp_mask;
 938         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 939                                              MLX5_MODIFICATION_TYPE_ADD, error);
 940 }
 941
 942 static enum mlx5_modification_field reg_to_field[] = {
 943         [REG_NONE] = MLX5_MODI_OUT_NONE,
 944         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 945         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 946         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 947         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 948         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 949         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 950         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 951         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 952         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 953         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 954 };
 955
 956 /**
 957  * Convert register set to DV specification.
 958  *
 959  * @param[in,out] resource
 960  *   Pointer to the modify-header resource.
 961  * @param[in] action
 962  *   Pointer to action specification.
 963  * @param[out] error
 964  *   Pointer to the error structure.
 965  *
 966  * @return
 967  *   0 on success, a negative errno value otherwise and rte_errno is set.
 968  */
 969 static int
 970 flow_dv_convert_action_set_reg
 971                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 972                          const struct rte_flow_action *action,
 973                          struct rte_flow_error *error)
 974 {
 975         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 976         struct mlx5_modification_cmd *actions = resource->actions;
 977         uint32_t i = resource->actions_num;
 978
 979         if (i >= MLX5_MAX_MODIFY_NUM)
 980                 return rte_flow_error_set(error, EINVAL,
 981                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 982                                           "too many items to modify");
 983         MLX5_ASSERT(conf->id != REG_NONE);
 984         MLX5_ASSERT(conf->id < RTE_DIM(reg_to_field));
 985         actions[i] = (struct mlx5_modification_cmd) {
 986                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 987                 .field = reg_to_field[conf->id],
 988         };
 989         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 990         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 991         ++i;
 992         resource->actions_num = i;
 993         return 0;
 994 }
 995
 996 /**
 997  * Convert SET_TAG action to DV specification.
 998  *
 999  * @param[in] dev
1000  *   Pointer to the rte_eth_dev structure.
1001  * @param[in,out] resource
1002  *   Pointer to the modify-header resource.
1003  * @param[in] conf
1004  *   Pointer to action specification.
1005  * @param[out] error
1006  *   Pointer to the error structure.
1007  *
1008  * @return
1009  *   0 on success, a negative errno value otherwise and rte_errno is set.
1010  */
1011 static int
1012 flow_dv_convert_action_set_tag
1013                         (struct rte_eth_dev *dev,
1014                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1015                          const struct rte_flow_action_set_tag *conf,
1016                          struct rte_flow_error *error)
1017 {
1018         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1019         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1020         struct rte_flow_item item = {
1021                 .spec = &data,
1022                 .mask = &mask,
1023         };
1024         struct field_modify_info reg_c_x[] = {
1025                 [1] = {0, 0, 0},
1026         };
1027         enum mlx5_modification_field reg_type;
1028         int ret;
1029
1030         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1031         if (ret < 0)
1032                 return ret;
1033         MLX5_ASSERT(ret != REG_NONE);
1034         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1035         reg_type = reg_to_field[ret];
1036         MLX5_ASSERT(reg_type > 0);
1037         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1038         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1039                                              MLX5_MODIFICATION_TYPE_SET, error);
1040 }
1041
1042 /**
1043  * Convert internal COPY_REG action to DV specification.
1044  *
1045  * @param[in] dev
1046  *   Pointer to the rte_eth_dev structure.
1047  * @param[in,out] res
1048  *   Pointer to the modify-header resource.
1049  * @param[in] action
1050  *   Pointer to action specification.
1051  * @param[out] error
1052  *   Pointer to the error structure.
1053  *
1054  * @return
1055  *   0 on success, a negative errno value otherwise and rte_errno is set.
1056  */
1057 static int
1058 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1059                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1060                                  const struct rte_flow_action *action,
1061                                  struct rte_flow_error *error)
1062 {
1063         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1064         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1065         struct rte_flow_item item = {
1066                 .spec = NULL,
1067                 .mask = &mask,
1068         };
1069         struct field_modify_info reg_src[] = {
1070                 {4, 0, reg_to_field[conf->src]},
1071                 {0, 0, 0},
1072         };
1073         struct field_modify_info reg_dst = {
1074                 .offset = 0,
1075                 .id = reg_to_field[conf->dst],
1076         };
1077         /* Adjust reg_c[0] usage according to reported mask. */
1078         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1079                 struct mlx5_priv *priv = dev->data->dev_private;
1080                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1081
1082                 MLX5_ASSERT(reg_c0);
1083                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1084                 if (conf->dst == REG_C_0) {
1085                         /* Copy to reg_c[0], within mask only. */
1086                         reg_dst.offset = rte_bsf32(reg_c0);
1087                         /*
1088                          * Mask is ignoring the enianness, because
1089                          * there is no conversion in datapath.
1090                          */
1091 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1092                         /* Copy from destination lower bits to reg_c[0]. */
1093                         mask = reg_c0 >> reg_dst.offset;
1094 #else
1095                         /* Copy from destination upper bits to reg_c[0]. */
1096                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1097                                           rte_fls_u32(reg_c0));
1098 #endif
1099                 } else {
1100                         mask = rte_cpu_to_be_32(reg_c0);
1101 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1102                         /* Copy from reg_c[0] to destination lower bits. */
1103                         reg_dst.offset = 0;
1104 #else
1105                         /* Copy from reg_c[0] to destination upper bits. */
1106                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1107                                          (rte_fls_u32(reg_c0) -
1108                                           rte_bsf32(reg_c0));
1109 #endif
1110                 }
1111         }
1112         return flow_dv_convert_modify_action(&item,
1113                                              reg_src, &reg_dst, res,
1114                                              MLX5_MODIFICATION_TYPE_COPY,
1115                                              error);
1116 }
1117
1118 /**
1119  * Convert MARK action to DV specification. This routine is used
1120  * in extensive metadata only and requires metadata register to be
1121  * handled. In legacy mode hardware tag resource is engaged.
1122  *
1123  * @param[in] dev
1124  *   Pointer to the rte_eth_dev structure.
1125  * @param[in] conf
1126  *   Pointer to MARK action specification.
1127  * @param[in,out] resource
1128  *   Pointer to the modify-header resource.
1129  * @param[out] error
1130  *   Pointer to the error structure.
1131  *
1132  * @return
1133  *   0 on success, a negative errno value otherwise and rte_errno is set.
1134  */
1135 static int
1136 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1137                             const struct rte_flow_action_mark *conf,
1138                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1139                             struct rte_flow_error *error)
1140 {
1141         struct mlx5_priv *priv = dev->data->dev_private;
1142         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1143                                            priv->sh->dv_mark_mask);
1144         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1145         struct rte_flow_item item = {
1146                 .spec = &data,
1147                 .mask = &mask,
1148         };
1149         struct field_modify_info reg_c_x[] = {
1150                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1151                 {0, 0, 0},
1152         };
1153         int reg;
1154
1155         if (!mask)
1156                 return rte_flow_error_set(error, EINVAL,
1157                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1158                                           NULL, "zero mark action mask");
1159         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1160         if (reg < 0)
1161                 return reg;
1162         MLX5_ASSERT(reg > 0);
1163         if (reg == REG_C_0) {
1164                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1165                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1166
1167                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1168                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1169                 mask = rte_cpu_to_be_32(mask << shl_c0);
1170         }
1171         reg_c_x[0].id = reg_to_field[reg];
1172         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1173                                              MLX5_MODIFICATION_TYPE_SET, error);
1174 }
1175
1176 /**
1177  * Get metadata register index for specified steering domain.
1178  *
1179  * @param[in] dev
1180  *   Pointer to the rte_eth_dev structure.
1181  * @param[in] attr
1182  *   Attributes of flow to determine steering domain.
1183  * @param[out] error
1184  *   Pointer to the error structure.
1185  *
1186  * @return
1187  *   positive index on success, a negative errno value otherwise
1188  *   and rte_errno is set.
1189  */
1190 static enum modify_reg
1191 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1192                          const struct rte_flow_attr *attr,
1193                          struct rte_flow_error *error)
1194 {
1195         int reg =
1196                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1197                                           MLX5_METADATA_FDB :
1198                                             attr->egress ?
1199                                             MLX5_METADATA_TX :
1200                                             MLX5_METADATA_RX, 0, error);
1201         if (reg < 0)
1202                 return rte_flow_error_set(error,
1203                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1204                                           NULL, "unavailable "
1205                                           "metadata register");
1206         return reg;
1207 }
1208
1209 /**
1210  * Convert SET_META action to DV specification.
1211  *
1212  * @param[in] dev
1213  *   Pointer to the rte_eth_dev structure.
1214  * @param[in,out] resource
1215  *   Pointer to the modify-header resource.
1216  * @param[in] attr
1217  *   Attributes of flow that includes this item.
1218  * @param[in] conf
1219  *   Pointer to action specification.
1220  * @param[out] error
1221  *   Pointer to the error structure.
1222  *
1223  * @return
1224  *   0 on success, a negative errno value otherwise and rte_errno is set.
1225  */
1226 static int
1227 flow_dv_convert_action_set_meta
1228                         (struct rte_eth_dev *dev,
1229                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1230                          const struct rte_flow_attr *attr,
1231                          const struct rte_flow_action_set_meta *conf,
1232                          struct rte_flow_error *error)
1233 {
1234         uint32_t data = conf->data;
1235         uint32_t mask = conf->mask;
1236         struct rte_flow_item item = {
1237                 .spec = &data,
1238                 .mask = &mask,
1239         };
1240         struct field_modify_info reg_c_x[] = {
1241                 [1] = {0, 0, 0},
1242         };
1243         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1244
1245         if (reg < 0)
1246                 return reg;
1247         /*
1248          * In datapath code there is no endianness
1249          * coversions for perfromance reasons, all
1250          * pattern conversions are done in rte_flow.
1251          */
1252         if (reg == REG_C_0) {
1253                 struct mlx5_priv *priv = dev->data->dev_private;
1254                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1255                 uint32_t shl_c0;
1256
1257                 MLX5_ASSERT(msk_c0);
1258 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1259                 shl_c0 = rte_bsf32(msk_c0);
1260 #else
1261                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1262 #endif
1263                 mask <<= shl_c0;
1264                 data <<= shl_c0;
1265                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1266         }
1267         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1268         /* The routine expects parameters in memory as big-endian ones. */
1269         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1270                                              MLX5_MODIFICATION_TYPE_SET, error);
1271 }
1272
1273 /**
1274  * Convert modify-header set IPv4 DSCP action to DV specification.
1275  *
1276  * @param[in,out] resource
1277  *   Pointer to the modify-header resource.
1278  * @param[in] action
1279  *   Pointer to action specification.
1280  * @param[out] error
1281  *   Pointer to the error structure.
1282  *
1283  * @return
1284  *   0 on success, a negative errno value otherwise and rte_errno is set.
1285  */
1286 static int
1287 flow_dv_convert_action_modify_ipv4_dscp
1288                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1289                          const struct rte_flow_action *action,
1290                          struct rte_flow_error *error)
1291 {
1292         const struct rte_flow_action_set_dscp *conf =
1293                 (const struct rte_flow_action_set_dscp *)(action->conf);
1294         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1295         struct rte_flow_item_ipv4 ipv4;
1296         struct rte_flow_item_ipv4 ipv4_mask;
1297
1298         memset(&ipv4, 0, sizeof(ipv4));
1299         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1300         ipv4.hdr.type_of_service = conf->dscp;
1301         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1302         item.spec = &ipv4;
1303         item.mask = &ipv4_mask;
1304         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1305                                              MLX5_MODIFICATION_TYPE_SET, error);
1306 }
1307
1308 /**
1309  * Convert modify-header set IPv6 DSCP action to DV specification.
1310  *
1311  * @param[in,out] resource
1312  *   Pointer to the modify-header resource.
1313  * @param[in] action
1314  *   Pointer to action specification.
1315  * @param[out] error
1316  *   Pointer to the error structure.
1317  *
1318  * @return
1319  *   0 on success, a negative errno value otherwise and rte_errno is set.
1320  */
1321 static int
1322 flow_dv_convert_action_modify_ipv6_dscp
1323                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1324                          const struct rte_flow_action *action,
1325                          struct rte_flow_error *error)
1326 {
1327         const struct rte_flow_action_set_dscp *conf =
1328                 (const struct rte_flow_action_set_dscp *)(action->conf);
1329         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1330         struct rte_flow_item_ipv6 ipv6;
1331         struct rte_flow_item_ipv6 ipv6_mask;
1332
1333         memset(&ipv6, 0, sizeof(ipv6));
1334         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1335         /*
1336          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1337          * rdma-core only accept the DSCP bits byte aligned start from
1338          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1339          * bits in IPv6 case as rdma-core requires byte aligned value.
1340          */
1341         ipv6.hdr.vtc_flow = conf->dscp;
1342         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1343         item.spec = &ipv6;
1344         item.mask = &ipv6_mask;
1345         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1346                                              MLX5_MODIFICATION_TYPE_SET, error);
1347 }
1348
1349 /**
1350  * Validate MARK item.
1351  *
1352  * @param[in] dev
1353  *   Pointer to the rte_eth_dev structure.
1354  * @param[in] item
1355  *   Item specification.
1356  * @param[in] attr
1357  *   Attributes of flow that includes this item.
1358  * @param[out] error
1359  *   Pointer to error structure.
1360  *
1361  * @return
1362  *   0 on success, a negative errno value otherwise and rte_errno is set.
1363  */
1364 static int
1365 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1366                            const struct rte_flow_item *item,
1367                            const struct rte_flow_attr *attr __rte_unused,
1368                            struct rte_flow_error *error)
1369 {
1370         struct mlx5_priv *priv = dev->data->dev_private;
1371         struct mlx5_dev_config *config = &priv->config;
1372         const struct rte_flow_item_mark *spec = item->spec;
1373         const struct rte_flow_item_mark *mask = item->mask;
1374         const struct rte_flow_item_mark nic_mask = {
1375                 .id = priv->sh->dv_mark_mask,
1376         };
1377         int ret;
1378
1379         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1380                 return rte_flow_error_set(error, ENOTSUP,
1381                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1382                                           "extended metadata feature"
1383                                           " isn't enabled");
1384         if (!mlx5_flow_ext_mreg_supported(dev))
1385                 return rte_flow_error_set(error, ENOTSUP,
1386                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1387                                           "extended metadata register"
1388                                           " isn't supported");
1389         if (!nic_mask.id)
1390                 return rte_flow_error_set(error, ENOTSUP,
1391                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1392                                           "extended metadata register"
1393                                           " isn't available");
1394         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1395         if (ret < 0)
1396                 return ret;
1397         if (!spec)
1398                 return rte_flow_error_set(error, EINVAL,
1399                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1400                                           item->spec,
1401                                           "data cannot be empty");
1402         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1403                 return rte_flow_error_set(error, EINVAL,
1404                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1405                                           &spec->id,
1406                                           "mark id exceeds the limit");
1407         if (!mask)
1408                 mask = &nic_mask;
1409         if (!mask->id)
1410                 return rte_flow_error_set(error, EINVAL,
1411                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1412                                         "mask cannot be zero");
1413
1414         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1415                                         (const uint8_t *)&nic_mask,
1416                                         sizeof(struct rte_flow_item_mark),
1417                                         error);
1418         if (ret < 0)
1419                 return ret;
1420         return 0;
1421 }
1422
1423 /**
1424  * Validate META item.
1425  *
1426  * @param[in] dev
1427  *   Pointer to the rte_eth_dev structure.
1428  * @param[in] item
1429  *   Item specification.
1430  * @param[in] attr
1431  *   Attributes of flow that includes this item.
1432  * @param[out] error
1433  *   Pointer to error structure.
1434  *
1435  * @return
1436  *   0 on success, a negative errno value otherwise and rte_errno is set.
1437  */
1438 static int
1439 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1440                            const struct rte_flow_item *item,
1441                            const struct rte_flow_attr *attr,
1442                            struct rte_flow_error *error)
1443 {
1444         struct mlx5_priv *priv = dev->data->dev_private;
1445         struct mlx5_dev_config *config = &priv->config;
1446         const struct rte_flow_item_meta *spec = item->spec;
1447         const struct rte_flow_item_meta *mask = item->mask;
1448         struct rte_flow_item_meta nic_mask = {
1449                 .data = UINT32_MAX
1450         };
1451         int reg;
1452         int ret;
1453
1454         if (!spec)
1455                 return rte_flow_error_set(error, EINVAL,
1456                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1457                                           item->spec,
1458                                           "data cannot be empty");
1459         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1460                 if (!mlx5_flow_ext_mreg_supported(dev))
1461                         return rte_flow_error_set(error, ENOTSUP,
1462                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1463                                           "extended metadata register"
1464                                           " isn't supported");
1465                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1466                 if (reg < 0)
1467                         return reg;
1468                 if (reg == REG_B)
1469                         return rte_flow_error_set(error, ENOTSUP,
1470                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1471                                           "match on reg_b "
1472                                           "isn't supported");
1473                 if (reg != REG_A)
1474                         nic_mask.data = priv->sh->dv_meta_mask;
1475         }
1476         if (!mask)
1477                 mask = &rte_flow_item_meta_mask;
1478         if (!mask->data)
1479                 return rte_flow_error_set(error, EINVAL,
1480                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1481                                         "mask cannot be zero");
1482
1483         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1484                                         (const uint8_t *)&nic_mask,
1485                                         sizeof(struct rte_flow_item_meta),
1486                                         error);
1487         return ret;
1488 }
1489
1490 /**
1491  * Validate TAG item.
1492  *
1493  * @param[in] dev
1494  *   Pointer to the rte_eth_dev structure.
1495  * @param[in] item
1496  *   Item specification.
1497  * @param[in] attr
1498  *   Attributes of flow that includes this item.
1499  * @param[out] error
1500  *   Pointer to error structure.
1501  *
1502  * @return
1503  *   0 on success, a negative errno value otherwise and rte_errno is set.
1504  */
1505 static int
1506 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1507                           const struct rte_flow_item *item,
1508                           const struct rte_flow_attr *attr __rte_unused,
1509                           struct rte_flow_error *error)
1510 {
1511         const struct rte_flow_item_tag *spec = item->spec;
1512         const struct rte_flow_item_tag *mask = item->mask;
1513         const struct rte_flow_item_tag nic_mask = {
1514                 .data = RTE_BE32(UINT32_MAX),
1515                 .index = 0xff,
1516         };
1517         int ret;
1518
1519         if (!mlx5_flow_ext_mreg_supported(dev))
1520                 return rte_flow_error_set(error, ENOTSUP,
1521                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1522                                           "extensive metadata register"
1523                                           " isn't supported");
1524         if (!spec)
1525                 return rte_flow_error_set(error, EINVAL,
1526                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1527                                           item->spec,
1528                                           "data cannot be empty");
1529         if (!mask)
1530                 mask = &rte_flow_item_tag_mask;
1531         if (!mask->data)
1532                 return rte_flow_error_set(error, EINVAL,
1533                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1534                                         "mask cannot be zero");
1535
1536         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1537                                         (const uint8_t *)&nic_mask,
1538                                         sizeof(struct rte_flow_item_tag),
1539                                         error);
1540         if (ret < 0)
1541                 return ret;
1542         if (mask->index != 0xff)
1543                 return rte_flow_error_set(error, EINVAL,
1544                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1545                                           "partial mask for tag index"
1546                                           " is not supported");
1547         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1548         if (ret < 0)
1549                 return ret;
1550         MLX5_ASSERT(ret != REG_NONE);
1551         return 0;
1552 }
1553
1554 /**
1555  * Validate vport item.
1556  *
1557  * @param[in] dev
1558  *   Pointer to the rte_eth_dev structure.
1559  * @param[in] item
1560  *   Item specification.
1561  * @param[in] attr
1562  *   Attributes of flow that includes this item.
1563  * @param[in] item_flags
1564  *   Bit-fields that holds the items detected until now.
1565  * @param[out] error
1566  *   Pointer to error structure.
1567  *
1568  * @return
1569  *   0 on success, a negative errno value otherwise and rte_errno is set.
1570  */
1571 static int
1572 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1573                               const struct rte_flow_item *item,
1574                               const struct rte_flow_attr *attr,
1575                               uint64_t item_flags,
1576                               struct rte_flow_error *error)
1577 {
1578         const struct rte_flow_item_port_id *spec = item->spec;
1579         const struct rte_flow_item_port_id *mask = item->mask;
1580         const struct rte_flow_item_port_id switch_mask = {
1581                         .id = 0xffffffff,
1582         };
1583         struct mlx5_priv *esw_priv;
1584         struct mlx5_priv *dev_priv;
1585         int ret;
1586
1587         if (!attr->transfer)
1588                 return rte_flow_error_set(error, EINVAL,
1589                                           RTE_FLOW_ERROR_TYPE_ITEM,
1590                                           NULL,
1591                                           "match on port id is valid only"
1592                                           " when transfer flag is enabled");
1593         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1594                 return rte_flow_error_set(error, ENOTSUP,
1595                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1596                                           "multiple source ports are not"
1597                                           " supported");
1598         if (!mask)
1599                 mask = &switch_mask;
1600         if (mask->id != 0xffffffff)
1601                 return rte_flow_error_set(error, ENOTSUP,
1602                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1603                                            mask,
1604                                            "no support for partial mask on"
1605                                            " \"id\" field");
1606         ret = mlx5_flow_item_acceptable
1607                                 (item, (const uint8_t *)mask,
1608                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1609                                  sizeof(struct rte_flow_item_port_id),
1610                                  error);
1611         if (ret)
1612                 return ret;
1613         if (!spec)
1614                 return 0;
1615         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1616         if (!esw_priv)
1617                 return rte_flow_error_set(error, rte_errno,
1618                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1619                                           "failed to obtain E-Switch info for"
1620                                           " port");
1621         dev_priv = mlx5_dev_to_eswitch_info(dev);
1622         if (!dev_priv)
1623                 return rte_flow_error_set(error, rte_errno,
1624                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1625                                           NULL,
1626                                           "failed to obtain E-Switch info");
1627         if (esw_priv->domain_id != dev_priv->domain_id)
1628                 return rte_flow_error_set(error, EINVAL,
1629                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1630                                           "cannot match on a port from a"
1631                                           " different E-Switch");
1632         return 0;
1633 }
1634
1635 /**
1636  * Validate GTP item.
1637  *
1638  * @param[in] dev
1639  *   Pointer to the rte_eth_dev structure.
1640  * @param[in] item
1641  *   Item specification.
1642  * @param[in] item_flags
1643  *   Bit-fields that holds the items detected until now.
1644  * @param[out] error
1645  *   Pointer to error structure.
1646  *
1647  * @return
1648  *   0 on success, a negative errno value otherwise and rte_errno is set.
1649  */
1650 static int
1651 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
1652                           const struct rte_flow_item *item,
1653                           uint64_t item_flags,
1654                           struct rte_flow_error *error)
1655 {
1656         struct mlx5_priv *priv = dev->data->dev_private;
1657         const struct rte_flow_item_gtp *mask = item->mask;
1658         const struct rte_flow_item_gtp nic_mask = {
1659                 .msg_type = 0xff,
1660                 .teid = RTE_BE32(0xffffffff),
1661         };
1662
1663         if (!priv->config.hca_attr.tunnel_stateless_gtp)
1664                 return rte_flow_error_set(error, ENOTSUP,
1665                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1666                                           "GTP support is not enabled");
1667         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1668                 return rte_flow_error_set(error, ENOTSUP,
1669                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1670                                           "multiple tunnel layers not"
1671                                           " supported");
1672         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1673                 return rte_flow_error_set(error, EINVAL,
1674                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1675                                           "no outer UDP layer found");
1676         if (!mask)
1677                 mask = &rte_flow_item_gtp_mask;
1678         return mlx5_flow_item_acceptable
1679                 (item, (const uint8_t *)mask,
1680                  (const uint8_t *)&nic_mask,
1681                  sizeof(struct rte_flow_item_gtp),
1682                  error);
1683 }
1684
1685 /**
1686  * Validate the pop VLAN action.
1687  *
1688  * @param[in] dev
1689  *   Pointer to the rte_eth_dev structure.
1690  * @param[in] action_flags
1691  *   Holds the actions detected until now.
1692  * @param[in] action
1693  *   Pointer to the pop vlan action.
1694  * @param[in] item_flags
1695  *   The items found in this flow rule.
1696  * @param[in] attr
1697  *   Pointer to flow attributes.
1698  * @param[out] error
1699  *   Pointer to error structure.
1700  *
1701  * @return
1702  *   0 on success, a negative errno value otherwise and rte_errno is set.
1703  */
1704 static int
1705 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1706                                  uint64_t action_flags,
1707                                  const struct rte_flow_action *action,
1708                                  uint64_t item_flags,
1709                                  const struct rte_flow_attr *attr,
1710                                  struct rte_flow_error *error)
1711 {
1712         const struct mlx5_priv *priv = dev->data->dev_private;
1713
1714         (void)action;
1715         (void)attr;
1716         if (!priv->sh->pop_vlan_action)
1717                 return rte_flow_error_set(error, ENOTSUP,
1718                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1719                                           NULL,
1720                                           "pop vlan action is not supported");
1721         if (attr->egress)
1722                 return rte_flow_error_set(error, ENOTSUP,
1723                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1724                                           NULL,
1725                                           "pop vlan action not supported for "
1726                                           "egress");
1727         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1728                 return rte_flow_error_set(error, ENOTSUP,
1729                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1730                                           "no support for multiple VLAN "
1731                                           "actions");
1732         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1733                 return rte_flow_error_set(error, ENOTSUP,
1734                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1735                                           NULL,
1736                                           "cannot pop vlan without a "
1737                                           "match on (outer) vlan in the flow");
1738         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1739                 return rte_flow_error_set(error, EINVAL,
1740                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1741                                           "wrong action order, port_id should "
1742                                           "be after pop VLAN action");
1743         if (!attr->transfer && priv->representor)
1744                 return rte_flow_error_set(error, ENOTSUP,
1745                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1746                                           "pop vlan action for VF representor "
1747                                           "not supported on NIC table");
1748         return 0;
1749 }
1750
1751 /**
1752  * Get VLAN default info from vlan match info.
1753  *
1754  * @param[in] items
1755  *   the list of item specifications.
1756  * @param[out] vlan
1757  *   pointer VLAN info to fill to.
1758  *
1759  * @return
1760  *   0 on success, a negative errno value otherwise and rte_errno is set.
1761  */
1762 static void
1763 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1764                                   struct rte_vlan_hdr *vlan)
1765 {
1766         const struct rte_flow_item_vlan nic_mask = {
1767                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1768                                 MLX5DV_FLOW_VLAN_VID_MASK),
1769                 .inner_type = RTE_BE16(0xffff),
1770         };
1771
1772         if (items == NULL)
1773                 return;
1774         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1775                 int type = items->type;
1776
1777                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
1778                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
1779                         break;
1780         }
1781         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
1782                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1783                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1784
1785                 if (!vlan_m)
1786                         vlan_m = &nic_mask;
1787                 /* Only full match values are accepted */
1788                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1789                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1790                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
1791                         vlan->vlan_tci |=
1792                                 rte_be_to_cpu_16(vlan_v->tci &
1793                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1794                 }
1795                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1796                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1797                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1798                         vlan->vlan_tci |=
1799                                 rte_be_to_cpu_16(vlan_v->tci &
1800                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1801                 }
1802                 if (vlan_m->inner_type == nic_mask.inner_type)
1803                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1804                                                            vlan_m->inner_type);
1805         }
1806 }
1807
1808 /**
1809  * Validate the push VLAN action.
1810  *
1811  * @param[in] dev
1812  *   Pointer to the rte_eth_dev structure.
1813  * @param[in] action_flags
1814  *   Holds the actions detected until now.
1815  * @param[in] item_flags
1816  *   The items found in this flow rule.
1817  * @param[in] action
1818  *   Pointer to the action structure.
1819  * @param[in] attr
1820  *   Pointer to flow attributes
1821  * @param[out] error
1822  *   Pointer to error structure.
1823  *
1824  * @return
1825  *   0 on success, a negative errno value otherwise and rte_errno is set.
1826  */
1827 static int
1828 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
1829                                   uint64_t action_flags,
1830                                   uint64_t item_flags __rte_unused,
1831                                   const struct rte_flow_action *action,
1832                                   const struct rte_flow_attr *attr,
1833                                   struct rte_flow_error *error)
1834 {
1835         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1836         const struct mlx5_priv *priv = dev->data->dev_private;
1837
1838         if (!attr->transfer && attr->ingress)
1839                 return rte_flow_error_set(error, ENOTSUP,
1840                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1841                                           NULL,
1842                                           "push VLAN action not supported for "
1843                                           "ingress");
1844         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1845             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1846                 return rte_flow_error_set(error, EINVAL,
1847                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1848                                           "invalid vlan ethertype");
1849         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
1850                 return rte_flow_error_set(error, ENOTSUP,
1851                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1852                                           "no support for multiple VLAN "
1853                                           "actions");
1854         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1855                 return rte_flow_error_set(error, EINVAL,
1856                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1857                                           "wrong action order, port_id should "
1858                                           "be after push VLAN");
1859         if (!attr->transfer && priv->representor)
1860                 return rte_flow_error_set(error, ENOTSUP,
1861                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1862                                           "push vlan action for VF representor "
1863                                           "not supported on NIC table");
1864         (void)attr;
1865         return 0;
1866 }
1867
1868 /**
1869  * Validate the set VLAN PCP.
1870  *
1871  * @param[in] action_flags
1872  *   Holds the actions detected until now.
1873  * @param[in] actions
1874  *   Pointer to the list of actions remaining in the flow rule.
1875  * @param[out] error
1876  *   Pointer to error structure.
1877  *
1878  * @return
1879  *   0 on success, a negative errno value otherwise and rte_errno is set.
1880  */
1881 static int
1882 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1883                                      const struct rte_flow_action actions[],
1884                                      struct rte_flow_error *error)
1885 {
1886         const struct rte_flow_action *action = actions;
1887         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1888
1889         if (conf->vlan_pcp > 7)
1890                 return rte_flow_error_set(error, EINVAL,
1891                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1892                                           "VLAN PCP value is too big");
1893         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1894                 return rte_flow_error_set(error, ENOTSUP,
1895                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1896                                           "set VLAN PCP action must follow "
1897                                           "the push VLAN action");
1898         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1899                 return rte_flow_error_set(error, ENOTSUP,
1900                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1901                                           "Multiple VLAN PCP modification are "
1902                                           "not supported");
1903         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1904                 return rte_flow_error_set(error, EINVAL,
1905                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1906                                           "wrong action order, port_id should "
1907                                           "be after set VLAN PCP");
1908         return 0;
1909 }
1910
1911 /**
1912  * Validate the set VLAN VID.
1913  *
1914  * @param[in] item_flags
1915  *   Holds the items detected in this rule.
1916  * @param[in] action_flags
1917  *   Holds the actions detected until now.
1918  * @param[in] actions
1919  *   Pointer to the list of actions remaining in the flow rule.
1920  * @param[out] error
1921  *   Pointer to error structure.
1922  *
1923  * @return
1924  *   0 on success, a negative errno value otherwise and rte_errno is set.
1925  */
1926 static int
1927 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1928                                      uint64_t action_flags,
1929                                      const struct rte_flow_action actions[],
1930                                      struct rte_flow_error *error)
1931 {
1932         const struct rte_flow_action *action = actions;
1933         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1934
1935         if (conf->vlan_vid > RTE_BE16(0xFFE))
1936                 return rte_flow_error_set(error, EINVAL,
1937                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1938                                           "VLAN VID value is too big");
1939         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
1940             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1941                 return rte_flow_error_set(error, ENOTSUP,
1942                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1943                                           "set VLAN VID action must follow push"
1944                                           " VLAN action or match on VLAN item");
1945         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1946                 return rte_flow_error_set(error, ENOTSUP,
1947                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1948                                           "Multiple VLAN VID modifications are "
1949                                           "not supported");
1950         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1951                 return rte_flow_error_set(error, EINVAL,
1952                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1953                                           "wrong action order, port_id should "
1954                                           "be after set VLAN VID");
1955         return 0;
1956 }
1957
1958 /*
1959  * Validate the FLAG action.
1960  *
1961  * @param[in] dev
1962  *   Pointer to the rte_eth_dev structure.
1963  * @param[in] action_flags
1964  *   Holds the actions detected until now.
1965  * @param[in] attr
1966  *   Pointer to flow attributes
1967  * @param[out] error
1968  *   Pointer to error structure.
1969  *
1970  * @return
1971  *   0 on success, a negative errno value otherwise and rte_errno is set.
1972  */
1973 static int
1974 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1975                              uint64_t action_flags,
1976                              const struct rte_flow_attr *attr,
1977                              struct rte_flow_error *error)
1978 {
1979         struct mlx5_priv *priv = dev->data->dev_private;
1980         struct mlx5_dev_config *config = &priv->config;
1981         int ret;
1982
1983         /* Fall back if no extended metadata register support. */
1984         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1985                 return mlx5_flow_validate_action_flag(action_flags, attr,
1986                                                       error);
1987         /* Extensive metadata mode requires registers. */
1988         if (!mlx5_flow_ext_mreg_supported(dev))
1989                 return rte_flow_error_set(error, ENOTSUP,
1990                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1991                                           "no metadata registers "
1992                                           "to support flag action");
1993         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1994                 return rte_flow_error_set(error, ENOTSUP,
1995                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1996                                           "extended metadata register"
1997                                           " isn't available");
1998         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1999         if (ret < 0)
2000                 return ret;
2001         MLX5_ASSERT(ret > 0);
2002         if (action_flags & MLX5_FLOW_ACTION_MARK)
2003                 return rte_flow_error_set(error, EINVAL,
2004                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2005                                           "can't mark and flag in same flow");
2006         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2007                 return rte_flow_error_set(error, EINVAL,
2008                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2009                                           "can't have 2 flag"
2010                                           " actions in same flow");
2011         return 0;
2012 }
2013
2014 /**
2015  * Validate MARK action.
2016  *
2017  * @param[in] dev
2018  *   Pointer to the rte_eth_dev structure.
2019  * @param[in] action
2020  *   Pointer to action.
2021  * @param[in] action_flags
2022  *   Holds the actions detected until now.
2023  * @param[in] attr
2024  *   Pointer to flow attributes
2025  * @param[out] error
2026  *   Pointer to error structure.
2027  *
2028  * @return
2029  *   0 on success, a negative errno value otherwise and rte_errno is set.
2030  */
2031 static int
2032 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
2033                              const struct rte_flow_action *action,
2034                              uint64_t action_flags,
2035                              const struct rte_flow_attr *attr,
2036                              struct rte_flow_error *error)
2037 {
2038         struct mlx5_priv *priv = dev->data->dev_private;
2039         struct mlx5_dev_config *config = &priv->config;
2040         const struct rte_flow_action_mark *mark = action->conf;
2041         int ret;
2042
2043         /* Fall back if no extended metadata register support. */
2044         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2045                 return mlx5_flow_validate_action_mark(action, action_flags,
2046                                                       attr, error);
2047         /* Extensive metadata mode requires registers. */
2048         if (!mlx5_flow_ext_mreg_supported(dev))
2049                 return rte_flow_error_set(error, ENOTSUP,
2050                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2051                                           "no metadata registers "
2052                                           "to support mark action");
2053         if (!priv->sh->dv_mark_mask)
2054                 return rte_flow_error_set(error, ENOTSUP,
2055                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2056                                           "extended metadata register"
2057                                           " isn't available");
2058         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2059         if (ret < 0)
2060                 return ret;
2061         MLX5_ASSERT(ret > 0);
2062         if (!mark)
2063                 return rte_flow_error_set(error, EINVAL,
2064                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2065                                           "configuration cannot be null");
2066         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
2067                 return rte_flow_error_set(error, EINVAL,
2068                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2069                                           &mark->id,
2070                                           "mark id exceeds the limit");
2071         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2072                 return rte_flow_error_set(error, EINVAL,
2073                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2074                                           "can't flag and mark in same flow");
2075         if (action_flags & MLX5_FLOW_ACTION_MARK)
2076                 return rte_flow_error_set(error, EINVAL,
2077                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2078                                           "can't have 2 mark actions in same"
2079                                           " flow");
2080         return 0;
2081 }
2082
2083 /**
2084  * Validate SET_META action.
2085  *
2086  * @param[in] dev
2087  *   Pointer to the rte_eth_dev structure.
2088  * @param[in] action
2089  *   Pointer to the action structure.
2090  * @param[in] action_flags
2091  *   Holds the actions detected until now.
2092  * @param[in] attr
2093  *   Pointer to flow attributes
2094  * @param[out] error
2095  *   Pointer to error structure.
2096  *
2097  * @return
2098  *   0 on success, a negative errno value otherwise and rte_errno is set.
2099  */
2100 static int
2101 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
2102                                  const struct rte_flow_action *action,
2103                                  uint64_t action_flags __rte_unused,
2104                                  const struct rte_flow_attr *attr,
2105                                  struct rte_flow_error *error)
2106 {
2107         const struct rte_flow_action_set_meta *conf;
2108         uint32_t nic_mask = UINT32_MAX;
2109         int reg;
2110
2111         if (!mlx5_flow_ext_mreg_supported(dev))
2112                 return rte_flow_error_set(error, ENOTSUP,
2113                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2114                                           "extended metadata register"
2115                                           " isn't supported");
2116         reg = flow_dv_get_metadata_reg(dev, attr, error);
2117         if (reg < 0)
2118                 return reg;
2119         if (reg != REG_A && reg != REG_B) {
2120                 struct mlx5_priv *priv = dev->data->dev_private;
2121
2122                 nic_mask = priv->sh->dv_meta_mask;
2123         }
2124         if (!(action->conf))
2125                 return rte_flow_error_set(error, EINVAL,
2126                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2127                                           "configuration cannot be null");
2128         conf = (const struct rte_flow_action_set_meta *)action->conf;
2129         if (!conf->mask)
2130                 return rte_flow_error_set(error, EINVAL,
2131                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2132                                           "zero mask doesn't have any effect");
2133         if (conf->mask & ~nic_mask)
2134                 return rte_flow_error_set(error, EINVAL,
2135                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2136                                           "meta data must be within reg C0");
2137         return 0;
2138 }
2139
2140 /**
2141  * Validate SET_TAG action.
2142  *
2143  * @param[in] dev
2144  *   Pointer to the rte_eth_dev structure.
2145  * @param[in] action
2146  *   Pointer to the action structure.
2147  * @param[in] action_flags
2148  *   Holds the actions detected until now.
2149  * @param[in] attr
2150  *   Pointer to flow attributes
2151  * @param[out] error
2152  *   Pointer to error structure.
2153  *
2154  * @return
2155  *   0 on success, a negative errno value otherwise and rte_errno is set.
2156  */
2157 static int
2158 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
2159                                 const struct rte_flow_action *action,
2160                                 uint64_t action_flags,
2161                                 const struct rte_flow_attr *attr,
2162                                 struct rte_flow_error *error)
2163 {
2164         const struct rte_flow_action_set_tag *conf;
2165         const uint64_t terminal_action_flags =
2166                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
2167                 MLX5_FLOW_ACTION_RSS;
2168         int ret;
2169
2170         if (!mlx5_flow_ext_mreg_supported(dev))
2171                 return rte_flow_error_set(error, ENOTSUP,
2172                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2173                                           "extensive metadata register"
2174                                           " isn't supported");
2175         if (!(action->conf))
2176                 return rte_flow_error_set(error, EINVAL,
2177                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2178                                           "configuration cannot be null");
2179         conf = (const struct rte_flow_action_set_tag *)action->conf;
2180         if (!conf->mask)
2181                 return rte_flow_error_set(error, EINVAL,
2182                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2183                                           "zero mask doesn't have any effect");
2184         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
2185         if (ret < 0)
2186                 return ret;
2187         if (!attr->transfer && attr->ingress &&
2188             (action_flags & terminal_action_flags))
2189                 return rte_flow_error_set(error, EINVAL,
2190                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2191                                           "set_tag has no effect"
2192                                           " with terminal actions");
2193         return 0;
2194 }
2195
2196 /**
2197  * Validate count action.
2198  *
2199  * @param[in] dev
2200  *   Pointer to rte_eth_dev structure.
2201  * @param[out] error
2202  *   Pointer to error structure.
2203  *
2204  * @return
2205  *   0 on success, a negative errno value otherwise and rte_errno is set.
2206  */
2207 static int
2208 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2209                               struct rte_flow_error *error)
2210 {
2211         struct mlx5_priv *priv = dev->data->dev_private;
2212
2213         if (!priv->config.devx)
2214                 goto notsup_err;
2215 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2216         return 0;
2217 #endif
2218 notsup_err:
2219         return rte_flow_error_set
2220                       (error, ENOTSUP,
2221                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2222                        NULL,
2223                        "count action not supported");
2224 }
2225
2226 /**
2227  * Validate the L2 encap action.
2228  *
2229  * @param[in] dev
2230  *   Pointer to the rte_eth_dev structure.
2231  * @param[in] action_flags
2232  *   Holds the actions detected until now.
2233  * @param[in] action
2234  *   Pointer to the action structure.
2235  * @param[in] attr
2236  *   Pointer to flow attributes.
2237  * @param[out] error
2238  *   Pointer to error structure.
2239  *
2240  * @return
2241  *   0 on success, a negative errno value otherwise and rte_errno is set.
2242  */
2243 static int
2244 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
2245                                  uint64_t action_flags,
2246                                  const struct rte_flow_action *action,
2247                                  const struct rte_flow_attr *attr,
2248                                  struct rte_flow_error *error)
2249 {
2250         const struct mlx5_priv *priv = dev->data->dev_private;
2251
2252         if (!(action->conf))
2253                 return rte_flow_error_set(error, EINVAL,
2254                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2255                                           "configuration cannot be null");
2256         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
2257                 return rte_flow_error_set(error, EINVAL,
2258                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2259                                           "can only have a single encap action "
2260                                           "in a flow");
2261         if (!attr->transfer && priv->representor)
2262                 return rte_flow_error_set(error, ENOTSUP,
2263                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2264                                           "encap action for VF representor "
2265                                           "not supported on NIC table");
2266         return 0;
2267 }
2268
2269 /**
2270  * Validate a decap action.
2271  *
2272  * @param[in] dev
2273  *   Pointer to the rte_eth_dev structure.
2274  * @param[in] action_flags
2275  *   Holds the actions detected until now.
2276  * @param[in] attr
2277  *   Pointer to flow attributes
2278  * @param[out] error
2279  *   Pointer to error structure.
2280  *
2281  * @return
2282  *   0 on success, a negative errno value otherwise and rte_errno is set.
2283  */
2284 static int
2285 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
2286                               uint64_t action_flags,
2287                               const struct rte_flow_attr *attr,
2288                               struct rte_flow_error *error)
2289 {
2290         const struct mlx5_priv *priv = dev->data->dev_private;
2291
2292         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
2293                 return rte_flow_error_set(error, ENOTSUP,
2294                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2295                                           action_flags &
2296                                           MLX5_FLOW_ACTION_DECAP ? "can only "
2297                                           "have a single decap action" : "decap "
2298                                           "after encap is not supported");
2299         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2300                 return rte_flow_error_set(error, EINVAL,
2301                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2302                                           "can't have decap action after"
2303                                           " modify action");
2304         if (attr->egress)
2305                 return rte_flow_error_set(error, ENOTSUP,
2306                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2307                                           NULL,
2308                                           "decap action not supported for "
2309                                           "egress");
2310         if (!attr->transfer && priv->representor)
2311                 return rte_flow_error_set(error, ENOTSUP,
2312                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2313                                           "decap action for VF representor "
2314                                           "not supported on NIC table");
2315         return 0;
2316 }
2317
2318 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
2319
2320 /**
2321  * Validate the raw encap and decap actions.
2322  *
2323  * @param[in] dev
2324  *   Pointer to the rte_eth_dev structure.
2325  * @param[in] decap
2326  *   Pointer to the decap action.
2327  * @param[in] encap
2328  *   Pointer to the encap action.
2329  * @param[in] attr
2330  *   Pointer to flow attributes
2331  * @param[in/out] action_flags
2332  *   Holds the actions detected until now.
2333  * @param[out] actions_n
2334  *   pointer to the number of actions counter.
2335  * @param[out] error
2336  *   Pointer to error structure.
2337  *
2338  * @return
2339  *   0 on success, a negative errno value otherwise and rte_errno is set.
2340  */
2341 static int
2342 flow_dv_validate_action_raw_encap_decap
2343         (struct rte_eth_dev *dev,
2344          const struct rte_flow_action_raw_decap *decap,
2345          const struct rte_flow_action_raw_encap *encap,
2346          const struct rte_flow_attr *attr, uint64_t *action_flags,
2347          int *actions_n, struct rte_flow_error *error)
2348 {
2349         const struct mlx5_priv *priv = dev->data->dev_private;
2350         int ret;
2351
2352         if (encap && (!encap->size || !encap->data))
2353                 return rte_flow_error_set(error, EINVAL,
2354                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2355                                           "raw encap data cannot be empty");
2356         if (decap && encap) {
2357                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
2358                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
2359                         /* L3 encap. */
2360                         decap = NULL;
2361                 else if (encap->size <=
2362                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2363                            decap->size >
2364                            MLX5_ENCAPSULATION_DECISION_SIZE)
2365                         /* L3 decap. */
2366                         encap = NULL;
2367                 else if (encap->size >
2368                            MLX5_ENCAPSULATION_DECISION_SIZE &&
2369                            decap->size >
2370                            MLX5_ENCAPSULATION_DECISION_SIZE)
2371                         /* 2 L2 actions: encap and decap. */
2372                         ;
2373                 else
2374                         return rte_flow_error_set(error,
2375                                 ENOTSUP,
2376                                 RTE_FLOW_ERROR_TYPE_ACTION,
2377                                 NULL, "unsupported too small "
2378                                 "raw decap and too small raw "
2379                                 "encap combination");
2380         }
2381         if (decap) {
2382                 ret = flow_dv_validate_action_decap(dev, *action_flags, attr,
2383                                                     error);
2384                 if (ret < 0)
2385                         return ret;
2386                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
2387                 ++(*actions_n);
2388         }
2389         if (encap) {
2390                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
2391                         return rte_flow_error_set(error, ENOTSUP,
2392                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2393                                                   NULL,
2394                                                   "small raw encap size");
2395                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
2396                         return rte_flow_error_set(error, EINVAL,
2397                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2398                                                   NULL,
2399                                                   "more than one encap action");
2400                 if (!attr->transfer && priv->representor)
2401                         return rte_flow_error_set
2402                                         (error, ENOTSUP,
2403                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2404                                          "encap action for VF representor "
2405                                          "not supported on NIC table");
2406                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
2407                 ++(*actions_n);
2408         }
2409         return 0;
2410 }
2411
2412 /**
2413  * Find existing encap/decap resource or create and register a new one.
2414  *
2415  * @param[in, out] dev
2416  *   Pointer to rte_eth_dev structure.
2417  * @param[in, out] resource
2418  *   Pointer to encap/decap resource.
2419  * @parm[in, out] dev_flow
2420  *   Pointer to the dev_flow.
2421  * @param[out] error
2422  *   pointer to error structure.
2423  *
2424  * @return
2425  *   0 on success otherwise -errno and errno is set.
2426  */
2427 static int
2428 flow_dv_encap_decap_resource_register
2429                         (struct rte_eth_dev *dev,
2430                          struct mlx5_flow_dv_encap_decap_resource *resource,
2431                          struct mlx5_flow *dev_flow,
2432                          struct rte_flow_error *error)
2433 {
2434         struct mlx5_priv *priv = dev->data->dev_private;
2435         struct mlx5_ibv_shared *sh = priv->sh;
2436         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2437         struct mlx5dv_dr_domain *domain;
2438
2439         resource->flags = dev_flow->group ? 0 : 1;
2440         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2441                 domain = sh->fdb_domain;
2442         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2443                 domain = sh->rx_domain;
2444         else
2445                 domain = sh->tx_domain;
2446         /* Lookup a matching resource from cache. */
2447         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2448                 if (resource->reformat_type == cache_resource->reformat_type &&
2449                     resource->ft_type == cache_resource->ft_type &&
2450                     resource->flags == cache_resource->flags &&
2451                     resource->size == cache_resource->size &&
2452                     !memcmp((const void *)resource->buf,
2453                             (const void *)cache_resource->buf,
2454                             resource->size)) {
2455                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2456                                 (void *)cache_resource,
2457                                 rte_atomic32_read(&cache_resource->refcnt));
2458                         rte_atomic32_inc(&cache_resource->refcnt);
2459                         dev_flow->dv.encap_decap = cache_resource;
2460                         return 0;
2461                 }
2462         }
2463         /* Register new encap/decap resource. */
2464         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2465         if (!cache_resource)
2466                 return rte_flow_error_set(error, ENOMEM,
2467                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2468                                           "cannot allocate resource memory");
2469         *cache_resource = *resource;
2470         cache_resource->verbs_action =
2471                 mlx5_glue->dv_create_flow_action_packet_reformat
2472                         (sh->ctx, cache_resource->reformat_type,
2473                          cache_resource->ft_type, domain, cache_resource->flags,
2474                          cache_resource->size,
2475                          (cache_resource->size ? cache_resource->buf : NULL));
2476         if (!cache_resource->verbs_action) {
2477                 rte_free(cache_resource);
2478                 return rte_flow_error_set(error, ENOMEM,
2479                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2480                                           NULL, "cannot create action");
2481         }
2482         rte_atomic32_init(&cache_resource->refcnt);
2483         rte_atomic32_inc(&cache_resource->refcnt);
2484         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2485         dev_flow->dv.encap_decap = cache_resource;
2486         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2487                 (void *)cache_resource,
2488                 rte_atomic32_read(&cache_resource->refcnt));
2489         return 0;
2490 }
2491
2492 /**
2493  * Find existing table jump resource or create and register a new one.
2494  *
2495  * @param[in, out] dev
2496  *   Pointer to rte_eth_dev structure.
2497  * @param[in, out] tbl
2498  *   Pointer to flow table resource.
2499  * @parm[in, out] dev_flow
2500  *   Pointer to the dev_flow.
2501  * @param[out] error
2502  *   pointer to error structure.
2503  *
2504  * @return
2505  *   0 on success otherwise -errno and errno is set.
2506  */
2507 static int
2508 flow_dv_jump_tbl_resource_register
2509                         (struct rte_eth_dev *dev __rte_unused,
2510                          struct mlx5_flow_tbl_resource *tbl,
2511                          struct mlx5_flow *dev_flow,
2512                          struct rte_flow_error *error)
2513 {
2514         struct mlx5_flow_tbl_data_entry *tbl_data =
2515                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
2516         int cnt;
2517
2518         MLX5_ASSERT(tbl);
2519         cnt = rte_atomic32_read(&tbl_data->jump.refcnt);
2520         if (!cnt) {
2521                 tbl_data->jump.action =
2522                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
2523                         (tbl->obj);
2524                 if (!tbl_data->jump.action)
2525                         return rte_flow_error_set(error, ENOMEM,
2526                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2527                                         NULL, "cannot create jump action");
2528                 DRV_LOG(DEBUG, "new jump table resource %p: refcnt %d++",
2529                         (void *)&tbl_data->jump, cnt);
2530         } else {
2531                 MLX5_ASSERT(tbl_data->jump.action);
2532                 DRV_LOG(DEBUG, "existed jump table resource %p: refcnt %d++",
2533                         (void *)&tbl_data->jump, cnt);
2534         }
2535         rte_atomic32_inc(&tbl_data->jump.refcnt);
2536         dev_flow->dv.jump = &tbl_data->jump;
2537         return 0;
2538 }
2539
2540 /**
2541  * Find existing table port ID resource or create and register a new one.
2542  *
2543  * @param[in, out] dev
2544  *   Pointer to rte_eth_dev structure.
2545  * @param[in, out] resource
2546  *   Pointer to port ID action resource.
2547  * @parm[in, out] dev_flow
2548  *   Pointer to the dev_flow.
2549  * @param[out] error
2550  *   pointer to error structure.
2551  *
2552  * @return
2553  *   0 on success otherwise -errno and errno is set.
2554  */
2555 static int
2556 flow_dv_port_id_action_resource_register
2557                         (struct rte_eth_dev *dev,
2558                          struct mlx5_flow_dv_port_id_action_resource *resource,
2559                          struct mlx5_flow *dev_flow,
2560                          struct rte_flow_error *error)
2561 {
2562         struct mlx5_priv *priv = dev->data->dev_private;
2563         struct mlx5_ibv_shared *sh = priv->sh;
2564         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2565
2566         /* Lookup a matching resource from cache. */
2567         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2568                 if (resource->port_id == cache_resource->port_id) {
2569                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2570                                 "refcnt %d++",
2571                                 (void *)cache_resource,
2572                                 rte_atomic32_read(&cache_resource->refcnt));
2573                         rte_atomic32_inc(&cache_resource->refcnt);
2574                         dev_flow->dv.port_id_action = cache_resource;
2575                         return 0;
2576                 }
2577         }
2578         /* Register new port id action resource. */
2579         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2580         if (!cache_resource)
2581                 return rte_flow_error_set(error, ENOMEM,
2582                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2583                                           "cannot allocate resource memory");
2584         *cache_resource = *resource;
2585         /*
2586          * Depending on rdma_core version the glue routine calls
2587          * either mlx5dv_dr_action_create_dest_ib_port(domain, ibv_port)
2588          * or mlx5dv_dr_action_create_dest_vport(domain, vport_id).
2589          */
2590         cache_resource->action =
2591                 mlx5_glue->dr_create_flow_action_dest_port
2592                         (priv->sh->fdb_domain, resource->port_id);
2593         if (!cache_resource->action) {
2594                 rte_free(cache_resource);
2595                 return rte_flow_error_set(error, ENOMEM,
2596                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2597                                           NULL, "cannot create action");
2598         }
2599         rte_atomic32_init(&cache_resource->refcnt);
2600         rte_atomic32_inc(&cache_resource->refcnt);
2601         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2602         dev_flow->dv.port_id_action = cache_resource;
2603         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2604                 (void *)cache_resource,
2605                 rte_atomic32_read(&cache_resource->refcnt));
2606         return 0;
2607 }
2608
2609 /**
2610  * Find existing push vlan resource or create and register a new one.
2611  *
2612  * @param [in, out] dev
2613  *   Pointer to rte_eth_dev structure.
2614  * @param[in, out] resource
2615  *   Pointer to port ID action resource.
2616  * @parm[in, out] dev_flow
2617  *   Pointer to the dev_flow.
2618  * @param[out] error
2619  *   pointer to error structure.
2620  *
2621  * @return
2622  *   0 on success otherwise -errno and errno is set.
2623  */
2624 static int
2625 flow_dv_push_vlan_action_resource_register
2626                        (struct rte_eth_dev *dev,
2627                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2628                         struct mlx5_flow *dev_flow,
2629                         struct rte_flow_error *error)
2630 {
2631         struct mlx5_priv *priv = dev->data->dev_private;
2632         struct mlx5_ibv_shared *sh = priv->sh;
2633         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2634         struct mlx5dv_dr_domain *domain;
2635
2636         /* Lookup a matching resource from cache. */
2637         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2638                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2639                     resource->ft_type == cache_resource->ft_type) {
2640                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2641                                 "refcnt %d++",
2642                                 (void *)cache_resource,
2643                                 rte_atomic32_read(&cache_resource->refcnt));
2644                         rte_atomic32_inc(&cache_resource->refcnt);
2645                         dev_flow->dv.push_vlan_res = cache_resource;
2646                         return 0;
2647                 }
2648         }
2649         /* Register new push_vlan action resource. */
2650         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2651         if (!cache_resource)
2652                 return rte_flow_error_set(error, ENOMEM,
2653                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2654                                           "cannot allocate resource memory");
2655         *cache_resource = *resource;
2656         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2657                 domain = sh->fdb_domain;
2658         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2659                 domain = sh->rx_domain;
2660         else
2661                 domain = sh->tx_domain;
2662         cache_resource->action =
2663                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2664                                                            resource->vlan_tag);
2665         if (!cache_resource->action) {
2666                 rte_free(cache_resource);
2667                 return rte_flow_error_set(error, ENOMEM,
2668                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2669                                           NULL, "cannot create action");
2670         }
2671         rte_atomic32_init(&cache_resource->refcnt);
2672         rte_atomic32_inc(&cache_resource->refcnt);
2673         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2674         dev_flow->dv.push_vlan_res = cache_resource;
2675         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2676                 (void *)cache_resource,
2677                 rte_atomic32_read(&cache_resource->refcnt));
2678         return 0;
2679 }
2680 /**
2681  * Get the size of specific rte_flow_item_type
2682  *
2683  * @param[in] item_type
2684  *   Tested rte_flow_item_type.
2685  *
2686  * @return
2687  *   sizeof struct item_type, 0 if void or irrelevant.
2688  */
2689 static size_t
2690 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2691 {
2692         size_t retval;
2693
2694         switch (item_type) {
2695         case RTE_FLOW_ITEM_TYPE_ETH:
2696                 retval = sizeof(struct rte_flow_item_eth);
2697                 break;
2698         case RTE_FLOW_ITEM_TYPE_VLAN:
2699                 retval = sizeof(struct rte_flow_item_vlan);
2700                 break;
2701         case RTE_FLOW_ITEM_TYPE_IPV4:
2702                 retval = sizeof(struct rte_flow_item_ipv4);
2703                 break;
2704         case RTE_FLOW_ITEM_TYPE_IPV6:
2705                 retval = sizeof(struct rte_flow_item_ipv6);
2706                 break;
2707         case RTE_FLOW_ITEM_TYPE_UDP:
2708                 retval = sizeof(struct rte_flow_item_udp);
2709                 break;
2710         case RTE_FLOW_ITEM_TYPE_TCP:
2711                 retval = sizeof(struct rte_flow_item_tcp);
2712                 break;
2713         case RTE_FLOW_ITEM_TYPE_VXLAN:
2714                 retval = sizeof(struct rte_flow_item_vxlan);
2715                 break;
2716         case RTE_FLOW_ITEM_TYPE_GRE:
2717                 retval = sizeof(struct rte_flow_item_gre);
2718                 break;
2719         case RTE_FLOW_ITEM_TYPE_NVGRE:
2720                 retval = sizeof(struct rte_flow_item_nvgre);
2721                 break;
2722         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2723                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2724                 break;
2725         case RTE_FLOW_ITEM_TYPE_MPLS:
2726                 retval = sizeof(struct rte_flow_item_mpls);
2727                 break;
2728         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2729         default:
2730                 retval = 0;
2731                 break;
2732         }
2733         return retval;
2734 }
2735
2736 #define MLX5_ENCAP_IPV4_VERSION         0x40
2737 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2738 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2739 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2740 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2741 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2742 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2743
2744 /**
2745  * Convert the encap action data from list of rte_flow_item to raw buffer
2746  *
2747  * @param[in] items
2748  *   Pointer to rte_flow_item objects list.
2749  * @param[out] buf
2750  *   Pointer to the output buffer.
2751  * @param[out] size
2752  *   Pointer to the output buffer size.
2753  * @param[out] error
2754  *   Pointer to the error structure.
2755  *
2756  * @return
2757  *   0 on success, a negative errno value otherwise and rte_errno is set.
2758  */
2759 static int
2760 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2761                            size_t *size, struct rte_flow_error *error)
2762 {
2763         struct rte_ether_hdr *eth = NULL;
2764         struct rte_vlan_hdr *vlan = NULL;
2765         struct rte_ipv4_hdr *ipv4 = NULL;
2766         struct rte_ipv6_hdr *ipv6 = NULL;
2767         struct rte_udp_hdr *udp = NULL;
2768         struct rte_vxlan_hdr *vxlan = NULL;
2769         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2770         struct rte_gre_hdr *gre = NULL;
2771         size_t len;
2772         size_t temp_size = 0;
2773
2774         if (!items)
2775                 return rte_flow_error_set(error, EINVAL,
2776                                           RTE_FLOW_ERROR_TYPE_ACTION,
2777                                           NULL, "invalid empty data");
2778         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2779                 len = flow_dv_get_item_len(items->type);
2780                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2781                         return rte_flow_error_set(error, EINVAL,
2782                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2783                                                   (void *)items->type,
2784                                                   "items total size is too big"
2785                                                   " for encap action");
2786                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2787                 switch (items->type) {
2788                 case RTE_FLOW_ITEM_TYPE_ETH:
2789                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2790                         break;
2791                 case RTE_FLOW_ITEM_TYPE_VLAN:
2792                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2793                         if (!eth)
2794                                 return rte_flow_error_set(error, EINVAL,
2795                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2796                                                 (void *)items->type,
2797                                                 "eth header not found");
2798                         if (!eth->ether_type)
2799                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2800                         break;
2801                 case RTE_FLOW_ITEM_TYPE_IPV4:
2802                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2803                         if (!vlan && !eth)
2804                                 return rte_flow_error_set(error, EINVAL,
2805                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2806                                                 (void *)items->type,
2807                                                 "neither eth nor vlan"
2808                                                 " header found");
2809                         if (vlan && !vlan->eth_proto)
2810                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2811                         else if (eth && !eth->ether_type)
2812                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2813                         if (!ipv4->version_ihl)
2814                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2815                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2816                         if (!ipv4->time_to_live)
2817                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2818                         break;
2819                 case RTE_FLOW_ITEM_TYPE_IPV6:
2820                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2821                         if (!vlan && !eth)
2822                                 return rte_flow_error_set(error, EINVAL,
2823                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2824                                                 (void *)items->type,
2825                                                 "neither eth nor vlan"
2826                                                 " header found");
2827                         if (vlan && !vlan->eth_proto)
2828                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2829                         else if (eth && !eth->ether_type)
2830                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2831                         if (!ipv6->vtc_flow)
2832                                 ipv6->vtc_flow =
2833                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2834                         if (!ipv6->hop_limits)
2835                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2836                         break;
2837                 case RTE_FLOW_ITEM_TYPE_UDP:
2838                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2839                         if (!ipv4 && !ipv6)
2840                                 return rte_flow_error_set(error, EINVAL,
2841                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2842                                                 (void *)items->type,
2843                                                 "ip header not found");
2844                         if (ipv4 && !ipv4->next_proto_id)
2845                                 ipv4->next_proto_id = IPPROTO_UDP;
2846                         else if (ipv6 && !ipv6->proto)
2847                                 ipv6->proto = IPPROTO_UDP;
2848                         break;
2849                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2850                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2851                         if (!udp)
2852                                 return rte_flow_error_set(error, EINVAL,
2853                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2854                                                 (void *)items->type,
2855                                                 "udp header not found");
2856                         if (!udp->dst_port)
2857                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2858                         if (!vxlan->vx_flags)
2859                                 vxlan->vx_flags =
2860                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2861                         break;
2862                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2863                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2864                         if (!udp)
2865                                 return rte_flow_error_set(error, EINVAL,
2866                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2867                                                 (void *)items->type,
2868                                                 "udp header not found");
2869                         if (!vxlan_gpe->proto)
2870                                 return rte_flow_error_set(error, EINVAL,
2871                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2872                                                 (void *)items->type,
2873                                                 "next protocol not found");
2874                         if (!udp->dst_port)
2875                                 udp->dst_port =
2876                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2877                         if (!vxlan_gpe->vx_flags)
2878                                 vxlan_gpe->vx_flags =
2879                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2880                         break;
2881                 case RTE_FLOW_ITEM_TYPE_GRE:
2882                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2883                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2884                         if (!gre->proto)
2885                                 return rte_flow_error_set(error, EINVAL,
2886                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2887                                                 (void *)items->type,
2888                                                 "next protocol not found");
2889                         if (!ipv4 && !ipv6)
2890                                 return rte_flow_error_set(error, EINVAL,
2891                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2892                                                 (void *)items->type,
2893                                                 "ip header not found");
2894                         if (ipv4 && !ipv4->next_proto_id)
2895                                 ipv4->next_proto_id = IPPROTO_GRE;
2896                         else if (ipv6 && !ipv6->proto)
2897                                 ipv6->proto = IPPROTO_GRE;
2898                         break;
2899                 case RTE_FLOW_ITEM_TYPE_VOID:
2900                         break;
2901                 default:
2902                         return rte_flow_error_set(error, EINVAL,
2903                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2904                                                   (void *)items->type,
2905                                                   "unsupported item type");
2906                         break;
2907                 }
2908                 temp_size += len;
2909         }
2910         *size = temp_size;
2911         return 0;
2912 }
2913
2914 static int
2915 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2916 {
2917         struct rte_ether_hdr *eth = NULL;
2918         struct rte_vlan_hdr *vlan = NULL;
2919         struct rte_ipv6_hdr *ipv6 = NULL;
2920         struct rte_udp_hdr *udp = NULL;
2921         char *next_hdr;
2922         uint16_t proto;
2923
2924         eth = (struct rte_ether_hdr *)data;
2925         next_hdr = (char *)(eth + 1);
2926         proto = RTE_BE16(eth->ether_type);
2927
2928         /* VLAN skipping */
2929         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2930                 vlan = (struct rte_vlan_hdr *)next_hdr;
2931                 proto = RTE_BE16(vlan->eth_proto);
2932                 next_hdr += sizeof(struct rte_vlan_hdr);
2933         }
2934
2935         /* HW calculates IPv4 csum. no need to proceed */
2936         if (proto == RTE_ETHER_TYPE_IPV4)
2937                 return 0;
2938
2939         /* non IPv4/IPv6 header. not supported */
2940         if (proto != RTE_ETHER_TYPE_IPV6) {
2941                 return rte_flow_error_set(error, ENOTSUP,
2942                                           RTE_FLOW_ERROR_TYPE_ACTION,
2943                                           NULL, "Cannot offload non IPv4/IPv6");
2944         }
2945
2946         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2947
2948         /* ignore non UDP */
2949         if (ipv6->proto != IPPROTO_UDP)
2950                 return 0;
2951
2952         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2953         udp->dgram_cksum = 0;
2954
2955         return 0;
2956 }
2957
2958 /**
2959  * Convert L2 encap action to DV specification.
2960  *
2961  * @param[in] dev
2962  *   Pointer to rte_eth_dev structure.
2963  * @param[in] action
2964  *   Pointer to action structure.
2965  * @param[in, out] dev_flow
2966  *   Pointer to the mlx5_flow.
2967  * @param[in] transfer
2968  *   Mark if the flow is E-Switch flow.
2969  * @param[out] error
2970  *   Pointer to the error structure.
2971  *
2972  * @return
2973  *   0 on success, a negative errno value otherwise and rte_errno is set.
2974  */
2975 static int
2976 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2977                                const struct rte_flow_action *action,
2978                                struct mlx5_flow *dev_flow,
2979                                uint8_t transfer,
2980                                struct rte_flow_error *error)
2981 {
2982         const struct rte_flow_item *encap_data;
2983         const struct rte_flow_action_raw_encap *raw_encap_data;
2984         struct mlx5_flow_dv_encap_decap_resource res = {
2985                 .reformat_type =
2986                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2987                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2988                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2989         };
2990
2991         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2992                 raw_encap_data =
2993                         (const struct rte_flow_action_raw_encap *)action->conf;
2994                 res.size = raw_encap_data->size;
2995                 memcpy(res.buf, raw_encap_data->data, res.size);
2996         } else {
2997                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2998                         encap_data =
2999                                 ((const struct rte_flow_action_vxlan_encap *)
3000                                                 action->conf)->definition;
3001                 else
3002                         encap_data =
3003                                 ((const struct rte_flow_action_nvgre_encap *)
3004                                                 action->conf)->definition;
3005                 if (flow_dv_convert_encap_data(encap_data, res.buf,
3006                                                &res.size, error))
3007                         return -rte_errno;
3008         }
3009         if (flow_dv_zero_encap_udp_csum(res.buf, error))
3010                 return -rte_errno;
3011         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3012                 return rte_flow_error_set(error, EINVAL,
3013                                           RTE_FLOW_ERROR_TYPE_ACTION,
3014                                           NULL, "can't create L2 encap action");
3015         return 0;
3016 }
3017
3018 /**
3019  * Convert L2 decap action to DV specification.
3020  *
3021  * @param[in] dev
3022  *   Pointer to rte_eth_dev structure.
3023  * @param[in, out] dev_flow
3024  *   Pointer to the mlx5_flow.
3025  * @param[in] transfer
3026  *   Mark if the flow is E-Switch flow.
3027  * @param[out] error
3028  *   Pointer to the error structure.
3029  *
3030  * @return
3031  *   0 on success, a negative errno value otherwise and rte_errno is set.
3032  */
3033 static int
3034 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
3035                                struct mlx5_flow *dev_flow,
3036                                uint8_t transfer,
3037                                struct rte_flow_error *error)
3038 {
3039         struct mlx5_flow_dv_encap_decap_resource res = {
3040                 .size = 0,
3041                 .reformat_type =
3042                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
3043                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
3044                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
3045         };
3046
3047         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3048                 return rte_flow_error_set(error, EINVAL,
3049                                           RTE_FLOW_ERROR_TYPE_ACTION,
3050                                           NULL, "can't create L2 decap action");
3051         return 0;
3052 }
3053
3054 /**
3055  * Convert raw decap/encap (L3 tunnel) action to DV specification.
3056  *
3057  * @param[in] dev
3058  *   Pointer to rte_eth_dev structure.
3059  * @param[in] action
3060  *   Pointer to action structure.
3061  * @param[in, out] dev_flow
3062  *   Pointer to the mlx5_flow.
3063  * @param[in] attr
3064  *   Pointer to the flow attributes.
3065  * @param[out] error
3066  *   Pointer to the error structure.
3067  *
3068  * @return
3069  *   0 on success, a negative errno value otherwise and rte_errno is set.
3070  */
3071 static int
3072 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
3073                                 const struct rte_flow_action *action,
3074                                 struct mlx5_flow *dev_flow,
3075                                 const struct rte_flow_attr *attr,
3076                                 struct rte_flow_error *error)
3077 {
3078         const struct rte_flow_action_raw_encap *encap_data;
3079         struct mlx5_flow_dv_encap_decap_resource res;
3080
3081         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
3082         res.size = encap_data->size;
3083         memcpy(res.buf, encap_data->data, res.size);
3084         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
3085                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
3086                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
3087         if (attr->transfer)
3088                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3089         else
3090                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3091                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3092         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
3093                 return rte_flow_error_set(error, EINVAL,
3094                                           RTE_FLOW_ERROR_TYPE_ACTION,
3095                                           NULL, "can't create encap action");
3096         return 0;
3097 }
3098
3099 /**
3100  * Create action push VLAN.
3101  *
3102  * @param[in] dev
3103  *   Pointer to rte_eth_dev structure.
3104  * @param[in] attr
3105  *   Pointer to the flow attributes.
3106  * @param[in] vlan
3107  *   Pointer to the vlan to push to the Ethernet header.
3108  * @param[in, out] dev_flow
3109  *   Pointer to the mlx5_flow.
3110  * @param[out] error
3111  *   Pointer to the error structure.
3112  *
3113  * @return
3114  *   0 on success, a negative errno value otherwise and rte_errno is set.
3115  */
3116 static int
3117 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
3118                                 const struct rte_flow_attr *attr,
3119                                 const struct rte_vlan_hdr *vlan,
3120                                 struct mlx5_flow *dev_flow,
3121                                 struct rte_flow_error *error)
3122 {
3123         struct mlx5_flow_dv_push_vlan_action_resource res;
3124
3125         res.vlan_tag =
3126                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
3127                                  vlan->vlan_tci);
3128         if (attr->transfer)
3129                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
3130         else
3131                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
3132                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
3133         return flow_dv_push_vlan_action_resource_register
3134                                             (dev, &res, dev_flow, error);
3135 }
3136
3137 /**
3138  * Validate the modify-header actions.
3139  *
3140  * @param[in] action_flags
3141  *   Holds the actions detected until now.
3142  * @param[in] action
3143  *   Pointer to the modify action.
3144  * @param[out] error
3145  *   Pointer to error structure.
3146  *
3147  * @return
3148  *   0 on success, a negative errno value otherwise and rte_errno is set.
3149  */
3150 static int
3151 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
3152                                    const struct rte_flow_action *action,
3153                                    struct rte_flow_error *error)
3154 {
3155         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
3156                 return rte_flow_error_set(error, EINVAL,
3157                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3158                                           NULL, "action configuration not set");
3159         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3160                 return rte_flow_error_set(error, EINVAL,
3161                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3162                                           "can't have encap action before"
3163                                           " modify action");
3164         return 0;
3165 }
3166
3167 /**
3168  * Validate the modify-header MAC address actions.
3169  *
3170  * @param[in] action_flags
3171  *   Holds the actions detected until now.
3172  * @param[in] action
3173  *   Pointer to the modify action.
3174  * @param[in] item_flags
3175  *   Holds the items detected.
3176  * @param[out] error
3177  *   Pointer to error structure.
3178  *
3179  * @return
3180  *   0 on success, a negative errno value otherwise and rte_errno is set.
3181  */
3182 static int
3183 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
3184                                    const struct rte_flow_action *action,
3185                                    const uint64_t item_flags,
3186                                    struct rte_flow_error *error)
3187 {
3188         int ret = 0;
3189
3190         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3191         if (!ret) {
3192                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3193                         return rte_flow_error_set(error, EINVAL,
3194                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3195                                                   NULL,
3196                                                   "no L2 item in pattern");
3197         }
3198         return ret;
3199 }
3200
3201 /**
3202  * Validate the modify-header IPv4 address actions.
3203  *
3204  * @param[in] action_flags
3205  *   Holds the actions detected until now.
3206  * @param[in] action
3207  *   Pointer to the modify action.
3208  * @param[in] item_flags
3209  *   Holds the items detected.
3210  * @param[out] error
3211  *   Pointer to error structure.
3212  *
3213  * @return
3214  *   0 on success, a negative errno value otherwise and rte_errno is set.
3215  */
3216 static int
3217 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3218                                     const struct rte_flow_action *action,
3219                                     const uint64_t item_flags,
3220                                     struct rte_flow_error *error)
3221 {
3222         int ret = 0;
3223         uint64_t layer;
3224
3225         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3226         if (!ret) {
3227                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3228                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
3229                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3230                 if (!(item_flags & layer))
3231                         return rte_flow_error_set(error, EINVAL,
3232                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3233                                                   NULL,
3234                                                   "no ipv4 item in pattern");
3235         }
3236         return ret;
3237 }
3238
3239 /**
3240  * Validate the modify-header IPv6 address actions.
3241  *
3242  * @param[in] action_flags
3243  *   Holds the actions detected until now.
3244  * @param[in] action
3245  *   Pointer to the modify action.
3246  * @param[in] item_flags
3247  *   Holds the items detected.
3248  * @param[out] error
3249  *   Pointer to error structure.
3250  *
3251  * @return
3252  *   0 on success, a negative errno value otherwise and rte_errno is set.
3253  */
3254 static int
3255 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3256                                     const struct rte_flow_action *action,
3257                                     const uint64_t item_flags,
3258                                     struct rte_flow_error *error)
3259 {
3260         int ret = 0;
3261         uint64_t layer;
3262
3263         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3264         if (!ret) {
3265                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3266                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
3267                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3268                 if (!(item_flags & layer))
3269                         return rte_flow_error_set(error, EINVAL,
3270                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3271                                                   NULL,
3272                                                   "no ipv6 item in pattern");
3273         }
3274         return ret;
3275 }
3276
3277 /**
3278  * Validate the modify-header TP actions.
3279  *
3280  * @param[in] action_flags
3281  *   Holds the actions detected until now.
3282  * @param[in] action
3283  *   Pointer to the modify action.
3284  * @param[in] item_flags
3285  *   Holds the items detected.
3286  * @param[out] error
3287  *   Pointer to error structure.
3288  *
3289  * @return
3290  *   0 on success, a negative errno value otherwise and rte_errno is set.
3291  */
3292 static int
3293 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3294                                   const struct rte_flow_action *action,
3295                                   const uint64_t item_flags,
3296                                   struct rte_flow_error *error)
3297 {
3298         int ret = 0;
3299         uint64_t layer;
3300
3301         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3302         if (!ret) {
3303                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3304                                  MLX5_FLOW_LAYER_INNER_L4 :
3305                                  MLX5_FLOW_LAYER_OUTER_L4;
3306                 if (!(item_flags & layer))
3307                         return rte_flow_error_set(error, EINVAL,
3308                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3309                                                   NULL, "no transport layer "
3310                                                   "in pattern");
3311         }
3312         return ret;
3313 }
3314
3315 /**
3316  * Validate the modify-header actions of increment/decrement
3317  * TCP Sequence-number.
3318  *
3319  * @param[in] action_flags
3320  *   Holds the actions detected until now.
3321  * @param[in] action
3322  *   Pointer to the modify action.
3323  * @param[in] item_flags
3324  *   Holds the items detected.
3325  * @param[out] error
3326  *   Pointer to error structure.
3327  *
3328  * @return
3329  *   0 on success, a negative errno value otherwise and rte_errno is set.
3330  */
3331 static int
3332 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3333                                        const struct rte_flow_action *action,
3334                                        const uint64_t item_flags,
3335                                        struct rte_flow_error *error)
3336 {
3337         int ret = 0;
3338         uint64_t layer;
3339
3340         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3341         if (!ret) {
3342                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3343                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3344                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3345                 if (!(item_flags & layer))
3346                         return rte_flow_error_set(error, EINVAL,
3347                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3348                                                   NULL, "no TCP item in"
3349                                                   " pattern");
3350                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3351                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3352                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3353                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3354                         return rte_flow_error_set(error, EINVAL,
3355                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3356                                                   NULL,
3357                                                   "cannot decrease and increase"
3358                                                   " TCP sequence number"
3359                                                   " at the same time");
3360         }
3361         return ret;
3362 }
3363
3364 /**
3365  * Validate the modify-header actions of increment/decrement
3366  * TCP Acknowledgment number.
3367  *
3368  * @param[in] action_flags
3369  *   Holds the actions detected until now.
3370  * @param[in] action
3371  *   Pointer to the modify action.
3372  * @param[in] item_flags
3373  *   Holds the items detected.
3374  * @param[out] error
3375  *   Pointer to error structure.
3376  *
3377  * @return
3378  *   0 on success, a negative errno value otherwise and rte_errno is set.
3379  */
3380 static int
3381 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3382                                        const struct rte_flow_action *action,
3383                                        const uint64_t item_flags,
3384                                        struct rte_flow_error *error)
3385 {
3386         int ret = 0;
3387         uint64_t layer;
3388
3389         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3390         if (!ret) {
3391                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3392                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
3393                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
3394                 if (!(item_flags & layer))
3395                         return rte_flow_error_set(error, EINVAL,
3396                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3397                                                   NULL, "no TCP item in"
3398                                                   " pattern");
3399                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3400                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3401                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3402                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3403                         return rte_flow_error_set(error, EINVAL,
3404                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3405                                                   NULL,
3406                                                   "cannot decrease and increase"
3407                                                   " TCP acknowledgment number"
3408                                                   " at the same time");
3409         }
3410         return ret;
3411 }
3412
3413 /**
3414  * Validate the modify-header TTL actions.
3415  *
3416  * @param[in] action_flags
3417  *   Holds the actions detected until now.
3418  * @param[in] action
3419  *   Pointer to the modify action.
3420  * @param[in] item_flags
3421  *   Holds the items detected.
3422  * @param[out] error
3423  *   Pointer to error structure.
3424  *
3425  * @return
3426  *   0 on success, a negative errno value otherwise and rte_errno is set.
3427  */
3428 static int
3429 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3430                                    const struct rte_flow_action *action,
3431                                    const uint64_t item_flags,
3432                                    struct rte_flow_error *error)
3433 {
3434         int ret = 0;
3435         uint64_t layer;
3436
3437         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3438         if (!ret) {
3439                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
3440                                  MLX5_FLOW_LAYER_INNER_L3 :
3441                                  MLX5_FLOW_LAYER_OUTER_L3;
3442                 if (!(item_flags & layer))
3443                         return rte_flow_error_set(error, EINVAL,
3444                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3445                                                   NULL,
3446                                                   "no IP protocol in pattern");
3447         }
3448         return ret;
3449 }
3450
3451 /**
3452  * Validate jump action.
3453  *
3454  * @param[in] action
3455  *   Pointer to the jump action.
3456  * @param[in] action_flags
3457  *   Holds the actions detected until now.
3458  * @param[in] attributes
3459  *   Pointer to flow attributes
3460  * @param[in] external
3461  *   Action belongs to flow rule created by request external to PMD.
3462  * @param[out] error
3463  *   Pointer to error structure.
3464  *
3465  * @return
3466  *   0 on success, a negative errno value otherwise and rte_errno is set.
3467  */
3468 static int
3469 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3470                              uint64_t action_flags,
3471                              const struct rte_flow_attr *attributes,
3472                              bool external, struct rte_flow_error *error)
3473 {
3474         uint32_t target_group, table;
3475         int ret = 0;
3476
3477         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3478                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3479                 return rte_flow_error_set(error, EINVAL,
3480                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3481                                           "can't have 2 fate actions in"
3482                                           " same flow");
3483         if (action_flags & MLX5_FLOW_ACTION_METER)
3484                 return rte_flow_error_set(error, ENOTSUP,
3485                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3486                                           "jump with meter not support");
3487         if (!action->conf)
3488                 return rte_flow_error_set(error, EINVAL,
3489                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3490                                           NULL, "action configuration not set");
3491         target_group =
3492                 ((const struct rte_flow_action_jump *)action->conf)->group;
3493         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3494                                        true, &table, error);
3495         if (ret)
3496                 return ret;
3497         if (attributes->group == target_group)
3498                 return rte_flow_error_set(error, EINVAL,
3499                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3500                                           "target group must be other than"
3501                                           " the current flow group");
3502         return 0;
3503 }
3504
3505 /*
3506  * Validate the port_id action.
3507  *
3508  * @param[in] dev
3509  *   Pointer to rte_eth_dev structure.
3510  * @param[in] action_flags
3511  *   Bit-fields that holds the actions detected until now.
3512  * @param[in] action
3513  *   Port_id RTE action structure.
3514  * @param[in] attr
3515  *   Attributes of flow that includes this action.
3516  * @param[out] error
3517  *   Pointer to error structure.
3518  *
3519  * @return
3520  *   0 on success, a negative errno value otherwise and rte_errno is set.
3521  */
3522 static int
3523 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3524                                 uint64_t action_flags,
3525                                 const struct rte_flow_action *action,
3526                                 const struct rte_flow_attr *attr,
3527                                 struct rte_flow_error *error)
3528 {
3529         const struct rte_flow_action_port_id *port_id;
3530         struct mlx5_priv *act_priv;
3531         struct mlx5_priv *dev_priv;
3532         uint16_t port;
3533
3534         if (!attr->transfer)
3535                 return rte_flow_error_set(error, ENOTSUP,
3536                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3537                                           NULL,
3538                                           "port id action is valid in transfer"
3539                                           " mode only");
3540         if (!action || !action->conf)
3541                 return rte_flow_error_set(error, ENOTSUP,
3542                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3543                                           NULL,
3544                                           "port id action parameters must be"
3545                                           " specified");
3546         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3547                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3548                 return rte_flow_error_set(error, EINVAL,
3549                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3550                                           "can have only one fate actions in"
3551                                           " a flow");
3552         dev_priv = mlx5_dev_to_eswitch_info(dev);
3553         if (!dev_priv)
3554                 return rte_flow_error_set(error, rte_errno,
3555                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3556                                           NULL,
3557                                           "failed to obtain E-Switch info");
3558         port_id = action->conf;
3559         port = port_id->original ? dev->data->port_id : port_id->id;
3560         act_priv = mlx5_port_to_eswitch_info(port, false);
3561         if (!act_priv)
3562                 return rte_flow_error_set
3563                                 (error, rte_errno,
3564                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3565                                  "failed to obtain E-Switch port id for port");
3566         if (act_priv->domain_id != dev_priv->domain_id)
3567                 return rte_flow_error_set
3568                                 (error, EINVAL,
3569                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3570                                  "port does not belong to"
3571                                  " E-Switch being configured");
3572         return 0;
3573 }
3574
3575 /**
3576  * Get the maximum number of modify header actions.
3577  *
3578  * @param dev
3579  *   Pointer to rte_eth_dev structure.
3580  * @param flags
3581  *   Flags bits to check if root level.
3582  *
3583  * @return
3584  *   Max number of modify header actions device can support.
3585  */
3586 static unsigned int
3587 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev, uint64_t flags)
3588 {
3589         /*
3590          * There's no way to directly query the max cap. Although it has to be
3591          * acquried by iterative trial, it is a safe assumption that more
3592          * actions are supported by FW if extensive metadata register is
3593          * supported. (Only in the root table)
3594          */
3595         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
3596                 return MLX5_MAX_MODIFY_NUM;
3597         else
3598                 return mlx5_flow_ext_mreg_supported(dev) ?
3599                                         MLX5_ROOT_TBL_MODIFY_NUM :
3600                                         MLX5_ROOT_TBL_MODIFY_NUM_NO_MREG;
3601 }
3602
3603 /**
3604  * Validate the meter action.
3605  *
3606  * @param[in] dev
3607  *   Pointer to rte_eth_dev structure.
3608  * @param[in] action_flags
3609  *   Bit-fields that holds the actions detected until now.
3610  * @param[in] action
3611  *   Pointer to the meter action.
3612  * @param[in] attr
3613  *   Attributes of flow that includes this action.
3614  * @param[out] error
3615  *   Pointer to error structure.
3616  *
3617  * @return
3618  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3619  */
3620 static int
3621 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3622                                 uint64_t action_flags,
3623                                 const struct rte_flow_action *action,
3624                                 const struct rte_flow_attr *attr,
3625                                 struct rte_flow_error *error)
3626 {
3627         struct mlx5_priv *priv = dev->data->dev_private;
3628         const struct rte_flow_action_meter *am = action->conf;
3629         struct mlx5_flow_meter *fm;
3630
3631         if (!am)
3632                 return rte_flow_error_set(error, EINVAL,
3633                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3634                                           "meter action conf is NULL");
3635
3636         if (action_flags & MLX5_FLOW_ACTION_METER)
3637                 return rte_flow_error_set(error, ENOTSUP,
3638                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3639                                           "meter chaining not support");
3640         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3641                 return rte_flow_error_set(error, ENOTSUP,
3642                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3643                                           "meter with jump not support");
3644         if (!priv->mtr_en)
3645                 return rte_flow_error_set(error, ENOTSUP,
3646                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3647                                           NULL,
3648                                           "meter action not supported");
3649         fm = mlx5_flow_meter_find(priv, am->mtr_id);
3650         if (!fm)
3651                 return rte_flow_error_set(error, EINVAL,
3652                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3653                                           "Meter not found");
3654         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3655               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3656               (!fm->attr.egress && !attr->egress && attr->ingress))))
3657                 return rte_flow_error_set(error, EINVAL,
3658                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3659                                           "Flow attributes are either invalid "
3660                                           "or have a conflict with current "
3661                                           "meter attributes");
3662         return 0;
3663 }
3664
3665 /**
3666  * Validate the modify-header IPv4 DSCP actions.
3667  *
3668  * @param[in] action_flags
3669  *   Holds the actions detected until now.
3670  * @param[in] action
3671  *   Pointer to the modify action.
3672  * @param[in] item_flags
3673  *   Holds the items detected.
3674  * @param[out] error
3675  *   Pointer to error structure.
3676  *
3677  * @return
3678  *   0 on success, a negative errno value otherwise and rte_errno is set.
3679  */
3680 static int
3681 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
3682                                          const struct rte_flow_action *action,
3683                                          const uint64_t item_flags,
3684                                          struct rte_flow_error *error)
3685 {
3686         int ret = 0;
3687
3688         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3689         if (!ret) {
3690                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3691                         return rte_flow_error_set(error, EINVAL,
3692                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3693                                                   NULL,
3694                                                   "no ipv4 item in pattern");
3695         }
3696         return ret;
3697 }
3698
3699 /**
3700  * Validate the modify-header IPv6 DSCP actions.
3701  *
3702  * @param[in] action_flags
3703  *   Holds the actions detected until now.
3704  * @param[in] action
3705  *   Pointer to the modify action.
3706  * @param[in] item_flags
3707  *   Holds the items detected.
3708  * @param[out] error
3709  *   Pointer to error structure.
3710  *
3711  * @return
3712  *   0 on success, a negative errno value otherwise and rte_errno is set.
3713  */
3714 static int
3715 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
3716                                          const struct rte_flow_action *action,
3717                                          const uint64_t item_flags,
3718                                          struct rte_flow_error *error)
3719 {
3720         int ret = 0;
3721
3722         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3723         if (!ret) {
3724                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3725                         return rte_flow_error_set(error, EINVAL,
3726                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3727                                                   NULL,
3728                                                   "no ipv6 item in pattern");
3729         }
3730         return ret;
3731 }
3732
3733 /**
3734  * Find existing modify-header resource or create and register a new one.
3735  *
3736  * @param dev[in, out]
3737  *   Pointer to rte_eth_dev structure.
3738  * @param[in, out] resource
3739  *   Pointer to modify-header resource.
3740  * @parm[in, out] dev_flow
3741  *   Pointer to the dev_flow.
3742  * @param[out] error
3743  *   pointer to error structure.
3744  *
3745  * @return
3746  *   0 on success otherwise -errno and errno is set.
3747  */
3748 static int
3749 flow_dv_modify_hdr_resource_register
3750                         (struct rte_eth_dev *dev,
3751                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3752                          struct mlx5_flow *dev_flow,
3753                          struct rte_flow_error *error)
3754 {
3755         struct mlx5_priv *priv = dev->data->dev_private;
3756         struct mlx5_ibv_shared *sh = priv->sh;
3757         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3758         struct mlx5dv_dr_domain *ns;
3759         uint32_t actions_len;
3760
3761         resource->flags =
3762                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3763         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
3764                                     resource->flags))
3765                 return rte_flow_error_set(error, EOVERFLOW,
3766                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3767                                           "too many modify header items");
3768         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3769                 ns = sh->fdb_domain;
3770         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3771                 ns = sh->tx_domain;
3772         else
3773                 ns = sh->rx_domain;
3774         /* Lookup a matching resource from cache. */
3775         actions_len = resource->actions_num * sizeof(resource->actions[0]);
3776         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3777                 if (resource->ft_type == cache_resource->ft_type &&
3778                     resource->actions_num == cache_resource->actions_num &&
3779                     resource->flags == cache_resource->flags &&
3780                     !memcmp((const void *)resource->actions,
3781                             (const void *)cache_resource->actions,
3782                             actions_len)) {
3783                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3784                                 (void *)cache_resource,
3785                                 rte_atomic32_read(&cache_resource->refcnt));
3786                         rte_atomic32_inc(&cache_resource->refcnt);
3787                         dev_flow->dv.modify_hdr = cache_resource;
3788                         return 0;
3789                 }
3790         }
3791         /* Register new modify-header resource. */
3792         cache_resource = rte_calloc(__func__, 1,
3793                                     sizeof(*cache_resource) + actions_len, 0);
3794         if (!cache_resource)
3795                 return rte_flow_error_set(error, ENOMEM,
3796                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3797                                           "cannot allocate resource memory");
3798         *cache_resource = *resource;
3799         rte_memcpy(cache_resource->actions, resource->actions, actions_len);
3800         cache_resource->verbs_action =
3801                 mlx5_glue->dv_create_flow_action_modify_header
3802                                         (sh->ctx, cache_resource->ft_type, ns,
3803                                          cache_resource->flags, actions_len,
3804                                          (uint64_t *)cache_resource->actions);
3805         if (!cache_resource->verbs_action) {
3806                 rte_free(cache_resource);
3807                 return rte_flow_error_set(error, ENOMEM,
3808                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3809                                           NULL, "cannot create action");
3810         }
3811         rte_atomic32_init(&cache_resource->refcnt);
3812         rte_atomic32_inc(&cache_resource->refcnt);
3813         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3814         dev_flow->dv.modify_hdr = cache_resource;
3815         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3816                 (void *)cache_resource,
3817                 rte_atomic32_read(&cache_resource->refcnt));
3818         return 0;
3819 }
3820
3821 #define MLX5_CNT_CONTAINER_RESIZE 64
3822
3823 /**
3824  * Get or create a flow counter.
3825  *
3826  * @param[in] dev
3827  *   Pointer to the Ethernet device structure.
3828  * @param[in] shared
3829  *   Indicate if this counter is shared with other flows.
3830  * @param[in] id
3831  *   Counter identifier.
3832  *
3833  * @return
3834  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3835  */
3836 static struct mlx5_flow_counter *
3837 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3838                                uint32_t id)
3839 {
3840         struct mlx5_priv *priv = dev->data->dev_private;
3841         struct mlx5_flow_counter *cnt = NULL;
3842         struct mlx5_devx_obj *dcs = NULL;
3843
3844         if (!priv->config.devx) {
3845                 rte_errno = ENOTSUP;
3846                 return NULL;
3847         }
3848         if (shared) {
3849                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3850                         if (cnt->shared && cnt->id == id) {
3851                                 cnt->ref_cnt++;
3852                                 return cnt;
3853                         }
3854                 }
3855         }
3856         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3857         if (!dcs)
3858                 return NULL;
3859         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3860         if (!cnt) {
3861                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3862                 rte_errno = ENOMEM;
3863                 return NULL;
3864         }
3865         struct mlx5_flow_counter tmpl = {
3866                 .shared = shared,
3867                 .ref_cnt = 1,
3868                 .id = id,
3869                 .dcs = dcs,
3870         };
3871         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3872         if (!tmpl.action) {
3873                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3874                 rte_errno = errno;
3875                 rte_free(cnt);
3876                 return NULL;
3877         }
3878         *cnt = tmpl;
3879         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3880         return cnt;
3881 }
3882
3883 /**
3884  * Release a flow counter.
3885  *
3886  * @param[in] dev
3887  *   Pointer to the Ethernet device structure.
3888  * @param[in] counter
3889  *   Pointer to the counter handler.
3890  */
3891 static void
3892 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3893                                  struct mlx5_flow_counter *counter)
3894 {
3895         struct mlx5_priv *priv = dev->data->dev_private;
3896
3897         if (!counter)
3898                 return;
3899         if (--counter->ref_cnt == 0) {
3900                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3901                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3902                 rte_free(counter);
3903         }
3904 }
3905
3906 /**
3907  * Query a devx flow counter.
3908  *
3909  * @param[in] dev
3910  *   Pointer to the Ethernet device structure.
3911  * @param[in] cnt
3912  *   Pointer to the flow counter.
3913  * @param[out] pkts
3914  *   The statistics value of packets.
3915  * @param[out] bytes
3916  *   The statistics value of bytes.
3917  *
3918  * @return
3919  *   0 on success, otherwise a negative errno value and rte_errno is set.
3920  */
3921 static inline int
3922 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3923                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3924                      uint64_t *bytes)
3925 {
3926         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3927                                                 0, NULL, NULL, 0);
3928 }
3929
3930 /**
3931  * Get a pool by a counter.
3932  *
3933  * @param[in] cnt
3934  *   Pointer to the counter.
3935  *
3936  * @return
3937  *   The counter pool.
3938  */
3939 static struct mlx5_flow_counter_pool *
3940 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3941 {
3942         if (!cnt->batch) {
3943                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3944                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3945         }
3946         return cnt->pool;
3947 }
3948
3949 /**
3950  * Get a pool by devx counter ID.
3951  *
3952  * @param[in] cont
3953  *   Pointer to the counter container.
3954  * @param[in] id
3955  *   The counter devx ID.
3956  *
3957  * @return
3958  *   The counter pool pointer if exists, NULL otherwise,
3959  */
3960 static struct mlx5_flow_counter_pool *
3961 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3962 {
3963         struct mlx5_flow_counter_pool *pool;
3964
3965         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3966                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3967                                 MLX5_COUNTERS_PER_POOL;
3968
3969                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3970                         return pool;
3971         };
3972         return NULL;
3973 }
3974
3975 /**
3976  * Allocate a new memory for the counter values wrapped by all the needed
3977  * management.
3978  *
3979  * @param[in] dev
3980  *   Pointer to the Ethernet device structure.
3981  * @param[in] raws_n
3982  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3983  *
3984  * @return
3985  *   The new memory management pointer on success, otherwise NULL and rte_errno
3986  *   is set.
3987  */
3988 static struct mlx5_counter_stats_mem_mng *
3989 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3990 {
3991         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3992                                         (dev->data->dev_private))->sh;
3993         struct mlx5_devx_mkey_attr mkey_attr;
3994         struct mlx5_counter_stats_mem_mng *mem_mng;
3995         volatile struct flow_counter_stats *raw_data;
3996         int size = (sizeof(struct flow_counter_stats) *
3997                         MLX5_COUNTERS_PER_POOL +
3998                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3999                         sizeof(struct mlx5_counter_stats_mem_mng);
4000         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
4001         int i;
4002
4003         if (!mem) {
4004                 rte_errno = ENOMEM;
4005                 return NULL;
4006         }
4007         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
4008         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
4009         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
4010                                                  IBV_ACCESS_LOCAL_WRITE);
4011         if (!mem_mng->umem) {
4012                 rte_errno = errno;
4013                 rte_free(mem);
4014                 return NULL;
4015         }
4016         mkey_attr.addr = (uintptr_t)mem;
4017         mkey_attr.size = size;
4018         mkey_attr.umem_id = mem_mng->umem->umem_id;
4019         mkey_attr.pd = sh->pdn;
4020         mkey_attr.log_entity_size = 0;
4021         mkey_attr.pg_access = 0;
4022         mkey_attr.klm_array = NULL;
4023         mkey_attr.klm_num = 0;
4024         mkey_attr.relaxed_ordering = 1;
4025         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
4026         if (!mem_mng->dm) {
4027                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
4028                 rte_errno = errno;
4029                 rte_free(mem);
4030                 return NULL;
4031         }
4032         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
4033         raw_data = (volatile struct flow_counter_stats *)mem;
4034         for (i = 0; i < raws_n; ++i) {
4035                 mem_mng->raws[i].mem_mng = mem_mng;
4036                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
4037         }
4038         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
4039         return mem_mng;
4040 }
4041
4042 /**
4043  * Resize a counter container.
4044  *
4045  * @param[in] dev
4046  *   Pointer to the Ethernet device structure.
4047  * @param[in] batch
4048  *   Whether the pool is for counter that was allocated by batch command.
4049  *
4050  * @return
4051  *   The new container pointer on success, otherwise NULL and rte_errno is set.
4052  */
4053 static struct mlx5_pools_container *
4054 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
4055 {
4056         struct mlx5_priv *priv = dev->data->dev_private;
4057         struct mlx5_pools_container *cont =
4058                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
4059         struct mlx5_pools_container *new_cont =
4060                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
4061         struct mlx5_counter_stats_mem_mng *mem_mng;
4062         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
4063         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
4064         int i;
4065
4066         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
4067                 /* The last resize still hasn't detected by the host thread. */
4068                 rte_errno = EAGAIN;
4069                 return NULL;
4070         }
4071         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
4072         if (!new_cont->pools) {
4073                 rte_errno = ENOMEM;
4074                 return NULL;
4075         }
4076         if (cont->n)
4077                 memcpy(new_cont->pools, cont->pools, cont->n *
4078                        sizeof(struct mlx5_flow_counter_pool *));
4079         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
4080                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
4081         if (!mem_mng) {
4082                 rte_free(new_cont->pools);
4083                 return NULL;
4084         }
4085         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
4086                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
4087                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
4088                                  i, next);
4089         new_cont->n = resize;
4090         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
4091         TAILQ_INIT(&new_cont->pool_list);
4092         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
4093         new_cont->init_mem_mng = mem_mng;
4094         rte_cio_wmb();
4095          /* Flip the master container. */
4096         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
4097         return new_cont;
4098 }
4099
4100 /**
4101  * Query a devx flow counter.
4102  *
4103  * @param[in] dev
4104  *   Pointer to the Ethernet device structure.
4105  * @param[in] cnt
4106  *   Pointer to the flow counter.
4107  * @param[out] pkts
4108  *   The statistics value of packets.
4109  * @param[out] bytes
4110  *   The statistics value of bytes.
4111  *
4112  * @return
4113  *   0 on success, otherwise a negative errno value and rte_errno is set.
4114  */
4115 static inline int
4116 _flow_dv_query_count(struct rte_eth_dev *dev,
4117                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
4118                      uint64_t *bytes)
4119 {
4120         struct mlx5_priv *priv = dev->data->dev_private;
4121         struct mlx5_flow_counter_pool *pool =
4122                         flow_dv_counter_pool_get(cnt);
4123         int offset = cnt - &pool->counters_raw[0];
4124
4125         if (priv->counter_fallback)
4126                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
4127
4128         rte_spinlock_lock(&pool->sl);
4129         /*
4130          * The single counters allocation may allocate smaller ID than the
4131          * current allocated in parallel to the host reading.
4132          * In this case the new counter values must be reported as 0.
4133          */
4134         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
4135                 *pkts = 0;
4136                 *bytes = 0;
4137         } else {
4138                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
4139                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
4140         }
4141         rte_spinlock_unlock(&pool->sl);
4142         return 0;
4143 }
4144
4145 /**
4146  * Create and initialize a new counter pool.
4147  *
4148  * @param[in] dev
4149  *   Pointer to the Ethernet device structure.
4150  * @param[out] dcs
4151  *   The devX counter handle.
4152  * @param[in] batch
4153  *   Whether the pool is for counter that was allocated by batch command.
4154  *
4155  * @return
4156  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
4157  */
4158 static struct mlx5_flow_counter_pool *
4159 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
4160                     uint32_t batch)
4161 {
4162         struct mlx5_priv *priv = dev->data->dev_private;
4163         struct mlx5_flow_counter_pool *pool;
4164         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4165                                                                0);
4166         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
4167         uint32_t size;
4168
4169         if (cont->n == n_valid) {
4170                 cont = flow_dv_container_resize(dev, batch);
4171                 if (!cont)
4172                         return NULL;
4173         }
4174         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
4175                         sizeof(struct mlx5_flow_counter);
4176         pool = rte_calloc(__func__, 1, size, 0);
4177         if (!pool) {
4178                 rte_errno = ENOMEM;
4179                 return NULL;
4180         }
4181         pool->min_dcs = dcs;
4182         pool->raw = cont->init_mem_mng->raws + n_valid %
4183                                                      MLX5_CNT_CONTAINER_RESIZE;
4184         pool->raw_hw = NULL;
4185         rte_spinlock_init(&pool->sl);
4186         /*
4187          * The generation of the new allocated counters in this pool is 0, 2 in
4188          * the pool generation makes all the counters valid for allocation.
4189          */
4190         rte_atomic64_set(&pool->query_gen, 0x2);
4191         TAILQ_INIT(&pool->counters);
4192         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4193         cont->pools[n_valid] = pool;
4194         /* Pool initialization must be updated before host thread access. */
4195         rte_cio_wmb();
4196         rte_atomic16_add(&cont->n_valid, 1);
4197         return pool;
4198 }
4199
4200 /**
4201  * Prepare a new counter and/or a new counter pool.
4202  *
4203  * @param[in] dev
4204  *   Pointer to the Ethernet device structure.
4205  * @param[out] cnt_free
4206  *   Where to put the pointer of a new counter.
4207  * @param[in] batch
4208  *   Whether the pool is for counter that was allocated by batch command.
4209  *
4210  * @return
4211  *   The free counter pool pointer and @p cnt_free is set on success,
4212  *   NULL otherwise and rte_errno is set.
4213  */
4214 static struct mlx5_flow_counter_pool *
4215 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
4216                              struct mlx5_flow_counter **cnt_free,
4217                              uint32_t batch)
4218 {
4219         struct mlx5_priv *priv = dev->data->dev_private;
4220         struct mlx5_flow_counter_pool *pool;
4221         struct mlx5_devx_obj *dcs = NULL;
4222         struct mlx5_flow_counter *cnt;
4223         uint32_t i;
4224
4225         if (!batch) {
4226                 /* bulk_bitmap must be 0 for single counter allocation. */
4227                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
4228                 if (!dcs)
4229                         return NULL;
4230                 pool = flow_dv_find_pool_by_id
4231                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
4232                 if (!pool) {
4233                         pool = flow_dv_pool_create(dev, dcs, batch);
4234                         if (!pool) {
4235                                 mlx5_devx_cmd_destroy(dcs);
4236                                 return NULL;
4237                         }
4238                 } else if (dcs->id < pool->min_dcs->id) {
4239                         rte_atomic64_set(&pool->a64_dcs,
4240                                          (int64_t)(uintptr_t)dcs);
4241                 }
4242                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
4243                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4244                 cnt->dcs = dcs;
4245                 *cnt_free = cnt;
4246                 return pool;
4247         }
4248         /* bulk_bitmap is in 128 counters units. */
4249         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
4250                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
4251         if (!dcs) {
4252                 rte_errno = ENODATA;
4253                 return NULL;
4254         }
4255         pool = flow_dv_pool_create(dev, dcs, batch);
4256         if (!pool) {
4257                 mlx5_devx_cmd_destroy(dcs);
4258                 return NULL;
4259         }
4260         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4261                 cnt = &pool->counters_raw[i];
4262                 cnt->pool = pool;
4263                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
4264         }
4265         *cnt_free = &pool->counters_raw[0];
4266         return pool;
4267 }
4268
4269 /**
4270  * Search for existed shared counter.
4271  *
4272  * @param[in] cont
4273  *   Pointer to the relevant counter pool container.
4274  * @param[in] id
4275  *   The shared counter ID to search.
4276  *
4277  * @return
4278  *   NULL if not existed, otherwise pointer to the shared counter.
4279  */
4280 static struct mlx5_flow_counter *
4281 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
4282                               uint32_t id)
4283 {
4284         static struct mlx5_flow_counter *cnt;
4285         struct mlx5_flow_counter_pool *pool;
4286         int i;
4287
4288         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4289                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
4290                         cnt = &pool->counters_raw[i];
4291                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
4292                                 return cnt;
4293                 }
4294         }
4295         return NULL;
4296 }
4297
4298 /**
4299  * Allocate a flow counter.
4300  *
4301  * @param[in] dev
4302  *   Pointer to the Ethernet device structure.
4303  * @param[in] shared
4304  *   Indicate if this counter is shared with other flows.
4305  * @param[in] id
4306  *   Counter identifier.
4307  * @param[in] group
4308  *   Counter flow group.
4309  *
4310  * @return
4311  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4312  */
4313 static struct mlx5_flow_counter *
4314 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4315                       uint16_t group)
4316 {
4317         struct mlx5_priv *priv = dev->data->dev_private;
4318         struct mlx5_flow_counter_pool *pool = NULL;
4319         struct mlx5_flow_counter *cnt_free = NULL;
4320         /*
4321          * Currently group 0 flow counter cannot be assigned to a flow if it is
4322          * not the first one in the batch counter allocation, so it is better
4323          * to allocate counters one by one for these flows in a separate
4324          * container.
4325          * A counter can be shared between different groups so need to take
4326          * shared counters from the single container.
4327          */
4328         uint32_t batch = (group && !shared) ? 1 : 0;
4329         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4330                                                                0);
4331
4332         if (priv->counter_fallback)
4333                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4334         if (!priv->config.devx) {
4335                 rte_errno = ENOTSUP;
4336                 return NULL;
4337         }
4338         if (shared) {
4339                 cnt_free = flow_dv_counter_shared_search(cont, id);
4340                 if (cnt_free) {
4341                         if (cnt_free->ref_cnt + 1 == 0) {
4342                                 rte_errno = E2BIG;
4343                                 return NULL;
4344                         }
4345                         cnt_free->ref_cnt++;
4346                         return cnt_free;
4347                 }
4348         }
4349         /* Pools which has a free counters are in the start. */
4350         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4351                 /*
4352                  * The free counter reset values must be updated between the
4353                  * counter release to the counter allocation, so, at least one
4354                  * query must be done in this time. ensure it by saving the
4355                  * query generation in the release time.
4356                  * The free list is sorted according to the generation - so if
4357                  * the first one is not updated, all the others are not
4358                  * updated too.
4359                  */
4360                 cnt_free = TAILQ_FIRST(&pool->counters);
4361                 if (cnt_free && cnt_free->query_gen + 1 <
4362                     rte_atomic64_read(&pool->query_gen))
4363                         break;
4364                 cnt_free = NULL;
4365         }
4366         if (!cnt_free) {
4367                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4368                 if (!pool)
4369                         return NULL;
4370         }
4371         cnt_free->batch = batch;
4372         /* Create a DV counter action only in the first time usage. */
4373         if (!cnt_free->action) {
4374                 uint16_t offset;
4375                 struct mlx5_devx_obj *dcs;
4376
4377                 if (batch) {
4378                         offset = cnt_free - &pool->counters_raw[0];
4379                         dcs = pool->min_dcs;
4380                 } else {
4381                         offset = 0;
4382                         dcs = cnt_free->dcs;
4383                 }
4384                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4385                                         (dcs->obj, offset);
4386                 if (!cnt_free->action) {
4387                         rte_errno = errno;
4388                         return NULL;
4389                 }
4390         }
4391         /* Update the counter reset values. */
4392         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4393                                  &cnt_free->bytes))
4394                 return NULL;
4395         cnt_free->shared = shared;
4396         cnt_free->ref_cnt = 1;
4397         cnt_free->id = id;
4398         if (!priv->sh->cmng.query_thread_on)
4399                 /* Start the asynchronous batch query by the host thread. */
4400                 mlx5_set_query_alarm(priv->sh);
4401         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4402         if (TAILQ_EMPTY(&pool->counters)) {
4403                 /* Move the pool to the end of the container pool list. */
4404                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4405                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4406         }
4407         return cnt_free;
4408 }
4409
4410 /**
4411  * Release a flow counter.
4412  *
4413  * @param[in] dev
4414  *   Pointer to the Ethernet device structure.
4415  * @param[in] counter
4416  *   Pointer to the counter handler.
4417  */
4418 static void
4419 flow_dv_counter_release(struct rte_eth_dev *dev,
4420                         struct mlx5_flow_counter *counter)
4421 {
4422         struct mlx5_priv *priv = dev->data->dev_private;
4423
4424         if (!counter)
4425                 return;
4426         if (priv->counter_fallback) {
4427                 flow_dv_counter_release_fallback(dev, counter);
4428                 return;
4429         }
4430         if (--counter->ref_cnt == 0) {
4431                 struct mlx5_flow_counter_pool *pool =
4432                                 flow_dv_counter_pool_get(counter);
4433
4434                 /* Put the counter in the end - the last updated one. */
4435                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4436                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4437         }
4438 }
4439
4440 /**
4441  * Verify the @p attributes will be correctly understood by the NIC and store
4442  * them in the @p flow if everything is correct.
4443  *
4444  * @param[in] dev
4445  *   Pointer to dev struct.
4446  * @param[in] attributes
4447  *   Pointer to flow attributes
4448  * @param[in] external
4449  *   This flow rule is created by request external to PMD.
4450  * @param[out] error
4451  *   Pointer to error structure.
4452  *
4453  * @return
4454  *   0 on success, a negative errno value otherwise and rte_errno is set.
4455  */
4456 static int
4457 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4458                             const struct rte_flow_attr *attributes,
4459                             bool external __rte_unused,
4460                             struct rte_flow_error *error)
4461 {
4462         struct mlx5_priv *priv = dev->data->dev_private;
4463         uint32_t priority_max = priv->config.flow_prio - 1;
4464
4465 #ifndef HAVE_MLX5DV_DR
4466         if (attributes->group)
4467                 return rte_flow_error_set(error, ENOTSUP,
4468                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4469                                           NULL,
4470                                           "groups are not supported");
4471 #else
4472         uint32_t table;
4473         int ret;
4474
4475         ret = mlx5_flow_group_to_table(attributes, external,
4476                                        attributes->group, !!priv->fdb_def_rule,
4477                                        &table, error);
4478         if (ret)
4479                 return ret;
4480 #endif
4481         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4482             attributes->priority >= priority_max)
4483                 return rte_flow_error_set(error, ENOTSUP,
4484                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4485                                           NULL,
4486                                           "priority out of range");
4487         if (attributes->transfer) {
4488                 if (!priv->config.dv_esw_en)
4489                         return rte_flow_error_set
4490                                 (error, ENOTSUP,
4491                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4492                                  "E-Switch dr is not supported");
4493                 if (!(priv->representor || priv->master))
4494                         return rte_flow_error_set
4495                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4496                                  NULL, "E-Switch configuration can only be"
4497                                  " done by a master or a representor device");
4498                 if (attributes->egress)
4499                         return rte_flow_error_set
4500                                 (error, ENOTSUP,
4501                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4502                                  "egress is not supported");
4503         }
4504         if (!(attributes->egress ^ attributes->ingress))
4505                 return rte_flow_error_set(error, ENOTSUP,
4506                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4507                                           "must specify exactly one of "
4508                                           "ingress or egress");
4509         return 0;
4510 }
4511
4512 /**
4513  * Internal validation function. For validating both actions and items.
4514  *
4515  * @param[in] dev
4516  *   Pointer to the rte_eth_dev structure.
4517  * @param[in] attr
4518  *   Pointer to the flow attributes.
4519  * @param[in] items
4520  *   Pointer to the list of items.
4521  * @param[in] actions
4522  *   Pointer to the list of actions.
4523  * @param[in] external
4524  *   This flow rule is created by request external to PMD.
4525  * @param[out] error
4526  *   Pointer to the error structure.
4527  *
4528  * @return
4529  *   0 on success, a negative errno value otherwise and rte_errno is set.
4530  */
4531 static int
4532 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4533                  const struct rte_flow_item items[],
4534                  const struct rte_flow_action actions[],
4535                  bool external, struct rte_flow_error *error)
4536 {
4537         int ret;
4538         uint64_t action_flags = 0;
4539         uint64_t item_flags = 0;
4540         uint64_t last_item = 0;
4541         uint8_t next_protocol = 0xff;
4542         uint16_t ether_type = 0;
4543         int actions_n = 0;
4544         uint8_t item_ipv6_proto = 0;
4545         const struct rte_flow_item *gre_item = NULL;
4546         const struct rte_flow_action_raw_decap *decap;
4547         const struct rte_flow_action_raw_encap *encap;
4548         const struct rte_flow_action_rss *rss;
4549         const struct rte_flow_item_tcp nic_tcp_mask = {
4550                 .hdr = {
4551                         .tcp_flags = 0xFF,
4552                         .src_port = RTE_BE16(UINT16_MAX),
4553                         .dst_port = RTE_BE16(UINT16_MAX),
4554                 }
4555         };
4556         const struct rte_flow_item_ipv4 nic_ipv4_mask = {
4557                 .hdr = {
4558                         .src_addr = RTE_BE32(0xffffffff),
4559                         .dst_addr = RTE_BE32(0xffffffff),
4560                         .type_of_service = 0xff,
4561                         .next_proto_id = 0xff,
4562                         .time_to_live = 0xff,
4563                 },
4564         };
4565         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
4566                 .hdr = {
4567                         .src_addr =
4568                         "\xff\xff\xff\xff\xff\xff\xff\xff"
4569                         "\xff\xff\xff\xff\xff\xff\xff\xff",
4570                         .dst_addr =
4571                         "\xff\xff\xff\xff\xff\xff\xff\xff"
4572                         "\xff\xff\xff\xff\xff\xff\xff\xff",
4573                         .vtc_flow = RTE_BE32(0xffffffff),
4574                         .proto = 0xff,
4575                         .hop_limits = 0xff,
4576                 },
4577         };
4578         struct mlx5_priv *priv = dev->data->dev_private;
4579         struct mlx5_dev_config *dev_conf = &priv->config;
4580         uint16_t queue_index = 0xFFFF;
4581
4582         if (items == NULL)
4583                 return -1;
4584         ret = flow_dv_validate_attributes(dev, attr, external, error);
4585         if (ret < 0)
4586                 return ret;
4587         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4588                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4589                 int type = items->type;
4590
4591                 switch (type) {
4592                 case RTE_FLOW_ITEM_TYPE_VOID:
4593                         break;
4594                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4595                         ret = flow_dv_validate_item_port_id
4596                                         (dev, items, attr, item_flags, error);
4597                         if (ret < 0)
4598                                 return ret;
4599                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4600                         break;
4601                 case RTE_FLOW_ITEM_TYPE_ETH:
4602                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4603                                                           error);
4604                         if (ret < 0)
4605                                 return ret;
4606                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4607                                              MLX5_FLOW_LAYER_OUTER_L2;
4608                         if (items->mask != NULL && items->spec != NULL) {
4609                                 ether_type =
4610                                         ((const struct rte_flow_item_eth *)
4611                                          items->spec)->type;
4612                                 ether_type &=
4613                                         ((const struct rte_flow_item_eth *)
4614                                          items->mask)->type;
4615                                 ether_type = rte_be_to_cpu_16(ether_type);
4616                         } else {
4617                                 ether_type = 0;
4618                         }
4619                         break;
4620                 case RTE_FLOW_ITEM_TYPE_VLAN:
4621                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4622                                                            dev, error);
4623                         if (ret < 0)
4624                                 return ret;
4625                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4626                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4627                         if (items->mask != NULL && items->spec != NULL) {
4628                                 ether_type =
4629                                         ((const struct rte_flow_item_vlan *)
4630                                          items->spec)->inner_type;
4631                                 ether_type &=
4632                                         ((const struct rte_flow_item_vlan *)
4633                                          items->mask)->inner_type;
4634                                 ether_type = rte_be_to_cpu_16(ether_type);
4635                         } else {
4636                                 ether_type = 0;
4637                         }
4638                         break;
4639                 case RTE_FLOW_ITEM_TYPE_IPV4:
4640                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4641                                                   &item_flags, &tunnel);
4642                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4643                                                            last_item,
4644                                                            ether_type,
4645                                                            &nic_ipv4_mask,
4646                                                            error);
4647                         if (ret < 0)
4648                                 return ret;
4649                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4650                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4651                         if (items->mask != NULL &&
4652                             ((const struct rte_flow_item_ipv4 *)
4653                              items->mask)->hdr.next_proto_id) {
4654                                 next_protocol =
4655                                         ((const struct rte_flow_item_ipv4 *)
4656                                          (items->spec))->hdr.next_proto_id;
4657                                 next_protocol &=
4658                                         ((const struct rte_flow_item_ipv4 *)
4659                                          (items->mask))->hdr.next_proto_id;
4660                         } else {
4661                                 /* Reset for inner layer. */
4662                                 next_protocol = 0xff;
4663                         }
4664                         break;
4665                 case RTE_FLOW_ITEM_TYPE_IPV6:
4666                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4667                                                   &item_flags, &tunnel);
4668                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4669                                                            last_item,
4670                                                            ether_type,
4671                                                            &nic_ipv6_mask,
4672                                                            error);
4673                         if (ret < 0)
4674                                 return ret;
4675                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4676                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4677                         if (items->mask != NULL &&
4678                             ((const struct rte_flow_item_ipv6 *)
4679                              items->mask)->hdr.proto) {
4680                                 item_ipv6_proto =
4681                                         ((const struct rte_flow_item_ipv6 *)
4682                                          items->spec)->hdr.proto;
4683                                 next_protocol =
4684                                         ((const struct rte_flow_item_ipv6 *)
4685                                          items->spec)->hdr.proto;
4686                                 next_protocol &=
4687                                         ((const struct rte_flow_item_ipv6 *)
4688                                          items->mask)->hdr.proto;
4689                         } else {
4690                                 /* Reset for inner layer. */
4691                                 next_protocol = 0xff;
4692                         }
4693                         break;
4694                 case RTE_FLOW_ITEM_TYPE_TCP:
4695                         ret = mlx5_flow_validate_item_tcp
4696                                                 (items, item_flags,
4697                                                  next_protocol,
4698                                                  &nic_tcp_mask,
4699                                                  error);
4700                         if (ret < 0)
4701                                 return ret;
4702                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4703                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4704                         break;
4705                 case RTE_FLOW_ITEM_TYPE_UDP:
4706                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4707                                                           next_protocol,
4708                                                           error);
4709                         if (ret < 0)
4710                                 return ret;
4711                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4712                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4713                         break;
4714                 case RTE_FLOW_ITEM_TYPE_GRE:
4715                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4716                                                           next_protocol, error);
4717                         if (ret < 0)
4718                                 return ret;
4719                         gre_item = items;
4720                         last_item = MLX5_FLOW_LAYER_GRE;
4721                         break;
4722                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4723                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4724                                                             next_protocol,
4725                                                             error);
4726                         if (ret < 0)
4727                                 return ret;
4728                         last_item = MLX5_FLOW_LAYER_NVGRE;
4729                         break;
4730                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4731                         ret = mlx5_flow_validate_item_gre_key
4732                                 (items, item_flags, gre_item, error);
4733                         if (ret < 0)
4734                                 return ret;
4735                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4736                         break;
4737                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4738                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4739                                                             error);
4740                         if (ret < 0)
4741                                 return ret;
4742                         last_item = MLX5_FLOW_LAYER_VXLAN;
4743                         break;
4744                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4745                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4746                                                                 item_flags, dev,
4747                                                                 error);
4748                         if (ret < 0)
4749                                 return ret;
4750                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4751                         break;
4752                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4753                         ret = mlx5_flow_validate_item_geneve(items,
4754                                                              item_flags, dev,
4755                                                              error);
4756                         if (ret < 0)
4757                                 return ret;
4758                         last_item = MLX5_FLOW_LAYER_GENEVE;
4759                         break;
4760                 case RTE_FLOW_ITEM_TYPE_MPLS:
4761                         ret = mlx5_flow_validate_item_mpls(dev, items,
4762                                                            item_flags,
4763                                                            last_item, error);
4764                         if (ret < 0)
4765                                 return ret;
4766                         last_item = MLX5_FLOW_LAYER_MPLS;
4767                         break;
4768
4769                 case RTE_FLOW_ITEM_TYPE_MARK:
4770                         ret = flow_dv_validate_item_mark(dev, items, attr,
4771                                                          error);
4772                         if (ret < 0)
4773                                 return ret;
4774                         last_item = MLX5_FLOW_ITEM_MARK;
4775                         break;
4776                 case RTE_FLOW_ITEM_TYPE_META:
4777                         ret = flow_dv_validate_item_meta(dev, items, attr,
4778                                                          error);
4779                         if (ret < 0)
4780                                 return ret;
4781                         last_item = MLX5_FLOW_ITEM_METADATA;
4782                         break;
4783                 case RTE_FLOW_ITEM_TYPE_ICMP:
4784                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4785                                                            next_protocol,
4786                                                            error);
4787                         if (ret < 0)
4788                                 return ret;
4789                         last_item = MLX5_FLOW_LAYER_ICMP;
4790                         break;
4791                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4792                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4793                                                             next_protocol,
4794                                                             error);
4795                         if (ret < 0)
4796                                 return ret;
4797                         item_ipv6_proto = IPPROTO_ICMPV6;
4798                         last_item = MLX5_FLOW_LAYER_ICMP6;
4799                         break;
4800                 case RTE_FLOW_ITEM_TYPE_TAG:
4801                         ret = flow_dv_validate_item_tag(dev, items,
4802                                                         attr, error);
4803                         if (ret < 0)
4804                                 return ret;
4805                         last_item = MLX5_FLOW_ITEM_TAG;
4806                         break;
4807                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4808                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4809                         break;
4810                 case RTE_FLOW_ITEM_TYPE_GTP:
4811                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
4812                                                         error);
4813                         if (ret < 0)
4814                                 return ret;
4815                         last_item = MLX5_FLOW_LAYER_GTP;
4816                         break;
4817                 default:
4818                         return rte_flow_error_set(error, ENOTSUP,
4819                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4820                                                   NULL, "item not supported");
4821                 }
4822                 item_flags |= last_item;
4823         }
4824         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4825                 int type = actions->type;
4826                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4827                         return rte_flow_error_set(error, ENOTSUP,
4828                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4829                                                   actions, "too many actions");
4830                 switch (type) {
4831                 case RTE_FLOW_ACTION_TYPE_VOID:
4832                         break;
4833                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4834                         ret = flow_dv_validate_action_port_id(dev,
4835                                                               action_flags,
4836                                                               actions,
4837                                                               attr,
4838                                                               error);
4839                         if (ret)
4840                                 return ret;
4841                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4842                         ++actions_n;
4843                         break;
4844                 case RTE_FLOW_ACTION_TYPE_FLAG:
4845                         ret = flow_dv_validate_action_flag(dev, action_flags,
4846                                                            attr, error);
4847                         if (ret < 0)
4848                                 return ret;
4849                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4850                                 /* Count all modify-header actions as one. */
4851                                 if (!(action_flags &
4852                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4853                                         ++actions_n;
4854                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4855                                                 MLX5_FLOW_ACTION_MARK_EXT;
4856                         } else {
4857                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4858                                 ++actions_n;
4859                         }
4860                         break;
4861                 case RTE_FLOW_ACTION_TYPE_MARK:
4862                         ret = flow_dv_validate_action_mark(dev, actions,
4863                                                            action_flags,
4864                                                            attr, error);
4865                         if (ret < 0)
4866                                 return ret;
4867                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4868                                 /* Count all modify-header actions as one. */
4869                                 if (!(action_flags &
4870                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4871                                         ++actions_n;
4872                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4873                                                 MLX5_FLOW_ACTION_MARK_EXT;
4874                         } else {
4875                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4876                                 ++actions_n;
4877                         }
4878                         break;
4879                 case RTE_FLOW_ACTION_TYPE_SET_META:
4880                         ret = flow_dv_validate_action_set_meta(dev, actions,
4881                                                                action_flags,
4882                                                                attr, error);
4883                         if (ret < 0)
4884                                 return ret;
4885                         /* Count all modify-header actions as one action. */
4886                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4887                                 ++actions_n;
4888                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4889                         break;
4890                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4891                         ret = flow_dv_validate_action_set_tag(dev, actions,
4892                                                               action_flags,
4893                                                               attr, error);
4894                         if (ret < 0)
4895                                 return ret;
4896                         /* Count all modify-header actions as one action. */
4897                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4898                                 ++actions_n;
4899                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4900                         break;
4901                 case RTE_FLOW_ACTION_TYPE_DROP:
4902                         ret = mlx5_flow_validate_action_drop(action_flags,
4903                                                              attr, error);
4904                         if (ret < 0)
4905                                 return ret;
4906                         action_flags |= MLX5_FLOW_ACTION_DROP;
4907                         ++actions_n;
4908                         break;
4909                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4910                         ret = mlx5_flow_validate_action_queue(actions,
4911                                                               action_flags, dev,
4912                                                               attr, error);
4913                         if (ret < 0)
4914                                 return ret;
4915                         queue_index = ((const struct rte_flow_action_queue *)
4916                                                         (actions->conf))->index;
4917                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4918                         ++actions_n;
4919                         break;
4920                 case RTE_FLOW_ACTION_TYPE_RSS:
4921                         rss = actions->conf;
4922                         ret = mlx5_flow_validate_action_rss(actions,
4923                                                             action_flags, dev,
4924                                                             attr, item_flags,
4925                                                             error);
4926                         if (ret < 0)
4927                                 return ret;
4928                         if (rss != NULL && rss->queue_num)
4929                                 queue_index = rss->queue[0];
4930                         action_flags |= MLX5_FLOW_ACTION_RSS;
4931                         ++actions_n;
4932                         break;
4933                 case RTE_FLOW_ACTION_TYPE_COUNT:
4934                         ret = flow_dv_validate_action_count(dev, error);
4935                         if (ret < 0)
4936                                 return ret;
4937                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4938                         ++actions_n;
4939                         break;
4940                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4941                         if (flow_dv_validate_action_pop_vlan(dev,
4942                                                              action_flags,
4943                                                              actions,
4944                                                              item_flags, attr,
4945                                                              error))
4946                                 return -rte_errno;
4947                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4948                         ++actions_n;
4949                         break;
4950                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4951                         ret = flow_dv_validate_action_push_vlan(dev,
4952                                                                 action_flags,
4953                                                                 item_flags,
4954                                                                 actions, attr,
4955                                                                 error);
4956                         if (ret < 0)
4957                                 return ret;
4958                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4959                         ++actions_n;
4960                         break;
4961                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4962                         ret = flow_dv_validate_action_set_vlan_pcp
4963                                                 (action_flags, actions, error);
4964                         if (ret < 0)
4965                                 return ret;
4966                         /* Count PCP with push_vlan command. */
4967                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4968                         break;
4969                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4970                         ret = flow_dv_validate_action_set_vlan_vid
4971                                                 (item_flags, action_flags,
4972                                                  actions, error);
4973                         if (ret < 0)
4974                                 return ret;
4975                         /* Count VID with push_vlan command. */
4976                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4977                         break;
4978                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4979                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4980                         ret = flow_dv_validate_action_l2_encap(dev,
4981                                                                action_flags,
4982                                                                actions, attr,
4983                                                                error);
4984                         if (ret < 0)
4985                                 return ret;
4986                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
4987                         ++actions_n;
4988                         break;
4989                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4990                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4991                         ret = flow_dv_validate_action_decap(dev, action_flags,
4992                                                             attr, error);
4993                         if (ret < 0)
4994                                 return ret;
4995                         action_flags |= MLX5_FLOW_ACTION_DECAP;
4996                         ++actions_n;
4997                         break;
4998                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4999                         ret = flow_dv_validate_action_raw_encap_decap
5000                                 (dev, NULL, actions->conf, attr, &action_flags,
5001                                  &actions_n, error);
5002                         if (ret < 0)
5003                                 return ret;
5004                         break;
5005                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5006                         decap = actions->conf;
5007                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5008                                 ;
5009                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5010                                 encap = NULL;
5011                                 actions--;
5012                         } else {
5013                                 encap = actions->conf;
5014                         }
5015                         ret = flow_dv_validate_action_raw_encap_decap
5016                                            (dev,
5017                                             decap ? decap : &empty_decap, encap,
5018                                             attr, &action_flags, &actions_n,
5019                                             error);
5020                         if (ret < 0)
5021                                 return ret;
5022                         break;
5023                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5024                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5025                         ret = flow_dv_validate_action_modify_mac(action_flags,
5026                                                                  actions,
5027                                                                  item_flags,
5028                                                                  error);
5029                         if (ret < 0)
5030                                 return ret;
5031                         /* Count all modify-header actions as one action. */
5032                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5033                                 ++actions_n;
5034                         action_flags |= actions->type ==
5035                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
5036                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
5037                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
5038                         break;
5039
5040                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5041                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5042                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
5043                                                                   actions,
5044                                                                   item_flags,
5045                                                                   error);
5046                         if (ret < 0)
5047                                 return ret;
5048                         /* Count all modify-header actions as one action. */
5049                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5050                                 ++actions_n;
5051                         action_flags |= actions->type ==
5052                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
5053                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
5054                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
5055                         break;
5056                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5057                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5058                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
5059                                                                   actions,
5060                                                                   item_flags,
5061                                                                   error);
5062                         if (ret < 0)
5063                                 return ret;
5064                         if (item_ipv6_proto == IPPROTO_ICMPV6)
5065                                 return rte_flow_error_set(error, ENOTSUP,
5066                                         RTE_FLOW_ERROR_TYPE_ACTION,
5067                                         actions,
5068                                         "Can't change header "
5069                                         "with ICMPv6 proto");
5070                         /* Count all modify-header actions as one action. */
5071                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5072                                 ++actions_n;
5073                         action_flags |= actions->type ==
5074                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
5075                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
5076                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
5077                         break;
5078                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5079                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5080                         ret = flow_dv_validate_action_modify_tp(action_flags,
5081                                                                 actions,
5082                                                                 item_flags,
5083                                                                 error);
5084                         if (ret < 0)
5085                                 return ret;
5086                         /* Count all modify-header actions as one action. */
5087                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5088                                 ++actions_n;
5089                         action_flags |= actions->type ==
5090                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
5091                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
5092                                                 MLX5_FLOW_ACTION_SET_TP_DST;
5093                         break;
5094                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5095                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5096                         ret = flow_dv_validate_action_modify_ttl(action_flags,
5097                                                                  actions,
5098                                                                  item_flags,
5099                                                                  error);
5100                         if (ret < 0)
5101                                 return ret;
5102                         /* Count all modify-header actions as one action. */
5103                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5104                                 ++actions_n;
5105                         action_flags |= actions->type ==
5106                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
5107                                                 MLX5_FLOW_ACTION_SET_TTL :
5108                                                 MLX5_FLOW_ACTION_DEC_TTL;
5109                         break;
5110                 case RTE_FLOW_ACTION_TYPE_JUMP:
5111                         ret = flow_dv_validate_action_jump(actions,
5112                                                            action_flags,
5113                                                            attr, external,
5114                                                            error);
5115                         if (ret)
5116                                 return ret;
5117                         ++actions_n;
5118                         action_flags |= MLX5_FLOW_ACTION_JUMP;
5119                         break;
5120                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5121                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5122                         ret = flow_dv_validate_action_modify_tcp_seq
5123                                                                 (action_flags,
5124                                                                  actions,
5125                                                                  item_flags,
5126                                                                  error);
5127                         if (ret < 0)
5128                                 return ret;
5129                         /* Count all modify-header actions as one action. */
5130                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5131                                 ++actions_n;
5132                         action_flags |= actions->type ==
5133                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
5134                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
5135                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
5136                         break;
5137                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5138                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5139                         ret = flow_dv_validate_action_modify_tcp_ack
5140                                                                 (action_flags,
5141                                                                  actions,
5142                                                                  item_flags,
5143                                                                  error);
5144                         if (ret < 0)
5145                                 return ret;
5146                         /* Count all modify-header actions as one action. */
5147                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5148                                 ++actions_n;
5149                         action_flags |= actions->type ==
5150                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
5151                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
5152                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
5153                         break;
5154                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
5155                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
5156                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
5157                         break;
5158                 case RTE_FLOW_ACTION_TYPE_METER:
5159                         ret = mlx5_flow_validate_action_meter(dev,
5160                                                               action_flags,
5161                                                               actions, attr,
5162                                                               error);
5163                         if (ret < 0)
5164                                 return ret;
5165                         action_flags |= MLX5_FLOW_ACTION_METER;
5166                         ++actions_n;
5167                         break;
5168                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5169                         ret = flow_dv_validate_action_modify_ipv4_dscp
5170                                                          (action_flags,
5171                                                           actions,
5172                                                           item_flags,
5173                                                           error);
5174                         if (ret < 0)
5175                                 return ret;
5176                         /* Count all modify-header actions as one action. */
5177                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5178                                 ++actions_n;
5179                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
5180                         break;
5181                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5182                         ret = flow_dv_validate_action_modify_ipv6_dscp
5183                                                                 (action_flags,
5184                                                                  actions,
5185                                                                  item_flags,
5186                                                                  error);
5187                         if (ret < 0)
5188                                 return ret;
5189                         /* Count all modify-header actions as one action. */
5190                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
5191                                 ++actions_n;
5192                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
5193                         break;
5194                 default:
5195                         return rte_flow_error_set(error, ENOTSUP,
5196                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5197                                                   actions,
5198                                                   "action not supported");
5199                 }
5200         }
5201         /*
5202          * Validate the drop action mutual exclusion with other actions.
5203          * Drop action is mutually-exclusive with any other action, except for
5204          * Count action.
5205          */
5206         if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
5207             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
5208                 return rte_flow_error_set(error, EINVAL,
5209                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5210                                           "Drop action is mutually-exclusive "
5211                                           "with any other action, except for "
5212                                           "Count action");
5213         /* Eswitch has few restrictions on using items and actions */
5214         if (attr->transfer) {
5215                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5216                     action_flags & MLX5_FLOW_ACTION_FLAG)
5217                         return rte_flow_error_set(error, ENOTSUP,
5218                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5219                                                   NULL,
5220                                                   "unsupported action FLAG");
5221                 if (!mlx5_flow_ext_mreg_supported(dev) &&
5222                     action_flags & MLX5_FLOW_ACTION_MARK)
5223                         return rte_flow_error_set(error, ENOTSUP,
5224                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5225                                                   NULL,
5226                                                   "unsupported action MARK");
5227                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
5228                         return rte_flow_error_set(error, ENOTSUP,
5229                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5230                                                   NULL,
5231                                                   "unsupported action QUEUE");
5232                 if (action_flags & MLX5_FLOW_ACTION_RSS)
5233                         return rte_flow_error_set(error, ENOTSUP,
5234                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5235                                                   NULL,
5236                                                   "unsupported action RSS");
5237                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5238                         return rte_flow_error_set(error, EINVAL,
5239                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5240                                                   actions,
5241                                                   "no fate action is found");
5242         } else {
5243                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
5244                         return rte_flow_error_set(error, EINVAL,
5245                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5246                                                   actions,
5247                                                   "no fate action is found");
5248         }
5249         /* Continue validation for Xcap actions.*/
5250         if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) && (queue_index == 0xFFFF ||
5251             mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5252                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5253                     MLX5_FLOW_XCAP_ACTIONS)
5254                         return rte_flow_error_set(error, ENOTSUP,
5255                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5256                                                   NULL, "encap and decap "
5257                                                   "combination aren't supported");
5258                 if (!attr->transfer && attr->ingress && (action_flags &
5259                                                         MLX5_FLOW_ACTION_ENCAP))
5260                         return rte_flow_error_set(error, ENOTSUP,
5261                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5262                                                   NULL, "encap is not supported"
5263                                                   " for ingress traffic");
5264         }
5265         return 0;
5266 }
5267
5268 /**
5269  * Internal preparation function. Allocates the DV flow size,
5270  * this size is constant.
5271  *
5272  * @param[in] attr
5273  *   Pointer to the flow attributes.
5274  * @param[in] items
5275  *   Pointer to the list of items.
5276  * @param[in] actions
5277  *   Pointer to the list of actions.
5278  * @param[out] error
5279  *   Pointer to the error structure.
5280  *
5281  * @return
5282  *   Pointer to mlx5_flow object on success,
5283  *   otherwise NULL and rte_errno is set.
5284  */
5285 static struct mlx5_flow *
5286 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
5287                 const struct rte_flow_item items[] __rte_unused,
5288                 const struct rte_flow_action actions[] __rte_unused,
5289                 struct rte_flow_error *error)
5290 {
5291         size_t size = sizeof(struct mlx5_flow);
5292         struct mlx5_flow *dev_flow;
5293
5294         dev_flow = rte_calloc(__func__, 1, size, 0);
5295         if (!dev_flow) {
5296                 rte_flow_error_set(error, ENOMEM,
5297                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5298                                    "not enough memory to create flow");
5299                 return NULL;
5300         }
5301         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
5302         dev_flow->ingress = attr->ingress;
5303         dev_flow->transfer = attr->transfer;
5304         return dev_flow;
5305 }
5306
5307 #ifdef RTE_LIBRTE_MLX5_DEBUG
5308 /**
5309  * Sanity check for match mask and value. Similar to check_valid_spec() in
5310  * kernel driver. If unmasked bit is present in value, it returns failure.
5311  *
5312  * @param match_mask
5313  *   pointer to match mask buffer.
5314  * @param match_value
5315  *   pointer to match value buffer.
5316  *
5317  * @return
5318  *   0 if valid, -EINVAL otherwise.
5319  */
5320 static int
5321 flow_dv_check_valid_spec(void *match_mask, void *match_value)
5322 {
5323         uint8_t *m = match_mask;
5324         uint8_t *v = match_value;
5325         unsigned int i;
5326
5327         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
5328                 if (v[i] & ~m[i]) {
5329                         DRV_LOG(ERR,
5330                                 "match_value differs from match_criteria"
5331                                 " %p[%u] != %p[%u]",
5332                                 match_value, i, match_mask, i);
5333                         return -EINVAL;
5334                 }
5335         }
5336         return 0;
5337 }
5338 #endif
5339
5340 /**
5341  * Add Ethernet item to matcher and to the value.
5342  *
5343  * @param[in, out] matcher
5344  *   Flow matcher.
5345  * @param[in, out] key
5346  *   Flow matcher value.
5347  * @param[in] item
5348  *   Flow pattern to translate.
5349  * @param[in] inner
5350  *   Item is inner pattern.
5351  */
5352 static void
5353 flow_dv_translate_item_eth(void *matcher, void *key,
5354                            const struct rte_flow_item *item, int inner)
5355 {
5356         const struct rte_flow_item_eth *eth_m = item->mask;
5357         const struct rte_flow_item_eth *eth_v = item->spec;
5358         const struct rte_flow_item_eth nic_mask = {
5359                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5360                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
5361                 .type = RTE_BE16(0xffff),
5362         };
5363         void *headers_m;
5364         void *headers_v;
5365         char *l24_v;
5366         unsigned int i;
5367
5368         if (!eth_v)
5369                 return;
5370         if (!eth_m)
5371                 eth_m = &nic_mask;
5372         if (inner) {
5373                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5374                                          inner_headers);
5375                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5376         } else {
5377                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5378                                          outer_headers);
5379                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5380         }
5381         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
5382                &eth_m->dst, sizeof(eth_m->dst));
5383         /* The value must be in the range of the mask. */
5384         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
5385         for (i = 0; i < sizeof(eth_m->dst); ++i)
5386                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
5387         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
5388                &eth_m->src, sizeof(eth_m->src));
5389         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5390         /* The value must be in the range of the mask. */
5391         for (i = 0; i < sizeof(eth_m->dst); ++i)
5392                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5393         if (eth_v->type) {
5394                 /* When ethertype is present set mask for tagged VLAN. */
5395                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5396                 /* Set value for tagged VLAN if ethertype is 802.1Q. */
5397                 if (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_VLAN) ||
5398                     eth_v->type == RTE_BE16(RTE_ETHER_TYPE_QINQ)) {
5399                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag,
5400                                  1);
5401                         /* Return here to avoid setting match on ethertype. */
5402                         return;
5403                 }
5404         }
5405         /*
5406          * HW supports match on one Ethertype, the Ethertype following the last
5407          * VLAN tag of the packet (see PRM).
5408          * Set match on ethertype only if ETH header is not followed by VLAN.
5409          */
5410         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5411                  rte_be_to_cpu_16(eth_m->type));
5412         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5413         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5414 }
5415
5416 /**
5417  * Add VLAN item to matcher and to the value.
5418  *
5419  * @param[in, out] dev_flow
5420  *   Flow descriptor.
5421  * @param[in, out] matcher
5422  *   Flow matcher.
5423  * @param[in, out] key
5424  *   Flow matcher value.
5425  * @param[in] item
5426  *   Flow pattern to translate.
5427  * @param[in] inner
5428  *   Item is inner pattern.
5429  */
5430 static void
5431 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5432                             void *matcher, void *key,
5433                             const struct rte_flow_item *item,
5434                             int inner)
5435 {
5436         const struct rte_flow_item_vlan *vlan_m = item->mask;
5437         const struct rte_flow_item_vlan *vlan_v = item->spec;
5438         void *headers_m;
5439         void *headers_v;
5440         uint16_t tci_m;
5441         uint16_t tci_v;
5442
5443         if (!vlan_v)
5444                 return;
5445         if (!vlan_m)
5446                 vlan_m = &rte_flow_item_vlan_mask;
5447         if (inner) {
5448                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5449                                          inner_headers);
5450                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5451         } else {
5452                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5453                                          outer_headers);
5454                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5455                 /*
5456                  * This is workaround, masks are not supported,
5457                  * and pre-validated.
5458                  */
5459                 dev_flow->dv.vf_vlan.tag =
5460                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5461         }
5462         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5463         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5464         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5465         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5466         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5467         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5468         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5469         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5470         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5471         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5472         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5473                  rte_be_to_cpu_16(vlan_m->inner_type));
5474         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5475                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5476 }
5477
5478 /**
5479  * Add IPV4 item to matcher and to the value.
5480  *
5481  * @param[in, out] matcher
5482  *   Flow matcher.
5483  * @param[in, out] key
5484  *   Flow matcher value.
5485  * @param[in] item
5486  *   Flow pattern to translate.
5487  * @param[in] item_flags
5488  *   Bit-fields that holds the items detected until now.
5489  * @param[in] inner
5490  *   Item is inner pattern.
5491  * @param[in] group
5492  *   The group to insert the rule.
5493  */
5494 static void
5495 flow_dv_translate_item_ipv4(void *matcher, void *key,
5496                             const struct rte_flow_item *item,
5497                             const uint64_t item_flags,
5498                             int inner, uint32_t group)
5499 {
5500         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5501         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5502         const struct rte_flow_item_ipv4 nic_mask = {
5503                 .hdr = {
5504                         .src_addr = RTE_BE32(0xffffffff),
5505                         .dst_addr = RTE_BE32(0xffffffff),
5506                         .type_of_service = 0xff,
5507                         .next_proto_id = 0xff,
5508                         .time_to_live = 0xff,
5509                 },
5510         };
5511         void *headers_m;
5512         void *headers_v;
5513         char *l24_m;
5514         char *l24_v;
5515         uint8_t tos;
5516
5517         if (inner) {
5518                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5519                                          inner_headers);
5520                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5521         } else {
5522                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5523                                          outer_headers);
5524                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5525         }
5526         if (group == 0)
5527                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5528         else
5529                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5530         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5531         /*
5532          * On outer header (which must contains L2), or inner header with L2,
5533          * set cvlan_tag mask bit to mark this packet as untagged.
5534          * This should be done even if item->spec is empty.
5535          */
5536         if (!inner || item_flags & MLX5_FLOW_LAYER_INNER_L2)
5537                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5538         if (!ipv4_v)
5539                 return;
5540         if (!ipv4_m)
5541                 ipv4_m = &nic_mask;
5542         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5543                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5544         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5545                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5546         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5547         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5548         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5549                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5550         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5551                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5552         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5553         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5554         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5555         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5556                  ipv4_m->hdr.type_of_service);
5557         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5558         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5559                  ipv4_m->hdr.type_of_service >> 2);
5560         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5561         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5562                  ipv4_m->hdr.next_proto_id);
5563         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5564                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5565         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
5566                  ipv4_m->hdr.time_to_live);
5567         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
5568                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
5569 }
5570
5571 /**
5572  * Add IPV6 item to matcher and to the value.
5573  *
5574  * @param[in, out] matcher
5575  *   Flow matcher.
5576  * @param[in, out] key
5577  *   Flow matcher value.
5578  * @param[in] item
5579  *   Flow pattern to translate.
5580  * @param[in] item_flags
5581  *   Bit-fields that holds the items detected until now.
5582  * @param[in] inner
5583  *   Item is inner pattern.
5584  * @param[in] group
5585  *   The group to insert the rule.
5586  */
5587 static void
5588 flow_dv_translate_item_ipv6(void *matcher, void *key,
5589                             const struct rte_flow_item *item,
5590                             const uint64_t item_flags,
5591                             int inner, uint32_t group)
5592 {
5593         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5594         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5595         const struct rte_flow_item_ipv6 nic_mask = {
5596                 .hdr = {
5597                         .src_addr =
5598                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5599                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5600                         .dst_addr =
5601                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5602                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5603                         .vtc_flow = RTE_BE32(0xffffffff),
5604                         .proto = 0xff,
5605                         .hop_limits = 0xff,
5606                 },
5607         };
5608         void *headers_m;
5609         void *headers_v;
5610         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5611         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5612         char *l24_m;
5613         char *l24_v;
5614         uint32_t vtc_m;
5615         uint32_t vtc_v;
5616         int i;
5617         int size;
5618
5619         if (inner) {
5620                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5621                                          inner_headers);
5622                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5623         } else {
5624                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5625                                          outer_headers);
5626                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5627         }
5628         if (group == 0)
5629                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5630         else
5631                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5632         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5633         /*
5634          * On outer header (which must contains L2), or inner header with L2,
5635          * set cvlan_tag mask bit to mark this packet as untagged.
5636          * This should be done even if item->spec is empty.
5637          */
5638         if (!inner || item_flags & MLX5_FLOW_LAYER_INNER_L2)
5639                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5640         if (!ipv6_v)
5641                 return;
5642         if (!ipv6_m)
5643                 ipv6_m = &nic_mask;
5644         size = sizeof(ipv6_m->hdr.dst_addr);
5645         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5646                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5647         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5648                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5649         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5650         for (i = 0; i < size; ++i)
5651                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5652         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5653                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5654         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5655                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5656         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5657         for (i = 0; i < size; ++i)
5658                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5659         /* TOS. */
5660         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5661         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5662         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5663         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5664         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5665         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5666         /* Label. */
5667         if (inner) {
5668                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5669                          vtc_m);
5670                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5671                          vtc_v);
5672         } else {
5673                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5674                          vtc_m);
5675                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5676                          vtc_v);
5677         }
5678         /* Protocol. */
5679         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5680                  ipv6_m->hdr.proto);
5681         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5682                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5683         /* Hop limit. */
5684         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
5685                  ipv6_m->hdr.hop_limits);
5686         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
5687                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
5688 }
5689
5690 /**
5691  * Add TCP item to matcher and to the value.
5692  *
5693  * @param[in, out] matcher
5694  *   Flow matcher.
5695  * @param[in, out] key
5696  *   Flow matcher value.
5697  * @param[in] item
5698  *   Flow pattern to translate.
5699  * @param[in] inner
5700  *   Item is inner pattern.
5701  */
5702 static void
5703 flow_dv_translate_item_tcp(void *matcher, void *key,
5704                            const struct rte_flow_item *item,
5705                            int inner)
5706 {
5707         const struct rte_flow_item_tcp *tcp_m = item->mask;
5708         const struct rte_flow_item_tcp *tcp_v = item->spec;
5709         void *headers_m;
5710         void *headers_v;
5711
5712         if (inner) {
5713                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5714                                          inner_headers);
5715                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5716         } else {
5717                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5718                                          outer_headers);
5719                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5720         }
5721         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5722         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5723         if (!tcp_v)
5724                 return;
5725         if (!tcp_m)
5726                 tcp_m = &rte_flow_item_tcp_mask;
5727         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5728                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5729         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5730                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5731         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5732                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5733         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5734                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5735         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5736                  tcp_m->hdr.tcp_flags);
5737         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5738                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5739 }
5740
5741 /**
5742  * Add UDP item to matcher and to the value.
5743  *
5744  * @param[in, out] matcher
5745  *   Flow matcher.
5746  * @param[in, out] key
5747  *   Flow matcher value.
5748  * @param[in] item
5749  *   Flow pattern to translate.
5750  * @param[in] inner
5751  *   Item is inner pattern.
5752  */
5753 static void
5754 flow_dv_translate_item_udp(void *matcher, void *key,
5755                            const struct rte_flow_item *item,
5756                            int inner)
5757 {
5758         const struct rte_flow_item_udp *udp_m = item->mask;
5759         const struct rte_flow_item_udp *udp_v = item->spec;
5760         void *headers_m;
5761         void *headers_v;
5762
5763         if (inner) {
5764                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5765                                          inner_headers);
5766                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5767         } else {
5768                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5769                                          outer_headers);
5770                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5771         }
5772         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5773         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5774         if (!udp_v)
5775                 return;
5776         if (!udp_m)
5777                 udp_m = &rte_flow_item_udp_mask;
5778         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5779                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5780         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5781                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5782         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5783                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5784         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5785                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5786 }
5787
5788 /**
5789  * Add GRE optional Key item to matcher and to the value.
5790  *
5791  * @param[in, out] matcher
5792  *   Flow matcher.
5793  * @param[in, out] key
5794  *   Flow matcher value.
5795  * @param[in] item
5796  *   Flow pattern to translate.
5797  * @param[in] inner
5798  *   Item is inner pattern.
5799  */
5800 static void
5801 flow_dv_translate_item_gre_key(void *matcher, void *key,
5802                                    const struct rte_flow_item *item)
5803 {
5804         const rte_be32_t *key_m = item->mask;
5805         const rte_be32_t *key_v = item->spec;
5806         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5807         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5808         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5809
5810         /* GRE K bit must be on and should already be validated */
5811         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5812         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5813         if (!key_v)
5814                 return;
5815         if (!key_m)
5816                 key_m = &gre_key_default_mask;
5817         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5818                  rte_be_to_cpu_32(*key_m) >> 8);
5819         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5820                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5821         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5822                  rte_be_to_cpu_32(*key_m) & 0xFF);
5823         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5824                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5825 }
5826
5827 /**
5828  * Add GRE item to matcher and to the value.
5829  *
5830  * @param[in, out] matcher
5831  *   Flow matcher.
5832  * @param[in, out] key
5833  *   Flow matcher value.
5834  * @param[in] item
5835  *   Flow pattern to translate.
5836  * @param[in] inner
5837  *   Item is inner pattern.
5838  */
5839 static void
5840 flow_dv_translate_item_gre(void *matcher, void *key,
5841                            const struct rte_flow_item *item,
5842                            int inner)
5843 {
5844         const struct rte_flow_item_gre *gre_m = item->mask;
5845         const struct rte_flow_item_gre *gre_v = item->spec;
5846         void *headers_m;
5847         void *headers_v;
5848         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5849         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5850         struct {
5851                 union {
5852                         __extension__
5853                         struct {
5854                                 uint16_t version:3;
5855                                 uint16_t rsvd0:9;
5856                                 uint16_t s_present:1;
5857                                 uint16_t k_present:1;
5858                                 uint16_t rsvd_bit1:1;
5859                                 uint16_t c_present:1;
5860                         };
5861                         uint16_t value;
5862                 };
5863         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5864
5865         if (inner) {
5866                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5867                                          inner_headers);
5868                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5869         } else {
5870                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5871                                          outer_headers);
5872                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5873         }
5874         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5875         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5876         if (!gre_v)
5877                 return;
5878         if (!gre_m)
5879                 gre_m = &rte_flow_item_gre_mask;
5880         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5881                  rte_be_to_cpu_16(gre_m->protocol));
5882         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5883                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5884         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5885         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5886         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5887                  gre_crks_rsvd0_ver_m.c_present);
5888         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5889                  gre_crks_rsvd0_ver_v.c_present &
5890                  gre_crks_rsvd0_ver_m.c_present);
5891         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5892                  gre_crks_rsvd0_ver_m.k_present);
5893         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5894                  gre_crks_rsvd0_ver_v.k_present &
5895                  gre_crks_rsvd0_ver_m.k_present);
5896         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5897                  gre_crks_rsvd0_ver_m.s_present);
5898         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5899                  gre_crks_rsvd0_ver_v.s_present &
5900                  gre_crks_rsvd0_ver_m.s_present);
5901 }
5902
5903 /**
5904  * Add NVGRE item to matcher and to the value.
5905  *
5906  * @param[in, out] matcher
5907  *   Flow matcher.
5908  * @param[in, out] key
5909  *   Flow matcher value.
5910  * @param[in] item
5911  *   Flow pattern to translate.
5912  * @param[in] inner
5913  *   Item is inner pattern.
5914  */
5915 static void
5916 flow_dv_translate_item_nvgre(void *matcher, void *key,
5917                              const struct rte_flow_item *item,
5918                              int inner)
5919 {
5920         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5921         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5922         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5923         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5924         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5925         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5926         char *gre_key_m;
5927         char *gre_key_v;
5928         int size;
5929         int i;
5930
5931         /* For NVGRE, GRE header fields must be set with defined values. */
5932         const struct rte_flow_item_gre gre_spec = {
5933                 .c_rsvd0_ver = RTE_BE16(0x2000),
5934                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5935         };
5936         const struct rte_flow_item_gre gre_mask = {
5937                 .c_rsvd0_ver = RTE_BE16(0xB000),
5938                 .protocol = RTE_BE16(UINT16_MAX),
5939         };
5940         const struct rte_flow_item gre_item = {
5941                 .spec = &gre_spec,
5942                 .mask = &gre_mask,
5943                 .last = NULL,
5944         };
5945         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5946         if (!nvgre_v)
5947                 return;
5948         if (!nvgre_m)
5949                 nvgre_m = &rte_flow_item_nvgre_mask;
5950         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5951         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5952         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5953         memcpy(gre_key_m, tni_flow_id_m, size);
5954         for (i = 0; i < size; ++i)
5955                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5956 }
5957
5958 /**
5959  * Add VXLAN item to matcher and to the value.
5960  *
5961  * @param[in, out] matcher
5962  *   Flow matcher.
5963  * @param[in, out] key
5964  *   Flow matcher value.
5965  * @param[in] item
5966  *   Flow pattern to translate.
5967  * @param[in] inner
5968  *   Item is inner pattern.
5969  */
5970 static void
5971 flow_dv_translate_item_vxlan(void *matcher, void *key,
5972                              const struct rte_flow_item *item,
5973                              int inner)
5974 {
5975         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5976         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5977         void *headers_m;
5978         void *headers_v;
5979         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5980         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5981         char *vni_m;
5982         char *vni_v;
5983         uint16_t dport;
5984         int size;
5985         int i;
5986
5987         if (inner) {
5988                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5989                                          inner_headers);
5990                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5991         } else {
5992                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5993                                          outer_headers);
5994                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5995         }
5996         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5997                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5998         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5999                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6000                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6001         }
6002         if (!vxlan_v)
6003                 return;
6004         if (!vxlan_m)
6005                 vxlan_m = &rte_flow_item_vxlan_mask;
6006         size = sizeof(vxlan_m->vni);
6007         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
6008         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
6009         memcpy(vni_m, vxlan_m->vni, size);
6010         for (i = 0; i < size; ++i)
6011                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
6012 }
6013
6014 /**
6015  * Add VXLAN-GPE item to matcher and to the value.
6016  *
6017  * @param[in, out] matcher
6018  *   Flow matcher.
6019  * @param[in, out] key
6020  *   Flow matcher value.
6021  * @param[in] item
6022  *   Flow pattern to translate.
6023  * @param[in] inner
6024  *   Item is inner pattern.
6025  */
6026
6027 static void
6028 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
6029                                  const struct rte_flow_item *item, int inner)
6030 {
6031         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
6032         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
6033         void *headers_m;
6034         void *headers_v;
6035         void *misc_m =
6036                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
6037         void *misc_v =
6038                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6039         char *vni_m;
6040         char *vni_v;
6041         uint16_t dport;
6042         int size;
6043         int i;
6044         uint8_t flags_m = 0xff;
6045         uint8_t flags_v = 0xc;
6046
6047         if (inner) {
6048                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6049                                          inner_headers);
6050                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6051         } else {
6052                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6053                                          outer_headers);
6054                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6055         }
6056         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
6057                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
6058         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6059                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6060                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6061         }
6062         if (!vxlan_v)
6063                 return;
6064         if (!vxlan_m)
6065                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
6066         size = sizeof(vxlan_m->vni);
6067         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
6068         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
6069         memcpy(vni_m, vxlan_m->vni, size);
6070         for (i = 0; i < size; ++i)
6071                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
6072         if (vxlan_m->flags) {
6073                 flags_m = vxlan_m->flags;
6074                 flags_v = vxlan_v->flags;
6075         }
6076         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
6077         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
6078         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
6079                  vxlan_m->protocol);
6080         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
6081                  vxlan_v->protocol);
6082 }
6083
6084 /**
6085  * Add Geneve item to matcher and to the value.
6086  *
6087  * @param[in, out] matcher
6088  *   Flow matcher.
6089  * @param[in, out] key
6090  *   Flow matcher value.
6091  * @param[in] item
6092  *   Flow pattern to translate.
6093  * @param[in] inner
6094  *   Item is inner pattern.
6095  */
6096
6097 static void
6098 flow_dv_translate_item_geneve(void *matcher, void *key,
6099                               const struct rte_flow_item *item, int inner)
6100 {
6101         const struct rte_flow_item_geneve *geneve_m = item->mask;
6102         const struct rte_flow_item_geneve *geneve_v = item->spec;
6103         void *headers_m;
6104         void *headers_v;
6105         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6106         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6107         uint16_t dport;
6108         uint16_t gbhdr_m;
6109         uint16_t gbhdr_v;
6110         char *vni_m;
6111         char *vni_v;
6112         size_t size, i;
6113
6114         if (inner) {
6115                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6116                                          inner_headers);
6117                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6118         } else {
6119                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6120                                          outer_headers);
6121                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6122         }
6123         dport = MLX5_UDP_PORT_GENEVE;
6124         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6125                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6126                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6127         }
6128         if (!geneve_v)
6129                 return;
6130         if (!geneve_m)
6131                 geneve_m = &rte_flow_item_geneve_mask;
6132         size = sizeof(geneve_m->vni);
6133         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
6134         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
6135         memcpy(vni_m, geneve_m->vni, size);
6136         for (i = 0; i < size; ++i)
6137                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
6138         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
6139                  rte_be_to_cpu_16(geneve_m->protocol));
6140         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
6141                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
6142         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
6143         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
6144         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
6145                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6146         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
6147                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
6148         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
6149                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6150         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
6151                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
6152                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
6153 }
6154
6155 /**
6156  * Add MPLS item to matcher and to the value.
6157  *
6158  * @param[in, out] matcher
6159  *   Flow matcher.
6160  * @param[in, out] key
6161  *   Flow matcher value.
6162  * @param[in] item
6163  *   Flow pattern to translate.
6164  * @param[in] prev_layer
6165  *   The protocol layer indicated in previous item.
6166  * @param[in] inner
6167  *   Item is inner pattern.
6168  */
6169 static void
6170 flow_dv_translate_item_mpls(void *matcher, void *key,
6171                             const struct rte_flow_item *item,
6172                             uint64_t prev_layer,
6173                             int inner)
6174 {
6175         const uint32_t *in_mpls_m = item->mask;
6176         const uint32_t *in_mpls_v = item->spec;
6177         uint32_t *out_mpls_m = 0;
6178         uint32_t *out_mpls_v = 0;
6179         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6180         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6181         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
6182                                      misc_parameters_2);
6183         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6184         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
6185         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6186
6187         switch (prev_layer) {
6188         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6189                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
6190                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
6191                          MLX5_UDP_PORT_MPLS);
6192                 break;
6193         case MLX5_FLOW_LAYER_GRE:
6194                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
6195                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
6196                          RTE_ETHER_TYPE_MPLS);
6197                 break;
6198         default:
6199                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
6200                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
6201                          IPPROTO_MPLS);
6202                 break;
6203         }
6204         if (!in_mpls_v)
6205                 return;
6206         if (!in_mpls_m)
6207                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
6208         switch (prev_layer) {
6209         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
6210                 out_mpls_m =
6211                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6212                                                  outer_first_mpls_over_udp);
6213                 out_mpls_v =
6214                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6215                                                  outer_first_mpls_over_udp);
6216                 break;
6217         case MLX5_FLOW_LAYER_GRE:
6218                 out_mpls_m =
6219                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
6220                                                  outer_first_mpls_over_gre);
6221                 out_mpls_v =
6222                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
6223                                                  outer_first_mpls_over_gre);
6224                 break;
6225         default:
6226                 /* Inner MPLS not over GRE is not supported. */
6227                 if (!inner) {
6228                         out_mpls_m =
6229                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6230                                                          misc2_m,
6231                                                          outer_first_mpls);
6232                         out_mpls_v =
6233                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
6234                                                          misc2_v,
6235                                                          outer_first_mpls);
6236                 }
6237                 break;
6238         }
6239         if (out_mpls_m && out_mpls_v) {
6240                 *out_mpls_m = *in_mpls_m;
6241                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
6242         }
6243 }
6244
6245 /**
6246  * Add metadata register item to matcher
6247  *
6248  * @param[in, out] matcher
6249  *   Flow matcher.
6250  * @param[in, out] key
6251  *   Flow matcher value.
6252  * @param[in] reg_type
6253  *   Type of device metadata register
6254  * @param[in] value
6255  *   Register value
6256  * @param[in] mask
6257  *   Register mask
6258  */
6259 static void
6260 flow_dv_match_meta_reg(void *matcher, void *key,
6261                        enum modify_reg reg_type,
6262                        uint32_t data, uint32_t mask)
6263 {
6264         void *misc2_m =
6265                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
6266         void *misc2_v =
6267                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
6268         uint32_t temp;
6269
6270         data &= mask;
6271         switch (reg_type) {
6272         case REG_A:
6273                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
6274                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
6275                 break;
6276         case REG_B:
6277                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
6278                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
6279                 break;
6280         case REG_C_0:
6281                 /*
6282                  * The metadata register C0 field might be divided into
6283                  * source vport index and META item value, we should set
6284                  * this field according to specified mask, not as whole one.
6285                  */
6286                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
6287                 temp |= mask;
6288                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
6289                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
6290                 temp &= ~mask;
6291                 temp |= data;
6292                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
6293                 break;
6294         case REG_C_1:
6295                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
6296                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
6297                 break;
6298         case REG_C_2:
6299                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
6300                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
6301                 break;
6302         case REG_C_3:
6303                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
6304                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
6305                 break;
6306         case REG_C_4:
6307                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
6308                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
6309                 break;
6310         case REG_C_5:
6311                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
6312                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
6313                 break;
6314         case REG_C_6:
6315                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
6316                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
6317                 break;
6318         case REG_C_7:
6319                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
6320                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
6321                 break;
6322         default:
6323                 MLX5_ASSERT(false);
6324                 break;
6325         }
6326 }
6327
6328 /**
6329  * Add MARK item to matcher
6330  *
6331  * @param[in] dev
6332  *   The device to configure through.
6333  * @param[in, out] matcher
6334  *   Flow matcher.
6335  * @param[in, out] key
6336  *   Flow matcher value.
6337  * @param[in] item
6338  *   Flow pattern to translate.
6339  */
6340 static void
6341 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
6342                             void *matcher, void *key,
6343                             const struct rte_flow_item *item)
6344 {
6345         struct mlx5_priv *priv = dev->data->dev_private;
6346         const struct rte_flow_item_mark *mark;
6347         uint32_t value;
6348         uint32_t mask;
6349
6350         mark = item->mask ? (const void *)item->mask :
6351                             &rte_flow_item_mark_mask;
6352         mask = mark->id & priv->sh->dv_mark_mask;
6353         mark = (const void *)item->spec;
6354         MLX5_ASSERT(mark);
6355         value = mark->id & priv->sh->dv_mark_mask & mask;
6356         if (mask) {
6357                 enum modify_reg reg;
6358
6359                 /* Get the metadata register index for the mark. */
6360                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
6361                 MLX5_ASSERT(reg > 0);
6362                 if (reg == REG_C_0) {
6363                         struct mlx5_priv *priv = dev->data->dev_private;
6364                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6365                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6366
6367                         mask &= msk_c0;
6368                         mask <<= shl_c0;
6369                         value <<= shl_c0;
6370                 }
6371                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6372         }
6373 }
6374
6375 /**
6376  * Add META item to matcher
6377  *
6378  * @param[in] dev
6379  *   The devich to configure through.
6380  * @param[in, out] matcher
6381  *   Flow matcher.
6382  * @param[in, out] key
6383  *   Flow matcher value.
6384  * @param[in] attr
6385  *   Attributes of flow that includes this item.
6386  * @param[in] item
6387  *   Flow pattern to translate.
6388  */
6389 static void
6390 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
6391                             void *matcher, void *key,
6392                             const struct rte_flow_attr *attr,
6393                             const struct rte_flow_item *item)
6394 {
6395         const struct rte_flow_item_meta *meta_m;
6396         const struct rte_flow_item_meta *meta_v;
6397
6398         meta_m = (const void *)item->mask;
6399         if (!meta_m)
6400                 meta_m = &rte_flow_item_meta_mask;
6401         meta_v = (const void *)item->spec;
6402         if (meta_v) {
6403                 int reg;
6404                 uint32_t value = meta_v->data;
6405                 uint32_t mask = meta_m->data;
6406
6407                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
6408                 if (reg < 0)
6409                         return;
6410                 /*
6411                  * In datapath code there is no endianness
6412                  * coversions for perfromance reasons, all
6413                  * pattern conversions are done in rte_flow.
6414                  */
6415                 value = rte_cpu_to_be_32(value);
6416                 mask = rte_cpu_to_be_32(mask);
6417                 if (reg == REG_C_0) {
6418                         struct mlx5_priv *priv = dev->data->dev_private;
6419                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6420                         uint32_t shl_c0 = rte_bsf32(msk_c0);
6421 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
6422                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
6423
6424                         value >>= shr_c0;
6425                         mask >>= shr_c0;
6426 #endif
6427                         value <<= shl_c0;
6428                         mask <<= shl_c0;
6429                         MLX5_ASSERT(msk_c0);
6430                         MLX5_ASSERT(!(~msk_c0 & mask));
6431                 }
6432                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
6433         }
6434 }
6435
6436 /**
6437  * Add vport metadata Reg C0 item to matcher
6438  *
6439  * @param[in, out] matcher
6440  *   Flow matcher.
6441  * @param[in, out] key
6442  *   Flow matcher value.
6443  * @param[in] reg
6444  *   Flow pattern to translate.
6445  */
6446 static void
6447 flow_dv_translate_item_meta_vport(void *matcher, void *key,
6448                                   uint32_t value, uint32_t mask)
6449 {
6450         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
6451 }
6452
6453 /**
6454  * Add tag item to matcher
6455  *
6456  * @param[in] dev
6457  *   The devich to configure through.
6458  * @param[in, out] matcher
6459  *   Flow matcher.
6460  * @param[in, out] key
6461  *   Flow matcher value.
6462  * @param[in] item
6463  *   Flow pattern to translate.
6464  */
6465 static void
6466 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
6467                                 void *matcher, void *key,
6468                                 const struct rte_flow_item *item)
6469 {
6470         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
6471         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
6472         uint32_t mask, value;
6473
6474         MLX5_ASSERT(tag_v);
6475         value = tag_v->data;
6476         mask = tag_m ? tag_m->data : UINT32_MAX;
6477         if (tag_v->id == REG_C_0) {
6478                 struct mlx5_priv *priv = dev->data->dev_private;
6479                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
6480                 uint32_t shl_c0 = rte_bsf32(msk_c0);
6481
6482                 mask &= msk_c0;
6483                 mask <<= shl_c0;
6484                 value <<= shl_c0;
6485         }
6486         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
6487 }
6488
6489 /**
6490  * Add TAG item to matcher
6491  *
6492  * @param[in] dev
6493  *   The devich to configure through.
6494  * @param[in, out] matcher
6495  *   Flow matcher.
6496  * @param[in, out] key
6497  *   Flow matcher value.
6498  * @param[in] item
6499  *   Flow pattern to translate.
6500  */
6501 static void
6502 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
6503                            void *matcher, void *key,
6504                            const struct rte_flow_item *item)
6505 {
6506         const struct rte_flow_item_tag *tag_v = item->spec;
6507         const struct rte_flow_item_tag *tag_m = item->mask;
6508         enum modify_reg reg;
6509
6510         MLX5_ASSERT(tag_v);
6511         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
6512         /* Get the metadata register index for the tag. */
6513         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
6514         MLX5_ASSERT(reg > 0);
6515         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
6516 }
6517
6518 /**
6519  * Add source vport match to the specified matcher.
6520  *
6521  * @param[in, out] matcher
6522  *   Flow matcher.
6523  * @param[in, out] key
6524  *   Flow matcher value.
6525  * @param[in] port
6526  *   Source vport value to match
6527  * @param[in] mask
6528  *   Mask
6529  */
6530 static void
6531 flow_dv_translate_item_source_vport(void *matcher, void *key,
6532                                     int16_t port, uint16_t mask)
6533 {
6534         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6535         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6536
6537         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
6538         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
6539 }
6540
6541 /**
6542  * Translate port-id item to eswitch match on  port-id.
6543  *
6544  * @param[in] dev
6545  *   The devich to configure through.
6546  * @param[in, out] matcher
6547  *   Flow matcher.
6548  * @param[in, out] key
6549  *   Flow matcher value.
6550  * @param[in] item
6551  *   Flow pattern to translate.
6552  *
6553  * @return
6554  *   0 on success, a negative errno value otherwise.
6555  */
6556 static int
6557 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6558                                void *key, const struct rte_flow_item *item)
6559 {
6560         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6561         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6562         struct mlx5_priv *priv;
6563         uint16_t mask, id;
6564
6565         mask = pid_m ? pid_m->id : 0xffff;
6566         id = pid_v ? pid_v->id : dev->data->port_id;
6567         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6568         if (!priv)
6569                 return -rte_errno;
6570         /* Translate to vport field or to metadata, depending on mode. */
6571         if (priv->vport_meta_mask)
6572                 flow_dv_translate_item_meta_vport(matcher, key,
6573                                                   priv->vport_meta_tag,
6574                                                   priv->vport_meta_mask);
6575         else
6576                 flow_dv_translate_item_source_vport(matcher, key,
6577                                                     priv->vport_id, mask);
6578         return 0;
6579 }
6580
6581 /**
6582  * Add ICMP6 item to matcher and to the value.
6583  *
6584  * @param[in, out] matcher
6585  *   Flow matcher.
6586  * @param[in, out] key
6587  *   Flow matcher value.
6588  * @param[in] item
6589  *   Flow pattern to translate.
6590  * @param[in] inner
6591  *   Item is inner pattern.
6592  */
6593 static void
6594 flow_dv_translate_item_icmp6(void *matcher, void *key,
6595                               const struct rte_flow_item *item,
6596                               int inner)
6597 {
6598         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6599         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6600         void *headers_m;
6601         void *headers_v;
6602         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6603                                      misc_parameters_3);
6604         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6605         if (inner) {
6606                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6607                                          inner_headers);
6608                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6609         } else {
6610                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6611                                          outer_headers);
6612                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6613         }
6614         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6615         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6616         if (!icmp6_v)
6617                 return;
6618         if (!icmp6_m)
6619                 icmp6_m = &rte_flow_item_icmp6_mask;
6620         /*
6621          * Force flow only to match the non-fragmented IPv6 ICMPv6 packets.
6622          * If only the protocol is specified, no need to match the frag.
6623          */
6624         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6625         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6626         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6627         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6628                  icmp6_v->type & icmp6_m->type);
6629         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6630         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6631                  icmp6_v->code & icmp6_m->code);
6632 }
6633
6634 /**
6635  * Add ICMP item to matcher and to the value.
6636  *
6637  * @param[in, out] matcher
6638  *   Flow matcher.
6639  * @param[in, out] key
6640  *   Flow matcher value.
6641  * @param[in] item
6642  *   Flow pattern to translate.
6643  * @param[in] inner
6644  *   Item is inner pattern.
6645  */
6646 static void
6647 flow_dv_translate_item_icmp(void *matcher, void *key,
6648                             const struct rte_flow_item *item,
6649                             int inner)
6650 {
6651         const struct rte_flow_item_icmp *icmp_m = item->mask;
6652         const struct rte_flow_item_icmp *icmp_v = item->spec;
6653         void *headers_m;
6654         void *headers_v;
6655         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6656                                      misc_parameters_3);
6657         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6658         if (inner) {
6659                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6660                                          inner_headers);
6661                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6662         } else {
6663                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6664                                          outer_headers);
6665                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6666         }
6667         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6668         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6669         if (!icmp_v)
6670                 return;
6671         if (!icmp_m)
6672                 icmp_m = &rte_flow_item_icmp_mask;
6673         /*
6674          * Force flow only to match the non-fragmented IPv4 ICMP packets.
6675          * If only the protocol is specified, no need to match the frag.
6676          */
6677         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
6678         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0);
6679         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6680                  icmp_m->hdr.icmp_type);
6681         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6682                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6683         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6684                  icmp_m->hdr.icmp_code);
6685         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6686                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6687 }
6688
6689 /**
6690  * Add GTP item to matcher and to the value.
6691  *
6692  * @param[in, out] matcher
6693  *   Flow matcher.
6694  * @param[in, out] key
6695  *   Flow matcher value.
6696  * @param[in] item
6697  *   Flow pattern to translate.
6698  * @param[in] inner
6699  *   Item is inner pattern.
6700  */
6701 static void
6702 flow_dv_translate_item_gtp(void *matcher, void *key,
6703                            const struct rte_flow_item *item, int inner)
6704 {
6705         const struct rte_flow_item_gtp *gtp_m = item->mask;
6706         const struct rte_flow_item_gtp *gtp_v = item->spec;
6707         void *headers_m;
6708         void *headers_v;
6709         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6710                                      misc_parameters_3);
6711         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6712         uint16_t dport = RTE_GTPU_UDP_PORT;
6713
6714         if (inner) {
6715                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6716                                          inner_headers);
6717                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6718         } else {
6719                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6720                                          outer_headers);
6721                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6722         }
6723         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
6724                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
6725                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
6726         }
6727         if (!gtp_v)
6728                 return;
6729         if (!gtp_m)
6730                 gtp_m = &rte_flow_item_gtp_mask;
6731         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
6732         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
6733                  gtp_v->msg_type & gtp_m->msg_type);
6734         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
6735                  rte_be_to_cpu_32(gtp_m->teid));
6736         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
6737                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
6738 }
6739
6740 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6741
6742 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6743         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6744                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6745
6746 /**
6747  * Calculate flow matcher enable bitmap.
6748  *
6749  * @param match_criteria
6750  *   Pointer to flow matcher criteria.
6751  *
6752  * @return
6753  *   Bitmap of enabled fields.
6754  */
6755 static uint8_t
6756 flow_dv_matcher_enable(uint32_t *match_criteria)
6757 {
6758         uint8_t match_criteria_enable;
6759
6760         match_criteria_enable =
6761                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6762                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6763         match_criteria_enable |=
6764                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6765                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6766         match_criteria_enable |=
6767                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6768                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6769         match_criteria_enable |=
6770                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6771                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6772         match_criteria_enable |=
6773                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6774                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6775         return match_criteria_enable;
6776 }
6777
6778
6779 /**
6780  * Get a flow table.
6781  *
6782  * @param[in, out] dev
6783  *   Pointer to rte_eth_dev structure.
6784  * @param[in] table_id
6785  *   Table id to use.
6786  * @param[in] egress
6787  *   Direction of the table.
6788  * @param[in] transfer
6789  *   E-Switch or NIC flow.
6790  * @param[out] error
6791  *   pointer to error structure.
6792  *
6793  * @return
6794  *   Returns tables resource based on the index, NULL in case of failed.
6795  */
6796 static struct mlx5_flow_tbl_resource *
6797 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6798                          uint32_t table_id, uint8_t egress,
6799                          uint8_t transfer,
6800                          struct rte_flow_error *error)
6801 {
6802         struct mlx5_priv *priv = dev->data->dev_private;
6803         struct mlx5_ibv_shared *sh = priv->sh;
6804         struct mlx5_flow_tbl_resource *tbl;
6805         union mlx5_flow_tbl_key table_key = {
6806                 {
6807                         .table_id = table_id,
6808                         .reserved = 0,
6809                         .domain = !!transfer,
6810                         .direction = !!egress,
6811                 }
6812         };
6813         struct mlx5_hlist_entry *pos = mlx5_hlist_lookup(sh->flow_tbls,
6814                                                          table_key.v64);
6815         struct mlx5_flow_tbl_data_entry *tbl_data;
6816         int ret;
6817         void *domain;
6818
6819         if (pos) {
6820                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
6821                                         entry);
6822                 tbl = &tbl_data->tbl;
6823                 rte_atomic32_inc(&tbl->refcnt);
6824                 return tbl;
6825         }
6826         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
6827         if (!tbl_data) {
6828                 rte_flow_error_set(error, ENOMEM,
6829                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6830                                    NULL,
6831                                    "cannot allocate flow table data entry");
6832                 return NULL;
6833         }
6834         tbl = &tbl_data->tbl;
6835         pos = &tbl_data->entry;
6836         if (transfer)
6837                 domain = sh->fdb_domain;
6838         else if (egress)
6839                 domain = sh->tx_domain;
6840         else
6841                 domain = sh->rx_domain;
6842         tbl->obj = mlx5_glue->dr_create_flow_tbl(domain, table_id);
6843         if (!tbl->obj) {
6844                 rte_flow_error_set(error, ENOMEM,
6845                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6846                                    NULL, "cannot create flow table object");
6847                 rte_free(tbl_data);
6848                 return NULL;
6849         }
6850         /*
6851          * No multi-threads now, but still better to initialize the reference
6852          * count before insert it into the hash list.
6853          */
6854         rte_atomic32_init(&tbl->refcnt);
6855         /* Jump action reference count is initialized here. */
6856         rte_atomic32_init(&tbl_data->jump.refcnt);
6857         pos->key = table_key.v64;
6858         ret = mlx5_hlist_insert(sh->flow_tbls, pos);
6859         if (ret < 0) {
6860                 rte_flow_error_set(error, -ret,
6861                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6862                                    "cannot insert flow table data entry");
6863                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6864                 rte_free(tbl_data);
6865         }
6866         rte_atomic32_inc(&tbl->refcnt);
6867         return tbl;
6868 }
6869
6870 /**
6871  * Release a flow table.
6872  *
6873  * @param[in] dev
6874  *   Pointer to rte_eth_dev structure.
6875  * @param[in] tbl
6876  *   Table resource to be released.
6877  *
6878  * @return
6879  *   Returns 0 if table was released, else return 1;
6880  */
6881 static int
6882 flow_dv_tbl_resource_release(struct rte_eth_dev *dev,
6883                              struct mlx5_flow_tbl_resource *tbl)
6884 {
6885         struct mlx5_priv *priv = dev->data->dev_private;
6886         struct mlx5_ibv_shared *sh = priv->sh;
6887         struct mlx5_flow_tbl_data_entry *tbl_data =
6888                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6889
6890         if (!tbl)
6891                 return 0;
6892         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6893                 struct mlx5_hlist_entry *pos = &tbl_data->entry;
6894
6895                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6896                 tbl->obj = NULL;
6897                 /* remove the entry from the hash list and free memory. */
6898                 mlx5_hlist_remove(sh->flow_tbls, pos);
6899                 rte_free(tbl_data);
6900                 return 0;
6901         }
6902         return 1;
6903 }
6904
6905 /**
6906  * Register the flow matcher.
6907  *
6908  * @param[in, out] dev
6909  *   Pointer to rte_eth_dev structure.
6910  * @param[in, out] matcher
6911  *   Pointer to flow matcher.
6912  * @param[in, out] key
6913  *   Pointer to flow table key.
6914  * @parm[in, out] dev_flow
6915  *   Pointer to the dev_flow.
6916  * @param[out] error
6917  *   pointer to error structure.
6918  *
6919  * @return
6920  *   0 on success otherwise -errno and errno is set.
6921  */
6922 static int
6923 flow_dv_matcher_register(struct rte_eth_dev *dev,
6924                          struct mlx5_flow_dv_matcher *matcher,
6925                          union mlx5_flow_tbl_key *key,
6926                          struct mlx5_flow *dev_flow,
6927                          struct rte_flow_error *error)
6928 {
6929         struct mlx5_priv *priv = dev->data->dev_private;
6930         struct mlx5_ibv_shared *sh = priv->sh;
6931         struct mlx5_flow_dv_matcher *cache_matcher;
6932         struct mlx5dv_flow_matcher_attr dv_attr = {
6933                 .type = IBV_FLOW_ATTR_NORMAL,
6934                 .match_mask = (void *)&matcher->mask,
6935         };
6936         struct mlx5_flow_tbl_resource *tbl;
6937         struct mlx5_flow_tbl_data_entry *tbl_data;
6938
6939         tbl = flow_dv_tbl_resource_get(dev, key->table_id, key->direction,
6940                                        key->domain, error);
6941         if (!tbl)
6942                 return -rte_errno;      /* No need to refill the error info */
6943         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
6944         /* Lookup from cache. */
6945         LIST_FOREACH(cache_matcher, &tbl_data->matchers, next) {
6946                 if (matcher->crc == cache_matcher->crc &&
6947                     matcher->priority == cache_matcher->priority &&
6948                     !memcmp((const void *)matcher->mask.buf,
6949                             (const void *)cache_matcher->mask.buf,
6950                             cache_matcher->mask.size)) {
6951                         DRV_LOG(DEBUG,
6952                                 "%s group %u priority %hd use %s "
6953                                 "matcher %p: refcnt %d++",
6954                                 key->domain ? "FDB" : "NIC", key->table_id,
6955                                 cache_matcher->priority,
6956                                 key->direction ? "tx" : "rx",
6957                                 (void *)cache_matcher,
6958                                 rte_atomic32_read(&cache_matcher->refcnt));
6959                         rte_atomic32_inc(&cache_matcher->refcnt);
6960                         dev_flow->dv.matcher = cache_matcher;
6961                         /* old matcher should not make the table ref++. */
6962                         flow_dv_tbl_resource_release(dev, tbl);
6963                         return 0;
6964                 }
6965         }
6966         /* Register new matcher. */
6967         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6968         if (!cache_matcher) {
6969                 flow_dv_tbl_resource_release(dev, tbl);
6970                 return rte_flow_error_set(error, ENOMEM,
6971                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6972                                           "cannot allocate matcher memory");
6973         }
6974         *cache_matcher = *matcher;
6975         dv_attr.match_criteria_enable =
6976                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6977         dv_attr.priority = matcher->priority;
6978         if (key->direction)
6979                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6980         cache_matcher->matcher_object =
6981                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6982         if (!cache_matcher->matcher_object) {
6983                 rte_free(cache_matcher);
6984 #ifdef HAVE_MLX5DV_DR
6985                 flow_dv_tbl_resource_release(dev, tbl);
6986 #endif
6987                 return rte_flow_error_set(error, ENOMEM,
6988                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6989                                           NULL, "cannot create matcher");
6990         }
6991         /* Save the table information */
6992         cache_matcher->tbl = tbl;
6993         rte_atomic32_init(&cache_matcher->refcnt);
6994         /* only matcher ref++, table ref++ already done above in get API. */
6995         rte_atomic32_inc(&cache_matcher->refcnt);
6996         LIST_INSERT_HEAD(&tbl_data->matchers, cache_matcher, next);
6997         dev_flow->dv.matcher = cache_matcher;
6998         DRV_LOG(DEBUG, "%s group %u priority %hd new %s matcher %p: refcnt %d",
6999                 key->domain ? "FDB" : "NIC", key->table_id,
7000                 cache_matcher->priority,
7001                 key->direction ? "tx" : "rx", (void *)cache_matcher,
7002                 rte_atomic32_read(&cache_matcher->refcnt));
7003         return 0;
7004 }
7005
7006 /**
7007  * Find existing tag resource or create and register a new one.
7008  *
7009  * @param dev[in, out]
7010  *   Pointer to rte_eth_dev structure.
7011  * @param[in, out] tag_be24
7012  *   Tag value in big endian then R-shift 8.
7013  * @parm[in, out] dev_flow
7014  *   Pointer to the dev_flow.
7015  * @param[out] error
7016  *   pointer to error structure.
7017  *
7018  * @return
7019  *   0 on success otherwise -errno and errno is set.
7020  */
7021 static int
7022 flow_dv_tag_resource_register
7023                         (struct rte_eth_dev *dev,
7024                          uint32_t tag_be24,
7025                          struct mlx5_flow *dev_flow,
7026                          struct rte_flow_error *error)
7027 {
7028         struct mlx5_priv *priv = dev->data->dev_private;
7029         struct mlx5_ibv_shared *sh = priv->sh;
7030         struct mlx5_flow_dv_tag_resource *cache_resource;
7031         struct mlx5_hlist_entry *entry;
7032
7033         /* Lookup a matching resource from cache. */
7034         entry = mlx5_hlist_lookup(sh->tag_table, (uint64_t)tag_be24);
7035         if (entry) {
7036                 cache_resource = container_of
7037                         (entry, struct mlx5_flow_dv_tag_resource, entry);
7038                 rte_atomic32_inc(&cache_resource->refcnt);
7039                 dev_flow->dv.tag_resource = cache_resource;
7040                 DRV_LOG(DEBUG, "cached tag resource %p: refcnt now %d++",
7041                         (void *)cache_resource,
7042                         rte_atomic32_read(&cache_resource->refcnt));
7043                 return 0;
7044         }
7045         /* Register new resource. */
7046         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
7047         if (!cache_resource)
7048                 return rte_flow_error_set(error, ENOMEM,
7049                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7050                                           "cannot allocate resource memory");
7051         cache_resource->entry.key = (uint64_t)tag_be24;
7052         cache_resource->action = mlx5_glue->dv_create_flow_action_tag(tag_be24);
7053         if (!cache_resource->action) {
7054                 rte_free(cache_resource);
7055                 return rte_flow_error_set(error, ENOMEM,
7056                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7057                                           NULL, "cannot create action");
7058         }
7059         rte_atomic32_init(&cache_resource->refcnt);
7060         rte_atomic32_inc(&cache_resource->refcnt);
7061         if (mlx5_hlist_insert(sh->tag_table, &cache_resource->entry)) {
7062                 mlx5_glue->destroy_flow_action(cache_resource->action);
7063                 rte_free(cache_resource);
7064                 return rte_flow_error_set(error, EEXIST,
7065                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7066                                           NULL, "cannot insert tag");
7067         }
7068         dev_flow->dv.tag_resource = cache_resource;
7069         DRV_LOG(DEBUG, "new tag resource %p: refcnt now %d++",
7070                 (void *)cache_resource,
7071                 rte_atomic32_read(&cache_resource->refcnt));
7072         return 0;
7073 }
7074
7075 /**
7076  * Release the tag.
7077  *
7078  * @param dev
7079  *   Pointer to Ethernet device.
7080  * @param flow
7081  *   Pointer to mlx5_flow.
7082  *
7083  * @return
7084  *   1 while a reference on it exists, 0 when freed.
7085  */
7086 static int
7087 flow_dv_tag_release(struct rte_eth_dev *dev,
7088                     struct mlx5_flow_dv_tag_resource *tag)
7089 {
7090         struct mlx5_priv *priv = dev->data->dev_private;
7091         struct mlx5_ibv_shared *sh = priv->sh;
7092
7093         MLX5_ASSERT(tag);
7094         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
7095                 dev->data->port_id, (void *)tag,
7096                 rte_atomic32_read(&tag->refcnt));
7097         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
7098                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
7099                 mlx5_hlist_remove(sh->tag_table, &tag->entry);
7100                 DRV_LOG(DEBUG, "port %u tag %p: removed",
7101                         dev->data->port_id, (void *)tag);
7102                 rte_free(tag);
7103                 return 0;
7104         }
7105         return 1;
7106 }
7107
7108 /**
7109  * Translate port ID action to vport.
7110  *
7111  * @param[in] dev
7112  *   Pointer to rte_eth_dev structure.
7113  * @param[in] action
7114  *   Pointer to the port ID action.
7115  * @param[out] dst_port_id
7116  *   The target port ID.
7117  * @param[out] error
7118  *   Pointer to the error structure.
7119  *
7120  * @return
7121  *   0 on success, a negative errno value otherwise and rte_errno is set.
7122  */
7123 static int
7124 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
7125                                  const struct rte_flow_action *action,
7126                                  uint32_t *dst_port_id,
7127                                  struct rte_flow_error *error)
7128 {
7129         uint32_t port;
7130         struct mlx5_priv *priv;
7131         const struct rte_flow_action_port_id *conf =
7132                         (const struct rte_flow_action_port_id *)action->conf;
7133
7134         port = conf->original ? dev->data->port_id : conf->id;
7135         priv = mlx5_port_to_eswitch_info(port, false);
7136         if (!priv)
7137                 return rte_flow_error_set(error, -rte_errno,
7138                                           RTE_FLOW_ERROR_TYPE_ACTION,
7139                                           NULL,
7140                                           "No eswitch info was found for port");
7141 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
7142         /*
7143          * This parameter is transferred to
7144          * mlx5dv_dr_action_create_dest_ib_port().
7145          */
7146         *dst_port_id = priv->ibv_port;
7147 #else
7148         /*
7149          * Legacy mode, no LAG configurations is supported.
7150          * This parameter is transferred to
7151          * mlx5dv_dr_action_create_dest_vport().
7152          */
7153         *dst_port_id = priv->vport_id;
7154 #endif
7155         return 0;
7156 }
7157
7158 /**
7159  * Add Tx queue matcher
7160  *
7161  * @param[in] dev
7162  *   Pointer to the dev struct.
7163  * @param[in, out] matcher
7164  *   Flow matcher.
7165  * @param[in, out] key
7166  *   Flow matcher value.
7167  * @param[in] item
7168  *   Flow pattern to translate.
7169  * @param[in] inner
7170  *   Item is inner pattern.
7171  */
7172 static void
7173 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
7174                                 void *matcher, void *key,
7175                                 const struct rte_flow_item *item)
7176 {
7177         const struct mlx5_rte_flow_item_tx_queue *queue_m;
7178         const struct mlx5_rte_flow_item_tx_queue *queue_v;
7179         void *misc_m =
7180                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
7181         void *misc_v =
7182                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
7183         struct mlx5_txq_ctrl *txq;
7184         uint32_t queue;
7185
7186
7187         queue_m = (const void *)item->mask;
7188         if (!queue_m)
7189                 return;
7190         queue_v = (const void *)item->spec;
7191         if (!queue_v)
7192                 return;
7193         txq = mlx5_txq_get(dev, queue_v->queue);
7194         if (!txq)
7195                 return;
7196         queue = txq->obj->sq->id;
7197         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
7198         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
7199                  queue & queue_m->queue);
7200         mlx5_txq_release(dev, queue_v->queue);
7201 }
7202
7203 /**
7204  * Set the hash fields according to the @p flow information.
7205  *
7206  * @param[in] dev_flow
7207  *   Pointer to the mlx5_flow.
7208  */
7209 static void
7210 flow_dv_hashfields_set(struct mlx5_flow *dev_flow)
7211 {
7212         struct rte_flow *flow = dev_flow->flow;
7213         uint64_t items = dev_flow->layers;
7214         int rss_inner = 0;
7215         uint64_t rss_types = rte_eth_rss_hf_refine(flow->rss.types);
7216
7217         dev_flow->hash_fields = 0;
7218 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
7219         if (flow->rss.level >= 2) {
7220                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
7221                 rss_inner = 1;
7222         }
7223 #endif
7224         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
7225             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
7226                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
7227                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7228                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
7229                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7230                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
7231                         else
7232                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
7233                 }
7234         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
7235                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
7236                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
7237                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
7238                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
7239                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
7240                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
7241                         else
7242                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
7243                 }
7244         }
7245         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
7246             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
7247                 if (rss_types & ETH_RSS_UDP) {
7248                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7249                                 dev_flow->hash_fields |=
7250                                                 IBV_RX_HASH_SRC_PORT_UDP;
7251                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7252                                 dev_flow->hash_fields |=
7253                                                 IBV_RX_HASH_DST_PORT_UDP;
7254                         else
7255                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
7256                 }
7257         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
7258                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
7259                 if (rss_types & ETH_RSS_TCP) {
7260                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
7261                                 dev_flow->hash_fields |=
7262                                                 IBV_RX_HASH_SRC_PORT_TCP;
7263                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
7264                                 dev_flow->hash_fields |=
7265                                                 IBV_RX_HASH_DST_PORT_TCP;
7266                         else
7267                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
7268                 }
7269         }
7270 }
7271
7272 /**
7273  * Fill the flow with DV spec, lock free
7274  * (mutex should be acquired by caller).
7275  *
7276  * @param[in] dev
7277  *   Pointer to rte_eth_dev structure.
7278  * @param[in, out] dev_flow
7279  *   Pointer to the sub flow.
7280  * @param[in] attr
7281  *   Pointer to the flow attributes.
7282  * @param[in] items
7283  *   Pointer to the list of items.
7284  * @param[in] actions
7285  *   Pointer to the list of actions.
7286  * @param[out] error
7287  *   Pointer to the error structure.
7288  *
7289  * @return
7290  *   0 on success, a negative errno value otherwise and rte_errno is set.
7291  */
7292 static int
7293 __flow_dv_translate(struct rte_eth_dev *dev,
7294                     struct mlx5_flow *dev_flow,
7295                     const struct rte_flow_attr *attr,
7296                     const struct rte_flow_item items[],
7297                     const struct rte_flow_action actions[],
7298                     struct rte_flow_error *error)
7299 {
7300         struct mlx5_priv *priv = dev->data->dev_private;
7301         struct mlx5_dev_config *dev_conf = &priv->config;
7302         struct rte_flow *flow = dev_flow->flow;
7303         uint64_t item_flags = 0;
7304         uint64_t last_item = 0;
7305         uint64_t action_flags = 0;
7306         uint64_t priority = attr->priority;
7307         struct mlx5_flow_dv_matcher matcher = {
7308                 .mask = {
7309                         .size = sizeof(matcher.mask.buf),
7310                 },
7311         };
7312         int actions_n = 0;
7313         bool actions_end = false;
7314         union {
7315                 struct mlx5_flow_dv_modify_hdr_resource res;
7316                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
7317                             sizeof(struct mlx5_modification_cmd) *
7318                             (MLX5_MAX_MODIFY_NUM + 1)];
7319         } mhdr_dummy;
7320         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
7321         union flow_dv_attr flow_attr = { .attr = 0 };
7322         uint32_t tag_be;
7323         union mlx5_flow_tbl_key tbl_key;
7324         uint32_t modify_action_position = UINT32_MAX;
7325         void *match_mask = matcher.mask.buf;
7326         void *match_value = dev_flow->dv.value.buf;
7327         uint8_t next_protocol = 0xff;
7328         struct rte_vlan_hdr vlan = { 0 };
7329         uint32_t table;
7330         int ret = 0;
7331
7332         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
7333                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
7334         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
7335                                        !!priv->fdb_def_rule, &table, error);
7336         if (ret)
7337                 return ret;
7338         dev_flow->group = table;
7339         if (attr->transfer)
7340                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
7341         if (priority == MLX5_FLOW_PRIO_RSVD)
7342                 priority = dev_conf->flow_prio - 1;
7343         /* number of actions must be set to 0 in case of dirty stack. */
7344         mhdr_res->actions_num = 0;
7345         for (; !actions_end ; actions++) {
7346                 const struct rte_flow_action_queue *queue;
7347                 const struct rte_flow_action_rss *rss;
7348                 const struct rte_flow_action *action = actions;
7349                 const struct rte_flow_action_count *count = action->conf;
7350                 const uint8_t *rss_key;
7351                 const struct rte_flow_action_jump *jump_data;
7352                 const struct rte_flow_action_meter *mtr;
7353                 struct mlx5_flow_tbl_resource *tbl;
7354                 uint32_t port_id = 0;
7355                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
7356                 int action_type = actions->type;
7357                 const struct rte_flow_action *found_action = NULL;
7358
7359                 switch (action_type) {
7360                 case RTE_FLOW_ACTION_TYPE_VOID:
7361                         break;
7362                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7363                         if (flow_dv_translate_action_port_id(dev, action,
7364                                                              &port_id, error))
7365                                 return -rte_errno;
7366                         port_id_resource.port_id = port_id;
7367                         if (flow_dv_port_id_action_resource_register
7368                             (dev, &port_id_resource, dev_flow, error))
7369                                 return -rte_errno;
7370                         dev_flow->dv.actions[actions_n++] =
7371                                 dev_flow->dv.port_id_action->action;
7372                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7373                         break;
7374                 case RTE_FLOW_ACTION_TYPE_FLAG:
7375                         action_flags |= MLX5_FLOW_ACTION_FLAG;
7376                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7377                                 struct rte_flow_action_mark mark = {
7378                                         .id = MLX5_FLOW_MARK_DEFAULT,
7379                                 };
7380
7381                                 if (flow_dv_convert_action_mark(dev, &mark,
7382                                                                 mhdr_res,
7383                                                                 error))
7384                                         return -rte_errno;
7385                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7386                                 break;
7387                         }
7388                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
7389                         if (!dev_flow->dv.tag_resource)
7390                                 if (flow_dv_tag_resource_register
7391                                     (dev, tag_be, dev_flow, error))
7392                                         return -rte_errno;
7393                         dev_flow->dv.actions[actions_n++] =
7394                                 dev_flow->dv.tag_resource->action;
7395                         break;
7396                 case RTE_FLOW_ACTION_TYPE_MARK:
7397                         action_flags |= MLX5_FLOW_ACTION_MARK;
7398                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7399                                 const struct rte_flow_action_mark *mark =
7400                                         (const struct rte_flow_action_mark *)
7401                                                 actions->conf;
7402
7403                                 if (flow_dv_convert_action_mark(dev, mark,
7404                                                                 mhdr_res,
7405                                                                 error))
7406                                         return -rte_errno;
7407                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
7408                                 break;
7409                         }
7410                         /* Fall-through */
7411                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7412                         /* Legacy (non-extensive) MARK action. */
7413                         tag_be = mlx5_flow_mark_set
7414                               (((const struct rte_flow_action_mark *)
7415                                (actions->conf))->id);
7416                         if (!dev_flow->dv.tag_resource)
7417                                 if (flow_dv_tag_resource_register
7418                                     (dev, tag_be, dev_flow, error))
7419                                         return -rte_errno;
7420                         dev_flow->dv.actions[actions_n++] =
7421                                 dev_flow->dv.tag_resource->action;
7422                         break;
7423                 case RTE_FLOW_ACTION_TYPE_SET_META:
7424                         if (flow_dv_convert_action_set_meta
7425                                 (dev, mhdr_res, attr,
7426                                  (const struct rte_flow_action_set_meta *)
7427                                   actions->conf, error))
7428                                 return -rte_errno;
7429                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7430                         break;
7431                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7432                         if (flow_dv_convert_action_set_tag
7433                                 (dev, mhdr_res,
7434                                  (const struct rte_flow_action_set_tag *)
7435                                   actions->conf, error))
7436                                 return -rte_errno;
7437                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7438                         break;
7439                 case RTE_FLOW_ACTION_TYPE_DROP:
7440                         action_flags |= MLX5_FLOW_ACTION_DROP;
7441                         break;
7442                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7443                         MLX5_ASSERT(flow->rss.queue);
7444                         queue = actions->conf;
7445                         flow->rss.queue_num = 1;
7446                         (*flow->rss.queue)[0] = queue->index;
7447                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7448                         break;
7449                 case RTE_FLOW_ACTION_TYPE_RSS:
7450                         MLX5_ASSERT(flow->rss.queue);
7451                         rss = actions->conf;
7452                         if (flow->rss.queue)
7453                                 memcpy((*flow->rss.queue), rss->queue,
7454                                        rss->queue_num * sizeof(uint16_t));
7455                         flow->rss.queue_num = rss->queue_num;
7456                         /* NULL RSS key indicates default RSS key. */
7457                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
7458                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
7459                         /*
7460                          * rss->level and rss.types should be set in advance
7461                          * when expanding items for RSS.
7462                          */
7463                         action_flags |= MLX5_FLOW_ACTION_RSS;
7464                         break;
7465                 case RTE_FLOW_ACTION_TYPE_COUNT:
7466                         if (!dev_conf->devx) {
7467                                 rte_errno = ENOTSUP;
7468                                 goto cnt_err;
7469                         }
7470                         flow->counter = flow_dv_counter_alloc(dev,
7471                                                               count->shared,
7472                                                               count->id,
7473                                                               dev_flow->group);
7474                         if (flow->counter == NULL)
7475                                 goto cnt_err;
7476                         dev_flow->dv.actions[actions_n++] =
7477                                 flow->counter->action;
7478                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7479                         break;
7480 cnt_err:
7481                         if (rte_errno == ENOTSUP)
7482                                 return rte_flow_error_set
7483                                               (error, ENOTSUP,
7484                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7485                                                NULL,
7486                                                "count action not supported");
7487                         else
7488                                 return rte_flow_error_set
7489                                                 (error, rte_errno,
7490                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7491                                                  action,
7492                                                  "cannot create counter"
7493                                                   " object.");
7494                         break;
7495                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7496                         dev_flow->dv.actions[actions_n++] =
7497                                                 priv->sh->pop_vlan_action;
7498                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7499                         break;
7500                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7501                         flow_dev_get_vlan_info_from_items(items, &vlan);
7502                         vlan.eth_proto = rte_be_to_cpu_16
7503                              ((((const struct rte_flow_action_of_push_vlan *)
7504                                                    actions->conf)->ethertype));
7505                         found_action = mlx5_flow_find_action
7506                                         (actions + 1,
7507                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
7508                         if (found_action)
7509                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7510                         found_action = mlx5_flow_find_action
7511                                         (actions + 1,
7512                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
7513                         if (found_action)
7514                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
7515                         if (flow_dv_create_action_push_vlan
7516                                             (dev, attr, &vlan, dev_flow, error))
7517                                 return -rte_errno;
7518                         dev_flow->dv.actions[actions_n++] =
7519                                            dev_flow->dv.push_vlan_res->action;
7520                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7521                         break;
7522                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7523                         /* of_vlan_push action handled this action */
7524                         MLX5_ASSERT(action_flags &
7525                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
7526                         break;
7527                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7528                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7529                                 break;
7530                         flow_dev_get_vlan_info_from_items(items, &vlan);
7531                         mlx5_update_vlan_vid_pcp(actions, &vlan);
7532                         /* If no VLAN push - this is a modify header action */
7533                         if (flow_dv_convert_action_modify_vlan_vid
7534                                                 (mhdr_res, actions, error))
7535                                 return -rte_errno;
7536                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7537                         break;
7538                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7539                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7540                         if (flow_dv_create_action_l2_encap(dev, actions,
7541                                                            dev_flow,
7542                                                            attr->transfer,
7543                                                            error))
7544                                 return -rte_errno;
7545                         dev_flow->dv.actions[actions_n++] =
7546                                 dev_flow->dv.encap_decap->verbs_action;
7547                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7548                         break;
7549                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7550                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7551                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
7552                                                            attr->transfer,
7553                                                            error))
7554                                 return -rte_errno;
7555                         dev_flow->dv.actions[actions_n++] =
7556                                 dev_flow->dv.encap_decap->verbs_action;
7557                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7558                         break;
7559                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7560                         /* Handle encap with preceding decap. */
7561                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
7562                                 if (flow_dv_create_action_raw_encap
7563                                         (dev, actions, dev_flow, attr, error))
7564                                         return -rte_errno;
7565                                 dev_flow->dv.actions[actions_n++] =
7566                                         dev_flow->dv.encap_decap->verbs_action;
7567                         } else {
7568                                 /* Handle encap without preceding decap. */
7569                                 if (flow_dv_create_action_l2_encap
7570                                     (dev, actions, dev_flow, attr->transfer,
7571                                      error))
7572                                         return -rte_errno;
7573                                 dev_flow->dv.actions[actions_n++] =
7574                                         dev_flow->dv.encap_decap->verbs_action;
7575                         }
7576                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7577                         break;
7578                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7579                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
7580                                 ;
7581                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7582                                 if (flow_dv_create_action_l2_decap
7583                                     (dev, dev_flow, attr->transfer, error))
7584                                         return -rte_errno;
7585                                 dev_flow->dv.actions[actions_n++] =
7586                                         dev_flow->dv.encap_decap->verbs_action;
7587                         }
7588                         /* If decap is followed by encap, handle it at encap. */
7589                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7590                         break;
7591                 case RTE_FLOW_ACTION_TYPE_JUMP:
7592                         jump_data = action->conf;
7593                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
7594                                                        jump_data->group,
7595                                                        !!priv->fdb_def_rule,
7596                                                        &table, error);
7597                         if (ret)
7598                                 return ret;
7599                         tbl = flow_dv_tbl_resource_get(dev, table,
7600                                                        attr->egress,
7601                                                        attr->transfer, error);
7602                         if (!tbl)
7603                                 return rte_flow_error_set
7604                                                 (error, errno,
7605                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7606                                                  NULL,
7607                                                  "cannot create jump action.");
7608                         if (flow_dv_jump_tbl_resource_register
7609                             (dev, tbl, dev_flow, error)) {
7610                                 flow_dv_tbl_resource_release(dev, tbl);
7611                                 return rte_flow_error_set
7612                                                 (error, errno,
7613                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7614                                                  NULL,
7615                                                  "cannot create jump action.");
7616                         }
7617                         dev_flow->dv.actions[actions_n++] =
7618                                 dev_flow->dv.jump->action;
7619                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7620                         break;
7621                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7622                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7623                         if (flow_dv_convert_action_modify_mac
7624                                         (mhdr_res, actions, error))
7625                                 return -rte_errno;
7626                         action_flags |= actions->type ==
7627                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7628                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
7629                                         MLX5_FLOW_ACTION_SET_MAC_DST;
7630                         break;
7631                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7632                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7633                         if (flow_dv_convert_action_modify_ipv4
7634                                         (mhdr_res, actions, error))
7635                                 return -rte_errno;
7636                         action_flags |= actions->type ==
7637                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7638                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
7639                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
7640                         break;
7641                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7642                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7643                         if (flow_dv_convert_action_modify_ipv6
7644                                         (mhdr_res, actions, error))
7645                                 return -rte_errno;
7646                         action_flags |= actions->type ==
7647                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7648                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
7649                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
7650                         break;
7651                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7652                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7653                         if (flow_dv_convert_action_modify_tp
7654                                         (mhdr_res, actions, items,
7655                                          &flow_attr, dev_flow, !!(action_flags &
7656                                          MLX5_FLOW_ACTION_DECAP), error))
7657                                 return -rte_errno;
7658                         action_flags |= actions->type ==
7659                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7660                                         MLX5_FLOW_ACTION_SET_TP_SRC :
7661                                         MLX5_FLOW_ACTION_SET_TP_DST;
7662                         break;
7663                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7664                         if (flow_dv_convert_action_modify_dec_ttl
7665                                         (mhdr_res, items, &flow_attr, dev_flow,
7666                                          !!(action_flags &
7667                                          MLX5_FLOW_ACTION_DECAP), error))
7668                                 return -rte_errno;
7669                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
7670                         break;
7671                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7672                         if (flow_dv_convert_action_modify_ttl
7673                                         (mhdr_res, actions, items, &flow_attr,
7674                                          dev_flow, !!(action_flags &
7675                                          MLX5_FLOW_ACTION_DECAP), error))
7676                                 return -rte_errno;
7677                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
7678                         break;
7679                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7680                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7681                         if (flow_dv_convert_action_modify_tcp_seq
7682                                         (mhdr_res, actions, error))
7683                                 return -rte_errno;
7684                         action_flags |= actions->type ==
7685                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7686                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
7687                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7688                         break;
7689
7690                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7691                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7692                         if (flow_dv_convert_action_modify_tcp_ack
7693                                         (mhdr_res, actions, error))
7694                                 return -rte_errno;
7695                         action_flags |= actions->type ==
7696                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7697                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
7698                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
7699                         break;
7700                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7701                         if (flow_dv_convert_action_set_reg
7702                                         (mhdr_res, actions, error))
7703                                 return -rte_errno;
7704                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7705                         break;
7706                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7707                         if (flow_dv_convert_action_copy_mreg
7708                                         (dev, mhdr_res, actions, error))
7709                                 return -rte_errno;
7710                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7711                         break;
7712                 case RTE_FLOW_ACTION_TYPE_METER:
7713                         mtr = actions->conf;
7714                         if (!flow->meter) {
7715                                 flow->meter = mlx5_flow_meter_attach(priv,
7716                                                         mtr->mtr_id, attr,
7717                                                         error);
7718                                 if (!flow->meter)
7719                                         return rte_flow_error_set(error,
7720                                                 rte_errno,
7721                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7722                                                 NULL,
7723                                                 "meter not found "
7724                                                 "or invalid parameters");
7725                         }
7726                         /* Set the meter action. */
7727                         dev_flow->dv.actions[actions_n++] =
7728                                 flow->meter->mfts->meter_action;
7729                         action_flags |= MLX5_FLOW_ACTION_METER;
7730                         break;
7731                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7732                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
7733                                                               actions, error))
7734                                 return -rte_errno;
7735                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7736                         break;
7737                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7738                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
7739                                                               actions, error))
7740                                 return -rte_errno;
7741                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7742                         break;
7743                 case RTE_FLOW_ACTION_TYPE_END:
7744                         actions_end = true;
7745                         if (mhdr_res->actions_num) {
7746                                 /* create modify action if needed. */
7747                                 if (flow_dv_modify_hdr_resource_register
7748                                         (dev, mhdr_res, dev_flow, error))
7749                                         return -rte_errno;
7750                                 dev_flow->dv.actions[modify_action_position] =
7751                                         dev_flow->dv.modify_hdr->verbs_action;
7752                         }
7753                         break;
7754                 default:
7755                         break;
7756                 }
7757                 if (mhdr_res->actions_num &&
7758                     modify_action_position == UINT32_MAX)
7759                         modify_action_position = actions_n++;
7760         }
7761         dev_flow->dv.actions_n = actions_n;
7762         dev_flow->actions = action_flags;
7763         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7764                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7765                 int item_type = items->type;
7766
7767                 switch (item_type) {
7768                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7769                         flow_dv_translate_item_port_id(dev, match_mask,
7770                                                        match_value, items);
7771                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7772                         break;
7773                 case RTE_FLOW_ITEM_TYPE_ETH:
7774                         flow_dv_translate_item_eth(match_mask, match_value,
7775                                                    items, tunnel);
7776                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7777                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7778                                              MLX5_FLOW_LAYER_OUTER_L2;
7779                         break;
7780                 case RTE_FLOW_ITEM_TYPE_VLAN:
7781                         flow_dv_translate_item_vlan(dev_flow,
7782                                                     match_mask, match_value,
7783                                                     items, tunnel);
7784                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7785                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7786                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7787                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7788                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7789                         break;
7790                 case RTE_FLOW_ITEM_TYPE_IPV4:
7791                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7792                                                   &item_flags, &tunnel);
7793                         flow_dv_translate_item_ipv4(match_mask, match_value,
7794                                                     items, item_flags, tunnel,
7795                                                     dev_flow->group);
7796                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7797                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7798                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7799                         if (items->mask != NULL &&
7800                             ((const struct rte_flow_item_ipv4 *)
7801                              items->mask)->hdr.next_proto_id) {
7802                                 next_protocol =
7803                                         ((const struct rte_flow_item_ipv4 *)
7804                                          (items->spec))->hdr.next_proto_id;
7805                                 next_protocol &=
7806                                         ((const struct rte_flow_item_ipv4 *)
7807                                          (items->mask))->hdr.next_proto_id;
7808                         } else {
7809                                 /* Reset for inner layer. */
7810                                 next_protocol = 0xff;
7811                         }
7812                         break;
7813                 case RTE_FLOW_ITEM_TYPE_IPV6:
7814                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7815                                                   &item_flags, &tunnel);
7816                         flow_dv_translate_item_ipv6(match_mask, match_value,
7817                                                     items, item_flags, tunnel,
7818                                                     dev_flow->group);
7819                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7820                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7821                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7822                         if (items->mask != NULL &&
7823                             ((const struct rte_flow_item_ipv6 *)
7824                              items->mask)->hdr.proto) {
7825                                 next_protocol =
7826                                         ((const struct rte_flow_item_ipv6 *)
7827                                          items->spec)->hdr.proto;
7828                                 next_protocol &=
7829                                         ((const struct rte_flow_item_ipv6 *)
7830                                          items->mask)->hdr.proto;
7831                         } else {
7832                                 /* Reset for inner layer. */
7833                                 next_protocol = 0xff;
7834                         }
7835                         break;
7836                 case RTE_FLOW_ITEM_TYPE_TCP:
7837                         flow_dv_translate_item_tcp(match_mask, match_value,
7838                                                    items, tunnel);
7839                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7840                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7841                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7842                         break;
7843                 case RTE_FLOW_ITEM_TYPE_UDP:
7844                         flow_dv_translate_item_udp(match_mask, match_value,
7845                                                    items, tunnel);
7846                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7847                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7848                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7849                         break;
7850                 case RTE_FLOW_ITEM_TYPE_GRE:
7851                         flow_dv_translate_item_gre(match_mask, match_value,
7852                                                    items, tunnel);
7853                         matcher.priority = flow->rss.level >= 2 ?
7854                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7855                         last_item = MLX5_FLOW_LAYER_GRE;
7856                         break;
7857                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7858                         flow_dv_translate_item_gre_key(match_mask,
7859                                                        match_value, items);
7860                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7861                         break;
7862                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7863                         flow_dv_translate_item_nvgre(match_mask, match_value,
7864                                                      items, tunnel);
7865                         matcher.priority = flow->rss.level >= 2 ?
7866                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7867                         last_item = MLX5_FLOW_LAYER_GRE;
7868                         break;
7869                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7870                         flow_dv_translate_item_vxlan(match_mask, match_value,
7871                                                      items, tunnel);
7872                         matcher.priority = flow->rss.level >= 2 ?
7873                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7874                         last_item = MLX5_FLOW_LAYER_VXLAN;
7875                         break;
7876                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7877                         flow_dv_translate_item_vxlan_gpe(match_mask,
7878                                                          match_value, items,
7879                                                          tunnel);
7880                         matcher.priority = flow->rss.level >= 2 ?
7881                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7882                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7883                         break;
7884                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7885                         flow_dv_translate_item_geneve(match_mask, match_value,
7886                                                       items, tunnel);
7887                         matcher.priority = flow->rss.level >= 2 ?
7888                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7889                         last_item = MLX5_FLOW_LAYER_GENEVE;
7890                         break;
7891                 case RTE_FLOW_ITEM_TYPE_MPLS:
7892                         flow_dv_translate_item_mpls(match_mask, match_value,
7893                                                     items, last_item, tunnel);
7894                         matcher.priority = flow->rss.level >= 2 ?
7895                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7896                         last_item = MLX5_FLOW_LAYER_MPLS;
7897                         break;
7898                 case RTE_FLOW_ITEM_TYPE_MARK:
7899                         flow_dv_translate_item_mark(dev, match_mask,
7900                                                     match_value, items);
7901                         last_item = MLX5_FLOW_ITEM_MARK;
7902                         break;
7903                 case RTE_FLOW_ITEM_TYPE_META:
7904                         flow_dv_translate_item_meta(dev, match_mask,
7905                                                     match_value, attr, items);
7906                         last_item = MLX5_FLOW_ITEM_METADATA;
7907                         break;
7908                 case RTE_FLOW_ITEM_TYPE_ICMP:
7909                         flow_dv_translate_item_icmp(match_mask, match_value,
7910                                                     items, tunnel);
7911                         last_item = MLX5_FLOW_LAYER_ICMP;
7912                         break;
7913                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7914                         flow_dv_translate_item_icmp6(match_mask, match_value,
7915                                                       items, tunnel);
7916                         last_item = MLX5_FLOW_LAYER_ICMP6;
7917                         break;
7918                 case RTE_FLOW_ITEM_TYPE_TAG:
7919                         flow_dv_translate_item_tag(dev, match_mask,
7920                                                    match_value, items);
7921                         last_item = MLX5_FLOW_ITEM_TAG;
7922                         break;
7923                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7924                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
7925                                                         match_value, items);
7926                         last_item = MLX5_FLOW_ITEM_TAG;
7927                         break;
7928                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7929                         flow_dv_translate_item_tx_queue(dev, match_mask,
7930                                                         match_value,
7931                                                         items);
7932                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7933                         break;
7934                 case RTE_FLOW_ITEM_TYPE_GTP:
7935                         flow_dv_translate_item_gtp(match_mask, match_value,
7936                                                    items, tunnel);
7937                         matcher.priority = flow->rss.level >= 2 ?
7938                                     MLX5_PRIORITY_MAP_L2 : MLX5_PRIORITY_MAP_L4;
7939                         last_item = MLX5_FLOW_LAYER_GTP;
7940                         break;
7941                 default:
7942                         break;
7943                 }
7944                 item_flags |= last_item;
7945         }
7946         /*
7947          * When E-Switch mode is enabled, we have two cases where we need to
7948          * set the source port manually.
7949          * The first one, is in case of Nic steering rule, and the second is
7950          * E-Switch rule where no port_id item was found. In both cases
7951          * the source port is set according the current port in use.
7952          */
7953         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
7954             (priv->representor || priv->master)) {
7955                 if (flow_dv_translate_item_port_id(dev, match_mask,
7956                                                    match_value, NULL))
7957                         return -rte_errno;
7958         }
7959 #ifdef RTE_LIBRTE_MLX5_DEBUG
7960         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
7961                                               dev_flow->dv.value.buf));
7962 #endif
7963         /*
7964          * Layers may be already initialized from prefix flow if this dev_flow
7965          * is the suffix flow.
7966          */
7967         dev_flow->layers |= item_flags;
7968         if (action_flags & MLX5_FLOW_ACTION_RSS)
7969                 flow_dv_hashfields_set(dev_flow);
7970         /* Register matcher. */
7971         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7972                                     matcher.mask.size);
7973         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7974                                                      matcher.priority);
7975         /* reserved field no needs to be set to 0 here. */
7976         tbl_key.domain = attr->transfer;
7977         tbl_key.direction = attr->egress;
7978         tbl_key.table_id = dev_flow->group;
7979         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow, error))
7980                 return -rte_errno;
7981         return 0;
7982 }
7983
7984 /**
7985  * Apply the flow to the NIC, lock free,
7986  * (mutex should be acquired by caller).
7987  *
7988  * @param[in] dev
7989  *   Pointer to the Ethernet device structure.
7990  * @param[in, out] flow
7991  *   Pointer to flow structure.
7992  * @param[out] error
7993  *   Pointer to error structure.
7994  *
7995  * @return
7996  *   0 on success, a negative errno value otherwise and rte_errno is set.
7997  */
7998 static int
7999 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
8000                 struct rte_flow_error *error)
8001 {
8002         struct mlx5_flow_dv *dv;
8003         struct mlx5_flow *dev_flow;
8004         struct mlx5_priv *priv = dev->data->dev_private;
8005         int n;
8006         int err;
8007
8008         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8009                 dv = &dev_flow->dv;
8010                 n = dv->actions_n;
8011                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
8012                         if (dev_flow->transfer) {
8013                                 dv->actions[n++] = priv->sh->esw_drop_action;
8014                         } else {
8015                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
8016                                 if (!dv->hrxq) {
8017                                         rte_flow_error_set
8018                                                 (error, errno,
8019                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8020                                                  NULL,
8021                                                  "cannot get drop hash queue");
8022                                         goto error;
8023                                 }
8024                                 dv->actions[n++] = dv->hrxq->action;
8025                         }
8026                 } else if (dev_flow->actions &
8027                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
8028                         struct mlx5_hrxq *hrxq;
8029
8030                         MLX5_ASSERT(flow->rss.queue);
8031                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
8032                                              MLX5_RSS_HASH_KEY_LEN,
8033                                              dev_flow->hash_fields,
8034                                              (*flow->rss.queue),
8035                                              flow->rss.queue_num);
8036                         if (!hrxq) {
8037                                 hrxq = mlx5_hrxq_new
8038                                         (dev, flow->rss.key,
8039                                          MLX5_RSS_HASH_KEY_LEN,
8040                                          dev_flow->hash_fields,
8041                                          (*flow->rss.queue),
8042                                          flow->rss.queue_num,
8043                                          !!(dev_flow->layers &
8044                                             MLX5_FLOW_LAYER_TUNNEL));
8045                         }
8046                         if (!hrxq) {
8047                                 rte_flow_error_set
8048                                         (error, rte_errno,
8049                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8050                                          "cannot get hash queue");
8051                                 goto error;
8052                         }
8053                         dv->hrxq = hrxq;
8054                         dv->actions[n++] = dv->hrxq->action;
8055                 }
8056                 dv->flow =
8057                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
8058                                                   (void *)&dv->value, n,
8059                                                   dv->actions);
8060                 if (!dv->flow) {
8061                         rte_flow_error_set(error, errno,
8062                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8063                                            NULL,
8064                                            "hardware refuses to create flow");
8065                         goto error;
8066                 }
8067                 if (priv->vmwa_context &&
8068                     dev_flow->dv.vf_vlan.tag &&
8069                     !dev_flow->dv.vf_vlan.created) {
8070                         /*
8071                          * The rule contains the VLAN pattern.
8072                          * For VF we are going to create VLAN
8073                          * interface to make hypervisor set correct
8074                          * e-Switch vport context.
8075                          */
8076                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
8077                 }
8078         }
8079         return 0;
8080 error:
8081         err = rte_errno; /* Save rte_errno before cleanup. */
8082         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8083                 struct mlx5_flow_dv *dv = &dev_flow->dv;
8084                 if (dv->hrxq) {
8085                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8086                                 mlx5_hrxq_drop_release(dev);
8087                         else
8088                                 mlx5_hrxq_release(dev, dv->hrxq);
8089                         dv->hrxq = NULL;
8090                 }
8091                 if (dev_flow->dv.vf_vlan.tag &&
8092                     dev_flow->dv.vf_vlan.created)
8093                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8094         }
8095         rte_errno = err; /* Restore rte_errno. */
8096         return -rte_errno;
8097 }
8098
8099 /**
8100  * Release the flow matcher.
8101  *
8102  * @param dev
8103  *   Pointer to Ethernet device.
8104  * @param flow
8105  *   Pointer to mlx5_flow.
8106  *
8107  * @return
8108  *   1 while a reference on it exists, 0 when freed.
8109  */
8110 static int
8111 flow_dv_matcher_release(struct rte_eth_dev *dev,
8112                         struct mlx5_flow *flow)
8113 {
8114         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
8115
8116         MLX5_ASSERT(matcher->matcher_object);
8117         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
8118                 dev->data->port_id, (void *)matcher,
8119                 rte_atomic32_read(&matcher->refcnt));
8120         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
8121                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8122                            (matcher->matcher_object));
8123                 LIST_REMOVE(matcher, next);
8124                 /* table ref-- in release interface. */
8125                 flow_dv_tbl_resource_release(dev, matcher->tbl);
8126                 rte_free(matcher);
8127                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
8128                         dev->data->port_id, (void *)matcher);
8129                 return 0;
8130         }
8131         return 1;
8132 }
8133
8134 /**
8135  * Release an encap/decap resource.
8136  *
8137  * @param flow
8138  *   Pointer to mlx5_flow.
8139  *
8140  * @return
8141  *   1 while a reference on it exists, 0 when freed.
8142  */
8143 static int
8144 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
8145 {
8146         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
8147                                                 flow->dv.encap_decap;
8148
8149         MLX5_ASSERT(cache_resource->verbs_action);
8150         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
8151                 (void *)cache_resource,
8152                 rte_atomic32_read(&cache_resource->refcnt));
8153         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8154                 claim_zero(mlx5_glue->destroy_flow_action
8155                                 (cache_resource->verbs_action));
8156                 LIST_REMOVE(cache_resource, next);
8157                 rte_free(cache_resource);
8158                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
8159                         (void *)cache_resource);
8160                 return 0;
8161         }
8162         return 1;
8163 }
8164
8165 /**
8166  * Release an jump to table action resource.
8167  *
8168  * @param dev
8169  *   Pointer to Ethernet device.
8170  * @param flow
8171  *   Pointer to mlx5_flow.
8172  *
8173  * @return
8174  *   1 while a reference on it exists, 0 when freed.
8175  */
8176 static int
8177 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
8178                                   struct mlx5_flow *flow)
8179 {
8180         struct mlx5_flow_dv_jump_tbl_resource *cache_resource = flow->dv.jump;
8181         struct mlx5_flow_tbl_data_entry *tbl_data =
8182                         container_of(cache_resource,
8183                                      struct mlx5_flow_tbl_data_entry, jump);
8184
8185         MLX5_ASSERT(cache_resource->action);
8186         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
8187                 (void *)cache_resource,
8188                 rte_atomic32_read(&cache_resource->refcnt));
8189         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8190                 claim_zero(mlx5_glue->destroy_flow_action
8191                                 (cache_resource->action));
8192                 /* jump action memory free is inside the table release. */
8193                 flow_dv_tbl_resource_release(dev, &tbl_data->tbl);
8194                 DRV_LOG(DEBUG, "jump table resource %p: removed",
8195                         (void *)cache_resource);
8196                 return 0;
8197         }
8198         return 1;
8199 }
8200
8201 /**
8202  * Release a modify-header resource.
8203  *
8204  * @param flow
8205  *   Pointer to mlx5_flow.
8206  *
8207  * @return
8208  *   1 while a reference on it exists, 0 when freed.
8209  */
8210 static int
8211 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
8212 {
8213         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
8214                                                 flow->dv.modify_hdr;
8215
8216         MLX5_ASSERT(cache_resource->verbs_action);
8217         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
8218                 (void *)cache_resource,
8219                 rte_atomic32_read(&cache_resource->refcnt));
8220         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8221                 claim_zero(mlx5_glue->destroy_flow_action
8222                                 (cache_resource->verbs_action));
8223                 LIST_REMOVE(cache_resource, next);
8224                 rte_free(cache_resource);
8225                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
8226                         (void *)cache_resource);
8227                 return 0;
8228         }
8229         return 1;
8230 }
8231
8232 /**
8233  * Release port ID action resource.
8234  *
8235  * @param flow
8236  *   Pointer to mlx5_flow.
8237  *
8238  * @return
8239  *   1 while a reference on it exists, 0 when freed.
8240  */
8241 static int
8242 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
8243 {
8244         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
8245                 flow->dv.port_id_action;
8246
8247         MLX5_ASSERT(cache_resource->action);
8248         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
8249                 (void *)cache_resource,
8250                 rte_atomic32_read(&cache_resource->refcnt));
8251         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8252                 claim_zero(mlx5_glue->destroy_flow_action
8253                                 (cache_resource->action));
8254                 LIST_REMOVE(cache_resource, next);
8255                 rte_free(cache_resource);
8256                 DRV_LOG(DEBUG, "port id action resource %p: removed",
8257                         (void *)cache_resource);
8258                 return 0;
8259         }
8260         return 1;
8261 }
8262
8263 /**
8264  * Release push vlan action resource.
8265  *
8266  * @param flow
8267  *   Pointer to mlx5_flow.
8268  *
8269  * @return
8270  *   1 while a reference on it exists, 0 when freed.
8271  */
8272 static int
8273 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
8274 {
8275         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
8276                 flow->dv.push_vlan_res;
8277
8278         MLX5_ASSERT(cache_resource->action);
8279         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
8280                 (void *)cache_resource,
8281                 rte_atomic32_read(&cache_resource->refcnt));
8282         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
8283                 claim_zero(mlx5_glue->destroy_flow_action
8284                                 (cache_resource->action));
8285                 LIST_REMOVE(cache_resource, next);
8286                 rte_free(cache_resource);
8287                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
8288                         (void *)cache_resource);
8289                 return 0;
8290         }
8291         return 1;
8292 }
8293
8294 /**
8295  * Remove the flow from the NIC but keeps it in memory.
8296  * Lock free, (mutex should be acquired by caller).
8297  *
8298  * @param[in] dev
8299  *   Pointer to Ethernet device.
8300  * @param[in, out] flow
8301  *   Pointer to flow structure.
8302  */
8303 static void
8304 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8305 {
8306         struct mlx5_flow_dv *dv;
8307         struct mlx5_flow *dev_flow;
8308
8309         if (!flow)
8310                 return;
8311         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
8312                 dv = &dev_flow->dv;
8313                 if (dv->flow) {
8314                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
8315                         dv->flow = NULL;
8316                 }
8317                 if (dv->hrxq) {
8318                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
8319                                 mlx5_hrxq_drop_release(dev);
8320                         else
8321                                 mlx5_hrxq_release(dev, dv->hrxq);
8322                         dv->hrxq = NULL;
8323                 }
8324                 if (dev_flow->dv.vf_vlan.tag &&
8325                     dev_flow->dv.vf_vlan.created)
8326                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
8327         }
8328 }
8329
8330 /**
8331  * Remove the flow from the NIC and the memory.
8332  * Lock free, (mutex should be acquired by caller).
8333  *
8334  * @param[in] dev
8335  *   Pointer to the Ethernet device structure.
8336  * @param[in, out] flow
8337  *   Pointer to flow structure.
8338  */
8339 static void
8340 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8341 {
8342         struct mlx5_flow *dev_flow;
8343
8344         if (!flow)
8345                 return;
8346         __flow_dv_remove(dev, flow);
8347         if (flow->counter) {
8348                 flow_dv_counter_release(dev, flow->counter);
8349                 flow->counter = NULL;
8350         }
8351         if (flow->meter) {
8352                 mlx5_flow_meter_detach(flow->meter);
8353                 flow->meter = NULL;
8354         }
8355         while (!LIST_EMPTY(&flow->dev_flows)) {
8356                 dev_flow = LIST_FIRST(&flow->dev_flows);
8357                 LIST_REMOVE(dev_flow, next);
8358                 if (dev_flow->dv.matcher)
8359                         flow_dv_matcher_release(dev, dev_flow);
8360                 if (dev_flow->dv.encap_decap)
8361                         flow_dv_encap_decap_resource_release(dev_flow);
8362                 if (dev_flow->dv.modify_hdr)
8363                         flow_dv_modify_hdr_resource_release(dev_flow);
8364                 if (dev_flow->dv.jump)
8365                         flow_dv_jump_tbl_resource_release(dev, dev_flow);
8366                 if (dev_flow->dv.port_id_action)
8367                         flow_dv_port_id_action_resource_release(dev_flow);
8368                 if (dev_flow->dv.push_vlan_res)
8369                         flow_dv_push_vlan_action_resource_release(dev_flow);
8370                 if (dev_flow->dv.tag_resource)
8371                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
8372                 rte_free(dev_flow);
8373         }
8374 }
8375
8376 /**
8377  * Query a dv flow  rule for its statistics via devx.
8378  *
8379  * @param[in] dev
8380  *   Pointer to Ethernet device.
8381  * @param[in] flow
8382  *   Pointer to the sub flow.
8383  * @param[out] data
8384  *   data retrieved by the query.
8385  * @param[out] error
8386  *   Perform verbose error reporting if not NULL.
8387  *
8388  * @return
8389  *   0 on success, a negative errno value otherwise and rte_errno is set.
8390  */
8391 static int
8392 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
8393                     void *data, struct rte_flow_error *error)
8394 {
8395         struct mlx5_priv *priv = dev->data->dev_private;
8396         struct rte_flow_query_count *qc = data;
8397
8398         if (!priv->config.devx)
8399                 return rte_flow_error_set(error, ENOTSUP,
8400                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8401                                           NULL,
8402                                           "counters are not supported");
8403         if (flow->counter) {
8404                 uint64_t pkts, bytes;
8405                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
8406                                                &bytes);
8407
8408                 if (err)
8409                         return rte_flow_error_set(error, -err,
8410                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8411                                         NULL, "cannot read counters");
8412                 qc->hits_set = 1;
8413                 qc->bytes_set = 1;
8414                 qc->hits = pkts - flow->counter->hits;
8415                 qc->bytes = bytes - flow->counter->bytes;
8416                 if (qc->reset) {
8417                         flow->counter->hits = pkts;
8418                         flow->counter->bytes = bytes;
8419                 }
8420                 return 0;
8421         }
8422         return rte_flow_error_set(error, EINVAL,
8423                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8424                                   NULL,
8425                                   "counters are not available");
8426 }
8427
8428 /**
8429  * Query a flow.
8430  *
8431  * @see rte_flow_query()
8432  * @see rte_flow_ops
8433  */
8434 static int
8435 flow_dv_query(struct rte_eth_dev *dev,
8436               struct rte_flow *flow __rte_unused,
8437               const struct rte_flow_action *actions __rte_unused,
8438               void *data __rte_unused,
8439               struct rte_flow_error *error __rte_unused)
8440 {
8441         int ret = -EINVAL;
8442
8443         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
8444                 switch (actions->type) {
8445                 case RTE_FLOW_ACTION_TYPE_VOID:
8446                         break;
8447                 case RTE_FLOW_ACTION_TYPE_COUNT:
8448                         ret = flow_dv_query_count(dev, flow, data, error);
8449                         break;
8450                 default:
8451                         return rte_flow_error_set(error, ENOTSUP,
8452                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8453                                                   actions,
8454                                                   "action not supported");
8455                 }
8456         }
8457         return ret;
8458 }
8459
8460 /**
8461  * Destroy the meter table set.
8462  * Lock free, (mutex should be acquired by caller).
8463  *
8464  * @param[in] dev
8465  *   Pointer to Ethernet device.
8466  * @param[in] tbl
8467  *   Pointer to the meter table set.
8468  *
8469  * @return
8470  *   Always 0.
8471  */
8472 static int
8473 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
8474                         struct mlx5_meter_domains_infos *tbl)
8475 {
8476         struct mlx5_priv *priv = dev->data->dev_private;
8477         struct mlx5_meter_domains_infos *mtd =
8478                                 (struct mlx5_meter_domains_infos *)tbl;
8479
8480         if (!mtd || !priv->config.dv_flow_en)
8481                 return 0;
8482         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
8483                 claim_zero(mlx5_glue->dv_destroy_flow
8484                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
8485         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
8486                 claim_zero(mlx5_glue->dv_destroy_flow
8487                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
8488         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
8489                 claim_zero(mlx5_glue->dv_destroy_flow
8490                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
8491         if (mtd->egress.color_matcher)
8492                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8493                           (mtd->egress.color_matcher));
8494         if (mtd->egress.any_matcher)
8495                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8496                           (mtd->egress.any_matcher));
8497         if (mtd->egress.tbl)
8498                 claim_zero(flow_dv_tbl_resource_release(dev,
8499                                                         mtd->egress.tbl));
8500         if (mtd->ingress.color_matcher)
8501                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8502                           (mtd->ingress.color_matcher));
8503         if (mtd->ingress.any_matcher)
8504                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8505                           (mtd->ingress.any_matcher));
8506         if (mtd->ingress.tbl)
8507                 claim_zero(flow_dv_tbl_resource_release(dev,
8508                                                         mtd->ingress.tbl));
8509         if (mtd->transfer.color_matcher)
8510                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8511                           (mtd->transfer.color_matcher));
8512         if (mtd->transfer.any_matcher)
8513                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
8514                           (mtd->transfer.any_matcher));
8515         if (mtd->transfer.tbl)
8516                 claim_zero(flow_dv_tbl_resource_release(dev,
8517                                                         mtd->transfer.tbl));
8518         if (mtd->drop_actn)
8519                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
8520         rte_free(mtd);
8521         return 0;
8522 }
8523
8524 /* Number of meter flow actions, count and jump or count and drop. */
8525 #define METER_ACTIONS 2
8526
8527 /**
8528  * Create specify domain meter table and suffix table.
8529  *
8530  * @param[in] dev
8531  *   Pointer to Ethernet device.
8532  * @param[in,out] mtb
8533  *   Pointer to DV meter table set.
8534  * @param[in] egress
8535  *   Table attribute.
8536  * @param[in] transfer
8537  *   Table attribute.
8538  * @param[in] color_reg_c_idx
8539  *   Reg C index for color match.
8540  *
8541  * @return
8542  *   0 on success, -1 otherwise and rte_errno is set.
8543  */
8544 static int
8545 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
8546                            struct mlx5_meter_domains_infos *mtb,
8547                            uint8_t egress, uint8_t transfer,
8548                            uint32_t color_reg_c_idx)
8549 {
8550         struct mlx5_priv *priv = dev->data->dev_private;
8551         struct mlx5_ibv_shared *sh = priv->sh;
8552         struct mlx5_flow_dv_match_params mask = {
8553                 .size = sizeof(mask.buf),
8554         };
8555         struct mlx5_flow_dv_match_params value = {
8556                 .size = sizeof(value.buf),
8557         };
8558         struct mlx5dv_flow_matcher_attr dv_attr = {
8559                 .type = IBV_FLOW_ATTR_NORMAL,
8560                 .priority = 0,
8561                 .match_criteria_enable = 0,
8562                 .match_mask = (void *)&mask,
8563         };
8564         void *actions[METER_ACTIONS];
8565         struct mlx5_flow_tbl_resource **sfx_tbl;
8566         struct mlx5_meter_domain_info *dtb;
8567         struct rte_flow_error error;
8568         int i = 0;
8569
8570         if (transfer) {
8571                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
8572                 dtb = &mtb->transfer;
8573         } else if (egress) {
8574                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
8575                 dtb = &mtb->egress;
8576         } else {
8577                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
8578                 dtb = &mtb->ingress;
8579         }
8580         /* If the suffix table in missing, create it. */
8581         if (!(*sfx_tbl)) {
8582                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
8583                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
8584                                                 egress, transfer, &error);
8585                 if (!(*sfx_tbl)) {
8586                         DRV_LOG(ERR, "Failed to create meter suffix table.");
8587                         return -1;
8588                 }
8589         }
8590         /* Create the meter table with METER level. */
8591         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
8592                                             egress, transfer, &error);
8593         if (!dtb->tbl) {
8594                 DRV_LOG(ERR, "Failed to create meter policer table.");
8595                 return -1;
8596         }
8597         /* Create matchers, Any and Color. */
8598         dv_attr.priority = 3;
8599         dv_attr.match_criteria_enable = 0;
8600         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8601                                                              &dv_attr,
8602                                                              dtb->tbl->obj);
8603         if (!dtb->any_matcher) {
8604                 DRV_LOG(ERR, "Failed to create meter"
8605                              " policer default matcher.");
8606                 goto error_exit;
8607         }
8608         dv_attr.priority = 0;
8609         dv_attr.match_criteria_enable =
8610                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
8611         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
8612                                rte_col_2_mlx5_col(RTE_COLORS), UINT8_MAX);
8613         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
8614                                                                &dv_attr,
8615                                                                dtb->tbl->obj);
8616         if (!dtb->color_matcher) {
8617                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
8618                 goto error_exit;
8619         }
8620         if (mtb->count_actns[RTE_MTR_DROPPED])
8621                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
8622         actions[i++] = mtb->drop_actn;
8623         /* Default rule: lowest priority, match any, actions: drop. */
8624         dtb->policer_rules[RTE_MTR_DROPPED] =
8625                         mlx5_glue->dv_create_flow(dtb->any_matcher,
8626                                                  (void *)&value, i, actions);
8627         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
8628                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
8629                 goto error_exit;
8630         }
8631         return 0;
8632 error_exit:
8633         return -1;
8634 }
8635
8636 /**
8637  * Create the needed meter and suffix tables.
8638  * Lock free, (mutex should be acquired by caller).
8639  *
8640  * @param[in] dev
8641  *   Pointer to Ethernet device.
8642  * @param[in] fm
8643  *   Pointer to the flow meter.
8644  *
8645  * @return
8646  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
8647  */
8648 static struct mlx5_meter_domains_infos *
8649 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
8650                        const struct mlx5_flow_meter *fm)
8651 {
8652         struct mlx5_priv *priv = dev->data->dev_private;
8653         struct mlx5_meter_domains_infos *mtb;
8654         int ret;
8655         int i;
8656
8657         if (!priv->mtr_en) {
8658                 rte_errno = ENOTSUP;
8659                 return NULL;
8660         }
8661         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
8662         if (!mtb) {
8663                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
8664                 return NULL;
8665         }
8666         /* Create meter count actions */
8667         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
8668                 if (!fm->policer_stats.cnt[i])
8669                         continue;
8670                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
8671         }
8672         /* Create drop action. */
8673         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
8674         if (!mtb->drop_actn) {
8675                 DRV_LOG(ERR, "Failed to create drop action.");
8676                 goto error_exit;
8677         }
8678         /* Egress meter table. */
8679         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
8680         if (ret) {
8681                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
8682                 goto error_exit;
8683         }
8684         /* Ingress meter table. */
8685         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
8686         if (ret) {
8687                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
8688                 goto error_exit;
8689         }
8690         /* FDB meter table. */
8691         if (priv->config.dv_esw_en) {
8692                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
8693                                                  priv->mtr_color_reg);
8694                 if (ret) {
8695                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
8696                         goto error_exit;
8697                 }
8698         }
8699         return mtb;
8700 error_exit:
8701         flow_dv_destroy_mtr_tbl(dev, mtb);
8702         return NULL;
8703 }
8704
8705 /**
8706  * Destroy domain policer rule.
8707  *
8708  * @param[in] dt
8709  *   Pointer to domain table.
8710  */
8711 static void
8712 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
8713 {
8714         int i;
8715
8716         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8717                 if (dt->policer_rules[i]) {
8718                         claim_zero(mlx5_glue->dv_destroy_flow
8719                                   (dt->policer_rules[i]));
8720                         dt->policer_rules[i] = NULL;
8721                 }
8722         }
8723         if (dt->jump_actn) {
8724                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
8725                 dt->jump_actn = NULL;
8726         }
8727 }
8728
8729 /**
8730  * Destroy policer rules.
8731  *
8732  * @param[in] dev
8733  *   Pointer to Ethernet device.
8734  * @param[in] fm
8735  *   Pointer to flow meter structure.
8736  * @param[in] attr
8737  *   Pointer to flow attributes.
8738  *
8739  * @return
8740  *   Always 0.
8741  */
8742 static int
8743 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
8744                               const struct mlx5_flow_meter *fm,
8745                               const struct rte_flow_attr *attr)
8746 {
8747         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
8748
8749         if (!mtb)
8750                 return 0;
8751         if (attr->egress)
8752                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
8753         if (attr->ingress)
8754                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
8755         if (attr->transfer)
8756                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
8757         return 0;
8758 }
8759
8760 /**
8761  * Create specify domain meter policer rule.
8762  *
8763  * @param[in] fm
8764  *   Pointer to flow meter structure.
8765  * @param[in] mtb
8766  *   Pointer to DV meter table set.
8767  * @param[in] sfx_tb
8768  *   Pointer to suffix table.
8769  * @param[in] mtr_reg_c
8770  *   Color match REG_C.
8771  *
8772  * @return
8773  *   0 on success, -1 otherwise.
8774  */
8775 static int
8776 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8777                                     struct mlx5_meter_domain_info *dtb,
8778                                     struct mlx5_flow_tbl_resource *sfx_tb,
8779                                     uint8_t mtr_reg_c)
8780 {
8781         struct mlx5_flow_dv_match_params matcher = {
8782                 .size = sizeof(matcher.buf),
8783         };
8784         struct mlx5_flow_dv_match_params value = {
8785                 .size = sizeof(value.buf),
8786         };
8787         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8788         void *actions[METER_ACTIONS];
8789         int i;
8790
8791         /* Create jump action. */
8792         if (!sfx_tb)
8793                 return -1;
8794         if (!dtb->jump_actn)
8795                 dtb->jump_actn =
8796                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8797                                                         (sfx_tb->obj);
8798         if (!dtb->jump_actn) {
8799                 DRV_LOG(ERR, "Failed to create policer jump action.");
8800                 goto error;
8801         }
8802         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8803                 int j = 0;
8804
8805                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8806                                        rte_col_2_mlx5_col(i), UINT8_MAX);
8807                 if (mtb->count_actns[i])
8808                         actions[j++] = mtb->count_actns[i];
8809                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8810                         actions[j++] = mtb->drop_actn;
8811                 else
8812                         actions[j++] = dtb->jump_actn;
8813                 dtb->policer_rules[i] =
8814                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8815                                                  (void *)&value,
8816                                                   j, actions);
8817                 if (!dtb->policer_rules[i]) {
8818                         DRV_LOG(ERR, "Failed to create policer rule.");
8819                         goto error;
8820                 }
8821         }
8822         return 0;
8823 error:
8824         rte_errno = errno;
8825         return -1;
8826 }
8827
8828 /**
8829  * Create policer rules.
8830  *
8831  * @param[in] dev
8832  *   Pointer to Ethernet device.
8833  * @param[in] fm
8834  *   Pointer to flow meter structure.
8835  * @param[in] attr
8836  *   Pointer to flow attributes.
8837  *
8838  * @return
8839  *   0 on success, -1 otherwise.
8840  */
8841 static int
8842 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8843                              struct mlx5_flow_meter *fm,
8844                              const struct rte_flow_attr *attr)
8845 {
8846         struct mlx5_priv *priv = dev->data->dev_private;
8847         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8848         int ret;
8849
8850         if (attr->egress) {
8851                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8852                                                 priv->sh->tx_mtr_sfx_tbl,
8853                                                 priv->mtr_color_reg);
8854                 if (ret) {
8855                         DRV_LOG(ERR, "Failed to create egress policer.");
8856                         goto error;
8857                 }
8858         }
8859         if (attr->ingress) {
8860                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8861                                                 priv->sh->rx_mtr_sfx_tbl,
8862                                                 priv->mtr_color_reg);
8863                 if (ret) {
8864                         DRV_LOG(ERR, "Failed to create ingress policer.");
8865                         goto error;
8866                 }
8867         }
8868         if (attr->transfer) {
8869                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8870                                                 priv->sh->fdb_mtr_sfx_tbl,
8871                                                 priv->mtr_color_reg);
8872                 if (ret) {
8873                         DRV_LOG(ERR, "Failed to create transfer policer.");
8874                         goto error;
8875                 }
8876         }
8877         return 0;
8878 error:
8879         flow_dv_destroy_policer_rules(dev, fm, attr);
8880         return -1;
8881 }
8882
8883 /**
8884  * Query a devx counter.
8885  *
8886  * @param[in] dev
8887  *   Pointer to the Ethernet device structure.
8888  * @param[in] cnt
8889  *   Pointer to the flow counter.
8890  * @param[in] clear
8891  *   Set to clear the counter statistics.
8892  * @param[out] pkts
8893  *   The statistics value of packets.
8894  * @param[out] bytes
8895  *   The statistics value of bytes.
8896  *
8897  * @return
8898  *   0 on success, otherwise return -1.
8899  */
8900 static int
8901 flow_dv_counter_query(struct rte_eth_dev *dev,
8902                       struct mlx5_flow_counter *cnt, bool clear,
8903                       uint64_t *pkts, uint64_t *bytes)
8904 {
8905         struct mlx5_priv *priv = dev->data->dev_private;
8906         uint64_t inn_pkts, inn_bytes;
8907         int ret;
8908
8909         if (!priv->config.devx)
8910                 return -1;
8911         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8912         if (ret)
8913                 return -1;
8914         *pkts = inn_pkts - cnt->hits;
8915         *bytes = inn_bytes - cnt->bytes;
8916         if (clear) {
8917                 cnt->hits = inn_pkts;
8918                 cnt->bytes = inn_bytes;
8919         }
8920         return 0;
8921 }
8922
8923 /*
8924  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8925  */
8926 static int
8927 flow_dv_translate(struct rte_eth_dev *dev,
8928                   struct mlx5_flow *dev_flow,
8929                   const struct rte_flow_attr *attr,
8930                   const struct rte_flow_item items[],
8931                   const struct rte_flow_action actions[],
8932                   struct rte_flow_error *error)
8933 {
8934         int ret;
8935
8936         flow_dv_shared_lock(dev);
8937         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8938         flow_dv_shared_unlock(dev);
8939         return ret;
8940 }
8941
8942 /*
8943  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8944  */
8945 static int
8946 flow_dv_apply(struct rte_eth_dev *dev,
8947               struct rte_flow *flow,
8948               struct rte_flow_error *error)
8949 {
8950         int ret;
8951
8952         flow_dv_shared_lock(dev);
8953         ret = __flow_dv_apply(dev, flow, error);
8954         flow_dv_shared_unlock(dev);
8955         return ret;
8956 }
8957
8958 /*
8959  * Mutex-protected thunk to lock-free __flow_dv_remove().
8960  */
8961 static void
8962 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8963 {
8964         flow_dv_shared_lock(dev);
8965         __flow_dv_remove(dev, flow);
8966         flow_dv_shared_unlock(dev);
8967 }
8968
8969 /*
8970  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8971  */
8972 static void
8973 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8974 {
8975         flow_dv_shared_lock(dev);
8976         __flow_dv_destroy(dev, flow);
8977         flow_dv_shared_unlock(dev);
8978 }
8979
8980 /*
8981  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8982  */
8983 static struct mlx5_flow_counter *
8984 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8985 {
8986         struct mlx5_flow_counter *cnt;
8987
8988         flow_dv_shared_lock(dev);
8989         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8990         flow_dv_shared_unlock(dev);
8991         return cnt;
8992 }
8993
8994 /*
8995  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8996  */
8997 static void
8998 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8999 {
9000         flow_dv_shared_lock(dev);
9001         flow_dv_counter_release(dev, cnt);
9002         flow_dv_shared_unlock(dev);
9003 }
9004
9005 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
9006         .validate = flow_dv_validate,
9007         .prepare = flow_dv_prepare,
9008         .translate = flow_dv_translate,
9009         .apply = flow_dv_apply,
9010         .remove = flow_dv_remove,
9011         .destroy = flow_dv_destroy,
9012         .query = flow_dv_query,
9013         .create_mtr_tbls = flow_dv_create_mtr_tbl,
9014         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
9015         .create_policer_rules = flow_dv_create_policer_rules,
9016         .destroy_policer_rules = flow_dv_destroy_policer_rules,
9017         .counter_alloc = flow_dv_counter_allocate,
9018         .counter_free = flow_dv_counter_free,
9019         .counter_query = flow_dv_counter_query,
9020 };
9021
9022 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */