drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_glue.h"
  33 #include "mlx5_flow.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  38
  39 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  40 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  41 #endif
  42
  43 #ifndef HAVE_MLX5DV_DR_ESWITCH
  44 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  45 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  46 #endif
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR
  50 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  51 #endif
  52
  53 union flow_dv_attr {
  54         struct {
  55                 uint32_t valid:1;
  56                 uint32_t ipv4:1;
  57                 uint32_t ipv6:1;
  58                 uint32_t tcp:1;
  59                 uint32_t udp:1;
  60                 uint32_t reserved:27;
  61         };
  62         uint32_t attr;
  63 };
  64
  65 /**
  66  * Initialize flow attributes structure according to flow items' types.
  67  *
  68  * @param[in] item
  69  *   Pointer to item specification.
  70  * @param[out] attr
  71  *   Pointer to flow attributes structure.
  72  */
  73 static void
  74 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  75 {
  76         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  77                 switch (item->type) {
  78                 case RTE_FLOW_ITEM_TYPE_IPV4:
  79                         attr->ipv4 = 1;
  80                         break;
  81                 case RTE_FLOW_ITEM_TYPE_IPV6:
  82                         attr->ipv6 = 1;
  83                         break;
  84                 case RTE_FLOW_ITEM_TYPE_UDP:
  85                         attr->udp = 1;
  86                         break;
  87                 case RTE_FLOW_ITEM_TYPE_TCP:
  88                         attr->tcp = 1;
  89                         break;
  90                 default:
  91                         break;
  92                 }
  93         }
  94         attr->valid = 1;
  95 }
  96
  97 struct field_modify_info {
  98         uint32_t size; /* Size of field in protocol header, in bytes. */
  99         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 100         enum mlx5_modification_field id;
 101 };
 102
 103 struct field_modify_info modify_eth[] = {
 104         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 105         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 106         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 107         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 108         {0, 0, 0},
 109 };
 110
 111 struct field_modify_info modify_ipv4[] = {
 112         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 113         {4, 12, MLX5_MODI_OUT_SIPV4},
 114         {4, 16, MLX5_MODI_OUT_DIPV4},
 115         {0, 0, 0},
 116 };
 117
 118 struct field_modify_info modify_ipv6[] = {
 119         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 120         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 121         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 122         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 123         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 124         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 125         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 126         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 127         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 128         {0, 0, 0},
 129 };
 130
 131 struct field_modify_info modify_udp[] = {
 132         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 133         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 134         {0, 0, 0},
 135 };
 136
 137 struct field_modify_info modify_tcp[] = {
 138         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 139         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 140         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 141         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 142         {0, 0, 0},
 143 };
 144
 145 static void
 146 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item, uint64_t *flags)
 147 {
 148         uint8_t next_protocol = 0xFF;
 149
 150         if (item->mask != NULL) {
 151                 switch (item->type) {
 152                 case RTE_FLOW_ITEM_TYPE_IPV4:
 153                         next_protocol =
 154                                 ((const struct rte_flow_item_ipv4 *)
 155                                  (item->spec))->hdr.next_proto_id;
 156                         next_protocol &=
 157                                 ((const struct rte_flow_item_ipv4 *)
 158                                  (item->mask))->hdr.next_proto_id;
 159                         break;
 160                 case RTE_FLOW_ITEM_TYPE_IPV6:
 161                         next_protocol =
 162                                 ((const struct rte_flow_item_ipv6 *)
 163                                  (item->spec))->hdr.proto;
 164                         next_protocol &=
 165                                 ((const struct rte_flow_item_ipv6 *)
 166                                  (item->mask))->hdr.proto;
 167                         break;
 168                 default:
 169                         break;
 170                 }
 171         }
 172         if (next_protocol == IPPROTO_IPIP)
 173                 *flags |= MLX5_FLOW_LAYER_IPIP;
 174         if (next_protocol == IPPROTO_IPV6)
 175                 *flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 176 }
 177
 178 /**
 179  * Acquire the synchronizing object to protect multithreaded access
 180  * to shared dv context. Lock occurs only if context is actually
 181  * shared, i.e. we have multiport IB device and representors are
 182  * created.
 183  *
 184  * @param[in] dev
 185  *   Pointer to the rte_eth_dev structure.
 186  */
 187 static void
 188 flow_d_shared_lock(struct rte_eth_dev *dev)
 189 {
 190         struct mlx5_priv *priv = dev->data->dev_private;
 191         struct mlx5_ibv_shared *sh = priv->sh;
 192
 193         if (sh->dv_refcnt > 1) {
 194                 int ret;
 195
 196                 ret = pthread_mutex_lock(&sh->dv_mutex);
 197                 assert(!ret);
 198                 (void)ret;
 199         }
 200 }
 201
 202 static void
 203 flow_d_shared_unlock(struct rte_eth_dev *dev)
 204 {
 205         struct mlx5_priv *priv = dev->data->dev_private;
 206         struct mlx5_ibv_shared *sh = priv->sh;
 207
 208         if (sh->dv_refcnt > 1) {
 209                 int ret;
 210
 211                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 212                 assert(!ret);
 213                 (void)ret;
 214         }
 215 }
 216
 217 /**
 218  * Convert modify-header action to DV specification.
 219  *
 220  * @param[in] item
 221  *   Pointer to item specification.
 222  * @param[in] field
 223  *   Pointer to field modification information.
 224  * @param[in,out] resource
 225  *   Pointer to the modify-header resource.
 226  * @param[in] type
 227  *   Type of modification.
 228  * @param[out] error
 229  *   Pointer to the error structure.
 230  *
 231  * @return
 232  *   0 on success, a negative errno value otherwise and rte_errno is set.
 233  */
 234 static int
 235 flow_dv_convert_modify_action(struct rte_flow_item *item,
 236                               struct field_modify_info *field,
 237                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 238                               uint32_t type,
 239                               struct rte_flow_error *error)
 240 {
 241         uint32_t i = resource->actions_num;
 242         struct mlx5_modification_cmd *actions = resource->actions;
 243         const uint8_t *spec = item->spec;
 244         const uint8_t *mask = item->mask;
 245         uint32_t set;
 246
 247         while (field->size) {
 248                 set = 0;
 249                 /* Generate modify command for each mask segment. */
 250                 memcpy(&set, &mask[field->offset], field->size);
 251                 if (set) {
 252                         if (i >= MLX5_MODIFY_NUM)
 253                                 return rte_flow_error_set(error, EINVAL,
 254                                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 255                                          "too many items to modify");
 256                         actions[i].action_type = type;
 257                         actions[i].field = field->id;
 258                         actions[i].length = field->size ==
 259                                         4 ? 0 : field->size * 8;
 260                         rte_memcpy(&actions[i].data[4 - field->size],
 261                                    &spec[field->offset], field->size);
 262                         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 263                         ++i;
 264                 }
 265                 if (resource->actions_num != i)
 266                         resource->actions_num = i;
 267                 field++;
 268         }
 269         if (!resource->actions_num)
 270                 return rte_flow_error_set(error, EINVAL,
 271                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 272                                           "invalid modification flow item");
 273         return 0;
 274 }
 275
 276 /**
 277  * Convert modify-header set IPv4 address action to DV specification.
 278  *
 279  * @param[in,out] resource
 280  *   Pointer to the modify-header resource.
 281  * @param[in] action
 282  *   Pointer to action specification.
 283  * @param[out] error
 284  *   Pointer to the error structure.
 285  *
 286  * @return
 287  *   0 on success, a negative errno value otherwise and rte_errno is set.
 288  */
 289 static int
 290 flow_dv_convert_action_modify_ipv4
 291                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 292                          const struct rte_flow_action *action,
 293                          struct rte_flow_error *error)
 294 {
 295         const struct rte_flow_action_set_ipv4 *conf =
 296                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 297         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 298         struct rte_flow_item_ipv4 ipv4;
 299         struct rte_flow_item_ipv4 ipv4_mask;
 300
 301         memset(&ipv4, 0, sizeof(ipv4));
 302         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 303         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 304                 ipv4.hdr.src_addr = conf->ipv4_addr;
 305                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 306         } else {
 307                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 308                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 309         }
 310         item.spec = &ipv4;
 311         item.mask = &ipv4_mask;
 312         return flow_dv_convert_modify_action(&item, modify_ipv4, resource,
 313                                              MLX5_MODIFICATION_TYPE_SET, error);
 314 }
 315
 316 /**
 317  * Convert modify-header set IPv6 address action to DV specification.
 318  *
 319  * @param[in,out] resource
 320  *   Pointer to the modify-header resource.
 321  * @param[in] action
 322  *   Pointer to action specification.
 323  * @param[out] error
 324  *   Pointer to the error structure.
 325  *
 326  * @return
 327  *   0 on success, a negative errno value otherwise and rte_errno is set.
 328  */
 329 static int
 330 flow_dv_convert_action_modify_ipv6
 331                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 332                          const struct rte_flow_action *action,
 333                          struct rte_flow_error *error)
 334 {
 335         const struct rte_flow_action_set_ipv6 *conf =
 336                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 337         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 338         struct rte_flow_item_ipv6 ipv6;
 339         struct rte_flow_item_ipv6 ipv6_mask;
 340
 341         memset(&ipv6, 0, sizeof(ipv6));
 342         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 343         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 344                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 345                        sizeof(ipv6.hdr.src_addr));
 346                 memcpy(&ipv6_mask.hdr.src_addr,
 347                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 348                        sizeof(ipv6.hdr.src_addr));
 349         } else {
 350                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 351                        sizeof(ipv6.hdr.dst_addr));
 352                 memcpy(&ipv6_mask.hdr.dst_addr,
 353                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 354                        sizeof(ipv6.hdr.dst_addr));
 355         }
 356         item.spec = &ipv6;
 357         item.mask = &ipv6_mask;
 358         return flow_dv_convert_modify_action(&item, modify_ipv6, resource,
 359                                              MLX5_MODIFICATION_TYPE_SET, error);
 360 }
 361
 362 /**
 363  * Convert modify-header set MAC address action to DV specification.
 364  *
 365  * @param[in,out] resource
 366  *   Pointer to the modify-header resource.
 367  * @param[in] action
 368  *   Pointer to action specification.
 369  * @param[out] error
 370  *   Pointer to the error structure.
 371  *
 372  * @return
 373  *   0 on success, a negative errno value otherwise and rte_errno is set.
 374  */
 375 static int
 376 flow_dv_convert_action_modify_mac
 377                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 378                          const struct rte_flow_action *action,
 379                          struct rte_flow_error *error)
 380 {
 381         const struct rte_flow_action_set_mac *conf =
 382                 (const struct rte_flow_action_set_mac *)(action->conf);
 383         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 384         struct rte_flow_item_eth eth;
 385         struct rte_flow_item_eth eth_mask;
 386
 387         memset(&eth, 0, sizeof(eth));
 388         memset(&eth_mask, 0, sizeof(eth_mask));
 389         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 390                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 391                        sizeof(eth.src.addr_bytes));
 392                 memcpy(&eth_mask.src.addr_bytes,
 393                        &rte_flow_item_eth_mask.src.addr_bytes,
 394                        sizeof(eth_mask.src.addr_bytes));
 395         } else {
 396                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 397                        sizeof(eth.dst.addr_bytes));
 398                 memcpy(&eth_mask.dst.addr_bytes,
 399                        &rte_flow_item_eth_mask.dst.addr_bytes,
 400                        sizeof(eth_mask.dst.addr_bytes));
 401         }
 402         item.spec = &eth;
 403         item.mask = &eth_mask;
 404         return flow_dv_convert_modify_action(&item, modify_eth, resource,
 405                                              MLX5_MODIFICATION_TYPE_SET, error);
 406 }
 407
 408 /**
 409  * Convert modify-header set TP action to DV specification.
 410  *
 411  * @param[in,out] resource
 412  *   Pointer to the modify-header resource.
 413  * @param[in] action
 414  *   Pointer to action specification.
 415  * @param[in] items
 416  *   Pointer to rte_flow_item objects list.
 417  * @param[in] attr
 418  *   Pointer to flow attributes structure.
 419  * @param[out] error
 420  *   Pointer to the error structure.
 421  *
 422  * @return
 423  *   0 on success, a negative errno value otherwise and rte_errno is set.
 424  */
 425 static int
 426 flow_dv_convert_action_modify_tp
 427                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 428                          const struct rte_flow_action *action,
 429                          const struct rte_flow_item *items,
 430                          union flow_dv_attr *attr,
 431                          struct rte_flow_error *error)
 432 {
 433         const struct rte_flow_action_set_tp *conf =
 434                 (const struct rte_flow_action_set_tp *)(action->conf);
 435         struct rte_flow_item item;
 436         struct rte_flow_item_udp udp;
 437         struct rte_flow_item_udp udp_mask;
 438         struct rte_flow_item_tcp tcp;
 439         struct rte_flow_item_tcp tcp_mask;
 440         struct field_modify_info *field;
 441
 442         if (!attr->valid)
 443                 flow_dv_attr_init(items, attr);
 444         if (attr->udp) {
 445                 memset(&udp, 0, sizeof(udp));
 446                 memset(&udp_mask, 0, sizeof(udp_mask));
 447                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 448                         udp.hdr.src_port = conf->port;
 449                         udp_mask.hdr.src_port =
 450                                         rte_flow_item_udp_mask.hdr.src_port;
 451                 } else {
 452                         udp.hdr.dst_port = conf->port;
 453                         udp_mask.hdr.dst_port =
 454                                         rte_flow_item_udp_mask.hdr.dst_port;
 455                 }
 456                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 457                 item.spec = &udp;
 458                 item.mask = &udp_mask;
 459                 field = modify_udp;
 460         }
 461         if (attr->tcp) {
 462                 memset(&tcp, 0, sizeof(tcp));
 463                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 464                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 465                         tcp.hdr.src_port = conf->port;
 466                         tcp_mask.hdr.src_port =
 467                                         rte_flow_item_tcp_mask.hdr.src_port;
 468                 } else {
 469                         tcp.hdr.dst_port = conf->port;
 470                         tcp_mask.hdr.dst_port =
 471                                         rte_flow_item_tcp_mask.hdr.dst_port;
 472                 }
 473                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 474                 item.spec = &tcp;
 475                 item.mask = &tcp_mask;
 476                 field = modify_tcp;
 477         }
 478         return flow_dv_convert_modify_action(&item, field, resource,
 479                                              MLX5_MODIFICATION_TYPE_SET, error);
 480 }
 481
 482 /**
 483  * Convert modify-header set TTL action to DV specification.
 484  *
 485  * @param[in,out] resource
 486  *   Pointer to the modify-header resource.
 487  * @param[in] action
 488  *   Pointer to action specification.
 489  * @param[in] items
 490  *   Pointer to rte_flow_item objects list.
 491  * @param[in] attr
 492  *   Pointer to flow attributes structure.
 493  * @param[out] error
 494  *   Pointer to the error structure.
 495  *
 496  * @return
 497  *   0 on success, a negative errno value otherwise and rte_errno is set.
 498  */
 499 static int
 500 flow_dv_convert_action_modify_ttl
 501                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 502                          const struct rte_flow_action *action,
 503                          const struct rte_flow_item *items,
 504                          union flow_dv_attr *attr,
 505                          struct rte_flow_error *error)
 506 {
 507         const struct rte_flow_action_set_ttl *conf =
 508                 (const struct rte_flow_action_set_ttl *)(action->conf);
 509         struct rte_flow_item item;
 510         struct rte_flow_item_ipv4 ipv4;
 511         struct rte_flow_item_ipv4 ipv4_mask;
 512         struct rte_flow_item_ipv6 ipv6;
 513         struct rte_flow_item_ipv6 ipv6_mask;
 514         struct field_modify_info *field;
 515
 516         if (!attr->valid)
 517                 flow_dv_attr_init(items, attr);
 518         if (attr->ipv4) {
 519                 memset(&ipv4, 0, sizeof(ipv4));
 520                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 521                 ipv4.hdr.time_to_live = conf->ttl_value;
 522                 ipv4_mask.hdr.time_to_live = 0xFF;
 523                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 524                 item.spec = &ipv4;
 525                 item.mask = &ipv4_mask;
 526                 field = modify_ipv4;
 527         }
 528         if (attr->ipv6) {
 529                 memset(&ipv6, 0, sizeof(ipv6));
 530                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 531                 ipv6.hdr.hop_limits = conf->ttl_value;
 532                 ipv6_mask.hdr.hop_limits = 0xFF;
 533                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 534                 item.spec = &ipv6;
 535                 item.mask = &ipv6_mask;
 536                 field = modify_ipv6;
 537         }
 538         return flow_dv_convert_modify_action(&item, field, resource,
 539                                              MLX5_MODIFICATION_TYPE_SET, error);
 540 }
 541
 542 /**
 543  * Convert modify-header decrement TTL action to DV specification.
 544  *
 545  * @param[in,out] resource
 546  *   Pointer to the modify-header resource.
 547  * @param[in] action
 548  *   Pointer to action specification.
 549  * @param[in] items
 550  *   Pointer to rte_flow_item objects list.
 551  * @param[in] attr
 552  *   Pointer to flow attributes structure.
 553  * @param[out] error
 554  *   Pointer to the error structure.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 flow_dv_convert_action_modify_dec_ttl
 561                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 562                          const struct rte_flow_item *items,
 563                          union flow_dv_attr *attr,
 564                          struct rte_flow_error *error)
 565 {
 566         struct rte_flow_item item;
 567         struct rte_flow_item_ipv4 ipv4;
 568         struct rte_flow_item_ipv4 ipv4_mask;
 569         struct rte_flow_item_ipv6 ipv6;
 570         struct rte_flow_item_ipv6 ipv6_mask;
 571         struct field_modify_info *field;
 572
 573         if (!attr->valid)
 574                 flow_dv_attr_init(items, attr);
 575         if (attr->ipv4) {
 576                 memset(&ipv4, 0, sizeof(ipv4));
 577                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 578                 ipv4.hdr.time_to_live = 0xFF;
 579                 ipv4_mask.hdr.time_to_live = 0xFF;
 580                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 581                 item.spec = &ipv4;
 582                 item.mask = &ipv4_mask;
 583                 field = modify_ipv4;
 584         }
 585         if (attr->ipv6) {
 586                 memset(&ipv6, 0, sizeof(ipv6));
 587                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 588                 ipv6.hdr.hop_limits = 0xFF;
 589                 ipv6_mask.hdr.hop_limits = 0xFF;
 590                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 591                 item.spec = &ipv6;
 592                 item.mask = &ipv6_mask;
 593                 field = modify_ipv6;
 594         }
 595         return flow_dv_convert_modify_action(&item, field, resource,
 596                                              MLX5_MODIFICATION_TYPE_ADD, error);
 597 }
 598
 599 /**
 600  * Convert modify-header increment/decrement TCP Sequence number
 601  * to DV specification.
 602  *
 603  * @param[in,out] resource
 604  *   Pointer to the modify-header resource.
 605  * @param[in] action
 606  *   Pointer to action specification.
 607  * @param[out] error
 608  *   Pointer to the error structure.
 609  *
 610  * @return
 611  *   0 on success, a negative errno value otherwise and rte_errno is set.
 612  */
 613 static int
 614 flow_dv_convert_action_modify_tcp_seq
 615                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 616                          const struct rte_flow_action *action,
 617                          struct rte_flow_error *error)
 618 {
 619         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 620         uint64_t value = rte_be_to_cpu_32(*conf);
 621         struct rte_flow_item item;
 622         struct rte_flow_item_tcp tcp;
 623         struct rte_flow_item_tcp tcp_mask;
 624
 625         memset(&tcp, 0, sizeof(tcp));
 626         memset(&tcp_mask, 0, sizeof(tcp_mask));
 627         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 628                 /*
 629                  * The HW has no decrement operation, only increment operation.
 630                  * To simulate decrement X from Y using increment operation
 631                  * we need to add UINT32_MAX X times to Y.
 632                  * Each adding of UINT32_MAX decrements Y by 1.
 633                  */
 634                 value *= UINT32_MAX;
 635         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 636         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 637         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 638         item.spec = &tcp;
 639         item.mask = &tcp_mask;
 640         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 641                                              MLX5_MODIFICATION_TYPE_ADD, error);
 642 }
 643
 644 /**
 645  * Convert modify-header increment/decrement TCP Acknowledgment number
 646  * to DV specification.
 647  *
 648  * @param[in,out] resource
 649  *   Pointer to the modify-header resource.
 650  * @param[in] action
 651  *   Pointer to action specification.
 652  * @param[out] error
 653  *   Pointer to the error structure.
 654  *
 655  * @return
 656  *   0 on success, a negative errno value otherwise and rte_errno is set.
 657  */
 658 static int
 659 flow_dv_convert_action_modify_tcp_ack
 660                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 661                          const struct rte_flow_action *action,
 662                          struct rte_flow_error *error)
 663 {
 664         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 665         uint64_t value = rte_be_to_cpu_32(*conf);
 666         struct rte_flow_item item;
 667         struct rte_flow_item_tcp tcp;
 668         struct rte_flow_item_tcp tcp_mask;
 669
 670         memset(&tcp, 0, sizeof(tcp));
 671         memset(&tcp_mask, 0, sizeof(tcp_mask));
 672         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 673                 /*
 674                  * The HW has no decrement operation, only increment operation.
 675                  * To simulate decrement X from Y using increment operation
 676                  * we need to add UINT32_MAX X times to Y.
 677                  * Each adding of UINT32_MAX decrements Y by 1.
 678                  */
 679                 value *= UINT32_MAX;
 680         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 681         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 682         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 683         item.spec = &tcp;
 684         item.mask = &tcp_mask;
 685         return flow_dv_convert_modify_action(&item, modify_tcp, resource,
 686                                              MLX5_MODIFICATION_TYPE_ADD, error);
 687 }
 688
 689 /**
 690  * Validate META item.
 691  *
 692  * @param[in] dev
 693  *   Pointer to the rte_eth_dev structure.
 694  * @param[in] item
 695  *   Item specification.
 696  * @param[in] attr
 697  *   Attributes of flow that includes this item.
 698  * @param[out] error
 699  *   Pointer to error structure.
 700  *
 701  * @return
 702  *   0 on success, a negative errno value otherwise and rte_errno is set.
 703  */
 704 static int
 705 flow_dv_validate_item_meta(struct rte_eth_dev *dev,
 706                            const struct rte_flow_item *item,
 707                            const struct rte_flow_attr *attr,
 708                            struct rte_flow_error *error)
 709 {
 710         const struct rte_flow_item_meta *spec = item->spec;
 711         const struct rte_flow_item_meta *mask = item->mask;
 712         const struct rte_flow_item_meta nic_mask = {
 713                 .data = RTE_BE32(UINT32_MAX)
 714         };
 715         int ret;
 716         uint64_t offloads = dev->data->dev_conf.txmode.offloads;
 717
 718         if (!(offloads & DEV_TX_OFFLOAD_MATCH_METADATA))
 719                 return rte_flow_error_set(error, EPERM,
 720                                           RTE_FLOW_ERROR_TYPE_ITEM,
 721                                           NULL,
 722                                           "match on metadata offload "
 723                                           "configuration is off for this port");
 724         if (!spec)
 725                 return rte_flow_error_set(error, EINVAL,
 726                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 727                                           item->spec,
 728                                           "data cannot be empty");
 729         if (!spec->data)
 730                 return rte_flow_error_set(error, EINVAL,
 731                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
 732                                           NULL,
 733                                           "data cannot be zero");
 734         if (!mask)
 735                 mask = &rte_flow_item_meta_mask;
 736         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
 737                                         (const uint8_t *)&nic_mask,
 738                                         sizeof(struct rte_flow_item_meta),
 739                                         error);
 740         if (ret < 0)
 741                 return ret;
 742         if (attr->ingress)
 743                 return rte_flow_error_set(error, ENOTSUP,
 744                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 745                                           NULL,
 746                                           "pattern not supported for ingress");
 747         return 0;
 748 }
 749
 750 /**
 751  * Validate vport item.
 752  *
 753  * @param[in] dev
 754  *   Pointer to the rte_eth_dev structure.
 755  * @param[in] item
 756  *   Item specification.
 757  * @param[in] attr
 758  *   Attributes of flow that includes this item.
 759  * @param[in] item_flags
 760  *   Bit-fields that holds the items detected until now.
 761  * @param[out] error
 762  *   Pointer to error structure.
 763  *
 764  * @return
 765  *   0 on success, a negative errno value otherwise and rte_errno is set.
 766  */
 767 static int
 768 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
 769                               const struct rte_flow_item *item,
 770                               const struct rte_flow_attr *attr,
 771                               uint64_t item_flags,
 772                               struct rte_flow_error *error)
 773 {
 774         const struct rte_flow_item_port_id *spec = item->spec;
 775         const struct rte_flow_item_port_id *mask = item->mask;
 776         const struct rte_flow_item_port_id switch_mask = {
 777                         .id = 0xffffffff,
 778         };
 779         uint16_t esw_domain_id;
 780         uint16_t item_port_esw_domain_id;
 781         int ret;
 782
 783         if (!attr->transfer)
 784                 return rte_flow_error_set(error, EINVAL,
 785                                           RTE_FLOW_ERROR_TYPE_ITEM,
 786                                           NULL,
 787                                           "match on port id is valid only"
 788                                           " when transfer flag is enabled");
 789         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
 790                 return rte_flow_error_set(error, ENOTSUP,
 791                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 792                                           "multiple source ports are not"
 793                                           " supported");
 794         if (!mask)
 795                 mask = &switch_mask;
 796         if (mask->id != 0xffffffff)
 797                 return rte_flow_error_set(error, ENOTSUP,
 798                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
 799                                            mask,
 800                                            "no support for partial mask on"
 801                                            " \"id\" field");
 802         ret = mlx5_flow_item_acceptable
 803                                 (item, (const uint8_t *)mask,
 804                                  (const uint8_t *)&rte_flow_item_port_id_mask,
 805                                  sizeof(struct rte_flow_item_port_id),
 806                                  error);
 807         if (ret)
 808                 return ret;
 809         if (!spec)
 810                 return 0;
 811         ret = mlx5_port_to_eswitch_info(spec->id, &item_port_esw_domain_id,
 812                                         NULL);
 813         if (ret)
 814                 return rte_flow_error_set(error, -ret,
 815                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 816                                           "failed to obtain E-Switch info for"
 817                                           " port");
 818         ret = mlx5_port_to_eswitch_info(dev->data->port_id,
 819                                         &esw_domain_id, NULL);
 820         if (ret < 0)
 821                 return rte_flow_error_set(error, -ret,
 822                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 823                                           NULL,
 824                                           "failed to obtain E-Switch info");
 825         if (item_port_esw_domain_id != esw_domain_id)
 826                 return rte_flow_error_set(error, -ret,
 827                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
 828                                           "cannot match on a port from a"
 829                                           " different E-Switch");
 830         return 0;
 831 }
 832
 833 /**
 834  * Validate count action.
 835  *
 836  * @param[in] dev
 837  *   device otr.
 838  * @param[out] error
 839  *   Pointer to error structure.
 840  *
 841  * @return
 842  *   0 on success, a negative errno value otherwise and rte_errno is set.
 843  */
 844 static int
 845 flow_dv_validate_action_count(struct rte_eth_dev *dev,
 846                               struct rte_flow_error *error)
 847 {
 848         struct mlx5_priv *priv = dev->data->dev_private;
 849
 850         if (!priv->config.devx)
 851                 goto notsup_err;
 852 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
 853         return 0;
 854 #endif
 855 notsup_err:
 856         return rte_flow_error_set
 857                       (error, ENOTSUP,
 858                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 859                        NULL,
 860                        "count action not supported");
 861 }
 862
 863 /**
 864  * Validate the L2 encap action.
 865  *
 866  * @param[in] action_flags
 867  *   Holds the actions detected until now.
 868  * @param[in] action
 869  *   Pointer to the encap action.
 870  * @param[in] attr
 871  *   Pointer to flow attributes
 872  * @param[out] error
 873  *   Pointer to error structure.
 874  *
 875  * @return
 876  *   0 on success, a negative errno value otherwise and rte_errno is set.
 877  */
 878 static int
 879 flow_dv_validate_action_l2_encap(uint64_t action_flags,
 880                                  const struct rte_flow_action *action,
 881                                  const struct rte_flow_attr *attr,
 882                                  struct rte_flow_error *error)
 883 {
 884         if (!(action->conf))
 885                 return rte_flow_error_set(error, EINVAL,
 886                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
 887                                           "configuration cannot be null");
 888         if (action_flags & MLX5_FLOW_ACTION_DROP)
 889                 return rte_flow_error_set(error, EINVAL,
 890                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 891                                           "can't drop and encap in same flow");
 892         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
 893                 return rte_flow_error_set(error, EINVAL,
 894                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 895                                           "can only have a single encap or"
 896                                           " decap action in a flow");
 897         if (!attr->transfer && attr->ingress)
 898                 return rte_flow_error_set(error, ENOTSUP,
 899                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 900                                           NULL,
 901                                           "encap action not supported for "
 902                                           "ingress");
 903         return 0;
 904 }
 905
 906 /**
 907  * Validate the L2 decap action.
 908  *
 909  * @param[in] action_flags
 910  *   Holds the actions detected until now.
 911  * @param[in] attr
 912  *   Pointer to flow attributes
 913  * @param[out] error
 914  *   Pointer to error structure.
 915  *
 916  * @return
 917  *   0 on success, a negative errno value otherwise and rte_errno is set.
 918  */
 919 static int
 920 flow_dv_validate_action_l2_decap(uint64_t action_flags,
 921                                  const struct rte_flow_attr *attr,
 922                                  struct rte_flow_error *error)
 923 {
 924         if (action_flags & MLX5_FLOW_ACTION_DROP)
 925                 return rte_flow_error_set(error, EINVAL,
 926                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 927                                           "can't drop and decap in same flow");
 928         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
 929                 return rte_flow_error_set(error, EINVAL,
 930                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 931                                           "can only have a single encap or"
 932                                           " decap action in a flow");
 933         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
 934                 return rte_flow_error_set(error, EINVAL,
 935                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 936                                           "can't have decap action after"
 937                                           " modify action");
 938         if (attr->egress)
 939                 return rte_flow_error_set(error, ENOTSUP,
 940                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
 941                                           NULL,
 942                                           "decap action not supported for "
 943                                           "egress");
 944         return 0;
 945 }
 946
 947 /**
 948  * Validate the raw encap action.
 949  *
 950  * @param[in] action_flags
 951  *   Holds the actions detected until now.
 952  * @param[in] action
 953  *   Pointer to the encap action.
 954  * @param[in] attr
 955  *   Pointer to flow attributes
 956  * @param[out] error
 957  *   Pointer to error structure.
 958  *
 959  * @return
 960  *   0 on success, a negative errno value otherwise and rte_errno is set.
 961  */
 962 static int
 963 flow_dv_validate_action_raw_encap(uint64_t action_flags,
 964                                   const struct rte_flow_action *action,
 965                                   const struct rte_flow_attr *attr,
 966                                   struct rte_flow_error *error)
 967 {
 968         if (!(action->conf))
 969                 return rte_flow_error_set(error, EINVAL,
 970                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
 971                                           "configuration cannot be null");
 972         if (action_flags & MLX5_FLOW_ACTION_DROP)
 973                 return rte_flow_error_set(error, EINVAL,
 974                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 975                                           "can't drop and encap in same flow");
 976         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
 977                 return rte_flow_error_set(error, EINVAL,
 978                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 979                                           "can only have a single encap"
 980                                           " action in a flow");
 981         /* encap without preceding decap is not supported for ingress */
 982         if (!attr->transfer &&  attr->ingress &&
 983             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
 984                 return rte_flow_error_set(error, ENOTSUP,
 985                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
 986                                           NULL,
 987                                           "encap action not supported for "
 988                                           "ingress");
 989         return 0;
 990 }
 991
 992 /**
 993  * Validate the raw decap action.
 994  *
 995  * @param[in] action_flags
 996  *   Holds the actions detected until now.
 997  * @param[in] action
 998  *   Pointer to the encap action.
 999  * @param[in] attr
1000  *   Pointer to flow attributes
1001  * @param[out] error
1002  *   Pointer to error structure.
1003  *
1004  * @return
1005  *   0 on success, a negative errno value otherwise and rte_errno is set.
1006  */
1007 static int
1008 flow_dv_validate_action_raw_decap(uint64_t action_flags,
1009                                   const struct rte_flow_action *action,
1010                                   const struct rte_flow_attr *attr,
1011                                   struct rte_flow_error *error)
1012 {
1013         if (action_flags & MLX5_FLOW_ACTION_DROP)
1014                 return rte_flow_error_set(error, EINVAL,
1015                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1016                                           "can't drop and decap in same flow");
1017         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1018                 return rte_flow_error_set(error, EINVAL,
1019                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1020                                           "can't have encap action before"
1021                                           " decap action");
1022         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
1023                 return rte_flow_error_set(error, EINVAL,
1024                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1025                                           "can only have a single decap"
1026                                           " action in a flow");
1027         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
1028                 return rte_flow_error_set(error, EINVAL,
1029                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1030                                           "can't have decap action after"
1031                                           " modify action");
1032         /* decap action is valid on egress only if it is followed by encap */
1033         if (attr->egress) {
1034                 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
1035                        action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
1036                        action++) {
1037                 }
1038                 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
1039                         return rte_flow_error_set
1040                                         (error, ENOTSUP,
1041                                          RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
1042                                          NULL, "decap action not supported"
1043                                          " for egress");
1044         }
1045         return 0;
1046 }
1047
1048 /**
1049  * Find existing encap/decap resource or create and register a new one.
1050  *
1051  * @param dev[in, out]
1052  *   Pointer to rte_eth_dev structure.
1053  * @param[in, out] resource
1054  *   Pointer to encap/decap resource.
1055  * @parm[in, out] dev_flow
1056  *   Pointer to the dev_flow.
1057  * @param[out] error
1058  *   pointer to error structure.
1059  *
1060  * @return
1061  *   0 on success otherwise -errno and errno is set.
1062  */
1063 static int
1064 flow_dv_encap_decap_resource_register
1065                         (struct rte_eth_dev *dev,
1066                          struct mlx5_flow_dv_encap_decap_resource *resource,
1067                          struct mlx5_flow *dev_flow,
1068                          struct rte_flow_error *error)
1069 {
1070         struct mlx5_priv *priv = dev->data->dev_private;
1071         struct mlx5_ibv_shared *sh = priv->sh;
1072         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
1073         struct rte_flow *flow = dev_flow->flow;
1074         struct mlx5dv_dr_domain *domain;
1075
1076         resource->flags = flow->group ? 0 : 1;
1077         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
1078                 domain = sh->fdb_domain;
1079         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
1080                 domain = sh->rx_domain;
1081         else
1082                 domain = sh->tx_domain;
1083
1084         /* Lookup a matching resource from cache. */
1085         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
1086                 if (resource->reformat_type == cache_resource->reformat_type &&
1087                     resource->ft_type == cache_resource->ft_type &&
1088                     resource->flags == cache_resource->flags &&
1089                     resource->size == cache_resource->size &&
1090                     !memcmp((const void *)resource->buf,
1091                             (const void *)cache_resource->buf,
1092                             resource->size)) {
1093                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
1094                                 (void *)cache_resource,
1095                                 rte_atomic32_read(&cache_resource->refcnt));
1096                         rte_atomic32_inc(&cache_resource->refcnt);
1097                         dev_flow->dv.encap_decap = cache_resource;
1098                         return 0;
1099                 }
1100         }
1101         /* Register new encap/decap resource. */
1102         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1103         if (!cache_resource)
1104                 return rte_flow_error_set(error, ENOMEM,
1105                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1106                                           "cannot allocate resource memory");
1107         *cache_resource = *resource;
1108         cache_resource->verbs_action =
1109                 mlx5_glue->dv_create_flow_action_packet_reformat
1110                         (sh->ctx, cache_resource->reformat_type,
1111                          cache_resource->ft_type, domain, cache_resource->flags,
1112                          cache_resource->size,
1113                          (cache_resource->size ? cache_resource->buf : NULL));
1114         if (!cache_resource->verbs_action) {
1115                 rte_free(cache_resource);
1116                 return rte_flow_error_set(error, ENOMEM,
1117                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1118                                           NULL, "cannot create action");
1119         }
1120         rte_atomic32_init(&cache_resource->refcnt);
1121         rte_atomic32_inc(&cache_resource->refcnt);
1122         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
1123         dev_flow->dv.encap_decap = cache_resource;
1124         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
1125                 (void *)cache_resource,
1126                 rte_atomic32_read(&cache_resource->refcnt));
1127         return 0;
1128 }
1129
1130 /**
1131  * Find existing table jump resource or create and register a new one.
1132  *
1133  * @param dev[in, out]
1134  *   Pointer to rte_eth_dev structure.
1135  * @param[in, out] resource
1136  *   Pointer to jump table resource.
1137  * @parm[in, out] dev_flow
1138  *   Pointer to the dev_flow.
1139  * @param[out] error
1140  *   pointer to error structure.
1141  *
1142  * @return
1143  *   0 on success otherwise -errno and errno is set.
1144  */
1145 static int
1146 flow_dv_jump_tbl_resource_register
1147                         (struct rte_eth_dev *dev,
1148                          struct mlx5_flow_dv_jump_tbl_resource *resource,
1149                          struct mlx5_flow *dev_flow,
1150                          struct rte_flow_error *error)
1151 {
1152         struct mlx5_priv *priv = dev->data->dev_private;
1153         struct mlx5_ibv_shared *sh = priv->sh;
1154         struct mlx5_flow_dv_jump_tbl_resource *cache_resource;
1155
1156         /* Lookup a matching resource from cache. */
1157         LIST_FOREACH(cache_resource, &sh->jump_tbl, next) {
1158                 if (resource->tbl == cache_resource->tbl) {
1159                         DRV_LOG(DEBUG, "jump table resource resource %p: refcnt %d++",
1160                                 (void *)cache_resource,
1161                                 rte_atomic32_read(&cache_resource->refcnt));
1162                         rte_atomic32_inc(&cache_resource->refcnt);
1163                         dev_flow->dv.jump = cache_resource;
1164                         return 0;
1165                 }
1166         }
1167         /* Register new jump table resource. */
1168         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1169         if (!cache_resource)
1170                 return rte_flow_error_set(error, ENOMEM,
1171                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1172                                           "cannot allocate resource memory");
1173         *cache_resource = *resource;
1174         cache_resource->action =
1175                 mlx5_glue->dr_create_flow_action_dest_flow_tbl
1176                 (resource->tbl->obj);
1177         if (!cache_resource->action) {
1178                 rte_free(cache_resource);
1179                 return rte_flow_error_set(error, ENOMEM,
1180                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1181                                           NULL, "cannot create action");
1182         }
1183         rte_atomic32_init(&cache_resource->refcnt);
1184         rte_atomic32_inc(&cache_resource->refcnt);
1185         LIST_INSERT_HEAD(&sh->jump_tbl, cache_resource, next);
1186         dev_flow->dv.jump = cache_resource;
1187         DRV_LOG(DEBUG, "new jump table  resource %p: refcnt %d++",
1188                 (void *)cache_resource,
1189                 rte_atomic32_read(&cache_resource->refcnt));
1190         return 0;
1191 }
1192
1193 /**
1194  * Find existing table port ID resource or create and register a new one.
1195  *
1196  * @param dev[in, out]
1197  *   Pointer to rte_eth_dev structure.
1198  * @param[in, out] resource
1199  *   Pointer to port ID action resource.
1200  * @parm[in, out] dev_flow
1201  *   Pointer to the dev_flow.
1202  * @param[out] error
1203  *   pointer to error structure.
1204  *
1205  * @return
1206  *   0 on success otherwise -errno and errno is set.
1207  */
1208 static int
1209 flow_dv_port_id_action_resource_register
1210                         (struct rte_eth_dev *dev,
1211                          struct mlx5_flow_dv_port_id_action_resource *resource,
1212                          struct mlx5_flow *dev_flow,
1213                          struct rte_flow_error *error)
1214 {
1215         struct mlx5_priv *priv = dev->data->dev_private;
1216         struct mlx5_ibv_shared *sh = priv->sh;
1217         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
1218
1219         /* Lookup a matching resource from cache. */
1220         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
1221                 if (resource->port_id == cache_resource->port_id) {
1222                         DRV_LOG(DEBUG, "port id action resource resource %p: "
1223                                 "refcnt %d++",
1224                                 (void *)cache_resource,
1225                                 rte_atomic32_read(&cache_resource->refcnt));
1226                         rte_atomic32_inc(&cache_resource->refcnt);
1227                         dev_flow->dv.port_id_action = cache_resource;
1228                         return 0;
1229                 }
1230         }
1231         /* Register new port id action resource. */
1232         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
1233         if (!cache_resource)
1234                 return rte_flow_error_set(error, ENOMEM,
1235                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1236                                           "cannot allocate resource memory");
1237         *cache_resource = *resource;
1238         cache_resource->action =
1239                 mlx5_glue->dr_create_flow_action_dest_vport
1240                         (priv->sh->fdb_domain, resource->port_id);
1241         if (!cache_resource->action) {
1242                 rte_free(cache_resource);
1243                 return rte_flow_error_set(error, ENOMEM,
1244                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1245                                           NULL, "cannot create action");
1246         }
1247         rte_atomic32_init(&cache_resource->refcnt);
1248         rte_atomic32_inc(&cache_resource->refcnt);
1249         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
1250         dev_flow->dv.port_id_action = cache_resource;
1251         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
1252                 (void *)cache_resource,
1253                 rte_atomic32_read(&cache_resource->refcnt));
1254         return 0;
1255 }
1256
1257 /**
1258  * Get the size of specific rte_flow_item_type
1259  *
1260  * @param[in] item_type
1261  *   Tested rte_flow_item_type.
1262  *
1263  * @return
1264  *   sizeof struct item_type, 0 if void or irrelevant.
1265  */
1266 static size_t
1267 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
1268 {
1269         size_t retval;
1270
1271         switch (item_type) {
1272         case RTE_FLOW_ITEM_TYPE_ETH:
1273                 retval = sizeof(struct rte_flow_item_eth);
1274                 break;
1275         case RTE_FLOW_ITEM_TYPE_VLAN:
1276                 retval = sizeof(struct rte_flow_item_vlan);
1277                 break;
1278         case RTE_FLOW_ITEM_TYPE_IPV4:
1279                 retval = sizeof(struct rte_flow_item_ipv4);
1280                 break;
1281         case RTE_FLOW_ITEM_TYPE_IPV6:
1282                 retval = sizeof(struct rte_flow_item_ipv6);
1283                 break;
1284         case RTE_FLOW_ITEM_TYPE_UDP:
1285                 retval = sizeof(struct rte_flow_item_udp);
1286                 break;
1287         case RTE_FLOW_ITEM_TYPE_TCP:
1288                 retval = sizeof(struct rte_flow_item_tcp);
1289                 break;
1290         case RTE_FLOW_ITEM_TYPE_VXLAN:
1291                 retval = sizeof(struct rte_flow_item_vxlan);
1292                 break;
1293         case RTE_FLOW_ITEM_TYPE_GRE:
1294                 retval = sizeof(struct rte_flow_item_gre);
1295                 break;
1296         case RTE_FLOW_ITEM_TYPE_NVGRE:
1297                 retval = sizeof(struct rte_flow_item_nvgre);
1298                 break;
1299         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1300                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
1301                 break;
1302         case RTE_FLOW_ITEM_TYPE_MPLS:
1303                 retval = sizeof(struct rte_flow_item_mpls);
1304                 break;
1305         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
1306         default:
1307                 retval = 0;
1308                 break;
1309         }
1310         return retval;
1311 }
1312
1313 #define MLX5_ENCAP_IPV4_VERSION         0x40
1314 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
1315 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
1316 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
1317 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
1318 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
1319 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
1320
1321 /**
1322  * Convert the encap action data from list of rte_flow_item to raw buffer
1323  *
1324  * @param[in] items
1325  *   Pointer to rte_flow_item objects list.
1326  * @param[out] buf
1327  *   Pointer to the output buffer.
1328  * @param[out] size
1329  *   Pointer to the output buffer size.
1330  * @param[out] error
1331  *   Pointer to the error structure.
1332  *
1333  * @return
1334  *   0 on success, a negative errno value otherwise and rte_errno is set.
1335  */
1336 static int
1337 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
1338                            size_t *size, struct rte_flow_error *error)
1339 {
1340         struct rte_ether_hdr *eth = NULL;
1341         struct rte_vlan_hdr *vlan = NULL;
1342         struct rte_ipv4_hdr *ipv4 = NULL;
1343         struct rte_ipv6_hdr *ipv6 = NULL;
1344         struct rte_udp_hdr *udp = NULL;
1345         struct rte_vxlan_hdr *vxlan = NULL;
1346         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
1347         struct rte_gre_hdr *gre = NULL;
1348         size_t len;
1349         size_t temp_size = 0;
1350
1351         if (!items)
1352                 return rte_flow_error_set(error, EINVAL,
1353                                           RTE_FLOW_ERROR_TYPE_ACTION,
1354                                           NULL, "invalid empty data");
1355         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
1356                 len = flow_dv_get_item_len(items->type);
1357                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
1358                         return rte_flow_error_set(error, EINVAL,
1359                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1360                                                   (void *)items->type,
1361                                                   "items total size is too big"
1362                                                   " for encap action");
1363                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
1364                 switch (items->type) {
1365                 case RTE_FLOW_ITEM_TYPE_ETH:
1366                         eth = (struct rte_ether_hdr *)&buf[temp_size];
1367                         break;
1368                 case RTE_FLOW_ITEM_TYPE_VLAN:
1369                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
1370                         if (!eth)
1371                                 return rte_flow_error_set(error, EINVAL,
1372                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1373                                                 (void *)items->type,
1374                                                 "eth header not found");
1375                         if (!eth->ether_type)
1376                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
1377                         break;
1378                 case RTE_FLOW_ITEM_TYPE_IPV4:
1379                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
1380                         if (!vlan && !eth)
1381                                 return rte_flow_error_set(error, EINVAL,
1382                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1383                                                 (void *)items->type,
1384                                                 "neither eth nor vlan"
1385                                                 " header found");
1386                         if (vlan && !vlan->eth_proto)
1387                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1388                         else if (eth && !eth->ether_type)
1389                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1390                         if (!ipv4->version_ihl)
1391                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
1392                                                     MLX5_ENCAP_IPV4_IHL_MIN;
1393                         if (!ipv4->time_to_live)
1394                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
1395                         break;
1396                 case RTE_FLOW_ITEM_TYPE_IPV6:
1397                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
1398                         if (!vlan && !eth)
1399                                 return rte_flow_error_set(error, EINVAL,
1400                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1401                                                 (void *)items->type,
1402                                                 "neither eth nor vlan"
1403                                                 " header found");
1404                         if (vlan && !vlan->eth_proto)
1405                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1406                         else if (eth && !eth->ether_type)
1407                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1408                         if (!ipv6->vtc_flow)
1409                                 ipv6->vtc_flow =
1410                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
1411                         if (!ipv6->hop_limits)
1412                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
1413                         break;
1414                 case RTE_FLOW_ITEM_TYPE_UDP:
1415                         udp = (struct rte_udp_hdr *)&buf[temp_size];
1416                         if (!ipv4 && !ipv6)
1417                                 return rte_flow_error_set(error, EINVAL,
1418                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1419                                                 (void *)items->type,
1420                                                 "ip header not found");
1421                         if (ipv4 && !ipv4->next_proto_id)
1422                                 ipv4->next_proto_id = IPPROTO_UDP;
1423                         else if (ipv6 && !ipv6->proto)
1424                                 ipv6->proto = IPPROTO_UDP;
1425                         break;
1426                 case RTE_FLOW_ITEM_TYPE_VXLAN:
1427                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
1428                         if (!udp)
1429                                 return rte_flow_error_set(error, EINVAL,
1430                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1431                                                 (void *)items->type,
1432                                                 "udp header not found");
1433                         if (!udp->dst_port)
1434                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
1435                         if (!vxlan->vx_flags)
1436                                 vxlan->vx_flags =
1437                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
1438                         break;
1439                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
1440                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
1441                         if (!udp)
1442                                 return rte_flow_error_set(error, EINVAL,
1443                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1444                                                 (void *)items->type,
1445                                                 "udp header not found");
1446                         if (!vxlan_gpe->proto)
1447                                 return rte_flow_error_set(error, EINVAL,
1448                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1449                                                 (void *)items->type,
1450                                                 "next protocol not found");
1451                         if (!udp->dst_port)
1452                                 udp->dst_port =
1453                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
1454                         if (!vxlan_gpe->vx_flags)
1455                                 vxlan_gpe->vx_flags =
1456                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
1457                         break;
1458                 case RTE_FLOW_ITEM_TYPE_GRE:
1459                 case RTE_FLOW_ITEM_TYPE_NVGRE:
1460                         gre = (struct rte_gre_hdr *)&buf[temp_size];
1461                         if (!gre->proto)
1462                                 return rte_flow_error_set(error, EINVAL,
1463                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1464                                                 (void *)items->type,
1465                                                 "next protocol not found");
1466                         if (!ipv4 && !ipv6)
1467                                 return rte_flow_error_set(error, EINVAL,
1468                                                 RTE_FLOW_ERROR_TYPE_ACTION,
1469                                                 (void *)items->type,
1470                                                 "ip header not found");
1471                         if (ipv4 && !ipv4->next_proto_id)
1472                                 ipv4->next_proto_id = IPPROTO_GRE;
1473                         else if (ipv6 && !ipv6->proto)
1474                                 ipv6->proto = IPPROTO_GRE;
1475                         break;
1476                 case RTE_FLOW_ITEM_TYPE_VOID:
1477                         break;
1478                 default:
1479                         return rte_flow_error_set(error, EINVAL,
1480                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1481                                                   (void *)items->type,
1482                                                   "unsupported item type");
1483                         break;
1484                 }
1485                 temp_size += len;
1486         }
1487         *size = temp_size;
1488         return 0;
1489 }
1490
1491 static int
1492 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
1493 {
1494         struct rte_ether_hdr *eth = NULL;
1495         struct rte_vlan_hdr *vlan = NULL;
1496         struct rte_ipv6_hdr *ipv6 = NULL;
1497         struct rte_udp_hdr *udp = NULL;
1498         char *next_hdr;
1499         uint16_t proto;
1500
1501         eth = (struct rte_ether_hdr *)data;
1502         next_hdr = (char *)(eth + 1);
1503         proto = RTE_BE16(eth->ether_type);
1504
1505         /* VLAN skipping */
1506         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
1507                 next_hdr += sizeof(struct rte_vlan_hdr);
1508                 vlan = (struct rte_vlan_hdr *)next_hdr;
1509                 proto = RTE_BE16(vlan->eth_proto);
1510         }
1511
1512         /* HW calculates IPv4 csum. no need to proceed */
1513         if (proto == RTE_ETHER_TYPE_IPV4)
1514                 return 0;
1515
1516         /* non IPv4/IPv6 header. not supported */
1517         if (proto != RTE_ETHER_TYPE_IPV6) {
1518                 return rte_flow_error_set(error, ENOTSUP,
1519                                           RTE_FLOW_ERROR_TYPE_ACTION,
1520                                           NULL, "Cannot offload non IPv4/IPv6");
1521         }
1522
1523         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
1524
1525         /* ignore non UDP */
1526         if (ipv6->proto != IPPROTO_UDP)
1527                 return 0;
1528
1529         udp = (struct rte_udp_hdr *)(ipv6 + 1);
1530         udp->dgram_cksum = 0;
1531
1532         return 0;
1533 }
1534
1535 /**
1536  * Convert L2 encap action to DV specification.
1537  *
1538  * @param[in] dev
1539  *   Pointer to rte_eth_dev structure.
1540  * @param[in] action
1541  *   Pointer to action structure.
1542  * @param[in, out] dev_flow
1543  *   Pointer to the mlx5_flow.
1544  * @param[in] transfer
1545  *   Mark if the flow is E-Switch flow.
1546  * @param[out] error
1547  *   Pointer to the error structure.
1548  *
1549  * @return
1550  *   0 on success, a negative errno value otherwise and rte_errno is set.
1551  */
1552 static int
1553 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
1554                                const struct rte_flow_action *action,
1555                                struct mlx5_flow *dev_flow,
1556                                uint8_t transfer,
1557                                struct rte_flow_error *error)
1558 {
1559         const struct rte_flow_item *encap_data;
1560         const struct rte_flow_action_raw_encap *raw_encap_data;
1561         struct mlx5_flow_dv_encap_decap_resource res = {
1562                 .reformat_type =
1563                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
1564                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1565                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
1566         };
1567
1568         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
1569                 raw_encap_data =
1570                         (const struct rte_flow_action_raw_encap *)action->conf;
1571                 res.size = raw_encap_data->size;
1572                 memcpy(res.buf, raw_encap_data->data, res.size);
1573                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
1574                         return -rte_errno;
1575         } else {
1576                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
1577                         encap_data =
1578                                 ((const struct rte_flow_action_vxlan_encap *)
1579                                                 action->conf)->definition;
1580                 else
1581                         encap_data =
1582                                 ((const struct rte_flow_action_nvgre_encap *)
1583                                                 action->conf)->definition;
1584                 if (flow_dv_convert_encap_data(encap_data, res.buf,
1585                                                &res.size, error))
1586                         return -rte_errno;
1587         }
1588         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1589                 return rte_flow_error_set(error, EINVAL,
1590                                           RTE_FLOW_ERROR_TYPE_ACTION,
1591                                           NULL, "can't create L2 encap action");
1592         return 0;
1593 }
1594
1595 /**
1596  * Convert L2 decap action to DV specification.
1597  *
1598  * @param[in] dev
1599  *   Pointer to rte_eth_dev structure.
1600  * @param[in, out] dev_flow
1601  *   Pointer to the mlx5_flow.
1602  * @param[in] transfer
1603  *   Mark if the flow is E-Switch flow.
1604  * @param[out] error
1605  *   Pointer to the error structure.
1606  *
1607  * @return
1608  *   0 on success, a negative errno value otherwise and rte_errno is set.
1609  */
1610 static int
1611 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
1612                                struct mlx5_flow *dev_flow,
1613                                uint8_t transfer,
1614                                struct rte_flow_error *error)
1615 {
1616         struct mlx5_flow_dv_encap_decap_resource res = {
1617                 .size = 0,
1618                 .reformat_type =
1619                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
1620                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
1621                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
1622         };
1623
1624         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1625                 return rte_flow_error_set(error, EINVAL,
1626                                           RTE_FLOW_ERROR_TYPE_ACTION,
1627                                           NULL, "can't create L2 decap action");
1628         return 0;
1629 }
1630
1631 /**
1632  * Convert raw decap/encap (L3 tunnel) action to DV specification.
1633  *
1634  * @param[in] dev
1635  *   Pointer to rte_eth_dev structure.
1636  * @param[in] action
1637  *   Pointer to action structure.
1638  * @param[in, out] dev_flow
1639  *   Pointer to the mlx5_flow.
1640  * @param[in] attr
1641  *   Pointer to the flow attributes.
1642  * @param[out] error
1643  *   Pointer to the error structure.
1644  *
1645  * @return
1646  *   0 on success, a negative errno value otherwise and rte_errno is set.
1647  */
1648 static int
1649 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
1650                                 const struct rte_flow_action *action,
1651                                 struct mlx5_flow *dev_flow,
1652                                 const struct rte_flow_attr *attr,
1653                                 struct rte_flow_error *error)
1654 {
1655         const struct rte_flow_action_raw_encap *encap_data;
1656         struct mlx5_flow_dv_encap_decap_resource res;
1657
1658         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
1659         res.size = encap_data->size;
1660         memcpy(res.buf, encap_data->data, res.size);
1661         res.reformat_type = attr->egress ?
1662                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL :
1663                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
1664         if (attr->transfer)
1665                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
1666         else
1667                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
1668                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
1669         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
1670                 return rte_flow_error_set(error, EINVAL,
1671                                           RTE_FLOW_ERROR_TYPE_ACTION,
1672                                           NULL, "can't create encap action");
1673         return 0;
1674 }
1675
1676 /**
1677  * Validate the modify-header actions.
1678  *
1679  * @param[in] action_flags
1680  *   Holds the actions detected until now.
1681  * @param[in] action
1682  *   Pointer to the modify action.
1683  * @param[out] error
1684  *   Pointer to error structure.
1685  *
1686  * @return
1687  *   0 on success, a negative errno value otherwise and rte_errno is set.
1688  */
1689 static int
1690 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
1691                                    const struct rte_flow_action *action,
1692                                    struct rte_flow_error *error)
1693 {
1694         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
1695                 return rte_flow_error_set(error, EINVAL,
1696                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1697                                           NULL, "action configuration not set");
1698         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
1699                 return rte_flow_error_set(error, EINVAL,
1700                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1701                                           "can't have encap action before"
1702                                           " modify action");
1703         return 0;
1704 }
1705
1706 /**
1707  * Validate the modify-header MAC address actions.
1708  *
1709  * @param[in] action_flags
1710  *   Holds the actions detected until now.
1711  * @param[in] action
1712  *   Pointer to the modify action.
1713  * @param[in] item_flags
1714  *   Holds the items detected.
1715  * @param[out] error
1716  *   Pointer to error structure.
1717  *
1718  * @return
1719  *   0 on success, a negative errno value otherwise and rte_errno is set.
1720  */
1721 static int
1722 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
1723                                    const struct rte_flow_action *action,
1724                                    const uint64_t item_flags,
1725                                    struct rte_flow_error *error)
1726 {
1727         int ret = 0;
1728
1729         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1730         if (!ret) {
1731                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
1732                         return rte_flow_error_set(error, EINVAL,
1733                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1734                                                   NULL,
1735                                                   "no L2 item in pattern");
1736         }
1737         return ret;
1738 }
1739
1740 /**
1741  * Validate the modify-header IPv4 address actions.
1742  *
1743  * @param[in] action_flags
1744  *   Holds the actions detected until now.
1745  * @param[in] action
1746  *   Pointer to the modify action.
1747  * @param[in] item_flags
1748  *   Holds the items detected.
1749  * @param[out] error
1750  *   Pointer to error structure.
1751  *
1752  * @return
1753  *   0 on success, a negative errno value otherwise and rte_errno is set.
1754  */
1755 static int
1756 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
1757                                     const struct rte_flow_action *action,
1758                                     const uint64_t item_flags,
1759                                     struct rte_flow_error *error)
1760 {
1761         int ret = 0;
1762
1763         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1764         if (!ret) {
1765                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
1766                         return rte_flow_error_set(error, EINVAL,
1767                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1768                                                   NULL,
1769                                                   "no ipv4 item in pattern");
1770         }
1771         return ret;
1772 }
1773
1774 /**
1775  * Validate the modify-header IPv6 address actions.
1776  *
1777  * @param[in] action_flags
1778  *   Holds the actions detected until now.
1779  * @param[in] action
1780  *   Pointer to the modify action.
1781  * @param[in] item_flags
1782  *   Holds the items detected.
1783  * @param[out] error
1784  *   Pointer to error structure.
1785  *
1786  * @return
1787  *   0 on success, a negative errno value otherwise and rte_errno is set.
1788  */
1789 static int
1790 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
1791                                     const struct rte_flow_action *action,
1792                                     const uint64_t item_flags,
1793                                     struct rte_flow_error *error)
1794 {
1795         int ret = 0;
1796
1797         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1798         if (!ret) {
1799                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
1800                         return rte_flow_error_set(error, EINVAL,
1801                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1802                                                   NULL,
1803                                                   "no ipv6 item in pattern");
1804         }
1805         return ret;
1806 }
1807
1808 /**
1809  * Validate the modify-header TP actions.
1810  *
1811  * @param[in] action_flags
1812  *   Holds the actions detected until now.
1813  * @param[in] action
1814  *   Pointer to the modify action.
1815  * @param[in] item_flags
1816  *   Holds the items detected.
1817  * @param[out] error
1818  *   Pointer to error structure.
1819  *
1820  * @return
1821  *   0 on success, a negative errno value otherwise and rte_errno is set.
1822  */
1823 static int
1824 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
1825                                   const struct rte_flow_action *action,
1826                                   const uint64_t item_flags,
1827                                   struct rte_flow_error *error)
1828 {
1829         int ret = 0;
1830
1831         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1832         if (!ret) {
1833                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
1834                         return rte_flow_error_set(error, EINVAL,
1835                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1836                                                   NULL, "no transport layer "
1837                                                   "in pattern");
1838         }
1839         return ret;
1840 }
1841
1842 /**
1843  * Validate the modify-header actions of increment/decrement
1844  * TCP Sequence-number.
1845  *
1846  * @param[in] action_flags
1847  *   Holds the actions detected until now.
1848  * @param[in] action
1849  *   Pointer to the modify action.
1850  * @param[in] item_flags
1851  *   Holds the items detected.
1852  * @param[out] error
1853  *   Pointer to error structure.
1854  *
1855  * @return
1856  *   0 on success, a negative errno value otherwise and rte_errno is set.
1857  */
1858 static int
1859 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
1860                                        const struct rte_flow_action *action,
1861                                        const uint64_t item_flags,
1862                                        struct rte_flow_error *error)
1863 {
1864         int ret = 0;
1865
1866         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1867         if (!ret) {
1868                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
1869                         return rte_flow_error_set(error, EINVAL,
1870                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1871                                                   NULL, "no TCP item in"
1872                                                   " pattern");
1873                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
1874                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
1875                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
1876                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
1877                         return rte_flow_error_set(error, EINVAL,
1878                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1879                                                   NULL,
1880                                                   "cannot decrease and increase"
1881                                                   " TCP sequence number"
1882                                                   " at the same time");
1883         }
1884         return ret;
1885 }
1886
1887 /**
1888  * Validate the modify-header actions of increment/decrement
1889  * TCP Acknowledgment number.
1890  *
1891  * @param[in] action_flags
1892  *   Holds the actions detected until now.
1893  * @param[in] action
1894  *   Pointer to the modify action.
1895  * @param[in] item_flags
1896  *   Holds the items detected.
1897  * @param[out] error
1898  *   Pointer to error structure.
1899  *
1900  * @return
1901  *   0 on success, a negative errno value otherwise and rte_errno is set.
1902  */
1903 static int
1904 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
1905                                        const struct rte_flow_action *action,
1906                                        const uint64_t item_flags,
1907                                        struct rte_flow_error *error)
1908 {
1909         int ret = 0;
1910
1911         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1912         if (!ret) {
1913                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
1914                         return rte_flow_error_set(error, EINVAL,
1915                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1916                                                   NULL, "no TCP item in"
1917                                                   " pattern");
1918                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
1919                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
1920                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
1921                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
1922                         return rte_flow_error_set(error, EINVAL,
1923                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1924                                                   NULL,
1925                                                   "cannot decrease and increase"
1926                                                   " TCP acknowledgment number"
1927                                                   " at the same time");
1928         }
1929         return ret;
1930 }
1931
1932 /**
1933  * Validate the modify-header TTL actions.
1934  *
1935  * @param[in] action_flags
1936  *   Holds the actions detected until now.
1937  * @param[in] action
1938  *   Pointer to the modify action.
1939  * @param[in] item_flags
1940  *   Holds the items detected.
1941  * @param[out] error
1942  *   Pointer to error structure.
1943  *
1944  * @return
1945  *   0 on success, a negative errno value otherwise and rte_errno is set.
1946  */
1947 static int
1948 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
1949                                    const struct rte_flow_action *action,
1950                                    const uint64_t item_flags,
1951                                    struct rte_flow_error *error)
1952 {
1953         int ret = 0;
1954
1955         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
1956         if (!ret) {
1957                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
1958                         return rte_flow_error_set(error, EINVAL,
1959                                                   RTE_FLOW_ERROR_TYPE_ACTION,
1960                                                   NULL,
1961                                                   "no IP protocol in pattern");
1962         }
1963         return ret;
1964 }
1965
1966 /**
1967  * Validate jump action.
1968  *
1969  * @param[in] action
1970  *   Pointer to the modify action.
1971  * @param[in] group
1972  *   The group of the current flow.
1973  * @param[out] error
1974  *   Pointer to error structure.
1975  *
1976  * @return
1977  *   0 on success, a negative errno value otherwise and rte_errno is set.
1978  */
1979 static int
1980 flow_dv_validate_action_jump(const struct rte_flow_action *action,
1981                              uint32_t group,
1982                              struct rte_flow_error *error)
1983 {
1984         if (action->type != RTE_FLOW_ACTION_TYPE_JUMP && !action->conf)
1985                 return rte_flow_error_set(error, EINVAL,
1986                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1987                                           NULL, "action configuration not set");
1988         if (group >= ((const struct rte_flow_action_jump *)action->conf)->group)
1989                 return rte_flow_error_set(error, EINVAL,
1990                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1991                                           "target group must be higher then"
1992                                           " the current flow group");
1993         return 0;
1994 }
1995
1996 /*
1997  * Validate the port_id action.
1998  *
1999  * @param[in] dev
2000  *   Pointer to rte_eth_dev structure.
2001  * @param[in] action_flags
2002  *   Bit-fields that holds the actions detected until now.
2003  * @param[in] action
2004  *   Port_id RTE action structure.
2005  * @param[in] attr
2006  *   Attributes of flow that includes this action.
2007  * @param[out] error
2008  *   Pointer to error structure.
2009  *
2010  * @return
2011  *   0 on success, a negative errno value otherwise and rte_errno is set.
2012  */
2013 static int
2014 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
2015                                 uint64_t action_flags,
2016                                 const struct rte_flow_action *action,
2017                                 const struct rte_flow_attr *attr,
2018                                 struct rte_flow_error *error)
2019 {
2020         const struct rte_flow_action_port_id *port_id;
2021         uint16_t port;
2022         uint16_t esw_domain_id;
2023         uint16_t act_port_domain_id;
2024         int ret;
2025
2026         if (!attr->transfer)
2027                 return rte_flow_error_set(error, ENOTSUP,
2028                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2029                                           NULL,
2030                                           "port id action is valid in transfer"
2031                                           " mode only");
2032         if (!action || !action->conf)
2033                 return rte_flow_error_set(error, ENOTSUP,
2034                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2035                                           NULL,
2036                                           "port id action parameters must be"
2037                                           " specified");
2038         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
2039                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2042                                           "can have only one fate actions in"
2043                                           " a flow");
2044         ret = mlx5_port_to_eswitch_info(dev->data->port_id,
2045                                         &esw_domain_id, NULL);
2046         if (ret < 0)
2047                 return rte_flow_error_set(error, -ret,
2048                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2049                                           NULL,
2050                                           "failed to obtain E-Switch info");
2051         port_id = action->conf;
2052         port = port_id->original ? dev->data->port_id : port_id->id;
2053         ret = mlx5_port_to_eswitch_info(port, &act_port_domain_id, NULL);
2054         if (ret)
2055                 return rte_flow_error_set
2056                                 (error, -ret,
2057                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
2058                                  "failed to obtain E-Switch port id for port");
2059         if (act_port_domain_id != esw_domain_id)
2060                 return rte_flow_error_set
2061                                 (error, -ret,
2062                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2063                                  "port does not belong to"
2064                                  " E-Switch being configured");
2065         return 0;
2066 }
2067
2068 /**
2069  * Find existing modify-header resource or create and register a new one.
2070  *
2071  * @param dev[in, out]
2072  *   Pointer to rte_eth_dev structure.
2073  * @param[in, out] resource
2074  *   Pointer to modify-header resource.
2075  * @parm[in, out] dev_flow
2076  *   Pointer to the dev_flow.
2077  * @param[out] error
2078  *   pointer to error structure.
2079  *
2080  * @return
2081  *   0 on success otherwise -errno and errno is set.
2082  */
2083 static int
2084 flow_dv_modify_hdr_resource_register
2085                         (struct rte_eth_dev *dev,
2086                          struct mlx5_flow_dv_modify_hdr_resource *resource,
2087                          struct mlx5_flow *dev_flow,
2088                          struct rte_flow_error *error)
2089 {
2090         struct mlx5_priv *priv = dev->data->dev_private;
2091         struct mlx5_ibv_shared *sh = priv->sh;
2092         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
2093         struct mlx5dv_dr_domain *ns;
2094
2095         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2096                 ns = sh->fdb_domain;
2097         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
2098                 ns = sh->tx_domain;
2099         else
2100                 ns = sh->rx_domain;
2101         resource->flags =
2102                 dev_flow->flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
2103         /* Lookup a matching resource from cache. */
2104         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
2105                 if (resource->ft_type == cache_resource->ft_type &&
2106                     resource->actions_num == cache_resource->actions_num &&
2107                     resource->flags == cache_resource->flags &&
2108                     !memcmp((const void *)resource->actions,
2109                             (const void *)cache_resource->actions,
2110                             (resource->actions_num *
2111                                             sizeof(resource->actions[0])))) {
2112                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
2113                                 (void *)cache_resource,
2114                                 rte_atomic32_read(&cache_resource->refcnt));
2115                         rte_atomic32_inc(&cache_resource->refcnt);
2116                         dev_flow->dv.modify_hdr = cache_resource;
2117                         return 0;
2118                 }
2119         }
2120         /* Register new modify-header resource. */
2121         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2122         if (!cache_resource)
2123                 return rte_flow_error_set(error, ENOMEM,
2124                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2125                                           "cannot allocate resource memory");
2126         *cache_resource = *resource;
2127         cache_resource->verbs_action =
2128                 mlx5_glue->dv_create_flow_action_modify_header
2129                                         (sh->ctx, cache_resource->ft_type,
2130                                          ns, cache_resource->flags,
2131                                          cache_resource->actions_num *
2132                                          sizeof(cache_resource->actions[0]),
2133                                          (uint64_t *)cache_resource->actions);
2134         if (!cache_resource->verbs_action) {
2135                 rte_free(cache_resource);
2136                 return rte_flow_error_set(error, ENOMEM,
2137                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2138                                           NULL, "cannot create action");
2139         }
2140         rte_atomic32_init(&cache_resource->refcnt);
2141         rte_atomic32_inc(&cache_resource->refcnt);
2142         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
2143         dev_flow->dv.modify_hdr = cache_resource;
2144         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
2145                 (void *)cache_resource,
2146                 rte_atomic32_read(&cache_resource->refcnt));
2147         return 0;
2148 }
2149
2150 #define MLX5_CNT_CONTAINER_RESIZE 64
2151
2152 /**
2153  * Get a pool by a counter.
2154  *
2155  * @param[in] cnt
2156  *   Pointer to the counter.
2157  *
2158  * @return
2159  *   The counter pool.
2160  */
2161 static struct mlx5_flow_counter_pool *
2162 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
2163 {
2164         if (!cnt->batch) {
2165                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
2166                 return (struct mlx5_flow_counter_pool *)cnt - 1;
2167         }
2168         return cnt->pool;
2169 }
2170
2171 /**
2172  * Get a pool by devx counter ID.
2173  *
2174  * @param[in] cont
2175  *   Pointer to the counter container.
2176  * @param[in] id
2177  *   The counter devx ID.
2178  *
2179  * @return
2180  *   The counter pool pointer if exists, NULL otherwise,
2181  */
2182 static struct mlx5_flow_counter_pool *
2183 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
2184 {
2185         struct mlx5_flow_counter_pool *pool;
2186
2187         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2188                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
2189                                 MLX5_COUNTERS_PER_POOL;
2190
2191                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
2192                         return pool;
2193         };
2194         return NULL;
2195 }
2196
2197 /**
2198  * Allocate a new memory for the counter values wrapped by all the needed
2199  * management.
2200  *
2201  * @param[in] dev
2202  *   Pointer to the Ethernet device structure.
2203  * @param[in] raws_n
2204  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
2205  *
2206  * @return
2207  *   The new memory management pointer on success, otherwise NULL and rte_errno
2208  *   is set.
2209  */
2210 static struct mlx5_counter_stats_mem_mng *
2211 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
2212 {
2213         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
2214                                         (dev->data->dev_private))->sh;
2215         struct mlx5dv_pd dv_pd;
2216         struct mlx5dv_obj dv_obj;
2217         struct mlx5_devx_mkey_attr mkey_attr;
2218         struct mlx5_counter_stats_mem_mng *mem_mng;
2219         volatile struct flow_counter_stats *raw_data;
2220         int size = (sizeof(struct flow_counter_stats) *
2221                         MLX5_COUNTERS_PER_POOL +
2222                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
2223                         sizeof(struct mlx5_counter_stats_mem_mng);
2224         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
2225         int i;
2226
2227         if (!mem) {
2228                 rte_errno = ENOMEM;
2229                 return NULL;
2230         }
2231         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
2232         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
2233         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
2234                                                  IBV_ACCESS_LOCAL_WRITE);
2235         if (!mem_mng->umem) {
2236                 rte_errno = errno;
2237                 rte_free(mem);
2238                 return NULL;
2239         }
2240         dv_obj.pd.in = sh->pd;
2241         dv_obj.pd.out = &dv_pd;
2242         mlx5_glue->dv_init_obj(&dv_obj, MLX5DV_OBJ_PD);
2243         mkey_attr.addr = (uintptr_t)mem;
2244         mkey_attr.size = size;
2245         mkey_attr.umem_id = mem_mng->umem->umem_id;
2246         mkey_attr.pd = dv_pd.pdn;
2247         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
2248         if (!mem_mng->dm) {
2249                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
2250                 rte_errno = errno;
2251                 rte_free(mem);
2252                 return NULL;
2253         }
2254         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
2255         raw_data = (volatile struct flow_counter_stats *)mem;
2256         for (i = 0; i < raws_n; ++i) {
2257                 mem_mng->raws[i].mem_mng = mem_mng;
2258                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
2259         }
2260         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
2261         return mem_mng;
2262 }
2263
2264 /**
2265  * Resize a counter container.
2266  *
2267  * @param[in] dev
2268  *   Pointer to the Ethernet device structure.
2269  * @param[in] batch
2270  *   Whether the pool is for counter that was allocated by batch command.
2271  *
2272  * @return
2273  *   The new container pointer on success, otherwise NULL and rte_errno is set.
2274  */
2275 static struct mlx5_pools_container *
2276 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
2277 {
2278         struct mlx5_priv *priv = dev->data->dev_private;
2279         struct mlx5_pools_container *cont =
2280                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
2281         struct mlx5_pools_container *new_cont =
2282                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
2283         struct mlx5_counter_stats_mem_mng *mem_mng;
2284         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
2285         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
2286         int i;
2287
2288         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
2289                 /* The last resize still hasn't detected by the host thread. */
2290                 rte_errno = EAGAIN;
2291                 return NULL;
2292         }
2293         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
2294         if (!new_cont->pools) {
2295                 rte_errno = ENOMEM;
2296                 return NULL;
2297         }
2298         if (cont->n)
2299                 memcpy(new_cont->pools, cont->pools, cont->n *
2300                        sizeof(struct mlx5_flow_counter_pool *));
2301         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
2302                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
2303         if (!mem_mng) {
2304                 rte_free(new_cont->pools);
2305                 return NULL;
2306         }
2307         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
2308                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
2309                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
2310                                  i, next);
2311         new_cont->n = resize;
2312         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
2313         TAILQ_INIT(&new_cont->pool_list);
2314         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
2315         new_cont->init_mem_mng = mem_mng;
2316         rte_cio_wmb();
2317          /* Flip the master container. */
2318         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
2319         return new_cont;
2320 }
2321
2322 /**
2323  * Query a devx flow counter.
2324  *
2325  * @param[in] dev
2326  *   Pointer to the Ethernet device structure.
2327  * @param[in] cnt
2328  *   Pointer to the flow counter.
2329  * @param[out] pkts
2330  *   The statistics value of packets.
2331  * @param[out] bytes
2332  *   The statistics value of bytes.
2333  *
2334  * @return
2335  *   0 on success, otherwise a negative errno value and rte_errno is set.
2336  */
2337 static inline int
2338 _flow_dv_query_count(struct rte_eth_dev *dev __rte_unused,
2339                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
2340                      uint64_t *bytes)
2341 {
2342         struct mlx5_flow_counter_pool *pool =
2343                         flow_dv_counter_pool_get(cnt);
2344         int offset = cnt - &pool->counters_raw[0];
2345
2346         rte_spinlock_lock(&pool->sl);
2347         /*
2348          * The single counters allocation may allocate smaller ID than the
2349          * current allocated in parallel to the host reading.
2350          * In this case the new counter values must be reported as 0.
2351          */
2352         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
2353                 *pkts = 0;
2354                 *bytes = 0;
2355         } else {
2356                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
2357                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
2358         }
2359         rte_spinlock_unlock(&pool->sl);
2360         return 0;
2361 }
2362
2363 /**
2364  * Create and initialize a new counter pool.
2365  *
2366  * @param[in] dev
2367  *   Pointer to the Ethernet device structure.
2368  * @param[out] dcs
2369  *   The devX counter handle.
2370  * @param[in] batch
2371  *   Whether the pool is for counter that was allocated by batch command.
2372  *
2373  * @return
2374  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
2375  */
2376 static struct mlx5_flow_counter_pool *
2377 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
2378                     uint32_t batch)
2379 {
2380         struct mlx5_priv *priv = dev->data->dev_private;
2381         struct mlx5_flow_counter_pool *pool;
2382         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
2383                                                                0);
2384         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
2385         uint32_t size;
2386
2387         if (cont->n == n_valid) {
2388                 cont = flow_dv_container_resize(dev, batch);
2389                 if (!cont)
2390                         return NULL;
2391         }
2392         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
2393                         sizeof(struct mlx5_flow_counter);
2394         pool = rte_calloc(__func__, 1, size, 0);
2395         if (!pool) {
2396                 rte_errno = ENOMEM;
2397                 return NULL;
2398         }
2399         pool->min_dcs = dcs;
2400         pool->raw = cont->init_mem_mng->raws + n_valid %
2401                                                      MLX5_CNT_CONTAINER_RESIZE;
2402         pool->raw_hw = NULL;
2403         rte_spinlock_init(&pool->sl);
2404         /*
2405          * The generation of the new allocated counters in this pool is 0, 2 in
2406          * the pool generation makes all the counters valid for allocation.
2407          */
2408         rte_atomic64_set(&pool->query_gen, 0x2);
2409         TAILQ_INIT(&pool->counters);
2410         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
2411         cont->pools[n_valid] = pool;
2412         /* Pool initialization must be updated before host thread access. */
2413         rte_cio_wmb();
2414         rte_atomic16_add(&cont->n_valid, 1);
2415         return pool;
2416 }
2417
2418 /**
2419  * Prepare a new counter and/or a new counter pool.
2420  *
2421  * @param[in] dev
2422  *   Pointer to the Ethernet device structure.
2423  * @param[out] cnt_free
2424  *   Where to put the pointer of a new counter.
2425  * @param[in] batch
2426  *   Whether the pool is for counter that was allocated by batch command.
2427  *
2428  * @return
2429  *   The free counter pool pointer and @p cnt_free is set on success,
2430  *   NULL otherwise and rte_errno is set.
2431  */
2432 static struct mlx5_flow_counter_pool *
2433 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
2434                              struct mlx5_flow_counter **cnt_free,
2435                              uint32_t batch)
2436 {
2437         struct mlx5_priv *priv = dev->data->dev_private;
2438         struct mlx5_flow_counter_pool *pool;
2439         struct mlx5_devx_obj *dcs = NULL;
2440         struct mlx5_flow_counter *cnt;
2441         uint32_t i;
2442
2443         if (!batch) {
2444                 /* bulk_bitmap must be 0 for single counter allocation. */
2445                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
2446                 if (!dcs)
2447                         return NULL;
2448                 pool = flow_dv_find_pool_by_id
2449                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
2450                 if (!pool) {
2451                         pool = flow_dv_pool_create(dev, dcs, batch);
2452                         if (!pool) {
2453                                 mlx5_devx_cmd_destroy(dcs);
2454                                 return NULL;
2455                         }
2456                 } else if (dcs->id < pool->min_dcs->id) {
2457                         rte_atomic64_set(&pool->a64_dcs,
2458                                          (int64_t)(uintptr_t)dcs);
2459                 }
2460                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
2461                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
2462                 cnt->dcs = dcs;
2463                 *cnt_free = cnt;
2464                 return pool;
2465         }
2466         /* bulk_bitmap is in 128 counters units. */
2467         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
2468                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
2469         if (!dcs) {
2470                 rte_errno = ENODATA;
2471                 return NULL;
2472         }
2473         pool = flow_dv_pool_create(dev, dcs, batch);
2474         if (!pool) {
2475                 mlx5_devx_cmd_destroy(dcs);
2476                 return NULL;
2477         }
2478         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
2479                 cnt = &pool->counters_raw[i];
2480                 cnt->pool = pool;
2481                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
2482         }
2483         *cnt_free = &pool->counters_raw[0];
2484         return pool;
2485 }
2486
2487 /**
2488  * Search for existed shared counter.
2489  *
2490  * @param[in] cont
2491  *   Pointer to the relevant counter pool container.
2492  * @param[in] id
2493  *   The shared counter ID to search.
2494  *
2495  * @return
2496  *   NULL if not existed, otherwise pointer to the shared counter.
2497  */
2498 static struct mlx5_flow_counter *
2499 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
2500                               uint32_t id)
2501 {
2502         static struct mlx5_flow_counter *cnt;
2503         struct mlx5_flow_counter_pool *pool;
2504         int i;
2505
2506         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2507                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
2508                         cnt = &pool->counters_raw[i];
2509                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
2510                                 return cnt;
2511                 }
2512         }
2513         return NULL;
2514 }
2515
2516 /**
2517  * Allocate a flow counter.
2518  *
2519  * @param[in] dev
2520  *   Pointer to the Ethernet device structure.
2521  * @param[in] shared
2522  *   Indicate if this counter is shared with other flows.
2523  * @param[in] id
2524  *   Counter identifier.
2525  * @param[in] group
2526  *   Counter flow group.
2527  *
2528  * @return
2529  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
2530  */
2531 static struct mlx5_flow_counter *
2532 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
2533                       uint16_t group)
2534 {
2535         struct mlx5_priv *priv = dev->data->dev_private;
2536         struct mlx5_flow_counter_pool *pool = NULL;
2537         struct mlx5_flow_counter *cnt_free = NULL;
2538         /*
2539          * Currently group 0 flow counter cannot be assigned to a flow if it is
2540          * not the first one in the batch counter allocation, so it is better
2541          * to allocate counters one by one for these flows in a separate
2542          * container.
2543          * A counter can be shared between different groups so need to take
2544          * shared counters from the single container.
2545          */
2546         uint32_t batch = (group && !shared) ? 1 : 0;
2547         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
2548                                                                0);
2549
2550 #ifndef HAVE_IBV_DEVX_ASYNC
2551         rte_errno = ENOTSUP;
2552         return NULL;
2553 #endif
2554         if (!priv->config.devx) {
2555                 rte_errno = ENOTSUP;
2556                 return NULL;
2557         }
2558         if (shared) {
2559                 cnt_free = flow_dv_counter_shared_search(cont, id);
2560                 if (cnt_free) {
2561                         if (cnt_free->ref_cnt + 1 == 0) {
2562                                 rte_errno = E2BIG;
2563                                 return NULL;
2564                         }
2565                         cnt_free->ref_cnt++;
2566                         return cnt_free;
2567                 }
2568         }
2569         /* Pools which has a free counters are in the start. */
2570         TAILQ_FOREACH(pool, &cont->pool_list, next) {
2571                 /*
2572                  * The free counter reset values must be updated between the
2573                  * counter release to the counter allocation, so, at least one
2574                  * query must be done in this time. ensure it by saving the
2575                  * query generation in the release time.
2576                  * The free list is sorted according to the generation - so if
2577                  * the first one is not updated, all the others are not
2578                  * updated too.
2579                  */
2580                 cnt_free = TAILQ_FIRST(&pool->counters);
2581                 if (cnt_free && cnt_free->query_gen + 1 <
2582                     rte_atomic64_read(&pool->query_gen))
2583                         break;
2584                 cnt_free = NULL;
2585         }
2586         if (!cnt_free) {
2587                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
2588                 if (!pool)
2589                         return NULL;
2590         }
2591         cnt_free->batch = batch;
2592         /* Create a DV counter action only in the first time usage. */
2593         if (!cnt_free->action) {
2594                 uint16_t offset;
2595                 struct mlx5_devx_obj *dcs;
2596
2597                 if (batch) {
2598                         offset = cnt_free - &pool->counters_raw[0];
2599                         dcs = pool->min_dcs;
2600                 } else {
2601                         offset = 0;
2602                         dcs = cnt_free->dcs;
2603                 }
2604                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
2605                                         (dcs->obj, offset);
2606                 if (!cnt_free->action) {
2607                         rte_errno = errno;
2608                         return NULL;
2609                 }
2610         }
2611         /* Update the counter reset values. */
2612         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
2613                                  &cnt_free->bytes))
2614                 return NULL;
2615         cnt_free->shared = shared;
2616         cnt_free->ref_cnt = 1;
2617         cnt_free->id = id;
2618         if (!priv->sh->cmng.query_thread_on)
2619                 /* Start the asynchronous batch query by the host thread. */
2620                 mlx5_set_query_alarm(priv->sh);
2621         TAILQ_REMOVE(&pool->counters, cnt_free, next);
2622         if (TAILQ_EMPTY(&pool->counters)) {
2623                 /* Move the pool to the end of the container pool list. */
2624                 TAILQ_REMOVE(&cont->pool_list, pool, next);
2625                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
2626         }
2627         return cnt_free;
2628 }
2629
2630 /**
2631  * Release a flow counter.
2632  *
2633  * @param[in] dev
2634  *   Pointer to the Ethernet device structure.
2635  * @param[in] counter
2636  *   Pointer to the counter handler.
2637  */
2638 static void
2639 flow_dv_counter_release(struct rte_eth_dev *dev __rte_unused,
2640                         struct mlx5_flow_counter *counter)
2641 {
2642         if (!counter)
2643                 return;
2644         if (--counter->ref_cnt == 0) {
2645                 struct mlx5_flow_counter_pool *pool =
2646                                 flow_dv_counter_pool_get(counter);
2647
2648                 /* Put the counter in the end - the last updated one. */
2649                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
2650                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
2651         }
2652 }
2653
2654 /**
2655  * Verify the @p attributes will be correctly understood by the NIC and store
2656  * them in the @p flow if everything is correct.
2657  *
2658  * @param[in] dev
2659  *   Pointer to dev struct.
2660  * @param[in] attributes
2661  *   Pointer to flow attributes
2662  * @param[out] error
2663  *   Pointer to error structure.
2664  *
2665  * @return
2666  *   0 on success, a negative errno value otherwise and rte_errno is set.
2667  */
2668 static int
2669 flow_dv_validate_attributes(struct rte_eth_dev *dev,
2670                             const struct rte_flow_attr *attributes,
2671                             struct rte_flow_error *error)
2672 {
2673         struct mlx5_priv *priv = dev->data->dev_private;
2674         uint32_t priority_max = priv->config.flow_prio - 1;
2675
2676 #ifndef HAVE_MLX5DV_DR
2677         if (attributes->group)
2678                 return rte_flow_error_set(error, ENOTSUP,
2679                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
2680                                           NULL,
2681                                           "groups is not supported");
2682 #endif
2683         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
2684             attributes->priority >= priority_max)
2685                 return rte_flow_error_set(error, ENOTSUP,
2686                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
2687                                           NULL,
2688                                           "priority out of range");
2689         if (attributes->transfer) {
2690                 if (!priv->config.dv_esw_en)
2691                         return rte_flow_error_set
2692                                 (error, ENOTSUP,
2693                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2694                                  "E-Switch dr is not supported");
2695                 if (!(priv->representor || priv->master))
2696                         return rte_flow_error_set
2697                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2698                                  NULL, "E-Switch configurationd can only be"
2699                                  " done by a master or a representor device");
2700                 if (attributes->egress)
2701                         return rte_flow_error_set
2702                                 (error, ENOTSUP,
2703                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
2704                                  "egress is not supported");
2705                 if (attributes->group >= MLX5_MAX_TABLES_FDB)
2706                         return rte_flow_error_set
2707                                 (error, EINVAL,
2708                                  RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
2709                                  NULL, "group must be smaller than "
2710                                  RTE_STR(MLX5_MAX_FDB_TABLES));
2711         }
2712         if (!(attributes->egress ^ attributes->ingress))
2713                 return rte_flow_error_set(error, ENOTSUP,
2714                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
2715                                           "must specify exactly one of "
2716                                           "ingress or egress");
2717         return 0;
2718 }
2719
2720 /**
2721  * Internal validation function. For validating both actions and items.
2722  *
2723  * @param[in] dev
2724  *   Pointer to the rte_eth_dev structure.
2725  * @param[in] attr
2726  *   Pointer to the flow attributes.
2727  * @param[in] items
2728  *   Pointer to the list of items.
2729  * @param[in] actions
2730  *   Pointer to the list of actions.
2731  * @param[out] error
2732  *   Pointer to the error structure.
2733  *
2734  * @return
2735  *   0 on success, a negative errno value otherwise and rte_errno is set.
2736  */
2737 static int
2738 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
2739                  const struct rte_flow_item items[],
2740                  const struct rte_flow_action actions[],
2741                  struct rte_flow_error *error)
2742 {
2743         int ret;
2744         uint64_t action_flags = 0;
2745         uint64_t item_flags = 0;
2746         uint64_t last_item = 0;
2747         uint8_t next_protocol = 0xff;
2748         int actions_n = 0;
2749         const struct rte_flow_item *gre_item = NULL;
2750         struct rte_flow_item_tcp nic_tcp_mask = {
2751                 .hdr = {
2752                         .tcp_flags = 0xFF,
2753                         .src_port = RTE_BE16(UINT16_MAX),
2754                         .dst_port = RTE_BE16(UINT16_MAX),
2755                 }
2756         };
2757
2758         if (items == NULL)
2759                 return -1;
2760         ret = flow_dv_validate_attributes(dev, attr, error);
2761         if (ret < 0)
2762                 return ret;
2763         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2764                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2765                 switch (items->type) {
2766                 case RTE_FLOW_ITEM_TYPE_VOID:
2767                         break;
2768                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
2769                         ret = flow_dv_validate_item_port_id
2770                                         (dev, items, attr, item_flags, error);
2771                         if (ret < 0)
2772                                 return ret;
2773                         last_item |= MLX5_FLOW_ITEM_PORT_ID;
2774                         break;
2775                 case RTE_FLOW_ITEM_TYPE_ETH:
2776                         ret = mlx5_flow_validate_item_eth(items, item_flags,
2777                                                           error);
2778                         if (ret < 0)
2779                                 return ret;
2780                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2781                                              MLX5_FLOW_LAYER_OUTER_L2;
2782                         break;
2783                 case RTE_FLOW_ITEM_TYPE_VLAN:
2784                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
2785                                                            error);
2786                         if (ret < 0)
2787                                 return ret;
2788                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2789                                              MLX5_FLOW_LAYER_OUTER_VLAN;
2790                         break;
2791                 case RTE_FLOW_ITEM_TYPE_IPV4:
2792                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
2793                                                            NULL, error);
2794                         if (ret < 0)
2795                                 return ret;
2796                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
2797                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2798                         if (items->mask != NULL &&
2799                             ((const struct rte_flow_item_ipv4 *)
2800                              items->mask)->hdr.next_proto_id) {
2801                                 next_protocol =
2802                                         ((const struct rte_flow_item_ipv4 *)
2803                                          (items->spec))->hdr.next_proto_id;
2804                                 next_protocol &=
2805                                         ((const struct rte_flow_item_ipv4 *)
2806                                          (items->mask))->hdr.next_proto_id;
2807                         } else {
2808                                 /* Reset for inner layer. */
2809                                 next_protocol = 0xff;
2810                         }
2811                         mlx5_flow_tunnel_ip_check(items, &last_item);
2812                         break;
2813                 case RTE_FLOW_ITEM_TYPE_IPV6:
2814                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
2815                                                            NULL, error);
2816                         if (ret < 0)
2817                                 return ret;
2818                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
2819                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2820                         if (items->mask != NULL &&
2821                             ((const struct rte_flow_item_ipv6 *)
2822                              items->mask)->hdr.proto) {
2823                                 next_protocol =
2824                                         ((const struct rte_flow_item_ipv6 *)
2825                                          items->spec)->hdr.proto;
2826                                 next_protocol &=
2827                                         ((const struct rte_flow_item_ipv6 *)
2828                                          items->mask)->hdr.proto;
2829                         } else {
2830                                 /* Reset for inner layer. */
2831                                 next_protocol = 0xff;
2832                         }
2833                         mlx5_flow_tunnel_ip_check(items, &last_item);
2834                         break;
2835                 case RTE_FLOW_ITEM_TYPE_TCP:
2836                         ret = mlx5_flow_validate_item_tcp
2837                                                 (items, item_flags,
2838                                                  next_protocol,
2839                                                  &nic_tcp_mask,
2840                                                  error);
2841                         if (ret < 0)
2842                                 return ret;
2843                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
2844                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
2845                         break;
2846                 case RTE_FLOW_ITEM_TYPE_UDP:
2847                         ret = mlx5_flow_validate_item_udp(items, item_flags,
2848                                                           next_protocol,
2849                                                           error);
2850                         if (ret < 0)
2851                                 return ret;
2852                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
2853                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
2854                         break;
2855                 case RTE_FLOW_ITEM_TYPE_GRE:
2856                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2857                         ret = mlx5_flow_validate_item_gre(items, item_flags,
2858                                                           next_protocol, error);
2859                         if (ret < 0)
2860                                 return ret;
2861                         gre_item = items;
2862                         last_item = MLX5_FLOW_LAYER_GRE;
2863                         break;
2864                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
2865                         ret = mlx5_flow_validate_item_gre_key
2866                                 (items, item_flags, gre_item, error);
2867                         if (ret < 0)
2868                                 return ret;
2869                         item_flags |= MLX5_FLOW_LAYER_GRE_KEY;
2870                         break;
2871                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2872                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
2873                                                             error);
2874                         if (ret < 0)
2875                                 return ret;
2876                         last_item = MLX5_FLOW_LAYER_VXLAN;
2877                         break;
2878                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2879                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
2880                                                                 item_flags, dev,
2881                                                                 error);
2882                         if (ret < 0)
2883                                 return ret;
2884                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
2885                         break;
2886                 case RTE_FLOW_ITEM_TYPE_MPLS:
2887                         ret = mlx5_flow_validate_item_mpls(dev, items,
2888                                                            item_flags,
2889                                                            last_item, error);
2890                         if (ret < 0)
2891                                 return ret;
2892                         last_item = MLX5_FLOW_LAYER_MPLS;
2893                         break;
2894                 case RTE_FLOW_ITEM_TYPE_META:
2895                         ret = flow_dv_validate_item_meta(dev, items, attr,
2896                                                          error);
2897                         if (ret < 0)
2898                                 return ret;
2899                         last_item = MLX5_FLOW_ITEM_METADATA;
2900                         break;
2901                 case RTE_FLOW_ITEM_TYPE_ICMP:
2902                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
2903                                                            next_protocol,
2904                                                            error);
2905                         if (ret < 0)
2906                                 return ret;
2907                         item_flags |= MLX5_FLOW_LAYER_ICMP;
2908                         break;
2909                 case RTE_FLOW_ITEM_TYPE_ICMP6:
2910                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
2911                                                             next_protocol,
2912                                                             error);
2913                         if (ret < 0)
2914                                 return ret;
2915                         item_flags |= MLX5_FLOW_LAYER_ICMP6;
2916                         break;
2917                 default:
2918                         return rte_flow_error_set(error, ENOTSUP,
2919                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2920                                                   NULL, "item not supported");
2921                 }
2922                 item_flags |= last_item;
2923         }
2924         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2925                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
2926                         return rte_flow_error_set(error, ENOTSUP,
2927                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2928                                                   actions, "too many actions");
2929                 switch (actions->type) {
2930                 case RTE_FLOW_ACTION_TYPE_VOID:
2931                         break;
2932                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
2933                         ret = flow_dv_validate_action_port_id(dev,
2934                                                               action_flags,
2935                                                               actions,
2936                                                               attr,
2937                                                               error);
2938                         if (ret)
2939                                 return ret;
2940                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
2941                         ++actions_n;
2942                         break;
2943                 case RTE_FLOW_ACTION_TYPE_FLAG:
2944                         ret = mlx5_flow_validate_action_flag(action_flags,
2945                                                              attr, error);
2946                         if (ret < 0)
2947                                 return ret;
2948                         action_flags |= MLX5_FLOW_ACTION_FLAG;
2949                         ++actions_n;
2950                         break;
2951                 case RTE_FLOW_ACTION_TYPE_MARK:
2952                         ret = mlx5_flow_validate_action_mark(actions,
2953                                                              action_flags,
2954                                                              attr, error);
2955                         if (ret < 0)
2956                                 return ret;
2957                         action_flags |= MLX5_FLOW_ACTION_MARK;
2958                         ++actions_n;
2959                         break;
2960                 case RTE_FLOW_ACTION_TYPE_DROP:
2961                         ret = mlx5_flow_validate_action_drop(action_flags,
2962                                                              attr, error);
2963                         if (ret < 0)
2964                                 return ret;
2965                         action_flags |= MLX5_FLOW_ACTION_DROP;
2966                         ++actions_n;
2967                         break;
2968                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2969                         ret = mlx5_flow_validate_action_queue(actions,
2970                                                               action_flags, dev,
2971                                                               attr, error);
2972                         if (ret < 0)
2973                                 return ret;
2974                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
2975                         ++actions_n;
2976                         break;
2977                 case RTE_FLOW_ACTION_TYPE_RSS:
2978                         ret = mlx5_flow_validate_action_rss(actions,
2979                                                             action_flags, dev,
2980                                                             attr, item_flags,
2981                                                             error);
2982                         if (ret < 0)
2983                                 return ret;
2984                         action_flags |= MLX5_FLOW_ACTION_RSS;
2985                         ++actions_n;
2986                         break;
2987                 case RTE_FLOW_ACTION_TYPE_COUNT:
2988                         ret = flow_dv_validate_action_count(dev, error);
2989                         if (ret < 0)
2990                                 return ret;
2991                         action_flags |= MLX5_FLOW_ACTION_COUNT;
2992                         ++actions_n;
2993                         break;
2994                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2995                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2996                         ret = flow_dv_validate_action_l2_encap(action_flags,
2997                                                                actions, attr,
2998                                                                error);
2999                         if (ret < 0)
3000                                 return ret;
3001                         action_flags |= actions->type ==
3002                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
3003                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
3004                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
3005                         ++actions_n;
3006                         break;
3007                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3008                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3009                         ret = flow_dv_validate_action_l2_decap(action_flags,
3010                                                                attr, error);
3011                         if (ret < 0)
3012                                 return ret;
3013                         action_flags |= actions->type ==
3014                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
3015                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
3016                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
3017                         ++actions_n;
3018                         break;
3019                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3020                         ret = flow_dv_validate_action_raw_encap(action_flags,
3021                                                                 actions, attr,
3022                                                                 error);
3023                         if (ret < 0)
3024                                 return ret;
3025                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
3026                         ++actions_n;
3027                         break;
3028                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3029                         ret = flow_dv_validate_action_raw_decap(action_flags,
3030                                                                 actions, attr,
3031                                                                 error);
3032                         if (ret < 0)
3033                                 return ret;
3034                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
3035                         ++actions_n;
3036                         break;
3037                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3038                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3039                         ret = flow_dv_validate_action_modify_mac(action_flags,
3040                                                                  actions,
3041                                                                  item_flags,
3042                                                                  error);
3043                         if (ret < 0)
3044                                 return ret;
3045                         /* Count all modify-header actions as one action. */
3046                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3047                                 ++actions_n;
3048                         action_flags |= actions->type ==
3049                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
3050                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
3051                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
3052                         break;
3053
3054                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3055                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3056                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
3057                                                                   actions,
3058                                                                   item_flags,
3059                                                                   error);
3060                         if (ret < 0)
3061                                 return ret;
3062                         /* Count all modify-header actions as one action. */
3063                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3064                                 ++actions_n;
3065                         action_flags |= actions->type ==
3066                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
3067                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
3068                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
3069                         break;
3070                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3071                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3072                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
3073                                                                   actions,
3074                                                                   item_flags,
3075                                                                   error);
3076                         if (ret < 0)
3077                                 return ret;
3078                         /* Count all modify-header actions as one action. */
3079                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3080                                 ++actions_n;
3081                         action_flags |= actions->type ==
3082                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
3083                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
3084                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
3085                         break;
3086                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3087                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3088                         ret = flow_dv_validate_action_modify_tp(action_flags,
3089                                                                 actions,
3090                                                                 item_flags,
3091                                                                 error);
3092                         if (ret < 0)
3093                                 return ret;
3094                         /* Count all modify-header actions as one action. */
3095                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3096                                 ++actions_n;
3097                         action_flags |= actions->type ==
3098                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
3099                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
3100                                                 MLX5_FLOW_ACTION_SET_TP_DST;
3101                         break;
3102                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3103                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
3104                         ret = flow_dv_validate_action_modify_ttl(action_flags,
3105                                                                  actions,
3106                                                                  item_flags,
3107                                                                  error);
3108                         if (ret < 0)
3109                                 return ret;
3110                         /* Count all modify-header actions as one action. */
3111                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3112                                 ++actions_n;
3113                         action_flags |= actions->type ==
3114                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
3115                                                 MLX5_FLOW_ACTION_SET_TTL :
3116                                                 MLX5_FLOW_ACTION_DEC_TTL;
3117                         break;
3118                 case RTE_FLOW_ACTION_TYPE_JUMP:
3119                         ret = flow_dv_validate_action_jump(actions,
3120                                                            attr->group, error);
3121                         if (ret)
3122                                 return ret;
3123                         ++actions_n;
3124                         action_flags |= MLX5_FLOW_ACTION_JUMP;
3125                         break;
3126                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3127                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3128                         ret = flow_dv_validate_action_modify_tcp_seq
3129                                                                 (action_flags,
3130                                                                  actions,
3131                                                                  item_flags,
3132                                                                  error);
3133                         if (ret < 0)
3134                                 return ret;
3135                         /* Count all modify-header actions as one action. */
3136                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3137                                 ++actions_n;
3138                         action_flags |= actions->type ==
3139                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
3140                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
3141                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
3142                         break;
3143                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3144                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3145                         ret = flow_dv_validate_action_modify_tcp_ack
3146                                                                 (action_flags,
3147                                                                  actions,
3148                                                                  item_flags,
3149                                                                  error);
3150                         if (ret < 0)
3151                                 return ret;
3152                         /* Count all modify-header actions as one action. */
3153                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
3154                                 ++actions_n;
3155                         action_flags |= actions->type ==
3156                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
3157                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
3158                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
3159                         break;
3160                 default:
3161                         return rte_flow_error_set(error, ENOTSUP,
3162                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3163                                                   actions,
3164                                                   "action not supported");
3165                 }
3166         }
3167         /* Eswitch has few restrictions on using items and actions */
3168         if (attr->transfer) {
3169                 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3170                         return rte_flow_error_set(error, ENOTSUP,
3171                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3172                                                   NULL,
3173                                                   "unsupported action FLAG");
3174                 if (action_flags & MLX5_FLOW_ACTION_MARK)
3175                         return rte_flow_error_set(error, ENOTSUP,
3176                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3177                                                   NULL,
3178                                                   "unsupported action MARK");
3179                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
3180                         return rte_flow_error_set(error, ENOTSUP,
3181                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3182                                                   NULL,
3183                                                   "unsupported action QUEUE");
3184                 if (action_flags & MLX5_FLOW_ACTION_RSS)
3185                         return rte_flow_error_set(error, ENOTSUP,
3186                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3187                                                   NULL,
3188                                                   "unsupported action RSS");
3189                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3190                         return rte_flow_error_set(error, EINVAL,
3191                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3192                                                   actions,
3193                                                   "no fate action is found");
3194         } else {
3195                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
3196                         return rte_flow_error_set(error, EINVAL,
3197                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3198                                                   actions,
3199                                                   "no fate action is found");
3200         }
3201         return 0;
3202 }
3203
3204 /**
3205  * Internal preparation function. Allocates the DV flow size,
3206  * this size is constant.
3207  *
3208  * @param[in] attr
3209  *   Pointer to the flow attributes.
3210  * @param[in] items
3211  *   Pointer to the list of items.
3212  * @param[in] actions
3213  *   Pointer to the list of actions.
3214  * @param[out] error
3215  *   Pointer to the error structure.
3216  *
3217  * @return
3218  *   Pointer to mlx5_flow object on success,
3219  *   otherwise NULL and rte_errno is set.
3220  */
3221 static struct mlx5_flow *
3222 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
3223                 const struct rte_flow_item items[] __rte_unused,
3224                 const struct rte_flow_action actions[] __rte_unused,
3225                 struct rte_flow_error *error)
3226 {
3227         uint32_t size = sizeof(struct mlx5_flow);
3228         struct mlx5_flow *flow;
3229
3230         flow = rte_calloc(__func__, 1, size, 0);
3231         if (!flow) {
3232                 rte_flow_error_set(error, ENOMEM,
3233                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3234                                    "not enough memory to create flow");
3235                 return NULL;
3236         }
3237         flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
3238         return flow;
3239 }
3240
3241 #ifndef NDEBUG
3242 /**
3243  * Sanity check for match mask and value. Similar to check_valid_spec() in
3244  * kernel driver. If unmasked bit is present in value, it returns failure.
3245  *
3246  * @param match_mask
3247  *   pointer to match mask buffer.
3248  * @param match_value
3249  *   pointer to match value buffer.
3250  *
3251  * @return
3252  *   0 if valid, -EINVAL otherwise.
3253  */
3254 static int
3255 flow_dv_check_valid_spec(void *match_mask, void *match_value)
3256 {
3257         uint8_t *m = match_mask;
3258         uint8_t *v = match_value;
3259         unsigned int i;
3260
3261         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
3262                 if (v[i] & ~m[i]) {
3263                         DRV_LOG(ERR,
3264                                 "match_value differs from match_criteria"
3265                                 " %p[%u] != %p[%u]",
3266                                 match_value, i, match_mask, i);
3267                         return -EINVAL;
3268                 }
3269         }
3270         return 0;
3271 }
3272 #endif
3273
3274 /**
3275  * Add Ethernet item to matcher and to the value.
3276  *
3277  * @param[in, out] matcher
3278  *   Flow matcher.
3279  * @param[in, out] key
3280  *   Flow matcher value.
3281  * @param[in] item
3282  *   Flow pattern to translate.
3283  * @param[in] inner
3284  *   Item is inner pattern.
3285  */
3286 static void
3287 flow_dv_translate_item_eth(void *matcher, void *key,
3288                            const struct rte_flow_item *item, int inner)
3289 {
3290         const struct rte_flow_item_eth *eth_m = item->mask;
3291         const struct rte_flow_item_eth *eth_v = item->spec;
3292         const struct rte_flow_item_eth nic_mask = {
3293                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3294                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
3295                 .type = RTE_BE16(0xffff),
3296         };
3297         void *headers_m;
3298         void *headers_v;
3299         char *l24_v;
3300         unsigned int i;
3301
3302         if (!eth_v)
3303                 return;
3304         if (!eth_m)
3305                 eth_m = &nic_mask;
3306         if (inner) {
3307                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3308                                          inner_headers);
3309                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3310         } else {
3311                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3312                                          outer_headers);
3313                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3314         }
3315         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
3316                &eth_m->dst, sizeof(eth_m->dst));
3317         /* The value must be in the range of the mask. */
3318         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
3319         for (i = 0; i < sizeof(eth_m->dst); ++i)
3320                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
3321         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
3322                &eth_m->src, sizeof(eth_m->src));
3323         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
3324         /* The value must be in the range of the mask. */
3325         for (i = 0; i < sizeof(eth_m->dst); ++i)
3326                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
3327         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
3328                  rte_be_to_cpu_16(eth_m->type));
3329         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
3330         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
3331 }
3332
3333 /**
3334  * Add VLAN item to matcher and to the value.
3335  *
3336  * @param[in, out] matcher
3337  *   Flow matcher.
3338  * @param[in, out] key
3339  *   Flow matcher value.
3340  * @param[in] item
3341  *   Flow pattern to translate.
3342  * @param[in] inner
3343  *   Item is inner pattern.
3344  */
3345 static void
3346 flow_dv_translate_item_vlan(void *matcher, void *key,
3347                             const struct rte_flow_item *item,
3348                             int inner)
3349 {
3350         const struct rte_flow_item_vlan *vlan_m = item->mask;
3351         const struct rte_flow_item_vlan *vlan_v = item->spec;
3352         const struct rte_flow_item_vlan nic_mask = {
3353                 .tci = RTE_BE16(0x0fff),
3354                 .inner_type = RTE_BE16(0xffff),
3355         };
3356         void *headers_m;
3357         void *headers_v;
3358         uint16_t tci_m;
3359         uint16_t tci_v;
3360
3361         if (!vlan_v)
3362                 return;
3363         if (!vlan_m)
3364                 vlan_m = &nic_mask;
3365         if (inner) {
3366                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3367                                          inner_headers);
3368                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3369         } else {
3370                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3371                                          outer_headers);
3372                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3373         }
3374         tci_m = rte_be_to_cpu_16(vlan_m->tci);
3375         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
3376         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
3377         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
3378         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
3379         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
3380         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
3381         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
3382         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
3383         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
3384 }
3385
3386 /**
3387  * Add IPV4 item to matcher and to the value.
3388  *
3389  * @param[in, out] matcher
3390  *   Flow matcher.
3391  * @param[in, out] key
3392  *   Flow matcher value.
3393  * @param[in] item
3394  *   Flow pattern to translate.
3395  * @param[in] inner
3396  *   Item is inner pattern.
3397  * @param[in] group
3398  *   The group to insert the rule.
3399  */
3400 static void
3401 flow_dv_translate_item_ipv4(void *matcher, void *key,
3402                             const struct rte_flow_item *item,
3403                             int inner, uint32_t group)
3404 {
3405         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
3406         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
3407         const struct rte_flow_item_ipv4 nic_mask = {
3408                 .hdr = {
3409                         .src_addr = RTE_BE32(0xffffffff),
3410                         .dst_addr = RTE_BE32(0xffffffff),
3411                         .type_of_service = 0xff,
3412                         .next_proto_id = 0xff,
3413                 },
3414         };
3415         void *headers_m;
3416         void *headers_v;
3417         char *l24_m;
3418         char *l24_v;
3419         uint8_t tos;
3420
3421         if (inner) {
3422                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3423                                          inner_headers);
3424                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3425         } else {
3426                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3427                                          outer_headers);
3428                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3429         }
3430         if (group == 0)
3431                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
3432         else
3433                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
3434         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
3435         if (!ipv4_v)
3436                 return;
3437         if (!ipv4_m)
3438                 ipv4_m = &nic_mask;
3439         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3440                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
3441         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3442                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
3443         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
3444         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
3445         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3446                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
3447         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3448                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
3449         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
3450         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
3451         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
3452         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
3453                  ipv4_m->hdr.type_of_service);
3454         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
3455         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
3456                  ipv4_m->hdr.type_of_service >> 2);
3457         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
3458         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
3459                  ipv4_m->hdr.next_proto_id);
3460         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3461                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
3462 }
3463
3464 /**
3465  * Add IPV6 item to matcher and to the value.
3466  *
3467  * @param[in, out] matcher
3468  *   Flow matcher.
3469  * @param[in, out] key
3470  *   Flow matcher value.
3471  * @param[in] item
3472  *   Flow pattern to translate.
3473  * @param[in] inner
3474  *   Item is inner pattern.
3475  * @param[in] group
3476  *   The group to insert the rule.
3477  */
3478 static void
3479 flow_dv_translate_item_ipv6(void *matcher, void *key,
3480                             const struct rte_flow_item *item,
3481                             int inner, uint32_t group)
3482 {
3483         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
3484         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
3485         const struct rte_flow_item_ipv6 nic_mask = {
3486                 .hdr = {
3487                         .src_addr =
3488                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
3489                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
3490                         .dst_addr =
3491                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
3492                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
3493                         .vtc_flow = RTE_BE32(0xffffffff),
3494                         .proto = 0xff,
3495                         .hop_limits = 0xff,
3496                 },
3497         };
3498         void *headers_m;
3499         void *headers_v;
3500         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3501         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3502         char *l24_m;
3503         char *l24_v;
3504         uint32_t vtc_m;
3505         uint32_t vtc_v;
3506         int i;
3507         int size;
3508
3509         if (inner) {
3510                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3511                                          inner_headers);
3512                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3513         } else {
3514                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3515                                          outer_headers);
3516                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3517         }
3518         if (group == 0)
3519                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
3520         else
3521                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
3522         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
3523         if (!ipv6_v)
3524                 return;
3525         if (!ipv6_m)
3526                 ipv6_m = &nic_mask;
3527         size = sizeof(ipv6_m->hdr.dst_addr);
3528         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3529                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
3530         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3531                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
3532         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
3533         for (i = 0; i < size; ++i)
3534                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
3535         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
3536                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
3537         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
3538                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
3539         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
3540         for (i = 0; i < size; ++i)
3541                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
3542         /* TOS. */
3543         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
3544         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
3545         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
3546         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
3547         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
3548         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
3549         /* Label. */
3550         if (inner) {
3551                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
3552                          vtc_m);
3553                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
3554                          vtc_v);
3555         } else {
3556                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
3557                          vtc_m);
3558                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
3559                          vtc_v);
3560         }
3561         /* Protocol. */
3562         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
3563                  ipv6_m->hdr.proto);
3564         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3565                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
3566 }
3567
3568 /**
3569  * Add TCP item to matcher and to the value.
3570  *
3571  * @param[in, out] matcher
3572  *   Flow matcher.
3573  * @param[in, out] key
3574  *   Flow matcher value.
3575  * @param[in] item
3576  *   Flow pattern to translate.
3577  * @param[in] inner
3578  *   Item is inner pattern.
3579  */
3580 static void
3581 flow_dv_translate_item_tcp(void *matcher, void *key,
3582                            const struct rte_flow_item *item,
3583                            int inner)
3584 {
3585         const struct rte_flow_item_tcp *tcp_m = item->mask;
3586         const struct rte_flow_item_tcp *tcp_v = item->spec;
3587         void *headers_m;
3588         void *headers_v;
3589
3590         if (inner) {
3591                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3592                                          inner_headers);
3593                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3594         } else {
3595                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3596                                          outer_headers);
3597                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3598         }
3599         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3600         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
3601         if (!tcp_v)
3602                 return;
3603         if (!tcp_m)
3604                 tcp_m = &rte_flow_item_tcp_mask;
3605         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
3606                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
3607         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
3608                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
3609         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
3610                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
3611         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
3612                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
3613         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
3614                  tcp_m->hdr.tcp_flags);
3615         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
3616                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
3617 }
3618
3619 /**
3620  * Add UDP item to matcher and to the value.
3621  *
3622  * @param[in, out] matcher
3623  *   Flow matcher.
3624  * @param[in, out] key
3625  *   Flow matcher value.
3626  * @param[in] item
3627  *   Flow pattern to translate.
3628  * @param[in] inner
3629  *   Item is inner pattern.
3630  */
3631 static void
3632 flow_dv_translate_item_udp(void *matcher, void *key,
3633                            const struct rte_flow_item *item,
3634                            int inner)
3635 {
3636         const struct rte_flow_item_udp *udp_m = item->mask;
3637         const struct rte_flow_item_udp *udp_v = item->spec;
3638         void *headers_m;
3639         void *headers_v;
3640
3641         if (inner) {
3642                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3643                                          inner_headers);
3644                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3645         } else {
3646                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3647                                          outer_headers);
3648                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3649         }
3650         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3651         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
3652         if (!udp_v)
3653                 return;
3654         if (!udp_m)
3655                 udp_m = &rte_flow_item_udp_mask;
3656         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
3657                  rte_be_to_cpu_16(udp_m->hdr.src_port));
3658         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
3659                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
3660         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
3661                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
3662         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
3663                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
3664 }
3665
3666 /**
3667  * Add GRE optional Key item to matcher and to the value.
3668  *
3669  * @param[in, out] matcher
3670  *   Flow matcher.
3671  * @param[in, out] key
3672  *   Flow matcher value.
3673  * @param[in] item
3674  *   Flow pattern to translate.
3675  * @param[in] inner
3676  *   Item is inner pattern.
3677  */
3678 static void
3679 flow_dv_translate_item_gre_key(void *matcher, void *key,
3680                                    const struct rte_flow_item *item)
3681 {
3682         const rte_be32_t *key_m = item->mask;
3683         const rte_be32_t *key_v = item->spec;
3684         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3685         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3686         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
3687
3688         if (!key_v)
3689                 return;
3690         if (!key_m)
3691                 key_m = &gre_key_default_mask;
3692         /* GRE K bit must be on and should already be validated */
3693         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
3694         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
3695         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
3696                  rte_be_to_cpu_32(*key_m) >> 8);
3697         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
3698                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
3699         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
3700                  rte_be_to_cpu_32(*key_m) & 0xFF);
3701         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
3702                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
3703 }
3704
3705 /**
3706  * Add GRE item to matcher and to the value.
3707  *
3708  * @param[in, out] matcher
3709  *   Flow matcher.
3710  * @param[in, out] key
3711  *   Flow matcher value.
3712  * @param[in] item
3713  *   Flow pattern to translate.
3714  * @param[in] inner
3715  *   Item is inner pattern.
3716  */
3717 static void
3718 flow_dv_translate_item_gre(void *matcher, void *key,
3719                            const struct rte_flow_item *item,
3720                            int inner)
3721 {
3722         const struct rte_flow_item_gre *gre_m = item->mask;
3723         const struct rte_flow_item_gre *gre_v = item->spec;
3724         void *headers_m;
3725         void *headers_v;
3726         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3727         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3728         struct {
3729                 union {
3730                         __extension__
3731                         struct {
3732                                 uint16_t version:3;
3733                                 uint16_t rsvd0:9;
3734                                 uint16_t s_present:1;
3735                                 uint16_t k_present:1;
3736                                 uint16_t rsvd_bit1:1;
3737                                 uint16_t c_present:1;
3738                         };
3739                         uint16_t value;
3740                 };
3741         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
3742
3743         if (inner) {
3744                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3745                                          inner_headers);
3746                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3747         } else {
3748                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3749                                          outer_headers);
3750                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3751         }
3752         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3753         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
3754         if (!gre_v)
3755                 return;
3756         if (!gre_m)
3757                 gre_m = &rte_flow_item_gre_mask;
3758         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
3759                  rte_be_to_cpu_16(gre_m->protocol));
3760         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
3761                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
3762         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
3763         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
3764         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
3765                  gre_crks_rsvd0_ver_m.c_present);
3766         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
3767                  gre_crks_rsvd0_ver_v.c_present &
3768                  gre_crks_rsvd0_ver_m.c_present);
3769         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
3770                  gre_crks_rsvd0_ver_m.k_present);
3771         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
3772                  gre_crks_rsvd0_ver_v.k_present &
3773                  gre_crks_rsvd0_ver_m.k_present);
3774         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
3775                  gre_crks_rsvd0_ver_m.s_present);
3776         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
3777                  gre_crks_rsvd0_ver_v.s_present &
3778                  gre_crks_rsvd0_ver_m.s_present);
3779 }
3780
3781 /**
3782  * Add NVGRE item to matcher and to the value.
3783  *
3784  * @param[in, out] matcher
3785  *   Flow matcher.
3786  * @param[in, out] key
3787  *   Flow matcher value.
3788  * @param[in] item
3789  *   Flow pattern to translate.
3790  * @param[in] inner
3791  *   Item is inner pattern.
3792  */
3793 static void
3794 flow_dv_translate_item_nvgre(void *matcher, void *key,
3795                              const struct rte_flow_item *item,
3796                              int inner)
3797 {
3798         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
3799         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
3800         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3801         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3802         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
3803         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
3804         char *gre_key_m;
3805         char *gre_key_v;
3806         int size;
3807         int i;
3808
3809         flow_dv_translate_item_gre(matcher, key, item, inner);
3810         if (!nvgre_v)
3811                 return;
3812         if (!nvgre_m)
3813                 nvgre_m = &rte_flow_item_nvgre_mask;
3814         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
3815         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
3816         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
3817         memcpy(gre_key_m, tni_flow_id_m, size);
3818         for (i = 0; i < size; ++i)
3819                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
3820 }
3821
3822 /**
3823  * Add VXLAN item to matcher and to the value.
3824  *
3825  * @param[in, out] matcher
3826  *   Flow matcher.
3827  * @param[in, out] key
3828  *   Flow matcher value.
3829  * @param[in] item
3830  *   Flow pattern to translate.
3831  * @param[in] inner
3832  *   Item is inner pattern.
3833  */
3834 static void
3835 flow_dv_translate_item_vxlan(void *matcher, void *key,
3836                              const struct rte_flow_item *item,
3837                              int inner)
3838 {
3839         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
3840         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
3841         void *headers_m;
3842         void *headers_v;
3843         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3844         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3845         char *vni_m;
3846         char *vni_v;
3847         uint16_t dport;
3848         int size;
3849         int i;
3850
3851         if (inner) {
3852                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3853                                          inner_headers);
3854                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
3855         } else {
3856                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
3857                                          outer_headers);
3858                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3859         }
3860         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
3861                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
3862         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
3863                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
3864                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
3865         }
3866         if (!vxlan_v)
3867                 return;
3868         if (!vxlan_m)
3869                 vxlan_m = &rte_flow_item_vxlan_mask;
3870         size = sizeof(vxlan_m->vni);
3871         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
3872         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
3873         memcpy(vni_m, vxlan_m->vni, size);
3874         for (i = 0; i < size; ++i)
3875                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
3876 }
3877
3878 /**
3879  * Add MPLS item to matcher and to the value.
3880  *
3881  * @param[in, out] matcher
3882  *   Flow matcher.
3883  * @param[in, out] key
3884  *   Flow matcher value.
3885  * @param[in] item
3886  *   Flow pattern to translate.
3887  * @param[in] prev_layer
3888  *   The protocol layer indicated in previous item.
3889  * @param[in] inner
3890  *   Item is inner pattern.
3891  */
3892 static void
3893 flow_dv_translate_item_mpls(void *matcher, void *key,
3894                             const struct rte_flow_item *item,
3895                             uint64_t prev_layer,
3896                             int inner)
3897 {
3898         const uint32_t *in_mpls_m = item->mask;
3899         const uint32_t *in_mpls_v = item->spec;
3900         uint32_t *out_mpls_m = 0;
3901         uint32_t *out_mpls_v = 0;
3902         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
3903         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
3904         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
3905                                      misc_parameters_2);
3906         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
3907         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
3908         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
3909
3910         switch (prev_layer) {
3911         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
3912                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
3913                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
3914                          MLX5_UDP_PORT_MPLS);
3915                 break;
3916         case MLX5_FLOW_LAYER_GRE:
3917                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
3918                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
3919                          RTE_ETHER_TYPE_MPLS);
3920                 break;
3921         default:
3922                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
3923                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
3924                          IPPROTO_MPLS);
3925                 break;
3926         }
3927         if (!in_mpls_v)
3928                 return;
3929         if (!in_mpls_m)
3930                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
3931         switch (prev_layer) {
3932         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
3933                 out_mpls_m =
3934                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
3935                                                  outer_first_mpls_over_udp);
3936                 out_mpls_v =
3937                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
3938                                                  outer_first_mpls_over_udp);
3939                 break;
3940         case MLX5_FLOW_LAYER_GRE:
3941                 out_mpls_m =
3942                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
3943                                                  outer_first_mpls_over_gre);
3944                 out_mpls_v =
3945                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
3946                                                  outer_first_mpls_over_gre);
3947                 break;
3948         default:
3949                 /* Inner MPLS not over GRE is not supported. */
3950                 if (!inner) {
3951                         out_mpls_m =
3952                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
3953                                                          misc2_m,
3954                                                          outer_first_mpls);
3955                         out_mpls_v =
3956                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
3957                                                          misc2_v,
3958                                                          outer_first_mpls);
3959                 }
3960                 break;
3961         }
3962         if (out_mpls_m && out_mpls_v) {
3963                 *out_mpls_m = *in_mpls_m;
3964                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
3965         }
3966 }
3967
3968 /**
3969  * Add META item to matcher
3970  *
3971  * @param[in, out] matcher
3972  *   Flow matcher.
3973  * @param[in, out] key
3974  *   Flow matcher value.
3975  * @param[in] item
3976  *   Flow pattern to translate.
3977  * @param[in] inner
3978  *   Item is inner pattern.
3979  */
3980 static void
3981 flow_dv_translate_item_meta(void *matcher, void *key,
3982                             const struct rte_flow_item *item)
3983 {
3984         const struct rte_flow_item_meta *meta_m;
3985         const struct rte_flow_item_meta *meta_v;
3986         void *misc2_m =
3987                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
3988         void *misc2_v =
3989                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
3990
3991         meta_m = (const void *)item->mask;
3992         if (!meta_m)
3993                 meta_m = &rte_flow_item_meta_mask;
3994         meta_v = (const void *)item->spec;
3995         if (meta_v) {
3996                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a,
3997                          rte_be_to_cpu_32(meta_m->data));
3998                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a,
3999                          rte_be_to_cpu_32(meta_v->data & meta_m->data));
4000         }
4001 }
4002
4003 /**
4004  * Add source vport match to the specified matcher.
4005  *
4006  * @param[in, out] matcher
4007  *   Flow matcher.
4008  * @param[in, out] key
4009  *   Flow matcher value.
4010  * @param[in] port
4011  *   Source vport value to match
4012  * @param[in] mask
4013  *   Mask
4014  */
4015 static void
4016 flow_dv_translate_item_source_vport(void *matcher, void *key,
4017                                     int16_t port, uint16_t mask)
4018 {
4019         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
4020         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
4021
4022         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
4023         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
4024 }
4025
4026 /**
4027  * Translate port-id item to eswitch match on  port-id.
4028  *
4029  * @param[in] dev
4030  *   The devich to configure through.
4031  * @param[in, out] matcher
4032  *   Flow matcher.
4033  * @param[in, out] key
4034  *   Flow matcher value.
4035  * @param[in] item
4036  *   Flow pattern to translate.
4037  *
4038  * @return
4039  *   0 on success, a negative errno value otherwise.
4040  */
4041 static int
4042 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
4043                                void *key, const struct rte_flow_item *item)
4044 {
4045         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
4046         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
4047         uint16_t mask, val, id;
4048         int ret;
4049
4050         mask = pid_m ? pid_m->id : 0xffff;
4051         id = pid_v ? pid_v->id : dev->data->port_id;
4052         ret = mlx5_port_to_eswitch_info(id, NULL, &val);
4053         if (ret)
4054                 return ret;
4055         flow_dv_translate_item_source_vport(matcher, key, val, mask);
4056         return 0;
4057 }
4058
4059 /**
4060  * Add ICMP6 item to matcher and to the value.
4061  *
4062  * @param[in, out] matcher
4063  *   Flow matcher.
4064  * @param[in, out] key
4065  *   Flow matcher value.
4066  * @param[in] item
4067  *   Flow pattern to translate.
4068  * @param[in] inner
4069  *   Item is inner pattern.
4070  */
4071 static void
4072 flow_dv_translate_item_icmp6(void *matcher, void *key,
4073                               const struct rte_flow_item *item,
4074                               int inner)
4075 {
4076         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
4077         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
4078         void *headers_m;
4079         void *headers_v;
4080         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4081                                      misc_parameters_3);
4082         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4083         if (inner) {
4084                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4085                                          inner_headers);
4086                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4087         } else {
4088                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4089                                          outer_headers);
4090                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4091         }
4092         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4093         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
4094         if (!icmp6_v)
4095                 return;
4096         if (!icmp6_m)
4097                 icmp6_m = &rte_flow_item_icmp6_mask;
4098         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
4099         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
4100                  icmp6_v->type & icmp6_m->type);
4101         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
4102         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
4103                  icmp6_v->code & icmp6_m->code);
4104 }
4105
4106 /**
4107  * Add ICMP item to matcher and to the value.
4108  *
4109  * @param[in, out] matcher
4110  *   Flow matcher.
4111  * @param[in, out] key
4112  *   Flow matcher value.
4113  * @param[in] item
4114  *   Flow pattern to translate.
4115  * @param[in] inner
4116  *   Item is inner pattern.
4117  */
4118 static void
4119 flow_dv_translate_item_icmp(void *matcher, void *key,
4120                             const struct rte_flow_item *item,
4121                             int inner)
4122 {
4123         const struct rte_flow_item_icmp *icmp_m = item->mask;
4124         const struct rte_flow_item_icmp *icmp_v = item->spec;
4125         void *headers_m;
4126         void *headers_v;
4127         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
4128                                      misc_parameters_3);
4129         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
4130         if (inner) {
4131                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4132                                          inner_headers);
4133                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4134         } else {
4135                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4136                                          outer_headers);
4137                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4138         }
4139         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
4140         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
4141         if (!icmp_v)
4142                 return;
4143         if (!icmp_m)
4144                 icmp_m = &rte_flow_item_icmp_mask;
4145         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
4146                  icmp_m->hdr.icmp_type);
4147         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
4148                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
4149         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
4150                  icmp_m->hdr.icmp_code);
4151         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
4152                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
4153 }
4154
4155 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
4156
4157 #define HEADER_IS_ZERO(match_criteria, headers)                              \
4158         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
4159                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
4160
4161 /**
4162  * Calculate flow matcher enable bitmap.
4163  *
4164  * @param match_criteria
4165  *   Pointer to flow matcher criteria.
4166  *
4167  * @return
4168  *   Bitmap of enabled fields.
4169  */
4170 static uint8_t
4171 flow_dv_matcher_enable(uint32_t *match_criteria)
4172 {
4173         uint8_t match_criteria_enable;
4174
4175         match_criteria_enable =
4176                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
4177                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
4178         match_criteria_enable |=
4179                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
4180                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
4181         match_criteria_enable |=
4182                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
4183                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
4184         match_criteria_enable |=
4185                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
4186                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
4187 #ifdef HAVE_MLX5DV_DR
4188         match_criteria_enable |=
4189                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
4190                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
4191 #endif
4192         return match_criteria_enable;
4193 }
4194
4195
4196 /**
4197  * Get a flow table.
4198  *
4199  * @param dev[in, out]
4200  *   Pointer to rte_eth_dev structure.
4201  * @param[in] table_id
4202  *   Table id to use.
4203  * @param[in] egress
4204  *   Direction of the table.
4205  * @param[in] transfer
4206  *   E-Switch or NIC flow.
4207  * @param[out] error
4208  *   pointer to error structure.
4209  *
4210  * @return
4211  *   Returns tables resource based on the index, NULL in case of failed.
4212  */
4213 static struct mlx5_flow_tbl_resource *
4214 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
4215                          uint32_t table_id, uint8_t egress,
4216                          uint8_t transfer,
4217                          struct rte_flow_error *error)
4218 {
4219         struct mlx5_priv *priv = dev->data->dev_private;
4220         struct mlx5_ibv_shared *sh = priv->sh;
4221         struct mlx5_flow_tbl_resource *tbl;
4222
4223 #ifdef HAVE_MLX5DV_DR
4224         if (transfer) {
4225                 tbl = &sh->fdb_tbl[table_id];
4226                 if (!tbl->obj)
4227                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4228                                 (sh->fdb_domain, table_id);
4229         } else if (egress) {
4230                 tbl = &sh->tx_tbl[table_id];
4231                 if (!tbl->obj)
4232                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4233                                 (sh->tx_domain, table_id);
4234         } else {
4235                 tbl = &sh->rx_tbl[table_id];
4236                 if (!tbl->obj)
4237                         tbl->obj = mlx5_glue->dr_create_flow_tbl
4238                                 (sh->rx_domain, table_id);
4239         }
4240         if (!tbl->obj) {
4241                 rte_flow_error_set(error, ENOMEM,
4242                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4243                                    NULL, "cannot create table");
4244                 return NULL;
4245         }
4246         rte_atomic32_inc(&tbl->refcnt);
4247         return tbl;
4248 #else
4249         (void)error;
4250         (void)tbl;
4251         if (transfer)
4252                 return &sh->fdb_tbl[table_id];
4253         else if (egress)
4254                 return &sh->tx_tbl[table_id];
4255         else
4256                 return &sh->rx_tbl[table_id];
4257 #endif
4258 }
4259
4260 /**
4261  * Release a flow table.
4262  *
4263  * @param[in] tbl
4264  *   Table resource to be released.
4265  *
4266  * @return
4267  *   Returns 0 if table was released, else return 1;
4268  */
4269 static int
4270 flow_dv_tbl_resource_release(struct mlx5_flow_tbl_resource *tbl)
4271 {
4272         if (!tbl)
4273                 return 0;
4274         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
4275                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
4276                 tbl->obj = NULL;
4277                 return 0;
4278         }
4279         return 1;
4280 }
4281
4282 /**
4283  * Register the flow matcher.
4284  *
4285  * @param dev[in, out]
4286  *   Pointer to rte_eth_dev structure.
4287  * @param[in, out] matcher
4288  *   Pointer to flow matcher.
4289  * @parm[in, out] dev_flow
4290  *   Pointer to the dev_flow.
4291  * @param[out] error
4292  *   pointer to error structure.
4293  *
4294  * @return
4295  *   0 on success otherwise -errno and errno is set.
4296  */
4297 static int
4298 flow_dv_matcher_register(struct rte_eth_dev *dev,
4299                          struct mlx5_flow_dv_matcher *matcher,
4300                          struct mlx5_flow *dev_flow,
4301                          struct rte_flow_error *error)
4302 {
4303         struct mlx5_priv *priv = dev->data->dev_private;
4304         struct mlx5_ibv_shared *sh = priv->sh;
4305         struct mlx5_flow_dv_matcher *cache_matcher;
4306         struct mlx5dv_flow_matcher_attr dv_attr = {
4307                 .type = IBV_FLOW_ATTR_NORMAL,
4308                 .match_mask = (void *)&matcher->mask,
4309         };
4310         struct mlx5_flow_tbl_resource *tbl = NULL;
4311
4312         /* Lookup from cache. */
4313         LIST_FOREACH(cache_matcher, &sh->matchers, next) {
4314                 if (matcher->crc == cache_matcher->crc &&
4315                     matcher->priority == cache_matcher->priority &&
4316                     matcher->egress == cache_matcher->egress &&
4317                     matcher->group == cache_matcher->group &&
4318                     matcher->transfer == cache_matcher->transfer &&
4319                     !memcmp((const void *)matcher->mask.buf,
4320                             (const void *)cache_matcher->mask.buf,
4321                             cache_matcher->mask.size)) {
4322                         DRV_LOG(DEBUG,
4323                                 "priority %hd use %s matcher %p: refcnt %d++",
4324                                 cache_matcher->priority,
4325                                 cache_matcher->egress ? "tx" : "rx",
4326                                 (void *)cache_matcher,
4327                                 rte_atomic32_read(&cache_matcher->refcnt));
4328                         rte_atomic32_inc(&cache_matcher->refcnt);
4329                         dev_flow->dv.matcher = cache_matcher;
4330                         return 0;
4331                 }
4332         }
4333         /* Register new matcher. */
4334         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
4335         if (!cache_matcher)
4336                 return rte_flow_error_set(error, ENOMEM,
4337                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4338                                           "cannot allocate matcher memory");
4339         tbl = flow_dv_tbl_resource_get(dev, matcher->group * MLX5_GROUP_FACTOR,
4340                                        matcher->egress, matcher->transfer,
4341                                        error);
4342         if (!tbl) {
4343                 rte_free(cache_matcher);
4344                 return rte_flow_error_set(error, ENOMEM,
4345                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4346                                           NULL, "cannot create table");
4347         }
4348         *cache_matcher = *matcher;
4349         dv_attr.match_criteria_enable =
4350                 flow_dv_matcher_enable(cache_matcher->mask.buf);
4351         dv_attr.priority = matcher->priority;
4352         if (matcher->egress)
4353                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
4354         cache_matcher->matcher_object =
4355                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
4356         if (!cache_matcher->matcher_object) {
4357                 rte_free(cache_matcher);
4358 #ifdef HAVE_MLX5DV_DR
4359                 flow_dv_tbl_resource_release(tbl);
4360 #endif
4361                 return rte_flow_error_set(error, ENOMEM,
4362                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4363                                           NULL, "cannot create matcher");
4364         }
4365         rte_atomic32_inc(&cache_matcher->refcnt);
4366         LIST_INSERT_HEAD(&sh->matchers, cache_matcher, next);
4367         dev_flow->dv.matcher = cache_matcher;
4368         DRV_LOG(DEBUG, "priority %hd new %s matcher %p: refcnt %d",
4369                 cache_matcher->priority,
4370                 cache_matcher->egress ? "tx" : "rx", (void *)cache_matcher,
4371                 rte_atomic32_read(&cache_matcher->refcnt));
4372         rte_atomic32_inc(&tbl->refcnt);
4373         return 0;
4374 }
4375
4376 /**
4377  * Find existing tag resource or create and register a new one.
4378  *
4379  * @param dev[in, out]
4380  *   Pointer to rte_eth_dev structure.
4381  * @param[in, out] resource
4382  *   Pointer to tag resource.
4383  * @parm[in, out] dev_flow
4384  *   Pointer to the dev_flow.
4385  * @param[out] error
4386  *   pointer to error structure.
4387  *
4388  * @return
4389  *   0 on success otherwise -errno and errno is set.
4390  */
4391 static int
4392 flow_dv_tag_resource_register
4393                         (struct rte_eth_dev *dev,
4394                          struct mlx5_flow_dv_tag_resource *resource,
4395                          struct mlx5_flow *dev_flow,
4396                          struct rte_flow_error *error)
4397 {
4398         struct mlx5_priv *priv = dev->data->dev_private;
4399         struct mlx5_ibv_shared *sh = priv->sh;
4400         struct mlx5_flow_dv_tag_resource *cache_resource;
4401
4402         /* Lookup a matching resource from cache. */
4403         LIST_FOREACH(cache_resource, &sh->tags, next) {
4404                 if (resource->tag == cache_resource->tag) {
4405                         DRV_LOG(DEBUG, "tag resource %p: refcnt %d++",
4406                                 (void *)cache_resource,
4407                                 rte_atomic32_read(&cache_resource->refcnt));
4408                         rte_atomic32_inc(&cache_resource->refcnt);
4409                         dev_flow->flow->tag_resource = cache_resource;
4410                         return 0;
4411                 }
4412         }
4413         /* Register new  resource. */
4414         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
4415         if (!cache_resource)
4416                 return rte_flow_error_set(error, ENOMEM,
4417                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4418                                           "cannot allocate resource memory");
4419         *cache_resource = *resource;
4420         cache_resource->action = mlx5_glue->dv_create_flow_action_tag
4421                 (resource->tag);
4422         if (!cache_resource->action) {
4423                 rte_free(cache_resource);
4424                 return rte_flow_error_set(error, ENOMEM,
4425                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4426                                           NULL, "cannot create action");
4427         }
4428         rte_atomic32_init(&cache_resource->refcnt);
4429         rte_atomic32_inc(&cache_resource->refcnt);
4430         LIST_INSERT_HEAD(&sh->tags, cache_resource, next);
4431         dev_flow->flow->tag_resource = cache_resource;
4432         DRV_LOG(DEBUG, "new tag resource %p: refcnt %d++",
4433                 (void *)cache_resource,
4434                 rte_atomic32_read(&cache_resource->refcnt));
4435         return 0;
4436 }
4437
4438 /**
4439  * Release the tag.
4440  *
4441  * @param dev
4442  *   Pointer to Ethernet device.
4443  * @param flow
4444  *   Pointer to mlx5_flow.
4445  *
4446  * @return
4447  *   1 while a reference on it exists, 0 when freed.
4448  */
4449 static int
4450 flow_dv_tag_release(struct rte_eth_dev *dev,
4451                     struct mlx5_flow_dv_tag_resource *tag)
4452 {
4453         assert(tag);
4454         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
4455                 dev->data->port_id, (void *)tag,
4456                 rte_atomic32_read(&tag->refcnt));
4457         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
4458                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
4459                 LIST_REMOVE(tag, next);
4460                 DRV_LOG(DEBUG, "port %u tag %p: removed",
4461                         dev->data->port_id, (void *)tag);
4462                 rte_free(tag);
4463                 return 0;
4464         }
4465         return 1;
4466 }
4467
4468 /**
4469  * Translate port ID action to vport.
4470  *
4471  * @param[in] dev
4472  *   Pointer to rte_eth_dev structure.
4473  * @param[in] action
4474  *   Pointer to the port ID action.
4475  * @param[out] dst_port_id
4476  *   The target port ID.
4477  * @param[out] error
4478  *   Pointer to the error structure.
4479  *
4480  * @return
4481  *   0 on success, a negative errno value otherwise and rte_errno is set.
4482  */
4483 static int
4484 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
4485                                  const struct rte_flow_action *action,
4486                                  uint32_t *dst_port_id,
4487                                  struct rte_flow_error *error)
4488 {
4489         uint32_t port;
4490         uint16_t port_id;
4491         int ret;
4492         const struct rte_flow_action_port_id *conf =
4493                         (const struct rte_flow_action_port_id *)action->conf;
4494
4495         port = conf->original ? dev->data->port_id : conf->id;
4496         ret = mlx5_port_to_eswitch_info(port, NULL, &port_id);
4497         if (ret)
4498                 return rte_flow_error_set(error, -ret,
4499                                           RTE_FLOW_ERROR_TYPE_ACTION,
4500                                           NULL,
4501                                           "No eswitch info was found for port");
4502         *dst_port_id = port_id;
4503         return 0;
4504 }
4505
4506 /**
4507  * Fill the flow with DV spec.
4508  *
4509  * @param[in] dev
4510  *   Pointer to rte_eth_dev structure.
4511  * @param[in, out] dev_flow
4512  *   Pointer to the sub flow.
4513  * @param[in] attr
4514  *   Pointer to the flow attributes.
4515  * @param[in] items
4516  *   Pointer to the list of items.
4517  * @param[in] actions
4518  *   Pointer to the list of actions.
4519  * @param[out] error
4520  *   Pointer to the error structure.
4521  *
4522  * @return
4523  *   0 on success, a negative errno value otherwise and rte_errno is set.
4524  */
4525 static int
4526 flow_dv_translate(struct rte_eth_dev *dev,
4527                   struct mlx5_flow *dev_flow,
4528                   const struct rte_flow_attr *attr,
4529                   const struct rte_flow_item items[],
4530                   const struct rte_flow_action actions[],
4531                   struct rte_flow_error *error)
4532 {
4533         struct mlx5_priv *priv = dev->data->dev_private;
4534         struct rte_flow *flow = dev_flow->flow;
4535         uint64_t item_flags = 0;
4536         uint64_t last_item = 0;
4537         uint64_t action_flags = 0;
4538         uint64_t priority = attr->priority;
4539         struct mlx5_flow_dv_matcher matcher = {
4540                 .mask = {
4541                         .size = sizeof(matcher.mask.buf),
4542                 },
4543         };
4544         int actions_n = 0;
4545         bool actions_end = false;
4546         struct mlx5_flow_dv_modify_hdr_resource res = {
4547                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4548                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
4549         };
4550         union flow_dv_attr flow_attr = { .attr = 0 };
4551         struct mlx5_flow_dv_tag_resource tag_resource;
4552         uint32_t modify_action_position = UINT32_MAX;
4553         void *match_mask = matcher.mask.buf;
4554         void *match_value = dev_flow->dv.value.buf;
4555
4556         flow->group = attr->group;
4557         if (attr->transfer)
4558                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4559         if (priority == MLX5_FLOW_PRIO_RSVD)
4560                 priority = priv->config.flow_prio - 1;
4561         for (; !actions_end ; actions++) {
4562                 const struct rte_flow_action_queue *queue;
4563                 const struct rte_flow_action_rss *rss;
4564                 const struct rte_flow_action *action = actions;
4565                 const struct rte_flow_action_count *count = action->conf;
4566                 const uint8_t *rss_key;
4567                 const struct rte_flow_action_jump *jump_data;
4568                 struct mlx5_flow_dv_jump_tbl_resource jump_tbl_resource;
4569                 struct mlx5_flow_tbl_resource *tbl;
4570                 uint32_t port_id = 0;
4571                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
4572
4573                 switch (actions->type) {
4574                 case RTE_FLOW_ACTION_TYPE_VOID:
4575                         break;
4576                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4577                         if (flow_dv_translate_action_port_id(dev, action,
4578                                                              &port_id, error))
4579                                 return -rte_errno;
4580                         port_id_resource.port_id = port_id;
4581                         if (flow_dv_port_id_action_resource_register
4582                             (dev, &port_id_resource, dev_flow, error))
4583                                 return -rte_errno;
4584                         dev_flow->dv.actions[actions_n++] =
4585                                 dev_flow->dv.port_id_action->action;
4586                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4587                         break;
4588                 case RTE_FLOW_ACTION_TYPE_FLAG:
4589                         tag_resource.tag =
4590                                 mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
4591                         if (!flow->tag_resource)
4592                                 if (flow_dv_tag_resource_register
4593                                     (dev, &tag_resource, dev_flow, error))
4594                                         return errno;
4595                         dev_flow->dv.actions[actions_n++] =
4596                                 flow->tag_resource->action;
4597                         action_flags |= MLX5_FLOW_ACTION_FLAG;
4598                         break;
4599                 case RTE_FLOW_ACTION_TYPE_MARK:
4600                         tag_resource.tag = mlx5_flow_mark_set
4601                               (((const struct rte_flow_action_mark *)
4602                                (actions->conf))->id);
4603                         if (!flow->tag_resource)
4604                                 if (flow_dv_tag_resource_register
4605                                     (dev, &tag_resource, dev_flow, error))
4606                                         return errno;
4607                         dev_flow->dv.actions[actions_n++] =
4608                                 flow->tag_resource->action;
4609                         action_flags |= MLX5_FLOW_ACTION_MARK;
4610                         break;
4611                 case RTE_FLOW_ACTION_TYPE_DROP:
4612                         action_flags |= MLX5_FLOW_ACTION_DROP;
4613                         break;
4614                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4615                         queue = actions->conf;
4616                         flow->rss.queue_num = 1;
4617                         (*flow->queue)[0] = queue->index;
4618                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4619                         break;
4620                 case RTE_FLOW_ACTION_TYPE_RSS:
4621                         rss = actions->conf;
4622                         if (flow->queue)
4623                                 memcpy((*flow->queue), rss->queue,
4624                                        rss->queue_num * sizeof(uint16_t));
4625                         flow->rss.queue_num = rss->queue_num;
4626                         /* NULL RSS key indicates default RSS key. */
4627                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
4628                         memcpy(flow->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
4629                         /* RSS type 0 indicates default RSS type ETH_RSS_IP. */
4630                         flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
4631                         flow->rss.level = rss->level;
4632                         action_flags |= MLX5_FLOW_ACTION_RSS;
4633                         break;
4634                 case RTE_FLOW_ACTION_TYPE_COUNT:
4635                         if (!priv->config.devx) {
4636                                 rte_errno = ENOTSUP;
4637                                 goto cnt_err;
4638                         }
4639                         flow->counter = flow_dv_counter_alloc(dev,
4640                                                               count->shared,
4641                                                               count->id,
4642                                                               attr->group);
4643                         if (flow->counter == NULL)
4644                                 goto cnt_err;
4645                         dev_flow->dv.actions[actions_n++] =
4646                                 flow->counter->action;
4647                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4648                         break;
4649 cnt_err:
4650                         if (rte_errno == ENOTSUP)
4651                                 return rte_flow_error_set
4652                                               (error, ENOTSUP,
4653                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4654                                                NULL,
4655                                                "count action not supported");
4656                         else
4657                                 return rte_flow_error_set
4658                                                 (error, rte_errno,
4659                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4660                                                  action,
4661                                                  "cannot create counter"
4662                                                   " object.");
4663                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4664                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4665                         if (flow_dv_create_action_l2_encap(dev, actions,
4666                                                            dev_flow,
4667                                                            attr->transfer,
4668                                                            error))
4669                                 return -rte_errno;
4670                         dev_flow->dv.actions[actions_n++] =
4671                                 dev_flow->dv.encap_decap->verbs_action;
4672                         action_flags |= actions->type ==
4673                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4674                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4675                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4676                         break;
4677                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4678                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4679                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
4680                                                            attr->transfer,
4681                                                            error))
4682                                 return -rte_errno;
4683                         dev_flow->dv.actions[actions_n++] =
4684                                 dev_flow->dv.encap_decap->verbs_action;
4685                         action_flags |= actions->type ==
4686                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4687                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4688                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4689                         break;
4690                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4691                         /* Handle encap with preceding decap. */
4692                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
4693                                 if (flow_dv_create_action_raw_encap
4694                                         (dev, actions, dev_flow, attr, error))
4695                                         return -rte_errno;
4696                                 dev_flow->dv.actions[actions_n++] =
4697                                         dev_flow->dv.encap_decap->verbs_action;
4698                         } else {
4699                                 /* Handle encap without preceding decap. */
4700                                 if (flow_dv_create_action_l2_encap
4701                                     (dev, actions, dev_flow, attr->transfer,
4702                                      error))
4703                                         return -rte_errno;
4704                                 dev_flow->dv.actions[actions_n++] =
4705                                         dev_flow->dv.encap_decap->verbs_action;
4706                         }
4707                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4708                         break;
4709                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4710                         /* Check if this decap is followed by encap. */
4711                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
4712                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
4713                                action++) {
4714                         }
4715                         /* Handle decap only if it isn't followed by encap. */
4716                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4717                                 if (flow_dv_create_action_l2_decap
4718                                     (dev, dev_flow, attr->transfer, error))
4719                                         return -rte_errno;
4720                                 dev_flow->dv.actions[actions_n++] =
4721                                         dev_flow->dv.encap_decap->verbs_action;
4722                         }
4723                         /* If decap is followed by encap, handle it at encap. */
4724                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4725                         break;
4726                 case RTE_FLOW_ACTION_TYPE_JUMP:
4727                         jump_data = action->conf;
4728                         tbl = flow_dv_tbl_resource_get(dev, jump_data->group *
4729                                                        MLX5_GROUP_FACTOR,
4730                                                        attr->egress,
4731                                                        attr->transfer, error);
4732                         if (!tbl)
4733                                 return rte_flow_error_set
4734                                                 (error, errno,
4735                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4736                                                  NULL,
4737                                                  "cannot create jump action.");
4738                         jump_tbl_resource.tbl = tbl;
4739                         if (flow_dv_jump_tbl_resource_register
4740                             (dev, &jump_tbl_resource, dev_flow, error)) {
4741                                 flow_dv_tbl_resource_release(tbl);
4742                                 return rte_flow_error_set
4743                                                 (error, errno,
4744                                                  RTE_FLOW_ERROR_TYPE_ACTION,
4745                                                  NULL,
4746                                                  "cannot create jump action.");
4747                         }
4748                         dev_flow->dv.actions[actions_n++] =
4749                                 dev_flow->dv.jump->action;
4750                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4751                         break;
4752                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4753                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4754                         if (flow_dv_convert_action_modify_mac(&res, actions,
4755                                                               error))
4756                                 return -rte_errno;
4757                         action_flags |= actions->type ==
4758                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4759                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
4760                                         MLX5_FLOW_ACTION_SET_MAC_DST;
4761                         break;
4762                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4763                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4764                         if (flow_dv_convert_action_modify_ipv4(&res, actions,
4765                                                                error))
4766                                 return -rte_errno;
4767                         action_flags |= actions->type ==
4768                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4769                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
4770                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
4771                         break;
4772                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4773                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4774                         if (flow_dv_convert_action_modify_ipv6(&res, actions,
4775                                                                error))
4776                                 return -rte_errno;
4777                         action_flags |= actions->type ==
4778                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4779                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
4780                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
4781                         break;
4782                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4783                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4784                         if (flow_dv_convert_action_modify_tp(&res, actions,
4785                                                              items, &flow_attr,
4786                                                              error))
4787                                 return -rte_errno;
4788                         action_flags |= actions->type ==
4789                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4790                                         MLX5_FLOW_ACTION_SET_TP_SRC :
4791                                         MLX5_FLOW_ACTION_SET_TP_DST;
4792                         break;
4793                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4794                         if (flow_dv_convert_action_modify_dec_ttl(&res, items,
4795                                                                   &flow_attr,
4796                                                                   error))
4797                                 return -rte_errno;
4798                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
4799                         break;
4800                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4801                         if (flow_dv_convert_action_modify_ttl(&res, actions,
4802                                                              items, &flow_attr,
4803                                                              error))
4804                                 return -rte_errno;
4805                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
4806                         break;
4807                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4808                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4809                         if (flow_dv_convert_action_modify_tcp_seq(&res, actions,
4810                                                                   error))
4811                                 return -rte_errno;
4812                         action_flags |= actions->type ==
4813                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4814                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
4815                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4816                         break;
4817
4818                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4819                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4820                         if (flow_dv_convert_action_modify_tcp_ack(&res, actions,
4821                                                                   error))
4822                                 return -rte_errno;
4823                         action_flags |= actions->type ==
4824                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4825                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
4826                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
4827                         break;
4828                 case RTE_FLOW_ACTION_TYPE_END:
4829                         actions_end = true;
4830                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) {
4831                                 /* create modify action if needed. */
4832                                 if (flow_dv_modify_hdr_resource_register
4833                                                                 (dev, &res,
4834                                                                  dev_flow,
4835                                                                  error))
4836                                         return -rte_errno;
4837                                 dev_flow->dv.actions[modify_action_position] =
4838                                         dev_flow->dv.modify_hdr->verbs_action;
4839                         }
4840                         break;
4841                 default:
4842                         break;
4843                 }
4844                 if ((action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS) &&
4845                     modify_action_position == UINT32_MAX)
4846                         modify_action_position = actions_n++;
4847         }
4848         dev_flow->dv.actions_n = actions_n;
4849         flow->actions = action_flags;
4850         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4851                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4852
4853                 switch (items->type) {
4854                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4855                         flow_dv_translate_item_port_id(dev, match_mask,
4856                                                        match_value, items);
4857                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4858                         break;
4859                 case RTE_FLOW_ITEM_TYPE_ETH:
4860                         flow_dv_translate_item_eth(match_mask, match_value,
4861                                                    items, tunnel);
4862                         matcher.priority = MLX5_PRIORITY_MAP_L2;
4863                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4864                                              MLX5_FLOW_LAYER_OUTER_L2;
4865                         break;
4866                 case RTE_FLOW_ITEM_TYPE_VLAN:
4867                         flow_dv_translate_item_vlan(match_mask, match_value,
4868                                                     items, tunnel);
4869                         matcher.priority = MLX5_PRIORITY_MAP_L2;
4870                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
4871                                               MLX5_FLOW_LAYER_INNER_VLAN) :
4872                                              (MLX5_FLOW_LAYER_OUTER_L2 |
4873                                               MLX5_FLOW_LAYER_OUTER_VLAN);
4874                         break;
4875                 case RTE_FLOW_ITEM_TYPE_IPV4:
4876                         flow_dv_translate_item_ipv4(match_mask, match_value,
4877                                                     items, tunnel, attr->group);
4878                         matcher.priority = MLX5_PRIORITY_MAP_L3;
4879                         dev_flow->dv.hash_fields |=
4880                                 mlx5_flow_hashfields_adjust
4881                                         (dev_flow, tunnel,
4882                                          MLX5_IPV4_LAYER_TYPES,
4883                                          MLX5_IPV4_IBV_RX_HASH);
4884                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4885                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4886                         mlx5_flow_tunnel_ip_check(items, &last_item);
4887                         break;
4888                 case RTE_FLOW_ITEM_TYPE_IPV6:
4889                         flow_dv_translate_item_ipv6(match_mask, match_value,
4890                                                     items, tunnel, attr->group);
4891                         matcher.priority = MLX5_PRIORITY_MAP_L3;
4892                         dev_flow->dv.hash_fields |=
4893                                 mlx5_flow_hashfields_adjust
4894                                         (dev_flow, tunnel,
4895                                          MLX5_IPV6_LAYER_TYPES,
4896                                          MLX5_IPV6_IBV_RX_HASH);
4897                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4898                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4899                         mlx5_flow_tunnel_ip_check(items, &last_item);
4900                         break;
4901                 case RTE_FLOW_ITEM_TYPE_TCP:
4902                         flow_dv_translate_item_tcp(match_mask, match_value,
4903                                                    items, tunnel);
4904                         matcher.priority = MLX5_PRIORITY_MAP_L4;
4905                         dev_flow->dv.hash_fields |=
4906                                 mlx5_flow_hashfields_adjust
4907                                         (dev_flow, tunnel, ETH_RSS_TCP,
4908                                          IBV_RX_HASH_SRC_PORT_TCP |
4909                                          IBV_RX_HASH_DST_PORT_TCP);
4910                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4911                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4912                         break;
4913                 case RTE_FLOW_ITEM_TYPE_UDP:
4914                         flow_dv_translate_item_udp(match_mask, match_value,
4915                                                    items, tunnel);
4916                         matcher.priority = MLX5_PRIORITY_MAP_L4;
4917                         dev_flow->dv.hash_fields |=
4918                                 mlx5_flow_hashfields_adjust
4919                                         (dev_flow, tunnel, ETH_RSS_UDP,
4920                                          IBV_RX_HASH_SRC_PORT_UDP |
4921                                          IBV_RX_HASH_DST_PORT_UDP);
4922                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4923                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4924                         break;
4925                 case RTE_FLOW_ITEM_TYPE_GRE:
4926                         flow_dv_translate_item_gre(match_mask, match_value,
4927                                                    items, tunnel);
4928                         last_item = MLX5_FLOW_LAYER_GRE;
4929                         break;
4930                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4931                         flow_dv_translate_item_gre_key(match_mask,
4932                                                        match_value, items);
4933                         item_flags |= MLX5_FLOW_LAYER_GRE_KEY;
4934                         break;
4935                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4936                         flow_dv_translate_item_nvgre(match_mask, match_value,
4937                                                      items, tunnel);
4938                         last_item = MLX5_FLOW_LAYER_GRE;
4939                         break;
4940                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4941                         flow_dv_translate_item_vxlan(match_mask, match_value,
4942                                                      items, tunnel);
4943                         last_item = MLX5_FLOW_LAYER_VXLAN;
4944                         break;
4945                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4946                         flow_dv_translate_item_vxlan(match_mask, match_value,
4947                                                      items, tunnel);
4948                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4949                         break;
4950                 case RTE_FLOW_ITEM_TYPE_MPLS:
4951                         flow_dv_translate_item_mpls(match_mask, match_value,
4952                                                     items, last_item, tunnel);
4953                         last_item = MLX5_FLOW_LAYER_MPLS;
4954                         break;
4955                 case RTE_FLOW_ITEM_TYPE_META:
4956                         flow_dv_translate_item_meta(match_mask, match_value,
4957                                                     items);
4958                         last_item = MLX5_FLOW_ITEM_METADATA;
4959                         break;
4960                 case RTE_FLOW_ITEM_TYPE_ICMP:
4961                         flow_dv_translate_item_icmp(match_mask, match_value,
4962                                                     items, tunnel);
4963                         item_flags |= MLX5_FLOW_LAYER_ICMP;
4964                         break;
4965                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4966                         flow_dv_translate_item_icmp6(match_mask, match_value,
4967                                                       items, tunnel);
4968                         item_flags |= MLX5_FLOW_LAYER_ICMP6;
4969                         break;
4970                 default:
4971                         break;
4972                 }
4973                 item_flags |= last_item;
4974         }
4975         /*
4976          * In case of ingress traffic when E-Switch mode is enabled,
4977          * we have two cases where we need to set the source port manually.
4978          * The first one, is in case of Nic steering rule, and the second is
4979          * E-Switch rule where no port_id item was found. In both cases
4980          * the source port is set according the current port in use.
4981          */
4982         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
4983             (priv->representor || priv->master)) {
4984                 if (flow_dv_translate_item_port_id(dev, match_mask,
4985                                                    match_value, NULL))
4986                         return -rte_errno;
4987         }
4988         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
4989                                          dev_flow->dv.value.buf));
4990         dev_flow->layers = item_flags;
4991         /* Register matcher. */
4992         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
4993                                     matcher.mask.size);
4994         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
4995                                                      matcher.priority);
4996         matcher.egress = attr->egress;
4997         matcher.group = attr->group;
4998         matcher.transfer = attr->transfer;
4999         if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
5000                 return -rte_errno;
5001         return 0;
5002 }
5003
5004 /**
5005  * Apply the flow to the NIC.
5006  *
5007  * @param[in] dev
5008  *   Pointer to the Ethernet device structure.
5009  * @param[in, out] flow
5010  *   Pointer to flow structure.
5011  * @param[out] error
5012  *   Pointer to error structure.
5013  *
5014  * @return
5015  *   0 on success, a negative errno value otherwise and rte_errno is set.
5016  */
5017 static int
5018 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
5019               struct rte_flow_error *error)
5020 {
5021         struct mlx5_flow_dv *dv;
5022         struct mlx5_flow *dev_flow;
5023         struct mlx5_priv *priv = dev->data->dev_private;
5024         int n;
5025         int err;
5026
5027         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5028                 dv = &dev_flow->dv;
5029                 n = dv->actions_n;
5030                 if (flow->actions & MLX5_FLOW_ACTION_DROP) {
5031                         if (flow->transfer) {
5032                                 dv->actions[n++] = priv->sh->esw_drop_action;
5033                         } else {
5034                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
5035                                 if (!dv->hrxq) {
5036                                         rte_flow_error_set
5037                                                 (error, errno,
5038                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5039                                                  NULL,
5040                                                  "cannot get drop hash queue");
5041                                         goto error;
5042                                 }
5043                                 dv->actions[n++] = dv->hrxq->action;
5044                         }
5045                 } else if (flow->actions &
5046                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
5047                         struct mlx5_hrxq *hrxq;
5048
5049                         hrxq = mlx5_hrxq_get(dev, flow->key,
5050                                              MLX5_RSS_HASH_KEY_LEN,
5051                                              dv->hash_fields,
5052                                              (*flow->queue),
5053                                              flow->rss.queue_num);
5054                         if (!hrxq)
5055                                 hrxq = mlx5_hrxq_new
5056                                         (dev, flow->key, MLX5_RSS_HASH_KEY_LEN,
5057                                          dv->hash_fields, (*flow->queue),
5058                                          flow->rss.queue_num,
5059                                          !!(dev_flow->layers &
5060                                             MLX5_FLOW_LAYER_TUNNEL));
5061                         if (!hrxq) {
5062                                 rte_flow_error_set
5063                                         (error, rte_errno,
5064                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5065                                          "cannot get hash queue");
5066                                 goto error;
5067                         }
5068                         dv->hrxq = hrxq;
5069                         dv->actions[n++] = dv->hrxq->action;
5070                 }
5071                 dv->flow =
5072                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
5073                                                   (void *)&dv->value, n,
5074                                                   dv->actions);
5075                 if (!dv->flow) {
5076                         rte_flow_error_set(error, errno,
5077                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5078                                            NULL,
5079                                            "hardware refuses to create flow");
5080                         goto error;
5081                 }
5082         }
5083         return 0;
5084 error:
5085         err = rte_errno; /* Save rte_errno before cleanup. */
5086         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5087                 struct mlx5_flow_dv *dv = &dev_flow->dv;
5088                 if (dv->hrxq) {
5089                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
5090                                 mlx5_hrxq_drop_release(dev);
5091                         else
5092                                 mlx5_hrxq_release(dev, dv->hrxq);
5093                         dv->hrxq = NULL;
5094                 }
5095         }
5096         rte_errno = err; /* Restore rte_errno. */
5097         return -rte_errno;
5098 }
5099
5100 /**
5101  * Release the flow matcher.
5102  *
5103  * @param dev
5104  *   Pointer to Ethernet device.
5105  * @param flow
5106  *   Pointer to mlx5_flow.
5107  *
5108  * @return
5109  *   1 while a reference on it exists, 0 when freed.
5110  */
5111 static int
5112 flow_dv_matcher_release(struct rte_eth_dev *dev,
5113                         struct mlx5_flow *flow)
5114 {
5115         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
5116         struct mlx5_priv *priv = dev->data->dev_private;
5117         struct mlx5_ibv_shared *sh = priv->sh;
5118         struct mlx5_flow_tbl_resource *tbl;
5119
5120         assert(matcher->matcher_object);
5121         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
5122                 dev->data->port_id, (void *)matcher,
5123                 rte_atomic32_read(&matcher->refcnt));
5124         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
5125                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
5126                            (matcher->matcher_object));
5127                 LIST_REMOVE(matcher, next);
5128                 if (matcher->egress)
5129                         tbl = &sh->tx_tbl[matcher->group];
5130                 else
5131                         tbl = &sh->rx_tbl[matcher->group];
5132                 flow_dv_tbl_resource_release(tbl);
5133                 rte_free(matcher);
5134                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
5135                         dev->data->port_id, (void *)matcher);
5136                 return 0;
5137         }
5138         return 1;
5139 }
5140
5141 /**
5142  * Release an encap/decap resource.
5143  *
5144  * @param flow
5145  *   Pointer to mlx5_flow.
5146  *
5147  * @return
5148  *   1 while a reference on it exists, 0 when freed.
5149  */
5150 static int
5151 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
5152 {
5153         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
5154                                                 flow->dv.encap_decap;
5155
5156         assert(cache_resource->verbs_action);
5157         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
5158                 (void *)cache_resource,
5159                 rte_atomic32_read(&cache_resource->refcnt));
5160         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5161                 claim_zero(mlx5_glue->destroy_flow_action
5162                                 (cache_resource->verbs_action));
5163                 LIST_REMOVE(cache_resource, next);
5164                 rte_free(cache_resource);
5165                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
5166                         (void *)cache_resource);
5167                 return 0;
5168         }
5169         return 1;
5170 }
5171
5172 /**
5173  * Release an jump to table action resource.
5174  *
5175  * @param flow
5176  *   Pointer to mlx5_flow.
5177  *
5178  * @return
5179  *   1 while a reference on it exists, 0 when freed.
5180  */
5181 static int
5182 flow_dv_jump_tbl_resource_release(struct mlx5_flow *flow)
5183 {
5184         struct mlx5_flow_dv_jump_tbl_resource *cache_resource =
5185                                                 flow->dv.jump;
5186
5187         assert(cache_resource->action);
5188         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
5189                 (void *)cache_resource,
5190                 rte_atomic32_read(&cache_resource->refcnt));
5191         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5192                 claim_zero(mlx5_glue->destroy_flow_action
5193                                 (cache_resource->action));
5194                 LIST_REMOVE(cache_resource, next);
5195                 flow_dv_tbl_resource_release(cache_resource->tbl);
5196                 rte_free(cache_resource);
5197                 DRV_LOG(DEBUG, "jump table resource %p: removed",
5198                         (void *)cache_resource);
5199                 return 0;
5200         }
5201         return 1;
5202 }
5203
5204 /**
5205  * Release a modify-header resource.
5206  *
5207  * @param flow
5208  *   Pointer to mlx5_flow.
5209  *
5210  * @return
5211  *   1 while a reference on it exists, 0 when freed.
5212  */
5213 static int
5214 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
5215 {
5216         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
5217                                                 flow->dv.modify_hdr;
5218
5219         assert(cache_resource->verbs_action);
5220         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
5221                 (void *)cache_resource,
5222                 rte_atomic32_read(&cache_resource->refcnt));
5223         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5224                 claim_zero(mlx5_glue->destroy_flow_action
5225                                 (cache_resource->verbs_action));
5226                 LIST_REMOVE(cache_resource, next);
5227                 rte_free(cache_resource);
5228                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
5229                         (void *)cache_resource);
5230                 return 0;
5231         }
5232         return 1;
5233 }
5234
5235 /**
5236  * Release port ID action resource.
5237  *
5238  * @param flow
5239  *   Pointer to mlx5_flow.
5240  *
5241  * @return
5242  *   1 while a reference on it exists, 0 when freed.
5243  */
5244 static int
5245 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
5246 {
5247         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
5248                 flow->dv.port_id_action;
5249
5250         assert(cache_resource->action);
5251         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
5252                 (void *)cache_resource,
5253                 rte_atomic32_read(&cache_resource->refcnt));
5254         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
5255                 claim_zero(mlx5_glue->destroy_flow_action
5256                                 (cache_resource->action));
5257                 LIST_REMOVE(cache_resource, next);
5258                 rte_free(cache_resource);
5259                 DRV_LOG(DEBUG, "port id action resource %p: removed",
5260                         (void *)cache_resource);
5261                 return 0;
5262         }
5263         return 1;
5264 }
5265
5266 /**
5267  * Remove the flow from the NIC but keeps it in memory.
5268  *
5269  * @param[in] dev
5270  *   Pointer to Ethernet device.
5271  * @param[in, out] flow
5272  *   Pointer to flow structure.
5273  */
5274 static void
5275 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
5276 {
5277         struct mlx5_flow_dv *dv;
5278         struct mlx5_flow *dev_flow;
5279
5280         if (!flow)
5281                 return;
5282         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
5283                 dv = &dev_flow->dv;
5284                 if (dv->flow) {
5285                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
5286                         dv->flow = NULL;
5287                 }
5288                 if (dv->hrxq) {
5289                         if (flow->actions & MLX5_FLOW_ACTION_DROP)
5290                                 mlx5_hrxq_drop_release(dev);
5291                         else
5292                                 mlx5_hrxq_release(dev, dv->hrxq);
5293                         dv->hrxq = NULL;
5294                 }
5295         }
5296 }
5297
5298 /**
5299  * Remove the flow from the NIC and the memory.
5300  *
5301  * @param[in] dev
5302  *   Pointer to the Ethernet device structure.
5303  * @param[in, out] flow
5304  *   Pointer to flow structure.
5305  */
5306 static void
5307 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
5308 {
5309         struct mlx5_flow *dev_flow;
5310
5311         if (!flow)
5312                 return;
5313         flow_dv_remove(dev, flow);
5314         if (flow->counter) {
5315                 flow_dv_counter_release(dev, flow->counter);
5316                 flow->counter = NULL;
5317         }
5318         if (flow->tag_resource) {
5319                 flow_dv_tag_release(dev, flow->tag_resource);
5320                 flow->tag_resource = NULL;
5321         }
5322         while (!LIST_EMPTY(&flow->dev_flows)) {
5323                 dev_flow = LIST_FIRST(&flow->dev_flows);
5324                 LIST_REMOVE(dev_flow, next);
5325                 if (dev_flow->dv.matcher)
5326                         flow_dv_matcher_release(dev, dev_flow);
5327                 if (dev_flow->dv.encap_decap)
5328                         flow_dv_encap_decap_resource_release(dev_flow);
5329                 if (dev_flow->dv.modify_hdr)
5330                         flow_dv_modify_hdr_resource_release(dev_flow);
5331                 if (dev_flow->dv.jump)
5332                         flow_dv_jump_tbl_resource_release(dev_flow);
5333                 if (dev_flow->dv.port_id_action)
5334                         flow_dv_port_id_action_resource_release(dev_flow);
5335                 rte_free(dev_flow);
5336         }
5337 }
5338
5339 /**
5340  * Query a dv flow  rule for its statistics via devx.
5341  *
5342  * @param[in] dev
5343  *   Pointer to Ethernet device.
5344  * @param[in] flow
5345  *   Pointer to the sub flow.
5346  * @param[out] data
5347  *   data retrieved by the query.
5348  * @param[out] error
5349  *   Perform verbose error reporting if not NULL.
5350  *
5351  * @return
5352  *   0 on success, a negative errno value otherwise and rte_errno is set.
5353  */
5354 static int
5355 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
5356                     void *data, struct rte_flow_error *error)
5357 {
5358         struct mlx5_priv *priv = dev->data->dev_private;
5359         struct rte_flow_query_count *qc = data;
5360
5361         if (!priv->config.devx)
5362                 return rte_flow_error_set(error, ENOTSUP,
5363                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5364                                           NULL,
5365                                           "counters are not supported");
5366         if (flow->counter) {
5367                 uint64_t pkts, bytes;
5368                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
5369                                                &bytes);
5370
5371                 if (err)
5372                         return rte_flow_error_set(error, -err,
5373                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5374                                         NULL, "cannot read counters");
5375                 qc->hits_set = 1;
5376                 qc->bytes_set = 1;
5377                 qc->hits = pkts - flow->counter->hits;
5378                 qc->bytes = bytes - flow->counter->bytes;
5379                 if (qc->reset) {
5380                         flow->counter->hits = pkts;
5381                         flow->counter->bytes = bytes;
5382                 }
5383                 return 0;
5384         }
5385         return rte_flow_error_set(error, EINVAL,
5386                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5387                                   NULL,
5388                                   "counters are not available");
5389 }
5390
5391 /**
5392  * Query a flow.
5393  *
5394  * @see rte_flow_query()
5395  * @see rte_flow_ops
5396  */
5397 static int
5398 flow_dv_query(struct rte_eth_dev *dev,
5399               struct rte_flow *flow __rte_unused,
5400               const struct rte_flow_action *actions __rte_unused,
5401               void *data __rte_unused,
5402               struct rte_flow_error *error __rte_unused)
5403 {
5404         int ret = -EINVAL;
5405
5406         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5407                 switch (actions->type) {
5408                 case RTE_FLOW_ACTION_TYPE_VOID:
5409                         break;
5410                 case RTE_FLOW_ACTION_TYPE_COUNT:
5411                         ret = flow_dv_query_count(dev, flow, data, error);
5412                         break;
5413                 default:
5414                         return rte_flow_error_set(error, ENOTSUP,
5415                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5416                                                   actions,
5417                                                   "action not supported");
5418                 }
5419         }
5420         return ret;
5421 }
5422
5423 /*
5424  * Mutex-protected thunk to flow_dv_translate().
5425  */
5426 static int
5427 flow_d_translate(struct rte_eth_dev *dev,
5428                  struct mlx5_flow *dev_flow,
5429                  const struct rte_flow_attr *attr,
5430                  const struct rte_flow_item items[],
5431                  const struct rte_flow_action actions[],
5432                  struct rte_flow_error *error)
5433 {
5434         int ret;
5435
5436         flow_d_shared_lock(dev);
5437         ret = flow_dv_translate(dev, dev_flow, attr, items, actions, error);
5438         flow_d_shared_unlock(dev);
5439         return ret;
5440 }
5441
5442 /*
5443  * Mutex-protected thunk to flow_dv_apply().
5444  */
5445 static int
5446 flow_d_apply(struct rte_eth_dev *dev,
5447              struct rte_flow *flow,
5448              struct rte_flow_error *error)
5449 {
5450         int ret;
5451
5452         flow_d_shared_lock(dev);
5453         ret = flow_dv_apply(dev, flow, error);
5454         flow_d_shared_unlock(dev);
5455         return ret;
5456 }
5457
5458 /*
5459  * Mutex-protected thunk to flow_dv_remove().
5460  */
5461 static void
5462 flow_d_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
5463 {
5464         flow_d_shared_lock(dev);
5465         flow_dv_remove(dev, flow);
5466         flow_d_shared_unlock(dev);
5467 }
5468
5469 /*
5470  * Mutex-protected thunk to flow_dv_destroy().
5471  */
5472 static void
5473 flow_d_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
5474 {
5475         flow_d_shared_lock(dev);
5476         flow_dv_destroy(dev, flow);
5477         flow_d_shared_unlock(dev);
5478 }
5479
5480 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
5481         .validate = flow_dv_validate,
5482         .prepare = flow_dv_prepare,
5483         .translate = flow_d_translate,
5484         .apply = flow_d_apply,
5485         .remove = flow_d_remove,
5486         .destroy = flow_d_destroy,
5487         .query = flow_dv_query,
5488 };
5489
5490 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */