drivers/net/mlx5/mlx5_rxq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <assert.h>
   8 #include <errno.h>
   9 #include <string.h>
  10 #include <stdint.h>
  11 #include <fcntl.h>
  12 #include <sys/queue.h>
  13
  14 /* Verbs header. */
  15 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  16 #ifdef PEDANTIC
  17 #pragma GCC diagnostic ignored "-Wpedantic"
  18 #endif
  19 #include <infiniband/verbs.h>
  20 #include <infiniband/mlx5dv.h>
  21 #ifdef PEDANTIC
  22 #pragma GCC diagnostic error "-Wpedantic"
  23 #endif
  24
  25 #include <rte_mbuf.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ethdev_driver.h>
  28 #include <rte_common.h>
  29 #include <rte_interrupts.h>
  30 #include <rte_debug.h>
  31 #include <rte_io.h>
  32
  33 #include "mlx5.h"
  34 #include "mlx5_rxtx.h"
  35 #include "mlx5_utils.h"
  36 #include "mlx5_autoconf.h"
  37 #include "mlx5_defs.h"
  38 #include "mlx5_glue.h"
  39
  40 /* Default RSS hash key also used for ConnectX-3. */
  41 uint8_t rss_hash_default_key[] = {
  42         0x2c, 0xc6, 0x81, 0xd1,
  43         0x5b, 0xdb, 0xf4, 0xf7,
  44         0xfc, 0xa2, 0x83, 0x19,
  45         0xdb, 0x1a, 0x3e, 0x94,
  46         0x6b, 0x9e, 0x38, 0xd9,
  47         0x2c, 0x9c, 0x03, 0xd1,
  48         0xad, 0x99, 0x44, 0xa7,
  49         0xd9, 0x56, 0x3d, 0x59,
  50         0x06, 0x3c, 0x25, 0xf3,
  51         0xfc, 0x1f, 0xdc, 0x2a,
  52 };
  53
  54 /* Length of the default RSS hash key. */
  55 static_assert(MLX5_RSS_HASH_KEY_LEN ==
  56               (unsigned int)sizeof(rss_hash_default_key),
  57               "wrong RSS default key size.");
  58
  59 /**
  60  * Check whether Multi-Packet RQ can be enabled for the device.
  61  *
  62  * @param dev
  63  *   Pointer to Ethernet device.
  64  *
  65  * @return
  66  *   1 if supported, negative errno value if not.
  67  */
  68 inline int
  69 mlx5_check_mprq_support(struct rte_eth_dev *dev)
  70 {
  71         struct mlx5_priv *priv = dev->data->dev_private;
  72
  73         if (priv->config.mprq.enabled &&
  74             priv->rxqs_n >= priv->config.mprq.min_rxqs_num)
  75                 return 1;
  76         return -ENOTSUP;
  77 }
  78
  79 /**
  80  * Check whether Multi-Packet RQ is enabled for the Rx queue.
  81  *
  82  *  @param rxq
  83  *     Pointer to receive queue structure.
  84  *
  85  * @return
  86  *   0 if disabled, otherwise enabled.
  87  */
  88 inline int
  89 mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq)
  90 {
  91         return rxq->strd_num_n > 0;
  92 }
  93
  94 /**
  95  * Check whether Multi-Packet RQ is enabled for the device.
  96  * MPRQ can be enabled explicitly, or implicitly by enabling LRO.
  97  *
  98  * @param dev
  99  *   Pointer to Ethernet device.
 100  *
 101  * @return
 102  *   0 if disabled, otherwise enabled.
 103  */
 104 inline int
 105 mlx5_mprq_enabled(struct rte_eth_dev *dev)
 106 {
 107         struct mlx5_priv *priv = dev->data->dev_private;
 108         uint16_t i;
 109         uint16_t n = 0;
 110
 111         if (mlx5_check_mprq_support(dev) < 0)
 112                 return 0;
 113         /* All the configured queues should be enabled. */
 114         for (i = 0; i < priv->rxqs_n; ++i) {
 115                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
 116
 117                 if (!rxq)
 118                         continue;
 119                 if (mlx5_rxq_mprq_enabled(rxq))
 120                         ++n;
 121         }
 122         /* Multi-Packet RQ can't be partially configured. */
 123         assert(n == 0 || n == priv->rxqs_n);
 124         return n == priv->rxqs_n;
 125 }
 126
 127 /**
 128  * Check whether LRO is supported and enabled for the device.
 129  *
 130  * @param dev
 131  *   Pointer to Ethernet device.
 132  *
 133  * @return
 134  *   0 if disabled, 1 if enabled.
 135  */
 136 inline int
 137 mlx5_lro_on(struct rte_eth_dev *dev)
 138 {
 139         return (MLX5_LRO_SUPPORTED(dev) && MLX5_LRO_ENABLED(dev));
 140 }
 141
 142 /**
 143  * Allocate RX queue elements for Multi-Packet RQ.
 144  *
 145  * @param rxq_ctrl
 146  *   Pointer to RX queue structure.
 147  *
 148  * @return
 149  *   0 on success, a negative errno value otherwise and rte_errno is set.
 150  */
 151 static int
 152 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 153 {
 154         struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 155         unsigned int wqe_n = 1 << rxq->elts_n;
 156         unsigned int i;
 157         int err;
 158
 159         /* Iterate on segments. */
 160         for (i = 0; i <= wqe_n; ++i) {
 161                 struct mlx5_mprq_buf *buf;
 162
 163                 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
 164                         DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
 165                         rte_errno = ENOMEM;
 166                         goto error;
 167                 }
 168                 if (i < wqe_n)
 169                         (*rxq->mprq_bufs)[i] = buf;
 170                 else
 171                         rxq->mprq_repl = buf;
 172         }
 173         DRV_LOG(DEBUG,
 174                 "port %u Rx queue %u allocated and configured %u segments",
 175                 rxq->port_id, rxq->idx, wqe_n);
 176         return 0;
 177 error:
 178         err = rte_errno; /* Save rte_errno before cleanup. */
 179         wqe_n = i;
 180         for (i = 0; (i != wqe_n); ++i) {
 181                 if ((*rxq->mprq_bufs)[i] != NULL)
 182                         rte_mempool_put(rxq->mprq_mp,
 183                                         (*rxq->mprq_bufs)[i]);
 184                 (*rxq->mprq_bufs)[i] = NULL;
 185         }
 186         DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
 187                 rxq->port_id, rxq->idx);
 188         rte_errno = err; /* Restore rte_errno. */
 189         return -rte_errno;
 190 }
 191
 192 /**
 193  * Allocate RX queue elements for Single-Packet RQ.
 194  *
 195  * @param rxq_ctrl
 196  *   Pointer to RX queue structure.
 197  *
 198  * @return
 199  *   0 on success, errno value on failure.
 200  */
 201 static int
 202 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 203 {
 204         const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
 205         unsigned int elts_n = 1 << rxq_ctrl->rxq.elts_n;
 206         unsigned int i;
 207         int err;
 208
 209         /* Iterate on segments. */
 210         for (i = 0; (i != elts_n); ++i) {
 211                 struct rte_mbuf *buf;
 212
 213                 buf = rte_pktmbuf_alloc(rxq_ctrl->rxq.mp);
 214                 if (buf == NULL) {
 215                         DRV_LOG(ERR, "port %u empty mbuf pool",
 216                                 PORT_ID(rxq_ctrl->priv));
 217                         rte_errno = ENOMEM;
 218                         goto error;
 219                 }
 220                 /* Headroom is reserved by rte_pktmbuf_alloc(). */
 221                 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
 222                 /* Buffer is supposed to be empty. */
 223                 assert(rte_pktmbuf_data_len(buf) == 0);
 224                 assert(rte_pktmbuf_pkt_len(buf) == 0);
 225                 assert(!buf->next);
 226                 /* Only the first segment keeps headroom. */
 227                 if (i % sges_n)
 228                         SET_DATA_OFF(buf, 0);
 229                 PORT(buf) = rxq_ctrl->rxq.port_id;
 230                 DATA_LEN(buf) = rte_pktmbuf_tailroom(buf);
 231                 PKT_LEN(buf) = DATA_LEN(buf);
 232                 NB_SEGS(buf) = 1;
 233                 (*rxq_ctrl->rxq.elts)[i] = buf;
 234         }
 235         /* If Rx vector is activated. */
 236         if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
 237                 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 238                 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
 239                 int j;
 240
 241                 /* Initialize default rearm_data for vPMD. */
 242                 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
 243                 rte_mbuf_refcnt_set(mbuf_init, 1);
 244                 mbuf_init->nb_segs = 1;
 245                 mbuf_init->port = rxq->port_id;
 246                 /*
 247                  * prevent compiler reordering:
 248                  * rearm_data covers previous fields.
 249                  */
 250                 rte_compiler_barrier();
 251                 rxq->mbuf_initializer =
 252                         *(uint64_t *)&mbuf_init->rearm_data;
 253                 /* Padding with a fake mbuf for vectorized Rx. */
 254                 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
 255                         (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
 256         }
 257         DRV_LOG(DEBUG,
 258                 "port %u Rx queue %u allocated and configured %u segments"
 259                 " (max %u packets)",
 260                 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx, elts_n,
 261                 elts_n / (1 << rxq_ctrl->rxq.sges_n));
 262         return 0;
 263 error:
 264         err = rte_errno; /* Save rte_errno before cleanup. */
 265         elts_n = i;
 266         for (i = 0; (i != elts_n); ++i) {
 267                 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
 268                         rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
 269                 (*rxq_ctrl->rxq.elts)[i] = NULL;
 270         }
 271         DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
 272                 PORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx);
 273         rte_errno = err; /* Restore rte_errno. */
 274         return -rte_errno;
 275 }
 276
 277 /**
 278  * Allocate RX queue elements.
 279  *
 280  * @param rxq_ctrl
 281  *   Pointer to RX queue structure.
 282  *
 283  * @return
 284  *   0 on success, errno value on failure.
 285  */
 286 int
 287 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
 288 {
 289         return mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
 290                rxq_alloc_elts_mprq(rxq_ctrl) : rxq_alloc_elts_sprq(rxq_ctrl);
 291 }
 292
 293 /**
 294  * Free RX queue elements for Multi-Packet RQ.
 295  *
 296  * @param rxq_ctrl
 297  *   Pointer to RX queue structure.
 298  */
 299 static void
 300 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 301 {
 302         struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 303         uint16_t i;
 304
 305         DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing WRs",
 306                 rxq->port_id, rxq->idx);
 307         if (rxq->mprq_bufs == NULL)
 308                 return;
 309         assert(mlx5_rxq_check_vec_support(rxq) < 0);
 310         for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
 311                 if ((*rxq->mprq_bufs)[i] != NULL)
 312                         mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
 313                 (*rxq->mprq_bufs)[i] = NULL;
 314         }
 315         if (rxq->mprq_repl != NULL) {
 316                 mlx5_mprq_buf_free(rxq->mprq_repl);
 317                 rxq->mprq_repl = NULL;
 318         }
 319 }
 320
 321 /**
 322  * Free RX queue elements for Single-Packet RQ.
 323  *
 324  * @param rxq_ctrl
 325  *   Pointer to RX queue structure.
 326  */
 327 static void
 328 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 329 {
 330         struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 331         const uint16_t q_n = (1 << rxq->elts_n);
 332         const uint16_t q_mask = q_n - 1;
 333         uint16_t used = q_n - (rxq->rq_ci - rxq->rq_pi);
 334         uint16_t i;
 335
 336         DRV_LOG(DEBUG, "port %u Rx queue %u freeing WRs",
 337                 PORT_ID(rxq_ctrl->priv), rxq->idx);
 338         if (rxq->elts == NULL)
 339                 return;
 340         /**
 341          * Some mbuf in the Ring belongs to the application.  They cannot be
 342          * freed.
 343          */
 344         if (mlx5_rxq_check_vec_support(rxq) > 0) {
 345                 for (i = 0; i < used; ++i)
 346                         (*rxq->elts)[(rxq->rq_ci + i) & q_mask] = NULL;
 347                 rxq->rq_pi = rxq->rq_ci;
 348         }
 349         for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
 350                 if ((*rxq->elts)[i] != NULL)
 351                         rte_pktmbuf_free_seg((*rxq->elts)[i]);
 352                 (*rxq->elts)[i] = NULL;
 353         }
 354 }
 355
 356 /**
 357  * Free RX queue elements.
 358  *
 359  * @param rxq_ctrl
 360  *   Pointer to RX queue structure.
 361  */
 362 static void
 363 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
 364 {
 365         if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
 366                 rxq_free_elts_mprq(rxq_ctrl);
 367         else
 368                 rxq_free_elts_sprq(rxq_ctrl);
 369 }
 370
 371 /**
 372  * Returns the per-queue supported offloads.
 373  *
 374  * @param dev
 375  *   Pointer to Ethernet device.
 376  *
 377  * @return
 378  *   Supported Rx offloads.
 379  */
 380 uint64_t
 381 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
 382 {
 383         struct mlx5_priv *priv = dev->data->dev_private;
 384         struct mlx5_dev_config *config = &priv->config;
 385         uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
 386                              DEV_RX_OFFLOAD_TIMESTAMP |
 387                              DEV_RX_OFFLOAD_JUMBO_FRAME);
 388
 389         if (config->hw_fcs_strip)
 390                 offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
 391
 392         if (config->hw_csum)
 393                 offloads |= (DEV_RX_OFFLOAD_IPV4_CKSUM |
 394                              DEV_RX_OFFLOAD_UDP_CKSUM |
 395                              DEV_RX_OFFLOAD_TCP_CKSUM);
 396         if (config->hw_vlan_strip)
 397                 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
 398         return offloads;
 399 }
 400
 401
 402 /**
 403  * Returns the per-port supported offloads.
 404  *
 405  * @param dev
 406  *   Pointer to Ethernet device.
 407  *
 408  * @return
 409  *   Supported Rx offloads.
 410  */
 411 uint64_t
 412 mlx5_get_rx_port_offloads(struct rte_eth_dev *dev)
 413 {
 414         uint64_t offloads = DEV_RX_OFFLOAD_VLAN_FILTER;
 415
 416         if (MLX5_LRO_SUPPORTED(dev))
 417                 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
 418         return offloads;
 419 }
 420
 421 /**
 422  * Verify if the queue can be released.
 423  *
 424  * @param dev
 425  *   Pointer to Ethernet device.
 426  * @param idx
 427  *   RX queue index.
 428  *
 429  * @return
 430  *   1 if the queue can be released
 431  *   0 if the queue can not be released, there are references to it.
 432  *   Negative errno and rte_errno is set if queue doesn't exist.
 433  */
 434 static int
 435 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
 436 {
 437         struct mlx5_priv *priv = dev->data->dev_private;
 438         struct mlx5_rxq_ctrl *rxq_ctrl;
 439
 440         if (!(*priv->rxqs)[idx]) {
 441                 rte_errno = EINVAL;
 442                 return -rte_errno;
 443         }
 444         rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
 445         return (rte_atomic32_read(&rxq_ctrl->refcnt) == 1);
 446 }
 447
 448 /**
 449  *
 450  * @param dev
 451  *   Pointer to Ethernet device structure.
 452  * @param idx
 453  *   RX queue index.
 454  * @param desc
 455  *   Number of descriptors to configure in queue.
 456  * @param socket
 457  *   NUMA socket on which memory must be allocated.
 458  * @param[in] conf
 459  *   Thresholds parameters.
 460  * @param mp
 461  *   Memory pool for buffer allocations.
 462  *
 463  * @return
 464  *   0 on success, a negative errno value otherwise and rte_errno is set.
 465  */
 466 int
 467 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
 468                     unsigned int socket, const struct rte_eth_rxconf *conf,
 469                     struct rte_mempool *mp)
 470 {
 471         struct mlx5_priv *priv = dev->data->dev_private;
 472         struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
 473         struct mlx5_rxq_ctrl *rxq_ctrl =
 474                 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
 475
 476         if (!rte_is_power_of_2(desc)) {
 477                 desc = 1 << log2above(desc);
 478                 DRV_LOG(WARNING,
 479                         "port %u increased number of descriptors in Rx queue %u"
 480                         " to the next power of two (%d)",
 481                         dev->data->port_id, idx, desc);
 482         }
 483         DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
 484                 dev->data->port_id, idx, desc);
 485         if (idx >= priv->rxqs_n) {
 486                 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
 487                         dev->data->port_id, idx, priv->rxqs_n);
 488                 rte_errno = EOVERFLOW;
 489                 return -rte_errno;
 490         }
 491         if (!mlx5_rxq_releasable(dev, idx)) {
 492                 DRV_LOG(ERR, "port %u unable to release queue index %u",
 493                         dev->data->port_id, idx);
 494                 rte_errno = EBUSY;
 495                 return -rte_errno;
 496         }
 497         mlx5_rxq_release(dev, idx);
 498         rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, mp);
 499         if (!rxq_ctrl) {
 500                 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
 501                         dev->data->port_id, idx);
 502                 rte_errno = ENOMEM;
 503                 return -rte_errno;
 504         }
 505         DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
 506                 dev->data->port_id, idx);
 507         (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
 508         return 0;
 509 }
 510
 511 /**
 512  * DPDK callback to release a RX queue.
 513  *
 514  * @param dpdk_rxq
 515  *   Generic RX queue pointer.
 516  */
 517 void
 518 mlx5_rx_queue_release(void *dpdk_rxq)
 519 {
 520         struct mlx5_rxq_data *rxq = (struct mlx5_rxq_data *)dpdk_rxq;
 521         struct mlx5_rxq_ctrl *rxq_ctrl;
 522         struct mlx5_priv *priv;
 523
 524         if (rxq == NULL)
 525                 return;
 526         rxq_ctrl = container_of(rxq, struct mlx5_rxq_ctrl, rxq);
 527         priv = rxq_ctrl->priv;
 528         if (!mlx5_rxq_releasable(ETH_DEV(priv), rxq_ctrl->rxq.idx))
 529                 rte_panic("port %u Rx queue %u is still used by a flow and"
 530                           " cannot be removed\n",
 531                           PORT_ID(priv), rxq->idx);
 532         mlx5_rxq_release(ETH_DEV(priv), rxq_ctrl->rxq.idx);
 533 }
 534
 535 /**
 536  * Get an Rx queue Verbs/DevX object.
 537  *
 538  * @param dev
 539  *   Pointer to Ethernet device.
 540  * @param idx
 541  *   Queue index in DPDK Rx queue array
 542  *
 543  * @return
 544  *   The Verbs/DevX object if it exists.
 545  */
 546 static struct mlx5_rxq_obj *
 547 mlx5_rxq_obj_get(struct rte_eth_dev *dev, uint16_t idx)
 548 {
 549         struct mlx5_priv *priv = dev->data->dev_private;
 550         struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
 551         struct mlx5_rxq_ctrl *rxq_ctrl;
 552
 553         if (idx >= priv->rxqs_n)
 554                 return NULL;
 555         if (!rxq_data)
 556                 return NULL;
 557         rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 558         if (rxq_ctrl->obj)
 559                 rte_atomic32_inc(&rxq_ctrl->obj->refcnt);
 560         return rxq_ctrl->obj;
 561 }
 562
 563 /**
 564  * Release an Rx verbs/DevX queue object.
 565  *
 566  * @param rxq_obj
 567  *   Verbs/DevX Rx queue object.
 568  *
 569  * @return
 570  *   1 while a reference on it exists, 0 when freed.
 571  */
 572 static int
 573 mlx5_rxq_obj_release(struct mlx5_rxq_obj *rxq_obj)
 574 {
 575         assert(rxq_obj);
 576         assert(rxq_obj->wq);
 577         assert(rxq_obj->cq);
 578         if (rte_atomic32_dec_and_test(&rxq_obj->refcnt)) {
 579                 rxq_free_elts(rxq_obj->rxq_ctrl);
 580                 claim_zero(mlx5_glue->destroy_wq(rxq_obj->wq));
 581                 claim_zero(mlx5_glue->destroy_cq(rxq_obj->cq));
 582                 if (rxq_obj->channel)
 583                         claim_zero(mlx5_glue->destroy_comp_channel
 584                                    (rxq_obj->channel));
 585                 LIST_REMOVE(rxq_obj, next);
 586                 rte_free(rxq_obj);
 587                 return 0;
 588         }
 589         return 1;
 590 }
 591
 592 /**
 593  * Allocate queue vector and fill epoll fd list for Rx interrupts.
 594  *
 595  * @param dev
 596  *   Pointer to Ethernet device.
 597  *
 598  * @return
 599  *   0 on success, a negative errno value otherwise and rte_errno is set.
 600  */
 601 int
 602 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
 603 {
 604         struct mlx5_priv *priv = dev->data->dev_private;
 605         unsigned int i;
 606         unsigned int rxqs_n = priv->rxqs_n;
 607         unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
 608         unsigned int count = 0;
 609         struct rte_intr_handle *intr_handle = dev->intr_handle;
 610
 611         if (!dev->data->dev_conf.intr_conf.rxq)
 612                 return 0;
 613         mlx5_rx_intr_vec_disable(dev);
 614         intr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));
 615         if (intr_handle->intr_vec == NULL) {
 616                 DRV_LOG(ERR,
 617                         "port %u failed to allocate memory for interrupt"
 618                         " vector, Rx interrupts will not be supported",
 619                         dev->data->port_id);
 620                 rte_errno = ENOMEM;
 621                 return -rte_errno;
 622         }
 623         intr_handle->type = RTE_INTR_HANDLE_EXT;
 624         for (i = 0; i != n; ++i) {
 625                 /* This rxq obj must not be released in this function. */
 626                 struct mlx5_rxq_obj *rxq_obj = mlx5_rxq_obj_get(dev, i);
 627                 int fd;
 628                 int flags;
 629                 int rc;
 630
 631                 /* Skip queues that cannot request interrupts. */
 632                 if (!rxq_obj || !rxq_obj->channel) {
 633                         /* Use invalid intr_vec[] index to disable entry. */
 634                         intr_handle->intr_vec[i] =
 635                                 RTE_INTR_VEC_RXTX_OFFSET +
 636                                 RTE_MAX_RXTX_INTR_VEC_ID;
 637                         continue;
 638                 }
 639                 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
 640                         DRV_LOG(ERR,
 641                                 "port %u too many Rx queues for interrupt"
 642                                 " vector size (%d), Rx interrupts cannot be"
 643                                 " enabled",
 644                                 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
 645                         mlx5_rx_intr_vec_disable(dev);
 646                         rte_errno = ENOMEM;
 647                         return -rte_errno;
 648                 }
 649                 fd = rxq_obj->channel->fd;
 650                 flags = fcntl(fd, F_GETFL);
 651                 rc = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 652                 if (rc < 0) {
 653                         rte_errno = errno;
 654                         DRV_LOG(ERR,
 655                                 "port %u failed to make Rx interrupt file"
 656                                 " descriptor %d non-blocking for queue index"
 657                                 " %d",
 658                                 dev->data->port_id, fd, i);
 659                         mlx5_rx_intr_vec_disable(dev);
 660                         return -rte_errno;
 661                 }
 662                 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
 663                 intr_handle->efds[count] = fd;
 664                 count++;
 665         }
 666         if (!count)
 667                 mlx5_rx_intr_vec_disable(dev);
 668         else
 669                 intr_handle->nb_efd = count;
 670         return 0;
 671 }
 672
 673 /**
 674  * Clean up Rx interrupts handler.
 675  *
 676  * @param dev
 677  *   Pointer to Ethernet device.
 678  */
 679 void
 680 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
 681 {
 682         struct mlx5_priv *priv = dev->data->dev_private;
 683         struct rte_intr_handle *intr_handle = dev->intr_handle;
 684         unsigned int i;
 685         unsigned int rxqs_n = priv->rxqs_n;
 686         unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
 687
 688         if (!dev->data->dev_conf.intr_conf.rxq)
 689                 return;
 690         if (!intr_handle->intr_vec)
 691                 goto free;
 692         for (i = 0; i != n; ++i) {
 693                 struct mlx5_rxq_ctrl *rxq_ctrl;
 694                 struct mlx5_rxq_data *rxq_data;
 695
 696                 if (intr_handle->intr_vec[i] == RTE_INTR_VEC_RXTX_OFFSET +
 697                     RTE_MAX_RXTX_INTR_VEC_ID)
 698                         continue;
 699                 /**
 700                  * Need to access directly the queue to release the reference
 701                  * kept in mlx5_rx_intr_vec_enable().
 702                  */
 703                 rxq_data = (*priv->rxqs)[i];
 704                 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 705                 if (rxq_ctrl->obj)
 706                         mlx5_rxq_obj_release(rxq_ctrl->obj);
 707         }
 708 free:
 709         rte_intr_free_epoll_fd(intr_handle);
 710         if (intr_handle->intr_vec)
 711                 free(intr_handle->intr_vec);
 712         intr_handle->nb_efd = 0;
 713         intr_handle->intr_vec = NULL;
 714 }
 715
 716 /**
 717  *  MLX5 CQ notification .
 718  *
 719  *  @param rxq
 720  *     Pointer to receive queue structure.
 721  *  @param sq_n_rxq
 722  *     Sequence number per receive queue .
 723  */
 724 static inline void
 725 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
 726 {
 727         int sq_n = 0;
 728         uint32_t doorbell_hi;
 729         uint64_t doorbell;
 730         void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
 731
 732         sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
 733         doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
 734         doorbell = (uint64_t)doorbell_hi << 32;
 735         doorbell |=  rxq->cqn;
 736         rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
 737         mlx5_uar_write64(rte_cpu_to_be_64(doorbell),
 738                          cq_db_reg, rxq->uar_lock_cq);
 739 }
 740
 741 /**
 742  * DPDK callback for Rx queue interrupt enable.
 743  *
 744  * @param dev
 745  *   Pointer to Ethernet device structure.
 746  * @param rx_queue_id
 747  *   Rx queue number.
 748  *
 749  * @return
 750  *   0 on success, a negative errno value otherwise and rte_errno is set.
 751  */
 752 int
 753 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 754 {
 755         struct mlx5_priv *priv = dev->data->dev_private;
 756         struct mlx5_rxq_data *rxq_data;
 757         struct mlx5_rxq_ctrl *rxq_ctrl;
 758
 759         rxq_data = (*priv->rxqs)[rx_queue_id];
 760         if (!rxq_data) {
 761                 rte_errno = EINVAL;
 762                 return -rte_errno;
 763         }
 764         rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 765         if (rxq_ctrl->irq) {
 766                 struct mlx5_rxq_obj *rxq_obj;
 767
 768                 rxq_obj = mlx5_rxq_obj_get(dev, rx_queue_id);
 769                 if (!rxq_obj) {
 770                         rte_errno = EINVAL;
 771                         return -rte_errno;
 772                 }
 773                 mlx5_arm_cq(rxq_data, rxq_data->cq_arm_sn);
 774                 mlx5_rxq_obj_release(rxq_obj);
 775         }
 776         return 0;
 777 }
 778
 779 /**
 780  * DPDK callback for Rx queue interrupt disable.
 781  *
 782  * @param dev
 783  *   Pointer to Ethernet device structure.
 784  * @param rx_queue_id
 785  *   Rx queue number.
 786  *
 787  * @return
 788  *   0 on success, a negative errno value otherwise and rte_errno is set.
 789  */
 790 int
 791 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 792 {
 793         struct mlx5_priv *priv = dev->data->dev_private;
 794         struct mlx5_rxq_data *rxq_data;
 795         struct mlx5_rxq_ctrl *rxq_ctrl;
 796         struct mlx5_rxq_obj *rxq_obj = NULL;
 797         struct ibv_cq *ev_cq;
 798         void *ev_ctx;
 799         int ret;
 800
 801         rxq_data = (*priv->rxqs)[rx_queue_id];
 802         if (!rxq_data) {
 803                 rte_errno = EINVAL;
 804                 return -rte_errno;
 805         }
 806         rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 807         if (!rxq_ctrl->irq)
 808                 return 0;
 809         rxq_obj = mlx5_rxq_obj_get(dev, rx_queue_id);
 810         if (!rxq_obj) {
 811                 rte_errno = EINVAL;
 812                 return -rte_errno;
 813         }
 814         ret = mlx5_glue->get_cq_event(rxq_obj->channel, &ev_cq, &ev_ctx);
 815         if (ret || ev_cq != rxq_obj->cq) {
 816                 rte_errno = EINVAL;
 817                 goto exit;
 818         }
 819         rxq_data->cq_arm_sn++;
 820         mlx5_glue->ack_cq_events(rxq_obj->cq, 1);
 821         mlx5_rxq_obj_release(rxq_obj);
 822         return 0;
 823 exit:
 824         ret = rte_errno; /* Save rte_errno before cleanup. */
 825         if (rxq_obj)
 826                 mlx5_rxq_obj_release(rxq_obj);
 827         DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
 828                 dev->data->port_id, rx_queue_id);
 829         rte_errno = ret; /* Restore rte_errno. */
 830         return -rte_errno;
 831 }
 832
 833 /**
 834  * Create a CQ Verbs object.
 835  *
 836  * @param dev
 837  *   Pointer to Ethernet device.
 838  * @param priv
 839  *   Pointer to device private data.
 840  * @param rxq_data
 841  *   Pointer to Rx queue data.
 842  * @param cqe_n
 843  *   Number of CQEs in CQ.
 844  * @param rxq_obj
 845  *   Pointer to Rx queue object data.
 846  *
 847  * @return
 848  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
 849  */
 850 static struct ibv_cq *
 851 mlx5_ibv_cq_new(struct rte_eth_dev *dev, struct mlx5_priv *priv,
 852                 struct mlx5_rxq_data *rxq_data,
 853                 unsigned int cqe_n, struct mlx5_rxq_obj *rxq_obj)
 854 {
 855         struct {
 856                 struct ibv_cq_init_attr_ex ibv;
 857                 struct mlx5dv_cq_init_attr mlx5;
 858         } cq_attr;
 859
 860         cq_attr.ibv = (struct ibv_cq_init_attr_ex){
 861                 .cqe = cqe_n,
 862                 .channel = rxq_obj->channel,
 863                 .comp_mask = 0,
 864         };
 865         cq_attr.mlx5 = (struct mlx5dv_cq_init_attr){
 866                 .comp_mask = 0,
 867         };
 868         if (priv->config.cqe_comp && !rxq_data->hw_timestamp) {
 869                 cq_attr.mlx5.comp_mask |=
 870                                 MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
 871 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 872                 cq_attr.mlx5.cqe_comp_res_format =
 873                                 mlx5_rxq_mprq_enabled(rxq_data) ?
 874                                 MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX :
 875                                 MLX5DV_CQE_RES_FORMAT_HASH;
 876 #else
 877                 cq_attr.mlx5.cqe_comp_res_format = MLX5DV_CQE_RES_FORMAT_HASH;
 878 #endif
 879                 /*
 880                  * For vectorized Rx, it must not be doubled in order to
 881                  * make cq_ci and rq_ci aligned.
 882                  */
 883                 if (mlx5_rxq_check_vec_support(rxq_data) < 0)
 884                         cq_attr.ibv.cqe *= 2;
 885         } else if (priv->config.cqe_comp && rxq_data->hw_timestamp) {
 886                 DRV_LOG(DEBUG,
 887                         "port %u Rx CQE compression is disabled for HW"
 888                         " timestamp",
 889                         dev->data->port_id);
 890         }
 891 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 892         if (priv->config.cqe_pad) {
 893                 cq_attr.mlx5.comp_mask |= MLX5DV_CQ_INIT_ATTR_MASK_FLAGS;
 894                 cq_attr.mlx5.flags |= MLX5DV_CQ_INIT_ATTR_FLAGS_CQE_PAD;
 895         }
 896 #endif
 897         return mlx5_glue->cq_ex_to_cq(mlx5_glue->dv_create_cq(priv->sh->ctx,
 898                                                               &cq_attr.ibv,
 899                                                               &cq_attr.mlx5));
 900 }
 901
 902 /**
 903  * Create a WQ Verbs object.
 904  *
 905  * @param dev
 906  *   Pointer to Ethernet device.
 907  * @param priv
 908  *   Pointer to device private data.
 909  * @param rxq_data
 910  *   Pointer to Rx queue data.
 911  * @param idx
 912  *   Queue index in DPDK Rx queue array
 913  * @param wqe_n
 914  *   Number of WQEs in WQ.
 915  * @param rxq_obj
 916  *   Pointer to Rx queue object data.
 917  *
 918  * @return
 919  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
 920  */
 921 static struct ibv_wq *
 922 mlx5_ibv_wq_new(struct rte_eth_dev *dev, struct mlx5_priv *priv,
 923                 struct mlx5_rxq_data *rxq_data, uint16_t idx,
 924                 unsigned int wqe_n, struct mlx5_rxq_obj *rxq_obj)
 925 {
 926         struct {
 927                 struct ibv_wq_init_attr ibv;
 928 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 929                 struct mlx5dv_wq_init_attr mlx5;
 930 #endif
 931         } wq_attr;
 932
 933         wq_attr.ibv = (struct ibv_wq_init_attr){
 934                 .wq_context = NULL, /* Could be useful in the future. */
 935                 .wq_type = IBV_WQT_RQ,
 936                 /* Max number of outstanding WRs. */
 937                 .max_wr = wqe_n >> rxq_data->sges_n,
 938                 /* Max number of scatter/gather elements in a WR. */
 939                 .max_sge = 1 << rxq_data->sges_n,
 940                 .pd = priv->sh->pd,
 941                 .cq = rxq_obj->cq,
 942                 .comp_mask = IBV_WQ_FLAGS_CVLAN_STRIPPING | 0,
 943                 .create_flags = (rxq_data->vlan_strip ?
 944                                  IBV_WQ_FLAGS_CVLAN_STRIPPING : 0),
 945         };
 946         /* By default, FCS (CRC) is stripped by hardware. */
 947         if (rxq_data->crc_present) {
 948                 wq_attr.ibv.create_flags |= IBV_WQ_FLAGS_SCATTER_FCS;
 949                 wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
 950         }
 951         if (priv->config.hw_padding) {
 952 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
 953                 wq_attr.ibv.create_flags |= IBV_WQ_FLAG_RX_END_PADDING;
 954                 wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
 955 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
 956                 wq_attr.ibv.create_flags |= IBV_WQ_FLAGS_PCI_WRITE_END_PADDING;
 957                 wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
 958 #endif
 959         }
 960 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 961         wq_attr.mlx5 = (struct mlx5dv_wq_init_attr){
 962                 .comp_mask = 0,
 963         };
 964         if (mlx5_rxq_mprq_enabled(rxq_data)) {
 965                 struct mlx5dv_striding_rq_init_attr *mprq_attr =
 966                                                 &wq_attr.mlx5.striding_rq_attrs;
 967
 968                 wq_attr.mlx5.comp_mask |= MLX5DV_WQ_INIT_ATTR_MASK_STRIDING_RQ;
 969                 *mprq_attr = (struct mlx5dv_striding_rq_init_attr){
 970                         .single_stride_log_num_of_bytes = rxq_data->strd_sz_n,
 971                         .single_wqe_log_num_of_strides = rxq_data->strd_num_n,
 972                         .two_byte_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT,
 973                 };
 974         }
 975         rxq_obj->wq = mlx5_glue->dv_create_wq(priv->sh->ctx, &wq_attr.ibv,
 976                                               &wq_attr.mlx5);
 977 #else
 978         rxq_obj->wq = mlx5_glue->create_wq(priv->sh->ctx, &wq_attr.ibv);
 979 #endif
 980         if (rxq_obj->wq) {
 981                 /*
 982                  * Make sure number of WRs*SGEs match expectations since a queue
 983                  * cannot allocate more than "desc" buffers.
 984                  */
 985                 if (wq_attr.ibv.max_wr != (wqe_n >> rxq_data->sges_n) ||
 986                     wq_attr.ibv.max_sge != (1u << rxq_data->sges_n)) {
 987                         DRV_LOG(ERR,
 988                                 "port %u Rx queue %u requested %u*%u but got"
 989                                 " %u*%u WRs*SGEs",
 990                                 dev->data->port_id, idx,
 991                                 wqe_n >> rxq_data->sges_n,
 992                                 (1 << rxq_data->sges_n),
 993                                 wq_attr.ibv.max_wr, wq_attr.ibv.max_sge);
 994                         claim_zero(mlx5_glue->destroy_wq(rxq_obj->wq));
 995                         rxq_obj->wq = NULL;
 996                         rte_errno = EINVAL;
 997                 }
 998         }
 999         return rxq_obj->wq;
1000 }
1001
1002 /**
1003  * Create the Rx queue Verbs/DevX object.
1004  *
1005  * @param dev
1006  *   Pointer to Ethernet device.
1007  * @param idx
1008  *   Queue index in DPDK Rx queue array
1009  *
1010  * @return
1011  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
1012  */
1013 struct mlx5_rxq_obj *
1014 mlx5_rxq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
1015 {
1016         struct mlx5_priv *priv = dev->data->dev_private;
1017         struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
1018         struct mlx5_rxq_ctrl *rxq_ctrl =
1019                 container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
1020         struct ibv_wq_attr mod;
1021         unsigned int cqe_n;
1022         unsigned int wqe_n = 1 << rxq_data->elts_n;
1023         struct mlx5_rxq_obj *tmpl = NULL;
1024         struct mlx5dv_cq cq_info;
1025         struct mlx5dv_rwq rwq;
1026         int ret = 0;
1027         struct mlx5dv_obj obj;
1028
1029         assert(rxq_data);
1030         assert(!rxq_ctrl->obj);
1031         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_RX_QUEUE;
1032         priv->verbs_alloc_ctx.obj = rxq_ctrl;
1033         tmpl = rte_calloc_socket(__func__, 1, sizeof(*tmpl), 0,
1034                                  rxq_ctrl->socket);
1035         if (!tmpl) {
1036                 DRV_LOG(ERR,
1037                         "port %u Rx queue %u cannot allocate verbs resources",
1038                         dev->data->port_id, rxq_data->idx);
1039                 rte_errno = ENOMEM;
1040                 goto error;
1041         }
1042         tmpl->rxq_ctrl = rxq_ctrl;
1043         if (rxq_ctrl->irq) {
1044                 tmpl->channel = mlx5_glue->create_comp_channel(priv->sh->ctx);
1045                 if (!tmpl->channel) {
1046                         DRV_LOG(ERR, "port %u: comp channel creation failure",
1047                                 dev->data->port_id);
1048                         rte_errno = ENOMEM;
1049                         goto error;
1050                 }
1051         }
1052         if (mlx5_rxq_mprq_enabled(rxq_data))
1053                 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
1054         else
1055                 cqe_n = wqe_n  - 1;
1056         tmpl->cq = mlx5_ibv_cq_new(dev, priv, rxq_data, cqe_n, tmpl);
1057         if (!tmpl->cq) {
1058                 DRV_LOG(ERR, "port %u Rx queue %u CQ creation failure",
1059                         dev->data->port_id, idx);
1060                 rte_errno = ENOMEM;
1061                 goto error;
1062         }
1063         DRV_LOG(DEBUG, "port %u device_attr.max_qp_wr is %d",
1064                 dev->data->port_id, priv->sh->device_attr.orig_attr.max_qp_wr);
1065         DRV_LOG(DEBUG, "port %u device_attr.max_sge is %d",
1066                 dev->data->port_id, priv->sh->device_attr.orig_attr.max_sge);
1067         tmpl->wq = mlx5_ibv_wq_new(dev, priv, rxq_data, idx, wqe_n, tmpl);
1068         if (!tmpl->wq) {
1069                 DRV_LOG(ERR, "port %u Rx queue %u WQ creation failure",
1070                         dev->data->port_id, idx);
1071                 rte_errno = ENOMEM;
1072                 goto error;
1073         }
1074         /* Change queue state to ready. */
1075         mod = (struct ibv_wq_attr){
1076                 .attr_mask = IBV_WQ_ATTR_STATE,
1077                 .wq_state = IBV_WQS_RDY,
1078         };
1079         ret = mlx5_glue->modify_wq(tmpl->wq, &mod);
1080         if (ret) {
1081                 DRV_LOG(ERR,
1082                         "port %u Rx queue %u WQ state to IBV_WQS_RDY failed",
1083                         dev->data->port_id, idx);
1084                 rte_errno = ret;
1085                 goto error;
1086         }
1087         obj.cq.in = tmpl->cq;
1088         obj.cq.out = &cq_info;
1089         obj.rwq.in = tmpl->wq;
1090         obj.rwq.out = &rwq;
1091         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_CQ | MLX5DV_OBJ_RWQ);
1092         if (ret) {
1093                 rte_errno = ret;
1094                 goto error;
1095         }
1096         if (cq_info.cqe_size != RTE_CACHE_LINE_SIZE) {
1097                 DRV_LOG(ERR,
1098                         "port %u wrong MLX5_CQE_SIZE environment variable"
1099                         " value: it should be set to %u",
1100                         dev->data->port_id, RTE_CACHE_LINE_SIZE);
1101                 rte_errno = EINVAL;
1102                 goto error;
1103         }
1104         /* Fill the rings. */
1105         rxq_data->wqes = rwq.buf;
1106         rxq_data->rq_db = rwq.dbrec;
1107         rxq_data->cqe_n = log2above(cq_info.cqe_cnt);
1108         rxq_data->cq_db = cq_info.dbrec;
1109         rxq_data->cqes = (volatile struct mlx5_cqe (*)[])(uintptr_t)cq_info.buf;
1110         rxq_data->cq_uar = cq_info.cq_uar;
1111         rxq_data->cqn = cq_info.cqn;
1112         rxq_data->cq_arm_sn = 0;
1113         mlx5_rxq_initialize(rxq_data);
1114         rxq_data->cq_ci = 0;
1115         DRV_LOG(DEBUG, "port %u rxq %u updated with %p", dev->data->port_id,
1116                 idx, (void *)&tmpl);
1117         rte_atomic32_inc(&tmpl->refcnt);
1118         LIST_INSERT_HEAD(&priv->rxqsobj, tmpl, next);
1119         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
1120         return tmpl;
1121 error:
1122         if (tmpl) {
1123                 ret = rte_errno; /* Save rte_errno before cleanup. */
1124                 if (tmpl->wq)
1125                         claim_zero(mlx5_glue->destroy_wq(tmpl->wq));
1126                 if (tmpl->cq)
1127                         claim_zero(mlx5_glue->destroy_cq(tmpl->cq));
1128                 if (tmpl->channel)
1129                         claim_zero(mlx5_glue->destroy_comp_channel
1130                                                         (tmpl->channel));
1131                 rte_free(tmpl);
1132                 rte_errno = ret; /* Restore rte_errno. */
1133         }
1134         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
1135         return NULL;
1136 }
1137
1138 /**
1139  * Verify the Rx queue objects list is empty
1140  *
1141  * @param dev
1142  *   Pointer to Ethernet device.
1143  *
1144  * @return
1145  *   The number of objects not released.
1146  */
1147 int
1148 mlx5_rxq_obj_verify(struct rte_eth_dev *dev)
1149 {
1150         struct mlx5_priv *priv = dev->data->dev_private;
1151         int ret = 0;
1152         struct mlx5_rxq_obj *rxq_obj;
1153
1154         LIST_FOREACH(rxq_obj, &priv->rxqsobj, next) {
1155                 DRV_LOG(DEBUG, "port %u Rx queue %u still referenced",
1156                         dev->data->port_id, rxq_obj->rxq_ctrl->rxq.idx);
1157                 ++ret;
1158         }
1159         return ret;
1160 }
1161
1162 /**
1163  * Callback function to initialize mbufs for Multi-Packet RQ.
1164  */
1165 static inline void
1166 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg __rte_unused,
1167                     void *_m, unsigned int i __rte_unused)
1168 {
1169         struct mlx5_mprq_buf *buf = _m;
1170
1171         memset(_m, 0, sizeof(*buf));
1172         buf->mp = mp;
1173         rte_atomic16_set(&buf->refcnt, 1);
1174 }
1175
1176 /**
1177  * Free mempool of Multi-Packet RQ.
1178  *
1179  * @param dev
1180  *   Pointer to Ethernet device.
1181  *
1182  * @return
1183  *   0 on success, negative errno value on failure.
1184  */
1185 int
1186 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1187 {
1188         struct mlx5_priv *priv = dev->data->dev_private;
1189         struct rte_mempool *mp = priv->mprq_mp;
1190         unsigned int i;
1191
1192         if (mp == NULL)
1193                 return 0;
1194         DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1195                 dev->data->port_id, mp->name);
1196         /*
1197          * If a buffer in the pool has been externally attached to a mbuf and it
1198          * is still in use by application, destroying the Rx queue can spoil
1199          * the packet. It is unlikely to happen but if application dynamically
1200          * creates and destroys with holding Rx packets, this can happen.
1201          *
1202          * TODO: It is unavoidable for now because the mempool for Multi-Packet
1203          * RQ isn't provided by application but managed by PMD.
1204          */
1205         if (!rte_mempool_full(mp)) {
1206                 DRV_LOG(ERR,
1207                         "port %u mempool for Multi-Packet RQ is still in use",
1208                         dev->data->port_id);
1209                 rte_errno = EBUSY;
1210                 return -rte_errno;
1211         }
1212         rte_mempool_free(mp);
1213         /* Unset mempool for each Rx queue. */
1214         for (i = 0; i != priv->rxqs_n; ++i) {
1215                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1216
1217                 if (rxq == NULL)
1218                         continue;
1219                 rxq->mprq_mp = NULL;
1220         }
1221         priv->mprq_mp = NULL;
1222         return 0;
1223 }
1224
1225 /**
1226  * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1227  * mempool. If already allocated, reuse it if there're enough elements.
1228  * Otherwise, resize it.
1229  *
1230  * @param dev
1231  *   Pointer to Ethernet device.
1232  *
1233  * @return
1234  *   0 on success, negative errno value on failure.
1235  */
1236 int
1237 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1238 {
1239         struct mlx5_priv *priv = dev->data->dev_private;
1240         struct rte_mempool *mp = priv->mprq_mp;
1241         char name[RTE_MEMPOOL_NAMESIZE];
1242         unsigned int desc = 0;
1243         unsigned int buf_len;
1244         unsigned int obj_num;
1245         unsigned int obj_size;
1246         unsigned int strd_num_n = 0;
1247         unsigned int strd_sz_n = 0;
1248         unsigned int i;
1249
1250         if (!mlx5_mprq_enabled(dev))
1251                 return 0;
1252         /* Count the total number of descriptors configured. */
1253         for (i = 0; i != priv->rxqs_n; ++i) {
1254                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1255
1256                 if (rxq == NULL)
1257                         continue;
1258                 desc += 1 << rxq->elts_n;
1259                 /* Get the max number of strides. */
1260                 if (strd_num_n < rxq->strd_num_n)
1261                         strd_num_n = rxq->strd_num_n;
1262                 /* Get the max size of a stride. */
1263                 if (strd_sz_n < rxq->strd_sz_n)
1264                         strd_sz_n = rxq->strd_sz_n;
1265         }
1266         assert(strd_num_n && strd_sz_n);
1267         buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1268         obj_size = buf_len + sizeof(struct mlx5_mprq_buf);
1269         /*
1270          * Received packets can be either memcpy'd or externally referenced. In
1271          * case that the packet is attached to an mbuf as an external buffer, as
1272          * it isn't possible to predict how the buffers will be queued by
1273          * application, there's no option to exactly pre-allocate needed buffers
1274          * in advance but to speculatively prepares enough buffers.
1275          *
1276          * In the data path, if this Mempool is depleted, PMD will try to memcpy
1277          * received packets to buffers provided by application (rxq->mp) until
1278          * this Mempool gets available again.
1279          */
1280         desc *= 4;
1281         obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * priv->rxqs_n;
1282         /*
1283          * rte_mempool_create_empty() has sanity check to refuse large cache
1284          * size compared to the number of elements.
1285          * CACHE_FLUSHTHRESH_MULTIPLIER is defined in a C file, so using a
1286          * constant number 2 instead.
1287          */
1288         obj_num = RTE_MAX(obj_num, MLX5_MPRQ_MP_CACHE_SZ * 2);
1289         /* Check a mempool is already allocated and if it can be resued. */
1290         if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1291                 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1292                         dev->data->port_id, mp->name);
1293                 /* Reuse. */
1294                 goto exit;
1295         } else if (mp != NULL) {
1296                 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1297                         dev->data->port_id, mp->name);
1298                 /*
1299                  * If failed to free, which means it may be still in use, no way
1300                  * but to keep using the existing one. On buffer underrun,
1301                  * packets will be memcpy'd instead of external buffer
1302                  * attachment.
1303                  */
1304                 if (mlx5_mprq_free_mp(dev)) {
1305                         if (mp->elt_size >= obj_size)
1306                                 goto exit;
1307                         else
1308                                 return -rte_errno;
1309                 }
1310         }
1311         snprintf(name, sizeof(name), "port-%u-mprq", dev->data->port_id);
1312         mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1313                                 0, NULL, NULL, mlx5_mprq_buf_init, NULL,
1314                                 dev->device->numa_node, 0);
1315         if (mp == NULL) {
1316                 DRV_LOG(ERR,
1317                         "port %u failed to allocate a mempool for"
1318                         " Multi-Packet RQ, count=%u, size=%u",
1319                         dev->data->port_id, obj_num, obj_size);
1320                 rte_errno = ENOMEM;
1321                 return -rte_errno;
1322         }
1323         priv->mprq_mp = mp;
1324 exit:
1325         /* Set mempool for each Rx queue. */
1326         for (i = 0; i != priv->rxqs_n; ++i) {
1327                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1328
1329                 if (rxq == NULL)
1330                         continue;
1331                 rxq->mprq_mp = mp;
1332         }
1333         DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1334                 dev->data->port_id);
1335         return 0;
1336 }
1337
1338 /**
1339  * Create a DPDK Rx queue.
1340  *
1341  * @param dev
1342  *   Pointer to Ethernet device.
1343  * @param idx
1344  *   RX queue index.
1345  * @param desc
1346  *   Number of descriptors to configure in queue.
1347  * @param socket
1348  *   NUMA socket on which memory must be allocated.
1349  *
1350  * @return
1351  *   A DPDK queue object on success, NULL otherwise and rte_errno is set.
1352  */
1353 struct mlx5_rxq_ctrl *
1354 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1355              unsigned int socket, const struct rte_eth_rxconf *conf,
1356              struct rte_mempool *mp)
1357 {
1358         struct mlx5_priv *priv = dev->data->dev_private;
1359         struct mlx5_rxq_ctrl *tmpl;
1360         unsigned int mb_len = rte_pktmbuf_data_room_size(mp);
1361         unsigned int mprq_stride_size;
1362         struct mlx5_dev_config *config = &priv->config;
1363         /*
1364          * Always allocate extra slots, even if eventually
1365          * the vector Rx will not be used.
1366          */
1367         uint16_t desc_n =
1368                 desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1369         uint64_t offloads = conf->offloads |
1370                            dev->data->dev_conf.rxmode.offloads;
1371         const int mprq_en = mlx5_check_mprq_support(dev) > 0;
1372
1373         tmpl = rte_calloc_socket("RXQ", 1,
1374                                  sizeof(*tmpl) +
1375                                  desc_n * sizeof(struct rte_mbuf *),
1376                                  0, socket);
1377         if (!tmpl) {
1378                 rte_errno = ENOMEM;
1379                 return NULL;
1380         }
1381         if (mlx5_mr_btree_init(&tmpl->rxq.mr_ctrl.cache_bh,
1382                                MLX5_MR_BTREE_CACHE_N, socket)) {
1383                 /* rte_errno is already set. */
1384                 goto error;
1385         }
1386         tmpl->socket = socket;
1387         if (dev->data->dev_conf.intr_conf.rxq)
1388                 tmpl->irq = 1;
1389         /*
1390          * This Rx queue can be configured as a Multi-Packet RQ if all of the
1391          * following conditions are met:
1392          *  - MPRQ is enabled.
1393          *  - The number of descs is more than the number of strides.
1394          *  - max_rx_pkt_len plus overhead is less than the max size of a
1395          *    stride.
1396          *  Otherwise, enable Rx scatter if necessary.
1397          */
1398         assert(mb_len >= RTE_PKTMBUF_HEADROOM);
1399         mprq_stride_size =
1400                 dev->data->dev_conf.rxmode.max_rx_pkt_len +
1401                 sizeof(struct rte_mbuf_ext_shared_info) +
1402                 RTE_PKTMBUF_HEADROOM;
1403         if (mprq_en &&
1404             desc > (1U << config->mprq.stride_num_n) &&
1405             mprq_stride_size <= (1U << config->mprq.max_stride_size_n)) {
1406                 /* TODO: Rx scatter isn't supported yet. */
1407                 tmpl->rxq.sges_n = 0;
1408                 /* Trim the number of descs needed. */
1409                 desc >>= config->mprq.stride_num_n;
1410                 tmpl->rxq.strd_num_n = config->mprq.stride_num_n;
1411                 tmpl->rxq.strd_sz_n = RTE_MAX(log2above(mprq_stride_size),
1412                                               config->mprq.min_stride_size_n);
1413                 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1414                 tmpl->rxq.mprq_max_memcpy_len =
1415                         RTE_MIN(mb_len - RTE_PKTMBUF_HEADROOM,
1416                                 config->mprq.max_memcpy_len);
1417                 DRV_LOG(DEBUG,
1418                         "port %u Rx queue %u: Multi-Packet RQ is enabled"
1419                         " strd_num_n = %u, strd_sz_n = %u",
1420                         dev->data->port_id, idx,
1421                         tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1422         } else if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
1423                    (mb_len - RTE_PKTMBUF_HEADROOM)) {
1424                 tmpl->rxq.sges_n = 0;
1425         } else if (offloads & DEV_RX_OFFLOAD_SCATTER) {
1426                 unsigned int size =
1427                         RTE_PKTMBUF_HEADROOM +
1428                         dev->data->dev_conf.rxmode.max_rx_pkt_len;
1429                 unsigned int sges_n;
1430
1431                 /*
1432                  * Determine the number of SGEs needed for a full packet
1433                  * and round it to the next power of two.
1434                  */
1435                 sges_n = log2above((size / mb_len) + !!(size % mb_len));
1436                 tmpl->rxq.sges_n = sges_n;
1437                 /* Make sure rxq.sges_n did not overflow. */
1438                 size = mb_len * (1 << tmpl->rxq.sges_n);
1439                 size -= RTE_PKTMBUF_HEADROOM;
1440                 if (size < dev->data->dev_conf.rxmode.max_rx_pkt_len) {
1441                         DRV_LOG(ERR,
1442                                 "port %u too many SGEs (%u) needed to handle"
1443                                 " requested maximum packet size %u",
1444                                 dev->data->port_id,
1445                                 1 << sges_n,
1446                                 dev->data->dev_conf.rxmode.max_rx_pkt_len);
1447                         rte_errno = EOVERFLOW;
1448                         goto error;
1449                 }
1450         } else {
1451                 DRV_LOG(WARNING,
1452                         "port %u the requested maximum Rx packet size (%u) is"
1453                         " larger than a single mbuf (%u) and scattered mode has"
1454                         " not been requested",
1455                         dev->data->port_id,
1456                         dev->data->dev_conf.rxmode.max_rx_pkt_len,
1457                         mb_len - RTE_PKTMBUF_HEADROOM);
1458         }
1459         if (mprq_en && !mlx5_rxq_mprq_enabled(&tmpl->rxq))
1460                 DRV_LOG(WARNING,
1461                         "port %u MPRQ is requested but cannot be enabled"
1462                         " (requested: desc = %u, stride_sz = %u,"
1463                         " supported: min_stride_num = %u, max_stride_sz = %u).",
1464                         dev->data->port_id, desc, mprq_stride_size,
1465                         (1 << config->mprq.stride_num_n),
1466                         (1 << config->mprq.max_stride_size_n));
1467         DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1468                 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1469         if (desc % (1 << tmpl->rxq.sges_n)) {
1470                 DRV_LOG(ERR,
1471                         "port %u number of Rx queue descriptors (%u) is not a"
1472                         " multiple of SGEs per packet (%u)",
1473                         dev->data->port_id,
1474                         desc,
1475                         1 << tmpl->rxq.sges_n);
1476                 rte_errno = EINVAL;
1477                 goto error;
1478         }
1479         /* Toggle RX checksum offload if hardware supports it. */
1480         tmpl->rxq.csum = !!(offloads & DEV_RX_OFFLOAD_CHECKSUM);
1481         tmpl->rxq.hw_timestamp = !!(offloads & DEV_RX_OFFLOAD_TIMESTAMP);
1482         /* Configure VLAN stripping. */
1483         tmpl->rxq.vlan_strip = !!(offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
1484         /* By default, FCS (CRC) is stripped by hardware. */
1485         tmpl->rxq.crc_present = 0;
1486         if (offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
1487                 if (config->hw_fcs_strip) {
1488                         /*
1489                          * RQs used for LRO-enabled TIRs should not be
1490                          * configured to scatter the FCS.
1491                          */
1492                         if (mlx5_lro_on(dev))
1493                                 DRV_LOG(WARNING,
1494                                         "port %u CRC stripping has been "
1495                                         "disabled but will still be performed "
1496                                         "by hardware, because LRO is enabled",
1497                                         dev->data->port_id);
1498                         else
1499                                 tmpl->rxq.crc_present = 1;
1500                 } else {
1501                         DRV_LOG(WARNING,
1502                                 "port %u CRC stripping has been disabled but will"
1503                                 " still be performed by hardware, make sure MLNX_OFED"
1504                                 " and firmware are up to date",
1505                                 dev->data->port_id);
1506                 }
1507         }
1508         DRV_LOG(DEBUG,
1509                 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1510                 " incoming frames to hide it",
1511                 dev->data->port_id,
1512                 tmpl->rxq.crc_present ? "disabled" : "enabled",
1513                 tmpl->rxq.crc_present << 2);
1514         /* Save port ID. */
1515         tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1516                 (!!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS));
1517         tmpl->rxq.port_id = dev->data->port_id;
1518         tmpl->priv = priv;
1519         tmpl->rxq.mp = mp;
1520         tmpl->rxq.elts_n = log2above(desc);
1521         tmpl->rxq.rq_repl_thresh =
1522                 MLX5_VPMD_RXQ_RPLNSH_THRESH(1 << tmpl->rxq.elts_n);
1523         tmpl->rxq.elts =
1524                 (struct rte_mbuf *(*)[1 << tmpl->rxq.elts_n])(tmpl + 1);
1525 #ifndef RTE_ARCH_64
1526         tmpl->rxq.uar_lock_cq = &priv->uar_lock_cq;
1527 #endif
1528         tmpl->rxq.idx = idx;
1529         rte_atomic32_inc(&tmpl->refcnt);
1530         LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1531         return tmpl;
1532 error:
1533         rte_free(tmpl);
1534         return NULL;
1535 }
1536
1537 /**
1538  * Get a Rx queue.
1539  *
1540  * @param dev
1541  *   Pointer to Ethernet device.
1542  * @param idx
1543  *   RX queue index.
1544  *
1545  * @return
1546  *   A pointer to the queue if it exists, NULL otherwise.
1547  */
1548 struct mlx5_rxq_ctrl *
1549 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1550 {
1551         struct mlx5_priv *priv = dev->data->dev_private;
1552         struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1553
1554         if ((*priv->rxqs)[idx]) {
1555                 rxq_ctrl = container_of((*priv->rxqs)[idx],
1556                                         struct mlx5_rxq_ctrl,
1557                                         rxq);
1558                 mlx5_rxq_obj_get(dev, idx);
1559                 rte_atomic32_inc(&rxq_ctrl->refcnt);
1560         }
1561         return rxq_ctrl;
1562 }
1563
1564 /**
1565  * Release a Rx queue.
1566  *
1567  * @param dev
1568  *   Pointer to Ethernet device.
1569  * @param idx
1570  *   RX queue index.
1571  *
1572  * @return
1573  *   1 while a reference on it exists, 0 when freed.
1574  */
1575 int
1576 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
1577 {
1578         struct mlx5_priv *priv = dev->data->dev_private;
1579         struct mlx5_rxq_ctrl *rxq_ctrl;
1580
1581         if (!(*priv->rxqs)[idx])
1582                 return 0;
1583         rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1584         assert(rxq_ctrl->priv);
1585         if (rxq_ctrl->obj && !mlx5_rxq_obj_release(rxq_ctrl->obj))
1586                 rxq_ctrl->obj = NULL;
1587         if (rte_atomic32_dec_and_test(&rxq_ctrl->refcnt)) {
1588                 mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
1589                 LIST_REMOVE(rxq_ctrl, next);
1590                 rte_free(rxq_ctrl);
1591                 (*priv->rxqs)[idx] = NULL;
1592                 return 0;
1593         }
1594         return 1;
1595 }
1596
1597 /**
1598  * Verify the Rx Queue list is empty
1599  *
1600  * @param dev
1601  *   Pointer to Ethernet device.
1602  *
1603  * @return
1604  *   The number of object not released.
1605  */
1606 int
1607 mlx5_rxq_verify(struct rte_eth_dev *dev)
1608 {
1609         struct mlx5_priv *priv = dev->data->dev_private;
1610         struct mlx5_rxq_ctrl *rxq_ctrl;
1611         int ret = 0;
1612
1613         LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1614                 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
1615                         dev->data->port_id, rxq_ctrl->rxq.idx);
1616                 ++ret;
1617         }
1618         return ret;
1619 }
1620
1621 /**
1622  * Create an indirection table.
1623  *
1624  * @param dev
1625  *   Pointer to Ethernet device.
1626  * @param queues
1627  *   Queues entering in the indirection table.
1628  * @param queues_n
1629  *   Number of queues in the array.
1630  *
1631  * @return
1632  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
1633  */
1634 static struct mlx5_ind_table_obj *
1635 mlx5_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
1636                        uint32_t queues_n)
1637 {
1638         struct mlx5_priv *priv = dev->data->dev_private;
1639         struct mlx5_ind_table_obj *ind_tbl;
1640         const unsigned int wq_n = rte_is_power_of_2(queues_n) ?
1641                 log2above(queues_n) :
1642                 log2above(priv->config.ind_table_max_size);
1643         struct ibv_wq *wq[1 << wq_n];
1644         unsigned int i;
1645         unsigned int j;
1646
1647         ind_tbl = rte_calloc(__func__, 1, sizeof(*ind_tbl) +
1648                              queues_n * sizeof(uint16_t), 0);
1649         if (!ind_tbl) {
1650                 rte_errno = ENOMEM;
1651                 return NULL;
1652         }
1653         for (i = 0; i != queues_n; ++i) {
1654                 struct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);
1655
1656                 if (!rxq)
1657                         goto error;
1658                 wq[i] = rxq->obj->wq;
1659                 ind_tbl->queues[i] = queues[i];
1660         }
1661         ind_tbl->queues_n = queues_n;
1662         /* Finalise indirection table. */
1663         for (j = 0; i != (unsigned int)(1 << wq_n); ++i, ++j)
1664                 wq[i] = wq[j];
1665         ind_tbl->ind_table = mlx5_glue->create_rwq_ind_table
1666                 (priv->sh->ctx,
1667                  &(struct ibv_rwq_ind_table_init_attr){
1668                         .log_ind_tbl_size = wq_n,
1669                         .ind_tbl = wq,
1670                         .comp_mask = 0,
1671                  });
1672         if (!ind_tbl->ind_table) {
1673                 rte_errno = errno;
1674                 goto error;
1675         }
1676         rte_atomic32_inc(&ind_tbl->refcnt);
1677         LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
1678         return ind_tbl;
1679 error:
1680         rte_free(ind_tbl);
1681         DEBUG("port %u cannot create indirection table", dev->data->port_id);
1682         return NULL;
1683 }
1684
1685 /**
1686  * Get an indirection table.
1687  *
1688  * @param dev
1689  *   Pointer to Ethernet device.
1690  * @param queues
1691  *   Queues entering in the indirection table.
1692  * @param queues_n
1693  *   Number of queues in the array.
1694  *
1695  * @return
1696  *   An indirection table if found.
1697  */
1698 static struct mlx5_ind_table_obj *
1699 mlx5_ind_table_obj_get(struct rte_eth_dev *dev, const uint16_t *queues,
1700                        uint32_t queues_n)
1701 {
1702         struct mlx5_priv *priv = dev->data->dev_private;
1703         struct mlx5_ind_table_obj *ind_tbl;
1704
1705         LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1706                 if ((ind_tbl->queues_n == queues_n) &&
1707                     (memcmp(ind_tbl->queues, queues,
1708                             ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
1709                      == 0))
1710                         break;
1711         }
1712         if (ind_tbl) {
1713                 unsigned int i;
1714
1715                 rte_atomic32_inc(&ind_tbl->refcnt);
1716                 for (i = 0; i != ind_tbl->queues_n; ++i)
1717                         mlx5_rxq_get(dev, ind_tbl->queues[i]);
1718         }
1719         return ind_tbl;
1720 }
1721
1722 /**
1723  * Release an indirection table.
1724  *
1725  * @param dev
1726  *   Pointer to Ethernet device.
1727  * @param ind_table
1728  *   Indirection table to release.
1729  *
1730  * @return
1731  *   1 while a reference on it exists, 0 when freed.
1732  */
1733 static int
1734 mlx5_ind_table_obj_release(struct rte_eth_dev *dev,
1735                            struct mlx5_ind_table_obj *ind_tbl)
1736 {
1737         unsigned int i;
1738
1739         if (rte_atomic32_dec_and_test(&ind_tbl->refcnt))
1740                 claim_zero(mlx5_glue->destroy_rwq_ind_table
1741                            (ind_tbl->ind_table));
1742         for (i = 0; i != ind_tbl->queues_n; ++i)
1743                 claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
1744         if (!rte_atomic32_read(&ind_tbl->refcnt)) {
1745                 LIST_REMOVE(ind_tbl, next);
1746                 rte_free(ind_tbl);
1747                 return 0;
1748         }
1749         return 1;
1750 }
1751
1752 /**
1753  * Verify the Rx Queue list is empty
1754  *
1755  * @param dev
1756  *   Pointer to Ethernet device.
1757  *
1758  * @return
1759  *   The number of object not released.
1760  */
1761 int
1762 mlx5_ind_table_obj_verify(struct rte_eth_dev *dev)
1763 {
1764         struct mlx5_priv *priv = dev->data->dev_private;
1765         struct mlx5_ind_table_obj *ind_tbl;
1766         int ret = 0;
1767
1768         LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1769                 DRV_LOG(DEBUG,
1770                         "port %u indirection table obj %p still referenced",
1771                         dev->data->port_id, (void *)ind_tbl);
1772                 ++ret;
1773         }
1774         return ret;
1775 }
1776
1777 /**
1778  * Create an Rx Hash queue.
1779  *
1780  * @param dev
1781  *   Pointer to Ethernet device.
1782  * @param rss_key
1783  *   RSS key for the Rx hash queue.
1784  * @param rss_key_len
1785  *   RSS key length.
1786  * @param hash_fields
1787  *   Verbs protocol hash field to make the RSS on.
1788  * @param queues
1789  *   Queues entering in hash queue. In case of empty hash_fields only the
1790  *   first queue index will be taken for the indirection table.
1791  * @param queues_n
1792  *   Number of queues.
1793  * @param tunnel
1794  *   Tunnel type.
1795  *
1796  * @return
1797  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
1798  */
1799 struct mlx5_hrxq *
1800 mlx5_hrxq_new(struct rte_eth_dev *dev,
1801               const uint8_t *rss_key, uint32_t rss_key_len,
1802               uint64_t hash_fields,
1803               const uint16_t *queues, uint32_t queues_n,
1804               int tunnel __rte_unused)
1805 {
1806         struct mlx5_priv *priv = dev->data->dev_private;
1807         struct mlx5_hrxq *hrxq;
1808         struct mlx5_ind_table_obj *ind_tbl;
1809         struct ibv_qp *qp;
1810 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1811         struct mlx5dv_qp_init_attr qp_init_attr;
1812 #endif
1813         int err;
1814
1815         queues_n = hash_fields ? queues_n : 1;
1816         ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
1817         if (!ind_tbl)
1818                 ind_tbl = mlx5_ind_table_obj_new(dev, queues, queues_n);
1819         if (!ind_tbl) {
1820                 rte_errno = ENOMEM;
1821                 return NULL;
1822         }
1823 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1824         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
1825         if (tunnel) {
1826                 qp_init_attr.comp_mask =
1827                                 MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS;
1828                 qp_init_attr.create_flags = MLX5DV_QP_CREATE_TUNNEL_OFFLOADS;
1829         }
1830 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1831         if (dev->data->dev_conf.lpbk_mode) {
1832                 /* Allow packet sent from NIC loop back w/o source MAC check. */
1833                 qp_init_attr.comp_mask |=
1834                                 MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS;
1835                 qp_init_attr.create_flags |=
1836                                 MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_UC;
1837         }
1838 #endif
1839         qp = mlx5_glue->dv_create_qp
1840                 (priv->sh->ctx,
1841                  &(struct ibv_qp_init_attr_ex){
1842                         .qp_type = IBV_QPT_RAW_PACKET,
1843                         .comp_mask =
1844                                 IBV_QP_INIT_ATTR_PD |
1845                                 IBV_QP_INIT_ATTR_IND_TABLE |
1846                                 IBV_QP_INIT_ATTR_RX_HASH,
1847                         .rx_hash_conf = (struct ibv_rx_hash_conf){
1848                                 .rx_hash_function = IBV_RX_HASH_FUNC_TOEPLITZ,
1849                                 .rx_hash_key_len = rss_key_len,
1850                                 .rx_hash_key = (void *)(uintptr_t)rss_key,
1851                                 .rx_hash_fields_mask = hash_fields,
1852                         },
1853                         .rwq_ind_tbl = ind_tbl->ind_table,
1854                         .pd = priv->sh->pd,
1855                  },
1856                  &qp_init_attr);
1857 #else
1858         qp = mlx5_glue->create_qp_ex
1859                 (priv->sh->ctx,
1860                  &(struct ibv_qp_init_attr_ex){
1861                         .qp_type = IBV_QPT_RAW_PACKET,
1862                         .comp_mask =
1863                                 IBV_QP_INIT_ATTR_PD |
1864                                 IBV_QP_INIT_ATTR_IND_TABLE |
1865                                 IBV_QP_INIT_ATTR_RX_HASH,
1866                         .rx_hash_conf = (struct ibv_rx_hash_conf){
1867                                 .rx_hash_function = IBV_RX_HASH_FUNC_TOEPLITZ,
1868                                 .rx_hash_key_len = rss_key_len,
1869                                 .rx_hash_key = (void *)(uintptr_t)rss_key,
1870                                 .rx_hash_fields_mask = hash_fields,
1871                         },
1872                         .rwq_ind_tbl = ind_tbl->ind_table,
1873                         .pd = priv->sh->pd,
1874                  });
1875 #endif
1876         if (!qp) {
1877                 rte_errno = errno;
1878                 goto error;
1879         }
1880         hrxq = rte_calloc(__func__, 1, sizeof(*hrxq) + rss_key_len, 0);
1881         if (!hrxq)
1882                 goto error;
1883         hrxq->ind_table = ind_tbl;
1884         hrxq->qp = qp;
1885         hrxq->rss_key_len = rss_key_len;
1886         hrxq->hash_fields = hash_fields;
1887         memcpy(hrxq->rss_key, rss_key, rss_key_len);
1888 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1889         hrxq->action = mlx5_glue->dv_create_flow_action_dest_ibv_qp(hrxq->qp);
1890         if (!hrxq->action) {
1891                 rte_errno = errno;
1892                 goto error;
1893         }
1894 #endif
1895         rte_atomic32_inc(&hrxq->refcnt);
1896         LIST_INSERT_HEAD(&priv->hrxqs, hrxq, next);
1897         return hrxq;
1898 error:
1899         err = rte_errno; /* Save rte_errno before cleanup. */
1900         mlx5_ind_table_obj_release(dev, ind_tbl);
1901         if (qp)
1902                 claim_zero(mlx5_glue->destroy_qp(qp));
1903         rte_errno = err; /* Restore rte_errno. */
1904         return NULL;
1905 }
1906
1907 /**
1908  * Get an Rx Hash queue.
1909  *
1910  * @param dev
1911  *   Pointer to Ethernet device.
1912  * @param rss_conf
1913  *   RSS configuration for the Rx hash queue.
1914  * @param queues
1915  *   Queues entering in hash queue. In case of empty hash_fields only the
1916  *   first queue index will be taken for the indirection table.
1917  * @param queues_n
1918  *   Number of queues.
1919  *
1920  * @return
1921  *   An hash Rx queue on success.
1922  */
1923 struct mlx5_hrxq *
1924 mlx5_hrxq_get(struct rte_eth_dev *dev,
1925               const uint8_t *rss_key, uint32_t rss_key_len,
1926               uint64_t hash_fields,
1927               const uint16_t *queues, uint32_t queues_n)
1928 {
1929         struct mlx5_priv *priv = dev->data->dev_private;
1930         struct mlx5_hrxq *hrxq;
1931
1932         queues_n = hash_fields ? queues_n : 1;
1933         LIST_FOREACH(hrxq, &priv->hrxqs, next) {
1934                 struct mlx5_ind_table_obj *ind_tbl;
1935
1936                 if (hrxq->rss_key_len != rss_key_len)
1937                         continue;
1938                 if (memcmp(hrxq->rss_key, rss_key, rss_key_len))
1939                         continue;
1940                 if (hrxq->hash_fields != hash_fields)
1941                         continue;
1942                 ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
1943                 if (!ind_tbl)
1944                         continue;
1945                 if (ind_tbl != hrxq->ind_table) {
1946                         mlx5_ind_table_obj_release(dev, ind_tbl);
1947                         continue;
1948                 }
1949                 rte_atomic32_inc(&hrxq->refcnt);
1950                 return hrxq;
1951         }
1952         return NULL;
1953 }
1954
1955 /**
1956  * Release the hash Rx queue.
1957  *
1958  * @param dev
1959  *   Pointer to Ethernet device.
1960  * @param hrxq
1961  *   Pointer to Hash Rx queue to release.
1962  *
1963  * @return
1964  *   1 while a reference on it exists, 0 when freed.
1965  */
1966 int
1967 mlx5_hrxq_release(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
1968 {
1969         if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
1970 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
1971                 mlx5_glue->destroy_flow_action(hrxq->action);
1972 #endif
1973                 claim_zero(mlx5_glue->destroy_qp(hrxq->qp));
1974                 mlx5_ind_table_obj_release(dev, hrxq->ind_table);
1975                 LIST_REMOVE(hrxq, next);
1976                 rte_free(hrxq);
1977                 return 0;
1978         }
1979         claim_nonzero(mlx5_ind_table_obj_release(dev, hrxq->ind_table));
1980         return 1;
1981 }
1982
1983 /**
1984  * Verify the Rx Queue list is empty
1985  *
1986  * @param dev
1987  *   Pointer to Ethernet device.
1988  *
1989  * @return
1990  *   The number of object not released.
1991  */
1992 int
1993 mlx5_hrxq_verify(struct rte_eth_dev *dev)
1994 {
1995         struct mlx5_priv *priv = dev->data->dev_private;
1996         struct mlx5_hrxq *hrxq;
1997         int ret = 0;
1998
1999         LIST_FOREACH(hrxq, &priv->hrxqs, next) {
2000                 DRV_LOG(DEBUG,
2001                         "port %u hash Rx queue %p still referenced",
2002                         dev->data->port_id, (void *)hrxq);
2003                 ++ret;
2004         }
2005         return ret;
2006 }
2007
2008 /**
2009  * Create a drop Rx queue Verbs/DevX object.
2010  *
2011  * @param dev
2012  *   Pointer to Ethernet device.
2013  *
2014  * @return
2015  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
2016  */
2017 static struct mlx5_rxq_obj *
2018 mlx5_rxq_obj_drop_new(struct rte_eth_dev *dev)
2019 {
2020         struct mlx5_priv *priv = dev->data->dev_private;
2021         struct ibv_context *ctx = priv->sh->ctx;
2022         struct ibv_cq *cq;
2023         struct ibv_wq *wq = NULL;
2024         struct mlx5_rxq_obj *rxq;
2025
2026         if (priv->drop_queue.rxq)
2027                 return priv->drop_queue.rxq;
2028         cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
2029         if (!cq) {
2030                 DEBUG("port %u cannot allocate CQ for drop queue",
2031                       dev->data->port_id);
2032                 rte_errno = errno;
2033                 goto error;
2034         }
2035         wq = mlx5_glue->create_wq(ctx,
2036                  &(struct ibv_wq_init_attr){
2037                         .wq_type = IBV_WQT_RQ,
2038                         .max_wr = 1,
2039                         .max_sge = 1,
2040                         .pd = priv->sh->pd,
2041                         .cq = cq,
2042                  });
2043         if (!wq) {
2044                 DEBUG("port %u cannot allocate WQ for drop queue",
2045                       dev->data->port_id);
2046                 rte_errno = errno;
2047                 goto error;
2048         }
2049         rxq = rte_calloc(__func__, 1, sizeof(*rxq), 0);
2050         if (!rxq) {
2051                 DEBUG("port %u cannot allocate drop Rx queue memory",
2052                       dev->data->port_id);
2053                 rte_errno = ENOMEM;
2054                 goto error;
2055         }
2056         rxq->cq = cq;
2057         rxq->wq = wq;
2058         priv->drop_queue.rxq = rxq;
2059         return rxq;
2060 error:
2061         if (wq)
2062                 claim_zero(mlx5_glue->destroy_wq(wq));
2063         if (cq)
2064                 claim_zero(mlx5_glue->destroy_cq(cq));
2065         return NULL;
2066 }
2067
2068 /**
2069  * Release a drop Rx queue Verbs/DevX object.
2070  *
2071  * @param dev
2072  *   Pointer to Ethernet device.
2073  *
2074  * @return
2075  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
2076  */
2077 static void
2078 mlx5_rxq_obj_drop_release(struct rte_eth_dev *dev)
2079 {
2080         struct mlx5_priv *priv = dev->data->dev_private;
2081         struct mlx5_rxq_obj *rxq = priv->drop_queue.rxq;
2082
2083         if (rxq->wq)
2084                 claim_zero(mlx5_glue->destroy_wq(rxq->wq));
2085         if (rxq->cq)
2086                 claim_zero(mlx5_glue->destroy_cq(rxq->cq));
2087         rte_free(rxq);
2088         priv->drop_queue.rxq = NULL;
2089 }
2090
2091 /**
2092  * Create a drop indirection table.
2093  *
2094  * @param dev
2095  *   Pointer to Ethernet device.
2096  *
2097  * @return
2098  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
2099  */
2100 static struct mlx5_ind_table_obj *
2101 mlx5_ind_table_obj_drop_new(struct rte_eth_dev *dev)
2102 {
2103         struct mlx5_priv *priv = dev->data->dev_private;
2104         struct mlx5_ind_table_obj *ind_tbl;
2105         struct mlx5_rxq_obj *rxq;
2106         struct mlx5_ind_table_obj tmpl;
2107
2108         rxq = mlx5_rxq_obj_drop_new(dev);
2109         if (!rxq)
2110                 return NULL;
2111         tmpl.ind_table = mlx5_glue->create_rwq_ind_table
2112                 (priv->sh->ctx,
2113                  &(struct ibv_rwq_ind_table_init_attr){
2114                         .log_ind_tbl_size = 0,
2115                         .ind_tbl = &rxq->wq,
2116                         .comp_mask = 0,
2117                  });
2118         if (!tmpl.ind_table) {
2119                 DEBUG("port %u cannot allocate indirection table for drop"
2120                       " queue",
2121                       dev->data->port_id);
2122                 rte_errno = errno;
2123                 goto error;
2124         }
2125         ind_tbl = rte_calloc(__func__, 1, sizeof(*ind_tbl), 0);
2126         if (!ind_tbl) {
2127                 rte_errno = ENOMEM;
2128                 goto error;
2129         }
2130         ind_tbl->ind_table = tmpl.ind_table;
2131         return ind_tbl;
2132 error:
2133         mlx5_rxq_obj_drop_release(dev);
2134         return NULL;
2135 }
2136
2137 /**
2138  * Release a drop indirection table.
2139  *
2140  * @param dev
2141  *   Pointer to Ethernet device.
2142  */
2143 static void
2144 mlx5_ind_table_obj_drop_release(struct rte_eth_dev *dev)
2145 {
2146         struct mlx5_priv *priv = dev->data->dev_private;
2147         struct mlx5_ind_table_obj *ind_tbl = priv->drop_queue.hrxq->ind_table;
2148
2149         claim_zero(mlx5_glue->destroy_rwq_ind_table(ind_tbl->ind_table));
2150         mlx5_rxq_obj_drop_release(dev);
2151         rte_free(ind_tbl);
2152         priv->drop_queue.hrxq->ind_table = NULL;
2153 }
2154
2155 /**
2156  * Create a drop Rx Hash queue.
2157  *
2158  * @param dev
2159  *   Pointer to Ethernet device.
2160  *
2161  * @return
2162  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
2163  */
2164 struct mlx5_hrxq *
2165 mlx5_hrxq_drop_new(struct rte_eth_dev *dev)
2166 {
2167         struct mlx5_priv *priv = dev->data->dev_private;
2168         struct mlx5_ind_table_obj *ind_tbl;
2169         struct ibv_qp *qp;
2170         struct mlx5_hrxq *hrxq;
2171
2172         if (priv->drop_queue.hrxq) {
2173                 rte_atomic32_inc(&priv->drop_queue.hrxq->refcnt);
2174                 return priv->drop_queue.hrxq;
2175         }
2176         ind_tbl = mlx5_ind_table_obj_drop_new(dev);
2177         if (!ind_tbl)
2178                 return NULL;
2179         qp = mlx5_glue->create_qp_ex(priv->sh->ctx,
2180                  &(struct ibv_qp_init_attr_ex){
2181                         .qp_type = IBV_QPT_RAW_PACKET,
2182                         .comp_mask =
2183                                 IBV_QP_INIT_ATTR_PD |
2184                                 IBV_QP_INIT_ATTR_IND_TABLE |
2185                                 IBV_QP_INIT_ATTR_RX_HASH,
2186                         .rx_hash_conf = (struct ibv_rx_hash_conf){
2187                                 .rx_hash_function =
2188                                         IBV_RX_HASH_FUNC_TOEPLITZ,
2189                                 .rx_hash_key_len = MLX5_RSS_HASH_KEY_LEN,
2190                                 .rx_hash_key = rss_hash_default_key,
2191                                 .rx_hash_fields_mask = 0,
2192                                 },
2193                         .rwq_ind_tbl = ind_tbl->ind_table,
2194                         .pd = priv->sh->pd
2195                  });
2196         if (!qp) {
2197                 DEBUG("port %u cannot allocate QP for drop queue",
2198                       dev->data->port_id);
2199                 rte_errno = errno;
2200                 goto error;
2201         }
2202         hrxq = rte_calloc(__func__, 1, sizeof(*hrxq), 0);
2203         if (!hrxq) {
2204                 DRV_LOG(WARNING,
2205                         "port %u cannot allocate memory for drop queue",
2206                         dev->data->port_id);
2207                 rte_errno = ENOMEM;
2208                 goto error;
2209         }
2210         hrxq->ind_table = ind_tbl;
2211         hrxq->qp = qp;
2212 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2213         hrxq->action = mlx5_glue->dv_create_flow_action_dest_ibv_qp(hrxq->qp);
2214         if (!hrxq->action) {
2215                 rte_errno = errno;
2216                 goto error;
2217         }
2218 #endif
2219         priv->drop_queue.hrxq = hrxq;
2220         rte_atomic32_set(&hrxq->refcnt, 1);
2221         return hrxq;
2222 error:
2223         if (ind_tbl)
2224                 mlx5_ind_table_obj_drop_release(dev);
2225         return NULL;
2226 }
2227
2228 /**
2229  * Release a drop hash Rx queue.
2230  *
2231  * @param dev
2232  *   Pointer to Ethernet device.
2233  */
2234 void
2235 mlx5_hrxq_drop_release(struct rte_eth_dev *dev)
2236 {
2237         struct mlx5_priv *priv = dev->data->dev_private;
2238         struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2239
2240         if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
2241 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2242                 mlx5_glue->destroy_flow_action(hrxq->action);
2243 #endif
2244                 claim_zero(mlx5_glue->destroy_qp(hrxq->qp));
2245                 mlx5_ind_table_obj_drop_release(dev);
2246                 rte_free(hrxq);
2247                 priv->drop_queue.hrxq = NULL;
2248         }
2249 }