drivers/net/mlx5/mlx5_rxq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <assert.h>
   8 #include <errno.h>
   9 #include <string.h>
  10 #include <stdint.h>
  11 #include <fcntl.h>
  12 #include <sys/queue.h>
  13
  14 /* Verbs header. */
  15 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  16 #ifdef PEDANTIC
  17 #pragma GCC diagnostic ignored "-Wpedantic"
  18 #endif
  19 #include <infiniband/verbs.h>
  20 #include <infiniband/mlx5dv.h>
  21 #ifdef PEDANTIC
  22 #pragma GCC diagnostic error "-Wpedantic"
  23 #endif
  24
  25 #include <rte_mbuf.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ethdev_driver.h>
  28 #include <rte_common.h>
  29 #include <rte_interrupts.h>
  30 #include <rte_debug.h>
  31 #include <rte_io.h>
  32
  33 #include "mlx5.h"
  34 #include "mlx5_rxtx.h"
  35 #include "mlx5_utils.h"
  36 #include "mlx5_autoconf.h"
  37 #include "mlx5_defs.h"
  38 #include "mlx5_glue.h"
  39
  40 /* Default RSS hash key also used for ConnectX-3. */
  41 uint8_t rss_hash_default_key[] = {
  42         0x2c, 0xc6, 0x81, 0xd1,
  43         0x5b, 0xdb, 0xf4, 0xf7,
  44         0xfc, 0xa2, 0x83, 0x19,
  45         0xdb, 0x1a, 0x3e, 0x94,
  46         0x6b, 0x9e, 0x38, 0xd9,
  47         0x2c, 0x9c, 0x03, 0xd1,
  48         0xad, 0x99, 0x44, 0xa7,
  49         0xd9, 0x56, 0x3d, 0x59,
  50         0x06, 0x3c, 0x25, 0xf3,
  51         0xfc, 0x1f, 0xdc, 0x2a,
  52 };
  53
  54 /* Length of the default RSS hash key. */
  55 static_assert(MLX5_RSS_HASH_KEY_LEN ==
  56               (unsigned int)sizeof(rss_hash_default_key),
  57               "wrong RSS default key size.");
  58
  59 /**
  60  * Check whether Multi-Packet RQ can be enabled for the device.
  61  *
  62  * @param dev
  63  *   Pointer to Ethernet device.
  64  *
  65  * @return
  66  *   1 if supported, negative errno value if not.
  67  */
  68 inline int
  69 mlx5_check_mprq_support(struct rte_eth_dev *dev)
  70 {
  71         struct priv *priv = dev->data->dev_private;
  72
  73         if (priv->config.mprq.enabled &&
  74             priv->rxqs_n >= priv->config.mprq.min_rxqs_num)
  75                 return 1;
  76         return -ENOTSUP;
  77 }
  78
  79 /**
  80  * Check whether Multi-Packet RQ is enabled for the Rx queue.
  81  *
  82  *  @param rxq
  83  *     Pointer to receive queue structure.
  84  *
  85  * @return
  86  *   0 if disabled, otherwise enabled.
  87  */
  88 inline int
  89 mlx5_rxq_mprq_enabled(struct mlx5_rxq_data *rxq)
  90 {
  91         return rxq->strd_num_n > 0;
  92 }
  93
  94 /**
  95  * Check whether Multi-Packet RQ is enabled for the device.
  96  *
  97  * @param dev
  98  *   Pointer to Ethernet device.
  99  *
 100  * @return
 101  *   0 if disabled, otherwise enabled.
 102  */
 103 inline int
 104 mlx5_mprq_enabled(struct rte_eth_dev *dev)
 105 {
 106         struct priv *priv = dev->data->dev_private;
 107         uint16_t i;
 108         uint16_t n = 0;
 109
 110         if (mlx5_check_mprq_support(dev) < 0)
 111                 return 0;
 112         /* All the configured queues should be enabled. */
 113         for (i = 0; i < priv->rxqs_n; ++i) {
 114                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
 115
 116                 if (!rxq)
 117                         continue;
 118                 if (mlx5_rxq_mprq_enabled(rxq))
 119                         ++n;
 120         }
 121         /* Multi-Packet RQ can't be partially configured. */
 122         assert(n == 0 || n == priv->rxqs_n);
 123         return n == priv->rxqs_n;
 124 }
 125
 126 /**
 127  * Allocate RX queue elements for Multi-Packet RQ.
 128  *
 129  * @param rxq_ctrl
 130  *   Pointer to RX queue structure.
 131  *
 132  * @return
 133  *   0 on success, a negative errno value otherwise and rte_errno is set.
 134  */
 135 static int
 136 rxq_alloc_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 137 {
 138         struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 139         unsigned int wqe_n = 1 << rxq->elts_n;
 140         unsigned int i;
 141         int err;
 142
 143         /* Iterate on segments. */
 144         for (i = 0; i <= wqe_n; ++i) {
 145                 struct mlx5_mprq_buf *buf;
 146
 147                 if (rte_mempool_get(rxq->mprq_mp, (void **)&buf) < 0) {
 148                         DRV_LOG(ERR, "port %u empty mbuf pool", rxq->port_id);
 149                         rte_errno = ENOMEM;
 150                         goto error;
 151                 }
 152                 if (i < wqe_n)
 153                         (*rxq->mprq_bufs)[i] = buf;
 154                 else
 155                         rxq->mprq_repl = buf;
 156         }
 157         DRV_LOG(DEBUG,
 158                 "port %u Rx queue %u allocated and configured %u segments",
 159                 rxq->port_id, rxq_ctrl->idx, wqe_n);
 160         return 0;
 161 error:
 162         err = rte_errno; /* Save rte_errno before cleanup. */
 163         wqe_n = i;
 164         for (i = 0; (i != wqe_n); ++i) {
 165                 if ((*rxq->mprq_bufs)[i] != NULL)
 166                         rte_mempool_put(rxq->mprq_mp,
 167                                         (*rxq->mprq_bufs)[i]);
 168                 (*rxq->mprq_bufs)[i] = NULL;
 169         }
 170         DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
 171                 rxq->port_id, rxq_ctrl->idx);
 172         rte_errno = err; /* Restore rte_errno. */
 173         return -rte_errno;
 174 }
 175
 176 /**
 177  * Allocate RX queue elements for Single-Packet RQ.
 178  *
 179  * @param rxq_ctrl
 180  *   Pointer to RX queue structure.
 181  *
 182  * @return
 183  *   0 on success, errno value on failure.
 184  */
 185 static int
 186 rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 187 {
 188         const unsigned int sges_n = 1 << rxq_ctrl->rxq.sges_n;
 189         unsigned int elts_n = 1 << rxq_ctrl->rxq.elts_n;
 190         unsigned int i;
 191         int err;
 192
 193         /* Iterate on segments. */
 194         for (i = 0; (i != elts_n); ++i) {
 195                 struct rte_mbuf *buf;
 196
 197                 buf = rte_pktmbuf_alloc(rxq_ctrl->rxq.mp);
 198                 if (buf == NULL) {
 199                         DRV_LOG(ERR, "port %u empty mbuf pool",
 200                                 PORT_ID(rxq_ctrl->priv));
 201                         rte_errno = ENOMEM;
 202                         goto error;
 203                 }
 204                 /* Headroom is reserved by rte_pktmbuf_alloc(). */
 205                 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
 206                 /* Buffer is supposed to be empty. */
 207                 assert(rte_pktmbuf_data_len(buf) == 0);
 208                 assert(rte_pktmbuf_pkt_len(buf) == 0);
 209                 assert(!buf->next);
 210                 /* Only the first segment keeps headroom. */
 211                 if (i % sges_n)
 212                         SET_DATA_OFF(buf, 0);
 213                 PORT(buf) = rxq_ctrl->rxq.port_id;
 214                 DATA_LEN(buf) = rte_pktmbuf_tailroom(buf);
 215                 PKT_LEN(buf) = DATA_LEN(buf);
 216                 NB_SEGS(buf) = 1;
 217                 (*rxq_ctrl->rxq.elts)[i] = buf;
 218         }
 219         /* If Rx vector is activated. */
 220         if (mlx5_rxq_check_vec_support(&rxq_ctrl->rxq) > 0) {
 221                 struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 222                 struct rte_mbuf *mbuf_init = &rxq->fake_mbuf;
 223                 int j;
 224
 225                 /* Initialize default rearm_data for vPMD. */
 226                 mbuf_init->data_off = RTE_PKTMBUF_HEADROOM;
 227                 rte_mbuf_refcnt_set(mbuf_init, 1);
 228                 mbuf_init->nb_segs = 1;
 229                 mbuf_init->port = rxq->port_id;
 230                 /*
 231                  * prevent compiler reordering:
 232                  * rearm_data covers previous fields.
 233                  */
 234                 rte_compiler_barrier();
 235                 rxq->mbuf_initializer =
 236                         *(uint64_t *)&mbuf_init->rearm_data;
 237                 /* Padding with a fake mbuf for vectorized Rx. */
 238                 for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
 239                         (*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
 240         }
 241         DRV_LOG(DEBUG,
 242                 "port %u Rx queue %u allocated and configured %u segments"
 243                 " (max %u packets)",
 244                 PORT_ID(rxq_ctrl->priv), rxq_ctrl->idx, elts_n,
 245                 elts_n / (1 << rxq_ctrl->rxq.sges_n));
 246         return 0;
 247 error:
 248         err = rte_errno; /* Save rte_errno before cleanup. */
 249         elts_n = i;
 250         for (i = 0; (i != elts_n); ++i) {
 251                 if ((*rxq_ctrl->rxq.elts)[i] != NULL)
 252                         rte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);
 253                 (*rxq_ctrl->rxq.elts)[i] = NULL;
 254         }
 255         DRV_LOG(DEBUG, "port %u Rx queue %u failed, freed everything",
 256                 PORT_ID(rxq_ctrl->priv), rxq_ctrl->idx);
 257         rte_errno = err; /* Restore rte_errno. */
 258         return -rte_errno;
 259 }
 260
 261 /**
 262  * Allocate RX queue elements.
 263  *
 264  * @param rxq_ctrl
 265  *   Pointer to RX queue structure.
 266  *
 267  * @return
 268  *   0 on success, errno value on failure.
 269  */
 270 int
 271 rxq_alloc_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
 272 {
 273         return mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
 274                rxq_alloc_elts_mprq(rxq_ctrl) : rxq_alloc_elts_sprq(rxq_ctrl);
 275 }
 276
 277 /**
 278  * Free RX queue elements for Multi-Packet RQ.
 279  *
 280  * @param rxq_ctrl
 281  *   Pointer to RX queue structure.
 282  */
 283 static void
 284 rxq_free_elts_mprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 285 {
 286         struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 287         uint16_t i;
 288
 289         DRV_LOG(DEBUG, "port %u Multi-Packet Rx queue %u freeing WRs",
 290                 rxq->port_id, rxq_ctrl->idx);
 291         if (rxq->mprq_bufs == NULL)
 292                 return;
 293         assert(mlx5_rxq_check_vec_support(rxq) < 0);
 294         for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
 295                 if ((*rxq->mprq_bufs)[i] != NULL)
 296                         mlx5_mprq_buf_free((*rxq->mprq_bufs)[i]);
 297                 (*rxq->mprq_bufs)[i] = NULL;
 298         }
 299         if (rxq->mprq_repl != NULL) {
 300                 mlx5_mprq_buf_free(rxq->mprq_repl);
 301                 rxq->mprq_repl = NULL;
 302         }
 303 }
 304
 305 /**
 306  * Free RX queue elements for Single-Packet RQ.
 307  *
 308  * @param rxq_ctrl
 309  *   Pointer to RX queue structure.
 310  */
 311 static void
 312 rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)
 313 {
 314         struct mlx5_rxq_data *rxq = &rxq_ctrl->rxq;
 315         const uint16_t q_n = (1 << rxq->elts_n);
 316         const uint16_t q_mask = q_n - 1;
 317         uint16_t used = q_n - (rxq->rq_ci - rxq->rq_pi);
 318         uint16_t i;
 319
 320         DRV_LOG(DEBUG, "port %u Rx queue %u freeing WRs",
 321                 PORT_ID(rxq_ctrl->priv), rxq_ctrl->idx);
 322         if (rxq->elts == NULL)
 323                 return;
 324         /**
 325          * Some mbuf in the Ring belongs to the application.  They cannot be
 326          * freed.
 327          */
 328         if (mlx5_rxq_check_vec_support(rxq) > 0) {
 329                 for (i = 0; i < used; ++i)
 330                         (*rxq->elts)[(rxq->rq_ci + i) & q_mask] = NULL;
 331                 rxq->rq_pi = rxq->rq_ci;
 332         }
 333         for (i = 0; (i != (1u << rxq->elts_n)); ++i) {
 334                 if ((*rxq->elts)[i] != NULL)
 335                         rte_pktmbuf_free_seg((*rxq->elts)[i]);
 336                 (*rxq->elts)[i] = NULL;
 337         }
 338 }
 339
 340 /**
 341  * Free RX queue elements.
 342  *
 343  * @param rxq_ctrl
 344  *   Pointer to RX queue structure.
 345  */
 346 static void
 347 rxq_free_elts(struct mlx5_rxq_ctrl *rxq_ctrl)
 348 {
 349         if (mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq))
 350                 rxq_free_elts_mprq(rxq_ctrl);
 351         else
 352                 rxq_free_elts_sprq(rxq_ctrl);
 353 }
 354
 355 /**
 356  * Clean up a RX queue.
 357  *
 358  * Destroy objects, free allocated memory and reset the structure for reuse.
 359  *
 360  * @param rxq_ctrl
 361  *   Pointer to RX queue structure.
 362  */
 363 void
 364 mlx5_rxq_cleanup(struct mlx5_rxq_ctrl *rxq_ctrl)
 365 {
 366         DRV_LOG(DEBUG, "port %u cleaning up Rx queue %u",
 367                 PORT_ID(rxq_ctrl->priv), rxq_ctrl->idx);
 368         if (rxq_ctrl->ibv)
 369                 mlx5_rxq_ibv_release(rxq_ctrl->ibv);
 370         memset(rxq_ctrl, 0, sizeof(*rxq_ctrl));
 371 }
 372
 373 /**
 374  * Returns the per-queue supported offloads.
 375  *
 376  * @param dev
 377  *   Pointer to Ethernet device.
 378  *
 379  * @return
 380  *   Supported Rx offloads.
 381  */
 382 uint64_t
 383 mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev)
 384 {
 385         struct priv *priv = dev->data->dev_private;
 386         struct mlx5_dev_config *config = &priv->config;
 387         uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
 388                              DEV_RX_OFFLOAD_TIMESTAMP |
 389                              DEV_RX_OFFLOAD_JUMBO_FRAME);
 390
 391         offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
 392         if (config->hw_fcs_strip)
 393                 offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
 394
 395         if (config->hw_csum)
 396                 offloads |= (DEV_RX_OFFLOAD_IPV4_CKSUM |
 397                              DEV_RX_OFFLOAD_UDP_CKSUM |
 398                              DEV_RX_OFFLOAD_TCP_CKSUM);
 399         if (config->hw_vlan_strip)
 400                 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
 401         return offloads;
 402 }
 403
 404
 405 /**
 406  * Returns the per-port supported offloads.
 407  *
 408  * @return
 409  *   Supported Rx offloads.
 410  */
 411 uint64_t
 412 mlx5_get_rx_port_offloads(void)
 413 {
 414         uint64_t offloads = DEV_RX_OFFLOAD_VLAN_FILTER;
 415
 416         return offloads;
 417 }
 418
 419 /**
 420  *
 421  * @param dev
 422  *   Pointer to Ethernet device structure.
 423  * @param idx
 424  *   RX queue index.
 425  * @param desc
 426  *   Number of descriptors to configure in queue.
 427  * @param socket
 428  *   NUMA socket on which memory must be allocated.
 429  * @param[in] conf
 430  *   Thresholds parameters.
 431  * @param mp
 432  *   Memory pool for buffer allocations.
 433  *
 434  * @return
 435  *   0 on success, a negative errno value otherwise and rte_errno is set.
 436  */
 437 int
 438 mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
 439                     unsigned int socket, const struct rte_eth_rxconf *conf,
 440                     struct rte_mempool *mp)
 441 {
 442         struct priv *priv = dev->data->dev_private;
 443         struct mlx5_rxq_data *rxq = (*priv->rxqs)[idx];
 444         struct mlx5_rxq_ctrl *rxq_ctrl =
 445                 container_of(rxq, struct mlx5_rxq_ctrl, rxq);
 446
 447         if (!rte_is_power_of_2(desc)) {
 448                 desc = 1 << log2above(desc);
 449                 DRV_LOG(WARNING,
 450                         "port %u increased number of descriptors in Rx queue %u"
 451                         " to the next power of two (%d)",
 452                         dev->data->port_id, idx, desc);
 453         }
 454         DRV_LOG(DEBUG, "port %u configuring Rx queue %u for %u descriptors",
 455                 dev->data->port_id, idx, desc);
 456         if (idx >= priv->rxqs_n) {
 457                 DRV_LOG(ERR, "port %u Rx queue index out of range (%u >= %u)",
 458                         dev->data->port_id, idx, priv->rxqs_n);
 459                 rte_errno = EOVERFLOW;
 460                 return -rte_errno;
 461         }
 462         if (!mlx5_rxq_releasable(dev, idx)) {
 463                 DRV_LOG(ERR, "port %u unable to release queue index %u",
 464                         dev->data->port_id, idx);
 465                 rte_errno = EBUSY;
 466                 return -rte_errno;
 467         }
 468         mlx5_rxq_release(dev, idx);
 469         rxq_ctrl = mlx5_rxq_new(dev, idx, desc, socket, conf, mp);
 470         if (!rxq_ctrl) {
 471                 DRV_LOG(ERR, "port %u unable to allocate queue index %u",
 472                         dev->data->port_id, idx);
 473                 rte_errno = ENOMEM;
 474                 return -rte_errno;
 475         }
 476         DRV_LOG(DEBUG, "port %u adding Rx queue %u to list",
 477                 dev->data->port_id, idx);
 478         (*priv->rxqs)[idx] = &rxq_ctrl->rxq;
 479         return 0;
 480 }
 481
 482 /**
 483  * DPDK callback to release a RX queue.
 484  *
 485  * @param dpdk_rxq
 486  *   Generic RX queue pointer.
 487  */
 488 void
 489 mlx5_rx_queue_release(void *dpdk_rxq)
 490 {
 491         struct mlx5_rxq_data *rxq = (struct mlx5_rxq_data *)dpdk_rxq;
 492         struct mlx5_rxq_ctrl *rxq_ctrl;
 493         struct priv *priv;
 494
 495         if (rxq == NULL)
 496                 return;
 497         rxq_ctrl = container_of(rxq, struct mlx5_rxq_ctrl, rxq);
 498         priv = rxq_ctrl->priv;
 499         if (!mlx5_rxq_releasable(ETH_DEV(priv), rxq_ctrl->rxq.stats.idx))
 500                 rte_panic("port %u Rx queue %u is still used by a flow and"
 501                           " cannot be removed\n",
 502                           PORT_ID(priv), rxq_ctrl->idx);
 503         mlx5_rxq_release(ETH_DEV(priv), rxq_ctrl->rxq.stats.idx);
 504 }
 505
 506 /**
 507  * Allocate queue vector and fill epoll fd list for Rx interrupts.
 508  *
 509  * @param dev
 510  *   Pointer to Ethernet device.
 511  *
 512  * @return
 513  *   0 on success, a negative errno value otherwise and rte_errno is set.
 514  */
 515 int
 516 mlx5_rx_intr_vec_enable(struct rte_eth_dev *dev)
 517 {
 518         struct priv *priv = dev->data->dev_private;
 519         unsigned int i;
 520         unsigned int rxqs_n = priv->rxqs_n;
 521         unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
 522         unsigned int count = 0;
 523         struct rte_intr_handle *intr_handle = dev->intr_handle;
 524
 525         if (!dev->data->dev_conf.intr_conf.rxq)
 526                 return 0;
 527         mlx5_rx_intr_vec_disable(dev);
 528         intr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));
 529         if (intr_handle->intr_vec == NULL) {
 530                 DRV_LOG(ERR,
 531                         "port %u failed to allocate memory for interrupt"
 532                         " vector, Rx interrupts will not be supported",
 533                         dev->data->port_id);
 534                 rte_errno = ENOMEM;
 535                 return -rte_errno;
 536         }
 537         intr_handle->type = RTE_INTR_HANDLE_EXT;
 538         for (i = 0; i != n; ++i) {
 539                 /* This rxq ibv must not be released in this function. */
 540                 struct mlx5_rxq_ibv *rxq_ibv = mlx5_rxq_ibv_get(dev, i);
 541                 int fd;
 542                 int flags;
 543                 int rc;
 544
 545                 /* Skip queues that cannot request interrupts. */
 546                 if (!rxq_ibv || !rxq_ibv->channel) {
 547                         /* Use invalid intr_vec[] index to disable entry. */
 548                         intr_handle->intr_vec[i] =
 549                                 RTE_INTR_VEC_RXTX_OFFSET +
 550                                 RTE_MAX_RXTX_INTR_VEC_ID;
 551                         continue;
 552                 }
 553                 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
 554                         DRV_LOG(ERR,
 555                                 "port %u too many Rx queues for interrupt"
 556                                 " vector size (%d), Rx interrupts cannot be"
 557                                 " enabled",
 558                                 dev->data->port_id, RTE_MAX_RXTX_INTR_VEC_ID);
 559                         mlx5_rx_intr_vec_disable(dev);
 560                         rte_errno = ENOMEM;
 561                         return -rte_errno;
 562                 }
 563                 fd = rxq_ibv->channel->fd;
 564                 flags = fcntl(fd, F_GETFL);
 565                 rc = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 566                 if (rc < 0) {
 567                         rte_errno = errno;
 568                         DRV_LOG(ERR,
 569                                 "port %u failed to make Rx interrupt file"
 570                                 " descriptor %d non-blocking for queue index"
 571                                 " %d",
 572                                 dev->data->port_id, fd, i);
 573                         mlx5_rx_intr_vec_disable(dev);
 574                         return -rte_errno;
 575                 }
 576                 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
 577                 intr_handle->efds[count] = fd;
 578                 count++;
 579         }
 580         if (!count)
 581                 mlx5_rx_intr_vec_disable(dev);
 582         else
 583                 intr_handle->nb_efd = count;
 584         return 0;
 585 }
 586
 587 /**
 588  * Clean up Rx interrupts handler.
 589  *
 590  * @param dev
 591  *   Pointer to Ethernet device.
 592  */
 593 void
 594 mlx5_rx_intr_vec_disable(struct rte_eth_dev *dev)
 595 {
 596         struct priv *priv = dev->data->dev_private;
 597         struct rte_intr_handle *intr_handle = dev->intr_handle;
 598         unsigned int i;
 599         unsigned int rxqs_n = priv->rxqs_n;
 600         unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
 601
 602         if (!dev->data->dev_conf.intr_conf.rxq)
 603                 return;
 604         if (!intr_handle->intr_vec)
 605                 goto free;
 606         for (i = 0; i != n; ++i) {
 607                 struct mlx5_rxq_ctrl *rxq_ctrl;
 608                 struct mlx5_rxq_data *rxq_data;
 609
 610                 if (intr_handle->intr_vec[i] == RTE_INTR_VEC_RXTX_OFFSET +
 611                     RTE_MAX_RXTX_INTR_VEC_ID)
 612                         continue;
 613                 /**
 614                  * Need to access directly the queue to release the reference
 615                  * kept in priv_rx_intr_vec_enable().
 616                  */
 617                 rxq_data = (*priv->rxqs)[i];
 618                 rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 619                 mlx5_rxq_ibv_release(rxq_ctrl->ibv);
 620         }
 621 free:
 622         rte_intr_free_epoll_fd(intr_handle);
 623         if (intr_handle->intr_vec)
 624                 free(intr_handle->intr_vec);
 625         intr_handle->nb_efd = 0;
 626         intr_handle->intr_vec = NULL;
 627 }
 628
 629 /**
 630  *  MLX5 CQ notification .
 631  *
 632  *  @param rxq
 633  *     Pointer to receive queue structure.
 634  *  @param sq_n_rxq
 635  *     Sequence number per receive queue .
 636  */
 637 static inline void
 638 mlx5_arm_cq(struct mlx5_rxq_data *rxq, int sq_n_rxq)
 639 {
 640         int sq_n = 0;
 641         uint32_t doorbell_hi;
 642         uint64_t doorbell;
 643         void *cq_db_reg = (char *)rxq->cq_uar + MLX5_CQ_DOORBELL;
 644
 645         sq_n = sq_n_rxq & MLX5_CQ_SQN_MASK;
 646         doorbell_hi = sq_n << MLX5_CQ_SQN_OFFSET | (rxq->cq_ci & MLX5_CI_MASK);
 647         doorbell = (uint64_t)doorbell_hi << 32;
 648         doorbell |=  rxq->cqn;
 649         rxq->cq_db[MLX5_CQ_ARM_DB] = rte_cpu_to_be_32(doorbell_hi);
 650         mlx5_uar_write64(rte_cpu_to_be_64(doorbell),
 651                          cq_db_reg, rxq->uar_lock_cq);
 652 }
 653
 654 /**
 655  * DPDK callback for Rx queue interrupt enable.
 656  *
 657  * @param dev
 658  *   Pointer to Ethernet device structure.
 659  * @param rx_queue_id
 660  *   Rx queue number.
 661  *
 662  * @return
 663  *   0 on success, a negative errno value otherwise and rte_errno is set.
 664  */
 665 int
 666 mlx5_rx_intr_enable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 667 {
 668         struct priv *priv = dev->data->dev_private;
 669         struct mlx5_rxq_data *rxq_data;
 670         struct mlx5_rxq_ctrl *rxq_ctrl;
 671
 672         rxq_data = (*priv->rxqs)[rx_queue_id];
 673         if (!rxq_data) {
 674                 rte_errno = EINVAL;
 675                 return -rte_errno;
 676         }
 677         rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 678         if (rxq_ctrl->irq) {
 679                 struct mlx5_rxq_ibv *rxq_ibv;
 680
 681                 rxq_ibv = mlx5_rxq_ibv_get(dev, rx_queue_id);
 682                 if (!rxq_ibv) {
 683                         rte_errno = EINVAL;
 684                         return -rte_errno;
 685                 }
 686                 mlx5_arm_cq(rxq_data, rxq_data->cq_arm_sn);
 687                 mlx5_rxq_ibv_release(rxq_ibv);
 688         }
 689         return 0;
 690 }
 691
 692 /**
 693  * DPDK callback for Rx queue interrupt disable.
 694  *
 695  * @param dev
 696  *   Pointer to Ethernet device structure.
 697  * @param rx_queue_id
 698  *   Rx queue number.
 699  *
 700  * @return
 701  *   0 on success, a negative errno value otherwise and rte_errno is set.
 702  */
 703 int
 704 mlx5_rx_intr_disable(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 705 {
 706         struct priv *priv = dev->data->dev_private;
 707         struct mlx5_rxq_data *rxq_data;
 708         struct mlx5_rxq_ctrl *rxq_ctrl;
 709         struct mlx5_rxq_ibv *rxq_ibv = NULL;
 710         struct ibv_cq *ev_cq;
 711         void *ev_ctx;
 712         int ret;
 713
 714         rxq_data = (*priv->rxqs)[rx_queue_id];
 715         if (!rxq_data) {
 716                 rte_errno = EINVAL;
 717                 return -rte_errno;
 718         }
 719         rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 720         if (!rxq_ctrl->irq)
 721                 return 0;
 722         rxq_ibv = mlx5_rxq_ibv_get(dev, rx_queue_id);
 723         if (!rxq_ibv) {
 724                 rte_errno = EINVAL;
 725                 return -rte_errno;
 726         }
 727         ret = mlx5_glue->get_cq_event(rxq_ibv->channel, &ev_cq, &ev_ctx);
 728         if (ret || ev_cq != rxq_ibv->cq) {
 729                 rte_errno = EINVAL;
 730                 goto exit;
 731         }
 732         rxq_data->cq_arm_sn++;
 733         mlx5_glue->ack_cq_events(rxq_ibv->cq, 1);
 734         return 0;
 735 exit:
 736         ret = rte_errno; /* Save rte_errno before cleanup. */
 737         if (rxq_ibv)
 738                 mlx5_rxq_ibv_release(rxq_ibv);
 739         DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
 740                 dev->data->port_id, rx_queue_id);
 741         rte_errno = ret; /* Restore rte_errno. */
 742         return -rte_errno;
 743 }
 744
 745 /**
 746  * Create the Rx queue Verbs object.
 747  *
 748  * @param dev
 749  *   Pointer to Ethernet device.
 750  * @param idx
 751  *   Queue index in DPDK Rx queue array
 752  *
 753  * @return
 754  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
 755  */
 756 struct mlx5_rxq_ibv *
 757 mlx5_rxq_ibv_new(struct rte_eth_dev *dev, uint16_t idx)
 758 {
 759         struct priv *priv = dev->data->dev_private;
 760         struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
 761         struct mlx5_rxq_ctrl *rxq_ctrl =
 762                 container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 763         struct ibv_wq_attr mod;
 764         union {
 765                 struct {
 766                         struct ibv_cq_init_attr_ex ibv;
 767                         struct mlx5dv_cq_init_attr mlx5;
 768                 } cq;
 769                 struct {
 770                         struct ibv_wq_init_attr ibv;
 771 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 772                         struct mlx5dv_wq_init_attr mlx5;
 773 #endif
 774                 } wq;
 775                 struct ibv_cq_ex cq_attr;
 776         } attr;
 777         unsigned int cqe_n;
 778         unsigned int wqe_n = 1 << rxq_data->elts_n;
 779         struct mlx5_rxq_ibv *tmpl;
 780         struct mlx5dv_cq cq_info;
 781         struct mlx5dv_rwq rwq;
 782         unsigned int i;
 783         int ret = 0;
 784         struct mlx5dv_obj obj;
 785         struct mlx5_dev_config *config = &priv->config;
 786         const int mprq_en = mlx5_rxq_mprq_enabled(rxq_data);
 787
 788         assert(rxq_data);
 789         assert(!rxq_ctrl->ibv);
 790         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_RX_QUEUE;
 791         priv->verbs_alloc_ctx.obj = rxq_ctrl;
 792         tmpl = rte_calloc_socket(__func__, 1, sizeof(*tmpl), 0,
 793                                  rxq_ctrl->socket);
 794         if (!tmpl) {
 795                 DRV_LOG(ERR,
 796                         "port %u Rx queue %u cannot allocate verbs resources",
 797                         dev->data->port_id, rxq_ctrl->idx);
 798                 rte_errno = ENOMEM;
 799                 goto error;
 800         }
 801         tmpl->rxq_ctrl = rxq_ctrl;
 802         if (rxq_ctrl->irq) {
 803                 tmpl->channel = mlx5_glue->create_comp_channel(priv->ctx);
 804                 if (!tmpl->channel) {
 805                         DRV_LOG(ERR, "port %u: comp channel creation failure",
 806                                 dev->data->port_id);
 807                         rte_errno = ENOMEM;
 808                         goto error;
 809                 }
 810         }
 811         if (mprq_en)
 812                 cqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;
 813         else
 814                 cqe_n = wqe_n  - 1;
 815         attr.cq.ibv = (struct ibv_cq_init_attr_ex){
 816                 .cqe = cqe_n,
 817                 .channel = tmpl->channel,
 818                 .comp_mask = 0,
 819         };
 820         attr.cq.mlx5 = (struct mlx5dv_cq_init_attr){
 821                 .comp_mask = 0,
 822         };
 823         if (config->cqe_comp && !rxq_data->hw_timestamp) {
 824                 attr.cq.mlx5.comp_mask |=
 825                         MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
 826 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 827                 attr.cq.mlx5.cqe_comp_res_format =
 828                         mprq_en ? MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX :
 829                                   MLX5DV_CQE_RES_FORMAT_HASH;
 830 #else
 831                 attr.cq.mlx5.cqe_comp_res_format = MLX5DV_CQE_RES_FORMAT_HASH;
 832 #endif
 833                 /*
 834                  * For vectorized Rx, it must not be doubled in order to
 835                  * make cq_ci and rq_ci aligned.
 836                  */
 837                 if (mlx5_rxq_check_vec_support(rxq_data) < 0)
 838                         attr.cq.ibv.cqe *= 2;
 839         } else if (config->cqe_comp && rxq_data->hw_timestamp) {
 840                 DRV_LOG(DEBUG,
 841                         "port %u Rx CQE compression is disabled for HW"
 842                         " timestamp",
 843                         dev->data->port_id);
 844         }
 845         tmpl->cq = mlx5_glue->cq_ex_to_cq
 846                 (mlx5_glue->dv_create_cq(priv->ctx, &attr.cq.ibv,
 847                                          &attr.cq.mlx5));
 848         if (tmpl->cq == NULL) {
 849                 DRV_LOG(ERR, "port %u Rx queue %u CQ creation failure",
 850                         dev->data->port_id, idx);
 851                 rte_errno = ENOMEM;
 852                 goto error;
 853         }
 854         DRV_LOG(DEBUG, "port %u priv->device_attr.max_qp_wr is %d",
 855                 dev->data->port_id, priv->device_attr.orig_attr.max_qp_wr);
 856         DRV_LOG(DEBUG, "port %u priv->device_attr.max_sge is %d",
 857                 dev->data->port_id, priv->device_attr.orig_attr.max_sge);
 858         attr.wq.ibv = (struct ibv_wq_init_attr){
 859                 .wq_context = NULL, /* Could be useful in the future. */
 860                 .wq_type = IBV_WQT_RQ,
 861                 /* Max number of outstanding WRs. */
 862                 .max_wr = wqe_n >> rxq_data->sges_n,
 863                 /* Max number of scatter/gather elements in a WR. */
 864                 .max_sge = 1 << rxq_data->sges_n,
 865                 .pd = priv->pd,
 866                 .cq = tmpl->cq,
 867                 .comp_mask =
 868                         IBV_WQ_FLAGS_CVLAN_STRIPPING |
 869                         0,
 870                 .create_flags = (rxq_data->vlan_strip ?
 871                                  IBV_WQ_FLAGS_CVLAN_STRIPPING :
 872                                  0),
 873         };
 874         /* By default, FCS (CRC) is stripped by hardware. */
 875         if (rxq_data->crc_present) {
 876                 attr.wq.ibv.create_flags |= IBV_WQ_FLAGS_SCATTER_FCS;
 877                 attr.wq.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
 878         }
 879 #ifdef HAVE_IBV_WQ_FLAG_RX_END_PADDING
 880         if (config->hw_padding) {
 881                 attr.wq.ibv.create_flags |= IBV_WQ_FLAG_RX_END_PADDING;
 882                 attr.wq.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
 883         }
 884 #endif
 885 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 886         attr.wq.mlx5 = (struct mlx5dv_wq_init_attr){
 887                 .comp_mask = 0,
 888         };
 889         if (mprq_en) {
 890                 struct mlx5dv_striding_rq_init_attr *mprq_attr =
 891                         &attr.wq.mlx5.striding_rq_attrs;
 892
 893                 attr.wq.mlx5.comp_mask |= MLX5DV_WQ_INIT_ATTR_MASK_STRIDING_RQ;
 894                 *mprq_attr = (struct mlx5dv_striding_rq_init_attr){
 895                         .single_stride_log_num_of_bytes = rxq_data->strd_sz_n,
 896                         .single_wqe_log_num_of_strides = rxq_data->strd_num_n,
 897                         .two_byte_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT,
 898                 };
 899         }
 900         tmpl->wq = mlx5_glue->dv_create_wq(priv->ctx, &attr.wq.ibv,
 901                                            &attr.wq.mlx5);
 902 #else
 903         tmpl->wq = mlx5_glue->create_wq(priv->ctx, &attr.wq.ibv);
 904 #endif
 905         if (tmpl->wq == NULL) {
 906                 DRV_LOG(ERR, "port %u Rx queue %u WQ creation failure",
 907                         dev->data->port_id, idx);
 908                 rte_errno = ENOMEM;
 909                 goto error;
 910         }
 911         /*
 912          * Make sure number of WRs*SGEs match expectations since a queue
 913          * cannot allocate more than "desc" buffers.
 914          */
 915         if (attr.wq.ibv.max_wr != (wqe_n >> rxq_data->sges_n) ||
 916             attr.wq.ibv.max_sge != (1u << rxq_data->sges_n)) {
 917                 DRV_LOG(ERR,
 918                         "port %u Rx queue %u requested %u*%u but got %u*%u"
 919                         " WRs*SGEs",
 920                         dev->data->port_id, idx,
 921                         wqe_n >> rxq_data->sges_n, (1 << rxq_data->sges_n),
 922                         attr.wq.ibv.max_wr, attr.wq.ibv.max_sge);
 923                 rte_errno = EINVAL;
 924                 goto error;
 925         }
 926         /* Change queue state to ready. */
 927         mod = (struct ibv_wq_attr){
 928                 .attr_mask = IBV_WQ_ATTR_STATE,
 929                 .wq_state = IBV_WQS_RDY,
 930         };
 931         ret = mlx5_glue->modify_wq(tmpl->wq, &mod);
 932         if (ret) {
 933                 DRV_LOG(ERR,
 934                         "port %u Rx queue %u WQ state to IBV_WQS_RDY failed",
 935                         dev->data->port_id, idx);
 936                 rte_errno = ret;
 937                 goto error;
 938         }
 939         obj.cq.in = tmpl->cq;
 940         obj.cq.out = &cq_info;
 941         obj.rwq.in = tmpl->wq;
 942         obj.rwq.out = &rwq;
 943         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_CQ | MLX5DV_OBJ_RWQ);
 944         if (ret) {
 945                 rte_errno = ret;
 946                 goto error;
 947         }
 948         if (cq_info.cqe_size != RTE_CACHE_LINE_SIZE) {
 949                 DRV_LOG(ERR,
 950                         "port %u wrong MLX5_CQE_SIZE environment variable"
 951                         " value: it should be set to %u",
 952                         dev->data->port_id, RTE_CACHE_LINE_SIZE);
 953                 rte_errno = EINVAL;
 954                 goto error;
 955         }
 956         /* Fill the rings. */
 957         rxq_data->wqes = rwq.buf;
 958         for (i = 0; (i != wqe_n); ++i) {
 959                 volatile struct mlx5_wqe_data_seg *scat;
 960                 uintptr_t addr;
 961                 uint32_t byte_count;
 962
 963                 if (mprq_en) {
 964                         struct mlx5_mprq_buf *buf = (*rxq_data->mprq_bufs)[i];
 965
 966                         scat = &((volatile struct mlx5_wqe_mprq *)
 967                                  rxq_data->wqes)[i].dseg;
 968                         addr = (uintptr_t)mlx5_mprq_buf_addr(buf);
 969                         byte_count = (1 << rxq_data->strd_sz_n) *
 970                                      (1 << rxq_data->strd_num_n);
 971                 } else {
 972                         struct rte_mbuf *buf = (*rxq_data->elts)[i];
 973
 974                         scat = &((volatile struct mlx5_wqe_data_seg *)
 975                                  rxq_data->wqes)[i];
 976                         addr = rte_pktmbuf_mtod(buf, uintptr_t);
 977                         byte_count = DATA_LEN(buf);
 978                 }
 979                 /* scat->addr must be able to store a pointer. */
 980                 assert(sizeof(scat->addr) >= sizeof(uintptr_t));
 981                 *scat = (struct mlx5_wqe_data_seg){
 982                         .addr = rte_cpu_to_be_64(addr),
 983                         .byte_count = rte_cpu_to_be_32(byte_count),
 984                         .lkey = mlx5_rx_addr2mr(rxq_data, addr),
 985                 };
 986         }
 987         rxq_data->rq_db = rwq.dbrec;
 988         rxq_data->cqe_n = log2above(cq_info.cqe_cnt);
 989         rxq_data->cq_ci = 0;
 990         rxq_data->consumed_strd = 0;
 991         rxq_data->rq_pi = 0;
 992         rxq_data->zip = (struct rxq_zip){
 993                 .ai = 0,
 994         };
 995         rxq_data->cq_db = cq_info.dbrec;
 996         rxq_data->cqes = (volatile struct mlx5_cqe (*)[])(uintptr_t)cq_info.buf;
 997         rxq_data->cq_uar = cq_info.cq_uar;
 998         rxq_data->cqn = cq_info.cqn;
 999         rxq_data->cq_arm_sn = 0;
1000         /* Update doorbell counter. */
1001         rxq_data->rq_ci = wqe_n >> rxq_data->sges_n;
1002         rte_wmb();
1003         *rxq_data->rq_db = rte_cpu_to_be_32(rxq_data->rq_ci);
1004         DRV_LOG(DEBUG, "port %u rxq %u updated with %p", dev->data->port_id,
1005                 idx, (void *)&tmpl);
1006         rte_atomic32_inc(&tmpl->refcnt);
1007         LIST_INSERT_HEAD(&priv->rxqsibv, tmpl, next);
1008         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
1009         return tmpl;
1010 error:
1011         ret = rte_errno; /* Save rte_errno before cleanup. */
1012         if (tmpl->wq)
1013                 claim_zero(mlx5_glue->destroy_wq(tmpl->wq));
1014         if (tmpl->cq)
1015                 claim_zero(mlx5_glue->destroy_cq(tmpl->cq));
1016         if (tmpl->channel)
1017                 claim_zero(mlx5_glue->destroy_comp_channel(tmpl->channel));
1018         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
1019         rte_errno = ret; /* Restore rte_errno. */
1020         return NULL;
1021 }
1022
1023 /**
1024  * Get an Rx queue Verbs object.
1025  *
1026  * @param dev
1027  *   Pointer to Ethernet device.
1028  * @param idx
1029  *   Queue index in DPDK Rx queue array
1030  *
1031  * @return
1032  *   The Verbs object if it exists.
1033  */
1034 struct mlx5_rxq_ibv *
1035 mlx5_rxq_ibv_get(struct rte_eth_dev *dev, uint16_t idx)
1036 {
1037         struct priv *priv = dev->data->dev_private;
1038         struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
1039         struct mlx5_rxq_ctrl *rxq_ctrl;
1040
1041         if (idx >= priv->rxqs_n)
1042                 return NULL;
1043         if (!rxq_data)
1044                 return NULL;
1045         rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
1046         if (rxq_ctrl->ibv) {
1047                 rte_atomic32_inc(&rxq_ctrl->ibv->refcnt);
1048         }
1049         return rxq_ctrl->ibv;
1050 }
1051
1052 /**
1053  * Release an Rx verbs queue object.
1054  *
1055  * @param rxq_ibv
1056  *   Verbs Rx queue object.
1057  *
1058  * @return
1059  *   1 while a reference on it exists, 0 when freed.
1060  */
1061 int
1062 mlx5_rxq_ibv_release(struct mlx5_rxq_ibv *rxq_ibv)
1063 {
1064         assert(rxq_ibv);
1065         assert(rxq_ibv->wq);
1066         assert(rxq_ibv->cq);
1067         if (rte_atomic32_dec_and_test(&rxq_ibv->refcnt)) {
1068                 rxq_free_elts(rxq_ibv->rxq_ctrl);
1069                 claim_zero(mlx5_glue->destroy_wq(rxq_ibv->wq));
1070                 claim_zero(mlx5_glue->destroy_cq(rxq_ibv->cq));
1071                 if (rxq_ibv->channel)
1072                         claim_zero(mlx5_glue->destroy_comp_channel
1073                                    (rxq_ibv->channel));
1074                 LIST_REMOVE(rxq_ibv, next);
1075                 rte_free(rxq_ibv);
1076                 return 0;
1077         }
1078         return 1;
1079 }
1080
1081 /**
1082  * Verify the Verbs Rx queue list is empty
1083  *
1084  * @param dev
1085  *   Pointer to Ethernet device.
1086  *
1087  * @return
1088  *   The number of object not released.
1089  */
1090 int
1091 mlx5_rxq_ibv_verify(struct rte_eth_dev *dev)
1092 {
1093         struct priv *priv = dev->data->dev_private;
1094         int ret = 0;
1095         struct mlx5_rxq_ibv *rxq_ibv;
1096
1097         LIST_FOREACH(rxq_ibv, &priv->rxqsibv, next) {
1098                 DRV_LOG(DEBUG, "port %u Verbs Rx queue %u still referenced",
1099                         dev->data->port_id, rxq_ibv->rxq_ctrl->idx);
1100                 ++ret;
1101         }
1102         return ret;
1103 }
1104
1105 /**
1106  * Return true if a single reference exists on the object.
1107  *
1108  * @param rxq_ibv
1109  *   Verbs Rx queue object.
1110  */
1111 int
1112 mlx5_rxq_ibv_releasable(struct mlx5_rxq_ibv *rxq_ibv)
1113 {
1114         assert(rxq_ibv);
1115         return (rte_atomic32_read(&rxq_ibv->refcnt) == 1);
1116 }
1117
1118 /**
1119  * Callback function to initialize mbufs for Multi-Packet RQ.
1120  */
1121 static inline void
1122 mlx5_mprq_buf_init(struct rte_mempool *mp, void *opaque_arg __rte_unused,
1123                     void *_m, unsigned int i __rte_unused)
1124 {
1125         struct mlx5_mprq_buf *buf = _m;
1126
1127         memset(_m, 0, sizeof(*buf));
1128         buf->mp = mp;
1129         rte_atomic16_set(&buf->refcnt, 1);
1130 }
1131
1132 /**
1133  * Free mempool of Multi-Packet RQ.
1134  *
1135  * @param dev
1136  *   Pointer to Ethernet device.
1137  *
1138  * @return
1139  *   0 on success, negative errno value on failure.
1140  */
1141 int
1142 mlx5_mprq_free_mp(struct rte_eth_dev *dev)
1143 {
1144         struct priv *priv = dev->data->dev_private;
1145         struct rte_mempool *mp = priv->mprq_mp;
1146         unsigned int i;
1147
1148         if (mp == NULL)
1149                 return 0;
1150         DRV_LOG(DEBUG, "port %u freeing mempool (%s) for Multi-Packet RQ",
1151                 dev->data->port_id, mp->name);
1152         /*
1153          * If a buffer in the pool has been externally attached to a mbuf and it
1154          * is still in use by application, destroying the Rx qeueue can spoil
1155          * the packet. It is unlikely to happen but if application dynamically
1156          * creates and destroys with holding Rx packets, this can happen.
1157          *
1158          * TODO: It is unavoidable for now because the mempool for Multi-Packet
1159          * RQ isn't provided by application but managed by PMD.
1160          */
1161         if (!rte_mempool_full(mp)) {
1162                 DRV_LOG(ERR,
1163                         "port %u mempool for Multi-Packet RQ is still in use",
1164                         dev->data->port_id);
1165                 rte_errno = EBUSY;
1166                 return -rte_errno;
1167         }
1168         rte_mempool_free(mp);
1169         /* Unset mempool for each Rx queue. */
1170         for (i = 0; i != priv->rxqs_n; ++i) {
1171                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1172
1173                 if (rxq == NULL)
1174                         continue;
1175                 rxq->mprq_mp = NULL;
1176         }
1177         return 0;
1178 }
1179
1180 /**
1181  * Allocate a mempool for Multi-Packet RQ. All configured Rx queues share the
1182  * mempool. If already allocated, reuse it if there're enough elements.
1183  * Otherwise, resize it.
1184  *
1185  * @param dev
1186  *   Pointer to Ethernet device.
1187  *
1188  * @return
1189  *   0 on success, negative errno value on failure.
1190  */
1191 int
1192 mlx5_mprq_alloc_mp(struct rte_eth_dev *dev)
1193 {
1194         struct priv *priv = dev->data->dev_private;
1195         struct rte_mempool *mp = priv->mprq_mp;
1196         char name[RTE_MEMPOOL_NAMESIZE];
1197         unsigned int desc = 0;
1198         unsigned int buf_len;
1199         unsigned int obj_num;
1200         unsigned int obj_size;
1201         unsigned int strd_num_n = 0;
1202         unsigned int strd_sz_n = 0;
1203         unsigned int i;
1204
1205         if (!mlx5_mprq_enabled(dev))
1206                 return 0;
1207         /* Count the total number of descriptors configured. */
1208         for (i = 0; i != priv->rxqs_n; ++i) {
1209                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1210
1211                 if (rxq == NULL)
1212                         continue;
1213                 desc += 1 << rxq->elts_n;
1214                 /* Get the max number of strides. */
1215                 if (strd_num_n < rxq->strd_num_n)
1216                         strd_num_n = rxq->strd_num_n;
1217                 /* Get the max size of a stride. */
1218                 if (strd_sz_n < rxq->strd_sz_n)
1219                         strd_sz_n = rxq->strd_sz_n;
1220         }
1221         assert(strd_num_n && strd_sz_n);
1222         buf_len = (1 << strd_num_n) * (1 << strd_sz_n);
1223         obj_size = buf_len + sizeof(struct mlx5_mprq_buf);
1224         /*
1225          * Received packets can be either memcpy'd or externally referenced. In
1226          * case that the packet is attached to an mbuf as an external buffer, as
1227          * it isn't possible to predict how the buffers will be queued by
1228          * application, there's no option to exactly pre-allocate needed buffers
1229          * in advance but to speculatively prepares enough buffers.
1230          *
1231          * In the data path, if this Mempool is depleted, PMD will try to memcpy
1232          * received packets to buffers provided by application (rxq->mp) until
1233          * this Mempool gets available again.
1234          */
1235         desc *= 4;
1236         obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * priv->rxqs_n;
1237         /* Check a mempool is already allocated and if it can be resued. */
1238         if (mp != NULL && mp->elt_size >= obj_size && mp->size >= obj_num) {
1239                 DRV_LOG(DEBUG, "port %u mempool %s is being reused",
1240                         dev->data->port_id, mp->name);
1241                 /* Reuse. */
1242                 goto exit;
1243         } else if (mp != NULL) {
1244                 DRV_LOG(DEBUG, "port %u mempool %s should be resized, freeing it",
1245                         dev->data->port_id, mp->name);
1246                 /*
1247                  * If failed to free, which means it may be still in use, no way
1248                  * but to keep using the existing one. On buffer underrun,
1249                  * packets will be memcpy'd instead of external buffer
1250                  * attachment.
1251                  */
1252                 if (mlx5_mprq_free_mp(dev)) {
1253                         if (mp->elt_size >= obj_size)
1254                                 goto exit;
1255                         else
1256                                 return -rte_errno;
1257                 }
1258         }
1259         snprintf(name, sizeof(name), "%s-mprq", dev->device->name);
1260         mp = rte_mempool_create(name, obj_num, obj_size, MLX5_MPRQ_MP_CACHE_SZ,
1261                                 0, NULL, NULL, mlx5_mprq_buf_init, NULL,
1262                                 dev->device->numa_node, 0);
1263         if (mp == NULL) {
1264                 DRV_LOG(ERR,
1265                         "port %u failed to allocate a mempool for"
1266                         " Multi-Packet RQ, count=%u, size=%u",
1267                         dev->data->port_id, obj_num, obj_size);
1268                 rte_errno = ENOMEM;
1269                 return -rte_errno;
1270         }
1271         priv->mprq_mp = mp;
1272 exit:
1273         /* Set mempool for each Rx queue. */
1274         for (i = 0; i != priv->rxqs_n; ++i) {
1275                 struct mlx5_rxq_data *rxq = (*priv->rxqs)[i];
1276
1277                 if (rxq == NULL)
1278                         continue;
1279                 rxq->mprq_mp = mp;
1280         }
1281         DRV_LOG(INFO, "port %u Multi-Packet RQ is configured",
1282                 dev->data->port_id);
1283         return 0;
1284 }
1285
1286 /**
1287  * Create a DPDK Rx queue.
1288  *
1289  * @param dev
1290  *   Pointer to Ethernet device.
1291  * @param idx
1292  *   RX queue index.
1293  * @param desc
1294  *   Number of descriptors to configure in queue.
1295  * @param socket
1296  *   NUMA socket on which memory must be allocated.
1297  *
1298  * @return
1299  *   A DPDK queue object on success, NULL otherwise and rte_errno is set.
1300  */
1301 struct mlx5_rxq_ctrl *
1302 mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1303              unsigned int socket, const struct rte_eth_rxconf *conf,
1304              struct rte_mempool *mp)
1305 {
1306         struct priv *priv = dev->data->dev_private;
1307         struct mlx5_rxq_ctrl *tmpl;
1308         unsigned int mb_len = rte_pktmbuf_data_room_size(mp);
1309         unsigned int mprq_stride_size;
1310         struct mlx5_dev_config *config = &priv->config;
1311         /*
1312          * Always allocate extra slots, even if eventually
1313          * the vector Rx will not be used.
1314          */
1315         uint16_t desc_n =
1316                 desc + config->rx_vec_en * MLX5_VPMD_DESCS_PER_LOOP;
1317         uint64_t offloads = conf->offloads |
1318                            dev->data->dev_conf.rxmode.offloads;
1319         const int mprq_en = mlx5_check_mprq_support(dev) > 0;
1320
1321         tmpl = rte_calloc_socket("RXQ", 1,
1322                                  sizeof(*tmpl) +
1323                                  desc_n * sizeof(struct rte_mbuf *),
1324                                  0, socket);
1325         if (!tmpl) {
1326                 rte_errno = ENOMEM;
1327                 return NULL;
1328         }
1329         if (mlx5_mr_btree_init(&tmpl->rxq.mr_ctrl.cache_bh,
1330                                MLX5_MR_BTREE_CACHE_N, socket)) {
1331                 /* rte_errno is already set. */
1332                 goto error;
1333         }
1334         tmpl->socket = socket;
1335         if (dev->data->dev_conf.intr_conf.rxq)
1336                 tmpl->irq = 1;
1337         /*
1338          * This Rx queue can be configured as a Multi-Packet RQ if all of the
1339          * following conditions are met:
1340          *  - MPRQ is enabled.
1341          *  - The number of descs is more than the number of strides.
1342          *  - max_rx_pkt_len plus overhead is less than the max size of a
1343          *    stride.
1344          *  Otherwise, enable Rx scatter if necessary.
1345          */
1346         assert(mb_len >= RTE_PKTMBUF_HEADROOM);
1347         mprq_stride_size =
1348                 dev->data->dev_conf.rxmode.max_rx_pkt_len +
1349                 sizeof(struct rte_mbuf_ext_shared_info) +
1350                 RTE_PKTMBUF_HEADROOM;
1351         if (mprq_en &&
1352             desc >= (1U << config->mprq.stride_num_n) &&
1353             mprq_stride_size <= (1U << config->mprq.max_stride_size_n)) {
1354                 /* TODO: Rx scatter isn't supported yet. */
1355                 tmpl->rxq.sges_n = 0;
1356                 /* Trim the number of descs needed. */
1357                 desc >>= config->mprq.stride_num_n;
1358                 tmpl->rxq.strd_num_n = config->mprq.stride_num_n;
1359                 tmpl->rxq.strd_sz_n = RTE_MAX(log2above(mprq_stride_size),
1360                                               config->mprq.min_stride_size_n);
1361                 tmpl->rxq.strd_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT;
1362                 tmpl->rxq.mprq_max_memcpy_len =
1363                         RTE_MIN(mb_len - RTE_PKTMBUF_HEADROOM,
1364                                 config->mprq.max_memcpy_len);
1365                 DRV_LOG(DEBUG,
1366                         "port %u Rx queue %u: Multi-Packet RQ is enabled"
1367                         " strd_num_n = %u, strd_sz_n = %u",
1368                         dev->data->port_id, idx,
1369                         tmpl->rxq.strd_num_n, tmpl->rxq.strd_sz_n);
1370         } else if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
1371                    (mb_len - RTE_PKTMBUF_HEADROOM)) {
1372                 tmpl->rxq.sges_n = 0;
1373         } else if (offloads & DEV_RX_OFFLOAD_SCATTER) {
1374                 unsigned int size =
1375                         RTE_PKTMBUF_HEADROOM +
1376                         dev->data->dev_conf.rxmode.max_rx_pkt_len;
1377                 unsigned int sges_n;
1378
1379                 /*
1380                  * Determine the number of SGEs needed for a full packet
1381                  * and round it to the next power of two.
1382                  */
1383                 sges_n = log2above((size / mb_len) + !!(size % mb_len));
1384                 tmpl->rxq.sges_n = sges_n;
1385                 /* Make sure rxq.sges_n did not overflow. */
1386                 size = mb_len * (1 << tmpl->rxq.sges_n);
1387                 size -= RTE_PKTMBUF_HEADROOM;
1388                 if (size < dev->data->dev_conf.rxmode.max_rx_pkt_len) {
1389                         DRV_LOG(ERR,
1390                                 "port %u too many SGEs (%u) needed to handle"
1391                                 " requested maximum packet size %u",
1392                                 dev->data->port_id,
1393                                 1 << sges_n,
1394                                 dev->data->dev_conf.rxmode.max_rx_pkt_len);
1395                         rte_errno = EOVERFLOW;
1396                         goto error;
1397                 }
1398         } else {
1399                 DRV_LOG(WARNING,
1400                         "port %u the requested maximum Rx packet size (%u) is"
1401                         " larger than a single mbuf (%u) and scattered mode has"
1402                         " not been requested",
1403                         dev->data->port_id,
1404                         dev->data->dev_conf.rxmode.max_rx_pkt_len,
1405                         mb_len - RTE_PKTMBUF_HEADROOM);
1406         }
1407         DRV_LOG(DEBUG, "port %u maximum number of segments per packet: %u",
1408                 dev->data->port_id, 1 << tmpl->rxq.sges_n);
1409         if (desc % (1 << tmpl->rxq.sges_n)) {
1410                 DRV_LOG(ERR,
1411                         "port %u number of Rx queue descriptors (%u) is not a"
1412                         " multiple of SGEs per packet (%u)",
1413                         dev->data->port_id,
1414                         desc,
1415                         1 << tmpl->rxq.sges_n);
1416                 rte_errno = EINVAL;
1417                 goto error;
1418         }
1419         /* Toggle RX checksum offload if hardware supports it. */
1420         tmpl->rxq.csum = !!(offloads & DEV_RX_OFFLOAD_CHECKSUM);
1421         tmpl->rxq.hw_timestamp = !!(offloads & DEV_RX_OFFLOAD_TIMESTAMP);
1422         /* Configure VLAN stripping. */
1423         tmpl->rxq.vlan_strip = !!(offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
1424         /* By default, FCS (CRC) is stripped by hardware. */
1425         tmpl->rxq.crc_present = 0;
1426         if (rte_eth_dev_must_keep_crc(offloads)) {
1427                 if (config->hw_fcs_strip) {
1428                         tmpl->rxq.crc_present = 1;
1429                 } else {
1430                         DRV_LOG(WARNING,
1431                                 "port %u CRC stripping has been disabled but will"
1432                                 " still be performed by hardware, make sure MLNX_OFED"
1433                                 " and firmware are up to date",
1434                                 dev->data->port_id);
1435                 }
1436         }
1437         DRV_LOG(DEBUG,
1438                 "port %u CRC stripping is %s, %u bytes will be subtracted from"
1439                 " incoming frames to hide it",
1440                 dev->data->port_id,
1441                 tmpl->rxq.crc_present ? "disabled" : "enabled",
1442                 tmpl->rxq.crc_present << 2);
1443         /* Save port ID. */
1444         tmpl->rxq.rss_hash = !!priv->rss_conf.rss_hf &&
1445                 (!!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS));
1446         tmpl->rxq.port_id = dev->data->port_id;
1447         tmpl->priv = priv;
1448         tmpl->rxq.mp = mp;
1449         tmpl->rxq.stats.idx = idx;
1450         tmpl->rxq.elts_n = log2above(desc);
1451         tmpl->rxq.elts =
1452                 (struct rte_mbuf *(*)[1 << tmpl->rxq.elts_n])(tmpl + 1);
1453 #ifndef RTE_ARCH_64
1454         tmpl->rxq.uar_lock_cq = &priv->uar_lock_cq;
1455 #endif
1456         tmpl->idx = idx;
1457         rte_atomic32_inc(&tmpl->refcnt);
1458         LIST_INSERT_HEAD(&priv->rxqsctrl, tmpl, next);
1459         return tmpl;
1460 error:
1461         rte_free(tmpl);
1462         return NULL;
1463 }
1464
1465 /**
1466  * Get a Rx queue.
1467  *
1468  * @param dev
1469  *   Pointer to Ethernet device.
1470  * @param idx
1471  *   TX queue index.
1472  *
1473  * @return
1474  *   A pointer to the queue if it exists, NULL otherwise.
1475  */
1476 struct mlx5_rxq_ctrl *
1477 mlx5_rxq_get(struct rte_eth_dev *dev, uint16_t idx)
1478 {
1479         struct priv *priv = dev->data->dev_private;
1480         struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
1481
1482         if ((*priv->rxqs)[idx]) {
1483                 rxq_ctrl = container_of((*priv->rxqs)[idx],
1484                                         struct mlx5_rxq_ctrl,
1485                                         rxq);
1486                 mlx5_rxq_ibv_get(dev, idx);
1487                 rte_atomic32_inc(&rxq_ctrl->refcnt);
1488         }
1489         return rxq_ctrl;
1490 }
1491
1492 /**
1493  * Release a Rx queue.
1494  *
1495  * @param dev
1496  *   Pointer to Ethernet device.
1497  * @param idx
1498  *   TX queue index.
1499  *
1500  * @return
1501  *   1 while a reference on it exists, 0 when freed.
1502  */
1503 int
1504 mlx5_rxq_release(struct rte_eth_dev *dev, uint16_t idx)
1505 {
1506         struct priv *priv = dev->data->dev_private;
1507         struct mlx5_rxq_ctrl *rxq_ctrl;
1508
1509         if (!(*priv->rxqs)[idx])
1510                 return 0;
1511         rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1512         assert(rxq_ctrl->priv);
1513         if (rxq_ctrl->ibv && !mlx5_rxq_ibv_release(rxq_ctrl->ibv))
1514                 rxq_ctrl->ibv = NULL;
1515         if (rte_atomic32_dec_and_test(&rxq_ctrl->refcnt)) {
1516                 mlx5_mr_btree_free(&rxq_ctrl->rxq.mr_ctrl.cache_bh);
1517                 LIST_REMOVE(rxq_ctrl, next);
1518                 rte_free(rxq_ctrl);
1519                 (*priv->rxqs)[idx] = NULL;
1520                 return 0;
1521         }
1522         return 1;
1523 }
1524
1525 /**
1526  * Verify if the queue can be released.
1527  *
1528  * @param dev
1529  *   Pointer to Ethernet device.
1530  * @param idx
1531  *   TX queue index.
1532  *
1533  * @return
1534  *   1 if the queue can be released, negative errno otherwise and rte_errno is
1535  *   set.
1536  */
1537 int
1538 mlx5_rxq_releasable(struct rte_eth_dev *dev, uint16_t idx)
1539 {
1540         struct priv *priv = dev->data->dev_private;
1541         struct mlx5_rxq_ctrl *rxq_ctrl;
1542
1543         if (!(*priv->rxqs)[idx]) {
1544                 rte_errno = EINVAL;
1545                 return -rte_errno;
1546         }
1547         rxq_ctrl = container_of((*priv->rxqs)[idx], struct mlx5_rxq_ctrl, rxq);
1548         return (rte_atomic32_read(&rxq_ctrl->refcnt) == 1);
1549 }
1550
1551 /**
1552  * Verify the Rx Queue list is empty
1553  *
1554  * @param dev
1555  *   Pointer to Ethernet device.
1556  *
1557  * @return
1558  *   The number of object not released.
1559  */
1560 int
1561 mlx5_rxq_verify(struct rte_eth_dev *dev)
1562 {
1563         struct priv *priv = dev->data->dev_private;
1564         struct mlx5_rxq_ctrl *rxq_ctrl;
1565         int ret = 0;
1566
1567         LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1568                 DRV_LOG(DEBUG, "port %u Rx Queue %u still referenced",
1569                         dev->data->port_id, rxq_ctrl->idx);
1570                 ++ret;
1571         }
1572         return ret;
1573 }
1574
1575 /**
1576  * Create an indirection table.
1577  *
1578  * @param dev
1579  *   Pointer to Ethernet device.
1580  * @param queues
1581  *   Queues entering in the indirection table.
1582  * @param queues_n
1583  *   Number of queues in the array.
1584  *
1585  * @return
1586  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
1587  */
1588 struct mlx5_ind_table_ibv *
1589 mlx5_ind_table_ibv_new(struct rte_eth_dev *dev, const uint16_t *queues,
1590                        uint32_t queues_n)
1591 {
1592         struct priv *priv = dev->data->dev_private;
1593         struct mlx5_ind_table_ibv *ind_tbl;
1594         const unsigned int wq_n = rte_is_power_of_2(queues_n) ?
1595                 log2above(queues_n) :
1596                 log2above(priv->config.ind_table_max_size);
1597         struct ibv_wq *wq[1 << wq_n];
1598         unsigned int i;
1599         unsigned int j;
1600
1601         ind_tbl = rte_calloc(__func__, 1, sizeof(*ind_tbl) +
1602                              queues_n * sizeof(uint16_t), 0);
1603         if (!ind_tbl) {
1604                 rte_errno = ENOMEM;
1605                 return NULL;
1606         }
1607         for (i = 0; i != queues_n; ++i) {
1608                 struct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);
1609
1610                 if (!rxq)
1611                         goto error;
1612                 wq[i] = rxq->ibv->wq;
1613                 ind_tbl->queues[i] = queues[i];
1614         }
1615         ind_tbl->queues_n = queues_n;
1616         /* Finalise indirection table. */
1617         for (j = 0; i != (unsigned int)(1 << wq_n); ++i, ++j)
1618                 wq[i] = wq[j];
1619         ind_tbl->ind_table = mlx5_glue->create_rwq_ind_table
1620                 (priv->ctx,
1621                  &(struct ibv_rwq_ind_table_init_attr){
1622                         .log_ind_tbl_size = wq_n,
1623                         .ind_tbl = wq,
1624                         .comp_mask = 0,
1625                  });
1626         if (!ind_tbl->ind_table) {
1627                 rte_errno = errno;
1628                 goto error;
1629         }
1630         rte_atomic32_inc(&ind_tbl->refcnt);
1631         LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
1632         return ind_tbl;
1633 error:
1634         rte_free(ind_tbl);
1635         DEBUG("port %u cannot create indirection table", dev->data->port_id);
1636         return NULL;
1637 }
1638
1639 /**
1640  * Get an indirection table.
1641  *
1642  * @param dev
1643  *   Pointer to Ethernet device.
1644  * @param queues
1645  *   Queues entering in the indirection table.
1646  * @param queues_n
1647  *   Number of queues in the array.
1648  *
1649  * @return
1650  *   An indirection table if found.
1651  */
1652 struct mlx5_ind_table_ibv *
1653 mlx5_ind_table_ibv_get(struct rte_eth_dev *dev, const uint16_t *queues,
1654                        uint32_t queues_n)
1655 {
1656         struct priv *priv = dev->data->dev_private;
1657         struct mlx5_ind_table_ibv *ind_tbl;
1658
1659         LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1660                 if ((ind_tbl->queues_n == queues_n) &&
1661                     (memcmp(ind_tbl->queues, queues,
1662                             ind_tbl->queues_n * sizeof(ind_tbl->queues[0]))
1663                      == 0))
1664                         break;
1665         }
1666         if (ind_tbl) {
1667                 unsigned int i;
1668
1669                 rte_atomic32_inc(&ind_tbl->refcnt);
1670                 for (i = 0; i != ind_tbl->queues_n; ++i)
1671                         mlx5_rxq_get(dev, ind_tbl->queues[i]);
1672         }
1673         return ind_tbl;
1674 }
1675
1676 /**
1677  * Release an indirection table.
1678  *
1679  * @param dev
1680  *   Pointer to Ethernet device.
1681  * @param ind_table
1682  *   Indirection table to release.
1683  *
1684  * @return
1685  *   1 while a reference on it exists, 0 when freed.
1686  */
1687 int
1688 mlx5_ind_table_ibv_release(struct rte_eth_dev *dev,
1689                            struct mlx5_ind_table_ibv *ind_tbl)
1690 {
1691         unsigned int i;
1692
1693         if (rte_atomic32_dec_and_test(&ind_tbl->refcnt))
1694                 claim_zero(mlx5_glue->destroy_rwq_ind_table
1695                            (ind_tbl->ind_table));
1696         for (i = 0; i != ind_tbl->queues_n; ++i)
1697                 claim_nonzero(mlx5_rxq_release(dev, ind_tbl->queues[i]));
1698         if (!rte_atomic32_read(&ind_tbl->refcnt)) {
1699                 LIST_REMOVE(ind_tbl, next);
1700                 rte_free(ind_tbl);
1701                 return 0;
1702         }
1703         return 1;
1704 }
1705
1706 /**
1707  * Verify the Rx Queue list is empty
1708  *
1709  * @param dev
1710  *   Pointer to Ethernet device.
1711  *
1712  * @return
1713  *   The number of object not released.
1714  */
1715 int
1716 mlx5_ind_table_ibv_verify(struct rte_eth_dev *dev)
1717 {
1718         struct priv *priv = dev->data->dev_private;
1719         struct mlx5_ind_table_ibv *ind_tbl;
1720         int ret = 0;
1721
1722         LIST_FOREACH(ind_tbl, &priv->ind_tbls, next) {
1723                 DRV_LOG(DEBUG,
1724                         "port %u Verbs indirection table %p still referenced",
1725                         dev->data->port_id, (void *)ind_tbl);
1726                 ++ret;
1727         }
1728         return ret;
1729 }
1730
1731 /**
1732  * Create an Rx Hash queue.
1733  *
1734  * @param dev
1735  *   Pointer to Ethernet device.
1736  * @param rss_key
1737  *   RSS key for the Rx hash queue.
1738  * @param rss_key_len
1739  *   RSS key length.
1740  * @param hash_fields
1741  *   Verbs protocol hash field to make the RSS on.
1742  * @param queues
1743  *   Queues entering in hash queue. In case of empty hash_fields only the
1744  *   first queue index will be taken for the indirection table.
1745  * @param queues_n
1746  *   Number of queues.
1747  *
1748  * @return
1749  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
1750  */
1751 struct mlx5_hrxq *
1752 mlx5_hrxq_new(struct rte_eth_dev *dev,
1753               const uint8_t *rss_key, uint32_t rss_key_len,
1754               uint64_t hash_fields,
1755               const uint16_t *queues, uint32_t queues_n)
1756 {
1757         struct priv *priv = dev->data->dev_private;
1758         struct mlx5_hrxq *hrxq;
1759         struct mlx5_ind_table_ibv *ind_tbl;
1760         struct ibv_qp *qp;
1761         int err;
1762
1763         queues_n = hash_fields ? queues_n : 1;
1764         ind_tbl = mlx5_ind_table_ibv_get(dev, queues, queues_n);
1765         if (!ind_tbl)
1766                 ind_tbl = mlx5_ind_table_ibv_new(dev, queues, queues_n);
1767         if (!ind_tbl) {
1768                 rte_errno = ENOMEM;
1769                 return NULL;
1770         }
1771         if (!rss_key_len) {
1772                 rss_key_len = MLX5_RSS_HASH_KEY_LEN;
1773                 rss_key = rss_hash_default_key;
1774         }
1775 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1776         qp = mlx5_glue->dv_create_qp
1777                 (priv->ctx,
1778                  &(struct ibv_qp_init_attr_ex){
1779                         .qp_type = IBV_QPT_RAW_PACKET,
1780                         .comp_mask =
1781                                 IBV_QP_INIT_ATTR_PD |
1782                                 IBV_QP_INIT_ATTR_IND_TABLE |
1783                                 IBV_QP_INIT_ATTR_RX_HASH,
1784                         .rx_hash_conf = (struct ibv_rx_hash_conf){
1785                                 .rx_hash_function = IBV_RX_HASH_FUNC_TOEPLITZ,
1786                                 .rx_hash_key_len = rss_key_len ? rss_key_len :
1787                                                    MLX5_RSS_HASH_KEY_LEN,
1788                                 .rx_hash_key = rss_key ?
1789                                                (void *)(uintptr_t)rss_key :
1790                                                rss_hash_default_key,
1791                                 .rx_hash_fields_mask = hash_fields,
1792                         },
1793                         .rwq_ind_tbl = ind_tbl->ind_table,
1794                         .pd = priv->pd,
1795                  },
1796                  &(struct mlx5dv_qp_init_attr){
1797                         .comp_mask = (hash_fields & IBV_RX_HASH_INNER) ?
1798                                  MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS :
1799                                  0,
1800                         .create_flags = MLX5DV_QP_CREATE_TUNNEL_OFFLOADS,
1801                  });
1802 #else
1803         qp = mlx5_glue->create_qp_ex
1804                 (priv->ctx,
1805                  &(struct ibv_qp_init_attr_ex){
1806                         .qp_type = IBV_QPT_RAW_PACKET,
1807                         .comp_mask =
1808                                 IBV_QP_INIT_ATTR_PD |
1809                                 IBV_QP_INIT_ATTR_IND_TABLE |
1810                                 IBV_QP_INIT_ATTR_RX_HASH,
1811                         .rx_hash_conf = (struct ibv_rx_hash_conf){
1812                                 .rx_hash_function = IBV_RX_HASH_FUNC_TOEPLITZ,
1813                                 .rx_hash_key_len = rss_key_len ? rss_key_len :
1814                                                    MLX5_RSS_HASH_KEY_LEN,
1815                                 .rx_hash_key = rss_key ?
1816                                                (void *)(uintptr_t)rss_key :
1817                                                rss_hash_default_key,
1818                                 .rx_hash_fields_mask = hash_fields,
1819                         },
1820                         .rwq_ind_tbl = ind_tbl->ind_table,
1821                         .pd = priv->pd,
1822                  });
1823 #endif
1824         if (!qp) {
1825                 rte_errno = errno;
1826                 goto error;
1827         }
1828         hrxq = rte_calloc(__func__, 1, sizeof(*hrxq) + rss_key_len, 0);
1829         if (!hrxq)
1830                 goto error;
1831         hrxq->ind_table = ind_tbl;
1832         hrxq->qp = qp;
1833         hrxq->rss_key_len = rss_key_len;
1834         hrxq->hash_fields = hash_fields;
1835         memcpy(hrxq->rss_key, rss_key, rss_key_len);
1836         rte_atomic32_inc(&hrxq->refcnt);
1837         LIST_INSERT_HEAD(&priv->hrxqs, hrxq, next);
1838         return hrxq;
1839 error:
1840         err = rte_errno; /* Save rte_errno before cleanup. */
1841         mlx5_ind_table_ibv_release(dev, ind_tbl);
1842         if (qp)
1843                 claim_zero(mlx5_glue->destroy_qp(qp));
1844         rte_errno = err; /* Restore rte_errno. */
1845         return NULL;
1846 }
1847
1848 /**
1849  * Get an Rx Hash queue.
1850  *
1851  * @param dev
1852  *   Pointer to Ethernet device.
1853  * @param rss_conf
1854  *   RSS configuration for the Rx hash queue.
1855  * @param queues
1856  *   Queues entering in hash queue. In case of empty hash_fields only the
1857  *   first queue index will be taken for the indirection table.
1858  * @param queues_n
1859  *   Number of queues.
1860  *
1861  * @return
1862  *   An hash Rx queue on success.
1863  */
1864 struct mlx5_hrxq *
1865 mlx5_hrxq_get(struct rte_eth_dev *dev,
1866               const uint8_t *rss_key, uint32_t rss_key_len,
1867               uint64_t hash_fields,
1868               const uint16_t *queues, uint32_t queues_n)
1869 {
1870         struct priv *priv = dev->data->dev_private;
1871         struct mlx5_hrxq *hrxq;
1872
1873         queues_n = hash_fields ? queues_n : 1;
1874         LIST_FOREACH(hrxq, &priv->hrxqs, next) {
1875                 struct mlx5_ind_table_ibv *ind_tbl;
1876
1877                 if (hrxq->rss_key_len != rss_key_len)
1878                         continue;
1879                 if (memcmp(hrxq->rss_key, rss_key, rss_key_len))
1880                         continue;
1881                 if (hrxq->hash_fields != hash_fields)
1882                         continue;
1883                 ind_tbl = mlx5_ind_table_ibv_get(dev, queues, queues_n);
1884                 if (!ind_tbl)
1885                         continue;
1886                 if (ind_tbl != hrxq->ind_table) {
1887                         mlx5_ind_table_ibv_release(dev, ind_tbl);
1888                         continue;
1889                 }
1890                 rte_atomic32_inc(&hrxq->refcnt);
1891                 return hrxq;
1892         }
1893         return NULL;
1894 }
1895
1896 /**
1897  * Release the hash Rx queue.
1898  *
1899  * @param dev
1900  *   Pointer to Ethernet device.
1901  * @param hrxq
1902  *   Pointer to Hash Rx queue to release.
1903  *
1904  * @return
1905  *   1 while a reference on it exists, 0 when freed.
1906  */
1907 int
1908 mlx5_hrxq_release(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)
1909 {
1910         if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
1911                 claim_zero(mlx5_glue->destroy_qp(hrxq->qp));
1912                 mlx5_ind_table_ibv_release(dev, hrxq->ind_table);
1913                 LIST_REMOVE(hrxq, next);
1914                 rte_free(hrxq);
1915                 return 0;
1916         }
1917         claim_nonzero(mlx5_ind_table_ibv_release(dev, hrxq->ind_table));
1918         return 1;
1919 }
1920
1921 /**
1922  * Verify the Rx Queue list is empty
1923  *
1924  * @param dev
1925  *   Pointer to Ethernet device.
1926  *
1927  * @return
1928  *   The number of object not released.
1929  */
1930 int
1931 mlx5_hrxq_ibv_verify(struct rte_eth_dev *dev)
1932 {
1933         struct priv *priv = dev->data->dev_private;
1934         struct mlx5_hrxq *hrxq;
1935         int ret = 0;
1936
1937         LIST_FOREACH(hrxq, &priv->hrxqs, next) {
1938                 DRV_LOG(DEBUG,
1939                         "port %u Verbs hash Rx queue %p still referenced",
1940                         dev->data->port_id, (void *)hrxq);
1941                 ++ret;
1942         }
1943         return ret;
1944 }
1945
1946 /**
1947  * Create a drop Rx queue Verbs object.
1948  *
1949  * @param dev
1950  *   Pointer to Ethernet device.
1951  *
1952  * @return
1953  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
1954  */
1955 struct mlx5_rxq_ibv *
1956 mlx5_rxq_ibv_drop_new(struct rte_eth_dev *dev)
1957 {
1958         struct priv *priv = dev->data->dev_private;
1959         struct ibv_cq *cq;
1960         struct ibv_wq *wq = NULL;
1961         struct mlx5_rxq_ibv *rxq;
1962
1963         if (priv->drop_queue.rxq)
1964                 return priv->drop_queue.rxq;
1965         cq = mlx5_glue->create_cq(priv->ctx, 1, NULL, NULL, 0);
1966         if (!cq) {
1967                 DEBUG("port %u cannot allocate CQ for drop queue",
1968                       dev->data->port_id);
1969                 rte_errno = errno;
1970                 goto error;
1971         }
1972         wq = mlx5_glue->create_wq(priv->ctx,
1973                  &(struct ibv_wq_init_attr){
1974                         .wq_type = IBV_WQT_RQ,
1975                         .max_wr = 1,
1976                         .max_sge = 1,
1977                         .pd = priv->pd,
1978                         .cq = cq,
1979                  });
1980         if (!wq) {
1981                 DEBUG("port %u cannot allocate WQ for drop queue",
1982                       dev->data->port_id);
1983                 rte_errno = errno;
1984                 goto error;
1985         }
1986         rxq = rte_calloc(__func__, 1, sizeof(*rxq), 0);
1987         if (!rxq) {
1988                 DEBUG("port %u cannot allocate drop Rx queue memory",
1989                       dev->data->port_id);
1990                 rte_errno = ENOMEM;
1991                 goto error;
1992         }
1993         rxq->cq = cq;
1994         rxq->wq = wq;
1995         priv->drop_queue.rxq = rxq;
1996         return rxq;
1997 error:
1998         if (wq)
1999                 claim_zero(mlx5_glue->destroy_wq(wq));
2000         if (cq)
2001                 claim_zero(mlx5_glue->destroy_cq(cq));
2002         return NULL;
2003 }
2004
2005 /**
2006  * Release a drop Rx queue Verbs object.
2007  *
2008  * @param dev
2009  *   Pointer to Ethernet device.
2010  *
2011  * @return
2012  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
2013  */
2014 void
2015 mlx5_rxq_ibv_drop_release(struct rte_eth_dev *dev)
2016 {
2017         struct priv *priv = dev->data->dev_private;
2018         struct mlx5_rxq_ibv *rxq = priv->drop_queue.rxq;
2019
2020         if (rxq->wq)
2021                 claim_zero(mlx5_glue->destroy_wq(rxq->wq));
2022         if (rxq->cq)
2023                 claim_zero(mlx5_glue->destroy_cq(rxq->cq));
2024         rte_free(rxq);
2025         priv->drop_queue.rxq = NULL;
2026 }
2027
2028 /**
2029  * Create a drop indirection table.
2030  *
2031  * @param dev
2032  *   Pointer to Ethernet device.
2033  *
2034  * @return
2035  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
2036  */
2037 struct mlx5_ind_table_ibv *
2038 mlx5_ind_table_ibv_drop_new(struct rte_eth_dev *dev)
2039 {
2040         struct priv *priv = dev->data->dev_private;
2041         struct mlx5_ind_table_ibv *ind_tbl;
2042         struct mlx5_rxq_ibv *rxq;
2043         struct mlx5_ind_table_ibv tmpl;
2044
2045         rxq = mlx5_rxq_ibv_drop_new(dev);
2046         if (!rxq)
2047                 return NULL;
2048         tmpl.ind_table = mlx5_glue->create_rwq_ind_table
2049                 (priv->ctx,
2050                  &(struct ibv_rwq_ind_table_init_attr){
2051                         .log_ind_tbl_size = 0,
2052                         .ind_tbl = &rxq->wq,
2053                         .comp_mask = 0,
2054                  });
2055         if (!tmpl.ind_table) {
2056                 DEBUG("port %u cannot allocate indirection table for drop"
2057                       " queue",
2058                       dev->data->port_id);
2059                 rte_errno = errno;
2060                 goto error;
2061         }
2062         ind_tbl = rte_calloc(__func__, 1, sizeof(*ind_tbl), 0);
2063         if (!ind_tbl) {
2064                 rte_errno = ENOMEM;
2065                 goto error;
2066         }
2067         ind_tbl->ind_table = tmpl.ind_table;
2068         return ind_tbl;
2069 error:
2070         mlx5_rxq_ibv_drop_release(dev);
2071         return NULL;
2072 }
2073
2074 /**
2075  * Release a drop indirection table.
2076  *
2077  * @param dev
2078  *   Pointer to Ethernet device.
2079  */
2080 void
2081 mlx5_ind_table_ibv_drop_release(struct rte_eth_dev *dev)
2082 {
2083         struct priv *priv = dev->data->dev_private;
2084         struct mlx5_ind_table_ibv *ind_tbl = priv->drop_queue.hrxq->ind_table;
2085
2086         claim_zero(mlx5_glue->destroy_rwq_ind_table(ind_tbl->ind_table));
2087         mlx5_rxq_ibv_drop_release(dev);
2088         rte_free(ind_tbl);
2089         priv->drop_queue.hrxq->ind_table = NULL;
2090 }
2091
2092 /**
2093  * Create a drop Rx Hash queue.
2094  *
2095  * @param dev
2096  *   Pointer to Ethernet device.
2097  *
2098  * @return
2099  *   The Verbs object initialised, NULL otherwise and rte_errno is set.
2100  */
2101 struct mlx5_hrxq *
2102 mlx5_hrxq_drop_new(struct rte_eth_dev *dev)
2103 {
2104         struct priv *priv = dev->data->dev_private;
2105         struct mlx5_ind_table_ibv *ind_tbl;
2106         struct ibv_qp *qp;
2107         struct mlx5_hrxq *hrxq;
2108
2109         if (priv->drop_queue.hrxq) {
2110                 rte_atomic32_inc(&priv->drop_queue.hrxq->refcnt);
2111                 return priv->drop_queue.hrxq;
2112         }
2113         ind_tbl = mlx5_ind_table_ibv_drop_new(dev);
2114         if (!ind_tbl)
2115                 return NULL;
2116         qp = mlx5_glue->create_qp_ex(priv->ctx,
2117                  &(struct ibv_qp_init_attr_ex){
2118                         .qp_type = IBV_QPT_RAW_PACKET,
2119                         .comp_mask =
2120                                 IBV_QP_INIT_ATTR_PD |
2121                                 IBV_QP_INIT_ATTR_IND_TABLE |
2122                                 IBV_QP_INIT_ATTR_RX_HASH,
2123                         .rx_hash_conf = (struct ibv_rx_hash_conf){
2124                                 .rx_hash_function =
2125                                         IBV_RX_HASH_FUNC_TOEPLITZ,
2126                                 .rx_hash_key_len = MLX5_RSS_HASH_KEY_LEN,
2127                                 .rx_hash_key = rss_hash_default_key,
2128                                 .rx_hash_fields_mask = 0,
2129                                 },
2130                         .rwq_ind_tbl = ind_tbl->ind_table,
2131                         .pd = priv->pd
2132                  });
2133         if (!qp) {
2134                 DEBUG("port %u cannot allocate QP for drop queue",
2135                       dev->data->port_id);
2136                 rte_errno = errno;
2137                 goto error;
2138         }
2139         hrxq = rte_calloc(__func__, 1, sizeof(*hrxq), 0);
2140         if (!hrxq) {
2141                 DRV_LOG(WARNING,
2142                         "port %u cannot allocate memory for drop queue",
2143                         dev->data->port_id);
2144                 rte_errno = ENOMEM;
2145                 goto error;
2146         }
2147         hrxq->ind_table = ind_tbl;
2148         hrxq->qp = qp;
2149         priv->drop_queue.hrxq = hrxq;
2150         rte_atomic32_set(&hrxq->refcnt, 1);
2151         return hrxq;
2152 error:
2153         if (ind_tbl)
2154                 mlx5_ind_table_ibv_drop_release(dev);
2155         return NULL;
2156 }
2157
2158 /**
2159  * Release a drop hash Rx queue.
2160  *
2161  * @param dev
2162  *   Pointer to Ethernet device.
2163  */
2164 void
2165 mlx5_hrxq_drop_release(struct rte_eth_dev *dev)
2166 {
2167         struct priv *priv = dev->data->dev_private;
2168         struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
2169
2170         if (rte_atomic32_dec_and_test(&hrxq->refcnt)) {
2171                 claim_zero(mlx5_glue->destroy_qp(hrxq->qp));
2172                 mlx5_ind_table_ibv_drop_release(dev);
2173                 rte_free(hrxq);
2174                 priv->drop_queue.hrxq = NULL;
2175         }
2176 }