net/mlx5: use flow to enable unicast traffic
[dpdk.git] / drivers / net / mlx5 / mlx5_trigger.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright 2015 6WIND S.A.
5  *   Copyright 2015 Mellanox.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of 6WIND S.A. nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 #include <unistd.h>
34
35 #include <rte_ether.h>
36 #include <rte_ethdev.h>
37 #include <rte_interrupts.h>
38 #include <rte_alarm.h>
39
40 #include "mlx5.h"
41 #include "mlx5_rxtx.h"
42 #include "mlx5_utils.h"
43
44 static void
45 priv_txq_stop(struct priv *priv)
46 {
47         unsigned int i;
48
49         for (i = 0; i != priv->txqs_n; ++i)
50                 mlx5_priv_txq_release(priv, i);
51 }
52
53 static int
54 priv_txq_start(struct priv *priv)
55 {
56         unsigned int i;
57         int ret = 0;
58
59         /* Add memory regions to Tx queues. */
60         for (i = 0; i != priv->txqs_n; ++i) {
61                 unsigned int idx = 0;
62                 struct mlx5_mr *mr;
63                 struct mlx5_txq_ctrl *txq_ctrl = mlx5_priv_txq_get(priv, i);
64
65                 if (!txq_ctrl)
66                         continue;
67                 LIST_FOREACH(mr, &priv->mr, next)
68                         priv_txq_mp2mr_reg(priv, &txq_ctrl->txq, mr->mp, idx++);
69                 txq_alloc_elts(txq_ctrl);
70                 txq_ctrl->ibv = mlx5_priv_txq_ibv_new(priv, i);
71                 if (!txq_ctrl->ibv) {
72                         ret = ENOMEM;
73                         goto error;
74                 }
75         }
76         return -ret;
77 error:
78         priv_txq_stop(priv);
79         return -ret;
80 }
81
82 static void
83 priv_rxq_stop(struct priv *priv)
84 {
85         unsigned int i;
86
87         for (i = 0; i != priv->rxqs_n; ++i)
88                 mlx5_priv_rxq_release(priv, i);
89 }
90
91 static int
92 priv_rxq_start(struct priv *priv)
93 {
94         unsigned int i;
95         int ret = 0;
96
97         for (i = 0; i != priv->rxqs_n; ++i) {
98                 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_priv_rxq_get(priv, i);
99
100                 if (!rxq_ctrl)
101                         continue;
102                 ret = rxq_alloc_elts(rxq_ctrl);
103                 if (ret)
104                         goto error;
105                 rxq_ctrl->ibv = mlx5_priv_rxq_ibv_new(priv, i);
106                 if (!rxq_ctrl->ibv) {
107                         ret = ENOMEM;
108                         goto error;
109                 }
110         }
111         return -ret;
112 error:
113         priv_rxq_stop(priv);
114         return -ret;
115 }
116
117 /**
118  * DPDK callback to start the device.
119  *
120  * Simulate device start by attaching all configured flows.
121  *
122  * @param dev
123  *   Pointer to Ethernet device structure.
124  *
125  * @return
126  *   0 on success, negative errno value on failure.
127  */
128 int
129 mlx5_dev_start(struct rte_eth_dev *dev)
130 {
131         struct priv *priv = dev->data->dev_private;
132         struct mlx5_mr *mr = NULL;
133         int err;
134
135         if (mlx5_is_secondary())
136                 return -E_RTE_SECONDARY;
137
138         dev->data->dev_started = 1;
139         priv_lock(priv);
140         err = priv_flow_create_drop_queue(priv);
141         if (err) {
142                 ERROR("%p: Drop queue allocation failed: %s",
143                       (void *)dev, strerror(err));
144                 goto error;
145         }
146         DEBUG("%p: allocating and configuring hash RX queues", (void *)dev);
147         rte_mempool_walk(mlx5_mp2mr_iter, priv);
148         err = priv_txq_start(priv);
149         if (err) {
150                 ERROR("%p: TXQ allocation failed: %s",
151                       (void *)dev, strerror(err));
152                 goto error;
153         }
154         /* Update send callback. */
155         priv_dev_select_tx_function(priv, dev);
156         err = priv_rxq_start(priv);
157         if (err) {
158                 ERROR("%p: RXQ allocation failed: %s",
159                       (void *)dev, strerror(err));
160                 goto error;
161         }
162         /* Update receive callback. */
163         priv_dev_select_rx_function(priv, dev);
164         err = priv_create_hash_rxqs(priv);
165         if (err) {
166                 ERROR("%p: an error occurred while configuring hash RX queues:"
167                       " %s",
168                       (void *)priv, strerror(err));
169                 goto error;
170         }
171         err = priv_flow_start(priv, &priv->flows);
172         if (err) {
173                 ERROR("%p: an error occurred while configuring flows:"
174                       " %s",
175                       (void *)priv, strerror(err));
176                 goto error;
177         }
178         err = priv_rx_intr_vec_enable(priv);
179         if (err) {
180                 ERROR("%p: RX interrupt vector creation failed",
181                       (void *)priv);
182                 goto error;
183         }
184         priv_dev_interrupt_handler_install(priv, dev);
185         priv_xstats_init(priv);
186         priv_unlock(priv);
187         return 0;
188 error:
189         /* Rollback. */
190         dev->data->dev_started = 0;
191         LIST_FOREACH(mr, &priv->mr, next)
192                 priv_mr_release(priv, mr);
193         priv_destroy_hash_rxqs(priv);
194         priv_flow_stop(priv, &priv->flows);
195         priv_txq_stop(priv);
196         priv_rxq_stop(priv);
197         priv_flow_delete_drop_queue(priv);
198         priv_unlock(priv);
199         return -err;
200 }
201
202 /**
203  * DPDK callback to stop the device.
204  *
205  * Simulate device stop by detaching all configured flows.
206  *
207  * @param dev
208  *   Pointer to Ethernet device structure.
209  */
210 void
211 mlx5_dev_stop(struct rte_eth_dev *dev)
212 {
213         struct priv *priv = dev->data->dev_private;
214         struct mlx5_mr *mr;
215
216         if (mlx5_is_secondary())
217                 return;
218
219         priv_lock(priv);
220         dev->data->dev_started = 0;
221         /* Prevent crashes when queues are still in use. */
222         dev->rx_pkt_burst = removed_rx_burst;
223         dev->tx_pkt_burst = removed_tx_burst;
224         rte_wmb();
225         usleep(1000 * priv->rxqs_n);
226         DEBUG("%p: cleaning up and destroying hash RX queues", (void *)dev);
227         priv_destroy_hash_rxqs(priv);
228         priv_flow_stop(priv, &priv->flows);
229         priv_flow_flush(priv, &priv->ctrl_flows);
230         priv_rx_intr_vec_disable(priv);
231         priv_dev_interrupt_handler_uninstall(priv, dev);
232         priv_txq_stop(priv);
233         priv_rxq_stop(priv);
234         LIST_FOREACH(mr, &priv->mr, next) {
235                 priv_mr_release(priv, mr);
236         }
237         priv_flow_delete_drop_queue(priv);
238         priv_unlock(priv);
239 }
240
241 /**
242  * Enable traffic flows configured by control plane
243  *
244  * @param priv
245  *   Pointer to Ethernet device private data.
246  * @param dev
247  *   Pointer to Ethernet device structure.
248  *
249  * @return
250  *   0 on success.
251  */
252 int
253 priv_dev_traffic_enable(struct priv *priv, struct rte_eth_dev *dev)
254 {
255         if (priv->isolated)
256                 return 0;
257         if (dev->data->promiscuous) {
258                 struct rte_flow_item_eth promisc = {
259                         .dst.addr_bytes = "\x00\x00\x00\x00\x00\x00",
260                         .src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
261                         .type = 0,
262                 };
263
264                 claim_zero(mlx5_ctrl_flow(dev, &promisc, &promisc));
265         } else if (dev->data->all_multicast) {
266                 struct rte_flow_item_eth multicast = {
267                         .dst.addr_bytes = "\x01\x00\x00\x00\x00\x00",
268                         .src.addr_bytes = "\x01\x00\x00\x00\x00\x00",
269                         .type = 0,
270                 };
271
272                 claim_zero(mlx5_ctrl_flow(dev, &multicast, &multicast));
273         } else {
274                 struct rte_flow_item_eth bcast = {
275                         .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
276                 };
277                 struct rte_flow_item_eth ipv6_multi_spec = {
278                         .dst.addr_bytes = "\x33\x33\x00\x00\x00\x00",
279                 };
280                 struct rte_flow_item_eth ipv6_multi_mask = {
281                         .dst.addr_bytes = "\xff\xff\x00\x00\x00\x00",
282                 };
283                 struct rte_flow_item_eth unicast = {
284                         .src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
285                 };
286                 struct rte_flow_item_eth unicast_mask = {
287                         .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
288                 };
289                 const unsigned int vlan_filter_n = priv->vlan_filter_n;
290                 const struct ether_addr cmp = {
291                         .addr_bytes = "\x00\x00\x00\x00\x00\x00",
292                 };
293                 unsigned int i;
294                 unsigned int j;
295                 unsigned int unicast_flow = 0;
296                 int ret;
297
298                 for (i = 0; i != MLX5_MAX_MAC_ADDRESSES; ++i) {
299                         struct ether_addr *mac = &dev->data->mac_addrs[i];
300
301                         if (!memcmp(mac, &cmp, sizeof(*mac)))
302                                 continue;
303                         memcpy(&unicast.dst.addr_bytes,
304                                mac->addr_bytes,
305                                ETHER_ADDR_LEN);
306                         for (j = 0; j != vlan_filter_n; ++j) {
307                                 uint16_t vlan = priv->vlan_filter[j];
308
309                                 struct rte_flow_item_vlan vlan_spec = {
310                                         .tci = rte_cpu_to_be_16(vlan),
311                                 };
312                                 struct rte_flow_item_vlan vlan_mask = {
313                                         .tci = 0xffff,
314                                 };
315
316                                 ret = mlx5_ctrl_flow_vlan(dev, &unicast,
317                                                           &unicast_mask,
318                                                           &vlan_spec,
319                                                           &vlan_mask);
320                                 if (ret)
321                                         goto error;
322                                 unicast_flow = 1;
323                         }
324                         if (!vlan_filter_n) {
325                                 ret = mlx5_ctrl_flow(dev, &unicast,
326                                                      &unicast_mask);
327                                 if (ret)
328                                         goto error;
329                                 unicast_flow = 1;
330                         }
331                 }
332                 if (!unicast_flow)
333                         return 0;
334                 ret = mlx5_ctrl_flow(dev, &bcast, &bcast);
335                 if (ret)
336                         goto error;
337                 ret = mlx5_ctrl_flow(dev, &ipv6_multi_spec, &ipv6_multi_mask);
338                 if (ret)
339                         goto error;
340         }
341         return 0;
342 error:
343         return rte_errno;
344 }
345
346
347 /**
348  * Disable traffic flows configured by control plane
349  *
350  * @param priv
351  *   Pointer to Ethernet device private data.
352  * @param dev
353  *   Pointer to Ethernet device structure.
354  *
355  * @return
356  *   0 on success.
357  */
358 int
359 priv_dev_traffic_disable(struct priv *priv, struct rte_eth_dev *dev)
360 {
361         (void)dev;
362         priv_flow_flush(priv, &priv->ctrl_flows);
363         return 0;
364 }
365
366 /**
367  * Restart traffic flows configured by control plane
368  *
369  * @param priv
370  *   Pointer to Ethernet device private data.
371  * @param dev
372  *   Pointer to Ethernet device structure.
373  *
374  * @return
375  *   0 on success.
376  */
377 int
378 priv_dev_traffic_restart(struct priv *priv, struct rte_eth_dev *dev)
379 {
380         if (dev->data->dev_started) {
381                 priv_dev_traffic_disable(priv, dev);
382                 priv_dev_traffic_enable(priv, dev);
383         }
384         return 0;
385 }
386
387 /**
388  * Restart traffic flows configured by control plane
389  *
390  * @param dev
391  *   Pointer to Ethernet device structure.
392  *
393  * @return
394  *   0 on success.
395  */
396 int
397 mlx5_traffic_restart(struct rte_eth_dev *dev)
398 {
399         struct priv *priv = dev->data->dev_private;
400
401         priv_lock(priv);
402         priv_dev_traffic_restart(priv, dev);
403         priv_unlock(priv);
404         return 0;
405 }