drivers/net/mvpp2/mrvl_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Marvell International Ltd.
   3  * Copyright(c) 2017 Semihalf.
   4  * All rights reserved.
   5  */
   6
   7 #include <rte_ethdev_driver.h>
   8 #include <rte_kvargs.h>
   9 #include <rte_log.h>
  10 #include <rte_malloc.h>
  11 #include <rte_bus_vdev.h>
  12
  13 #include <fcntl.h>
  14 #include <linux/ethtool.h>
  15 #include <linux/sockios.h>
  16 #include <net/if.h>
  17 #include <net/if_arp.h>
  18 #include <sys/ioctl.h>
  19 #include <sys/socket.h>
  20 #include <sys/stat.h>
  21 #include <sys/types.h>
  22
  23 #include <rte_mvep_common.h>
  24 #include "mrvl_ethdev.h"
  25 #include "mrvl_qos.h"
  26
  27 /* bitmask with reserved hifs */
  28 #define MRVL_MUSDK_HIFS_RESERVED 0x0F
  29 /* bitmask with reserved bpools */
  30 #define MRVL_MUSDK_BPOOLS_RESERVED 0x07
  31 /* bitmask with reserved kernel RSS tables */
  32 #define MRVL_MUSDK_RSS_RESERVED 0x01
  33 /* maximum number of available hifs */
  34 #define MRVL_MUSDK_HIFS_MAX 9
  35
  36 /* prefetch shift */
  37 #define MRVL_MUSDK_PREFETCH_SHIFT 2
  38
  39 /* TCAM has 25 entries reserved for uc/mc filter entries */
  40 #define MRVL_MAC_ADDRS_MAX 25
  41 #define MRVL_MATCH_LEN 16
  42 #define MRVL_PKT_EFFEC_OFFS (MRVL_PKT_OFFS + MV_MH_SIZE)
  43 /* Maximum allowable packet size */
  44 #define MRVL_PKT_SIZE_MAX (10240 - MV_MH_SIZE)
  45
  46 #define MRVL_IFACE_NAME_ARG "iface"
  47 #define MRVL_CFG_ARG "cfg"
  48
  49 #define MRVL_BURST_SIZE 64
  50
  51 #define MRVL_ARP_LENGTH 28
  52
  53 #define MRVL_COOKIE_ADDR_INVALID ~0ULL
  54
  55 #define MRVL_COOKIE_HIGH_ADDR_SHIFT     (sizeof(pp2_cookie_t) * 8)
  56 #define MRVL_COOKIE_HIGH_ADDR_MASK      (~0ULL << MRVL_COOKIE_HIGH_ADDR_SHIFT)
  57
  58 /** Port Rx offload capabilities */
  59 #define MRVL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_FILTER | \
  60                           DEV_RX_OFFLOAD_JUMBO_FRAME | \
  61                           DEV_RX_OFFLOAD_CHECKSUM)
  62
  63 /** Port Tx offloads capabilities */
  64 #define MRVL_TX_OFFLOADS (DEV_TX_OFFLOAD_IPV4_CKSUM | \
  65                           DEV_TX_OFFLOAD_UDP_CKSUM | \
  66                           DEV_TX_OFFLOAD_TCP_CKSUM)
  67
  68 static const char * const valid_args[] = {
  69         MRVL_IFACE_NAME_ARG,
  70         MRVL_CFG_ARG,
  71         NULL
  72 };
  73
  74 static int used_hifs = MRVL_MUSDK_HIFS_RESERVED;
  75 static struct pp2_hif *hifs[RTE_MAX_LCORE];
  76 static int used_bpools[PP2_NUM_PKT_PROC] = {
  77         [0 ... PP2_NUM_PKT_PROC - 1] = MRVL_MUSDK_BPOOLS_RESERVED
  78 };
  79
  80 static struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS];
  81 static int mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE];
  82 static uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID;
  83
  84 int mrvl_logtype;
  85
  86 struct mrvl_ifnames {
  87         const char *names[PP2_NUM_ETH_PPIO * PP2_NUM_PKT_PROC];
  88         int idx;
  89 };
  90
  91 /*
  92  * To use buffer harvesting based on loopback port shadow queue structure
  93  * was introduced for buffers information bookkeeping.
  94  *
  95  * Before sending the packet, related buffer information (pp2_buff_inf) is
  96  * stored in shadow queue. After packet is transmitted no longer used
  97  * packet buffer is released back to it's original hardware pool,
  98  * on condition it originated from interface.
  99  * In case it  was generated by application itself i.e: mbuf->port field is
 100  * 0xff then its released to software mempool.
 101  */
 102 struct mrvl_shadow_txq {
 103         int head;           /* write index - used when sending buffers */
 104         int tail;           /* read index - used when releasing buffers */
 105         u16 size;           /* queue occupied size */
 106         u16 num_to_release; /* number of buffers sent, that can be released */
 107         struct buff_release_entry ent[MRVL_PP2_TX_SHADOWQ_SIZE]; /* q entries */
 108 };
 109
 110 struct mrvl_rxq {
 111         struct mrvl_priv *priv;
 112         struct rte_mempool *mp;
 113         int queue_id;
 114         int port_id;
 115         int cksum_enabled;
 116         uint64_t bytes_recv;
 117         uint64_t drop_mac;
 118 };
 119
 120 struct mrvl_txq {
 121         struct mrvl_priv *priv;
 122         int queue_id;
 123         int port_id;
 124         uint64_t bytes_sent;
 125         struct mrvl_shadow_txq shadow_txqs[RTE_MAX_LCORE];
 126         int tx_deferred_start;
 127 };
 128
 129 static int mrvl_lcore_first;
 130 static int mrvl_lcore_last;
 131 static int mrvl_dev_num;
 132
 133 static int mrvl_fill_bpool(struct mrvl_rxq *rxq, int num);
 134 static inline void mrvl_free_sent_buffers(struct pp2_ppio *ppio,
 135                         struct pp2_hif *hif, unsigned int core_id,
 136                         struct mrvl_shadow_txq *sq, int qid, int force);
 137
 138 #define MRVL_XSTATS_TBL_ENTRY(name) { \
 139         #name, offsetof(struct pp2_ppio_statistics, name),      \
 140         sizeof(((struct pp2_ppio_statistics *)0)->name)         \
 141 }
 142
 143 /* Table with xstats data */
 144 static struct {
 145         const char *name;
 146         unsigned int offset;
 147         unsigned int size;
 148 } mrvl_xstats_tbl[] = {
 149         MRVL_XSTATS_TBL_ENTRY(rx_bytes),
 150         MRVL_XSTATS_TBL_ENTRY(rx_packets),
 151         MRVL_XSTATS_TBL_ENTRY(rx_unicast_packets),
 152         MRVL_XSTATS_TBL_ENTRY(rx_errors),
 153         MRVL_XSTATS_TBL_ENTRY(rx_fullq_dropped),
 154         MRVL_XSTATS_TBL_ENTRY(rx_bm_dropped),
 155         MRVL_XSTATS_TBL_ENTRY(rx_early_dropped),
 156         MRVL_XSTATS_TBL_ENTRY(rx_fifo_dropped),
 157         MRVL_XSTATS_TBL_ENTRY(rx_cls_dropped),
 158         MRVL_XSTATS_TBL_ENTRY(tx_bytes),
 159         MRVL_XSTATS_TBL_ENTRY(tx_packets),
 160         MRVL_XSTATS_TBL_ENTRY(tx_unicast_packets),
 161         MRVL_XSTATS_TBL_ENTRY(tx_errors)
 162 };
 163
 164 static inline int
 165 mrvl_get_bpool_size(int pp2_id, int pool_id)
 166 {
 167         int i;
 168         int size = 0;
 169
 170         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++)
 171                 size += mrvl_port_bpool_size[pp2_id][pool_id][i];
 172
 173         return size;
 174 }
 175
 176 static inline int
 177 mrvl_reserve_bit(int *bitmap, int max)
 178 {
 179         int n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);
 180
 181         if (n >= max)
 182                 return -1;
 183
 184         *bitmap |= 1 << n;
 185
 186         return n;
 187 }
 188
 189 static int
 190 mrvl_init_hif(int core_id)
 191 {
 192         struct pp2_hif_params params;
 193         char match[MRVL_MATCH_LEN];
 194         int ret;
 195
 196         ret = mrvl_reserve_bit(&used_hifs, MRVL_MUSDK_HIFS_MAX);
 197         if (ret < 0) {
 198                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 199                 return ret;
 200         }
 201
 202         snprintf(match, sizeof(match), "hif-%d", ret);
 203         memset(&params, 0, sizeof(params));
 204         params.match = match;
 205         params.out_size = MRVL_PP2_AGGR_TXQD_MAX;
 206         ret = pp2_hif_init(&params, &hifs[core_id]);
 207         if (ret) {
 208                 MRVL_LOG(ERR, "Failed to initialize hif %d", core_id);
 209                 return ret;
 210         }
 211
 212         return 0;
 213 }
 214
 215 static inline struct pp2_hif*
 216 mrvl_get_hif(struct mrvl_priv *priv, int core_id)
 217 {
 218         int ret;
 219
 220         if (likely(hifs[core_id] != NULL))
 221                 return hifs[core_id];
 222
 223         rte_spinlock_lock(&priv->lock);
 224
 225         ret = mrvl_init_hif(core_id);
 226         if (ret < 0) {
 227                 MRVL_LOG(ERR, "Failed to allocate hif %d", core_id);
 228                 goto out;
 229         }
 230
 231         if (core_id < mrvl_lcore_first)
 232                 mrvl_lcore_first = core_id;
 233
 234         if (core_id > mrvl_lcore_last)
 235                 mrvl_lcore_last = core_id;
 236 out:
 237         rte_spinlock_unlock(&priv->lock);
 238
 239         return hifs[core_id];
 240 }
 241
 242 /**
 243  * Configure rss based on dpdk rss configuration.
 244  *
 245  * @param priv
 246  *   Pointer to private structure.
 247  * @param rss_conf
 248  *   Pointer to RSS configuration.
 249  *
 250  * @return
 251  *   0 on success, negative error value otherwise.
 252  */
 253 static int
 254 mrvl_configure_rss(struct mrvl_priv *priv, struct rte_eth_rss_conf *rss_conf)
 255 {
 256         if (rss_conf->rss_key)
 257                 MRVL_LOG(WARNING, "Changing hash key is not supported");
 258
 259         if (rss_conf->rss_hf == 0) {
 260                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 261         } else if (rss_conf->rss_hf & ETH_RSS_IPV4) {
 262                 priv->ppio_params.inqs_params.hash_type =
 263                         PP2_PPIO_HASH_T_2_TUPLE;
 264         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) {
 265                 priv->ppio_params.inqs_params.hash_type =
 266                         PP2_PPIO_HASH_T_5_TUPLE;
 267                 priv->rss_hf_tcp = 1;
 268         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) {
 269                 priv->ppio_params.inqs_params.hash_type =
 270                         PP2_PPIO_HASH_T_5_TUPLE;
 271                 priv->rss_hf_tcp = 0;
 272         } else {
 273                 return -EINVAL;
 274         }
 275
 276         return 0;
 277 }
 278
 279 /**
 280  * Ethernet device configuration.
 281  *
 282  * Prepare the driver for a given number of TX and RX queues and
 283  * configure RSS.
 284  *
 285  * @param dev
 286  *   Pointer to Ethernet device structure.
 287  *
 288  * @return
 289  *   0 on success, negative error value otherwise.
 290  */
 291 static int
 292 mrvl_dev_configure(struct rte_eth_dev *dev)
 293 {
 294         struct mrvl_priv *priv = dev->data->dev_private;
 295         int ret;
 296
 297         if (priv->ppio) {
 298                 MRVL_LOG(INFO, "Device reconfiguration is not supported");
 299                 return -EINVAL;
 300         }
 301
 302         if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_NONE &&
 303             dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
 304                 MRVL_LOG(INFO, "Unsupported rx multi queue mode %d",
 305                         dev->data->dev_conf.rxmode.mq_mode);
 306                 return -EINVAL;
 307         }
 308
 309         if (dev->data->dev_conf.rxmode.split_hdr_size) {
 310                 MRVL_LOG(INFO, "Split headers not supported");
 311                 return -EINVAL;
 312         }
 313
 314         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
 315                 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
 316                                  ETHER_HDR_LEN - ETHER_CRC_LEN;
 317
 318         ret = mrvl_configure_rxqs(priv, dev->data->port_id,
 319                                   dev->data->nb_rx_queues);
 320         if (ret < 0)
 321                 return ret;
 322
 323         ret = mrvl_configure_txqs(priv, dev->data->port_id,
 324                                   dev->data->nb_tx_queues);
 325         if (ret < 0)
 326                 return ret;
 327
 328         priv->ppio_params.outqs_params.num_outqs = dev->data->nb_tx_queues;
 329         priv->ppio_params.maintain_stats = 1;
 330         priv->nb_rx_queues = dev->data->nb_rx_queues;
 331
 332         if (dev->data->nb_rx_queues == 1 &&
 333             dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 334                 MRVL_LOG(WARNING, "Disabling hash for 1 rx queue");
 335                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 336
 337                 return 0;
 338         }
 339
 340         return mrvl_configure_rss(priv,
 341                                   &dev->data->dev_conf.rx_adv_conf.rss_conf);
 342 }
 343
 344 /**
 345  * DPDK callback to change the MTU.
 346  *
 347  * Setting the MTU affects hardware MRU (packets larger than the MRU
 348  * will be dropped).
 349  *
 350  * @param dev
 351  *   Pointer to Ethernet device structure.
 352  * @param mtu
 353  *   New MTU.
 354  *
 355  * @return
 356  *   0 on success, negative error value otherwise.
 357  */
 358 static int
 359 mrvl_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 360 {
 361         struct mrvl_priv *priv = dev->data->dev_private;
 362         /* extra MV_MH_SIZE bytes are required for Marvell tag */
 363         uint16_t mru = mtu + MV_MH_SIZE + ETHER_HDR_LEN + ETHER_CRC_LEN;
 364         int ret;
 365
 366         if (mtu < ETHER_MIN_MTU || mru > MRVL_PKT_SIZE_MAX)
 367                 return -EINVAL;
 368
 369         if (!priv->ppio)
 370                 return 0;
 371
 372         ret = pp2_ppio_set_mru(priv->ppio, mru);
 373         if (ret)
 374                 return ret;
 375
 376         return pp2_ppio_set_mtu(priv->ppio, mtu);
 377 }
 378
 379 /**
 380  * DPDK callback to bring the link up.
 381  *
 382  * @param dev
 383  *   Pointer to Ethernet device structure.
 384  *
 385  * @return
 386  *   0 on success, negative error value otherwise.
 387  */
 388 static int
 389 mrvl_dev_set_link_up(struct rte_eth_dev *dev)
 390 {
 391         struct mrvl_priv *priv = dev->data->dev_private;
 392         int ret;
 393
 394         if (!priv->ppio)
 395                 return -EPERM;
 396
 397         ret = pp2_ppio_enable(priv->ppio);
 398         if (ret)
 399                 return ret;
 400
 401         /*
 402          * mtu/mru can be updated if pp2_ppio_enable() was called at least once
 403          * as pp2_ppio_enable() changes port->t_mode from default 0 to
 404          * PP2_TRAFFIC_INGRESS_EGRESS.
 405          *
 406          * Set mtu to default DPDK value here.
 407          */
 408         ret = mrvl_mtu_set(dev, dev->data->mtu);
 409         if (ret)
 410                 pp2_ppio_disable(priv->ppio);
 411
 412         return ret;
 413 }
 414
 415 /**
 416  * DPDK callback to bring the link down.
 417  *
 418  * @param dev
 419  *   Pointer to Ethernet device structure.
 420  *
 421  * @return
 422  *   0 on success, negative error value otherwise.
 423  */
 424 static int
 425 mrvl_dev_set_link_down(struct rte_eth_dev *dev)
 426 {
 427         struct mrvl_priv *priv = dev->data->dev_private;
 428
 429         if (!priv->ppio)
 430                 return -EPERM;
 431
 432         return pp2_ppio_disable(priv->ppio);
 433 }
 434
 435 /**
 436  * DPDK callback to start tx queue.
 437  *
 438  * @param dev
 439  *   Pointer to Ethernet device structure.
 440  * @param queue_id
 441  *   Transmit queue index.
 442  *
 443  * @return
 444  *   0 on success, negative error value otherwise.
 445  */
 446 static int
 447 mrvl_tx_queue_start(struct rte_eth_dev *dev, uint16_t queue_id)
 448 {
 449         struct mrvl_priv *priv = dev->data->dev_private;
 450         int ret;
 451
 452         if (!priv)
 453                 return -EPERM;
 454
 455         /* passing 1 enables given tx queue */
 456         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 1);
 457         if (ret) {
 458                 MRVL_LOG(ERR, "Failed to start txq %d", queue_id);
 459                 return ret;
 460         }
 461
 462         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 463
 464         return 0;
 465 }
 466
 467 /**
 468  * DPDK callback to stop tx queue.
 469  *
 470  * @param dev
 471  *   Pointer to Ethernet device structure.
 472  * @param queue_id
 473  *   Transmit queue index.
 474  *
 475  * @return
 476  *   0 on success, negative error value otherwise.
 477  */
 478 static int
 479 mrvl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id)
 480 {
 481         struct mrvl_priv *priv = dev->data->dev_private;
 482         int ret;
 483
 484         if (!priv->ppio)
 485                 return -EPERM;
 486
 487         /* passing 0 disables given tx queue */
 488         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 0);
 489         if (ret) {
 490                 MRVL_LOG(ERR, "Failed to stop txq %d", queue_id);
 491                 return ret;
 492         }
 493
 494         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 495
 496         return 0;
 497 }
 498
 499 /**
 500  * DPDK callback to start the device.
 501  *
 502  * @param dev
 503  *   Pointer to Ethernet device structure.
 504  *
 505  * @return
 506  *   0 on success, negative errno value on failure.
 507  */
 508 static int
 509 mrvl_dev_start(struct rte_eth_dev *dev)
 510 {
 511         struct mrvl_priv *priv = dev->data->dev_private;
 512         char match[MRVL_MATCH_LEN];
 513         int ret = 0, i, def_init_size;
 514
 515         if (priv->ppio)
 516                 return mrvl_dev_set_link_up(dev);
 517
 518         snprintf(match, sizeof(match), "ppio-%d:%d",
 519                  priv->pp_id, priv->ppio_id);
 520         priv->ppio_params.match = match;
 521
 522         /*
 523          * Calculate the minimum bpool size for refill feature as follows:
 524          * 2 default burst sizes multiply by number of rx queues.
 525          * If the bpool size will be below this value, new buffers will
 526          * be added to the pool.
 527          */
 528         priv->bpool_min_size = priv->nb_rx_queues * MRVL_BURST_SIZE * 2;
 529
 530         /* In case initial bpool size configured in queues setup is
 531          * smaller than minimum size add more buffers
 532          */
 533         def_init_size = priv->bpool_min_size + MRVL_BURST_SIZE * 2;
 534         if (priv->bpool_init_size < def_init_size) {
 535                 int buffs_to_add = def_init_size - priv->bpool_init_size;
 536
 537                 priv->bpool_init_size += buffs_to_add;
 538                 ret = mrvl_fill_bpool(dev->data->rx_queues[0], buffs_to_add);
 539                 if (ret)
 540                         MRVL_LOG(ERR, "Failed to add buffers to bpool");
 541         }
 542
 543         /*
 544          * Calculate the maximum bpool size for refill feature as follows:
 545          * maximum number of descriptors in rx queue multiply by number
 546          * of rx queues plus minimum bpool size.
 547          * In case the bpool size will exceed this value, superfluous buffers
 548          * will be removed
 549          */
 550         priv->bpool_max_size = (priv->nb_rx_queues * MRVL_PP2_RXD_MAX) +
 551                                 priv->bpool_min_size;
 552
 553         ret = pp2_ppio_init(&priv->ppio_params, &priv->ppio);
 554         if (ret) {
 555                 MRVL_LOG(ERR, "Failed to init ppio");
 556                 return ret;
 557         }
 558
 559         /*
 560          * In case there are some some stale uc/mc mac addresses flush them
 561          * here. It cannot be done during mrvl_dev_close() as port information
 562          * is already gone at that point (due to pp2_ppio_deinit() in
 563          * mrvl_dev_stop()).
 564          */
 565         if (!priv->uc_mc_flushed) {
 566                 ret = pp2_ppio_flush_mac_addrs(priv->ppio, 1, 1);
 567                 if (ret) {
 568                         MRVL_LOG(ERR,
 569                                 "Failed to flush uc/mc filter list");
 570                         goto out;
 571                 }
 572                 priv->uc_mc_flushed = 1;
 573         }
 574
 575         if (!priv->vlan_flushed) {
 576                 ret = pp2_ppio_flush_vlan(priv->ppio);
 577                 if (ret) {
 578                         MRVL_LOG(ERR, "Failed to flush vlan list");
 579                         /*
 580                          * TODO
 581                          * once pp2_ppio_flush_vlan() is supported jump to out
 582                          * goto out;
 583                          */
 584                 }
 585                 priv->vlan_flushed = 1;
 586         }
 587
 588         /* For default QoS config, don't start classifier. */
 589         if (mrvl_qos_cfg) {
 590                 ret = mrvl_start_qos_mapping(priv);
 591                 if (ret) {
 592                         MRVL_LOG(ERR, "Failed to setup QoS mapping");
 593                         goto out;
 594                 }
 595         }
 596
 597         ret = mrvl_dev_set_link_up(dev);
 598         if (ret) {
 599                 MRVL_LOG(ERR, "Failed to set link up");
 600                 goto out;
 601         }
 602
 603         /* start tx queues */
 604         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 605                 struct mrvl_txq *txq = dev->data->tx_queues[i];
 606
 607                 dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
 608
 609                 if (!txq->tx_deferred_start)
 610                         continue;
 611
 612                 /*
 613                  * All txqs are started by default. Stop them
 614                  * so that tx_deferred_start works as expected.
 615                  */
 616                 ret = mrvl_tx_queue_stop(dev, i);
 617                 if (ret)
 618                         goto out;
 619         }
 620
 621         return 0;
 622 out:
 623         MRVL_LOG(ERR, "Failed to start device");
 624         pp2_ppio_deinit(priv->ppio);
 625         return ret;
 626 }
 627
 628 /**
 629  * Flush receive queues.
 630  *
 631  * @param dev
 632  *   Pointer to Ethernet device structure.
 633  */
 634 static void
 635 mrvl_flush_rx_queues(struct rte_eth_dev *dev)
 636 {
 637         int i;
 638
 639         MRVL_LOG(INFO, "Flushing rx queues");
 640         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 641                 int ret, num;
 642
 643                 do {
 644                         struct mrvl_rxq *q = dev->data->rx_queues[i];
 645                         struct pp2_ppio_desc descs[MRVL_PP2_RXD_MAX];
 646
 647                         num = MRVL_PP2_RXD_MAX;
 648                         ret = pp2_ppio_recv(q->priv->ppio,
 649                                             q->priv->rxq_map[q->queue_id].tc,
 650                                             q->priv->rxq_map[q->queue_id].inq,
 651                                             descs, (uint16_t *)&num);
 652                 } while (ret == 0 && num);
 653         }
 654 }
 655
 656 /**
 657  * Flush transmit shadow queues.
 658  *
 659  * @param dev
 660  *   Pointer to Ethernet device structure.
 661  */
 662 static void
 663 mrvl_flush_tx_shadow_queues(struct rte_eth_dev *dev)
 664 {
 665         int i, j;
 666         struct mrvl_txq *txq;
 667
 668         MRVL_LOG(INFO, "Flushing tx shadow queues");
 669         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 670                 txq = (struct mrvl_txq *)dev->data->tx_queues[i];
 671
 672                 for (j = 0; j < RTE_MAX_LCORE; j++) {
 673                         struct mrvl_shadow_txq *sq;
 674
 675                         if (!hifs[j])
 676                                 continue;
 677
 678                         sq = &txq->shadow_txqs[j];
 679                         mrvl_free_sent_buffers(txq->priv->ppio,
 680                                 hifs[j], j, sq, txq->queue_id, 1);
 681                         while (sq->tail != sq->head) {
 682                                 uint64_t addr = cookie_addr_high |
 683                                         sq->ent[sq->tail].buff.cookie;
 684                                 rte_pktmbuf_free(
 685                                         (struct rte_mbuf *)addr);
 686                                 sq->tail = (sq->tail + 1) &
 687                                             MRVL_PP2_TX_SHADOWQ_MASK;
 688                         }
 689                         memset(sq, 0, sizeof(*sq));
 690                 }
 691         }
 692 }
 693
 694 /**
 695  * Flush hardware bpool (buffer-pool).
 696  *
 697  * @param dev
 698  *   Pointer to Ethernet device structure.
 699  */
 700 static void
 701 mrvl_flush_bpool(struct rte_eth_dev *dev)
 702 {
 703         struct mrvl_priv *priv = dev->data->dev_private;
 704         struct pp2_hif *hif;
 705         uint32_t num;
 706         int ret;
 707         unsigned int core_id = rte_lcore_id();
 708
 709         if (core_id == LCORE_ID_ANY)
 710                 core_id = 0;
 711
 712         hif = mrvl_get_hif(priv, core_id);
 713
 714         ret = pp2_bpool_get_num_buffs(priv->bpool, &num);
 715         if (ret) {
 716                 MRVL_LOG(ERR, "Failed to get bpool buffers number");
 717                 return;
 718         }
 719
 720         while (num--) {
 721                 struct pp2_buff_inf inf;
 722                 uint64_t addr;
 723
 724                 ret = pp2_bpool_get_buff(hif, priv->bpool, &inf);
 725                 if (ret)
 726                         break;
 727
 728                 addr = cookie_addr_high | inf.cookie;
 729                 rte_pktmbuf_free((struct rte_mbuf *)addr);
 730         }
 731 }
 732
 733 /**
 734  * DPDK callback to stop the device.
 735  *
 736  * @param dev
 737  *   Pointer to Ethernet device structure.
 738  */
 739 static void
 740 mrvl_dev_stop(struct rte_eth_dev *dev)
 741 {
 742         mrvl_dev_set_link_down(dev);
 743 }
 744
 745 /**
 746  * DPDK callback to close the device.
 747  *
 748  * @param dev
 749  *   Pointer to Ethernet device structure.
 750  */
 751 static void
 752 mrvl_dev_close(struct rte_eth_dev *dev)
 753 {
 754         struct mrvl_priv *priv = dev->data->dev_private;
 755         size_t i;
 756
 757         mrvl_flush_rx_queues(dev);
 758         mrvl_flush_tx_shadow_queues(dev);
 759
 760         for (i = 0; i < priv->ppio_params.inqs_params.num_tcs; ++i) {
 761                 struct pp2_ppio_tc_params *tc_params =
 762                         &priv->ppio_params.inqs_params.tcs_params[i];
 763
 764                 if (tc_params->inqs_params) {
 765                         rte_free(tc_params->inqs_params);
 766                         tc_params->inqs_params = NULL;
 767                 }
 768         }
 769
 770         if (priv->cls_tbl) {
 771                 pp2_cls_tbl_deinit(priv->cls_tbl);
 772                 priv->cls_tbl = NULL;
 773         }
 774
 775         if (priv->qos_tbl) {
 776                 pp2_cls_qos_tbl_deinit(priv->qos_tbl);
 777                 priv->qos_tbl = NULL;
 778         }
 779
 780         mrvl_flush_bpool(dev);
 781
 782         if (priv->ppio) {
 783                 pp2_ppio_deinit(priv->ppio);
 784                 priv->ppio = NULL;
 785         }
 786
 787         /* policer must be released after ppio deinitialization */
 788         if (priv->policer) {
 789                 pp2_cls_plcr_deinit(priv->policer);
 790                 priv->policer = NULL;
 791         }
 792 }
 793
 794 /**
 795  * DPDK callback to retrieve physical link information.
 796  *
 797  * @param dev
 798  *   Pointer to Ethernet device structure.
 799  * @param wait_to_complete
 800  *   Wait for request completion (ignored).
 801  *
 802  * @return
 803  *   0 on success, negative error value otherwise.
 804  */
 805 static int
 806 mrvl_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
 807 {
 808         /*
 809          * TODO
 810          * once MUSDK provides necessary API use it here
 811          */
 812         struct mrvl_priv *priv = dev->data->dev_private;
 813         struct ethtool_cmd edata;
 814         struct ifreq req;
 815         int ret, fd, link_up;
 816
 817         if (!priv->ppio)
 818                 return -EPERM;
 819
 820         edata.cmd = ETHTOOL_GSET;
 821
 822         strcpy(req.ifr_name, dev->data->name);
 823         req.ifr_data = (void *)&edata;
 824
 825         fd = socket(AF_INET, SOCK_DGRAM, 0);
 826         if (fd == -1)
 827                 return -EFAULT;
 828
 829         ret = ioctl(fd, SIOCETHTOOL, &req);
 830         if (ret == -1) {
 831                 close(fd);
 832                 return -EFAULT;
 833         }
 834
 835         close(fd);
 836
 837         switch (ethtool_cmd_speed(&edata)) {
 838         case SPEED_10:
 839                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10M;
 840                 break;
 841         case SPEED_100:
 842                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_100M;
 843                 break;
 844         case SPEED_1000:
 845                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_1G;
 846                 break;
 847         case SPEED_10000:
 848                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10G;
 849                 break;
 850         default:
 851                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_NONE;
 852         }
 853
 854         dev->data->dev_link.link_duplex = edata.duplex ? ETH_LINK_FULL_DUPLEX :
 855                                                          ETH_LINK_HALF_DUPLEX;
 856         dev->data->dev_link.link_autoneg = edata.autoneg ? ETH_LINK_AUTONEG :
 857                                                            ETH_LINK_FIXED;
 858         pp2_ppio_get_link_state(priv->ppio, &link_up);
 859         dev->data->dev_link.link_status = link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
 860
 861         return 0;
 862 }
 863
 864 /**
 865  * DPDK callback to enable promiscuous mode.
 866  *
 867  * @param dev
 868  *   Pointer to Ethernet device structure.
 869  */
 870 static void
 871 mrvl_promiscuous_enable(struct rte_eth_dev *dev)
 872 {
 873         struct mrvl_priv *priv = dev->data->dev_private;
 874         int ret;
 875
 876         if (!priv->ppio)
 877                 return;
 878
 879         if (priv->isolated)
 880                 return;
 881
 882         ret = pp2_ppio_set_promisc(priv->ppio, 1);
 883         if (ret)
 884                 MRVL_LOG(ERR, "Failed to enable promiscuous mode");
 885 }
 886
 887 /**
 888  * DPDK callback to enable allmulti mode.
 889  *
 890  * @param dev
 891  *   Pointer to Ethernet device structure.
 892  */
 893 static void
 894 mrvl_allmulticast_enable(struct rte_eth_dev *dev)
 895 {
 896         struct mrvl_priv *priv = dev->data->dev_private;
 897         int ret;
 898
 899         if (!priv->ppio)
 900                 return;
 901
 902         if (priv->isolated)
 903                 return;
 904
 905         ret = pp2_ppio_set_mc_promisc(priv->ppio, 1);
 906         if (ret)
 907                 MRVL_LOG(ERR, "Failed enable all-multicast mode");
 908 }
 909
 910 /**
 911  * DPDK callback to disable promiscuous mode.
 912  *
 913  * @param dev
 914  *   Pointer to Ethernet device structure.
 915  */
 916 static void
 917 mrvl_promiscuous_disable(struct rte_eth_dev *dev)
 918 {
 919         struct mrvl_priv *priv = dev->data->dev_private;
 920         int ret;
 921
 922         if (!priv->ppio)
 923                 return;
 924
 925         ret = pp2_ppio_set_promisc(priv->ppio, 0);
 926         if (ret)
 927                 MRVL_LOG(ERR, "Failed to disable promiscuous mode");
 928 }
 929
 930 /**
 931  * DPDK callback to disable allmulticast mode.
 932  *
 933  * @param dev
 934  *   Pointer to Ethernet device structure.
 935  */
 936 static void
 937 mrvl_allmulticast_disable(struct rte_eth_dev *dev)
 938 {
 939         struct mrvl_priv *priv = dev->data->dev_private;
 940         int ret;
 941
 942         if (!priv->ppio)
 943                 return;
 944
 945         ret = pp2_ppio_set_mc_promisc(priv->ppio, 0);
 946         if (ret)
 947                 MRVL_LOG(ERR, "Failed to disable all-multicast mode");
 948 }
 949
 950 /**
 951  * DPDK callback to remove a MAC address.
 952  *
 953  * @param dev
 954  *   Pointer to Ethernet device structure.
 955  * @param index
 956  *   MAC address index.
 957  */
 958 static void
 959 mrvl_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
 960 {
 961         struct mrvl_priv *priv = dev->data->dev_private;
 962         char buf[ETHER_ADDR_FMT_SIZE];
 963         int ret;
 964
 965         if (!priv->ppio)
 966                 return;
 967
 968         if (priv->isolated)
 969                 return;
 970
 971         ret = pp2_ppio_remove_mac_addr(priv->ppio,
 972                                        dev->data->mac_addrs[index].addr_bytes);
 973         if (ret) {
 974                 ether_format_addr(buf, sizeof(buf),
 975                                   &dev->data->mac_addrs[index]);
 976                 MRVL_LOG(ERR, "Failed to remove mac %s", buf);
 977         }
 978 }
 979
 980 /**
 981  * DPDK callback to add a MAC address.
 982  *
 983  * @param dev
 984  *   Pointer to Ethernet device structure.
 985  * @param mac_addr
 986  *   MAC address to register.
 987  * @param index
 988  *   MAC address index.
 989  * @param vmdq
 990  *   VMDq pool index to associate address with (unused).
 991  *
 992  * @return
 993  *   0 on success, negative error value otherwise.
 994  */
 995 static int
 996 mrvl_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
 997                   uint32_t index, uint32_t vmdq __rte_unused)
 998 {
 999         struct mrvl_priv *priv = dev->data->dev_private;
1000         char buf[ETHER_ADDR_FMT_SIZE];
1001         int ret;
1002
1003         if (priv->isolated)
1004                 return -ENOTSUP;
1005
1006         if (index == 0)
1007                 /* For setting index 0, mrvl_mac_addr_set() should be used.*/
1008                 return -1;
1009
1010         if (!priv->ppio)
1011                 return 0;
1012
1013         /*
1014          * Maximum number of uc addresses can be tuned via kernel module mvpp2x
1015          * parameter uc_filter_max. Maximum number of mc addresses is then
1016          * MRVL_MAC_ADDRS_MAX - uc_filter_max. Currently it defaults to 4 and
1017          * 21 respectively.
1018          *
1019          * If more than uc_filter_max uc addresses were added to filter list
1020          * then NIC will switch to promiscuous mode automatically.
1021          *
1022          * If more than MRVL_MAC_ADDRS_MAX - uc_filter_max number mc addresses
1023          * were added to filter list then NIC will switch to all-multicast mode
1024          * automatically.
1025          */
1026         ret = pp2_ppio_add_mac_addr(priv->ppio, mac_addr->addr_bytes);
1027         if (ret) {
1028                 ether_format_addr(buf, sizeof(buf), mac_addr);
1029                 MRVL_LOG(ERR, "Failed to add mac %s", buf);
1030                 return -1;
1031         }
1032
1033         return 0;
1034 }
1035
1036 /**
1037  * DPDK callback to set the primary MAC address.
1038  *
1039  * @param dev
1040  *   Pointer to Ethernet device structure.
1041  * @param mac_addr
1042  *   MAC address to register.
1043  *
1044  * @return
1045  *   0 on success, negative error value otherwise.
1046  */
1047 static int
1048 mrvl_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
1049 {
1050         struct mrvl_priv *priv = dev->data->dev_private;
1051         int ret;
1052
1053         if (!priv->ppio)
1054                 return 0;
1055
1056         if (priv->isolated)
1057                 return -ENOTSUP;
1058
1059         ret = pp2_ppio_set_mac_addr(priv->ppio, mac_addr->addr_bytes);
1060         if (ret) {
1061                 char buf[ETHER_ADDR_FMT_SIZE];
1062                 ether_format_addr(buf, sizeof(buf), mac_addr);
1063                 MRVL_LOG(ERR, "Failed to set mac to %s", buf);
1064         }
1065
1066         return ret;
1067 }
1068
1069 /**
1070  * DPDK callback to get device statistics.
1071  *
1072  * @param dev
1073  *   Pointer to Ethernet device structure.
1074  * @param stats
1075  *   Stats structure output buffer.
1076  *
1077  * @return
1078  *   0 on success, negative error value otherwise.
1079  */
1080 static int
1081 mrvl_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1082 {
1083         struct mrvl_priv *priv = dev->data->dev_private;
1084         struct pp2_ppio_statistics ppio_stats;
1085         uint64_t drop_mac = 0;
1086         unsigned int i, idx, ret;
1087
1088         if (!priv->ppio)
1089                 return -EPERM;
1090
1091         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1092                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1093                 struct pp2_ppio_inq_statistics rx_stats;
1094
1095                 if (!rxq)
1096                         continue;
1097
1098                 idx = rxq->queue_id;
1099                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1100                         MRVL_LOG(ERR,
1101                                 "rx queue %d stats out of range (0 - %d)",
1102                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1103                         continue;
1104                 }
1105
1106                 ret = pp2_ppio_inq_get_statistics(priv->ppio,
1107                                                   priv->rxq_map[idx].tc,
1108                                                   priv->rxq_map[idx].inq,
1109                                                   &rx_stats, 0);
1110                 if (unlikely(ret)) {
1111                         MRVL_LOG(ERR,
1112                                 "Failed to update rx queue %d stats", idx);
1113                         break;
1114                 }
1115
1116                 stats->q_ibytes[idx] = rxq->bytes_recv;
1117                 stats->q_ipackets[idx] = rx_stats.enq_desc - rxq->drop_mac;
1118                 stats->q_errors[idx] = rx_stats.drop_early +
1119                                        rx_stats.drop_fullq +
1120                                        rx_stats.drop_bm +
1121                                        rxq->drop_mac;
1122                 stats->ibytes += rxq->bytes_recv;
1123                 drop_mac += rxq->drop_mac;
1124         }
1125
1126         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1127                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1128                 struct pp2_ppio_outq_statistics tx_stats;
1129
1130                 if (!txq)
1131                         continue;
1132
1133                 idx = txq->queue_id;
1134                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1135                         MRVL_LOG(ERR,
1136                                 "tx queue %d stats out of range (0 - %d)",
1137                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1138                 }
1139
1140                 ret = pp2_ppio_outq_get_statistics(priv->ppio, idx,
1141                                                    &tx_stats, 0);
1142                 if (unlikely(ret)) {
1143                         MRVL_LOG(ERR,
1144                                 "Failed to update tx queue %d stats", idx);
1145                         break;
1146                 }
1147
1148                 stats->q_opackets[idx] = tx_stats.deq_desc;
1149                 stats->q_obytes[idx] = txq->bytes_sent;
1150                 stats->obytes += txq->bytes_sent;
1151         }
1152
1153         ret = pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1154         if (unlikely(ret)) {
1155                 MRVL_LOG(ERR, "Failed to update port statistics");
1156                 return ret;
1157         }
1158
1159         stats->ipackets += ppio_stats.rx_packets - drop_mac;
1160         stats->opackets += ppio_stats.tx_packets;
1161         stats->imissed += ppio_stats.rx_fullq_dropped +
1162                           ppio_stats.rx_bm_dropped +
1163                           ppio_stats.rx_early_dropped +
1164                           ppio_stats.rx_fifo_dropped +
1165                           ppio_stats.rx_cls_dropped;
1166         stats->ierrors = drop_mac;
1167
1168         return 0;
1169 }
1170
1171 /**
1172  * DPDK callback to clear device statistics.
1173  *
1174  * @param dev
1175  *   Pointer to Ethernet device structure.
1176  */
1177 static void
1178 mrvl_stats_reset(struct rte_eth_dev *dev)
1179 {
1180         struct mrvl_priv *priv = dev->data->dev_private;
1181         int i;
1182
1183         if (!priv->ppio)
1184                 return;
1185
1186         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1187                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1188
1189                 pp2_ppio_inq_get_statistics(priv->ppio, priv->rxq_map[i].tc,
1190                                             priv->rxq_map[i].inq, NULL, 1);
1191                 rxq->bytes_recv = 0;
1192                 rxq->drop_mac = 0;
1193         }
1194
1195         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1196                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1197
1198                 pp2_ppio_outq_get_statistics(priv->ppio, i, NULL, 1);
1199                 txq->bytes_sent = 0;
1200         }
1201
1202         pp2_ppio_get_statistics(priv->ppio, NULL, 1);
1203 }
1204
1205 /**
1206  * DPDK callback to get extended statistics.
1207  *
1208  * @param dev
1209  *   Pointer to Ethernet device structure.
1210  * @param stats
1211  *   Pointer to xstats table.
1212  * @param n
1213  *   Number of entries in xstats table.
1214  * @return
1215  *   Negative value on error, number of read xstats otherwise.
1216  */
1217 static int
1218 mrvl_xstats_get(struct rte_eth_dev *dev,
1219                 struct rte_eth_xstat *stats, unsigned int n)
1220 {
1221         struct mrvl_priv *priv = dev->data->dev_private;
1222         struct pp2_ppio_statistics ppio_stats;
1223         unsigned int i;
1224
1225         if (!stats)
1226                 return 0;
1227
1228         pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1229         for (i = 0; i < n && i < RTE_DIM(mrvl_xstats_tbl); i++) {
1230                 uint64_t val;
1231
1232                 if (mrvl_xstats_tbl[i].size == sizeof(uint32_t))
1233                         val = *(uint32_t *)((uint8_t *)&ppio_stats +
1234                                             mrvl_xstats_tbl[i].offset);
1235                 else if (mrvl_xstats_tbl[i].size == sizeof(uint64_t))
1236                         val = *(uint64_t *)((uint8_t *)&ppio_stats +
1237                                             mrvl_xstats_tbl[i].offset);
1238                 else
1239                         return -EINVAL;
1240
1241                 stats[i].id = i;
1242                 stats[i].value = val;
1243         }
1244
1245         return n;
1246 }
1247
1248 /**
1249  * DPDK callback to reset extended statistics.
1250  *
1251  * @param dev
1252  *   Pointer to Ethernet device structure.
1253  */
1254 static void
1255 mrvl_xstats_reset(struct rte_eth_dev *dev)
1256 {
1257         mrvl_stats_reset(dev);
1258 }
1259
1260 /**
1261  * DPDK callback to get extended statistics names.
1262  *
1263  * @param dev (unused)
1264  *   Pointer to Ethernet device structure.
1265  * @param xstats_names
1266  *   Pointer to xstats names table.
1267  * @param size
1268  *   Size of the xstats names table.
1269  * @return
1270  *   Number of read names.
1271  */
1272 static int
1273 mrvl_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
1274                       struct rte_eth_xstat_name *xstats_names,
1275                       unsigned int size)
1276 {
1277         unsigned int i;
1278
1279         if (!xstats_names)
1280                 return RTE_DIM(mrvl_xstats_tbl);
1281
1282         for (i = 0; i < size && i < RTE_DIM(mrvl_xstats_tbl); i++)
1283                 snprintf(xstats_names[i].name, RTE_ETH_XSTATS_NAME_SIZE, "%s",
1284                          mrvl_xstats_tbl[i].name);
1285
1286         return size;
1287 }
1288
1289 /**
1290  * DPDK callback to get information about the device.
1291  *
1292  * @param dev
1293  *   Pointer to Ethernet device structure (unused).
1294  * @param info
1295  *   Info structure output buffer.
1296  */
1297 static void
1298 mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
1299                    struct rte_eth_dev_info *info)
1300 {
1301         info->speed_capa = ETH_LINK_SPEED_10M |
1302                            ETH_LINK_SPEED_100M |
1303                            ETH_LINK_SPEED_1G |
1304                            ETH_LINK_SPEED_10G;
1305
1306         info->max_rx_queues = MRVL_PP2_RXQ_MAX;
1307         info->max_tx_queues = MRVL_PP2_TXQ_MAX;
1308         info->max_mac_addrs = MRVL_MAC_ADDRS_MAX;
1309
1310         info->rx_desc_lim.nb_max = MRVL_PP2_RXD_MAX;
1311         info->rx_desc_lim.nb_min = MRVL_PP2_RXD_MIN;
1312         info->rx_desc_lim.nb_align = MRVL_PP2_RXD_ALIGN;
1313
1314         info->tx_desc_lim.nb_max = MRVL_PP2_TXD_MAX;
1315         info->tx_desc_lim.nb_min = MRVL_PP2_TXD_MIN;
1316         info->tx_desc_lim.nb_align = MRVL_PP2_TXD_ALIGN;
1317
1318         info->rx_offload_capa = MRVL_RX_OFFLOADS;
1319         info->rx_queue_offload_capa = MRVL_RX_OFFLOADS;
1320
1321         info->tx_offload_capa = MRVL_TX_OFFLOADS;
1322         info->tx_queue_offload_capa = MRVL_TX_OFFLOADS;
1323
1324         info->flow_type_rss_offloads = ETH_RSS_IPV4 |
1325                                        ETH_RSS_NONFRAG_IPV4_TCP |
1326                                        ETH_RSS_NONFRAG_IPV4_UDP;
1327
1328         /* By default packets are dropped if no descriptors are available */
1329         info->default_rxconf.rx_drop_en = 1;
1330
1331         info->max_rx_pktlen = MRVL_PKT_SIZE_MAX;
1332 }
1333
1334 /**
1335  * Return supported packet types.
1336  *
1337  * @param dev
1338  *   Pointer to Ethernet device structure (unused).
1339  *
1340  * @return
1341  *   Const pointer to the table with supported packet types.
1342  */
1343 static const uint32_t *
1344 mrvl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
1345 {
1346         static const uint32_t ptypes[] = {
1347                 RTE_PTYPE_L2_ETHER,
1348                 RTE_PTYPE_L2_ETHER_VLAN,
1349                 RTE_PTYPE_L2_ETHER_QINQ,
1350                 RTE_PTYPE_L3_IPV4,
1351                 RTE_PTYPE_L3_IPV4_EXT,
1352                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
1353                 RTE_PTYPE_L3_IPV6,
1354                 RTE_PTYPE_L3_IPV6_EXT,
1355                 RTE_PTYPE_L2_ETHER_ARP,
1356                 RTE_PTYPE_L4_TCP,
1357                 RTE_PTYPE_L4_UDP
1358         };
1359
1360         return ptypes;
1361 }
1362
1363 /**
1364  * DPDK callback to get information about specific receive queue.
1365  *
1366  * @param dev
1367  *   Pointer to Ethernet device structure.
1368  * @param rx_queue_id
1369  *   Receive queue index.
1370  * @param qinfo
1371  *   Receive queue information structure.
1372  */
1373 static void mrvl_rxq_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
1374                               struct rte_eth_rxq_info *qinfo)
1375 {
1376         struct mrvl_rxq *q = dev->data->rx_queues[rx_queue_id];
1377         struct mrvl_priv *priv = dev->data->dev_private;
1378         int inq = priv->rxq_map[rx_queue_id].inq;
1379         int tc = priv->rxq_map[rx_queue_id].tc;
1380         struct pp2_ppio_tc_params *tc_params =
1381                 &priv->ppio_params.inqs_params.tcs_params[tc];
1382
1383         qinfo->mp = q->mp;
1384         qinfo->nb_desc = tc_params->inqs_params[inq].size;
1385 }
1386
1387 /**
1388  * DPDK callback to get information about specific transmit queue.
1389  *
1390  * @param dev
1391  *   Pointer to Ethernet device structure.
1392  * @param tx_queue_id
1393  *   Transmit queue index.
1394  * @param qinfo
1395  *   Transmit queue information structure.
1396  */
1397 static void mrvl_txq_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
1398                               struct rte_eth_txq_info *qinfo)
1399 {
1400         struct mrvl_priv *priv = dev->data->dev_private;
1401         struct mrvl_txq *txq = dev->data->tx_queues[tx_queue_id];
1402
1403         qinfo->nb_desc =
1404                 priv->ppio_params.outqs_params.outqs_params[tx_queue_id].size;
1405         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1406 }
1407
1408 /**
1409  * DPDK callback to Configure a VLAN filter.
1410  *
1411  * @param dev
1412  *   Pointer to Ethernet device structure.
1413  * @param vlan_id
1414  *   VLAN ID to filter.
1415  * @param on
1416  *   Toggle filter.
1417  *
1418  * @return
1419  *   0 on success, negative error value otherwise.
1420  */
1421 static int
1422 mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1423 {
1424         struct mrvl_priv *priv = dev->data->dev_private;
1425
1426         if (!priv->ppio)
1427                 return -EPERM;
1428
1429         if (priv->isolated)
1430                 return -ENOTSUP;
1431
1432         return on ? pp2_ppio_add_vlan(priv->ppio, vlan_id) :
1433                     pp2_ppio_remove_vlan(priv->ppio, vlan_id);
1434 }
1435
1436 /**
1437  * Release buffers to hardware bpool (buffer-pool)
1438  *
1439  * @param rxq
1440  *   Receive queue pointer.
1441  * @param num
1442  *   Number of buffers to release to bpool.
1443  *
1444  * @return
1445  *   0 on success, negative error value otherwise.
1446  */
1447 static int
1448 mrvl_fill_bpool(struct mrvl_rxq *rxq, int num)
1449 {
1450         struct buff_release_entry entries[MRVL_PP2_RXD_MAX];
1451         struct rte_mbuf *mbufs[MRVL_PP2_RXD_MAX];
1452         int i, ret;
1453         unsigned int core_id;
1454         struct pp2_hif *hif;
1455         struct pp2_bpool *bpool;
1456
1457         core_id = rte_lcore_id();
1458         if (core_id == LCORE_ID_ANY)
1459                 core_id = 0;
1460
1461         hif = mrvl_get_hif(rxq->priv, core_id);
1462         if (!hif)
1463                 return -1;
1464
1465         bpool = rxq->priv->bpool;
1466
1467         ret = rte_pktmbuf_alloc_bulk(rxq->mp, mbufs, num);
1468         if (ret)
1469                 return ret;
1470
1471         if (cookie_addr_high == MRVL_COOKIE_ADDR_INVALID)
1472                 cookie_addr_high =
1473                         (uint64_t)mbufs[0] & MRVL_COOKIE_HIGH_ADDR_MASK;
1474
1475         for (i = 0; i < num; i++) {
1476                 if (((uint64_t)mbufs[i] & MRVL_COOKIE_HIGH_ADDR_MASK)
1477                         != cookie_addr_high) {
1478                         MRVL_LOG(ERR,
1479                                 "mbuf virtual addr high 0x%lx out of range",
1480                                 (uint64_t)mbufs[i] >> 32);
1481                         goto out;
1482                 }
1483
1484                 entries[i].buff.addr =
1485                         rte_mbuf_data_iova_default(mbufs[i]);
1486                 entries[i].buff.cookie = (pp2_cookie_t)(uint64_t)mbufs[i];
1487                 entries[i].bpool = bpool;
1488         }
1489
1490         pp2_bpool_put_buffs(hif, entries, (uint16_t *)&i);
1491         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] += i;
1492
1493         if (i != num)
1494                 goto out;
1495
1496         return 0;
1497 out:
1498         for (; i < num; i++)
1499                 rte_pktmbuf_free(mbufs[i]);
1500
1501         return -1;
1502 }
1503
1504 /**
1505  * DPDK callback to configure the receive queue.
1506  *
1507  * @param dev
1508  *   Pointer to Ethernet device structure.
1509  * @param idx
1510  *   RX queue index.
1511  * @param desc
1512  *   Number of descriptors to configure in queue.
1513  * @param socket
1514  *   NUMA socket on which memory must be allocated.
1515  * @param conf
1516  *   Thresholds parameters.
1517  * @param mp
1518  *   Memory pool for buffer allocations.
1519  *
1520  * @return
1521  *   0 on success, negative error value otherwise.
1522  */
1523 static int
1524 mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1525                     unsigned int socket,
1526                     const struct rte_eth_rxconf *conf,
1527                     struct rte_mempool *mp)
1528 {
1529         struct mrvl_priv *priv = dev->data->dev_private;
1530         struct mrvl_rxq *rxq;
1531         uint32_t min_size,
1532                  max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1533         int ret, tc, inq;
1534         uint64_t offloads;
1535
1536         offloads = conf->offloads | dev->data->dev_conf.rxmode.offloads;
1537
1538         if (priv->rxq_map[idx].tc == MRVL_UNKNOWN_TC) {
1539                 /*
1540                  * Unknown TC mapping, mapping will not have a correct queue.
1541                  */
1542                 MRVL_LOG(ERR, "Unknown TC mapping for queue %hu eth%hhu",
1543                         idx, priv->ppio_id);
1544                 return -EFAULT;
1545         }
1546
1547         min_size = rte_pktmbuf_data_room_size(mp) - RTE_PKTMBUF_HEADROOM -
1548                    MRVL_PKT_EFFEC_OFFS;
1549         if (min_size < max_rx_pkt_len) {
1550                 MRVL_LOG(ERR,
1551                         "Mbuf size must be increased to %u bytes to hold up to %u bytes of data.",
1552                         max_rx_pkt_len + RTE_PKTMBUF_HEADROOM +
1553                         MRVL_PKT_EFFEC_OFFS,
1554                         max_rx_pkt_len);
1555                 return -EINVAL;
1556         }
1557
1558         if (dev->data->rx_queues[idx]) {
1559                 rte_free(dev->data->rx_queues[idx]);
1560                 dev->data->rx_queues[idx] = NULL;
1561         }
1562
1563         rxq = rte_zmalloc_socket("rxq", sizeof(*rxq), 0, socket);
1564         if (!rxq)
1565                 return -ENOMEM;
1566
1567         rxq->priv = priv;
1568         rxq->mp = mp;
1569         rxq->cksum_enabled = offloads & DEV_RX_OFFLOAD_IPV4_CKSUM;
1570         rxq->queue_id = idx;
1571         rxq->port_id = dev->data->port_id;
1572         mrvl_port_to_bpool_lookup[rxq->port_id] = priv->bpool;
1573
1574         tc = priv->rxq_map[rxq->queue_id].tc,
1575         inq = priv->rxq_map[rxq->queue_id].inq;
1576         priv->ppio_params.inqs_params.tcs_params[tc].inqs_params[inq].size =
1577                 desc;
1578
1579         ret = mrvl_fill_bpool(rxq, desc);
1580         if (ret) {
1581                 rte_free(rxq);
1582                 return ret;
1583         }
1584
1585         priv->bpool_init_size += desc;
1586
1587         dev->data->rx_queues[idx] = rxq;
1588
1589         return 0;
1590 }
1591
1592 /**
1593  * DPDK callback to release the receive queue.
1594  *
1595  * @param rxq
1596  *   Generic receive queue pointer.
1597  */
1598 static void
1599 mrvl_rx_queue_release(void *rxq)
1600 {
1601         struct mrvl_rxq *q = rxq;
1602         struct pp2_ppio_tc_params *tc_params;
1603         int i, num, tc, inq;
1604         struct pp2_hif *hif;
1605         unsigned int core_id = rte_lcore_id();
1606
1607         if (core_id == LCORE_ID_ANY)
1608                 core_id = 0;
1609
1610         if (!q)
1611                 return;
1612
1613         hif = mrvl_get_hif(q->priv, core_id);
1614
1615         if (!hif)
1616                 return;
1617
1618         tc = q->priv->rxq_map[q->queue_id].tc;
1619         inq = q->priv->rxq_map[q->queue_id].inq;
1620         tc_params = &q->priv->ppio_params.inqs_params.tcs_params[tc];
1621         num = tc_params->inqs_params[inq].size;
1622         for (i = 0; i < num; i++) {
1623                 struct pp2_buff_inf inf;
1624                 uint64_t addr;
1625
1626                 pp2_bpool_get_buff(hif, q->priv->bpool, &inf);
1627                 addr = cookie_addr_high | inf.cookie;
1628                 rte_pktmbuf_free((struct rte_mbuf *)addr);
1629         }
1630
1631         rte_free(q);
1632 }
1633
1634 /**
1635  * DPDK callback to configure the transmit queue.
1636  *
1637  * @param dev
1638  *   Pointer to Ethernet device structure.
1639  * @param idx
1640  *   Transmit queue index.
1641  * @param desc
1642  *   Number of descriptors to configure in the queue.
1643  * @param socket
1644  *   NUMA socket on which memory must be allocated.
1645  * @param conf
1646  *   Tx queue configuration parameters.
1647  *
1648  * @return
1649  *   0 on success, negative error value otherwise.
1650  */
1651 static int
1652 mrvl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1653                     unsigned int socket,
1654                     const struct rte_eth_txconf *conf)
1655 {
1656         struct mrvl_priv *priv = dev->data->dev_private;
1657         struct mrvl_txq *txq;
1658
1659         if (dev->data->tx_queues[idx]) {
1660                 rte_free(dev->data->tx_queues[idx]);
1661                 dev->data->tx_queues[idx] = NULL;
1662         }
1663
1664         txq = rte_zmalloc_socket("txq", sizeof(*txq), 0, socket);
1665         if (!txq)
1666                 return -ENOMEM;
1667
1668         txq->priv = priv;
1669         txq->queue_id = idx;
1670         txq->port_id = dev->data->port_id;
1671         txq->tx_deferred_start = conf->tx_deferred_start;
1672         dev->data->tx_queues[idx] = txq;
1673
1674         priv->ppio_params.outqs_params.outqs_params[idx].size = desc;
1675
1676         return 0;
1677 }
1678
1679 /**
1680  * DPDK callback to release the transmit queue.
1681  *
1682  * @param txq
1683  *   Generic transmit queue pointer.
1684  */
1685 static void
1686 mrvl_tx_queue_release(void *txq)
1687 {
1688         struct mrvl_txq *q = txq;
1689
1690         if (!q)
1691                 return;
1692
1693         rte_free(q);
1694 }
1695
1696 /**
1697  * DPDK callback to get flow control configuration.
1698  *
1699  * @param dev
1700  *  Pointer to Ethernet device structure.
1701  * @param fc_conf
1702  *  Pointer to the flow control configuration.
1703  *
1704  * @return
1705  *  0 on success, negative error value otherwise.
1706  */
1707 static int
1708 mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1709 {
1710         struct mrvl_priv *priv = dev->data->dev_private;
1711         int ret, en;
1712
1713         if (!priv)
1714                 return -EPERM;
1715
1716         ret = pp2_ppio_get_rx_pause(priv->ppio, &en);
1717         if (ret) {
1718                 MRVL_LOG(ERR, "Failed to read rx pause state");
1719                 return ret;
1720         }
1721
1722         fc_conf->mode = en ? RTE_FC_RX_PAUSE : RTE_FC_NONE;
1723
1724         return 0;
1725 }
1726
1727 /**
1728  * DPDK callback to set flow control configuration.
1729  *
1730  * @param dev
1731  *  Pointer to Ethernet device structure.
1732  * @param fc_conf
1733  *  Pointer to the flow control configuration.
1734  *
1735  * @return
1736  *  0 on success, negative error value otherwise.
1737  */
1738 static int
1739 mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1740 {
1741         struct mrvl_priv *priv = dev->data->dev_private;
1742
1743         if (!priv)
1744                 return -EPERM;
1745
1746         if (fc_conf->high_water ||
1747             fc_conf->low_water ||
1748             fc_conf->pause_time ||
1749             fc_conf->mac_ctrl_frame_fwd ||
1750             fc_conf->autoneg) {
1751                 MRVL_LOG(ERR, "Flowctrl parameter is not supported");
1752
1753                 return -EINVAL;
1754         }
1755
1756         if (fc_conf->mode == RTE_FC_NONE ||
1757             fc_conf->mode == RTE_FC_RX_PAUSE) {
1758                 int ret, en;
1759
1760                 en = fc_conf->mode == RTE_FC_NONE ? 0 : 1;
1761                 ret = pp2_ppio_set_rx_pause(priv->ppio, en);
1762                 if (ret)
1763                         MRVL_LOG(ERR,
1764                                 "Failed to change flowctrl on RX side");
1765
1766                 return ret;
1767         }
1768
1769         return 0;
1770 }
1771
1772 /**
1773  * Update RSS hash configuration
1774  *
1775  * @param dev
1776  *   Pointer to Ethernet device structure.
1777  * @param rss_conf
1778  *   Pointer to RSS configuration.
1779  *
1780  * @return
1781  *   0 on success, negative error value otherwise.
1782  */
1783 static int
1784 mrvl_rss_hash_update(struct rte_eth_dev *dev,
1785                      struct rte_eth_rss_conf *rss_conf)
1786 {
1787         struct mrvl_priv *priv = dev->data->dev_private;
1788
1789         if (priv->isolated)
1790                 return -ENOTSUP;
1791
1792         return mrvl_configure_rss(priv, rss_conf);
1793 }
1794
1795 /**
1796  * DPDK callback to get RSS hash configuration.
1797  *
1798  * @param dev
1799  *   Pointer to Ethernet device structure.
1800  * @rss_conf
1801  *   Pointer to RSS configuration.
1802  *
1803  * @return
1804  *   Always 0.
1805  */
1806 static int
1807 mrvl_rss_hash_conf_get(struct rte_eth_dev *dev,
1808                        struct rte_eth_rss_conf *rss_conf)
1809 {
1810         struct mrvl_priv *priv = dev->data->dev_private;
1811         enum pp2_ppio_hash_type hash_type =
1812                 priv->ppio_params.inqs_params.hash_type;
1813
1814         rss_conf->rss_key = NULL;
1815
1816         if (hash_type == PP2_PPIO_HASH_T_NONE)
1817                 rss_conf->rss_hf = 0;
1818         else if (hash_type == PP2_PPIO_HASH_T_2_TUPLE)
1819                 rss_conf->rss_hf = ETH_RSS_IPV4;
1820         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && priv->rss_hf_tcp)
1821                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_TCP;
1822         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && !priv->rss_hf_tcp)
1823                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_UDP;
1824
1825         return 0;
1826 }
1827
1828 /**
1829  * DPDK callback to get rte_flow callbacks.
1830  *
1831  * @param dev
1832  *   Pointer to the device structure.
1833  * @param filer_type
1834  *   Flow filter type.
1835  * @param filter_op
1836  *   Flow filter operation.
1837  * @param arg
1838  *   Pointer to pass the flow ops.
1839  *
1840  * @return
1841  *   0 on success, negative error value otherwise.
1842  */
1843 static int
1844 mrvl_eth_filter_ctrl(struct rte_eth_dev *dev __rte_unused,
1845                      enum rte_filter_type filter_type,
1846                      enum rte_filter_op filter_op, void *arg)
1847 {
1848         switch (filter_type) {
1849         case RTE_ETH_FILTER_GENERIC:
1850                 if (filter_op != RTE_ETH_FILTER_GET)
1851                         return -EINVAL;
1852                 *(const void **)arg = &mrvl_flow_ops;
1853                 return 0;
1854         default:
1855                 MRVL_LOG(WARNING, "Filter type (%d) not supported",
1856                                 filter_type);
1857                 return -EINVAL;
1858         }
1859 }
1860
1861 static const struct eth_dev_ops mrvl_ops = {
1862         .dev_configure = mrvl_dev_configure,
1863         .dev_start = mrvl_dev_start,
1864         .dev_stop = mrvl_dev_stop,
1865         .dev_set_link_up = mrvl_dev_set_link_up,
1866         .dev_set_link_down = mrvl_dev_set_link_down,
1867         .dev_close = mrvl_dev_close,
1868         .link_update = mrvl_link_update,
1869         .promiscuous_enable = mrvl_promiscuous_enable,
1870         .allmulticast_enable = mrvl_allmulticast_enable,
1871         .promiscuous_disable = mrvl_promiscuous_disable,
1872         .allmulticast_disable = mrvl_allmulticast_disable,
1873         .mac_addr_remove = mrvl_mac_addr_remove,
1874         .mac_addr_add = mrvl_mac_addr_add,
1875         .mac_addr_set = mrvl_mac_addr_set,
1876         .mtu_set = mrvl_mtu_set,
1877         .stats_get = mrvl_stats_get,
1878         .stats_reset = mrvl_stats_reset,
1879         .xstats_get = mrvl_xstats_get,
1880         .xstats_reset = mrvl_xstats_reset,
1881         .xstats_get_names = mrvl_xstats_get_names,
1882         .dev_infos_get = mrvl_dev_infos_get,
1883         .dev_supported_ptypes_get = mrvl_dev_supported_ptypes_get,
1884         .rxq_info_get = mrvl_rxq_info_get,
1885         .txq_info_get = mrvl_txq_info_get,
1886         .vlan_filter_set = mrvl_vlan_filter_set,
1887         .tx_queue_start = mrvl_tx_queue_start,
1888         .tx_queue_stop = mrvl_tx_queue_stop,
1889         .rx_queue_setup = mrvl_rx_queue_setup,
1890         .rx_queue_release = mrvl_rx_queue_release,
1891         .tx_queue_setup = mrvl_tx_queue_setup,
1892         .tx_queue_release = mrvl_tx_queue_release,
1893         .flow_ctrl_get = mrvl_flow_ctrl_get,
1894         .flow_ctrl_set = mrvl_flow_ctrl_set,
1895         .rss_hash_update = mrvl_rss_hash_update,
1896         .rss_hash_conf_get = mrvl_rss_hash_conf_get,
1897         .filter_ctrl = mrvl_eth_filter_ctrl,
1898 };
1899
1900 /**
1901  * Return packet type information and l3/l4 offsets.
1902  *
1903  * @param desc
1904  *   Pointer to the received packet descriptor.
1905  * @param l3_offset
1906  *   l3 packet offset.
1907  * @param l4_offset
1908  *   l4 packet offset.
1909  *
1910  * @return
1911  *   Packet type information.
1912  */
1913 static inline uint64_t
1914 mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc *desc,
1915                                     uint8_t *l3_offset, uint8_t *l4_offset)
1916 {
1917         enum pp2_inq_l3_type l3_type;
1918         enum pp2_inq_l4_type l4_type;
1919         enum pp2_inq_vlan_tag vlan_tag;
1920         uint64_t packet_type;
1921
1922         pp2_ppio_inq_desc_get_l3_info(desc, &l3_type, l3_offset);
1923         pp2_ppio_inq_desc_get_l4_info(desc, &l4_type, l4_offset);
1924         pp2_ppio_inq_desc_get_vlan_tag(desc, &vlan_tag);
1925
1926         packet_type = RTE_PTYPE_L2_ETHER;
1927
1928         switch (vlan_tag) {
1929         case PP2_INQ_VLAN_TAG_SINGLE:
1930                 packet_type |= RTE_PTYPE_L2_ETHER_VLAN;
1931                 break;
1932         case PP2_INQ_VLAN_TAG_DOUBLE:
1933         case PP2_INQ_VLAN_TAG_TRIPLE:
1934                 packet_type |= RTE_PTYPE_L2_ETHER_QINQ;
1935                 break;
1936         default:
1937                 break;
1938         }
1939
1940         switch (l3_type) {
1941         case PP2_INQ_L3_TYPE_IPV4_NO_OPTS:
1942                 packet_type |= RTE_PTYPE_L3_IPV4;
1943                 break;
1944         case PP2_INQ_L3_TYPE_IPV4_OK:
1945                 packet_type |= RTE_PTYPE_L3_IPV4_EXT;
1946                 break;
1947         case PP2_INQ_L3_TYPE_IPV4_TTL_ZERO:
1948                 packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
1949                 break;
1950         case PP2_INQ_L3_TYPE_IPV6_NO_EXT:
1951                 packet_type |= RTE_PTYPE_L3_IPV6;
1952                 break;
1953         case PP2_INQ_L3_TYPE_IPV6_EXT:
1954                 packet_type |= RTE_PTYPE_L3_IPV6_EXT;
1955                 break;
1956         case PP2_INQ_L3_TYPE_ARP:
1957                 packet_type |= RTE_PTYPE_L2_ETHER_ARP;
1958                 /*
1959                  * In case of ARP l4_offset is set to wrong value.
1960                  * Set it to proper one so that later on mbuf->l3_len can be
1961                  * calculated subtracting l4_offset and l3_offset.
1962                  */
1963                 *l4_offset = *l3_offset + MRVL_ARP_LENGTH;
1964                 break;
1965         default:
1966                 MRVL_LOG(DEBUG, "Failed to recognise l3 packet type");
1967                 break;
1968         }
1969
1970         switch (l4_type) {
1971         case PP2_INQ_L4_TYPE_TCP:
1972                 packet_type |= RTE_PTYPE_L4_TCP;
1973                 break;
1974         case PP2_INQ_L4_TYPE_UDP:
1975                 packet_type |= RTE_PTYPE_L4_UDP;
1976                 break;
1977         default:
1978                 MRVL_LOG(DEBUG, "Failed to recognise l4 packet type");
1979                 break;
1980         }
1981
1982         return packet_type;
1983 }
1984
1985 /**
1986  * Get offload information from the received packet descriptor.
1987  *
1988  * @param desc
1989  *   Pointer to the received packet descriptor.
1990  *
1991  * @return
1992  *   Mbuf offload flags.
1993  */
1994 static inline uint64_t
1995 mrvl_desc_to_ol_flags(struct pp2_ppio_desc *desc)
1996 {
1997         uint64_t flags;
1998         enum pp2_inq_desc_status status;
1999
2000         status = pp2_ppio_inq_desc_get_l3_pkt_error(desc);
2001         if (unlikely(status != PP2_DESC_ERR_OK))
2002                 flags = PKT_RX_IP_CKSUM_BAD;
2003         else
2004                 flags = PKT_RX_IP_CKSUM_GOOD;
2005
2006         status = pp2_ppio_inq_desc_get_l4_pkt_error(desc);
2007         if (unlikely(status != PP2_DESC_ERR_OK))
2008                 flags |= PKT_RX_L4_CKSUM_BAD;
2009         else
2010                 flags |= PKT_RX_L4_CKSUM_GOOD;
2011
2012         return flags;
2013 }
2014
2015 /**
2016  * DPDK callback for receive.
2017  *
2018  * @param rxq
2019  *   Generic pointer to the receive queue.
2020  * @param rx_pkts
2021  *   Array to store received packets.
2022  * @param nb_pkts
2023  *   Maximum number of packets in array.
2024  *
2025  * @return
2026  *   Number of packets successfully received.
2027  */
2028 static uint16_t
2029 mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
2030 {
2031         struct mrvl_rxq *q = rxq;
2032         struct pp2_ppio_desc descs[nb_pkts];
2033         struct pp2_bpool *bpool;
2034         int i, ret, rx_done = 0;
2035         int num;
2036         struct pp2_hif *hif;
2037         unsigned int core_id = rte_lcore_id();
2038
2039         hif = mrvl_get_hif(q->priv, core_id);
2040
2041         if (unlikely(!q->priv->ppio || !hif))
2042                 return 0;
2043
2044         bpool = q->priv->bpool;
2045
2046         ret = pp2_ppio_recv(q->priv->ppio, q->priv->rxq_map[q->queue_id].tc,
2047                             q->priv->rxq_map[q->queue_id].inq, descs, &nb_pkts);
2048         if (unlikely(ret < 0)) {
2049                 MRVL_LOG(ERR, "Failed to receive packets");
2050                 return 0;
2051         }
2052         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] -= nb_pkts;
2053
2054         for (i = 0; i < nb_pkts; i++) {
2055                 struct rte_mbuf *mbuf;
2056                 uint8_t l3_offset, l4_offset;
2057                 enum pp2_inq_desc_status status;
2058                 uint64_t addr;
2059
2060                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2061                         struct pp2_ppio_desc *pref_desc;
2062                         u64 pref_addr;
2063
2064                         pref_desc = &descs[i + MRVL_MUSDK_PREFETCH_SHIFT];
2065                         pref_addr = cookie_addr_high |
2066                                     pp2_ppio_inq_desc_get_cookie(pref_desc);
2067                         rte_mbuf_prefetch_part1((struct rte_mbuf *)(pref_addr));
2068                         rte_mbuf_prefetch_part2((struct rte_mbuf *)(pref_addr));
2069                 }
2070
2071                 addr = cookie_addr_high |
2072                        pp2_ppio_inq_desc_get_cookie(&descs[i]);
2073                 mbuf = (struct rte_mbuf *)addr;
2074                 rte_pktmbuf_reset(mbuf);
2075
2076                 /* drop packet in case of mac, overrun or resource error */
2077                 status = pp2_ppio_inq_desc_get_l2_pkt_error(&descs[i]);
2078                 if (unlikely(status != PP2_DESC_ERR_OK)) {
2079                         struct pp2_buff_inf binf = {
2080                                 .addr = rte_mbuf_data_iova_default(mbuf),
2081                                 .cookie = (pp2_cookie_t)(uint64_t)mbuf,
2082                         };
2083
2084                         pp2_bpool_put_buff(hif, bpool, &binf);
2085                         mrvl_port_bpool_size
2086                                 [bpool->pp2_id][bpool->id][core_id]++;
2087                         q->drop_mac++;
2088                         continue;
2089                 }
2090
2091                 mbuf->data_off += MRVL_PKT_EFFEC_OFFS;
2092                 mbuf->pkt_len = pp2_ppio_inq_desc_get_pkt_len(&descs[i]);
2093                 mbuf->data_len = mbuf->pkt_len;
2094                 mbuf->port = q->port_id;
2095                 mbuf->packet_type =
2096                         mrvl_desc_to_packet_type_and_offset(&descs[i],
2097                                                             &l3_offset,
2098                                                             &l4_offset);
2099                 mbuf->l2_len = l3_offset;
2100                 mbuf->l3_len = l4_offset - l3_offset;
2101
2102                 if (likely(q->cksum_enabled))
2103                         mbuf->ol_flags = mrvl_desc_to_ol_flags(&descs[i]);
2104
2105                 rx_pkts[rx_done++] = mbuf;
2106                 q->bytes_recv += mbuf->pkt_len;
2107         }
2108
2109         if (rte_spinlock_trylock(&q->priv->lock) == 1) {
2110                 num = mrvl_get_bpool_size(bpool->pp2_id, bpool->id);
2111
2112                 if (unlikely(num <= q->priv->bpool_min_size ||
2113                              (!rx_done && num < q->priv->bpool_init_size))) {
2114                         ret = mrvl_fill_bpool(q, MRVL_BURST_SIZE);
2115                         if (ret)
2116                                 MRVL_LOG(ERR, "Failed to fill bpool");
2117                 } else if (unlikely(num > q->priv->bpool_max_size)) {
2118                         int i;
2119                         int pkt_to_remove = num - q->priv->bpool_init_size;
2120                         struct rte_mbuf *mbuf;
2121                         struct pp2_buff_inf buff;
2122
2123                         MRVL_LOG(DEBUG,
2124                                 "port-%d:%d: bpool %d oversize - remove %d buffers (pool size: %d -> %d)",
2125                                 bpool->pp2_id, q->priv->ppio->port_id,
2126                                 bpool->id, pkt_to_remove, num,
2127                                 q->priv->bpool_init_size);
2128
2129                         for (i = 0; i < pkt_to_remove; i++) {
2130                                 ret = pp2_bpool_get_buff(hif, bpool, &buff);
2131                                 if (ret)
2132                                         break;
2133                                 mbuf = (struct rte_mbuf *)
2134                                         (cookie_addr_high | buff.cookie);
2135                                 rte_pktmbuf_free(mbuf);
2136                         }
2137                         mrvl_port_bpool_size
2138                                 [bpool->pp2_id][bpool->id][core_id] -= i;
2139                 }
2140                 rte_spinlock_unlock(&q->priv->lock);
2141         }
2142
2143         return rx_done;
2144 }
2145
2146 /**
2147  * Prepare offload information.
2148  *
2149  * @param ol_flags
2150  *   Offload flags.
2151  * @param packet_type
2152  *   Packet type bitfield.
2153  * @param l3_type
2154  *   Pointer to the pp2_ouq_l3_type structure.
2155  * @param l4_type
2156  *   Pointer to the pp2_outq_l4_type structure.
2157  * @param gen_l3_cksum
2158  *   Will be set to 1 in case l3 checksum is computed.
2159  * @param l4_cksum
2160  *   Will be set to 1 in case l4 checksum is computed.
2161  *
2162  * @return
2163  *   0 on success, negative error value otherwise.
2164  */
2165 static inline int
2166 mrvl_prepare_proto_info(uint64_t ol_flags, uint32_t packet_type,
2167                         enum pp2_outq_l3_type *l3_type,
2168                         enum pp2_outq_l4_type *l4_type,
2169                         int *gen_l3_cksum,
2170                         int *gen_l4_cksum)
2171 {
2172         /*
2173          * Based on ol_flags prepare information
2174          * for pp2_ppio_outq_desc_set_proto_info() which setups descriptor
2175          * for offloading.
2176          */
2177         if (ol_flags & PKT_TX_IPV4) {
2178                 *l3_type = PP2_OUTQ_L3_TYPE_IPV4;
2179                 *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0;
2180         } else if (ol_flags & PKT_TX_IPV6) {
2181                 *l3_type = PP2_OUTQ_L3_TYPE_IPV6;
2182                 /* no checksum for ipv6 header */
2183                 *gen_l3_cksum = 0;
2184         } else {
2185                 /* if something different then stop processing */
2186                 return -1;
2187         }
2188
2189         ol_flags &= PKT_TX_L4_MASK;
2190         if ((packet_type & RTE_PTYPE_L4_TCP) &&
2191             ol_flags == PKT_TX_TCP_CKSUM) {
2192                 *l4_type = PP2_OUTQ_L4_TYPE_TCP;
2193                 *gen_l4_cksum = 1;
2194         } else if ((packet_type & RTE_PTYPE_L4_UDP) &&
2195                    ol_flags == PKT_TX_UDP_CKSUM) {
2196                 *l4_type = PP2_OUTQ_L4_TYPE_UDP;
2197                 *gen_l4_cksum = 1;
2198         } else {
2199                 *l4_type = PP2_OUTQ_L4_TYPE_OTHER;
2200                 /* no checksum for other type */
2201                 *gen_l4_cksum = 0;
2202         }
2203
2204         return 0;
2205 }
2206
2207 /**
2208  * Release already sent buffers to bpool (buffer-pool).
2209  *
2210  * @param ppio
2211  *   Pointer to the port structure.
2212  * @param hif
2213  *   Pointer to the MUSDK hardware interface.
2214  * @param sq
2215  *   Pointer to the shadow queue.
2216  * @param qid
2217  *   Queue id number.
2218  * @param force
2219  *   Force releasing packets.
2220  */
2221 static inline void
2222 mrvl_free_sent_buffers(struct pp2_ppio *ppio, struct pp2_hif *hif,
2223                        unsigned int core_id, struct mrvl_shadow_txq *sq,
2224                        int qid, int force)
2225 {
2226         struct buff_release_entry *entry;
2227         uint16_t nb_done = 0, num = 0, skip_bufs = 0;
2228         int i;
2229
2230         pp2_ppio_get_num_outq_done(ppio, hif, qid, &nb_done);
2231
2232         sq->num_to_release += nb_done;
2233
2234         if (likely(!force &&
2235                    sq->num_to_release < MRVL_PP2_BUF_RELEASE_BURST_SIZE))
2236                 return;
2237
2238         nb_done = sq->num_to_release;
2239         sq->num_to_release = 0;
2240
2241         for (i = 0; i < nb_done; i++) {
2242                 entry = &sq->ent[sq->tail + num];
2243                 if (unlikely(!entry->buff.addr)) {
2244                         MRVL_LOG(ERR,
2245                                 "Shadow memory @%d: cookie(%lx), pa(%lx)!",
2246                                 sq->tail, (u64)entry->buff.cookie,
2247                                 (u64)entry->buff.addr);
2248                         skip_bufs = 1;
2249                         goto skip;
2250                 }
2251
2252                 if (unlikely(!entry->bpool)) {
2253                         struct rte_mbuf *mbuf;
2254
2255                         mbuf = (struct rte_mbuf *)
2256                                (cookie_addr_high | entry->buff.cookie);
2257                         rte_pktmbuf_free(mbuf);
2258                         skip_bufs = 1;
2259                         goto skip;
2260                 }
2261
2262                 mrvl_port_bpool_size
2263                         [entry->bpool->pp2_id][entry->bpool->id][core_id]++;
2264                 num++;
2265                 if (unlikely(sq->tail + num == MRVL_PP2_TX_SHADOWQ_SIZE))
2266                         goto skip;
2267                 continue;
2268 skip:
2269                 if (likely(num))
2270                         pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2271                 num += skip_bufs;
2272                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2273                 sq->size -= num;
2274                 num = 0;
2275                 skip_bufs = 0;
2276         }
2277
2278         if (likely(num)) {
2279                 pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2280                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2281                 sq->size -= num;
2282         }
2283 }
2284
2285 /**
2286  * DPDK callback for transmit.
2287  *
2288  * @param txq
2289  *   Generic pointer transmit queue.
2290  * @param tx_pkts
2291  *   Packets to transmit.
2292  * @param nb_pkts
2293  *   Number of packets in array.
2294  *
2295  * @return
2296  *   Number of packets successfully transmitted.
2297  */
2298 static uint16_t
2299 mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
2300 {
2301         struct mrvl_txq *q = txq;
2302         struct mrvl_shadow_txq *sq;
2303         struct pp2_hif *hif;
2304         struct pp2_ppio_desc descs[nb_pkts];
2305         unsigned int core_id = rte_lcore_id();
2306         int i, ret, bytes_sent = 0;
2307         uint16_t num, sq_free_size;
2308         uint64_t addr;
2309
2310         hif = mrvl_get_hif(q->priv, core_id);
2311         sq = &q->shadow_txqs[core_id];
2312
2313         if (unlikely(!q->priv->ppio || !hif))
2314                 return 0;
2315
2316         if (sq->size)
2317                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2318                                        sq, q->queue_id, 0);
2319
2320         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2321         if (unlikely(nb_pkts > sq_free_size)) {
2322                 MRVL_LOG(DEBUG,
2323                         "No room in shadow queue for %d packets! %d packets will be sent.",
2324                         nb_pkts, sq_free_size);
2325                 nb_pkts = sq_free_size;
2326         }
2327
2328         for (i = 0; i < nb_pkts; i++) {
2329                 struct rte_mbuf *mbuf = tx_pkts[i];
2330                 int gen_l3_cksum, gen_l4_cksum;
2331                 enum pp2_outq_l3_type l3_type;
2332                 enum pp2_outq_l4_type l4_type;
2333
2334                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2335                         struct rte_mbuf *pref_pkt_hdr;
2336
2337                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2338                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2339                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2340                 }
2341
2342                 sq->ent[sq->head].buff.cookie = (pp2_cookie_t)(uint64_t)mbuf;
2343                 sq->ent[sq->head].buff.addr =
2344                         rte_mbuf_data_iova_default(mbuf);
2345                 sq->ent[sq->head].bpool =
2346                         (unlikely(mbuf->port >= RTE_MAX_ETHPORTS ||
2347                          mbuf->refcnt > 1)) ? NULL :
2348                          mrvl_port_to_bpool_lookup[mbuf->port];
2349                 sq->head = (sq->head + 1) & MRVL_PP2_TX_SHADOWQ_MASK;
2350                 sq->size++;
2351
2352                 pp2_ppio_outq_desc_reset(&descs[i]);
2353                 pp2_ppio_outq_desc_set_phys_addr(&descs[i],
2354                                                  rte_pktmbuf_iova(mbuf));
2355                 pp2_ppio_outq_desc_set_pkt_offset(&descs[i], 0);
2356                 pp2_ppio_outq_desc_set_pkt_len(&descs[i],
2357                                                rte_pktmbuf_pkt_len(mbuf));
2358
2359                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2360                 /*
2361                  * in case unsupported ol_flags were passed
2362                  * do not update descriptor offload information
2363                  */
2364                 ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type,
2365                                               &l3_type, &l4_type, &gen_l3_cksum,
2366                                               &gen_l4_cksum);
2367                 if (unlikely(ret))
2368                         continue;
2369
2370                 pp2_ppio_outq_desc_set_proto_info(&descs[i], l3_type, l4_type,
2371                                                   mbuf->l2_len,
2372                                                   mbuf->l2_len + mbuf->l3_len,
2373                                                   gen_l3_cksum, gen_l4_cksum);
2374         }
2375
2376         num = nb_pkts;
2377         pp2_ppio_send(q->priv->ppio, hif, q->queue_id, descs, &nb_pkts);
2378         /* number of packets that were not sent */
2379         if (unlikely(num > nb_pkts)) {
2380                 for (i = nb_pkts; i < num; i++) {
2381                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2382                                 MRVL_PP2_TX_SHADOWQ_MASK;
2383                         addr = cookie_addr_high | sq->ent[sq->head].buff.cookie;
2384                         bytes_sent -=
2385                                 rte_pktmbuf_pkt_len((struct rte_mbuf *)addr);
2386                 }
2387                 sq->size -= num - nb_pkts;
2388         }
2389
2390         q->bytes_sent += bytes_sent;
2391
2392         return nb_pkts;
2393 }
2394
2395 /**
2396  * Initialize packet processor.
2397  *
2398  * @return
2399  *   0 on success, negative error value otherwise.
2400  */
2401 static int
2402 mrvl_init_pp2(void)
2403 {
2404         struct pp2_init_params init_params;
2405
2406         memset(&init_params, 0, sizeof(init_params));
2407         init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
2408         init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
2409         init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
2410
2411         return pp2_init(&init_params);
2412 }
2413
2414 /**
2415  * Deinitialize packet processor.
2416  *
2417  * @return
2418  *   0 on success, negative error value otherwise.
2419  */
2420 static void
2421 mrvl_deinit_pp2(void)
2422 {
2423         pp2_deinit();
2424 }
2425
2426 /**
2427  * Create private device structure.
2428  *
2429  * @param dev_name
2430  *   Pointer to the port name passed in the initialization parameters.
2431  *
2432  * @return
2433  *   Pointer to the newly allocated private device structure.
2434  */
2435 static struct mrvl_priv *
2436 mrvl_priv_create(const char *dev_name)
2437 {
2438         struct pp2_bpool_params bpool_params;
2439         char match[MRVL_MATCH_LEN];
2440         struct mrvl_priv *priv;
2441         int ret, bpool_bit;
2442
2443         priv = rte_zmalloc_socket(dev_name, sizeof(*priv), 0, rte_socket_id());
2444         if (!priv)
2445                 return NULL;
2446
2447         ret = pp2_netdev_get_ppio_info((char *)(uintptr_t)dev_name,
2448                                        &priv->pp_id, &priv->ppio_id);
2449         if (ret)
2450                 goto out_free_priv;
2451
2452         bpool_bit = mrvl_reserve_bit(&used_bpools[priv->pp_id],
2453                                      PP2_BPOOL_NUM_POOLS);
2454         if (bpool_bit < 0)
2455                 goto out_free_priv;
2456         priv->bpool_bit = bpool_bit;
2457
2458         snprintf(match, sizeof(match), "pool-%d:%d", priv->pp_id,
2459                  priv->bpool_bit);
2460         memset(&bpool_params, 0, sizeof(bpool_params));
2461         bpool_params.match = match;
2462         bpool_params.buff_len = MRVL_PKT_SIZE_MAX + MRVL_PKT_EFFEC_OFFS;
2463         ret = pp2_bpool_init(&bpool_params, &priv->bpool);
2464         if (ret)
2465                 goto out_clear_bpool_bit;
2466
2467         priv->ppio_params.type = PP2_PPIO_T_NIC;
2468         rte_spinlock_init(&priv->lock);
2469
2470         return priv;
2471 out_clear_bpool_bit:
2472         used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
2473 out_free_priv:
2474         rte_free(priv);
2475         return NULL;
2476 }
2477
2478 /**
2479  * Create device representing Ethernet port.
2480  *
2481  * @param name
2482  *   Pointer to the port's name.
2483  *
2484  * @return
2485  *   0 on success, negative error value otherwise.
2486  */
2487 static int
2488 mrvl_eth_dev_create(struct rte_vdev_device *vdev, const char *name)
2489 {
2490         int ret, fd = socket(AF_INET, SOCK_DGRAM, 0);
2491         struct rte_eth_dev *eth_dev;
2492         struct mrvl_priv *priv;
2493         struct ifreq req;
2494
2495         eth_dev = rte_eth_dev_allocate(name);
2496         if (!eth_dev)
2497                 return -ENOMEM;
2498
2499         priv = mrvl_priv_create(name);
2500         if (!priv) {
2501                 ret = -ENOMEM;
2502                 goto out_free_dev;
2503         }
2504
2505         eth_dev->data->mac_addrs =
2506                 rte_zmalloc("mac_addrs",
2507                             ETHER_ADDR_LEN * MRVL_MAC_ADDRS_MAX, 0);
2508         if (!eth_dev->data->mac_addrs) {
2509                 MRVL_LOG(ERR, "Failed to allocate space for eth addrs");
2510                 ret = -ENOMEM;
2511                 goto out_free_priv;
2512         }
2513
2514         memset(&req, 0, sizeof(req));
2515         strcpy(req.ifr_name, name);
2516         ret = ioctl(fd, SIOCGIFHWADDR, &req);
2517         if (ret)
2518                 goto out_free_mac;
2519
2520         memcpy(eth_dev->data->mac_addrs[0].addr_bytes,
2521                req.ifr_addr.sa_data, ETHER_ADDR_LEN);
2522
2523         eth_dev->rx_pkt_burst = mrvl_rx_pkt_burst;
2524         eth_dev->tx_pkt_burst = mrvl_tx_pkt_burst;
2525         eth_dev->data->kdrv = RTE_KDRV_NONE;
2526         eth_dev->data->dev_private = priv;
2527         eth_dev->device = &vdev->device;
2528         eth_dev->dev_ops = &mrvl_ops;
2529
2530         rte_eth_dev_probing_finish(eth_dev);
2531         return 0;
2532 out_free_mac:
2533         rte_free(eth_dev->data->mac_addrs);
2534 out_free_dev:
2535         rte_eth_dev_release_port(eth_dev);
2536 out_free_priv:
2537         rte_free(priv);
2538
2539         return ret;
2540 }
2541
2542 /**
2543  * Cleanup previously created device representing Ethernet port.
2544  *
2545  * @param name
2546  *   Pointer to the port name.
2547  */
2548 static void
2549 mrvl_eth_dev_destroy(const char *name)
2550 {
2551         struct rte_eth_dev *eth_dev;
2552         struct mrvl_priv *priv;
2553
2554         eth_dev = rte_eth_dev_allocated(name);
2555         if (!eth_dev)
2556                 return;
2557
2558         priv = eth_dev->data->dev_private;
2559         pp2_bpool_deinit(priv->bpool);
2560         used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
2561         rte_free(priv);
2562         rte_free(eth_dev->data->mac_addrs);
2563         rte_eth_dev_release_port(eth_dev);
2564 }
2565
2566 /**
2567  * Callback used by rte_kvargs_process() during argument parsing.
2568  *
2569  * @param key
2570  *   Pointer to the parsed key (unused).
2571  * @param value
2572  *   Pointer to the parsed value.
2573  * @param extra_args
2574  *   Pointer to the extra arguments which contains address of the
2575  *   table of pointers to parsed interface names.
2576  *
2577  * @return
2578  *   Always 0.
2579  */
2580 static int
2581 mrvl_get_ifnames(const char *key __rte_unused, const char *value,
2582                  void *extra_args)
2583 {
2584         struct mrvl_ifnames *ifnames = extra_args;
2585
2586         ifnames->names[ifnames->idx++] = value;
2587
2588         return 0;
2589 }
2590
2591 /**
2592  * Deinitialize per-lcore MUSDK hardware interfaces (hifs).
2593  */
2594 static void
2595 mrvl_deinit_hifs(void)
2596 {
2597         int i;
2598
2599         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++) {
2600                 if (hifs[i])
2601                         pp2_hif_deinit(hifs[i]);
2602         }
2603         used_hifs = MRVL_MUSDK_HIFS_RESERVED;
2604         memset(hifs, 0, sizeof(hifs));
2605 }
2606
2607 /**
2608  * DPDK callback to register the virtual device.
2609  *
2610  * @param vdev
2611  *   Pointer to the virtual device.
2612  *
2613  * @return
2614  *   0 on success, negative error value otherwise.
2615  */
2616 static int
2617 rte_pmd_mrvl_probe(struct rte_vdev_device *vdev)
2618 {
2619         struct rte_kvargs *kvlist;
2620         struct mrvl_ifnames ifnames;
2621         int ret = -EINVAL;
2622         uint32_t i, ifnum, cfgnum;
2623         const char *params;
2624
2625         params = rte_vdev_device_args(vdev);
2626         if (!params)
2627                 return -EINVAL;
2628
2629         kvlist = rte_kvargs_parse(params, valid_args);
2630         if (!kvlist)
2631                 return -EINVAL;
2632
2633         ifnum = rte_kvargs_count(kvlist, MRVL_IFACE_NAME_ARG);
2634         if (ifnum > RTE_DIM(ifnames.names))
2635                 goto out_free_kvlist;
2636
2637         ifnames.idx = 0;
2638         rte_kvargs_process(kvlist, MRVL_IFACE_NAME_ARG,
2639                            mrvl_get_ifnames, &ifnames);
2640
2641
2642         /*
2643          * The below system initialization should be done only once,
2644          * on the first provided configuration file
2645          */
2646         if (!mrvl_qos_cfg) {
2647                 cfgnum = rte_kvargs_count(kvlist, MRVL_CFG_ARG);
2648                 MRVL_LOG(INFO, "Parsing config file!");
2649                 if (cfgnum > 1) {
2650                         MRVL_LOG(ERR, "Cannot handle more than one config file!");
2651                         goto out_free_kvlist;
2652                 } else if (cfgnum == 1) {
2653                         rte_kvargs_process(kvlist, MRVL_CFG_ARG,
2654                                            mrvl_get_qoscfg, &mrvl_qos_cfg);
2655                 }
2656         }
2657
2658         if (mrvl_dev_num)
2659                 goto init_devices;
2660
2661         MRVL_LOG(INFO, "Perform MUSDK initializations");
2662
2663         ret = rte_mvep_init(MVEP_MOD_T_PP2, kvlist);
2664         if (ret)
2665                 goto out_free_kvlist;
2666
2667         ret = mrvl_init_pp2();
2668         if (ret) {
2669                 MRVL_LOG(ERR, "Failed to init PP!");
2670                 rte_mvep_deinit(MVEP_MOD_T_PP2);
2671                 goto out_free_kvlist;
2672         }
2673
2674         memset(mrvl_port_bpool_size, 0, sizeof(mrvl_port_bpool_size));
2675         memset(mrvl_port_to_bpool_lookup, 0, sizeof(mrvl_port_to_bpool_lookup));
2676
2677         mrvl_lcore_first = RTE_MAX_LCORE;
2678         mrvl_lcore_last = 0;
2679
2680 init_devices:
2681         for (i = 0; i < ifnum; i++) {
2682                 MRVL_LOG(INFO, "Creating %s", ifnames.names[i]);
2683                 ret = mrvl_eth_dev_create(vdev, ifnames.names[i]);
2684                 if (ret)
2685                         goto out_cleanup;
2686         }
2687         mrvl_dev_num += ifnum;
2688
2689         rte_kvargs_free(kvlist);
2690
2691         return 0;
2692 out_cleanup:
2693         for (; i > 0; i--)
2694                 mrvl_eth_dev_destroy(ifnames.names[i]);
2695
2696         if (mrvl_dev_num == 0) {
2697                 mrvl_deinit_pp2();
2698                 rte_mvep_deinit(MVEP_MOD_T_PP2);
2699         }
2700 out_free_kvlist:
2701         rte_kvargs_free(kvlist);
2702
2703         return ret;
2704 }
2705
2706 /**
2707  * DPDK callback to remove virtual device.
2708  *
2709  * @param vdev
2710  *   Pointer to the removed virtual device.
2711  *
2712  * @return
2713  *   0 on success, negative error value otherwise.
2714  */
2715 static int
2716 rte_pmd_mrvl_remove(struct rte_vdev_device *vdev)
2717 {
2718         int i;
2719         const char *name;
2720
2721         name = rte_vdev_device_name(vdev);
2722         if (!name)
2723                 return -EINVAL;
2724
2725         MRVL_LOG(INFO, "Removing %s", name);
2726
2727         RTE_ETH_FOREACH_DEV(i) { /* FIXME: removing all devices! */
2728                 char ifname[RTE_ETH_NAME_MAX_LEN];
2729
2730                 rte_eth_dev_get_name_by_port(i, ifname);
2731                 mrvl_eth_dev_destroy(ifname);
2732                 mrvl_dev_num--;
2733         }
2734
2735         if (mrvl_dev_num == 0) {
2736                 MRVL_LOG(INFO, "Perform MUSDK deinit");
2737                 mrvl_deinit_hifs();
2738                 mrvl_deinit_pp2();
2739                 rte_mvep_deinit(MVEP_MOD_T_PP2);
2740         }
2741
2742         return 0;
2743 }
2744
2745 static struct rte_vdev_driver pmd_mrvl_drv = {
2746         .probe = rte_pmd_mrvl_probe,
2747         .remove = rte_pmd_mrvl_remove,
2748 };
2749
2750 RTE_PMD_REGISTER_VDEV(net_mvpp2, pmd_mrvl_drv);
2751 RTE_PMD_REGISTER_ALIAS(net_mvpp2, eth_mvpp2);
2752
2753 RTE_INIT(mrvl_init_log)
2754 {
2755         mrvl_logtype = rte_log_register("pmd.net.mvpp2");
2756         if (mrvl_logtype >= 0)
2757                 rte_log_set_level(mrvl_logtype, RTE_LOG_NOTICE);
2758 }