drivers/net/mvpp2/mrvl_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Marvell International Ltd.
   3  * Copyright(c) 2017 Semihalf.
   4  * All rights reserved.
   5  */
   6
   7 #include <rte_ethdev_driver.h>
   8 #include <rte_kvargs.h>
   9 #include <rte_log.h>
  10 #include <rte_malloc.h>
  11 #include <rte_bus_vdev.h>
  12
  13 /* Unluckily, container_of is defined by both DPDK and MUSDK,
  14  * we'll declare only one version.
  15  *
  16  * Note that it is not used in this PMD anyway.
  17  */
  18 #ifdef container_of
  19 #undef container_of
  20 #endif
  21
  22 #include <fcntl.h>
  23 #include <linux/ethtool.h>
  24 #include <linux/sockios.h>
  25 #include <net/if.h>
  26 #include <net/if_arp.h>
  27 #include <sys/ioctl.h>
  28 #include <sys/socket.h>
  29 #include <sys/stat.h>
  30 #include <sys/types.h>
  31
  32 #include "mrvl_ethdev.h"
  33 #include "mrvl_qos.h"
  34
  35 /* bitmask with reserved hifs */
  36 #define MRVL_MUSDK_HIFS_RESERVED 0x0F
  37 /* bitmask with reserved bpools */
  38 #define MRVL_MUSDK_BPOOLS_RESERVED 0x07
  39 /* bitmask with reserved kernel RSS tables */
  40 #define MRVL_MUSDK_RSS_RESERVED 0x01
  41 /* maximum number of available hifs */
  42 #define MRVL_MUSDK_HIFS_MAX 9
  43
  44 /* prefetch shift */
  45 #define MRVL_MUSDK_PREFETCH_SHIFT 2
  46
  47 /* TCAM has 25 entries reserved for uc/mc filter entries */
  48 #define MRVL_MAC_ADDRS_MAX 25
  49 #define MRVL_MATCH_LEN 16
  50 #define MRVL_PKT_EFFEC_OFFS (MRVL_PKT_OFFS + MV_MH_SIZE)
  51 /* Maximum allowable packet size */
  52 #define MRVL_PKT_SIZE_MAX (10240 - MV_MH_SIZE)
  53
  54 #define MRVL_IFACE_NAME_ARG "iface"
  55 #define MRVL_CFG_ARG "cfg"
  56
  57 #define MRVL_BURST_SIZE 64
  58
  59 #define MRVL_ARP_LENGTH 28
  60
  61 #define MRVL_COOKIE_ADDR_INVALID ~0ULL
  62
  63 #define MRVL_COOKIE_HIGH_ADDR_SHIFT     (sizeof(pp2_cookie_t) * 8)
  64 #define MRVL_COOKIE_HIGH_ADDR_MASK      (~0ULL << MRVL_COOKIE_HIGH_ADDR_SHIFT)
  65
  66 /* Memory size (in bytes) for MUSDK dma buffers */
  67 #define MRVL_MUSDK_DMA_MEMSIZE 41943040
  68
  69 /** Port Rx offload capabilities */
  70 #define MRVL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_FILTER | \
  71                           DEV_RX_OFFLOAD_JUMBO_FRAME | \
  72                           DEV_RX_OFFLOAD_CRC_STRIP | \
  73                           DEV_RX_OFFLOAD_CHECKSUM)
  74
  75 /** Port Tx offloads capabilities */
  76 #define MRVL_TX_OFFLOADS (DEV_TX_OFFLOAD_IPV4_CKSUM | \
  77                           DEV_TX_OFFLOAD_UDP_CKSUM | \
  78                           DEV_TX_OFFLOAD_TCP_CKSUM)
  79
  80 static const char * const valid_args[] = {
  81         MRVL_IFACE_NAME_ARG,
  82         MRVL_CFG_ARG,
  83         NULL
  84 };
  85
  86 static int used_hifs = MRVL_MUSDK_HIFS_RESERVED;
  87 static struct pp2_hif *hifs[RTE_MAX_LCORE];
  88 static int used_bpools[PP2_NUM_PKT_PROC] = {
  89         MRVL_MUSDK_BPOOLS_RESERVED,
  90         MRVL_MUSDK_BPOOLS_RESERVED
  91 };
  92
  93 struct pp2_bpool *mrvl_port_to_bpool_lookup[RTE_MAX_ETHPORTS];
  94 int mrvl_port_bpool_size[PP2_NUM_PKT_PROC][PP2_BPOOL_NUM_POOLS][RTE_MAX_LCORE];
  95 uint64_t cookie_addr_high = MRVL_COOKIE_ADDR_INVALID;
  96
  97 struct mrvl_ifnames {
  98         const char *names[PP2_NUM_ETH_PPIO * PP2_NUM_PKT_PROC];
  99         int idx;
 100 };
 101
 102 /*
 103  * To use buffer harvesting based on loopback port shadow queue structure
 104  * was introduced for buffers information bookkeeping.
 105  *
 106  * Before sending the packet, related buffer information (pp2_buff_inf) is
 107  * stored in shadow queue. After packet is transmitted no longer used
 108  * packet buffer is released back to it's original hardware pool,
 109  * on condition it originated from interface.
 110  * In case it  was generated by application itself i.e: mbuf->port field is
 111  * 0xff then its released to software mempool.
 112  */
 113 struct mrvl_shadow_txq {
 114         int head;           /* write index - used when sending buffers */
 115         int tail;           /* read index - used when releasing buffers */
 116         u16 size;           /* queue occupied size */
 117         u16 num_to_release; /* number of buffers sent, that can be released */
 118         struct buff_release_entry ent[MRVL_PP2_TX_SHADOWQ_SIZE]; /* q entries */
 119 };
 120
 121 struct mrvl_rxq {
 122         struct mrvl_priv *priv;
 123         struct rte_mempool *mp;
 124         int queue_id;
 125         int port_id;
 126         int cksum_enabled;
 127         uint64_t bytes_recv;
 128         uint64_t drop_mac;
 129 };
 130
 131 struct mrvl_txq {
 132         struct mrvl_priv *priv;
 133         int queue_id;
 134         int port_id;
 135         uint64_t bytes_sent;
 136         struct mrvl_shadow_txq shadow_txqs[RTE_MAX_LCORE];
 137         int tx_deferred_start;
 138 };
 139
 140 static int mrvl_lcore_first;
 141 static int mrvl_lcore_last;
 142 static int mrvl_dev_num;
 143
 144 static int mrvl_fill_bpool(struct mrvl_rxq *rxq, int num);
 145 static inline void mrvl_free_sent_buffers(struct pp2_ppio *ppio,
 146                         struct pp2_hif *hif, unsigned int core_id,
 147                         struct mrvl_shadow_txq *sq, int qid, int force);
 148
 149 #define MRVL_XSTATS_TBL_ENTRY(name) { \
 150         #name, offsetof(struct pp2_ppio_statistics, name),      \
 151         sizeof(((struct pp2_ppio_statistics *)0)->name)         \
 152 }
 153
 154 /* Table with xstats data */
 155 static struct {
 156         const char *name;
 157         unsigned int offset;
 158         unsigned int size;
 159 } mrvl_xstats_tbl[] = {
 160         MRVL_XSTATS_TBL_ENTRY(rx_bytes),
 161         MRVL_XSTATS_TBL_ENTRY(rx_packets),
 162         MRVL_XSTATS_TBL_ENTRY(rx_unicast_packets),
 163         MRVL_XSTATS_TBL_ENTRY(rx_errors),
 164         MRVL_XSTATS_TBL_ENTRY(rx_fullq_dropped),
 165         MRVL_XSTATS_TBL_ENTRY(rx_bm_dropped),
 166         MRVL_XSTATS_TBL_ENTRY(rx_early_dropped),
 167         MRVL_XSTATS_TBL_ENTRY(rx_fifo_dropped),
 168         MRVL_XSTATS_TBL_ENTRY(rx_cls_dropped),
 169         MRVL_XSTATS_TBL_ENTRY(tx_bytes),
 170         MRVL_XSTATS_TBL_ENTRY(tx_packets),
 171         MRVL_XSTATS_TBL_ENTRY(tx_unicast_packets),
 172         MRVL_XSTATS_TBL_ENTRY(tx_errors)
 173 };
 174
 175 static inline int
 176 mrvl_get_bpool_size(int pp2_id, int pool_id)
 177 {
 178         int i;
 179         int size = 0;
 180
 181         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++)
 182                 size += mrvl_port_bpool_size[pp2_id][pool_id][i];
 183
 184         return size;
 185 }
 186
 187 static inline int
 188 mrvl_reserve_bit(int *bitmap, int max)
 189 {
 190         int n = sizeof(*bitmap) * 8 - __builtin_clz(*bitmap);
 191
 192         if (n >= max)
 193                 return -1;
 194
 195         *bitmap |= 1 << n;
 196
 197         return n;
 198 }
 199
 200 static int
 201 mrvl_init_hif(int core_id)
 202 {
 203         struct pp2_hif_params params;
 204         char match[MRVL_MATCH_LEN];
 205         int ret;
 206
 207         ret = mrvl_reserve_bit(&used_hifs, MRVL_MUSDK_HIFS_MAX);
 208         if (ret < 0) {
 209                 RTE_LOG(ERR, PMD, "Failed to allocate hif %d\n", core_id);
 210                 return ret;
 211         }
 212
 213         snprintf(match, sizeof(match), "hif-%d", ret);
 214         memset(&params, 0, sizeof(params));
 215         params.match = match;
 216         params.out_size = MRVL_PP2_AGGR_TXQD_MAX;
 217         ret = pp2_hif_init(&params, &hifs[core_id]);
 218         if (ret) {
 219                 RTE_LOG(ERR, PMD, "Failed to initialize hif %d\n", core_id);
 220                 return ret;
 221         }
 222
 223         return 0;
 224 }
 225
 226 static inline struct pp2_hif*
 227 mrvl_get_hif(struct mrvl_priv *priv, int core_id)
 228 {
 229         int ret;
 230
 231         if (likely(hifs[core_id] != NULL))
 232                 return hifs[core_id];
 233
 234         rte_spinlock_lock(&priv->lock);
 235
 236         ret = mrvl_init_hif(core_id);
 237         if (ret < 0) {
 238                 RTE_LOG(ERR, PMD, "Failed to allocate hif %d\n", core_id);
 239                 goto out;
 240         }
 241
 242         if (core_id < mrvl_lcore_first)
 243                 mrvl_lcore_first = core_id;
 244
 245         if (core_id > mrvl_lcore_last)
 246                 mrvl_lcore_last = core_id;
 247 out:
 248         rte_spinlock_unlock(&priv->lock);
 249
 250         return hifs[core_id];
 251 }
 252
 253 /**
 254  * Configure rss based on dpdk rss configuration.
 255  *
 256  * @param priv
 257  *   Pointer to private structure.
 258  * @param rss_conf
 259  *   Pointer to RSS configuration.
 260  *
 261  * @return
 262  *   0 on success, negative error value otherwise.
 263  */
 264 static int
 265 mrvl_configure_rss(struct mrvl_priv *priv, struct rte_eth_rss_conf *rss_conf)
 266 {
 267         if (rss_conf->rss_key)
 268                 RTE_LOG(WARNING, PMD, "Changing hash key is not supported\n");
 269
 270         if (rss_conf->rss_hf == 0) {
 271                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 272         } else if (rss_conf->rss_hf & ETH_RSS_IPV4) {
 273                 priv->ppio_params.inqs_params.hash_type =
 274                         PP2_PPIO_HASH_T_2_TUPLE;
 275         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) {
 276                 priv->ppio_params.inqs_params.hash_type =
 277                         PP2_PPIO_HASH_T_5_TUPLE;
 278                 priv->rss_hf_tcp = 1;
 279         } else if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) {
 280                 priv->ppio_params.inqs_params.hash_type =
 281                         PP2_PPIO_HASH_T_5_TUPLE;
 282                 priv->rss_hf_tcp = 0;
 283         } else {
 284                 return -EINVAL;
 285         }
 286
 287         return 0;
 288 }
 289
 290 /**
 291  * Ethernet device configuration.
 292  *
 293  * Prepare the driver for a given number of TX and RX queues and
 294  * configure RSS.
 295  *
 296  * @param dev
 297  *   Pointer to Ethernet device structure.
 298  *
 299  * @return
 300  *   0 on success, negative error value otherwise.
 301  */
 302 static int
 303 mrvl_dev_configure(struct rte_eth_dev *dev)
 304 {
 305         struct mrvl_priv *priv = dev->data->dev_private;
 306         int ret;
 307
 308         if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_NONE &&
 309             dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
 310                 RTE_LOG(INFO, PMD, "Unsupported rx multi queue mode %d\n",
 311                         dev->data->dev_conf.rxmode.mq_mode);
 312                 return -EINVAL;
 313         }
 314
 315         if (!(dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_CRC_STRIP)) {
 316                 RTE_LOG(INFO, PMD,
 317                         "L2 CRC stripping is always enabled in hw\n");
 318                 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
 319         }
 320
 321         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) {
 322                 RTE_LOG(INFO, PMD, "VLAN stripping not supported\n");
 323                 return -EINVAL;
 324         }
 325
 326         if (dev->data->dev_conf.rxmode.split_hdr_size) {
 327                 RTE_LOG(INFO, PMD, "Split headers not supported\n");
 328                 return -EINVAL;
 329         }
 330
 331         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) {
 332                 RTE_LOG(INFO, PMD, "RX Scatter/Gather not supported\n");
 333                 return -EINVAL;
 334         }
 335
 336         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
 337                 RTE_LOG(INFO, PMD, "LRO not supported\n");
 338                 return -EINVAL;
 339         }
 340
 341         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
 342                 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
 343                                  ETHER_HDR_LEN - ETHER_CRC_LEN;
 344
 345         ret = mrvl_configure_rxqs(priv, dev->data->port_id,
 346                                   dev->data->nb_rx_queues);
 347         if (ret < 0)
 348                 return ret;
 349
 350         ret = mrvl_configure_txqs(priv, dev->data->port_id,
 351                                   dev->data->nb_tx_queues);
 352         if (ret < 0)
 353                 return ret;
 354
 355         priv->ppio_params.outqs_params.num_outqs = dev->data->nb_tx_queues;
 356         priv->ppio_params.maintain_stats = 1;
 357         priv->nb_rx_queues = dev->data->nb_rx_queues;
 358
 359         if (dev->data->nb_rx_queues == 1 &&
 360             dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 361                 RTE_LOG(WARNING, PMD, "Disabling hash for 1 rx queue\n");
 362                 priv->ppio_params.inqs_params.hash_type = PP2_PPIO_HASH_T_NONE;
 363
 364                 return 0;
 365         }
 366
 367         return mrvl_configure_rss(priv,
 368                                   &dev->data->dev_conf.rx_adv_conf.rss_conf);
 369 }
 370
 371 /**
 372  * DPDK callback to change the MTU.
 373  *
 374  * Setting the MTU affects hardware MRU (packets larger than the MRU
 375  * will be dropped).
 376  *
 377  * @param dev
 378  *   Pointer to Ethernet device structure.
 379  * @param mtu
 380  *   New MTU.
 381  *
 382  * @return
 383  *   0 on success, negative error value otherwise.
 384  */
 385 static int
 386 mrvl_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 387 {
 388         struct mrvl_priv *priv = dev->data->dev_private;
 389         /* extra MV_MH_SIZE bytes are required for Marvell tag */
 390         uint16_t mru = mtu + MV_MH_SIZE + ETHER_HDR_LEN + ETHER_CRC_LEN;
 391         int ret;
 392
 393         if (mtu < ETHER_MIN_MTU || mru > MRVL_PKT_SIZE_MAX)
 394                 return -EINVAL;
 395
 396         if (!priv->ppio)
 397                 return 0;
 398
 399         ret = pp2_ppio_set_mru(priv->ppio, mru);
 400         if (ret)
 401                 return ret;
 402
 403         return pp2_ppio_set_mtu(priv->ppio, mtu);
 404 }
 405
 406 /**
 407  * DPDK callback to bring the link up.
 408  *
 409  * @param dev
 410  *   Pointer to Ethernet device structure.
 411  *
 412  * @return
 413  *   0 on success, negative error value otherwise.
 414  */
 415 static int
 416 mrvl_dev_set_link_up(struct rte_eth_dev *dev)
 417 {
 418         struct mrvl_priv *priv = dev->data->dev_private;
 419         int ret;
 420
 421         if (!priv->ppio)
 422                 return -EPERM;
 423
 424         ret = pp2_ppio_enable(priv->ppio);
 425         if (ret)
 426                 return ret;
 427
 428         /*
 429          * mtu/mru can be updated if pp2_ppio_enable() was called at least once
 430          * as pp2_ppio_enable() changes port->t_mode from default 0 to
 431          * PP2_TRAFFIC_INGRESS_EGRESS.
 432          *
 433          * Set mtu to default DPDK value here.
 434          */
 435         ret = mrvl_mtu_set(dev, dev->data->mtu);
 436         if (ret)
 437                 pp2_ppio_disable(priv->ppio);
 438
 439         return ret;
 440 }
 441
 442 /**
 443  * DPDK callback to bring the link down.
 444  *
 445  * @param dev
 446  *   Pointer to Ethernet device structure.
 447  *
 448  * @return
 449  *   0 on success, negative error value otherwise.
 450  */
 451 static int
 452 mrvl_dev_set_link_down(struct rte_eth_dev *dev)
 453 {
 454         struct mrvl_priv *priv = dev->data->dev_private;
 455
 456         if (!priv->ppio)
 457                 return -EPERM;
 458
 459         return pp2_ppio_disable(priv->ppio);
 460 }
 461
 462 /**
 463  * DPDK callback to start tx queue.
 464  *
 465  * @param dev
 466  *   Pointer to Ethernet device structure.
 467  * @param queue_id
 468  *   Transmit queue index.
 469  *
 470  * @return
 471  *   0 on success, negative error value otherwise.
 472  */
 473 static int
 474 mrvl_tx_queue_start(struct rte_eth_dev *dev, uint16_t queue_id)
 475 {
 476         struct mrvl_priv *priv = dev->data->dev_private;
 477         int ret;
 478
 479         if (!priv)
 480                 return -EPERM;
 481
 482         /* passing 1 enables given tx queue */
 483         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 1);
 484         if (ret) {
 485                 RTE_LOG(ERR, PMD, "Failed to start txq %d\n", queue_id);
 486                 return ret;
 487         }
 488
 489         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 490
 491         return 0;
 492 }
 493
 494 /**
 495  * DPDK callback to stop tx queue.
 496  *
 497  * @param dev
 498  *   Pointer to Ethernet device structure.
 499  * @param queue_id
 500  *   Transmit queue index.
 501  *
 502  * @return
 503  *   0 on success, negative error value otherwise.
 504  */
 505 static int
 506 mrvl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id)
 507 {
 508         struct mrvl_priv *priv = dev->data->dev_private;
 509         int ret;
 510
 511         if (!priv->ppio)
 512                 return -EPERM;
 513
 514         /* passing 0 disables given tx queue */
 515         ret = pp2_ppio_set_outq_state(priv->ppio, queue_id, 0);
 516         if (ret) {
 517                 RTE_LOG(ERR, PMD, "Failed to stop txq %d\n", queue_id);
 518                 return ret;
 519         }
 520
 521         dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 522
 523         return 0;
 524 }
 525
 526 /**
 527  * DPDK callback to start the device.
 528  *
 529  * @param dev
 530  *   Pointer to Ethernet device structure.
 531  *
 532  * @return
 533  *   0 on success, negative errno value on failure.
 534  */
 535 static int
 536 mrvl_dev_start(struct rte_eth_dev *dev)
 537 {
 538         struct mrvl_priv *priv = dev->data->dev_private;
 539         char match[MRVL_MATCH_LEN];
 540         int ret = 0, i, def_init_size;
 541
 542         snprintf(match, sizeof(match), "ppio-%d:%d",
 543                  priv->pp_id, priv->ppio_id);
 544         priv->ppio_params.match = match;
 545
 546         /*
 547          * Calculate the minimum bpool size for refill feature as follows:
 548          * 2 default burst sizes multiply by number of rx queues.
 549          * If the bpool size will be below this value, new buffers will
 550          * be added to the pool.
 551          */
 552         priv->bpool_min_size = priv->nb_rx_queues * MRVL_BURST_SIZE * 2;
 553
 554         /* In case initial bpool size configured in queues setup is
 555          * smaller than minimum size add more buffers
 556          */
 557         def_init_size = priv->bpool_min_size + MRVL_BURST_SIZE * 2;
 558         if (priv->bpool_init_size < def_init_size) {
 559                 int buffs_to_add = def_init_size - priv->bpool_init_size;
 560
 561                 priv->bpool_init_size += buffs_to_add;
 562                 ret = mrvl_fill_bpool(dev->data->rx_queues[0], buffs_to_add);
 563                 if (ret)
 564                         RTE_LOG(ERR, PMD, "Failed to add buffers to bpool\n");
 565         }
 566
 567         /*
 568          * Calculate the maximum bpool size for refill feature as follows:
 569          * maximum number of descriptors in rx queue multiply by number
 570          * of rx queues plus minimum bpool size.
 571          * In case the bpool size will exceed this value, superfluous buffers
 572          * will be removed
 573          */
 574         priv->bpool_max_size = (priv->nb_rx_queues * MRVL_PP2_RXD_MAX) +
 575                                 priv->bpool_min_size;
 576
 577         ret = pp2_ppio_init(&priv->ppio_params, &priv->ppio);
 578         if (ret) {
 579                 RTE_LOG(ERR, PMD, "Failed to init ppio\n");
 580                 return ret;
 581         }
 582
 583         /*
 584          * In case there are some some stale uc/mc mac addresses flush them
 585          * here. It cannot be done during mrvl_dev_close() as port information
 586          * is already gone at that point (due to pp2_ppio_deinit() in
 587          * mrvl_dev_stop()).
 588          */
 589         if (!priv->uc_mc_flushed) {
 590                 ret = pp2_ppio_flush_mac_addrs(priv->ppio, 1, 1);
 591                 if (ret) {
 592                         RTE_LOG(ERR, PMD,
 593                                 "Failed to flush uc/mc filter list\n");
 594                         goto out;
 595                 }
 596                 priv->uc_mc_flushed = 1;
 597         }
 598
 599         if (!priv->vlan_flushed) {
 600                 ret = pp2_ppio_flush_vlan(priv->ppio);
 601                 if (ret) {
 602                         RTE_LOG(ERR, PMD, "Failed to flush vlan list\n");
 603                         /*
 604                          * TODO
 605                          * once pp2_ppio_flush_vlan() is supported jump to out
 606                          * goto out;
 607                          */
 608                 }
 609                 priv->vlan_flushed = 1;
 610         }
 611
 612         /* For default QoS config, don't start classifier. */
 613         if (mrvl_qos_cfg) {
 614                 ret = mrvl_start_qos_mapping(priv);
 615                 if (ret) {
 616                         RTE_LOG(ERR, PMD, "Failed to setup QoS mapping\n");
 617                         goto out;
 618                 }
 619         }
 620
 621         ret = mrvl_dev_set_link_up(dev);
 622         if (ret) {
 623                 RTE_LOG(ERR, PMD, "Failed to set link up\n");
 624                 goto out;
 625         }
 626
 627         /* start tx queues */
 628         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 629                 struct mrvl_txq *txq = dev->data->tx_queues[i];
 630
 631                 dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STARTED;
 632
 633                 if (!txq->tx_deferred_start)
 634                         continue;
 635
 636                 /*
 637                  * All txqs are started by default. Stop them
 638                  * so that tx_deferred_start works as expected.
 639                  */
 640                 ret = mrvl_tx_queue_stop(dev, i);
 641                 if (ret)
 642                         goto out;
 643         }
 644
 645         return 0;
 646 out:
 647         RTE_LOG(ERR, PMD, "Failed to start device\n");
 648         pp2_ppio_deinit(priv->ppio);
 649         return ret;
 650 }
 651
 652 /**
 653  * Flush receive queues.
 654  *
 655  * @param dev
 656  *   Pointer to Ethernet device structure.
 657  */
 658 static void
 659 mrvl_flush_rx_queues(struct rte_eth_dev *dev)
 660 {
 661         int i;
 662
 663         RTE_LOG(INFO, PMD, "Flushing rx queues\n");
 664         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 665                 int ret, num;
 666
 667                 do {
 668                         struct mrvl_rxq *q = dev->data->rx_queues[i];
 669                         struct pp2_ppio_desc descs[MRVL_PP2_RXD_MAX];
 670
 671                         num = MRVL_PP2_RXD_MAX;
 672                         ret = pp2_ppio_recv(q->priv->ppio,
 673                                             q->priv->rxq_map[q->queue_id].tc,
 674                                             q->priv->rxq_map[q->queue_id].inq,
 675                                             descs, (uint16_t *)&num);
 676                 } while (ret == 0 && num);
 677         }
 678 }
 679
 680 /**
 681  * Flush transmit shadow queues.
 682  *
 683  * @param dev
 684  *   Pointer to Ethernet device structure.
 685  */
 686 static void
 687 mrvl_flush_tx_shadow_queues(struct rte_eth_dev *dev)
 688 {
 689         int i, j;
 690         struct mrvl_txq *txq;
 691
 692         RTE_LOG(INFO, PMD, "Flushing tx shadow queues\n");
 693         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 694                 txq = (struct mrvl_txq *)dev->data->tx_queues[i];
 695
 696                 for (j = 0; j < RTE_MAX_LCORE; j++) {
 697                         struct mrvl_shadow_txq *sq;
 698
 699                         if (!hifs[j])
 700                                 continue;
 701
 702                         sq = &txq->shadow_txqs[j];
 703                         mrvl_free_sent_buffers(txq->priv->ppio,
 704                                 hifs[j], j, sq, txq->queue_id, 1);
 705                         while (sq->tail != sq->head) {
 706                                 uint64_t addr = cookie_addr_high |
 707                                         sq->ent[sq->tail].buff.cookie;
 708                                 rte_pktmbuf_free(
 709                                         (struct rte_mbuf *)addr);
 710                                 sq->tail = (sq->tail + 1) &
 711                                             MRVL_PP2_TX_SHADOWQ_MASK;
 712                         }
 713                         memset(sq, 0, sizeof(*sq));
 714                 }
 715         }
 716 }
 717
 718 /**
 719  * Flush hardware bpool (buffer-pool).
 720  *
 721  * @param dev
 722  *   Pointer to Ethernet device structure.
 723  */
 724 static void
 725 mrvl_flush_bpool(struct rte_eth_dev *dev)
 726 {
 727         struct mrvl_priv *priv = dev->data->dev_private;
 728         struct pp2_hif *hif;
 729         uint32_t num;
 730         int ret;
 731         unsigned int core_id = rte_lcore_id();
 732
 733         if (core_id == LCORE_ID_ANY)
 734                 core_id = 0;
 735
 736         hif = mrvl_get_hif(priv, core_id);
 737
 738         ret = pp2_bpool_get_num_buffs(priv->bpool, &num);
 739         if (ret) {
 740                 RTE_LOG(ERR, PMD, "Failed to get bpool buffers number\n");
 741                 return;
 742         }
 743
 744         while (num--) {
 745                 struct pp2_buff_inf inf;
 746                 uint64_t addr;
 747
 748                 ret = pp2_bpool_get_buff(hif, priv->bpool, &inf);
 749                 if (ret)
 750                         break;
 751
 752                 addr = cookie_addr_high | inf.cookie;
 753                 rte_pktmbuf_free((struct rte_mbuf *)addr);
 754         }
 755 }
 756
 757 /**
 758  * DPDK callback to stop the device.
 759  *
 760  * @param dev
 761  *   Pointer to Ethernet device structure.
 762  */
 763 static void
 764 mrvl_dev_stop(struct rte_eth_dev *dev)
 765 {
 766         struct mrvl_priv *priv = dev->data->dev_private;
 767
 768         mrvl_dev_set_link_down(dev);
 769         mrvl_flush_rx_queues(dev);
 770         mrvl_flush_tx_shadow_queues(dev);
 771         if (priv->cls_tbl) {
 772                 pp2_cls_tbl_deinit(priv->cls_tbl);
 773                 priv->cls_tbl = NULL;
 774         }
 775         if (priv->qos_tbl) {
 776                 pp2_cls_qos_tbl_deinit(priv->qos_tbl);
 777                 priv->qos_tbl = NULL;
 778         }
 779         if (priv->ppio)
 780                 pp2_ppio_deinit(priv->ppio);
 781         priv->ppio = NULL;
 782
 783         /* policer must be released after ppio deinitialization */
 784         if (priv->policer) {
 785                 pp2_cls_plcr_deinit(priv->policer);
 786                 priv->policer = NULL;
 787         }
 788 }
 789
 790 /**
 791  * DPDK callback to close the device.
 792  *
 793  * @param dev
 794  *   Pointer to Ethernet device structure.
 795  */
 796 static void
 797 mrvl_dev_close(struct rte_eth_dev *dev)
 798 {
 799         struct mrvl_priv *priv = dev->data->dev_private;
 800         size_t i;
 801
 802         for (i = 0; i < priv->ppio_params.inqs_params.num_tcs; ++i) {
 803                 struct pp2_ppio_tc_params *tc_params =
 804                         &priv->ppio_params.inqs_params.tcs_params[i];
 805
 806                 if (tc_params->inqs_params) {
 807                         rte_free(tc_params->inqs_params);
 808                         tc_params->inqs_params = NULL;
 809                 }
 810         }
 811
 812         mrvl_flush_bpool(dev);
 813 }
 814
 815 /**
 816  * DPDK callback to retrieve physical link information.
 817  *
 818  * @param dev
 819  *   Pointer to Ethernet device structure.
 820  * @param wait_to_complete
 821  *   Wait for request completion (ignored).
 822  *
 823  * @return
 824  *   0 on success, negative error value otherwise.
 825  */
 826 static int
 827 mrvl_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
 828 {
 829         /*
 830          * TODO
 831          * once MUSDK provides necessary API use it here
 832          */
 833         struct mrvl_priv *priv = dev->data->dev_private;
 834         struct ethtool_cmd edata;
 835         struct ifreq req;
 836         int ret, fd, link_up;
 837
 838         if (!priv->ppio)
 839                 return -EPERM;
 840
 841         edata.cmd = ETHTOOL_GSET;
 842
 843         strcpy(req.ifr_name, dev->data->name);
 844         req.ifr_data = (void *)&edata;
 845
 846         fd = socket(AF_INET, SOCK_DGRAM, 0);
 847         if (fd == -1)
 848                 return -EFAULT;
 849
 850         ret = ioctl(fd, SIOCETHTOOL, &req);
 851         if (ret == -1) {
 852                 close(fd);
 853                 return -EFAULT;
 854         }
 855
 856         close(fd);
 857
 858         switch (ethtool_cmd_speed(&edata)) {
 859         case SPEED_10:
 860                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10M;
 861                 break;
 862         case SPEED_100:
 863                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_100M;
 864                 break;
 865         case SPEED_1000:
 866                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_1G;
 867                 break;
 868         case SPEED_10000:
 869                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_10G;
 870                 break;
 871         default:
 872                 dev->data->dev_link.link_speed = ETH_SPEED_NUM_NONE;
 873         }
 874
 875         dev->data->dev_link.link_duplex = edata.duplex ? ETH_LINK_FULL_DUPLEX :
 876                                                          ETH_LINK_HALF_DUPLEX;
 877         dev->data->dev_link.link_autoneg = edata.autoneg ? ETH_LINK_AUTONEG :
 878                                                            ETH_LINK_FIXED;
 879         pp2_ppio_get_link_state(priv->ppio, &link_up);
 880         dev->data->dev_link.link_status = link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
 881
 882         return 0;
 883 }
 884
 885 /**
 886  * DPDK callback to enable promiscuous mode.
 887  *
 888  * @param dev
 889  *   Pointer to Ethernet device structure.
 890  */
 891 static void
 892 mrvl_promiscuous_enable(struct rte_eth_dev *dev)
 893 {
 894         struct mrvl_priv *priv = dev->data->dev_private;
 895         int ret;
 896
 897         if (!priv->ppio)
 898                 return;
 899
 900         if (priv->isolated)
 901                 return;
 902
 903         ret = pp2_ppio_set_promisc(priv->ppio, 1);
 904         if (ret)
 905                 RTE_LOG(ERR, PMD, "Failed to enable promiscuous mode\n");
 906 }
 907
 908 /**
 909  * DPDK callback to enable allmulti mode.
 910  *
 911  * @param dev
 912  *   Pointer to Ethernet device structure.
 913  */
 914 static void
 915 mrvl_allmulticast_enable(struct rte_eth_dev *dev)
 916 {
 917         struct mrvl_priv *priv = dev->data->dev_private;
 918         int ret;
 919
 920         if (!priv->ppio)
 921                 return;
 922
 923         if (priv->isolated)
 924                 return;
 925
 926         ret = pp2_ppio_set_mc_promisc(priv->ppio, 1);
 927         if (ret)
 928                 RTE_LOG(ERR, PMD, "Failed enable all-multicast mode\n");
 929 }
 930
 931 /**
 932  * DPDK callback to disable promiscuous mode.
 933  *
 934  * @param dev
 935  *   Pointer to Ethernet device structure.
 936  */
 937 static void
 938 mrvl_promiscuous_disable(struct rte_eth_dev *dev)
 939 {
 940         struct mrvl_priv *priv = dev->data->dev_private;
 941         int ret;
 942
 943         if (!priv->ppio)
 944                 return;
 945
 946         ret = pp2_ppio_set_promisc(priv->ppio, 0);
 947         if (ret)
 948                 RTE_LOG(ERR, PMD, "Failed to disable promiscuous mode\n");
 949 }
 950
 951 /**
 952  * DPDK callback to disable allmulticast mode.
 953  *
 954  * @param dev
 955  *   Pointer to Ethernet device structure.
 956  */
 957 static void
 958 mrvl_allmulticast_disable(struct rte_eth_dev *dev)
 959 {
 960         struct mrvl_priv *priv = dev->data->dev_private;
 961         int ret;
 962
 963         if (!priv->ppio)
 964                 return;
 965
 966         ret = pp2_ppio_set_mc_promisc(priv->ppio, 0);
 967         if (ret)
 968                 RTE_LOG(ERR, PMD, "Failed to disable all-multicast mode\n");
 969 }
 970
 971 /**
 972  * DPDK callback to remove a MAC address.
 973  *
 974  * @param dev
 975  *   Pointer to Ethernet device structure.
 976  * @param index
 977  *   MAC address index.
 978  */
 979 static void
 980 mrvl_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
 981 {
 982         struct mrvl_priv *priv = dev->data->dev_private;
 983         char buf[ETHER_ADDR_FMT_SIZE];
 984         int ret;
 985
 986         if (!priv->ppio)
 987                 return;
 988
 989         if (priv->isolated)
 990                 return;
 991
 992         ret = pp2_ppio_remove_mac_addr(priv->ppio,
 993                                        dev->data->mac_addrs[index].addr_bytes);
 994         if (ret) {
 995                 ether_format_addr(buf, sizeof(buf),
 996                                   &dev->data->mac_addrs[index]);
 997                 RTE_LOG(ERR, PMD, "Failed to remove mac %s\n", buf);
 998         }
 999 }
1000
1001 /**
1002  * DPDK callback to add a MAC address.
1003  *
1004  * @param dev
1005  *   Pointer to Ethernet device structure.
1006  * @param mac_addr
1007  *   MAC address to register.
1008  * @param index
1009  *   MAC address index.
1010  * @param vmdq
1011  *   VMDq pool index to associate address with (unused).
1012  *
1013  * @return
1014  *   0 on success, negative error value otherwise.
1015  */
1016 static int
1017 mrvl_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
1018                   uint32_t index, uint32_t vmdq __rte_unused)
1019 {
1020         struct mrvl_priv *priv = dev->data->dev_private;
1021         char buf[ETHER_ADDR_FMT_SIZE];
1022         int ret;
1023
1024         if (priv->isolated)
1025                 return -ENOTSUP;
1026
1027         if (index == 0)
1028                 /* For setting index 0, mrvl_mac_addr_set() should be used.*/
1029                 return -1;
1030
1031         if (!priv->ppio)
1032                 return 0;
1033
1034         /*
1035          * Maximum number of uc addresses can be tuned via kernel module mvpp2x
1036          * parameter uc_filter_max. Maximum number of mc addresses is then
1037          * MRVL_MAC_ADDRS_MAX - uc_filter_max. Currently it defaults to 4 and
1038          * 21 respectively.
1039          *
1040          * If more than uc_filter_max uc addresses were added to filter list
1041          * then NIC will switch to promiscuous mode automatically.
1042          *
1043          * If more than MRVL_MAC_ADDRS_MAX - uc_filter_max number mc addresses
1044          * were added to filter list then NIC will switch to all-multicast mode
1045          * automatically.
1046          */
1047         ret = pp2_ppio_add_mac_addr(priv->ppio, mac_addr->addr_bytes);
1048         if (ret) {
1049                 ether_format_addr(buf, sizeof(buf), mac_addr);
1050                 RTE_LOG(ERR, PMD, "Failed to add mac %s\n", buf);
1051                 return -1;
1052         }
1053
1054         return 0;
1055 }
1056
1057 /**
1058  * DPDK callback to set the primary MAC address.
1059  *
1060  * @param dev
1061  *   Pointer to Ethernet device structure.
1062  * @param mac_addr
1063  *   MAC address to register.
1064  */
1065 static void
1066 mrvl_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
1067 {
1068         struct mrvl_priv *priv = dev->data->dev_private;
1069         int ret;
1070
1071         if (!priv->ppio)
1072                 return;
1073
1074         if (priv->isolated)
1075                 return;
1076
1077         ret = pp2_ppio_set_mac_addr(priv->ppio, mac_addr->addr_bytes);
1078         if (ret) {
1079                 char buf[ETHER_ADDR_FMT_SIZE];
1080                 ether_format_addr(buf, sizeof(buf), mac_addr);
1081                 RTE_LOG(ERR, PMD, "Failed to set mac to %s\n", buf);
1082         }
1083 }
1084
1085 /**
1086  * DPDK callback to get device statistics.
1087  *
1088  * @param dev
1089  *   Pointer to Ethernet device structure.
1090  * @param stats
1091  *   Stats structure output buffer.
1092  *
1093  * @return
1094  *   0 on success, negative error value otherwise.
1095  */
1096 static int
1097 mrvl_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1098 {
1099         struct mrvl_priv *priv = dev->data->dev_private;
1100         struct pp2_ppio_statistics ppio_stats;
1101         uint64_t drop_mac = 0;
1102         unsigned int i, idx, ret;
1103
1104         if (!priv->ppio)
1105                 return -EPERM;
1106
1107         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1108                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1109                 struct pp2_ppio_inq_statistics rx_stats;
1110
1111                 if (!rxq)
1112                         continue;
1113
1114                 idx = rxq->queue_id;
1115                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1116                         RTE_LOG(ERR, PMD,
1117                                 "rx queue %d stats out of range (0 - %d)\n",
1118                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1119                         continue;
1120                 }
1121
1122                 ret = pp2_ppio_inq_get_statistics(priv->ppio,
1123                                                   priv->rxq_map[idx].tc,
1124                                                   priv->rxq_map[idx].inq,
1125                                                   &rx_stats, 0);
1126                 if (unlikely(ret)) {
1127                         RTE_LOG(ERR, PMD,
1128                                 "Failed to update rx queue %d stats\n", idx);
1129                         break;
1130                 }
1131
1132                 stats->q_ibytes[idx] = rxq->bytes_recv;
1133                 stats->q_ipackets[idx] = rx_stats.enq_desc - rxq->drop_mac;
1134                 stats->q_errors[idx] = rx_stats.drop_early +
1135                                        rx_stats.drop_fullq +
1136                                        rx_stats.drop_bm +
1137                                        rxq->drop_mac;
1138                 stats->ibytes += rxq->bytes_recv;
1139                 drop_mac += rxq->drop_mac;
1140         }
1141
1142         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1143                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1144                 struct pp2_ppio_outq_statistics tx_stats;
1145
1146                 if (!txq)
1147                         continue;
1148
1149                 idx = txq->queue_id;
1150                 if (unlikely(idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)) {
1151                         RTE_LOG(ERR, PMD,
1152                                 "tx queue %d stats out of range (0 - %d)\n",
1153                                 idx, RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1154                 }
1155
1156                 ret = pp2_ppio_outq_get_statistics(priv->ppio, idx,
1157                                                    &tx_stats, 0);
1158                 if (unlikely(ret)) {
1159                         RTE_LOG(ERR, PMD,
1160                                 "Failed to update tx queue %d stats\n", idx);
1161                         break;
1162                 }
1163
1164                 stats->q_opackets[idx] = tx_stats.deq_desc;
1165                 stats->q_obytes[idx] = txq->bytes_sent;
1166                 stats->obytes += txq->bytes_sent;
1167         }
1168
1169         ret = pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1170         if (unlikely(ret)) {
1171                 RTE_LOG(ERR, PMD, "Failed to update port statistics\n");
1172                 return ret;
1173         }
1174
1175         stats->ipackets += ppio_stats.rx_packets - drop_mac;
1176         stats->opackets += ppio_stats.tx_packets;
1177         stats->imissed += ppio_stats.rx_fullq_dropped +
1178                           ppio_stats.rx_bm_dropped +
1179                           ppio_stats.rx_early_dropped +
1180                           ppio_stats.rx_fifo_dropped +
1181                           ppio_stats.rx_cls_dropped;
1182         stats->ierrors = drop_mac;
1183
1184         return 0;
1185 }
1186
1187 /**
1188  * DPDK callback to clear device statistics.
1189  *
1190  * @param dev
1191  *   Pointer to Ethernet device structure.
1192  */
1193 static void
1194 mrvl_stats_reset(struct rte_eth_dev *dev)
1195 {
1196         struct mrvl_priv *priv = dev->data->dev_private;
1197         int i;
1198
1199         if (!priv->ppio)
1200                 return;
1201
1202         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1203                 struct mrvl_rxq *rxq = dev->data->rx_queues[i];
1204
1205                 pp2_ppio_inq_get_statistics(priv->ppio, priv->rxq_map[i].tc,
1206                                             priv->rxq_map[i].inq, NULL, 1);
1207                 rxq->bytes_recv = 0;
1208                 rxq->drop_mac = 0;
1209         }
1210
1211         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1212                 struct mrvl_txq *txq = dev->data->tx_queues[i];
1213
1214                 pp2_ppio_outq_get_statistics(priv->ppio, i, NULL, 1);
1215                 txq->bytes_sent = 0;
1216         }
1217
1218         pp2_ppio_get_statistics(priv->ppio, NULL, 1);
1219 }
1220
1221 /**
1222  * DPDK callback to get extended statistics.
1223  *
1224  * @param dev
1225  *   Pointer to Ethernet device structure.
1226  * @param stats
1227  *   Pointer to xstats table.
1228  * @param n
1229  *   Number of entries in xstats table.
1230  * @return
1231  *   Negative value on error, number of read xstats otherwise.
1232  */
1233 static int
1234 mrvl_xstats_get(struct rte_eth_dev *dev,
1235                 struct rte_eth_xstat *stats, unsigned int n)
1236 {
1237         struct mrvl_priv *priv = dev->data->dev_private;
1238         struct pp2_ppio_statistics ppio_stats;
1239         unsigned int i;
1240
1241         if (!stats)
1242                 return 0;
1243
1244         pp2_ppio_get_statistics(priv->ppio, &ppio_stats, 0);
1245         for (i = 0; i < n && i < RTE_DIM(mrvl_xstats_tbl); i++) {
1246                 uint64_t val;
1247
1248                 if (mrvl_xstats_tbl[i].size == sizeof(uint32_t))
1249                         val = *(uint32_t *)((uint8_t *)&ppio_stats +
1250                                             mrvl_xstats_tbl[i].offset);
1251                 else if (mrvl_xstats_tbl[i].size == sizeof(uint64_t))
1252                         val = *(uint64_t *)((uint8_t *)&ppio_stats +
1253                                             mrvl_xstats_tbl[i].offset);
1254                 else
1255                         return -EINVAL;
1256
1257                 stats[i].id = i;
1258                 stats[i].value = val;
1259         }
1260
1261         return n;
1262 }
1263
1264 /**
1265  * DPDK callback to reset extended statistics.
1266  *
1267  * @param dev
1268  *   Pointer to Ethernet device structure.
1269  */
1270 static void
1271 mrvl_xstats_reset(struct rte_eth_dev *dev)
1272 {
1273         mrvl_stats_reset(dev);
1274 }
1275
1276 /**
1277  * DPDK callback to get extended statistics names.
1278  *
1279  * @param dev (unused)
1280  *   Pointer to Ethernet device structure.
1281  * @param xstats_names
1282  *   Pointer to xstats names table.
1283  * @param size
1284  *   Size of the xstats names table.
1285  * @return
1286  *   Number of read names.
1287  */
1288 static int
1289 mrvl_xstats_get_names(struct rte_eth_dev *dev __rte_unused,
1290                       struct rte_eth_xstat_name *xstats_names,
1291                       unsigned int size)
1292 {
1293         unsigned int i;
1294
1295         if (!xstats_names)
1296                 return RTE_DIM(mrvl_xstats_tbl);
1297
1298         for (i = 0; i < size && i < RTE_DIM(mrvl_xstats_tbl); i++)
1299                 snprintf(xstats_names[i].name, RTE_ETH_XSTATS_NAME_SIZE, "%s",
1300                          mrvl_xstats_tbl[i].name);
1301
1302         return size;
1303 }
1304
1305 /**
1306  * DPDK callback to get information about the device.
1307  *
1308  * @param dev
1309  *   Pointer to Ethernet device structure (unused).
1310  * @param info
1311  *   Info structure output buffer.
1312  */
1313 static void
1314 mrvl_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
1315                    struct rte_eth_dev_info *info)
1316 {
1317         info->speed_capa = ETH_LINK_SPEED_10M |
1318                            ETH_LINK_SPEED_100M |
1319                            ETH_LINK_SPEED_1G |
1320                            ETH_LINK_SPEED_10G;
1321
1322         info->max_rx_queues = MRVL_PP2_RXQ_MAX;
1323         info->max_tx_queues = MRVL_PP2_TXQ_MAX;
1324         info->max_mac_addrs = MRVL_MAC_ADDRS_MAX;
1325
1326         info->rx_desc_lim.nb_max = MRVL_PP2_RXD_MAX;
1327         info->rx_desc_lim.nb_min = MRVL_PP2_RXD_MIN;
1328         info->rx_desc_lim.nb_align = MRVL_PP2_RXD_ALIGN;
1329
1330         info->tx_desc_lim.nb_max = MRVL_PP2_TXD_MAX;
1331         info->tx_desc_lim.nb_min = MRVL_PP2_TXD_MIN;
1332         info->tx_desc_lim.nb_align = MRVL_PP2_TXD_ALIGN;
1333
1334         info->rx_offload_capa = MRVL_RX_OFFLOADS;
1335         info->rx_queue_offload_capa = MRVL_RX_OFFLOADS;
1336
1337         info->tx_offload_capa = MRVL_TX_OFFLOADS;
1338         info->tx_queue_offload_capa = MRVL_TX_OFFLOADS;
1339
1340         info->flow_type_rss_offloads = ETH_RSS_IPV4 |
1341                                        ETH_RSS_NONFRAG_IPV4_TCP |
1342                                        ETH_RSS_NONFRAG_IPV4_UDP;
1343
1344         /* By default packets are dropped if no descriptors are available */
1345         info->default_rxconf.rx_drop_en = 1;
1346         info->default_rxconf.offloads = DEV_RX_OFFLOAD_CRC_STRIP;
1347
1348         info->max_rx_pktlen = MRVL_PKT_SIZE_MAX;
1349 }
1350
1351 /**
1352  * Return supported packet types.
1353  *
1354  * @param dev
1355  *   Pointer to Ethernet device structure (unused).
1356  *
1357  * @return
1358  *   Const pointer to the table with supported packet types.
1359  */
1360 static const uint32_t *
1361 mrvl_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
1362 {
1363         static const uint32_t ptypes[] = {
1364                 RTE_PTYPE_L2_ETHER,
1365                 RTE_PTYPE_L3_IPV4,
1366                 RTE_PTYPE_L3_IPV4_EXT,
1367                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
1368                 RTE_PTYPE_L3_IPV6,
1369                 RTE_PTYPE_L3_IPV6_EXT,
1370                 RTE_PTYPE_L2_ETHER_ARP,
1371                 RTE_PTYPE_L4_TCP,
1372                 RTE_PTYPE_L4_UDP
1373         };
1374
1375         return ptypes;
1376 }
1377
1378 /**
1379  * DPDK callback to get information about specific receive queue.
1380  *
1381  * @param dev
1382  *   Pointer to Ethernet device structure.
1383  * @param rx_queue_id
1384  *   Receive queue index.
1385  * @param qinfo
1386  *   Receive queue information structure.
1387  */
1388 static void mrvl_rxq_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
1389                               struct rte_eth_rxq_info *qinfo)
1390 {
1391         struct mrvl_rxq *q = dev->data->rx_queues[rx_queue_id];
1392         struct mrvl_priv *priv = dev->data->dev_private;
1393         int inq = priv->rxq_map[rx_queue_id].inq;
1394         int tc = priv->rxq_map[rx_queue_id].tc;
1395         struct pp2_ppio_tc_params *tc_params =
1396                 &priv->ppio_params.inqs_params.tcs_params[tc];
1397
1398         qinfo->mp = q->mp;
1399         qinfo->nb_desc = tc_params->inqs_params[inq].size;
1400 }
1401
1402 /**
1403  * DPDK callback to get information about specific transmit queue.
1404  *
1405  * @param dev
1406  *   Pointer to Ethernet device structure.
1407  * @param tx_queue_id
1408  *   Transmit queue index.
1409  * @param qinfo
1410  *   Transmit queue information structure.
1411  */
1412 static void mrvl_txq_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
1413                               struct rte_eth_txq_info *qinfo)
1414 {
1415         struct mrvl_priv *priv = dev->data->dev_private;
1416         struct mrvl_txq *txq = dev->data->tx_queues[tx_queue_id];
1417
1418         qinfo->nb_desc =
1419                 priv->ppio_params.outqs_params.outqs_params[tx_queue_id].size;
1420         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1421 }
1422
1423 /**
1424  * DPDK callback to Configure a VLAN filter.
1425  *
1426  * @param dev
1427  *   Pointer to Ethernet device structure.
1428  * @param vlan_id
1429  *   VLAN ID to filter.
1430  * @param on
1431  *   Toggle filter.
1432  *
1433  * @return
1434  *   0 on success, negative error value otherwise.
1435  */
1436 static int
1437 mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1438 {
1439         struct mrvl_priv *priv = dev->data->dev_private;
1440
1441         if (!priv->ppio)
1442                 return -EPERM;
1443
1444         if (priv->isolated)
1445                 return -ENOTSUP;
1446
1447         return on ? pp2_ppio_add_vlan(priv->ppio, vlan_id) :
1448                     pp2_ppio_remove_vlan(priv->ppio, vlan_id);
1449 }
1450
1451 /**
1452  * Release buffers to hardware bpool (buffer-pool)
1453  *
1454  * @param rxq
1455  *   Receive queue pointer.
1456  * @param num
1457  *   Number of buffers to release to bpool.
1458  *
1459  * @return
1460  *   0 on success, negative error value otherwise.
1461  */
1462 static int
1463 mrvl_fill_bpool(struct mrvl_rxq *rxq, int num)
1464 {
1465         struct buff_release_entry entries[MRVL_PP2_RXD_MAX];
1466         struct rte_mbuf *mbufs[MRVL_PP2_RXD_MAX];
1467         int i, ret;
1468         unsigned int core_id;
1469         struct pp2_hif *hif;
1470         struct pp2_bpool *bpool;
1471
1472         core_id = rte_lcore_id();
1473         if (core_id == LCORE_ID_ANY)
1474                 core_id = 0;
1475
1476         hif = mrvl_get_hif(rxq->priv, core_id);
1477         if (!hif)
1478                 return -1;
1479
1480         bpool = rxq->priv->bpool;
1481
1482         ret = rte_pktmbuf_alloc_bulk(rxq->mp, mbufs, num);
1483         if (ret)
1484                 return ret;
1485
1486         if (cookie_addr_high == MRVL_COOKIE_ADDR_INVALID)
1487                 cookie_addr_high =
1488                         (uint64_t)mbufs[0] & MRVL_COOKIE_HIGH_ADDR_MASK;
1489
1490         for (i = 0; i < num; i++) {
1491                 if (((uint64_t)mbufs[i] & MRVL_COOKIE_HIGH_ADDR_MASK)
1492                         != cookie_addr_high) {
1493                         RTE_LOG(ERR, PMD,
1494                                 "mbuf virtual addr high 0x%lx out of range\n",
1495                                 (uint64_t)mbufs[i] >> 32);
1496                         goto out;
1497                 }
1498
1499                 entries[i].buff.addr =
1500                         rte_mbuf_data_iova_default(mbufs[i]);
1501                 entries[i].buff.cookie = (pp2_cookie_t)(uint64_t)mbufs[i];
1502                 entries[i].bpool = bpool;
1503         }
1504
1505         pp2_bpool_put_buffs(hif, entries, (uint16_t *)&i);
1506         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] += i;
1507
1508         if (i != num)
1509                 goto out;
1510
1511         return 0;
1512 out:
1513         for (; i < num; i++)
1514                 rte_pktmbuf_free(mbufs[i]);
1515
1516         return -1;
1517 }
1518
1519 /**
1520  * Check whether requested rx queue offloads match port offloads.
1521  *
1522  * @param
1523  *   dev Pointer to the device.
1524  * @param
1525  *   requested Bitmap of the requested offloads.
1526  *
1527  * @return
1528  *   1 if requested offloads are okay, 0 otherwise.
1529  */
1530 static int
1531 mrvl_rx_queue_offloads_okay(struct rte_eth_dev *dev, uint64_t requested)
1532 {
1533         uint64_t mandatory = dev->data->dev_conf.rxmode.offloads;
1534         uint64_t supported = MRVL_RX_OFFLOADS;
1535         uint64_t unsupported = requested & ~supported;
1536         uint64_t missing = mandatory & ~requested;
1537
1538         if (unsupported) {
1539                 RTE_LOG(ERR, PMD, "Some Rx offloads are not supported. "
1540                         "Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n",
1541                         requested, supported);
1542                 return 0;
1543         }
1544
1545         if (missing) {
1546                 RTE_LOG(ERR, PMD, "Some Rx offloads are missing. "
1547                         "Requested 0x%" PRIx64 " missing 0x%" PRIx64 ".\n",
1548                         requested, missing);
1549                 return 0;
1550         }
1551
1552         return 1;
1553 }
1554
1555 /**
1556  * DPDK callback to configure the receive queue.
1557  *
1558  * @param dev
1559  *   Pointer to Ethernet device structure.
1560  * @param idx
1561  *   RX queue index.
1562  * @param desc
1563  *   Number of descriptors to configure in queue.
1564  * @param socket
1565  *   NUMA socket on which memory must be allocated.
1566  * @param conf
1567  *   Thresholds parameters.
1568  * @param mp
1569  *   Memory pool for buffer allocations.
1570  *
1571  * @return
1572  *   0 on success, negative error value otherwise.
1573  */
1574 static int
1575 mrvl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1576                     unsigned int socket,
1577                     const struct rte_eth_rxconf *conf,
1578                     struct rte_mempool *mp)
1579 {
1580         struct mrvl_priv *priv = dev->data->dev_private;
1581         struct mrvl_rxq *rxq;
1582         uint32_t min_size,
1583                  max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1584         int ret, tc, inq;
1585
1586         if (!mrvl_rx_queue_offloads_okay(dev, conf->offloads))
1587                 return -ENOTSUP;
1588
1589         if (priv->rxq_map[idx].tc == MRVL_UNKNOWN_TC) {
1590                 /*
1591                  * Unknown TC mapping, mapping will not have a correct queue.
1592                  */
1593                 RTE_LOG(ERR, PMD, "Unknown TC mapping for queue %hu eth%hhu\n",
1594                         idx, priv->ppio_id);
1595                 return -EFAULT;
1596         }
1597
1598         min_size = rte_pktmbuf_data_room_size(mp) - RTE_PKTMBUF_HEADROOM -
1599                    MRVL_PKT_EFFEC_OFFS;
1600         if (min_size < max_rx_pkt_len) {
1601                 RTE_LOG(ERR, PMD,
1602                         "Mbuf size must be increased to %u bytes to hold up to %u bytes of data.\n",
1603                         max_rx_pkt_len + RTE_PKTMBUF_HEADROOM +
1604                         MRVL_PKT_EFFEC_OFFS,
1605                         max_rx_pkt_len);
1606                 return -EINVAL;
1607         }
1608
1609         if (dev->data->rx_queues[idx]) {
1610                 rte_free(dev->data->rx_queues[idx]);
1611                 dev->data->rx_queues[idx] = NULL;
1612         }
1613
1614         rxq = rte_zmalloc_socket("rxq", sizeof(*rxq), 0, socket);
1615         if (!rxq)
1616                 return -ENOMEM;
1617
1618         rxq->priv = priv;
1619         rxq->mp = mp;
1620         rxq->cksum_enabled =
1621                 dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_IPV4_CKSUM;
1622         rxq->queue_id = idx;
1623         rxq->port_id = dev->data->port_id;
1624         mrvl_port_to_bpool_lookup[rxq->port_id] = priv->bpool;
1625
1626         tc = priv->rxq_map[rxq->queue_id].tc,
1627         inq = priv->rxq_map[rxq->queue_id].inq;
1628         priv->ppio_params.inqs_params.tcs_params[tc].inqs_params[inq].size =
1629                 desc;
1630
1631         ret = mrvl_fill_bpool(rxq, desc);
1632         if (ret) {
1633                 rte_free(rxq);
1634                 return ret;
1635         }
1636
1637         priv->bpool_init_size += desc;
1638
1639         dev->data->rx_queues[idx] = rxq;
1640
1641         return 0;
1642 }
1643
1644 /**
1645  * DPDK callback to release the receive queue.
1646  *
1647  * @param rxq
1648  *   Generic receive queue pointer.
1649  */
1650 static void
1651 mrvl_rx_queue_release(void *rxq)
1652 {
1653         struct mrvl_rxq *q = rxq;
1654         struct pp2_ppio_tc_params *tc_params;
1655         int i, num, tc, inq;
1656         struct pp2_hif *hif;
1657         unsigned int core_id = rte_lcore_id();
1658
1659         if (core_id == LCORE_ID_ANY)
1660                 core_id = 0;
1661
1662         hif = mrvl_get_hif(q->priv, core_id);
1663
1664         if (!q || !hif)
1665                 return;
1666
1667         tc = q->priv->rxq_map[q->queue_id].tc;
1668         inq = q->priv->rxq_map[q->queue_id].inq;
1669         tc_params = &q->priv->ppio_params.inqs_params.tcs_params[tc];
1670         num = tc_params->inqs_params[inq].size;
1671         for (i = 0; i < num; i++) {
1672                 struct pp2_buff_inf inf;
1673                 uint64_t addr;
1674
1675                 pp2_bpool_get_buff(hif, q->priv->bpool, &inf);
1676                 addr = cookie_addr_high | inf.cookie;
1677                 rte_pktmbuf_free((struct rte_mbuf *)addr);
1678         }
1679
1680         rte_free(q);
1681 }
1682
1683 /**
1684  * Check whether requested tx queue offloads match port offloads.
1685  *
1686  * @param
1687  *   dev Pointer to the device.
1688  * @param
1689  *   requested Bitmap of the requested offloads.
1690  *
1691  * @return
1692  *   1 if requested offloads are okay, 0 otherwise.
1693  */
1694 static int
1695 mrvl_tx_queue_offloads_okay(struct rte_eth_dev *dev, uint64_t requested)
1696 {
1697         uint64_t mandatory = dev->data->dev_conf.txmode.offloads;
1698         uint64_t supported = MRVL_TX_OFFLOADS;
1699         uint64_t unsupported = requested & ~supported;
1700         uint64_t missing = mandatory & ~requested;
1701
1702         if (unsupported) {
1703                 RTE_LOG(ERR, PMD, "Some Tx offloads are not supported. "
1704                         "Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n",
1705                         requested, supported);
1706                 return 0;
1707         }
1708
1709         if (missing) {
1710                 RTE_LOG(ERR, PMD, "Some Tx offloads are missing. "
1711                         "Requested 0x%" PRIx64 " missing 0x%" PRIx64 ".\n",
1712                         requested, missing);
1713                 return 0;
1714         }
1715
1716         return 1;
1717 }
1718
1719 /**
1720  * DPDK callback to configure the transmit queue.
1721  *
1722  * @param dev
1723  *   Pointer to Ethernet device structure.
1724  * @param idx
1725  *   Transmit queue index.
1726  * @param desc
1727  *   Number of descriptors to configure in the queue.
1728  * @param socket
1729  *   NUMA socket on which memory must be allocated.
1730  * @param conf
1731  *   Tx queue configuration parameters.
1732  *
1733  * @return
1734  *   0 on success, negative error value otherwise.
1735  */
1736 static int
1737 mrvl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1738                     unsigned int socket,
1739                     const struct rte_eth_txconf *conf)
1740 {
1741         struct mrvl_priv *priv = dev->data->dev_private;
1742         struct mrvl_txq *txq;
1743
1744         if (!mrvl_tx_queue_offloads_okay(dev, conf->offloads))
1745                 return -ENOTSUP;
1746
1747         if (dev->data->tx_queues[idx]) {
1748                 rte_free(dev->data->tx_queues[idx]);
1749                 dev->data->tx_queues[idx] = NULL;
1750         }
1751
1752         txq = rte_zmalloc_socket("txq", sizeof(*txq), 0, socket);
1753         if (!txq)
1754                 return -ENOMEM;
1755
1756         txq->priv = priv;
1757         txq->queue_id = idx;
1758         txq->port_id = dev->data->port_id;
1759         txq->tx_deferred_start = conf->tx_deferred_start;
1760         dev->data->tx_queues[idx] = txq;
1761
1762         priv->ppio_params.outqs_params.outqs_params[idx].size = desc;
1763
1764         return 0;
1765 }
1766
1767 /**
1768  * DPDK callback to release the transmit queue.
1769  *
1770  * @param txq
1771  *   Generic transmit queue pointer.
1772  */
1773 static void
1774 mrvl_tx_queue_release(void *txq)
1775 {
1776         struct mrvl_txq *q = txq;
1777
1778         if (!q)
1779                 return;
1780
1781         rte_free(q);
1782 }
1783
1784 /**
1785  * DPDK callback to get flow control configuration.
1786  *
1787  * @param dev
1788  *  Pointer to Ethernet device structure.
1789  * @param fc_conf
1790  *  Pointer to the flow control configuration.
1791  *
1792  * @return
1793  *  0 on success, negative error value otherwise.
1794  */
1795 static int
1796 mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1797 {
1798         struct mrvl_priv *priv = dev->data->dev_private;
1799         int ret, en;
1800
1801         if (!priv)
1802                 return -EPERM;
1803
1804         ret = pp2_ppio_get_rx_pause(priv->ppio, &en);
1805         if (ret) {
1806                 RTE_LOG(ERR, PMD, "Failed to read rx pause state\n");
1807                 return ret;
1808         }
1809
1810         fc_conf->mode = en ? RTE_FC_RX_PAUSE : RTE_FC_NONE;
1811
1812         return 0;
1813 }
1814
1815 /**
1816  * DPDK callback to set flow control configuration.
1817  *
1818  * @param dev
1819  *  Pointer to Ethernet device structure.
1820  * @param fc_conf
1821  *  Pointer to the flow control configuration.
1822  *
1823  * @return
1824  *  0 on success, negative error value otherwise.
1825  */
1826 static int
1827 mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1828 {
1829         struct mrvl_priv *priv = dev->data->dev_private;
1830
1831         if (!priv)
1832                 return -EPERM;
1833
1834         if (fc_conf->high_water ||
1835             fc_conf->low_water ||
1836             fc_conf->pause_time ||
1837             fc_conf->mac_ctrl_frame_fwd ||
1838             fc_conf->autoneg) {
1839                 RTE_LOG(ERR, PMD, "Flowctrl parameter is not supported\n");
1840
1841                 return -EINVAL;
1842         }
1843
1844         if (fc_conf->mode == RTE_FC_NONE ||
1845             fc_conf->mode == RTE_FC_RX_PAUSE) {
1846                 int ret, en;
1847
1848                 en = fc_conf->mode == RTE_FC_NONE ? 0 : 1;
1849                 ret = pp2_ppio_set_rx_pause(priv->ppio, en);
1850                 if (ret)
1851                         RTE_LOG(ERR, PMD,
1852                                 "Failed to change flowctrl on RX side\n");
1853
1854                 return ret;
1855         }
1856
1857         return 0;
1858 }
1859
1860 /**
1861  * Update RSS hash configuration
1862  *
1863  * @param dev
1864  *   Pointer to Ethernet device structure.
1865  * @param rss_conf
1866  *   Pointer to RSS configuration.
1867  *
1868  * @return
1869  *   0 on success, negative error value otherwise.
1870  */
1871 static int
1872 mrvl_rss_hash_update(struct rte_eth_dev *dev,
1873                      struct rte_eth_rss_conf *rss_conf)
1874 {
1875         struct mrvl_priv *priv = dev->data->dev_private;
1876
1877         if (priv->isolated)
1878                 return -ENOTSUP;
1879
1880         return mrvl_configure_rss(priv, rss_conf);
1881 }
1882
1883 /**
1884  * DPDK callback to get RSS hash configuration.
1885  *
1886  * @param dev
1887  *   Pointer to Ethernet device structure.
1888  * @rss_conf
1889  *   Pointer to RSS configuration.
1890  *
1891  * @return
1892  *   Always 0.
1893  */
1894 static int
1895 mrvl_rss_hash_conf_get(struct rte_eth_dev *dev,
1896                        struct rte_eth_rss_conf *rss_conf)
1897 {
1898         struct mrvl_priv *priv = dev->data->dev_private;
1899         enum pp2_ppio_hash_type hash_type =
1900                 priv->ppio_params.inqs_params.hash_type;
1901
1902         rss_conf->rss_key = NULL;
1903
1904         if (hash_type == PP2_PPIO_HASH_T_NONE)
1905                 rss_conf->rss_hf = 0;
1906         else if (hash_type == PP2_PPIO_HASH_T_2_TUPLE)
1907                 rss_conf->rss_hf = ETH_RSS_IPV4;
1908         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && priv->rss_hf_tcp)
1909                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_TCP;
1910         else if (hash_type == PP2_PPIO_HASH_T_5_TUPLE && !priv->rss_hf_tcp)
1911                 rss_conf->rss_hf = ETH_RSS_NONFRAG_IPV4_UDP;
1912
1913         return 0;
1914 }
1915
1916 /**
1917  * DPDK callback to get rte_flow callbacks.
1918  *
1919  * @param dev
1920  *   Pointer to the device structure.
1921  * @param filer_type
1922  *   Flow filter type.
1923  * @param filter_op
1924  *   Flow filter operation.
1925  * @param arg
1926  *   Pointer to pass the flow ops.
1927  *
1928  * @return
1929  *   0 on success, negative error value otherwise.
1930  */
1931 static int
1932 mrvl_eth_filter_ctrl(struct rte_eth_dev *dev __rte_unused,
1933                      enum rte_filter_type filter_type,
1934                      enum rte_filter_op filter_op, void *arg)
1935 {
1936         switch (filter_type) {
1937         case RTE_ETH_FILTER_GENERIC:
1938                 if (filter_op != RTE_ETH_FILTER_GET)
1939                         return -EINVAL;
1940                 *(const void **)arg = &mrvl_flow_ops;
1941                 return 0;
1942         default:
1943                 RTE_LOG(WARNING, PMD, "Filter type (%d) not supported",
1944                                 filter_type);
1945                 return -EINVAL;
1946         }
1947 }
1948
1949 static const struct eth_dev_ops mrvl_ops = {
1950         .dev_configure = mrvl_dev_configure,
1951         .dev_start = mrvl_dev_start,
1952         .dev_stop = mrvl_dev_stop,
1953         .dev_set_link_up = mrvl_dev_set_link_up,
1954         .dev_set_link_down = mrvl_dev_set_link_down,
1955         .dev_close = mrvl_dev_close,
1956         .link_update = mrvl_link_update,
1957         .promiscuous_enable = mrvl_promiscuous_enable,
1958         .allmulticast_enable = mrvl_allmulticast_enable,
1959         .promiscuous_disable = mrvl_promiscuous_disable,
1960         .allmulticast_disable = mrvl_allmulticast_disable,
1961         .mac_addr_remove = mrvl_mac_addr_remove,
1962         .mac_addr_add = mrvl_mac_addr_add,
1963         .mac_addr_set = mrvl_mac_addr_set,
1964         .mtu_set = mrvl_mtu_set,
1965         .stats_get = mrvl_stats_get,
1966         .stats_reset = mrvl_stats_reset,
1967         .xstats_get = mrvl_xstats_get,
1968         .xstats_reset = mrvl_xstats_reset,
1969         .xstats_get_names = mrvl_xstats_get_names,
1970         .dev_infos_get = mrvl_dev_infos_get,
1971         .dev_supported_ptypes_get = mrvl_dev_supported_ptypes_get,
1972         .rxq_info_get = mrvl_rxq_info_get,
1973         .txq_info_get = mrvl_txq_info_get,
1974         .vlan_filter_set = mrvl_vlan_filter_set,
1975         .tx_queue_start = mrvl_tx_queue_start,
1976         .tx_queue_stop = mrvl_tx_queue_stop,
1977         .rx_queue_setup = mrvl_rx_queue_setup,
1978         .rx_queue_release = mrvl_rx_queue_release,
1979         .tx_queue_setup = mrvl_tx_queue_setup,
1980         .tx_queue_release = mrvl_tx_queue_release,
1981         .flow_ctrl_get = mrvl_flow_ctrl_get,
1982         .flow_ctrl_set = mrvl_flow_ctrl_set,
1983         .rss_hash_update = mrvl_rss_hash_update,
1984         .rss_hash_conf_get = mrvl_rss_hash_conf_get,
1985         .filter_ctrl = mrvl_eth_filter_ctrl,
1986 };
1987
1988 /**
1989  * Return packet type information and l3/l4 offsets.
1990  *
1991  * @param desc
1992  *   Pointer to the received packet descriptor.
1993  * @param l3_offset
1994  *   l3 packet offset.
1995  * @param l4_offset
1996  *   l4 packet offset.
1997  *
1998  * @return
1999  *   Packet type information.
2000  */
2001 static inline uint64_t
2002 mrvl_desc_to_packet_type_and_offset(struct pp2_ppio_desc *desc,
2003                                     uint8_t *l3_offset, uint8_t *l4_offset)
2004 {
2005         enum pp2_inq_l3_type l3_type;
2006         enum pp2_inq_l4_type l4_type;
2007         uint64_t packet_type;
2008
2009         pp2_ppio_inq_desc_get_l3_info(desc, &l3_type, l3_offset);
2010         pp2_ppio_inq_desc_get_l4_info(desc, &l4_type, l4_offset);
2011
2012         packet_type = RTE_PTYPE_L2_ETHER;
2013
2014         switch (l3_type) {
2015         case PP2_INQ_L3_TYPE_IPV4_NO_OPTS:
2016                 packet_type |= RTE_PTYPE_L3_IPV4;
2017                 break;
2018         case PP2_INQ_L3_TYPE_IPV4_OK:
2019                 packet_type |= RTE_PTYPE_L3_IPV4_EXT;
2020                 break;
2021         case PP2_INQ_L3_TYPE_IPV4_TTL_ZERO:
2022                 packet_type |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
2023                 break;
2024         case PP2_INQ_L3_TYPE_IPV6_NO_EXT:
2025                 packet_type |= RTE_PTYPE_L3_IPV6;
2026                 break;
2027         case PP2_INQ_L3_TYPE_IPV6_EXT:
2028                 packet_type |= RTE_PTYPE_L3_IPV6_EXT;
2029                 break;
2030         case PP2_INQ_L3_TYPE_ARP:
2031                 packet_type |= RTE_PTYPE_L2_ETHER_ARP;
2032                 /*
2033                  * In case of ARP l4_offset is set to wrong value.
2034                  * Set it to proper one so that later on mbuf->l3_len can be
2035                  * calculated subtracting l4_offset and l3_offset.
2036                  */
2037                 *l4_offset = *l3_offset + MRVL_ARP_LENGTH;
2038                 break;
2039         default:
2040                 RTE_LOG(DEBUG, PMD, "Failed to recognise l3 packet type\n");
2041                 break;
2042         }
2043
2044         switch (l4_type) {
2045         case PP2_INQ_L4_TYPE_TCP:
2046                 packet_type |= RTE_PTYPE_L4_TCP;
2047                 break;
2048         case PP2_INQ_L4_TYPE_UDP:
2049                 packet_type |= RTE_PTYPE_L4_UDP;
2050                 break;
2051         default:
2052                 RTE_LOG(DEBUG, PMD, "Failed to recognise l4 packet type\n");
2053                 break;
2054         }
2055
2056         return packet_type;
2057 }
2058
2059 /**
2060  * Get offload information from the received packet descriptor.
2061  *
2062  * @param desc
2063  *   Pointer to the received packet descriptor.
2064  *
2065  * @return
2066  *   Mbuf offload flags.
2067  */
2068 static inline uint64_t
2069 mrvl_desc_to_ol_flags(struct pp2_ppio_desc *desc)
2070 {
2071         uint64_t flags;
2072         enum pp2_inq_desc_status status;
2073
2074         status = pp2_ppio_inq_desc_get_l3_pkt_error(desc);
2075         if (unlikely(status != PP2_DESC_ERR_OK))
2076                 flags = PKT_RX_IP_CKSUM_BAD;
2077         else
2078                 flags = PKT_RX_IP_CKSUM_GOOD;
2079
2080         status = pp2_ppio_inq_desc_get_l4_pkt_error(desc);
2081         if (unlikely(status != PP2_DESC_ERR_OK))
2082                 flags |= PKT_RX_L4_CKSUM_BAD;
2083         else
2084                 flags |= PKT_RX_L4_CKSUM_GOOD;
2085
2086         return flags;
2087 }
2088
2089 /**
2090  * DPDK callback for receive.
2091  *
2092  * @param rxq
2093  *   Generic pointer to the receive queue.
2094  * @param rx_pkts
2095  *   Array to store received packets.
2096  * @param nb_pkts
2097  *   Maximum number of packets in array.
2098  *
2099  * @return
2100  *   Number of packets successfully received.
2101  */
2102 static uint16_t
2103 mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
2104 {
2105         struct mrvl_rxq *q = rxq;
2106         struct pp2_ppio_desc descs[nb_pkts];
2107         struct pp2_bpool *bpool;
2108         int i, ret, rx_done = 0;
2109         int num;
2110         struct pp2_hif *hif;
2111         unsigned int core_id = rte_lcore_id();
2112
2113         hif = mrvl_get_hif(q->priv, core_id);
2114
2115         if (unlikely(!q->priv->ppio || !hif))
2116                 return 0;
2117
2118         bpool = q->priv->bpool;
2119
2120         ret = pp2_ppio_recv(q->priv->ppio, q->priv->rxq_map[q->queue_id].tc,
2121                             q->priv->rxq_map[q->queue_id].inq, descs, &nb_pkts);
2122         if (unlikely(ret < 0)) {
2123                 RTE_LOG(ERR, PMD, "Failed to receive packets\n");
2124                 return 0;
2125         }
2126         mrvl_port_bpool_size[bpool->pp2_id][bpool->id][core_id] -= nb_pkts;
2127
2128         for (i = 0; i < nb_pkts; i++) {
2129                 struct rte_mbuf *mbuf;
2130                 uint8_t l3_offset, l4_offset;
2131                 enum pp2_inq_desc_status status;
2132                 uint64_t addr;
2133
2134                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2135                         struct pp2_ppio_desc *pref_desc;
2136                         u64 pref_addr;
2137
2138                         pref_desc = &descs[i + MRVL_MUSDK_PREFETCH_SHIFT];
2139                         pref_addr = cookie_addr_high |
2140                                     pp2_ppio_inq_desc_get_cookie(pref_desc);
2141                         rte_mbuf_prefetch_part1((struct rte_mbuf *)(pref_addr));
2142                         rte_mbuf_prefetch_part2((struct rte_mbuf *)(pref_addr));
2143                 }
2144
2145                 addr = cookie_addr_high |
2146                        pp2_ppio_inq_desc_get_cookie(&descs[i]);
2147                 mbuf = (struct rte_mbuf *)addr;
2148                 rte_pktmbuf_reset(mbuf);
2149
2150                 /* drop packet in case of mac, overrun or resource error */
2151                 status = pp2_ppio_inq_desc_get_l2_pkt_error(&descs[i]);
2152                 if (unlikely(status != PP2_DESC_ERR_OK)) {
2153                         struct pp2_buff_inf binf = {
2154                                 .addr = rte_mbuf_data_iova_default(mbuf),
2155                                 .cookie = (pp2_cookie_t)(uint64_t)mbuf,
2156                         };
2157
2158                         pp2_bpool_put_buff(hif, bpool, &binf);
2159                         mrvl_port_bpool_size
2160                                 [bpool->pp2_id][bpool->id][core_id]++;
2161                         q->drop_mac++;
2162                         continue;
2163                 }
2164
2165                 mbuf->data_off += MRVL_PKT_EFFEC_OFFS;
2166                 mbuf->pkt_len = pp2_ppio_inq_desc_get_pkt_len(&descs[i]);
2167                 mbuf->data_len = mbuf->pkt_len;
2168                 mbuf->port = q->port_id;
2169                 mbuf->packet_type =
2170                         mrvl_desc_to_packet_type_and_offset(&descs[i],
2171                                                             &l3_offset,
2172                                                             &l4_offset);
2173                 mbuf->l2_len = l3_offset;
2174                 mbuf->l3_len = l4_offset - l3_offset;
2175
2176                 if (likely(q->cksum_enabled))
2177                         mbuf->ol_flags = mrvl_desc_to_ol_flags(&descs[i]);
2178
2179                 rx_pkts[rx_done++] = mbuf;
2180                 q->bytes_recv += mbuf->pkt_len;
2181         }
2182
2183         if (rte_spinlock_trylock(&q->priv->lock) == 1) {
2184                 num = mrvl_get_bpool_size(bpool->pp2_id, bpool->id);
2185
2186                 if (unlikely(num <= q->priv->bpool_min_size ||
2187                              (!rx_done && num < q->priv->bpool_init_size))) {
2188                         ret = mrvl_fill_bpool(q, MRVL_BURST_SIZE);
2189                         if (ret)
2190                                 RTE_LOG(ERR, PMD, "Failed to fill bpool\n");
2191                 } else if (unlikely(num > q->priv->bpool_max_size)) {
2192                         int i;
2193                         int pkt_to_remove = num - q->priv->bpool_init_size;
2194                         struct rte_mbuf *mbuf;
2195                         struct pp2_buff_inf buff;
2196
2197                         RTE_LOG(DEBUG, PMD,
2198                                 "\nport-%d:%d: bpool %d oversize - remove %d buffers (pool size: %d -> %d)\n",
2199                                 bpool->pp2_id, q->priv->ppio->port_id,
2200                                 bpool->id, pkt_to_remove, num,
2201                                 q->priv->bpool_init_size);
2202
2203                         for (i = 0; i < pkt_to_remove; i++) {
2204                                 ret = pp2_bpool_get_buff(hif, bpool, &buff);
2205                                 if (ret)
2206                                         break;
2207                                 mbuf = (struct rte_mbuf *)
2208                                         (cookie_addr_high | buff.cookie);
2209                                 rte_pktmbuf_free(mbuf);
2210                         }
2211                         mrvl_port_bpool_size
2212                                 [bpool->pp2_id][bpool->id][core_id] -= i;
2213                 }
2214                 rte_spinlock_unlock(&q->priv->lock);
2215         }
2216
2217         return rx_done;
2218 }
2219
2220 /**
2221  * Prepare offload information.
2222  *
2223  * @param ol_flags
2224  *   Offload flags.
2225  * @param packet_type
2226  *   Packet type bitfield.
2227  * @param l3_type
2228  *   Pointer to the pp2_ouq_l3_type structure.
2229  * @param l4_type
2230  *   Pointer to the pp2_outq_l4_type structure.
2231  * @param gen_l3_cksum
2232  *   Will be set to 1 in case l3 checksum is computed.
2233  * @param l4_cksum
2234  *   Will be set to 1 in case l4 checksum is computed.
2235  *
2236  * @return
2237  *   0 on success, negative error value otherwise.
2238  */
2239 static inline int
2240 mrvl_prepare_proto_info(uint64_t ol_flags, uint32_t packet_type,
2241                         enum pp2_outq_l3_type *l3_type,
2242                         enum pp2_outq_l4_type *l4_type,
2243                         int *gen_l3_cksum,
2244                         int *gen_l4_cksum)
2245 {
2246         /*
2247          * Based on ol_flags prepare information
2248          * for pp2_ppio_outq_desc_set_proto_info() which setups descriptor
2249          * for offloading.
2250          */
2251         if (ol_flags & PKT_TX_IPV4) {
2252                 *l3_type = PP2_OUTQ_L3_TYPE_IPV4;
2253                 *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0;
2254         } else if (ol_flags & PKT_TX_IPV6) {
2255                 *l3_type = PP2_OUTQ_L3_TYPE_IPV6;
2256                 /* no checksum for ipv6 header */
2257                 *gen_l3_cksum = 0;
2258         } else {
2259                 /* if something different then stop processing */
2260                 return -1;
2261         }
2262
2263         ol_flags &= PKT_TX_L4_MASK;
2264         if ((packet_type & RTE_PTYPE_L4_TCP) &&
2265             ol_flags == PKT_TX_TCP_CKSUM) {
2266                 *l4_type = PP2_OUTQ_L4_TYPE_TCP;
2267                 *gen_l4_cksum = 1;
2268         } else if ((packet_type & RTE_PTYPE_L4_UDP) &&
2269                    ol_flags == PKT_TX_UDP_CKSUM) {
2270                 *l4_type = PP2_OUTQ_L4_TYPE_UDP;
2271                 *gen_l4_cksum = 1;
2272         } else {
2273                 *l4_type = PP2_OUTQ_L4_TYPE_OTHER;
2274                 /* no checksum for other type */
2275                 *gen_l4_cksum = 0;
2276         }
2277
2278         return 0;
2279 }
2280
2281 /**
2282  * Release already sent buffers to bpool (buffer-pool).
2283  *
2284  * @param ppio
2285  *   Pointer to the port structure.
2286  * @param hif
2287  *   Pointer to the MUSDK hardware interface.
2288  * @param sq
2289  *   Pointer to the shadow queue.
2290  * @param qid
2291  *   Queue id number.
2292  * @param force
2293  *   Force releasing packets.
2294  */
2295 static inline void
2296 mrvl_free_sent_buffers(struct pp2_ppio *ppio, struct pp2_hif *hif,
2297                        unsigned int core_id, struct mrvl_shadow_txq *sq,
2298                        int qid, int force)
2299 {
2300         struct buff_release_entry *entry;
2301         uint16_t nb_done = 0, num = 0, skip_bufs = 0;
2302         int i;
2303
2304         pp2_ppio_get_num_outq_done(ppio, hif, qid, &nb_done);
2305
2306         sq->num_to_release += nb_done;
2307
2308         if (likely(!force &&
2309                    sq->num_to_release < MRVL_PP2_BUF_RELEASE_BURST_SIZE))
2310                 return;
2311
2312         nb_done = sq->num_to_release;
2313         sq->num_to_release = 0;
2314
2315         for (i = 0; i < nb_done; i++) {
2316                 entry = &sq->ent[sq->tail + num];
2317                 if (unlikely(!entry->buff.addr)) {
2318                         RTE_LOG(ERR, PMD,
2319                                 "Shadow memory @%d: cookie(%lx), pa(%lx)!\n",
2320                                 sq->tail, (u64)entry->buff.cookie,
2321                                 (u64)entry->buff.addr);
2322                         skip_bufs = 1;
2323                         goto skip;
2324                 }
2325
2326                 if (unlikely(!entry->bpool)) {
2327                         struct rte_mbuf *mbuf;
2328
2329                         mbuf = (struct rte_mbuf *)
2330                                (cookie_addr_high | entry->buff.cookie);
2331                         rte_pktmbuf_free(mbuf);
2332                         skip_bufs = 1;
2333                         goto skip;
2334                 }
2335
2336                 mrvl_port_bpool_size
2337                         [entry->bpool->pp2_id][entry->bpool->id][core_id]++;
2338                 num++;
2339                 if (unlikely(sq->tail + num == MRVL_PP2_TX_SHADOWQ_SIZE))
2340                         goto skip;
2341                 continue;
2342 skip:
2343                 if (likely(num))
2344                         pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2345                 num += skip_bufs;
2346                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2347                 sq->size -= num;
2348                 num = 0;
2349                 skip_bufs = 0;
2350         }
2351
2352         if (likely(num)) {
2353                 pp2_bpool_put_buffs(hif, &sq->ent[sq->tail], &num);
2354                 sq->tail = (sq->tail + num) & MRVL_PP2_TX_SHADOWQ_MASK;
2355                 sq->size -= num;
2356         }
2357 }
2358
2359 /**
2360  * DPDK callback for transmit.
2361  *
2362  * @param txq
2363  *   Generic pointer transmit queue.
2364  * @param tx_pkts
2365  *   Packets to transmit.
2366  * @param nb_pkts
2367  *   Number of packets in array.
2368  *
2369  * @return
2370  *   Number of packets successfully transmitted.
2371  */
2372 static uint16_t
2373 mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
2374 {
2375         struct mrvl_txq *q = txq;
2376         struct mrvl_shadow_txq *sq;
2377         struct pp2_hif *hif;
2378         struct pp2_ppio_desc descs[nb_pkts];
2379         unsigned int core_id = rte_lcore_id();
2380         int i, ret, bytes_sent = 0;
2381         uint16_t num, sq_free_size;
2382         uint64_t addr;
2383
2384         hif = mrvl_get_hif(q->priv, core_id);
2385         sq = &q->shadow_txqs[core_id];
2386
2387         if (unlikely(!q->priv->ppio || !hif))
2388                 return 0;
2389
2390         if (sq->size)
2391                 mrvl_free_sent_buffers(q->priv->ppio, hif, core_id,
2392                                        sq, q->queue_id, 0);
2393
2394         sq_free_size = MRVL_PP2_TX_SHADOWQ_SIZE - sq->size - 1;
2395         if (unlikely(nb_pkts > sq_free_size)) {
2396                 RTE_LOG(DEBUG, PMD,
2397                         "No room in shadow queue for %d packets! %d packets will be sent.\n",
2398                         nb_pkts, sq_free_size);
2399                 nb_pkts = sq_free_size;
2400         }
2401
2402         for (i = 0; i < nb_pkts; i++) {
2403                 struct rte_mbuf *mbuf = tx_pkts[i];
2404                 int gen_l3_cksum, gen_l4_cksum;
2405                 enum pp2_outq_l3_type l3_type;
2406                 enum pp2_outq_l4_type l4_type;
2407
2408                 if (likely(nb_pkts - i > MRVL_MUSDK_PREFETCH_SHIFT)) {
2409                         struct rte_mbuf *pref_pkt_hdr;
2410
2411                         pref_pkt_hdr = tx_pkts[i + MRVL_MUSDK_PREFETCH_SHIFT];
2412                         rte_mbuf_prefetch_part1(pref_pkt_hdr);
2413                         rte_mbuf_prefetch_part2(pref_pkt_hdr);
2414                 }
2415
2416                 sq->ent[sq->head].buff.cookie = (pp2_cookie_t)(uint64_t)mbuf;
2417                 sq->ent[sq->head].buff.addr =
2418                         rte_mbuf_data_iova_default(mbuf);
2419                 sq->ent[sq->head].bpool =
2420                         (unlikely(mbuf->port >= RTE_MAX_ETHPORTS ||
2421                          mbuf->refcnt > 1)) ? NULL :
2422                          mrvl_port_to_bpool_lookup[mbuf->port];
2423                 sq->head = (sq->head + 1) & MRVL_PP2_TX_SHADOWQ_MASK;
2424                 sq->size++;
2425
2426                 pp2_ppio_outq_desc_reset(&descs[i]);
2427                 pp2_ppio_outq_desc_set_phys_addr(&descs[i],
2428                                                  rte_pktmbuf_iova(mbuf));
2429                 pp2_ppio_outq_desc_set_pkt_offset(&descs[i], 0);
2430                 pp2_ppio_outq_desc_set_pkt_len(&descs[i],
2431                                                rte_pktmbuf_pkt_len(mbuf));
2432
2433                 bytes_sent += rte_pktmbuf_pkt_len(mbuf);
2434                 /*
2435                  * in case unsupported ol_flags were passed
2436                  * do not update descriptor offload information
2437                  */
2438                 ret = mrvl_prepare_proto_info(mbuf->ol_flags, mbuf->packet_type,
2439                                               &l3_type, &l4_type, &gen_l3_cksum,
2440                                               &gen_l4_cksum);
2441                 if (unlikely(ret))
2442                         continue;
2443
2444                 pp2_ppio_outq_desc_set_proto_info(&descs[i], l3_type, l4_type,
2445                                                   mbuf->l2_len,
2446                                                   mbuf->l2_len + mbuf->l3_len,
2447                                                   gen_l3_cksum, gen_l4_cksum);
2448         }
2449
2450         num = nb_pkts;
2451         pp2_ppio_send(q->priv->ppio, hif, q->queue_id, descs, &nb_pkts);
2452         /* number of packets that were not sent */
2453         if (unlikely(num > nb_pkts)) {
2454                 for (i = nb_pkts; i < num; i++) {
2455                         sq->head = (MRVL_PP2_TX_SHADOWQ_SIZE + sq->head - 1) &
2456                                 MRVL_PP2_TX_SHADOWQ_MASK;
2457                         addr = cookie_addr_high | sq->ent[sq->head].buff.cookie;
2458                         bytes_sent -=
2459                                 rte_pktmbuf_pkt_len((struct rte_mbuf *)addr);
2460                 }
2461                 sq->size -= num - nb_pkts;
2462         }
2463
2464         q->bytes_sent += bytes_sent;
2465
2466         return nb_pkts;
2467 }
2468
2469 /**
2470  * Initialize packet processor.
2471  *
2472  * @return
2473  *   0 on success, negative error value otherwise.
2474  */
2475 static int
2476 mrvl_init_pp2(void)
2477 {
2478         struct pp2_init_params init_params;
2479
2480         memset(&init_params, 0, sizeof(init_params));
2481         init_params.hif_reserved_map = MRVL_MUSDK_HIFS_RESERVED;
2482         init_params.bm_pool_reserved_map = MRVL_MUSDK_BPOOLS_RESERVED;
2483         init_params.rss_tbl_reserved_map = MRVL_MUSDK_RSS_RESERVED;
2484
2485         return pp2_init(&init_params);
2486 }
2487
2488 /**
2489  * Deinitialize packet processor.
2490  *
2491  * @return
2492  *   0 on success, negative error value otherwise.
2493  */
2494 static void
2495 mrvl_deinit_pp2(void)
2496 {
2497         pp2_deinit();
2498 }
2499
2500 /**
2501  * Create private device structure.
2502  *
2503  * @param dev_name
2504  *   Pointer to the port name passed in the initialization parameters.
2505  *
2506  * @return
2507  *   Pointer to the newly allocated private device structure.
2508  */
2509 static struct mrvl_priv *
2510 mrvl_priv_create(const char *dev_name)
2511 {
2512         struct pp2_bpool_params bpool_params;
2513         char match[MRVL_MATCH_LEN];
2514         struct mrvl_priv *priv;
2515         int ret, bpool_bit;
2516
2517         priv = rte_zmalloc_socket(dev_name, sizeof(*priv), 0, rte_socket_id());
2518         if (!priv)
2519                 return NULL;
2520
2521         ret = pp2_netdev_get_ppio_info((char *)(uintptr_t)dev_name,
2522                                        &priv->pp_id, &priv->ppio_id);
2523         if (ret)
2524                 goto out_free_priv;
2525
2526         bpool_bit = mrvl_reserve_bit(&used_bpools[priv->pp_id],
2527                                      PP2_BPOOL_NUM_POOLS);
2528         if (bpool_bit < 0)
2529                 goto out_free_priv;
2530         priv->bpool_bit = bpool_bit;
2531
2532         snprintf(match, sizeof(match), "pool-%d:%d", priv->pp_id,
2533                  priv->bpool_bit);
2534         memset(&bpool_params, 0, sizeof(bpool_params));
2535         bpool_params.match = match;
2536         bpool_params.buff_len = MRVL_PKT_SIZE_MAX + MRVL_PKT_EFFEC_OFFS;
2537         ret = pp2_bpool_init(&bpool_params, &priv->bpool);
2538         if (ret)
2539                 goto out_clear_bpool_bit;
2540
2541         priv->ppio_params.type = PP2_PPIO_T_NIC;
2542         rte_spinlock_init(&priv->lock);
2543
2544         return priv;
2545 out_clear_bpool_bit:
2546         used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
2547 out_free_priv:
2548         rte_free(priv);
2549         return NULL;
2550 }
2551
2552 /**
2553  * Create device representing Ethernet port.
2554  *
2555  * @param name
2556  *   Pointer to the port's name.
2557  *
2558  * @return
2559  *   0 on success, negative error value otherwise.
2560  */
2561 static int
2562 mrvl_eth_dev_create(struct rte_vdev_device *vdev, const char *name)
2563 {
2564         int ret, fd = socket(AF_INET, SOCK_DGRAM, 0);
2565         struct rte_eth_dev *eth_dev;
2566         struct mrvl_priv *priv;
2567         struct ifreq req;
2568
2569         eth_dev = rte_eth_dev_allocate(name);
2570         if (!eth_dev)
2571                 return -ENOMEM;
2572
2573         priv = mrvl_priv_create(name);
2574         if (!priv) {
2575                 ret = -ENOMEM;
2576                 goto out_free_dev;
2577         }
2578
2579         eth_dev->data->mac_addrs =
2580                 rte_zmalloc("mac_addrs",
2581                             ETHER_ADDR_LEN * MRVL_MAC_ADDRS_MAX, 0);
2582         if (!eth_dev->data->mac_addrs) {
2583                 RTE_LOG(ERR, PMD, "Failed to allocate space for eth addrs\n");
2584                 ret = -ENOMEM;
2585                 goto out_free_priv;
2586         }
2587
2588         memset(&req, 0, sizeof(req));
2589         strcpy(req.ifr_name, name);
2590         ret = ioctl(fd, SIOCGIFHWADDR, &req);
2591         if (ret)
2592                 goto out_free_mac;
2593
2594         memcpy(eth_dev->data->mac_addrs[0].addr_bytes,
2595                req.ifr_addr.sa_data, ETHER_ADDR_LEN);
2596
2597         eth_dev->rx_pkt_burst = mrvl_rx_pkt_burst;
2598         eth_dev->tx_pkt_burst = mrvl_tx_pkt_burst;
2599         eth_dev->data->kdrv = RTE_KDRV_NONE;
2600         eth_dev->data->dev_private = priv;
2601         eth_dev->device = &vdev->device;
2602         eth_dev->dev_ops = &mrvl_ops;
2603
2604         return 0;
2605 out_free_mac:
2606         rte_free(eth_dev->data->mac_addrs);
2607 out_free_dev:
2608         rte_eth_dev_release_port(eth_dev);
2609 out_free_priv:
2610         rte_free(priv);
2611
2612         return ret;
2613 }
2614
2615 /**
2616  * Cleanup previously created device representing Ethernet port.
2617  *
2618  * @param name
2619  *   Pointer to the port name.
2620  */
2621 static void
2622 mrvl_eth_dev_destroy(const char *name)
2623 {
2624         struct rte_eth_dev *eth_dev;
2625         struct mrvl_priv *priv;
2626
2627         eth_dev = rte_eth_dev_allocated(name);
2628         if (!eth_dev)
2629                 return;
2630
2631         priv = eth_dev->data->dev_private;
2632         pp2_bpool_deinit(priv->bpool);
2633         used_bpools[priv->pp_id] &= ~(1 << priv->bpool_bit);
2634         rte_free(priv);
2635         rte_free(eth_dev->data->mac_addrs);
2636         rte_eth_dev_release_port(eth_dev);
2637 }
2638
2639 /**
2640  * Callback used by rte_kvargs_process() during argument parsing.
2641  *
2642  * @param key
2643  *   Pointer to the parsed key (unused).
2644  * @param value
2645  *   Pointer to the parsed value.
2646  * @param extra_args
2647  *   Pointer to the extra arguments which contains address of the
2648  *   table of pointers to parsed interface names.
2649  *
2650  * @return
2651  *   Always 0.
2652  */
2653 static int
2654 mrvl_get_ifnames(const char *key __rte_unused, const char *value,
2655                  void *extra_args)
2656 {
2657         struct mrvl_ifnames *ifnames = extra_args;
2658
2659         ifnames->names[ifnames->idx++] = value;
2660
2661         return 0;
2662 }
2663
2664 /**
2665  * Deinitialize per-lcore MUSDK hardware interfaces (hifs).
2666  */
2667 static void
2668 mrvl_deinit_hifs(void)
2669 {
2670         int i;
2671
2672         for (i = mrvl_lcore_first; i <= mrvl_lcore_last; i++) {
2673                 if (hifs[i])
2674                         pp2_hif_deinit(hifs[i]);
2675         }
2676         used_hifs = MRVL_MUSDK_HIFS_RESERVED;
2677         memset(hifs, 0, sizeof(hifs));
2678 }
2679
2680 /**
2681  * DPDK callback to register the virtual device.
2682  *
2683  * @param vdev
2684  *   Pointer to the virtual device.
2685  *
2686  * @return
2687  *   0 on success, negative error value otherwise.
2688  */
2689 static int
2690 rte_pmd_mrvl_probe(struct rte_vdev_device *vdev)
2691 {
2692         struct rte_kvargs *kvlist;
2693         struct mrvl_ifnames ifnames;
2694         int ret = -EINVAL;
2695         uint32_t i, ifnum, cfgnum;
2696         const char *params;
2697
2698         params = rte_vdev_device_args(vdev);
2699         if (!params)
2700                 return -EINVAL;
2701
2702         kvlist = rte_kvargs_parse(params, valid_args);
2703         if (!kvlist)
2704                 return -EINVAL;
2705
2706         ifnum = rte_kvargs_count(kvlist, MRVL_IFACE_NAME_ARG);
2707         if (ifnum > RTE_DIM(ifnames.names))
2708                 goto out_free_kvlist;
2709
2710         ifnames.idx = 0;
2711         rte_kvargs_process(kvlist, MRVL_IFACE_NAME_ARG,
2712                            mrvl_get_ifnames, &ifnames);
2713
2714
2715         /*
2716          * The below system initialization should be done only once,
2717          * on the first provided configuration file
2718          */
2719         if (!mrvl_qos_cfg) {
2720                 cfgnum = rte_kvargs_count(kvlist, MRVL_CFG_ARG);
2721                 RTE_LOG(INFO, PMD, "Parsing config file!\n");
2722                 if (cfgnum > 1) {
2723                         RTE_LOG(ERR, PMD, "Cannot handle more than one config file!\n");
2724                         goto out_free_kvlist;
2725                 } else if (cfgnum == 1) {
2726                         rte_kvargs_process(kvlist, MRVL_CFG_ARG,
2727                                            mrvl_get_qoscfg, &mrvl_qos_cfg);
2728                 }
2729         }
2730
2731         if (mrvl_dev_num)
2732                 goto init_devices;
2733
2734         RTE_LOG(INFO, PMD, "Perform MUSDK initializations\n");
2735         /*
2736          * ret == -EEXIST is correct, it means DMA
2737          * has been already initialized (by another PMD).
2738          */
2739         ret = mv_sys_dma_mem_init(MRVL_MUSDK_DMA_MEMSIZE);
2740         if (ret < 0) {
2741                 if (ret != -EEXIST)
2742                         goto out_free_kvlist;
2743                 else
2744                         RTE_LOG(INFO, PMD,
2745                                 "DMA memory has been already initialized by a different driver.\n");
2746         }
2747
2748         ret = mrvl_init_pp2();
2749         if (ret) {
2750                 RTE_LOG(ERR, PMD, "Failed to init PP!\n");
2751                 goto out_deinit_dma;
2752         }
2753
2754         memset(mrvl_port_bpool_size, 0, sizeof(mrvl_port_bpool_size));
2755         memset(mrvl_port_to_bpool_lookup, 0, sizeof(mrvl_port_to_bpool_lookup));
2756
2757         mrvl_lcore_first = RTE_MAX_LCORE;
2758         mrvl_lcore_last = 0;
2759
2760 init_devices:
2761         for (i = 0; i < ifnum; i++) {
2762                 RTE_LOG(INFO, PMD, "Creating %s\n", ifnames.names[i]);
2763                 ret = mrvl_eth_dev_create(vdev, ifnames.names[i]);
2764                 if (ret)
2765                         goto out_cleanup;
2766         }
2767         mrvl_dev_num += ifnum;
2768
2769         rte_kvargs_free(kvlist);
2770
2771         return 0;
2772 out_cleanup:
2773         for (; i > 0; i--)
2774                 mrvl_eth_dev_destroy(ifnames.names[i]);
2775
2776         if (mrvl_dev_num == 0)
2777                 mrvl_deinit_pp2();
2778 out_deinit_dma:
2779         if (mrvl_dev_num == 0)
2780                 mv_sys_dma_mem_destroy();
2781 out_free_kvlist:
2782         rte_kvargs_free(kvlist);
2783
2784         return ret;
2785 }
2786
2787 /**
2788  * DPDK callback to remove virtual device.
2789  *
2790  * @param vdev
2791  *   Pointer to the removed virtual device.
2792  *
2793  * @return
2794  *   0 on success, negative error value otherwise.
2795  */
2796 static int
2797 rte_pmd_mrvl_remove(struct rte_vdev_device *vdev)
2798 {
2799         int i;
2800         const char *name;
2801
2802         name = rte_vdev_device_name(vdev);
2803         if (!name)
2804                 return -EINVAL;
2805
2806         RTE_LOG(INFO, PMD, "Removing %s\n", name);
2807
2808         for (i = 0; i < rte_eth_dev_count(); i++) {
2809                 char ifname[RTE_ETH_NAME_MAX_LEN];
2810
2811                 rte_eth_dev_get_name_by_port(i, ifname);
2812                 mrvl_eth_dev_destroy(ifname);
2813                 mrvl_dev_num--;
2814         }
2815
2816         if (mrvl_dev_num == 0) {
2817                 RTE_LOG(INFO, PMD, "Perform MUSDK deinit\n");
2818                 mrvl_deinit_hifs();
2819                 mrvl_deinit_pp2();
2820                 mv_sys_dma_mem_destroy();
2821         }
2822
2823         return 0;
2824 }
2825
2826 static struct rte_vdev_driver pmd_mrvl_drv = {
2827         .probe = rte_pmd_mrvl_probe,
2828         .remove = rte_pmd_mrvl_remove,
2829 };
2830
2831 RTE_PMD_REGISTER_VDEV(net_mvpp2, pmd_mrvl_drv);
2832 RTE_PMD_REGISTER_ALIAS(net_mvpp2, eth_mvpp2);