drivers/net/octeontx2/otx2_lookup.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2019 Marvell International Ltd.
   3  */
   4
   5 #include <rte_common.h>
   6 #include <rte_memzone.h>
   7
   8 #include "otx2_ethdev.h"
   9
  10 /* NIX_RX_PARSE_S's ERRCODE + ERRLEV (12 bits) */
  11 #define ERRCODE_ERRLEN_WIDTH            12
  12 #define ERR_ARRAY_SZ                    ((BIT(ERRCODE_ERRLEN_WIDTH)) *\
  13                                         sizeof(uint32_t))
  14
  15 #define LOOKUP_ARRAY_SZ                 (PTYPE_ARRAY_SZ + ERR_ARRAY_SZ)
  16
  17 const uint32_t *
  18 otx2_nix_supported_ptypes_get(struct rte_eth_dev *eth_dev)
  19 {
  20         struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
  21
  22         static const uint32_t ptypes[] = {
  23                 RTE_PTYPE_L2_ETHER_QINQ, /* LB */
  24                 RTE_PTYPE_L2_ETHER_VLAN, /* LB */
  25                 RTE_PTYPE_L2_ETHER_TIMESYNC, /* LB */
  26                 RTE_PTYPE_L2_ETHER_ARP,  /* LC */
  27                 RTE_PTYPE_L2_ETHER_NSH,  /* LC */
  28                 RTE_PTYPE_L2_ETHER_FCOE, /* LC */
  29                 RTE_PTYPE_L2_ETHER_MPLS, /* LC */
  30                 RTE_PTYPE_L3_IPV4,       /* LC */
  31                 RTE_PTYPE_L3_IPV4_EXT,   /* LC */
  32                 RTE_PTYPE_L3_IPV6,       /* LC */
  33                 RTE_PTYPE_L3_IPV6_EXT,   /* LC */
  34                 RTE_PTYPE_L4_TCP,        /* LD */
  35                 RTE_PTYPE_L4_UDP,        /* LD */
  36                 RTE_PTYPE_L4_SCTP,       /* LD */
  37                 RTE_PTYPE_L4_ICMP,       /* LD */
  38                 RTE_PTYPE_L4_IGMP,       /* LD */
  39                 RTE_PTYPE_TUNNEL_GRE,    /* LD */
  40                 RTE_PTYPE_TUNNEL_ESP,    /* LD */
  41                 RTE_PTYPE_TUNNEL_NVGRE,  /* LD */
  42                 RTE_PTYPE_TUNNEL_VXLAN,  /* LE */
  43                 RTE_PTYPE_TUNNEL_GENEVE, /* LE */
  44                 RTE_PTYPE_TUNNEL_GTPC,   /* LE */
  45                 RTE_PTYPE_TUNNEL_GTPU,   /* LE */
  46                 RTE_PTYPE_TUNNEL_VXLAN_GPE,   /* LE */
  47                 RTE_PTYPE_TUNNEL_MPLS_IN_GRE, /* LE */
  48                 RTE_PTYPE_TUNNEL_MPLS_IN_UDP, /* LE */
  49                 RTE_PTYPE_INNER_L2_ETHER,/* LF */
  50                 RTE_PTYPE_INNER_L3_IPV4, /* LG */
  51                 RTE_PTYPE_INNER_L3_IPV6, /* LG */
  52                 RTE_PTYPE_INNER_L4_TCP,  /* LH */
  53                 RTE_PTYPE_INNER_L4_UDP,  /* LH */
  54                 RTE_PTYPE_INNER_L4_SCTP, /* LH */
  55                 RTE_PTYPE_INNER_L4_ICMP, /* LH */
  56                 RTE_PTYPE_UNKNOWN,
  57         };
  58
  59         if (dev->rx_offload_flags & NIX_RX_OFFLOAD_PTYPE_F)
  60                 return ptypes;
  61         else
  62                 return NULL;
  63 }
  64
  65 int
  66 otx2_nix_ptypes_set(struct rte_eth_dev *eth_dev, uint32_t ptype_mask)
  67 {
  68         struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
  69
  70         if (ptype_mask)
  71                 dev->rx_offload_flags |= NIX_RX_OFFLOAD_PTYPE_F;
  72         else
  73                 dev->rx_offload_flags &= ~NIX_RX_OFFLOAD_PTYPE_F;
  74
  75         otx2_eth_set_rx_function(eth_dev);
  76
  77         return 0;
  78 }
  79
  80 /*
  81  * +------------------ +------------------ +
  82  * |  | IL4 | IL3| IL2 | TU | L4 | L3 | L2 |
  83  * +-------------------+-------------------+
  84  *
  85  * +-------------------+------------------ +
  86  * |  | LH | LG  | LF  | LE | LD | LC | LB |
  87  * +-------------------+-------------------+
  88  *
  89  * ptype       [LE - LD - LC - LB]  = TU  - L4 -  L3  - T2
  90  * ptype_tunnel[LH - LG - LF]  = IL4 - IL3 - IL2 - TU
  91  *
  92  */
  93 static void
  94 nix_create_non_tunnel_ptype_array(uint16_t *ptype)
  95 {
  96         uint8_t lb, lc, ld, le;
  97         uint16_t val;
  98         uint32_t idx;
  99
 100         for (idx = 0; idx < PTYPE_NON_TUNNEL_ARRAY_SZ; idx++) {
 101                 lb = idx & 0xF;
 102                 lc = (idx & 0xF0) >> 4;
 103                 ld = (idx & 0xF00) >> 8;
 104                 le = (idx & 0xF000) >> 12;
 105                 val = RTE_PTYPE_UNKNOWN;
 106
 107                 switch (lb) {
 108                 case NPC_LT_LB_STAG_QINQ:
 109                         val |= RTE_PTYPE_L2_ETHER_QINQ;
 110                         break;
 111                 case NPC_LT_LB_CTAG:
 112                         val |= RTE_PTYPE_L2_ETHER_VLAN;
 113                         break;
 114                 }
 115
 116                 switch (lc) {
 117                 case NPC_LT_LC_ARP:
 118                         val |= RTE_PTYPE_L2_ETHER_ARP;
 119                         break;
 120                 case NPC_LT_LC_NSH:
 121                         val |= RTE_PTYPE_L2_ETHER_NSH;
 122                         break;
 123                 case NPC_LT_LC_FCOE:
 124                         val |= RTE_PTYPE_L2_ETHER_FCOE;
 125                         break;
 126                 case NPC_LT_LC_MPLS:
 127                         val |= RTE_PTYPE_L2_ETHER_MPLS;
 128                         break;
 129                 case NPC_LT_LC_IP:
 130                         val |= RTE_PTYPE_L3_IPV4;
 131                         break;
 132                 case NPC_LT_LC_IP_OPT:
 133                         val |= RTE_PTYPE_L3_IPV4_EXT;
 134                         break;
 135                 case NPC_LT_LC_IP6:
 136                         val |= RTE_PTYPE_L3_IPV6;
 137                         break;
 138                 case NPC_LT_LC_IP6_EXT:
 139                         val |= RTE_PTYPE_L3_IPV6_EXT;
 140                         break;
 141                 case NPC_LT_LC_PTP:
 142                         val |= RTE_PTYPE_L2_ETHER_TIMESYNC;
 143                         break;
 144                 }
 145
 146                 switch (ld) {
 147                 case NPC_LT_LD_TCP:
 148                         val |= RTE_PTYPE_L4_TCP;
 149                         break;
 150                 case NPC_LT_LD_UDP:
 151                         val |= RTE_PTYPE_L4_UDP;
 152                         break;
 153                 case NPC_LT_LD_SCTP:
 154                         val |= RTE_PTYPE_L4_SCTP;
 155                         break;
 156                 case NPC_LT_LD_ICMP:
 157                 case NPC_LT_LD_ICMP6:
 158                         val |= RTE_PTYPE_L4_ICMP;
 159                         break;
 160                 case NPC_LT_LD_IGMP:
 161                         val |= RTE_PTYPE_L4_IGMP;
 162                         break;
 163                 case NPC_LT_LD_GRE:
 164                         val |= RTE_PTYPE_TUNNEL_GRE;
 165                         break;
 166                 case NPC_LT_LD_NVGRE:
 167                         val |= RTE_PTYPE_TUNNEL_NVGRE;
 168                         break;
 169                 case NPC_LT_LD_ESP:
 170                         val |= RTE_PTYPE_TUNNEL_ESP;
 171                         break;
 172                 }
 173
 174                 switch (le) {
 175                 case NPC_LT_LE_VXLAN:
 176                         val |= RTE_PTYPE_TUNNEL_VXLAN;
 177                         break;
 178                 case NPC_LT_LE_VXLANGPE:
 179                         val |= RTE_PTYPE_TUNNEL_VXLAN_GPE;
 180                         break;
 181                 case NPC_LT_LE_GENEVE:
 182                         val |= RTE_PTYPE_TUNNEL_GENEVE;
 183                         break;
 184                 case NPC_LT_LE_GTPC:
 185                         val |= RTE_PTYPE_TUNNEL_GTPC;
 186                         break;
 187                 case NPC_LT_LE_GTPU:
 188                         val |= RTE_PTYPE_TUNNEL_GTPU;
 189                         break;
 190                 case NPC_LT_LE_TU_MPLS_IN_GRE:
 191                         val |= RTE_PTYPE_TUNNEL_MPLS_IN_GRE;
 192                         break;
 193                 case NPC_LT_LE_TU_MPLS_IN_UDP:
 194                         val |= RTE_PTYPE_TUNNEL_MPLS_IN_UDP;
 195                         break;
 196                 }
 197                 ptype[idx] = val;
 198         }
 199 }
 200
 201 #define TU_SHIFT(x) ((x) >> PTYPE_NON_TUNNEL_WIDTH)
 202 static void
 203 nix_create_tunnel_ptype_array(uint16_t *ptype)
 204 {
 205         uint8_t lf, lg, lh;
 206         uint16_t val;
 207         uint32_t idx;
 208
 209         /* Skip non tunnel ptype array memory */
 210         ptype = ptype + PTYPE_NON_TUNNEL_ARRAY_SZ;
 211
 212         for (idx = 0; idx < PTYPE_TUNNEL_ARRAY_SZ; idx++) {
 213                 lf = idx & 0xF;
 214                 lg = (idx & 0xF0) >> 4;
 215                 lh = (idx & 0xF00) >> 8;
 216                 val = RTE_PTYPE_UNKNOWN;
 217
 218                 switch (lf) {
 219                 case NPC_LT_LF_TU_ETHER:
 220                         val |= TU_SHIFT(RTE_PTYPE_INNER_L2_ETHER);
 221                         break;
 222                 }
 223                 switch (lg) {
 224                 case NPC_LT_LG_TU_IP:
 225                         val |= TU_SHIFT(RTE_PTYPE_INNER_L3_IPV4);
 226                         break;
 227                 case NPC_LT_LG_TU_IP6:
 228                         val |= TU_SHIFT(RTE_PTYPE_INNER_L3_IPV6);
 229                         break;
 230                 }
 231                 switch (lh) {
 232                 case NPC_LT_LH_TU_TCP:
 233                         val |= TU_SHIFT(RTE_PTYPE_INNER_L4_TCP);
 234                         break;
 235                 case NPC_LT_LH_TU_UDP:
 236                         val |= TU_SHIFT(RTE_PTYPE_INNER_L4_UDP);
 237                         break;
 238                 case NPC_LT_LH_TU_SCTP:
 239                         val |= TU_SHIFT(RTE_PTYPE_INNER_L4_SCTP);
 240                         break;
 241                 case NPC_LT_LH_TU_ICMP:
 242                 case NPC_LT_LH_TU_ICMP6:
 243                         val |= TU_SHIFT(RTE_PTYPE_INNER_L4_ICMP);
 244                         break;
 245                 }
 246
 247                 ptype[idx] = val;
 248         }
 249 }
 250
 251 static void
 252 nix_create_rx_ol_flags_array(void *mem)
 253 {
 254         uint16_t idx, errcode, errlev;
 255         uint32_t val, *ol_flags;
 256
 257         /* Skip ptype array memory */
 258         ol_flags = (uint32_t *)((uint8_t *)mem + PTYPE_ARRAY_SZ);
 259
 260         for (idx = 0; idx < BIT(ERRCODE_ERRLEN_WIDTH); idx++) {
 261                 errlev = idx & 0xf;
 262                 errcode = (idx & 0xff0) >> 4;
 263
 264                 val = PKT_RX_IP_CKSUM_UNKNOWN;
 265                 val |= PKT_RX_L4_CKSUM_UNKNOWN;
 266                 val |= PKT_RX_OUTER_L4_CKSUM_UNKNOWN;
 267
 268                 switch (errlev) {
 269                 case NPC_ERRLEV_RE:
 270                         /* Mark all errors as BAD checksum errors */
 271                         if (errcode) {
 272                                 val |= PKT_RX_IP_CKSUM_BAD;
 273                                 val |= PKT_RX_L4_CKSUM_BAD;
 274                         } else {
 275                                 val |= PKT_RX_IP_CKSUM_GOOD;
 276                                 val |= PKT_RX_L4_CKSUM_GOOD;
 277                         }
 278                         break;
 279                 case NPC_ERRLEV_LC:
 280                         if (errcode == NPC_EC_OIP4_CSUM ||
 281                             errcode == NPC_EC_IP_FRAG_OFFSET_1) {
 282                                 val |= PKT_RX_IP_CKSUM_BAD;
 283                                 val |= PKT_RX_EIP_CKSUM_BAD;
 284                         } else {
 285                                 val |= PKT_RX_IP_CKSUM_GOOD;
 286                         }
 287                         break;
 288                 case NPC_ERRLEV_LG:
 289                         if (errcode == NPC_EC_IIP4_CSUM)
 290                                 val |= PKT_RX_IP_CKSUM_BAD;
 291                         else
 292                                 val |= PKT_RX_IP_CKSUM_GOOD;
 293                         break;
 294                 case NPC_ERRLEV_NIX:
 295                         val |= PKT_RX_IP_CKSUM_GOOD;
 296                         if (errcode == NIX_RX_PERRCODE_OL4_CHK) {
 297                                 val |= PKT_RX_OUTER_L4_CKSUM_BAD;
 298                                 val |= PKT_RX_L4_CKSUM_BAD;
 299                         } else if (errcode == NIX_RX_PERRCODE_IL4_CHK) {
 300                                 val |= PKT_RX_L4_CKSUM_BAD;
 301                         } else {
 302                                 val |= PKT_RX_L4_CKSUM_GOOD;
 303                         }
 304                         break;
 305                 }
 306
 307                 ol_flags[idx] = val;
 308         }
 309 }
 310
 311 void *
 312 otx2_nix_fastpath_lookup_mem_get(void)
 313 {
 314         const char name[] = "otx2_nix_fastpath_lookup_mem";
 315         const struct rte_memzone *mz;
 316         void *mem;
 317
 318         mz = rte_memzone_lookup(name);
 319         if (mz != NULL)
 320                 return mz->addr;
 321
 322         /* Request for the first time */
 323         mz = rte_memzone_reserve_aligned(name, LOOKUP_ARRAY_SZ,
 324                                          SOCKET_ID_ANY, 0, OTX2_ALIGN);
 325         if (mz != NULL) {
 326                 mem = mz->addr;
 327                 /* Form the ptype array lookup memory */
 328                 nix_create_non_tunnel_ptype_array(mem);
 329                 nix_create_tunnel_ptype_array(mem);
 330                 /* Form the rx ol_flags based on errcode */
 331                 nix_create_rx_ol_flags_array(mem);
 332                 return mem;
 333         }
 334         return NULL;
 335 }