drivers/net/qede/base/ecore_vf.c

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9 #include "bcm_osal.h"
  10 #include "ecore.h"
  11 #include "ecore_hsi_eth.h"
  12 #include "ecore_sriov.h"
  13 #include "ecore_l2_api.h"
  14 #include "ecore_vf.h"
  15 #include "ecore_vfpf_if.h"
  16 #include "ecore_status.h"
  17 #include "reg_addr.h"
  18 #include "ecore_int.h"
  19 #include "ecore_l2.h"
  20 #include "ecore_mcp_api.h"
  21 #include "ecore_vf_api.h"
  22
  23 static void *ecore_vf_pf_prep(struct ecore_hwfn *p_hwfn, u16 type, u16 length)
  24 {
  25         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
  26         void *p_tlv;
  27
  28         /* This lock is released when we receive PF's response
  29          * in ecore_send_msg2pf().
  30          * So, ecore_vf_pf_prep() and ecore_send_msg2pf()
  31          * must come in sequence.
  32          */
  33         OSAL_MUTEX_ACQUIRE(&p_iov->mutex);
  34
  35         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  36                    "preparing to send %s tlv over vf pf channel\n",
  37                    ecore_channel_tlvs_string[type]);
  38
  39         /* Reset Request offset */
  40         p_iov->offset = (u8 *)(p_iov->vf2pf_request);
  41
  42         /* Clear mailbox - both request and reply */
  43         OSAL_MEMSET(p_iov->vf2pf_request, 0, sizeof(union vfpf_tlvs));
  44         OSAL_MEMSET(p_iov->pf2vf_reply, 0, sizeof(union pfvf_tlvs));
  45
  46         /* Init type and length */
  47         p_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset, type, length);
  48
  49         /* Init first tlv header */
  50         ((struct vfpf_first_tlv *)p_tlv)->reply_address =
  51             (u64)p_iov->pf2vf_reply_phys;
  52
  53         return p_tlv;
  54 }
  55
  56 static void ecore_vf_pf_req_end(struct ecore_hwfn *p_hwfn,
  57                                  enum _ecore_status_t req_status)
  58 {
  59         union pfvf_tlvs *resp = p_hwfn->vf_iov_info->pf2vf_reply;
  60
  61         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  62                    "VF request status = 0x%x, PF reply status = 0x%x\n",
  63                    req_status, resp->default_resp.hdr.status);
  64
  65         OSAL_MUTEX_RELEASE(&p_hwfn->vf_iov_info->mutex);
  66 }
  67
  68 static enum _ecore_status_t
  69 ecore_send_msg2pf(struct ecore_hwfn *p_hwfn,
  70                   u8 *done, u32 resp_size)
  71 {
  72         union vfpf_tlvs *p_req = p_hwfn->vf_iov_info->vf2pf_request;
  73         struct ustorm_trigger_vf_zone trigger;
  74         struct ustorm_vf_zone *zone_data;
  75         enum _ecore_status_t rc = ECORE_SUCCESS;
  76         int time = 100;
  77
  78         zone_data = (struct ustorm_vf_zone *)PXP_VF_BAR0_START_USDM_ZONE_B;
  79
  80         /* output tlvs list */
  81         ecore_dp_tlv_list(p_hwfn, p_req);
  82
  83         /* need to add the END TLV to the message size */
  84         resp_size += sizeof(struct channel_list_end_tlv);
  85
  86         /* Send TLVs over HW channel */
  87         OSAL_MEMSET(&trigger, 0, sizeof(struct ustorm_trigger_vf_zone));
  88         trigger.vf_pf_msg_valid = 1;
  89
  90         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  91                    "VF -> PF [%02x] message: [%08x, %08x] --> %p,"
  92                    " %08x --> %p\n",
  93                    GET_FIELD(p_hwfn->hw_info.concrete_fid,
  94                              PXP_CONCRETE_FID_PFID),
  95                    U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys),
  96                    U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys),
  97                    &zone_data->non_trigger.vf_pf_msg_addr,
  98                    *((u32 *)&trigger), &zone_data->trigger);
  99
 100         REG_WR(p_hwfn,
 101                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.lo,
 102                U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys));
 103
 104         REG_WR(p_hwfn,
 105                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.hi,
 106                U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys));
 107
 108         /* The message data must be written first, to prevent trigger before
 109          * data is written.
 110          */
 111         OSAL_WMB(p_hwfn->p_dev);
 112
 113         REG_WR(p_hwfn, (osal_uintptr_t)&zone_data->trigger,
 114                *((u32 *)&trigger));
 115
 116         /* When PF would be done with the response, it would write back to the
 117          * `done' address. Poll until then.
 118          */
 119         while ((!*done) && time) {
 120                 OSAL_MSLEEP(25);
 121                 time--;
 122         }
 123
 124         if (!*done) {
 125                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 126                            "VF <-- PF Timeout [Type %d]\n",
 127                            p_req->first_tlv.tl.type);
 128                 rc = ECORE_TIMEOUT;
 129         } else {
 130                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 131                            "PF response: %d [Type %d]\n",
 132                            *done, p_req->first_tlv.tl.type);
 133         }
 134
 135         return rc;
 136 }
 137
 138 static void ecore_vf_pf_add_qid(struct ecore_hwfn *p_hwfn,
 139                                 struct ecore_queue_cid *p_cid)
 140 {
 141         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 142         struct vfpf_qid_tlv *p_qid_tlv;
 143
 144         /* Only add QIDs for the queue if it was negotiated with PF */
 145         if (!(p_iov->acquire_resp.pfdev_info.capabilities &
 146               PFVF_ACQUIRE_CAP_QUEUE_QIDS))
 147                 return;
 148
 149         p_qid_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
 150                                   CHANNEL_TLV_QID, sizeof(*p_qid_tlv));
 151         p_qid_tlv->qid = p_cid->qid_usage_idx;
 152 }
 153
 154 #define VF_ACQUIRE_THRESH 3
 155 static void ecore_vf_pf_acquire_reduce_resc(struct ecore_hwfn *p_hwfn,
 156                                             struct vf_pf_resc_request *p_req,
 157                                             struct pf_vf_resc *p_resp)
 158 {
 159         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 160                    "PF unwilling to fullill resource request: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x] cids [%02x/%02x]. Try PF recommended amount\n",
 161                    p_req->num_rxqs, p_resp->num_rxqs,
 162                    p_req->num_rxqs, p_resp->num_txqs,
 163                    p_req->num_sbs, p_resp->num_sbs,
 164                    p_req->num_mac_filters, p_resp->num_mac_filters,
 165                    p_req->num_vlan_filters, p_resp->num_vlan_filters,
 166                    p_req->num_mc_filters, p_resp->num_mc_filters,
 167                    p_req->num_cids, p_resp->num_cids);
 168
 169         /* humble our request */
 170         p_req->num_txqs = p_resp->num_txqs;
 171         p_req->num_rxqs = p_resp->num_rxqs;
 172         p_req->num_sbs = p_resp->num_sbs;
 173         p_req->num_mac_filters = p_resp->num_mac_filters;
 174         p_req->num_vlan_filters = p_resp->num_vlan_filters;
 175         p_req->num_mc_filters = p_resp->num_mc_filters;
 176         p_req->num_cids = p_resp->num_cids;
 177 }
 178
 179 static enum _ecore_status_t ecore_vf_pf_acquire(struct ecore_hwfn *p_hwfn)
 180 {
 181         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 182         struct pfvf_acquire_resp_tlv *resp = &p_iov->pf2vf_reply->acquire_resp;
 183         struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
 184         struct ecore_vf_acquire_sw_info vf_sw_info;
 185         struct vf_pf_resc_request *p_resc;
 186         bool resources_acquired = false;
 187         struct vfpf_acquire_tlv *req;
 188         int attempts = 0;
 189         enum _ecore_status_t rc = ECORE_SUCCESS;
 190
 191         /* clear mailbox and prep first tlv */
 192         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_ACQUIRE, sizeof(*req));
 193         p_resc = &req->resc_request;
 194
 195         /* @@@ TBD: PF may not be ready bnx2x_get_vf_id... */
 196         req->vfdev_info.opaque_fid = p_hwfn->hw_info.opaque_fid;
 197
 198         p_resc->num_rxqs = ECORE_MAX_VF_CHAINS_PER_PF;
 199         p_resc->num_txqs = ECORE_MAX_VF_CHAINS_PER_PF;
 200         p_resc->num_sbs = ECORE_MAX_VF_CHAINS_PER_PF;
 201         p_resc->num_mac_filters = ECORE_ETH_VF_NUM_MAC_FILTERS;
 202         p_resc->num_vlan_filters = ECORE_ETH_VF_NUM_VLAN_FILTERS;
 203         p_resc->num_cids = ECORE_ETH_VF_DEFAULT_NUM_CIDS;
 204
 205         OSAL_MEMSET(&vf_sw_info, 0, sizeof(vf_sw_info));
 206         OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, &req->resc_request, &vf_sw_info);
 207
 208         req->vfdev_info.os_type = vf_sw_info.os_type;
 209         req->vfdev_info.driver_version = vf_sw_info.driver_version;
 210         req->vfdev_info.fw_major = FW_MAJOR_VERSION;
 211         req->vfdev_info.fw_minor = FW_MINOR_VERSION;
 212         req->vfdev_info.fw_revision = FW_REVISION_VERSION;
 213         req->vfdev_info.fw_engineering = FW_ENGINEERING_VERSION;
 214         req->vfdev_info.eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
 215         req->vfdev_info.eth_fp_hsi_minor = ETH_HSI_VER_MINOR;
 216
 217         /* Fill capability field with any non-deprecated config we support */
 218         req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_100G;
 219
 220         /* pf 2 vf bulletin board address */
 221         req->bulletin_addr = p_iov->bulletin.phys;
 222         req->bulletin_size = p_iov->bulletin.size;
 223
 224         /* add list termination tlv */
 225         ecore_add_tlv(p_hwfn, &p_iov->offset,
 226                       CHANNEL_TLV_LIST_END,
 227                       sizeof(struct channel_list_end_tlv));
 228
 229         while (!resources_acquired) {
 230                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 231                            "attempting to acquire resources\n");
 232
 233                 /* Clear response buffer, as this might be a re-send */
 234                 OSAL_MEMSET(p_iov->pf2vf_reply, 0,
 235                             sizeof(union pfvf_tlvs));
 236
 237                 /* send acquire request */
 238                 rc = ecore_send_msg2pf(p_hwfn,
 239                                        &resp->hdr.status, sizeof(*resp));
 240
 241                 /* PF timeout */
 242                 if (rc)
 243                         return rc;
 244
 245                 /* copy acquire response from buffer to p_hwfn */
 246                 OSAL_MEMCPY(&p_iov->acquire_resp,
 247                             resp, sizeof(p_iov->acquire_resp));
 248
 249                 attempts++;
 250
 251                 if (resp->hdr.status == PFVF_STATUS_SUCCESS) {
 252                         /* PF agrees to allocate our resources */
 253                         if (!(resp->pfdev_info.capabilities &
 254                               PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE)) {
 255                                 /* It's possible legacy PF mistakenly accepted;
 256                                  * but we don't care - simply mark it as
 257                                  * legacy and continue.
 258                                  */
 259                                 req->vfdev_info.capabilities |=
 260                                         VFPF_ACQUIRE_CAP_PRE_FP_HSI;
 261                         }
 262                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 263                                    "resources acquired\n");
 264                         resources_acquired = true;
 265                 } /* PF refuses to allocate our resources */
 266                 else if (resp->hdr.status == PFVF_STATUS_NO_RESOURCE &&
 267                          attempts < VF_ACQUIRE_THRESH) {
 268                         ecore_vf_pf_acquire_reduce_resc(p_hwfn, p_resc,
 269                                                         &resp->resc);
 270
 271                 } else if (resp->hdr.status == PFVF_STATUS_NOT_SUPPORTED) {
 272                         if (pfdev_info->major_fp_hsi &&
 273                             (pfdev_info->major_fp_hsi != ETH_HSI_VER_MAJOR)) {
 274                                 DP_NOTICE(p_hwfn, false,
 275                                           "PF uses an incompatible fastpath HSI"
 276                                           " %02x.%02x [VF requires %02x.%02x]."
 277                                           " Please change to a VF driver using"
 278                                           " %02x.xx.\n",
 279                                           pfdev_info->major_fp_hsi,
 280                                           pfdev_info->minor_fp_hsi,
 281                                           ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR,
 282                                           pfdev_info->major_fp_hsi);
 283                                 rc = ECORE_INVAL;
 284                                 goto exit;
 285                         }
 286
 287                         if (!pfdev_info->major_fp_hsi) {
 288                                 if (req->vfdev_info.capabilities &
 289                                     VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
 290                                         DP_NOTICE(p_hwfn, false,
 291                                                   "PF uses very old drivers."
 292                                                   " Please change to a VF"
 293                                                   " driver using no later than"
 294                                                   " 8.8.x.x.\n");
 295                                         rc = ECORE_INVAL;
 296                                         goto exit;
 297                                 } else {
 298                                         DP_INFO(p_hwfn,
 299                                                 "PF is old - try re-acquire to"
 300                                                 " see if it supports FW-version"
 301                                                 " override\n");
 302                                         req->vfdev_info.capabilities |=
 303                                                 VFPF_ACQUIRE_CAP_PRE_FP_HSI;
 304                                         continue;
 305                                 }
 306                         }
 307
 308                         /* If PF/VF are using same Major, PF must have had
 309                          * it's reasons. Simply fail.
 310                          */
 311                         DP_NOTICE(p_hwfn, false,
 312                                   "PF rejected acquisition by VF\n");
 313                         rc = ECORE_INVAL;
 314                         goto exit;
 315                 } else {
 316                         DP_ERR(p_hwfn,
 317                                "PF returned err %d to VF acquisition request\n",
 318                                resp->hdr.status);
 319                         rc = ECORE_AGAIN;
 320                         goto exit;
 321                 }
 322         }
 323
 324         /* Mark the PF as legacy, if needed */
 325         if (req->vfdev_info.capabilities &
 326             VFPF_ACQUIRE_CAP_PRE_FP_HSI)
 327                 p_iov->b_pre_fp_hsi = true;
 328
 329         /* In case PF doesn't support multi-queue Tx, update the number of
 330          * CIDs to reflect the number of queues [older PFs didn't fill that
 331          * field].
 332          */
 333         if (!(resp->pfdev_info.capabilities &
 334               PFVF_ACQUIRE_CAP_QUEUE_QIDS))
 335                 resp->resc.num_cids = resp->resc.num_rxqs +
 336                                       resp->resc.num_txqs;
 337
 338         rc = OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, &resp->resc);
 339         if (rc) {
 340                 DP_NOTICE(p_hwfn, true,
 341                           "VF_UPDATE_ACQUIRE_RESC_RESP Failed:"
 342                           " status = 0x%x.\n",
 343                           rc);
 344                 rc = ECORE_AGAIN;
 345                 goto exit;
 346         }
 347
 348         /* Update bulletin board size with response from PF */
 349         p_iov->bulletin.size = resp->bulletin_size;
 350
 351         /* get HW info */
 352         p_hwfn->p_dev->type = resp->pfdev_info.dev_type;
 353         p_hwfn->p_dev->chip_rev = resp->pfdev_info.chip_rev;
 354
 355         DP_INFO(p_hwfn, "Chip details - %s%d\n",
 356                 ECORE_IS_BB(p_hwfn->p_dev) ? "BB" : "AH",
 357                 CHIP_REV_IS_A0(p_hwfn->p_dev) ? 0 : 1);
 358
 359         p_hwfn->p_dev->chip_num = pfdev_info->chip_num & 0xffff;
 360
 361         /* Learn of the possibility of CMT */
 362         if (IS_LEAD_HWFN(p_hwfn)) {
 363                 if (resp->pfdev_info.capabilities & PFVF_ACQUIRE_CAP_100G) {
 364                         DP_INFO(p_hwfn, "100g VF\n");
 365                         p_hwfn->p_dev->num_hwfns = 2;
 366                 }
 367         }
 368
 369         /* @DPDK */
 370         if ((~p_iov->b_pre_fp_hsi &
 371             ETH_HSI_VER_MINOR) &&
 372             (resp->pfdev_info.minor_fp_hsi < ETH_HSI_VER_MINOR))
 373                 DP_INFO(p_hwfn,
 374                         "PF is using older fastpath HSI;"
 375                         " %02x.%02x is configured\n",
 376                         ETH_HSI_VER_MAJOR,
 377                         resp->pfdev_info.minor_fp_hsi);
 378
 379 exit:
 380         ecore_vf_pf_req_end(p_hwfn, rc);
 381
 382         return rc;
 383 }
 384
 385 enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_hwfn *p_hwfn)
 386 {
 387         struct ecore_vf_iov *p_iov;
 388         u32 reg;
 389
 390         /* Set number of hwfns - might be overridden once leading hwfn learns
 391          * actual configuration from PF.
 392          */
 393         if (IS_LEAD_HWFN(p_hwfn))
 394                 p_hwfn->p_dev->num_hwfns = 1;
 395
 396         /* Set the doorbell bar. Assumption: regview is set */
 397         p_hwfn->doorbells = (u8 OSAL_IOMEM *)p_hwfn->regview +
 398             PXP_VF_BAR0_START_DQ;
 399
 400         reg = PXP_VF_BAR0_ME_OPAQUE_ADDRESS;
 401         p_hwfn->hw_info.opaque_fid = (u16)REG_RD(p_hwfn, reg);
 402
 403         reg = PXP_VF_BAR0_ME_CONCRETE_ADDRESS;
 404         p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn, reg);
 405
 406         /* Allocate vf sriov info */
 407         p_iov = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_iov));
 408         if (!p_iov) {
 409                 DP_NOTICE(p_hwfn, true,
 410                           "Failed to allocate `struct ecore_sriov'\n");
 411                 return ECORE_NOMEM;
 412         }
 413
 414         /* Allocate vf2pf msg */
 415         p_iov->vf2pf_request = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 416                                                          &p_iov->
 417                                                          vf2pf_request_phys,
 418                                                          sizeof(union
 419                                                                 vfpf_tlvs));
 420         if (!p_iov->vf2pf_request) {
 421                 DP_NOTICE(p_hwfn, true,
 422                          "Failed to allocate `vf2pf_request' DMA memory\n");
 423                 goto free_p_iov;
 424         }
 425
 426         p_iov->pf2vf_reply = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 427                                                        &p_iov->
 428                                                        pf2vf_reply_phys,
 429                                                        sizeof(union pfvf_tlvs));
 430         if (!p_iov->pf2vf_reply) {
 431                 DP_NOTICE(p_hwfn, true,
 432                           "Failed to allocate `pf2vf_reply' DMA memory\n");
 433                 goto free_vf2pf_request;
 434         }
 435
 436         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 437                    "VF's Request mailbox [%p virt 0x%lx phys], "
 438                    "Response mailbox [%p virt 0x%lx phys]\n",
 439                    p_iov->vf2pf_request,
 440                    (unsigned long)p_iov->vf2pf_request_phys,
 441                    p_iov->pf2vf_reply,
 442                    (unsigned long)p_iov->pf2vf_reply_phys);
 443
 444         /* Allocate Bulletin board */
 445         p_iov->bulletin.size = sizeof(struct ecore_bulletin_content);
 446         p_iov->bulletin.p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 447                                                            &p_iov->bulletin.
 448                                                            phys,
 449                                                            p_iov->bulletin.
 450                                                            size);
 451         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 452                    "VF's bulletin Board [%p virt 0x%lx phys 0x%08x bytes]\n",
 453                    p_iov->bulletin.p_virt, (unsigned long)p_iov->bulletin.phys,
 454                    p_iov->bulletin.size);
 455
 456         OSAL_MUTEX_ALLOC(p_hwfn, &p_iov->mutex);
 457         OSAL_MUTEX_INIT(&p_iov->mutex);
 458
 459         p_hwfn->vf_iov_info = p_iov;
 460
 461         p_hwfn->hw_info.personality = ECORE_PCI_ETH;
 462
 463         return ecore_vf_pf_acquire(p_hwfn);
 464
 465 free_vf2pf_request:
 466         OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->vf2pf_request,
 467                                p_iov->vf2pf_request_phys,
 468                                sizeof(union vfpf_tlvs));
 469 free_p_iov:
 470         OSAL_FREE(p_hwfn->p_dev, p_iov);
 471
 472         return ECORE_NOMEM;
 473 }
 474
 475 #define TSTORM_QZONE_START   PXP_VF_BAR0_START_SDM_ZONE_A
 476 #define MSTORM_QZONE_START(dev)   (TSTORM_QZONE_START + \
 477                                    (TSTORM_QZONE_SIZE * NUM_OF_L2_QUEUES(dev)))
 478
 479 /* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
 480 static void
 481 __ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
 482                              struct ecore_tunn_update_type *p_src,
 483                              enum ecore_tunn_mode mask, u8 *p_cls)
 484 {
 485         if (p_src->b_update_mode) {
 486                 p_req->tun_mode_update_mask |= (1 << mask);
 487
 488                 if (p_src->b_mode_enabled)
 489                         p_req->tunn_mode |= (1 << mask);
 490         }
 491
 492         *p_cls = p_src->tun_cls;
 493 }
 494
 495 /* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
 496 static void
 497 ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
 498                            struct ecore_tunn_update_type *p_src,
 499                            enum ecore_tunn_mode mask, u8 *p_cls,
 500                            struct ecore_tunn_update_udp_port *p_port,
 501                            u8 *p_update_port, u16 *p_udp_port)
 502 {
 503         if (p_port->b_update_port) {
 504                 *p_update_port = 1;
 505                 *p_udp_port = p_port->port;
 506         }
 507
 508         __ecore_vf_prep_tunn_req_tlv(p_req, p_src, mask, p_cls);
 509 }
 510
 511 void ecore_vf_set_vf_start_tunn_update_param(struct ecore_tunnel_info *p_tun)
 512 {
 513         if (p_tun->vxlan.b_mode_enabled)
 514                 p_tun->vxlan.b_update_mode = true;
 515         if (p_tun->l2_geneve.b_mode_enabled)
 516                 p_tun->l2_geneve.b_update_mode = true;
 517         if (p_tun->ip_geneve.b_mode_enabled)
 518                 p_tun->ip_geneve.b_update_mode = true;
 519         if (p_tun->l2_gre.b_mode_enabled)
 520                 p_tun->l2_gre.b_update_mode = true;
 521         if (p_tun->ip_gre.b_mode_enabled)
 522                 p_tun->ip_gre.b_update_mode = true;
 523
 524         p_tun->b_update_rx_cls = true;
 525         p_tun->b_update_tx_cls = true;
 526 }
 527
 528 static void
 529 __ecore_vf_update_tunn_param(struct ecore_tunn_update_type *p_tun,
 530                              u16 feature_mask, u8 tunn_mode, u8 tunn_cls,
 531                              enum ecore_tunn_mode val)
 532 {
 533         if (feature_mask & (1 << val)) {
 534                 p_tun->b_mode_enabled = tunn_mode;
 535                 p_tun->tun_cls = tunn_cls;
 536         } else {
 537                 p_tun->b_mode_enabled = false;
 538         }
 539 }
 540
 541 static void
 542 ecore_vf_update_tunn_param(struct ecore_hwfn *p_hwfn,
 543                            struct ecore_tunnel_info *p_tun,
 544                            struct pfvf_update_tunn_param_tlv *p_resp)
 545 {
 546         /* Update mode and classes provided by PF */
 547         u16 feat_mask = p_resp->tunn_feature_mask;
 548
 549         __ecore_vf_update_tunn_param(&p_tun->vxlan, feat_mask,
 550                                      p_resp->vxlan_mode, p_resp->vxlan_clss,
 551                                      ECORE_MODE_VXLAN_TUNN);
 552         __ecore_vf_update_tunn_param(&p_tun->l2_geneve, feat_mask,
 553                                      p_resp->l2geneve_mode,
 554                                      p_resp->l2geneve_clss,
 555                                      ECORE_MODE_L2GENEVE_TUNN);
 556         __ecore_vf_update_tunn_param(&p_tun->ip_geneve, feat_mask,
 557                                      p_resp->ipgeneve_mode,
 558                                      p_resp->ipgeneve_clss,
 559                                      ECORE_MODE_IPGENEVE_TUNN);
 560         __ecore_vf_update_tunn_param(&p_tun->l2_gre, feat_mask,
 561                                      p_resp->l2gre_mode, p_resp->l2gre_clss,
 562                                      ECORE_MODE_L2GRE_TUNN);
 563         __ecore_vf_update_tunn_param(&p_tun->ip_gre, feat_mask,
 564                                      p_resp->ipgre_mode, p_resp->ipgre_clss,
 565                                      ECORE_MODE_IPGRE_TUNN);
 566         p_tun->geneve_port.port = p_resp->geneve_udp_port;
 567         p_tun->vxlan_port.port = p_resp->vxlan_udp_port;
 568
 569         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 570                    "tunn mode: vxlan=0x%x, l2geneve=0x%x, ipgeneve=0x%x, l2gre=0x%x, ipgre=0x%x",
 571                    p_tun->vxlan.b_mode_enabled, p_tun->l2_geneve.b_mode_enabled,
 572                    p_tun->ip_geneve.b_mode_enabled,
 573                    p_tun->l2_gre.b_mode_enabled,
 574                    p_tun->ip_gre.b_mode_enabled);
 575 }
 576
 577 enum _ecore_status_t
 578 ecore_vf_pf_tunnel_param_update(struct ecore_hwfn *p_hwfn,
 579                                 struct ecore_tunnel_info *p_src)
 580 {
 581         struct ecore_tunnel_info *p_tun = &p_hwfn->p_dev->tunnel;
 582         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 583         struct pfvf_update_tunn_param_tlv *p_resp;
 584         struct vfpf_update_tunn_param_tlv *p_req;
 585         enum _ecore_status_t rc;
 586
 587         p_req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_TUNN_PARAM,
 588                                  sizeof(*p_req));
 589
 590         if (p_src->b_update_rx_cls && p_src->b_update_tx_cls)
 591                 p_req->update_tun_cls = 1;
 592
 593         ecore_vf_prep_tunn_req_tlv(p_req, &p_src->vxlan, ECORE_MODE_VXLAN_TUNN,
 594                                    &p_req->vxlan_clss, &p_src->vxlan_port,
 595                                    &p_req->update_vxlan_port,
 596                                    &p_req->vxlan_port);
 597         ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_geneve,
 598                                    ECORE_MODE_L2GENEVE_TUNN,
 599                                    &p_req->l2geneve_clss, &p_src->geneve_port,
 600                                    &p_req->update_geneve_port,
 601                                    &p_req->geneve_port);
 602         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_geneve,
 603                                      ECORE_MODE_IPGENEVE_TUNN,
 604                                      &p_req->ipgeneve_clss);
 605         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_gre,
 606                                      ECORE_MODE_L2GRE_TUNN, &p_req->l2gre_clss);
 607         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_gre,
 608                                      ECORE_MODE_IPGRE_TUNN, &p_req->ipgre_clss);
 609
 610         /* add list termination tlv */
 611         ecore_add_tlv(p_hwfn, &p_iov->offset,
 612                       CHANNEL_TLV_LIST_END,
 613                       sizeof(struct channel_list_end_tlv));
 614
 615         p_resp = &p_iov->pf2vf_reply->tunn_param_resp;
 616         rc = ecore_send_msg2pf(p_hwfn, &p_resp->hdr.status, sizeof(*p_resp));
 617
 618         if (rc)
 619                 goto exit;
 620
 621         if (p_resp->hdr.status != PFVF_STATUS_SUCCESS) {
 622                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 623                            "Failed to update tunnel parameters\n");
 624                 rc = ECORE_INVAL;
 625         }
 626
 627         ecore_vf_update_tunn_param(p_hwfn, p_tun, p_resp);
 628 exit:
 629         ecore_vf_pf_req_end(p_hwfn, rc);
 630         return rc;
 631 }
 632
 633 enum _ecore_status_t
 634 ecore_vf_pf_rxq_start(struct ecore_hwfn *p_hwfn,
 635                       struct ecore_queue_cid *p_cid,
 636                       u16 bd_max_bytes,
 637                       dma_addr_t bd_chain_phys_addr,
 638                       dma_addr_t cqe_pbl_addr,
 639                       u16 cqe_pbl_size,
 640                       void OSAL_IOMEM **pp_prod)
 641 {
 642         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 643         struct pfvf_start_queue_resp_tlv *resp;
 644         struct vfpf_start_rxq_tlv *req;
 645         u16 rx_qid = p_cid->rel.queue_id;
 646         enum _ecore_status_t rc;
 647
 648         /* clear mailbox and prep first tlv */
 649         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_RXQ, sizeof(*req));
 650
 651         req->rx_qid = rx_qid;
 652         req->cqe_pbl_addr = cqe_pbl_addr;
 653         req->cqe_pbl_size = cqe_pbl_size;
 654         req->rxq_addr = bd_chain_phys_addr;
 655         req->hw_sb = p_cid->sb_igu_id;
 656         req->sb_index = p_cid->sb_idx;
 657         req->bd_max_bytes = bd_max_bytes;
 658         req->stat_id = -1; /* Keep initialized, for future compatibility */
 659
 660         /* If PF is legacy, we'll need to calculate producers ourselves
 661          * as well as clean them.
 662          */
 663         if (p_iov->b_pre_fp_hsi) {
 664                 u8 hw_qid = p_iov->acquire_resp.resc.hw_qid[rx_qid];
 665                 u32 init_prod_val = 0;
 666
 667                 *pp_prod = (u8 OSAL_IOMEM *)
 668                            p_hwfn->regview +
 669                            MSTORM_QZONE_START(p_hwfn->p_dev) +
 670                            (hw_qid) * MSTORM_QZONE_SIZE;
 671
 672                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
 673                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
 674                                   (u32 *)(&init_prod_val));
 675         }
 676
 677         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 678
 679         /* add list termination tlv */
 680         ecore_add_tlv(p_hwfn, &p_iov->offset,
 681                       CHANNEL_TLV_LIST_END,
 682                       sizeof(struct channel_list_end_tlv));
 683
 684         resp = &p_iov->pf2vf_reply->queue_start;
 685         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 686         if (rc)
 687                 goto exit;
 688
 689         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 690                 rc = ECORE_INVAL;
 691                 goto exit;
 692         }
 693
 694         /* Learn the address of the producer from the response */
 695         if (!p_iov->b_pre_fp_hsi) {
 696                 u32 init_prod_val = 0;
 697
 698                 *pp_prod = (u8 OSAL_IOMEM *)p_hwfn->regview + resp->offset;
 699                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 700                            "Rxq[0x%02x]: producer at %p [offset 0x%08x]\n",
 701                            rx_qid, *pp_prod, resp->offset);
 702
 703                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0.
 704                  * It was actually the PF's responsibility, but since some
 705                  * old PFs might fail to do so, we do this as well.
 706                  */
 707                 OSAL_BUILD_BUG_ON(ETH_HSI_VER_MAJOR != 3);
 708                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
 709                                   (u32 *)&init_prod_val);
 710         }
 711
 712 exit:
 713         ecore_vf_pf_req_end(p_hwfn, rc);
 714
 715         return rc;
 716 }
 717
 718 enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn *p_hwfn,
 719                                           struct ecore_queue_cid *p_cid,
 720                                           bool cqe_completion)
 721 {
 722         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 723         struct vfpf_stop_rxqs_tlv *req;
 724         struct pfvf_def_resp_tlv *resp;
 725         enum _ecore_status_t rc;
 726
 727         /* clear mailbox and prep first tlv */
 728         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_RXQS, sizeof(*req));
 729
 730         req->rx_qid = p_cid->rel.queue_id;
 731         req->num_rxqs = 1;
 732         req->cqe_completion = cqe_completion;
 733
 734         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 735
 736         /* add list termination tlv */
 737         ecore_add_tlv(p_hwfn, &p_iov->offset,
 738                       CHANNEL_TLV_LIST_END,
 739                       sizeof(struct channel_list_end_tlv));
 740
 741         resp = &p_iov->pf2vf_reply->default_resp;
 742         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 743         if (rc)
 744                 goto exit;
 745
 746         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 747                 rc = ECORE_INVAL;
 748                 goto exit;
 749         }
 750
 751 exit:
 752         ecore_vf_pf_req_end(p_hwfn, rc);
 753
 754         return rc;
 755 }
 756
 757 enum _ecore_status_t
 758 ecore_vf_pf_txq_start(struct ecore_hwfn *p_hwfn,
 759                       struct ecore_queue_cid *p_cid,
 760                       dma_addr_t pbl_addr, u16 pbl_size,
 761                       void OSAL_IOMEM **pp_doorbell)
 762 {
 763         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 764         struct pfvf_start_queue_resp_tlv *resp;
 765         struct vfpf_start_txq_tlv *req;
 766         u16 qid = p_cid->rel.queue_id;
 767         enum _ecore_status_t rc;
 768
 769         /* clear mailbox and prep first tlv */
 770         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_TXQ, sizeof(*req));
 771
 772         req->tx_qid = qid;
 773
 774         /* Tx */
 775         req->pbl_addr = pbl_addr;
 776         req->pbl_size = pbl_size;
 777         req->hw_sb = p_cid->sb_igu_id;
 778         req->sb_index = p_cid->sb_idx;
 779
 780         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 781
 782         /* add list termination tlv */
 783         ecore_add_tlv(p_hwfn, &p_iov->offset,
 784                       CHANNEL_TLV_LIST_END,
 785                       sizeof(struct channel_list_end_tlv));
 786
 787         resp  = &p_iov->pf2vf_reply->queue_start;
 788         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 789         if (rc)
 790                 goto exit;
 791
 792         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 793                 rc = ECORE_INVAL;
 794                 goto exit;
 795         }
 796
 797         /* Modern PFs provide the actual offsets, while legacy
 798          * provided only the queue id.
 799          */
 800         if (!p_iov->b_pre_fp_hsi) {
 801                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
 802                                                 resp->offset;
 803         } else {
 804                 u8 cid = p_iov->acquire_resp.resc.cid[qid];
 805
 806                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
 807                                                 DB_ADDR_VF(cid, DQ_DEMS_LEGACY);
 808         }
 809
 810         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 811                    "Txq[0x%02x]: doorbell at %p [offset 0x%08x]\n",
 812                    qid, *pp_doorbell, resp->offset);
 813 exit:
 814         ecore_vf_pf_req_end(p_hwfn, rc);
 815
 816         return rc;
 817 }
 818
 819 enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn *p_hwfn,
 820                                           struct ecore_queue_cid *p_cid)
 821 {
 822         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 823         struct vfpf_stop_txqs_tlv *req;
 824         struct pfvf_def_resp_tlv *resp;
 825         enum _ecore_status_t rc;
 826
 827         /* clear mailbox and prep first tlv */
 828         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_TXQS, sizeof(*req));
 829
 830         req->tx_qid = p_cid->rel.queue_id;
 831         req->num_txqs = 1;
 832
 833         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 834
 835         /* add list termination tlv */
 836         ecore_add_tlv(p_hwfn, &p_iov->offset,
 837                       CHANNEL_TLV_LIST_END,
 838                       sizeof(struct channel_list_end_tlv));
 839
 840         resp = &p_iov->pf2vf_reply->default_resp;
 841         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 842         if (rc)
 843                 goto exit;
 844
 845         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 846                 rc = ECORE_INVAL;
 847                 goto exit;
 848         }
 849
 850 exit:
 851         ecore_vf_pf_req_end(p_hwfn, rc);
 852
 853         return rc;
 854 }
 855
 856 enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn,
 857                                              struct ecore_queue_cid **pp_cid,
 858                                              u8 num_rxqs,
 859                                              u8 comp_cqe_flg,
 860                                              u8 comp_event_flg)
 861 {
 862         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 863         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
 864         struct vfpf_update_rxq_tlv *req;
 865         enum _ecore_status_t rc;
 866
 867         /* Starting with CHANNEL_TLV_QID and the need for additional queue
 868          * information, this API stopped supporting multiple rxqs.
 869          * TODO - remove this and change the API to accept a single queue-cid
 870          * in a follow-up patch.
 871          */
 872         if (num_rxqs != 1) {
 873                 DP_NOTICE(p_hwfn, true,
 874                           "VFs can no longer update more than a single queue\n");
 875                 return ECORE_INVAL;
 876         }
 877
 878         /* clear mailbox and prep first tlv */
 879         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_RXQ, sizeof(*req));
 880
 881         req->rx_qid = (*pp_cid)->rel.queue_id;
 882         req->num_rxqs = 1;
 883
 884         if (comp_cqe_flg)
 885                 req->flags |= VFPF_RXQ_UPD_COMPLETE_CQE_FLAG;
 886         if (comp_event_flg)
 887                 req->flags |= VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG;
 888
 889         ecore_vf_pf_add_qid(p_hwfn, *pp_cid);
 890
 891         /* add list termination tlv */
 892         ecore_add_tlv(p_hwfn, &p_iov->offset,
 893                       CHANNEL_TLV_LIST_END,
 894                       sizeof(struct channel_list_end_tlv));
 895
 896         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 897         if (rc)
 898                 goto exit;
 899
 900         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 901                 rc = ECORE_INVAL;
 902                 goto exit;
 903         }
 904
 905 exit:
 906         ecore_vf_pf_req_end(p_hwfn, rc);
 907         return rc;
 908 }
 909
 910 enum _ecore_status_t
 911 ecore_vf_pf_vport_start(struct ecore_hwfn *p_hwfn, u8 vport_id,
 912                         u16 mtu, u8 inner_vlan_removal,
 913                         enum ecore_tpa_mode tpa_mode, u8 max_buffers_per_cqe,
 914                         u8 only_untagged)
 915 {
 916         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 917         struct vfpf_vport_start_tlv *req;
 918         struct pfvf_def_resp_tlv *resp;
 919         enum _ecore_status_t rc;
 920         int i;
 921
 922         /* clear mailbox and prep first tlv */
 923         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_START, sizeof(*req));
 924
 925         req->mtu = mtu;
 926         req->vport_id = vport_id;
 927         req->inner_vlan_removal = inner_vlan_removal;
 928         req->tpa_mode = tpa_mode;
 929         req->max_buffers_per_cqe = max_buffers_per_cqe;
 930         req->only_untagged = only_untagged;
 931
 932         /* status blocks */
 933         for (i = 0; i < p_hwfn->vf_iov_info->acquire_resp.resc.num_sbs; i++) {
 934                 struct ecore_sb_info *p_sb = p_hwfn->vf_iov_info->sbs_info[i];
 935
 936                 if (p_sb)
 937                         req->sb_addr[i] = p_sb->sb_phys;
 938         }
 939
 940         /* add list termination tlv */
 941         ecore_add_tlv(p_hwfn, &p_iov->offset,
 942                       CHANNEL_TLV_LIST_END,
 943                       sizeof(struct channel_list_end_tlv));
 944
 945         resp  = &p_iov->pf2vf_reply->default_resp;
 946         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 947         if (rc)
 948                 goto exit;
 949
 950         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 951                 rc = ECORE_INVAL;
 952                 goto exit;
 953         }
 954
 955 exit:
 956         ecore_vf_pf_req_end(p_hwfn, rc);
 957
 958         return rc;
 959 }
 960
 961 enum _ecore_status_t ecore_vf_pf_vport_stop(struct ecore_hwfn *p_hwfn)
 962 {
 963         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 964         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
 965         enum _ecore_status_t rc;
 966
 967         /* clear mailbox and prep first tlv */
 968         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_TEARDOWN,
 969                          sizeof(struct vfpf_first_tlv));
 970
 971         /* add list termination tlv */
 972         ecore_add_tlv(p_hwfn, &p_iov->offset,
 973                       CHANNEL_TLV_LIST_END,
 974                       sizeof(struct channel_list_end_tlv));
 975
 976         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 977         if (rc)
 978                 goto exit;
 979
 980         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 981                 rc = ECORE_INVAL;
 982                 goto exit;
 983         }
 984
 985 exit:
 986         ecore_vf_pf_req_end(p_hwfn, rc);
 987
 988         return rc;
 989 }
 990
 991 static bool
 992 ecore_vf_handle_vp_update_is_needed(struct ecore_hwfn *p_hwfn,
 993                                     struct ecore_sp_vport_update_params *p_data,
 994                                     u16 tlv)
 995 {
 996         switch (tlv) {
 997         case CHANNEL_TLV_VPORT_UPDATE_ACTIVATE:
 998                 return !!(p_data->update_vport_active_rx_flg ||
 999                           p_data->update_vport_active_tx_flg);
1000         case CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH:
1001 #ifndef ASIC_ONLY
1002                 /* FPGA doesn't have PVFC and so can't support tx-switching */
1003                 return !!(p_data->update_tx_switching_flg &&
1004                           !CHIP_REV_IS_FPGA(p_hwfn->p_dev));
1005 #else
1006                 return !!p_data->update_tx_switching_flg;
1007 #endif
1008         case CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP:
1009                 return !!p_data->update_inner_vlan_removal_flg;
1010         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN:
1011                 return !!p_data->update_accept_any_vlan_flg;
1012         case CHANNEL_TLV_VPORT_UPDATE_MCAST:
1013                 return !!p_data->update_approx_mcast_flg;
1014         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM:
1015                 return !!(p_data->accept_flags.update_rx_mode_config ||
1016                           p_data->accept_flags.update_tx_mode_config);
1017         case CHANNEL_TLV_VPORT_UPDATE_RSS:
1018                 return !!p_data->rss_params;
1019         case CHANNEL_TLV_VPORT_UPDATE_SGE_TPA:
1020                 return !!p_data->sge_tpa_params;
1021         default:
1022                 DP_INFO(p_hwfn, "Unexpected vport-update TLV[%d] %s\n",
1023                         tlv, ecore_channel_tlvs_string[tlv]);
1024                 return false;
1025         }
1026 }
1027
1028 static void
1029 ecore_vf_handle_vp_update_tlvs_resp(struct ecore_hwfn *p_hwfn,
1030                                     struct ecore_sp_vport_update_params *p_data)
1031 {
1032         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1033         struct pfvf_def_resp_tlv *p_resp;
1034         u16 tlv;
1035
1036         for (tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
1037              tlv < CHANNEL_TLV_VPORT_UPDATE_MAX;
1038              tlv++) {
1039                 if (!ecore_vf_handle_vp_update_is_needed(p_hwfn, p_data, tlv))
1040                         continue;
1041
1042                 p_resp = (struct pfvf_def_resp_tlv *)
1043                     ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
1044                 if (p_resp && p_resp->hdr.status)
1045                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1046                                    "TLV[%d] type %s Configuration %s\n",
1047                                    tlv, ecore_channel_tlvs_string[tlv],
1048                                    (p_resp && p_resp->hdr.status) ? "succeeded"
1049                                                                   : "failed");
1050         }
1051 }
1052
1053 enum _ecore_status_t
1054 ecore_vf_pf_vport_update(struct ecore_hwfn *p_hwfn,
1055                          struct ecore_sp_vport_update_params *p_params)
1056 {
1057         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1058         struct vfpf_vport_update_tlv *req;
1059         struct pfvf_def_resp_tlv *resp;
1060         u8 update_rx, update_tx;
1061         u32 resp_size = 0;
1062         u16 size, tlv;
1063         enum _ecore_status_t rc;
1064
1065         resp = &p_iov->pf2vf_reply->default_resp;
1066         resp_size = sizeof(*resp);
1067
1068         update_rx = p_params->update_vport_active_rx_flg;
1069         update_tx = p_params->update_vport_active_tx_flg;
1070
1071         /* clear mailbox and prep header tlv */
1072         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_UPDATE, sizeof(*req));
1073
1074         /* Prepare extended tlvs */
1075         if (update_rx || update_tx) {
1076                 struct vfpf_vport_update_activate_tlv *p_act_tlv;
1077
1078                 size = sizeof(struct vfpf_vport_update_activate_tlv);
1079                 p_act_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
1080                                           CHANNEL_TLV_VPORT_UPDATE_ACTIVATE,
1081                                           size);
1082                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1083
1084                 if (update_rx) {
1085                         p_act_tlv->update_rx = update_rx;
1086                         p_act_tlv->active_rx = p_params->vport_active_rx_flg;
1087                 }
1088
1089                 if (update_tx) {
1090                         p_act_tlv->update_tx = update_tx;
1091                         p_act_tlv->active_tx = p_params->vport_active_tx_flg;
1092                 }
1093         }
1094
1095         if (p_params->update_inner_vlan_removal_flg) {
1096                 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
1097
1098                 size = sizeof(struct vfpf_vport_update_vlan_strip_tlv);
1099                 p_vlan_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
1100                                            CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP,
1101                                            size);
1102                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1103
1104                 p_vlan_tlv->remove_vlan = p_params->inner_vlan_removal_flg;
1105         }
1106
1107         if (p_params->update_tx_switching_flg) {
1108                 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
1109
1110                 size = sizeof(struct vfpf_vport_update_tx_switch_tlv);
1111                 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
1112                 p_tx_switch_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
1113                                                 tlv, size);
1114                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1115
1116                 p_tx_switch_tlv->tx_switching = p_params->tx_switching_flg;
1117         }
1118
1119         if (p_params->update_approx_mcast_flg) {
1120                 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
1121
1122                 size = sizeof(struct vfpf_vport_update_mcast_bin_tlv);
1123                 p_mcast_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
1124                                             CHANNEL_TLV_VPORT_UPDATE_MCAST,
1125                                             size);
1126                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1127
1128                 OSAL_MEMCPY(p_mcast_tlv->bins, p_params->bins,
1129                             sizeof(unsigned long) *
1130                             ETH_MULTICAST_MAC_BINS_IN_REGS);
1131         }
1132
1133         update_rx = p_params->accept_flags.update_rx_mode_config;
1134         update_tx = p_params->accept_flags.update_tx_mode_config;
1135
1136         if (update_rx || update_tx) {
1137                 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
1138
1139                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1140                 size = sizeof(struct vfpf_vport_update_accept_param_tlv);
1141                 p_accept_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset, tlv, size);
1142                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1143
1144                 if (update_rx) {
1145                         p_accept_tlv->update_rx_mode = update_rx;
1146                         p_accept_tlv->rx_accept_filter =
1147                             p_params->accept_flags.rx_accept_filter;
1148                 }
1149
1150                 if (update_tx) {
1151                         p_accept_tlv->update_tx_mode = update_tx;
1152                         p_accept_tlv->tx_accept_filter =
1153                             p_params->accept_flags.tx_accept_filter;
1154                 }
1155         }
1156
1157         if (p_params->rss_params) {
1158                 struct ecore_rss_params *rss_params = p_params->rss_params;
1159                 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
1160                 int i, table_size;
1161
1162                 size = sizeof(struct vfpf_vport_update_rss_tlv);
1163                 p_rss_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
1164                                           CHANNEL_TLV_VPORT_UPDATE_RSS, size);
1165                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1166
1167                 if (rss_params->update_rss_config)
1168                         p_rss_tlv->update_rss_flags |=
1169                             VFPF_UPDATE_RSS_CONFIG_FLAG;
1170                 if (rss_params->update_rss_capabilities)
1171                         p_rss_tlv->update_rss_flags |=
1172                             VFPF_UPDATE_RSS_CAPS_FLAG;
1173                 if (rss_params->update_rss_ind_table)
1174                         p_rss_tlv->update_rss_flags |=
1175                             VFPF_UPDATE_RSS_IND_TABLE_FLAG;
1176                 if (rss_params->update_rss_key)
1177                         p_rss_tlv->update_rss_flags |= VFPF_UPDATE_RSS_KEY_FLAG;
1178
1179                 p_rss_tlv->rss_enable = rss_params->rss_enable;
1180                 p_rss_tlv->rss_caps = rss_params->rss_caps;
1181                 p_rss_tlv->rss_table_size_log = rss_params->rss_table_size_log;
1182
1183                 table_size = OSAL_MIN_T(int, T_ETH_INDIRECTION_TABLE_SIZE,
1184                                         1 << p_rss_tlv->rss_table_size_log);
1185                 for (i = 0; i < table_size; i++) {
1186                         struct ecore_queue_cid *p_queue;
1187
1188                         p_queue = rss_params->rss_ind_table[i];
1189                         p_rss_tlv->rss_ind_table[i] = p_queue->rel.queue_id;
1190                 }
1191
1192                 OSAL_MEMCPY(p_rss_tlv->rss_key, rss_params->rss_key,
1193                             sizeof(rss_params->rss_key));
1194         }
1195
1196         if (p_params->update_accept_any_vlan_flg) {
1197                 struct vfpf_vport_update_accept_any_vlan_tlv *p_any_vlan_tlv;
1198
1199                 size = sizeof(struct vfpf_vport_update_accept_any_vlan_tlv);
1200                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1201                 p_any_vlan_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
1202                                                tlv, size);
1203
1204                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1205                 p_any_vlan_tlv->accept_any_vlan = p_params->accept_any_vlan;
1206                 p_any_vlan_tlv->update_accept_any_vlan_flg =
1207                     p_params->update_accept_any_vlan_flg;
1208         }
1209
1210         if (p_params->sge_tpa_params) {
1211                 struct ecore_sge_tpa_params *sge_tpa_params;
1212                 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
1213
1214                 sge_tpa_params = p_params->sge_tpa_params;
1215                 size = sizeof(struct vfpf_vport_update_sge_tpa_tlv);
1216                 p_sge_tpa_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
1217                                               CHANNEL_TLV_VPORT_UPDATE_SGE_TPA,
1218                                               size);
1219                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1220
1221                 if (sge_tpa_params->update_tpa_en_flg)
1222                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1223                             VFPF_UPDATE_TPA_EN_FLAG;
1224                 if (sge_tpa_params->update_tpa_param_flg)
1225                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1226                             VFPF_UPDATE_TPA_PARAM_FLAG;
1227
1228                 if (sge_tpa_params->tpa_ipv4_en_flg)
1229                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV4_EN_FLAG;
1230                 if (sge_tpa_params->tpa_ipv6_en_flg)
1231                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV6_EN_FLAG;
1232                 if (sge_tpa_params->tpa_pkt_split_flg)
1233                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_PKT_SPLIT_FLAG;
1234                 if (sge_tpa_params->tpa_hdr_data_split_flg)
1235                         p_sge_tpa_tlv->sge_tpa_flags |=
1236                             VFPF_TPA_HDR_DATA_SPLIT_FLAG;
1237                 if (sge_tpa_params->tpa_gro_consistent_flg)
1238                         p_sge_tpa_tlv->sge_tpa_flags |=
1239                             VFPF_TPA_GRO_CONSIST_FLAG;
1240
1241                 p_sge_tpa_tlv->tpa_max_aggs_num =
1242                     sge_tpa_params->tpa_max_aggs_num;
1243                 p_sge_tpa_tlv->tpa_max_size = sge_tpa_params->tpa_max_size;
1244                 p_sge_tpa_tlv->tpa_min_size_to_start =
1245                     sge_tpa_params->tpa_min_size_to_start;
1246                 p_sge_tpa_tlv->tpa_min_size_to_cont =
1247                     sge_tpa_params->tpa_min_size_to_cont;
1248
1249                 p_sge_tpa_tlv->max_buffers_per_cqe =
1250                     sge_tpa_params->max_buffers_per_cqe;
1251         }
1252
1253         /* add list termination tlv */
1254         ecore_add_tlv(p_hwfn, &p_iov->offset,
1255                       CHANNEL_TLV_LIST_END,
1256                       sizeof(struct channel_list_end_tlv));
1257
1258         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, resp_size);
1259         if (rc)
1260                 goto exit;
1261
1262         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1263                 rc = ECORE_INVAL;
1264                 goto exit;
1265         }
1266
1267         ecore_vf_handle_vp_update_tlvs_resp(p_hwfn, p_params);
1268
1269 exit:
1270         ecore_vf_pf_req_end(p_hwfn, rc);
1271
1272         return rc;
1273 }
1274
1275 enum _ecore_status_t ecore_vf_pf_reset(struct ecore_hwfn *p_hwfn)
1276 {
1277         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1278         struct pfvf_def_resp_tlv *resp;
1279         struct vfpf_first_tlv *req;
1280         enum _ecore_status_t rc;
1281
1282         /* clear mailbox and prep first tlv */
1283         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_CLOSE, sizeof(*req));
1284
1285         /* add list termination tlv */
1286         ecore_add_tlv(p_hwfn, &p_iov->offset,
1287                       CHANNEL_TLV_LIST_END,
1288                       sizeof(struct channel_list_end_tlv));
1289
1290         resp = &p_iov->pf2vf_reply->default_resp;
1291         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1292         if (rc)
1293                 goto exit;
1294
1295         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1296                 rc = ECORE_AGAIN;
1297                 goto exit;
1298         }
1299
1300         p_hwfn->b_int_enabled = 0;
1301
1302 exit:
1303         ecore_vf_pf_req_end(p_hwfn, rc);
1304
1305         return rc;
1306 }
1307
1308 enum _ecore_status_t ecore_vf_pf_release(struct ecore_hwfn *p_hwfn)
1309 {
1310         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1311         struct pfvf_def_resp_tlv *resp;
1312         struct vfpf_first_tlv *req;
1313         u32 size;
1314         enum _ecore_status_t rc;
1315
1316         /* clear mailbox and prep first tlv */
1317         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_RELEASE, sizeof(*req));
1318
1319         /* add list termination tlv */
1320         ecore_add_tlv(p_hwfn, &p_iov->offset,
1321                       CHANNEL_TLV_LIST_END,
1322                       sizeof(struct channel_list_end_tlv));
1323
1324         resp = &p_iov->pf2vf_reply->default_resp;
1325         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1326
1327         if (rc == ECORE_SUCCESS && resp->hdr.status != PFVF_STATUS_SUCCESS)
1328                 rc = ECORE_AGAIN;
1329
1330         ecore_vf_pf_req_end(p_hwfn, rc);
1331
1332         p_hwfn->b_int_enabled = 0;
1333
1334         if (p_iov->vf2pf_request)
1335                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
1336                                        p_iov->vf2pf_request,
1337                                        p_iov->vf2pf_request_phys,
1338                                        sizeof(union vfpf_tlvs));
1339         if (p_iov->pf2vf_reply)
1340                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
1341                                        p_iov->pf2vf_reply,
1342                                        p_iov->pf2vf_reply_phys,
1343                                        sizeof(union pfvf_tlvs));
1344
1345         if (p_iov->bulletin.p_virt) {
1346                 size = sizeof(struct ecore_bulletin_content);
1347                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
1348                                        p_iov->bulletin.p_virt,
1349                                        p_iov->bulletin.phys, size);
1350         }
1351
1352         OSAL_FREE(p_hwfn->p_dev, p_hwfn->vf_iov_info);
1353
1354         return rc;
1355 }
1356
1357 void ecore_vf_pf_filter_mcast(struct ecore_hwfn *p_hwfn,
1358                               struct ecore_filter_mcast *p_filter_cmd)
1359 {
1360         struct ecore_sp_vport_update_params sp_params;
1361         int i;
1362
1363         OSAL_MEMSET(&sp_params, 0, sizeof(sp_params));
1364         sp_params.update_approx_mcast_flg = 1;
1365
1366         if (p_filter_cmd->opcode == ECORE_FILTER_ADD) {
1367                 for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
1368                         u32 bit;
1369
1370                         bit = ecore_mcast_bin_from_mac(p_filter_cmd->mac[i]);
1371                         OSAL_SET_BIT(bit, sp_params.bins);
1372                 }
1373         }
1374
1375         ecore_vf_pf_vport_update(p_hwfn, &sp_params);
1376 }
1377
1378 enum _ecore_status_t ecore_vf_pf_filter_ucast(struct ecore_hwfn *p_hwfn,
1379                                               struct ecore_filter_ucast
1380                                               *p_ucast)
1381 {
1382         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1383         struct vfpf_ucast_filter_tlv *req;
1384         struct pfvf_def_resp_tlv *resp;
1385         enum _ecore_status_t rc;
1386
1387         /* Sanitize */
1388         if (p_ucast->opcode == ECORE_FILTER_MOVE) {
1389                 DP_NOTICE(p_hwfn, true,
1390                           "VFs don't support Moving of filters\n");
1391                 return ECORE_INVAL;
1392         }
1393
1394         /* clear mailbox and prep first tlv */
1395         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UCAST_FILTER, sizeof(*req));
1396         req->opcode = (u8)p_ucast->opcode;
1397         req->type = (u8)p_ucast->type;
1398         OSAL_MEMCPY(req->mac, p_ucast->mac, ETH_ALEN);
1399         req->vlan = p_ucast->vlan;
1400
1401         /* add list termination tlv */
1402         ecore_add_tlv(p_hwfn, &p_iov->offset,
1403                       CHANNEL_TLV_LIST_END,
1404                       sizeof(struct channel_list_end_tlv));
1405
1406         resp = &p_iov->pf2vf_reply->default_resp;
1407         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1408         if (rc)
1409                 goto exit;
1410
1411         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1412                 rc = ECORE_AGAIN;
1413                 goto exit;
1414         }
1415
1416 exit:
1417         ecore_vf_pf_req_end(p_hwfn, rc);
1418
1419         return rc;
1420 }
1421
1422 enum _ecore_status_t ecore_vf_pf_int_cleanup(struct ecore_hwfn *p_hwfn)
1423 {
1424         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1425         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1426         enum _ecore_status_t rc;
1427
1428         /* clear mailbox and prep first tlv */
1429         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_INT_CLEANUP,
1430                          sizeof(struct vfpf_first_tlv));
1431
1432         /* add list termination tlv */
1433         ecore_add_tlv(p_hwfn, &p_iov->offset,
1434                       CHANNEL_TLV_LIST_END,
1435                       sizeof(struct channel_list_end_tlv));
1436
1437         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1438         if (rc)
1439                 goto exit;
1440
1441         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1442                 rc = ECORE_INVAL;
1443                 goto exit;
1444         }
1445
1446 exit:
1447         ecore_vf_pf_req_end(p_hwfn, rc);
1448
1449         return rc;
1450 }
1451
1452 enum _ecore_status_t
1453 ecore_vf_pf_set_coalesce(struct ecore_hwfn *p_hwfn, u16 rx_coal, u16 tx_coal,
1454                          struct ecore_queue_cid     *p_cid)
1455 {
1456         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1457         struct vfpf_update_coalesce *req;
1458         struct pfvf_def_resp_tlv *resp;
1459         enum _ecore_status_t rc;
1460
1461         /* clear mailbox and prep header tlv */
1462         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_UPDATE,
1463                                sizeof(*req));
1464
1465         req->rx_coal = rx_coal;
1466         req->tx_coal = tx_coal;
1467         req->qid = p_cid->rel.queue_id;
1468
1469         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1470                    "Setting coalesce rx_coal = %d, tx_coal = %d at queue = %d\n",
1471                    rx_coal, tx_coal, req->qid);
1472
1473         /* add list termination tlv */
1474         ecore_add_tlv(p_hwfn, &p_iov->offset, CHANNEL_TLV_LIST_END,
1475                       sizeof(struct channel_list_end_tlv));
1476
1477         resp = &p_iov->pf2vf_reply->default_resp;
1478         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1479
1480         if (rc != ECORE_SUCCESS)
1481                 goto exit;
1482
1483         if (resp->hdr.status != PFVF_STATUS_SUCCESS)
1484                 goto exit;
1485
1486         p_hwfn->p_dev->rx_coalesce_usecs = rx_coal;
1487         p_hwfn->p_dev->tx_coalesce_usecs = tx_coal;
1488
1489 exit:
1490         ecore_vf_pf_req_end(p_hwfn, rc);
1491         return rc;
1492 }
1493
1494 u16 ecore_vf_get_igu_sb_id(struct ecore_hwfn *p_hwfn,
1495                            u16               sb_id)
1496 {
1497         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1498
1499         if (!p_iov) {
1500                 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
1501                 return 0;
1502         }
1503
1504         return p_iov->acquire_resp.resc.hw_sbs[sb_id].hw_sb_id;
1505 }
1506
1507 void ecore_vf_set_sb_info(struct ecore_hwfn *p_hwfn,
1508                           u16 sb_id, struct ecore_sb_info *p_sb)
1509 {
1510         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1511
1512         if (!p_iov) {
1513                 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
1514                 return;
1515         }
1516
1517         if (sb_id >= PFVF_MAX_SBS_PER_VF) {
1518                 DP_NOTICE(p_hwfn, true, "Can't configure SB %04x\n", sb_id);
1519                 return;
1520         }
1521
1522         p_iov->sbs_info[sb_id] = p_sb;
1523 }
1524
1525 enum _ecore_status_t ecore_vf_read_bulletin(struct ecore_hwfn *p_hwfn,
1526                                             u8 *p_change)
1527 {
1528         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1529         struct ecore_bulletin_content shadow;
1530         u32 crc, crc_size;
1531
1532         crc_size = sizeof(p_iov->bulletin.p_virt->crc);
1533         *p_change = 0;
1534
1535         /* Need to guarantee PF is not in the middle of writing it */
1536         OSAL_MEMCPY(&shadow, p_iov->bulletin.p_virt, p_iov->bulletin.size);
1537
1538         /* If version did not update, no need to do anything */
1539         if (shadow.version == p_iov->bulletin_shadow.version)
1540                 return ECORE_SUCCESS;
1541
1542         /* Verify the bulletin we see is valid */
1543         crc = OSAL_CRC32(0, (u8 *)&shadow + crc_size,
1544                          p_iov->bulletin.size - crc_size);
1545         if (crc != shadow.crc)
1546                 return ECORE_AGAIN;
1547
1548         /* Set the shadow bulletin and process it */
1549         OSAL_MEMCPY(&p_iov->bulletin_shadow, &shadow, p_iov->bulletin.size);
1550
1551         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1552                    "Read a bulletin update %08x\n", shadow.version);
1553
1554         *p_change = 1;
1555
1556         return ECORE_SUCCESS;
1557 }
1558
1559 void __ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
1560                                 struct ecore_mcp_link_params *p_params,
1561                                 struct ecore_bulletin_content *p_bulletin)
1562 {
1563         OSAL_MEMSET(p_params, 0, sizeof(*p_params));
1564
1565         p_params->speed.autoneg = p_bulletin->req_autoneg;
1566         p_params->speed.advertised_speeds = p_bulletin->req_adv_speed;
1567         p_params->speed.forced_speed = p_bulletin->req_forced_speed;
1568         p_params->pause.autoneg = p_bulletin->req_autoneg_pause;
1569         p_params->pause.forced_rx = p_bulletin->req_forced_rx;
1570         p_params->pause.forced_tx = p_bulletin->req_forced_tx;
1571         p_params->loopback_mode = p_bulletin->req_loopback;
1572 }
1573
1574 void ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
1575                               struct ecore_mcp_link_params *params)
1576 {
1577         __ecore_vf_get_link_params(p_hwfn, params,
1578                                    &p_hwfn->vf_iov_info->bulletin_shadow);
1579 }
1580
1581 void __ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
1582                                struct ecore_mcp_link_state *p_link,
1583                                struct ecore_bulletin_content *p_bulletin)
1584 {
1585         OSAL_MEMSET(p_link, 0, sizeof(*p_link));
1586
1587         p_link->link_up = p_bulletin->link_up;
1588         p_link->speed = p_bulletin->speed;
1589         p_link->full_duplex = p_bulletin->full_duplex;
1590         p_link->an = p_bulletin->autoneg;
1591         p_link->an_complete = p_bulletin->autoneg_complete;
1592         p_link->parallel_detection = p_bulletin->parallel_detection;
1593         p_link->pfc_enabled = p_bulletin->pfc_enabled;
1594         p_link->partner_adv_speed = p_bulletin->partner_adv_speed;
1595         p_link->partner_tx_flow_ctrl_en = p_bulletin->partner_tx_flow_ctrl_en;
1596         p_link->partner_rx_flow_ctrl_en = p_bulletin->partner_rx_flow_ctrl_en;
1597         p_link->partner_adv_pause = p_bulletin->partner_adv_pause;
1598         p_link->sfp_tx_fault = p_bulletin->sfp_tx_fault;
1599 }
1600
1601 void ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
1602                              struct ecore_mcp_link_state *link)
1603 {
1604         __ecore_vf_get_link_state(p_hwfn, link,
1605                                   &p_hwfn->vf_iov_info->bulletin_shadow);
1606 }
1607
1608 void __ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
1609                               struct ecore_mcp_link_capabilities *p_link_caps,
1610                               struct ecore_bulletin_content *p_bulletin)
1611 {
1612         OSAL_MEMSET(p_link_caps, 0, sizeof(*p_link_caps));
1613         p_link_caps->speed_capabilities = p_bulletin->capability_speed;
1614 }
1615
1616 void ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
1617                             struct ecore_mcp_link_capabilities *p_link_caps)
1618 {
1619         __ecore_vf_get_link_caps(p_hwfn, p_link_caps,
1620                                  &p_hwfn->vf_iov_info->bulletin_shadow);
1621 }
1622
1623 void ecore_vf_get_num_rxqs(struct ecore_hwfn *p_hwfn, u8 *num_rxqs)
1624 {
1625         *num_rxqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_rxqs;
1626 }
1627
1628 void ecore_vf_get_num_txqs(struct ecore_hwfn *p_hwfn,
1629                            u8 *num_txqs)
1630 {
1631         *num_txqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_txqs;
1632 }
1633
1634 void ecore_vf_get_port_mac(struct ecore_hwfn *p_hwfn, u8 *port_mac)
1635 {
1636         OSAL_MEMCPY(port_mac,
1637                     p_hwfn->vf_iov_info->acquire_resp.pfdev_info.port_mac,
1638                     ETH_ALEN);
1639 }
1640
1641 void ecore_vf_get_num_vlan_filters(struct ecore_hwfn *p_hwfn,
1642                                    u8 *num_vlan_filters)
1643 {
1644         struct ecore_vf_iov *p_vf;
1645
1646         p_vf = p_hwfn->vf_iov_info;
1647         *num_vlan_filters = p_vf->acquire_resp.resc.num_vlan_filters;
1648 }
1649
1650 void ecore_vf_get_num_sbs(struct ecore_hwfn *p_hwfn,
1651                           u32 *num_sbs)
1652 {
1653         struct ecore_vf_iov *p_vf;
1654
1655         p_vf = p_hwfn->vf_iov_info;
1656         *num_sbs = (u32)p_vf->acquire_resp.resc.num_sbs;
1657 }
1658
1659 void ecore_vf_get_num_mac_filters(struct ecore_hwfn *p_hwfn,
1660                                   u32 *num_mac_filters)
1661 {
1662         struct ecore_vf_iov *p_vf = p_hwfn->vf_iov_info;
1663
1664         *num_mac_filters = p_vf->acquire_resp.resc.num_mac_filters;
1665 }
1666
1667 bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac)
1668 {
1669         struct ecore_bulletin_content *bulletin;
1670
1671         bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
1672         if (!(bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)))
1673                 return true;
1674
1675         /* Forbid VF from changing a MAC enforced by PF */
1676         if (OSAL_MEMCMP(bulletin->mac, mac, ETH_ALEN))
1677                 return false;
1678
1679         return false;
1680 }
1681
1682 bool ecore_vf_bulletin_get_forced_mac(struct ecore_hwfn *hwfn, u8 *dst_mac,
1683                                       u8 *p_is_forced)
1684 {
1685         struct ecore_bulletin_content *bulletin;
1686
1687         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1688
1689         if (bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
1690                 if (p_is_forced)
1691                         *p_is_forced = 1;
1692         } else if (bulletin->valid_bitmap & (1 << VFPF_BULLETIN_MAC_ADDR)) {
1693                 if (p_is_forced)
1694                         *p_is_forced = 0;
1695         } else {
1696                 return false;
1697         }
1698
1699         OSAL_MEMCPY(dst_mac, bulletin->mac, ETH_ALEN);
1700
1701         return true;
1702 }
1703
1704 void ecore_vf_bulletin_get_udp_ports(struct ecore_hwfn *p_hwfn,
1705                                      u16 *p_vxlan_port,
1706                                      u16 *p_geneve_port)
1707 {
1708         struct ecore_bulletin_content *p_bulletin;
1709
1710         p_bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
1711
1712         *p_vxlan_port = p_bulletin->vxlan_udp_port;
1713         *p_geneve_port = p_bulletin->geneve_udp_port;
1714 }
1715
1716 bool ecore_vf_bulletin_get_forced_vlan(struct ecore_hwfn *hwfn, u16 *dst_pvid)
1717 {
1718         struct ecore_bulletin_content *bulletin;
1719
1720         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1721
1722         if (!(bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
1723                 return false;
1724
1725         if (dst_pvid)
1726                 *dst_pvid = bulletin->pvid;
1727
1728         return true;
1729 }
1730
1731 bool ecore_vf_get_pre_fp_hsi(struct ecore_hwfn *p_hwfn)
1732 {
1733         return p_hwfn->vf_iov_info->b_pre_fp_hsi;
1734 }
1735
1736 void ecore_vf_get_fw_version(struct ecore_hwfn *p_hwfn,
1737                              u16 *fw_major, u16 *fw_minor, u16 *fw_rev,
1738                              u16 *fw_eng)
1739 {
1740         struct pf_vf_pfdev_info *info;
1741
1742         info = &p_hwfn->vf_iov_info->acquire_resp.pfdev_info;
1743
1744         *fw_major = info->fw_major;
1745         *fw_minor = info->fw_minor;
1746         *fw_rev = info->fw_rev;
1747         *fw_eng = info->fw_eng;
1748 }