net/qede/base: remove unused parameters
[dpdk.git] / drivers / net / qede / base / ecore_vf.c
1 /*
2  * Copyright (c) 2016 QLogic Corporation.
3  * All rights reserved.
4  * www.qlogic.com
5  *
6  * See LICENSE.qede_pmd for copyright and licensing details.
7  */
8
9 #include "bcm_osal.h"
10 #include "ecore.h"
11 #include "ecore_hsi_eth.h"
12 #include "ecore_sriov.h"
13 #include "ecore_l2_api.h"
14 #include "ecore_vf.h"
15 #include "ecore_vfpf_if.h"
16 #include "ecore_status.h"
17 #include "reg_addr.h"
18 #include "ecore_int.h"
19 #include "ecore_l2.h"
20 #include "ecore_mcp_api.h"
21 #include "ecore_vf_api.h"
22
23 static void *ecore_vf_pf_prep(struct ecore_hwfn *p_hwfn, u16 type, u16 length)
24 {
25         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
26         void *p_tlv;
27
28         /* This lock is released when we receive PF's response
29          * in ecore_send_msg2pf().
30          * So, ecore_vf_pf_prep() and ecore_send_msg2pf()
31          * must come in sequence.
32          */
33         OSAL_MUTEX_ACQUIRE(&p_iov->mutex);
34
35         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
36                    "preparing to send %s tlv over vf pf channel\n",
37                    ecore_channel_tlvs_string[type]);
38
39         /* Reset Request offset */
40         p_iov->offset = (u8 *)(p_iov->vf2pf_request);
41
42         /* Clear mailbox - both request and reply */
43         OSAL_MEMSET(p_iov->vf2pf_request, 0, sizeof(union vfpf_tlvs));
44         OSAL_MEMSET(p_iov->pf2vf_reply, 0, sizeof(union pfvf_tlvs));
45
46         /* Init type and length */
47         p_tlv = ecore_add_tlv(&p_iov->offset, type, length);
48
49         /* Init first tlv header */
50         ((struct vfpf_first_tlv *)p_tlv)->reply_address =
51             (u64)p_iov->pf2vf_reply_phys;
52
53         return p_tlv;
54 }
55
56 static void ecore_vf_pf_req_end(struct ecore_hwfn *p_hwfn,
57                                  enum _ecore_status_t req_status)
58 {
59         union pfvf_tlvs *resp = p_hwfn->vf_iov_info->pf2vf_reply;
60
61         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
62                    "VF request status = 0x%x, PF reply status = 0x%x\n",
63                    req_status, resp->default_resp.hdr.status);
64
65         OSAL_MUTEX_RELEASE(&p_hwfn->vf_iov_info->mutex);
66 }
67
68 static enum _ecore_status_t
69 ecore_send_msg2pf(struct ecore_hwfn *p_hwfn,
70                   u8 *done, u32 resp_size)
71 {
72         union vfpf_tlvs *p_req = p_hwfn->vf_iov_info->vf2pf_request;
73         struct ustorm_trigger_vf_zone trigger;
74         struct ustorm_vf_zone *zone_data;
75         enum _ecore_status_t rc = ECORE_SUCCESS;
76         int time = 100;
77
78         zone_data = (struct ustorm_vf_zone *)PXP_VF_BAR0_START_USDM_ZONE_B;
79
80         /* output tlvs list */
81         ecore_dp_tlv_list(p_hwfn, p_req);
82
83         /* need to add the END TLV to the message size */
84         resp_size += sizeof(struct channel_list_end_tlv);
85
86         /* Send TLVs over HW channel */
87         OSAL_MEMSET(&trigger, 0, sizeof(struct ustorm_trigger_vf_zone));
88         trigger.vf_pf_msg_valid = 1;
89
90         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
91                    "VF -> PF [%02x] message: [%08x, %08x] --> %p,"
92                    " %08x --> %p\n",
93                    GET_FIELD(p_hwfn->hw_info.concrete_fid,
94                              PXP_CONCRETE_FID_PFID),
95                    U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys),
96                    U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys),
97                    &zone_data->non_trigger.vf_pf_msg_addr,
98                    *((u32 *)&trigger), &zone_data->trigger);
99
100         REG_WR(p_hwfn,
101                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.lo,
102                U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys));
103
104         REG_WR(p_hwfn,
105                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.hi,
106                U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys));
107
108         /* The message data must be written first, to prevent trigger before
109          * data is written.
110          */
111         OSAL_WMB(p_hwfn->p_dev);
112
113         REG_WR(p_hwfn, (osal_uintptr_t)&zone_data->trigger,
114                *((u32 *)&trigger));
115
116         /* When PF would be done with the response, it would write back to the
117          * `done' address. Poll until then.
118          */
119         while ((!*done) && time) {
120                 OSAL_MSLEEP(25);
121                 time--;
122         }
123
124         if (!*done) {
125                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
126                            "VF <-- PF Timeout [Type %d]\n",
127                            p_req->first_tlv.tl.type);
128                 rc = ECORE_TIMEOUT;
129         } else {
130                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
131                            "PF response: %d [Type %d]\n",
132                            *done, p_req->first_tlv.tl.type);
133         }
134
135         return rc;
136 }
137
138 static void ecore_vf_pf_add_qid(struct ecore_hwfn *p_hwfn,
139                                 struct ecore_queue_cid *p_cid)
140 {
141         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
142         struct vfpf_qid_tlv *p_qid_tlv;
143
144         /* Only add QIDs for the queue if it was negotiated with PF */
145         if (!(p_iov->acquire_resp.pfdev_info.capabilities &
146               PFVF_ACQUIRE_CAP_QUEUE_QIDS))
147                 return;
148
149         p_qid_tlv = ecore_add_tlv(&p_iov->offset,
150                                   CHANNEL_TLV_QID, sizeof(*p_qid_tlv));
151         p_qid_tlv->qid = p_cid->qid_usage_idx;
152 }
153
154 #define VF_ACQUIRE_THRESH 3
155 static void ecore_vf_pf_acquire_reduce_resc(struct ecore_hwfn *p_hwfn,
156                                             struct vf_pf_resc_request *p_req,
157                                             struct pf_vf_resc *p_resp)
158 {
159         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
160                    "PF unwilling to fullill resource request: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x] cids [%02x/%02x]. Try PF recommended amount\n",
161                    p_req->num_rxqs, p_resp->num_rxqs,
162                    p_req->num_rxqs, p_resp->num_txqs,
163                    p_req->num_sbs, p_resp->num_sbs,
164                    p_req->num_mac_filters, p_resp->num_mac_filters,
165                    p_req->num_vlan_filters, p_resp->num_vlan_filters,
166                    p_req->num_mc_filters, p_resp->num_mc_filters,
167                    p_req->num_cids, p_resp->num_cids);
168
169         /* humble our request */
170         p_req->num_txqs = p_resp->num_txqs;
171         p_req->num_rxqs = p_resp->num_rxqs;
172         p_req->num_sbs = p_resp->num_sbs;
173         p_req->num_mac_filters = p_resp->num_mac_filters;
174         p_req->num_vlan_filters = p_resp->num_vlan_filters;
175         p_req->num_mc_filters = p_resp->num_mc_filters;
176         p_req->num_cids = p_resp->num_cids;
177 }
178
179 static enum _ecore_status_t ecore_vf_pf_acquire(struct ecore_hwfn *p_hwfn)
180 {
181         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
182         struct pfvf_acquire_resp_tlv *resp = &p_iov->pf2vf_reply->acquire_resp;
183         struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
184         struct ecore_vf_acquire_sw_info vf_sw_info;
185         struct vf_pf_resc_request *p_resc;
186         bool resources_acquired = false;
187         struct vfpf_acquire_tlv *req;
188         int attempts = 0;
189         enum _ecore_status_t rc = ECORE_SUCCESS;
190
191         /* clear mailbox and prep first tlv */
192         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_ACQUIRE, sizeof(*req));
193         p_resc = &req->resc_request;
194
195         /* @@@ TBD: PF may not be ready bnx2x_get_vf_id... */
196         req->vfdev_info.opaque_fid = p_hwfn->hw_info.opaque_fid;
197
198         p_resc->num_rxqs = ECORE_MAX_VF_CHAINS_PER_PF;
199         p_resc->num_txqs = ECORE_MAX_VF_CHAINS_PER_PF;
200         p_resc->num_sbs = ECORE_MAX_VF_CHAINS_PER_PF;
201         p_resc->num_mac_filters = ECORE_ETH_VF_NUM_MAC_FILTERS;
202         p_resc->num_vlan_filters = ECORE_ETH_VF_NUM_VLAN_FILTERS;
203         p_resc->num_cids = ECORE_ETH_VF_DEFAULT_NUM_CIDS;
204
205         OSAL_MEMSET(&vf_sw_info, 0, sizeof(vf_sw_info));
206         OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, &req->resc_request, &vf_sw_info);
207
208         req->vfdev_info.os_type = vf_sw_info.os_type;
209         req->vfdev_info.driver_version = vf_sw_info.driver_version;
210         req->vfdev_info.fw_major = FW_MAJOR_VERSION;
211         req->vfdev_info.fw_minor = FW_MINOR_VERSION;
212         req->vfdev_info.fw_revision = FW_REVISION_VERSION;
213         req->vfdev_info.fw_engineering = FW_ENGINEERING_VERSION;
214         req->vfdev_info.eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
215         req->vfdev_info.eth_fp_hsi_minor = ETH_HSI_VER_MINOR;
216
217         /* Fill capability field with any non-deprecated config we support */
218         req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_100G;
219
220         /* pf 2 vf bulletin board address */
221         req->bulletin_addr = p_iov->bulletin.phys;
222         req->bulletin_size = p_iov->bulletin.size;
223
224         /* add list termination tlv */
225         ecore_add_tlv(&p_iov->offset,
226                       CHANNEL_TLV_LIST_END,
227                       sizeof(struct channel_list_end_tlv));
228
229         while (!resources_acquired) {
230                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
231                            "attempting to acquire resources\n");
232
233                 /* Clear response buffer, as this might be a re-send */
234                 OSAL_MEMSET(p_iov->pf2vf_reply, 0,
235                             sizeof(union pfvf_tlvs));
236
237                 /* send acquire request */
238                 rc = ecore_send_msg2pf(p_hwfn,
239                                        &resp->hdr.status, sizeof(*resp));
240
241                 /* PF timeout */
242                 if (rc)
243                         return rc;
244
245                 /* copy acquire response from buffer to p_hwfn */
246                 OSAL_MEMCPY(&p_iov->acquire_resp,
247                             resp, sizeof(p_iov->acquire_resp));
248
249                 attempts++;
250
251                 if (resp->hdr.status == PFVF_STATUS_SUCCESS) {
252                         /* PF agrees to allocate our resources */
253                         if (!(resp->pfdev_info.capabilities &
254                               PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE)) {
255                                 /* It's possible legacy PF mistakenly accepted;
256                                  * but we don't care - simply mark it as
257                                  * legacy and continue.
258                                  */
259                                 req->vfdev_info.capabilities |=
260                                         VFPF_ACQUIRE_CAP_PRE_FP_HSI;
261                         }
262                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
263                                    "resources acquired\n");
264                         resources_acquired = true;
265                 } /* PF refuses to allocate our resources */
266                 else if (resp->hdr.status == PFVF_STATUS_NO_RESOURCE &&
267                          attempts < VF_ACQUIRE_THRESH) {
268                         ecore_vf_pf_acquire_reduce_resc(p_hwfn, p_resc,
269                                                         &resp->resc);
270
271                 } else if (resp->hdr.status == PFVF_STATUS_NOT_SUPPORTED) {
272                         if (pfdev_info->major_fp_hsi &&
273                             (pfdev_info->major_fp_hsi != ETH_HSI_VER_MAJOR)) {
274                                 DP_NOTICE(p_hwfn, false,
275                                           "PF uses an incompatible fastpath HSI"
276                                           " %02x.%02x [VF requires %02x.%02x]."
277                                           " Please change to a VF driver using"
278                                           " %02x.xx.\n",
279                                           pfdev_info->major_fp_hsi,
280                                           pfdev_info->minor_fp_hsi,
281                                           ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR,
282                                           pfdev_info->major_fp_hsi);
283                                 rc = ECORE_INVAL;
284                                 goto exit;
285                         }
286
287                         if (!pfdev_info->major_fp_hsi) {
288                                 if (req->vfdev_info.capabilities &
289                                     VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
290                                         DP_NOTICE(p_hwfn, false,
291                                                   "PF uses very old drivers."
292                                                   " Please change to a VF"
293                                                   " driver using no later than"
294                                                   " 8.8.x.x.\n");
295                                         rc = ECORE_INVAL;
296                                         goto exit;
297                                 } else {
298                                         DP_INFO(p_hwfn,
299                                                 "PF is old - try re-acquire to"
300                                                 " see if it supports FW-version"
301                                                 " override\n");
302                                         req->vfdev_info.capabilities |=
303                                                 VFPF_ACQUIRE_CAP_PRE_FP_HSI;
304                                         continue;
305                                 }
306                         }
307
308                         /* If PF/VF are using same Major, PF must have had
309                          * it's reasons. Simply fail.
310                          */
311                         DP_NOTICE(p_hwfn, false,
312                                   "PF rejected acquisition by VF\n");
313                         rc = ECORE_INVAL;
314                         goto exit;
315                 } else {
316                         DP_ERR(p_hwfn,
317                                "PF returned err %d to VF acquisition request\n",
318                                resp->hdr.status);
319                         rc = ECORE_AGAIN;
320                         goto exit;
321                 }
322         }
323
324         /* Mark the PF as legacy, if needed */
325         if (req->vfdev_info.capabilities &
326             VFPF_ACQUIRE_CAP_PRE_FP_HSI)
327                 p_iov->b_pre_fp_hsi = true;
328
329         /* In case PF doesn't support multi-queue Tx, update the number of
330          * CIDs to reflect the number of queues [older PFs didn't fill that
331          * field].
332          */
333         if (!(resp->pfdev_info.capabilities &
334               PFVF_ACQUIRE_CAP_QUEUE_QIDS))
335                 resp->resc.num_cids = resp->resc.num_rxqs +
336                                       resp->resc.num_txqs;
337
338         rc = OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, &resp->resc);
339         if (rc) {
340                 DP_NOTICE(p_hwfn, true,
341                           "VF_UPDATE_ACQUIRE_RESC_RESP Failed:"
342                           " status = 0x%x.\n",
343                           rc);
344                 rc = ECORE_AGAIN;
345                 goto exit;
346         }
347
348         /* Update bulletin board size with response from PF */
349         p_iov->bulletin.size = resp->bulletin_size;
350
351         /* get HW info */
352         p_hwfn->p_dev->type = resp->pfdev_info.dev_type;
353         p_hwfn->p_dev->chip_rev = resp->pfdev_info.chip_rev;
354
355         DP_INFO(p_hwfn, "Chip details - %s%d\n",
356                 ECORE_IS_BB(p_hwfn->p_dev) ? "BB" : "AH",
357                 CHIP_REV_IS_A0(p_hwfn->p_dev) ? 0 : 1);
358
359         p_hwfn->p_dev->chip_num = pfdev_info->chip_num & 0xffff;
360
361         /* Learn of the possibility of CMT */
362         if (IS_LEAD_HWFN(p_hwfn)) {
363                 if (resp->pfdev_info.capabilities & PFVF_ACQUIRE_CAP_100G) {
364                         DP_INFO(p_hwfn, "100g VF\n");
365                         p_hwfn->p_dev->num_hwfns = 2;
366                 }
367         }
368
369         /* @DPDK */
370         if ((~p_iov->b_pre_fp_hsi &
371             ETH_HSI_VER_MINOR) &&
372             (resp->pfdev_info.minor_fp_hsi < ETH_HSI_VER_MINOR))
373                 DP_INFO(p_hwfn,
374                         "PF is using older fastpath HSI;"
375                         " %02x.%02x is configured\n",
376                         ETH_HSI_VER_MAJOR,
377                         resp->pfdev_info.minor_fp_hsi);
378
379 exit:
380         ecore_vf_pf_req_end(p_hwfn, rc);
381
382         return rc;
383 }
384
385 enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_hwfn *p_hwfn)
386 {
387         struct ecore_vf_iov *p_iov;
388         u32 reg;
389
390         /* Set number of hwfns - might be overridden once leading hwfn learns
391          * actual configuration from PF.
392          */
393         if (IS_LEAD_HWFN(p_hwfn))
394                 p_hwfn->p_dev->num_hwfns = 1;
395
396         /* Set the doorbell bar. Assumption: regview is set */
397         p_hwfn->doorbells = (u8 OSAL_IOMEM *)p_hwfn->regview +
398             PXP_VF_BAR0_START_DQ;
399
400         reg = PXP_VF_BAR0_ME_OPAQUE_ADDRESS;
401         p_hwfn->hw_info.opaque_fid = (u16)REG_RD(p_hwfn, reg);
402
403         reg = PXP_VF_BAR0_ME_CONCRETE_ADDRESS;
404         p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn, reg);
405
406         /* Allocate vf sriov info */
407         p_iov = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_iov));
408         if (!p_iov) {
409                 DP_NOTICE(p_hwfn, true,
410                           "Failed to allocate `struct ecore_sriov'\n");
411                 return ECORE_NOMEM;
412         }
413
414         /* Allocate vf2pf msg */
415         p_iov->vf2pf_request = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
416                                                          &p_iov->
417                                                          vf2pf_request_phys,
418                                                          sizeof(union
419                                                                 vfpf_tlvs));
420         if (!p_iov->vf2pf_request) {
421                 DP_NOTICE(p_hwfn, true,
422                          "Failed to allocate `vf2pf_request' DMA memory\n");
423                 goto free_p_iov;
424         }
425
426         p_iov->pf2vf_reply = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
427                                                        &p_iov->
428                                                        pf2vf_reply_phys,
429                                                        sizeof(union pfvf_tlvs));
430         if (!p_iov->pf2vf_reply) {
431                 DP_NOTICE(p_hwfn, true,
432                           "Failed to allocate `pf2vf_reply' DMA memory\n");
433                 goto free_vf2pf_request;
434         }
435
436         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
437                    "VF's Request mailbox [%p virt 0x%lx phys], "
438                    "Response mailbox [%p virt 0x%lx phys]\n",
439                    p_iov->vf2pf_request,
440                    (unsigned long)p_iov->vf2pf_request_phys,
441                    p_iov->pf2vf_reply,
442                    (unsigned long)p_iov->pf2vf_reply_phys);
443
444         /* Allocate Bulletin board */
445         p_iov->bulletin.size = sizeof(struct ecore_bulletin_content);
446         p_iov->bulletin.p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
447                                                            &p_iov->bulletin.
448                                                            phys,
449                                                            p_iov->bulletin.
450                                                            size);
451         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
452                    "VF's bulletin Board [%p virt 0x%lx phys 0x%08x bytes]\n",
453                    p_iov->bulletin.p_virt, (unsigned long)p_iov->bulletin.phys,
454                    p_iov->bulletin.size);
455
456 #ifdef CONFIG_ECORE_LOCK_ALLOC
457         OSAL_MUTEX_ALLOC(p_hwfn, &p_iov->mutex);
458 #endif
459         OSAL_MUTEX_INIT(&p_iov->mutex);
460
461         p_hwfn->vf_iov_info = p_iov;
462
463         p_hwfn->hw_info.personality = ECORE_PCI_ETH;
464
465         return ecore_vf_pf_acquire(p_hwfn);
466
467 free_vf2pf_request:
468         OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->vf2pf_request,
469                                p_iov->vf2pf_request_phys,
470                                sizeof(union vfpf_tlvs));
471 free_p_iov:
472         OSAL_FREE(p_hwfn->p_dev, p_iov);
473
474         return ECORE_NOMEM;
475 }
476
477 #define TSTORM_QZONE_START   PXP_VF_BAR0_START_SDM_ZONE_A
478 #define MSTORM_QZONE_START(dev)   (TSTORM_QZONE_START + \
479                                    (TSTORM_QZONE_SIZE * NUM_OF_L2_QUEUES(dev)))
480
481 /* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
482 static void
483 __ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
484                              struct ecore_tunn_update_type *p_src,
485                              enum ecore_tunn_mode mask, u8 *p_cls)
486 {
487         if (p_src->b_update_mode) {
488                 p_req->tun_mode_update_mask |= (1 << mask);
489
490                 if (p_src->b_mode_enabled)
491                         p_req->tunn_mode |= (1 << mask);
492         }
493
494         *p_cls = p_src->tun_cls;
495 }
496
497 /* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
498 static void
499 ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
500                            struct ecore_tunn_update_type *p_src,
501                            enum ecore_tunn_mode mask, u8 *p_cls,
502                            struct ecore_tunn_update_udp_port *p_port,
503                            u8 *p_update_port, u16 *p_udp_port)
504 {
505         if (p_port->b_update_port) {
506                 *p_update_port = 1;
507                 *p_udp_port = p_port->port;
508         }
509
510         __ecore_vf_prep_tunn_req_tlv(p_req, p_src, mask, p_cls);
511 }
512
513 void ecore_vf_set_vf_start_tunn_update_param(struct ecore_tunnel_info *p_tun)
514 {
515         if (p_tun->vxlan.b_mode_enabled)
516                 p_tun->vxlan.b_update_mode = true;
517         if (p_tun->l2_geneve.b_mode_enabled)
518                 p_tun->l2_geneve.b_update_mode = true;
519         if (p_tun->ip_geneve.b_mode_enabled)
520                 p_tun->ip_geneve.b_update_mode = true;
521         if (p_tun->l2_gre.b_mode_enabled)
522                 p_tun->l2_gre.b_update_mode = true;
523         if (p_tun->ip_gre.b_mode_enabled)
524                 p_tun->ip_gre.b_update_mode = true;
525
526         p_tun->b_update_rx_cls = true;
527         p_tun->b_update_tx_cls = true;
528 }
529
530 static void
531 __ecore_vf_update_tunn_param(struct ecore_tunn_update_type *p_tun,
532                              u16 feature_mask, u8 tunn_mode, u8 tunn_cls,
533                              enum ecore_tunn_mode val)
534 {
535         if (feature_mask & (1 << val)) {
536                 p_tun->b_mode_enabled = tunn_mode;
537                 p_tun->tun_cls = tunn_cls;
538         } else {
539                 p_tun->b_mode_enabled = false;
540         }
541 }
542
543 static void
544 ecore_vf_update_tunn_param(struct ecore_hwfn *p_hwfn,
545                            struct ecore_tunnel_info *p_tun,
546                            struct pfvf_update_tunn_param_tlv *p_resp)
547 {
548         /* Update mode and classes provided by PF */
549         u16 feat_mask = p_resp->tunn_feature_mask;
550
551         __ecore_vf_update_tunn_param(&p_tun->vxlan, feat_mask,
552                                      p_resp->vxlan_mode, p_resp->vxlan_clss,
553                                      ECORE_MODE_VXLAN_TUNN);
554         __ecore_vf_update_tunn_param(&p_tun->l2_geneve, feat_mask,
555                                      p_resp->l2geneve_mode,
556                                      p_resp->l2geneve_clss,
557                                      ECORE_MODE_L2GENEVE_TUNN);
558         __ecore_vf_update_tunn_param(&p_tun->ip_geneve, feat_mask,
559                                      p_resp->ipgeneve_mode,
560                                      p_resp->ipgeneve_clss,
561                                      ECORE_MODE_IPGENEVE_TUNN);
562         __ecore_vf_update_tunn_param(&p_tun->l2_gre, feat_mask,
563                                      p_resp->l2gre_mode, p_resp->l2gre_clss,
564                                      ECORE_MODE_L2GRE_TUNN);
565         __ecore_vf_update_tunn_param(&p_tun->ip_gre, feat_mask,
566                                      p_resp->ipgre_mode, p_resp->ipgre_clss,
567                                      ECORE_MODE_IPGRE_TUNN);
568         p_tun->geneve_port.port = p_resp->geneve_udp_port;
569         p_tun->vxlan_port.port = p_resp->vxlan_udp_port;
570
571         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
572                    "tunn mode: vxlan=0x%x, l2geneve=0x%x, ipgeneve=0x%x, l2gre=0x%x, ipgre=0x%x",
573                    p_tun->vxlan.b_mode_enabled, p_tun->l2_geneve.b_mode_enabled,
574                    p_tun->ip_geneve.b_mode_enabled,
575                    p_tun->l2_gre.b_mode_enabled,
576                    p_tun->ip_gre.b_mode_enabled);
577 }
578
579 enum _ecore_status_t
580 ecore_vf_pf_tunnel_param_update(struct ecore_hwfn *p_hwfn,
581                                 struct ecore_tunnel_info *p_src)
582 {
583         struct ecore_tunnel_info *p_tun = &p_hwfn->p_dev->tunnel;
584         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
585         struct pfvf_update_tunn_param_tlv *p_resp;
586         struct vfpf_update_tunn_param_tlv *p_req;
587         enum _ecore_status_t rc;
588
589         p_req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_TUNN_PARAM,
590                                  sizeof(*p_req));
591
592         if (p_src->b_update_rx_cls && p_src->b_update_tx_cls)
593                 p_req->update_tun_cls = 1;
594
595         ecore_vf_prep_tunn_req_tlv(p_req, &p_src->vxlan, ECORE_MODE_VXLAN_TUNN,
596                                    &p_req->vxlan_clss, &p_src->vxlan_port,
597                                    &p_req->update_vxlan_port,
598                                    &p_req->vxlan_port);
599         ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_geneve,
600                                    ECORE_MODE_L2GENEVE_TUNN,
601                                    &p_req->l2geneve_clss, &p_src->geneve_port,
602                                    &p_req->update_geneve_port,
603                                    &p_req->geneve_port);
604         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_geneve,
605                                      ECORE_MODE_IPGENEVE_TUNN,
606                                      &p_req->ipgeneve_clss);
607         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_gre,
608                                      ECORE_MODE_L2GRE_TUNN, &p_req->l2gre_clss);
609         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_gre,
610                                      ECORE_MODE_IPGRE_TUNN, &p_req->ipgre_clss);
611
612         /* add list termination tlv */
613         ecore_add_tlv(&p_iov->offset,
614                       CHANNEL_TLV_LIST_END,
615                       sizeof(struct channel_list_end_tlv));
616
617         p_resp = &p_iov->pf2vf_reply->tunn_param_resp;
618         rc = ecore_send_msg2pf(p_hwfn, &p_resp->hdr.status, sizeof(*p_resp));
619
620         if (rc)
621                 goto exit;
622
623         if (p_resp->hdr.status != PFVF_STATUS_SUCCESS) {
624                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
625                            "Failed to update tunnel parameters\n");
626                 rc = ECORE_INVAL;
627         }
628
629         ecore_vf_update_tunn_param(p_hwfn, p_tun, p_resp);
630 exit:
631         ecore_vf_pf_req_end(p_hwfn, rc);
632         return rc;
633 }
634
635 enum _ecore_status_t
636 ecore_vf_pf_rxq_start(struct ecore_hwfn *p_hwfn,
637                       struct ecore_queue_cid *p_cid,
638                       u16 bd_max_bytes,
639                       dma_addr_t bd_chain_phys_addr,
640                       dma_addr_t cqe_pbl_addr,
641                       u16 cqe_pbl_size,
642                       void OSAL_IOMEM **pp_prod)
643 {
644         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
645         struct pfvf_start_queue_resp_tlv *resp;
646         struct vfpf_start_rxq_tlv *req;
647         u16 rx_qid = p_cid->rel.queue_id;
648         enum _ecore_status_t rc;
649
650         /* clear mailbox and prep first tlv */
651         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_RXQ, sizeof(*req));
652
653         req->rx_qid = rx_qid;
654         req->cqe_pbl_addr = cqe_pbl_addr;
655         req->cqe_pbl_size = cqe_pbl_size;
656         req->rxq_addr = bd_chain_phys_addr;
657         req->hw_sb = p_cid->sb_igu_id;
658         req->sb_index = p_cid->sb_idx;
659         req->bd_max_bytes = bd_max_bytes;
660         req->stat_id = -1; /* Keep initialized, for future compatibility */
661
662         /* If PF is legacy, we'll need to calculate producers ourselves
663          * as well as clean them.
664          */
665         if (p_iov->b_pre_fp_hsi) {
666                 u8 hw_qid = p_iov->acquire_resp.resc.hw_qid[rx_qid];
667                 u32 init_prod_val = 0;
668
669                 *pp_prod = (u8 OSAL_IOMEM *)
670                            p_hwfn->regview +
671                            MSTORM_QZONE_START(p_hwfn->p_dev) +
672                            (hw_qid) * MSTORM_QZONE_SIZE;
673
674                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
675                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
676                                   (u32 *)(&init_prod_val));
677         }
678
679         ecore_vf_pf_add_qid(p_hwfn, p_cid);
680
681         /* add list termination tlv */
682         ecore_add_tlv(&p_iov->offset,
683                       CHANNEL_TLV_LIST_END,
684                       sizeof(struct channel_list_end_tlv));
685
686         resp = &p_iov->pf2vf_reply->queue_start;
687         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
688         if (rc)
689                 goto exit;
690
691         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
692                 rc = ECORE_INVAL;
693                 goto exit;
694         }
695
696         /* Learn the address of the producer from the response */
697         if (!p_iov->b_pre_fp_hsi) {
698                 u32 init_prod_val = 0;
699
700                 *pp_prod = (u8 OSAL_IOMEM *)p_hwfn->regview + resp->offset;
701                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
702                            "Rxq[0x%02x]: producer at %p [offset 0x%08x]\n",
703                            rx_qid, *pp_prod, resp->offset);
704
705                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0.
706                  * It was actually the PF's responsibility, but since some
707                  * old PFs might fail to do so, we do this as well.
708                  */
709                 OSAL_BUILD_BUG_ON(ETH_HSI_VER_MAJOR != 3);
710                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
711                                   (u32 *)&init_prod_val);
712         }
713
714 exit:
715         ecore_vf_pf_req_end(p_hwfn, rc);
716
717         return rc;
718 }
719
720 enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn *p_hwfn,
721                                           struct ecore_queue_cid *p_cid,
722                                           bool cqe_completion)
723 {
724         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
725         struct vfpf_stop_rxqs_tlv *req;
726         struct pfvf_def_resp_tlv *resp;
727         enum _ecore_status_t rc;
728
729         /* clear mailbox and prep first tlv */
730         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_RXQS, sizeof(*req));
731
732         req->rx_qid = p_cid->rel.queue_id;
733         req->num_rxqs = 1;
734         req->cqe_completion = cqe_completion;
735
736         ecore_vf_pf_add_qid(p_hwfn, p_cid);
737
738         /* add list termination tlv */
739         ecore_add_tlv(&p_iov->offset,
740                       CHANNEL_TLV_LIST_END,
741                       sizeof(struct channel_list_end_tlv));
742
743         resp = &p_iov->pf2vf_reply->default_resp;
744         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
745         if (rc)
746                 goto exit;
747
748         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
749                 rc = ECORE_INVAL;
750                 goto exit;
751         }
752
753 exit:
754         ecore_vf_pf_req_end(p_hwfn, rc);
755
756         return rc;
757 }
758
759 enum _ecore_status_t
760 ecore_vf_pf_txq_start(struct ecore_hwfn *p_hwfn,
761                       struct ecore_queue_cid *p_cid,
762                       dma_addr_t pbl_addr, u16 pbl_size,
763                       void OSAL_IOMEM **pp_doorbell)
764 {
765         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
766         struct pfvf_start_queue_resp_tlv *resp;
767         struct vfpf_start_txq_tlv *req;
768         u16 qid = p_cid->rel.queue_id;
769         enum _ecore_status_t rc;
770
771         /* clear mailbox and prep first tlv */
772         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_TXQ, sizeof(*req));
773
774         req->tx_qid = qid;
775
776         /* Tx */
777         req->pbl_addr = pbl_addr;
778         req->pbl_size = pbl_size;
779         req->hw_sb = p_cid->sb_igu_id;
780         req->sb_index = p_cid->sb_idx;
781
782         ecore_vf_pf_add_qid(p_hwfn, p_cid);
783
784         /* add list termination tlv */
785         ecore_add_tlv(&p_iov->offset,
786                       CHANNEL_TLV_LIST_END,
787                       sizeof(struct channel_list_end_tlv));
788
789         resp  = &p_iov->pf2vf_reply->queue_start;
790         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
791         if (rc)
792                 goto exit;
793
794         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
795                 rc = ECORE_INVAL;
796                 goto exit;
797         }
798
799         /* Modern PFs provide the actual offsets, while legacy
800          * provided only the queue id.
801          */
802         if (!p_iov->b_pre_fp_hsi) {
803                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
804                                                 resp->offset;
805         } else {
806                 u8 cid = p_iov->acquire_resp.resc.cid[qid];
807
808                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
809                                                 DB_ADDR_VF(cid, DQ_DEMS_LEGACY);
810         }
811
812         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
813                    "Txq[0x%02x]: doorbell at %p [offset 0x%08x]\n",
814                    qid, *pp_doorbell, resp->offset);
815 exit:
816         ecore_vf_pf_req_end(p_hwfn, rc);
817
818         return rc;
819 }
820
821 enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn *p_hwfn,
822                                           struct ecore_queue_cid *p_cid)
823 {
824         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
825         struct vfpf_stop_txqs_tlv *req;
826         struct pfvf_def_resp_tlv *resp;
827         enum _ecore_status_t rc;
828
829         /* clear mailbox and prep first tlv */
830         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_TXQS, sizeof(*req));
831
832         req->tx_qid = p_cid->rel.queue_id;
833         req->num_txqs = 1;
834
835         ecore_vf_pf_add_qid(p_hwfn, p_cid);
836
837         /* add list termination tlv */
838         ecore_add_tlv(&p_iov->offset,
839                       CHANNEL_TLV_LIST_END,
840                       sizeof(struct channel_list_end_tlv));
841
842         resp = &p_iov->pf2vf_reply->default_resp;
843         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
844         if (rc)
845                 goto exit;
846
847         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
848                 rc = ECORE_INVAL;
849                 goto exit;
850         }
851
852 exit:
853         ecore_vf_pf_req_end(p_hwfn, rc);
854
855         return rc;
856 }
857
858 enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn,
859                                              struct ecore_queue_cid **pp_cid,
860                                              u8 num_rxqs,
861                                              u8 comp_cqe_flg,
862                                              u8 comp_event_flg)
863 {
864         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
865         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
866         struct vfpf_update_rxq_tlv *req;
867         enum _ecore_status_t rc;
868
869         /* Starting with CHANNEL_TLV_QID and the need for additional queue
870          * information, this API stopped supporting multiple rxqs.
871          * TODO - remove this and change the API to accept a single queue-cid
872          * in a follow-up patch.
873          */
874         if (num_rxqs != 1) {
875                 DP_NOTICE(p_hwfn, true,
876                           "VFs can no longer update more than a single queue\n");
877                 return ECORE_INVAL;
878         }
879
880         /* clear mailbox and prep first tlv */
881         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_RXQ, sizeof(*req));
882
883         req->rx_qid = (*pp_cid)->rel.queue_id;
884         req->num_rxqs = 1;
885
886         if (comp_cqe_flg)
887                 req->flags |= VFPF_RXQ_UPD_COMPLETE_CQE_FLAG;
888         if (comp_event_flg)
889                 req->flags |= VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG;
890
891         ecore_vf_pf_add_qid(p_hwfn, *pp_cid);
892
893         /* add list termination tlv */
894         ecore_add_tlv(&p_iov->offset,
895                       CHANNEL_TLV_LIST_END,
896                       sizeof(struct channel_list_end_tlv));
897
898         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
899         if (rc)
900                 goto exit;
901
902         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
903                 rc = ECORE_INVAL;
904                 goto exit;
905         }
906
907 exit:
908         ecore_vf_pf_req_end(p_hwfn, rc);
909         return rc;
910 }
911
912 enum _ecore_status_t
913 ecore_vf_pf_vport_start(struct ecore_hwfn *p_hwfn, u8 vport_id,
914                         u16 mtu, u8 inner_vlan_removal,
915                         enum ecore_tpa_mode tpa_mode, u8 max_buffers_per_cqe,
916                         u8 only_untagged)
917 {
918         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
919         struct vfpf_vport_start_tlv *req;
920         struct pfvf_def_resp_tlv *resp;
921         enum _ecore_status_t rc;
922         int i;
923
924         /* clear mailbox and prep first tlv */
925         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_START, sizeof(*req));
926
927         req->mtu = mtu;
928         req->vport_id = vport_id;
929         req->inner_vlan_removal = inner_vlan_removal;
930         req->tpa_mode = tpa_mode;
931         req->max_buffers_per_cqe = max_buffers_per_cqe;
932         req->only_untagged = only_untagged;
933
934         /* status blocks */
935         for (i = 0; i < p_hwfn->vf_iov_info->acquire_resp.resc.num_sbs; i++) {
936                 struct ecore_sb_info *p_sb = p_hwfn->vf_iov_info->sbs_info[i];
937
938                 if (p_sb)
939                         req->sb_addr[i] = p_sb->sb_phys;
940         }
941
942         /* add list termination tlv */
943         ecore_add_tlv(&p_iov->offset,
944                       CHANNEL_TLV_LIST_END,
945                       sizeof(struct channel_list_end_tlv));
946
947         resp  = &p_iov->pf2vf_reply->default_resp;
948         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
949         if (rc)
950                 goto exit;
951
952         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
953                 rc = ECORE_INVAL;
954                 goto exit;
955         }
956
957 exit:
958         ecore_vf_pf_req_end(p_hwfn, rc);
959
960         return rc;
961 }
962
963 enum _ecore_status_t ecore_vf_pf_vport_stop(struct ecore_hwfn *p_hwfn)
964 {
965         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
966         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
967         enum _ecore_status_t rc;
968
969         /* clear mailbox and prep first tlv */
970         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_TEARDOWN,
971                          sizeof(struct vfpf_first_tlv));
972
973         /* add list termination tlv */
974         ecore_add_tlv(&p_iov->offset,
975                       CHANNEL_TLV_LIST_END,
976                       sizeof(struct channel_list_end_tlv));
977
978         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
979         if (rc)
980                 goto exit;
981
982         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
983                 rc = ECORE_INVAL;
984                 goto exit;
985         }
986
987 exit:
988         ecore_vf_pf_req_end(p_hwfn, rc);
989
990         return rc;
991 }
992
993 static bool
994 ecore_vf_handle_vp_update_is_needed(struct ecore_hwfn *p_hwfn,
995                                     struct ecore_sp_vport_update_params *p_data,
996                                     u16 tlv)
997 {
998         switch (tlv) {
999         case CHANNEL_TLV_VPORT_UPDATE_ACTIVATE:
1000                 return !!(p_data->update_vport_active_rx_flg ||
1001                           p_data->update_vport_active_tx_flg);
1002         case CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH:
1003 #ifndef ASIC_ONLY
1004                 /* FPGA doesn't have PVFC and so can't support tx-switching */
1005                 return !!(p_data->update_tx_switching_flg &&
1006                           !CHIP_REV_IS_FPGA(p_hwfn->p_dev));
1007 #else
1008                 return !!p_data->update_tx_switching_flg;
1009 #endif
1010         case CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP:
1011                 return !!p_data->update_inner_vlan_removal_flg;
1012         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN:
1013                 return !!p_data->update_accept_any_vlan_flg;
1014         case CHANNEL_TLV_VPORT_UPDATE_MCAST:
1015                 return !!p_data->update_approx_mcast_flg;
1016         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM:
1017                 return !!(p_data->accept_flags.update_rx_mode_config ||
1018                           p_data->accept_flags.update_tx_mode_config);
1019         case CHANNEL_TLV_VPORT_UPDATE_RSS:
1020                 return !!p_data->rss_params;
1021         case CHANNEL_TLV_VPORT_UPDATE_SGE_TPA:
1022                 return !!p_data->sge_tpa_params;
1023         default:
1024                 DP_INFO(p_hwfn, "Unexpected vport-update TLV[%d] %s\n",
1025                         tlv, ecore_channel_tlvs_string[tlv]);
1026                 return false;
1027         }
1028 }
1029
1030 static void
1031 ecore_vf_handle_vp_update_tlvs_resp(struct ecore_hwfn *p_hwfn,
1032                                     struct ecore_sp_vport_update_params *p_data)
1033 {
1034         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1035         struct pfvf_def_resp_tlv *p_resp;
1036         u16 tlv;
1037
1038         for (tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
1039              tlv < CHANNEL_TLV_VPORT_UPDATE_MAX;
1040              tlv++) {
1041                 if (!ecore_vf_handle_vp_update_is_needed(p_hwfn, p_data, tlv))
1042                         continue;
1043
1044                 p_resp = (struct pfvf_def_resp_tlv *)
1045                     ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
1046                 if (p_resp && p_resp->hdr.status)
1047                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1048                                    "TLV[%d] type %s Configuration %s\n",
1049                                    tlv, ecore_channel_tlvs_string[tlv],
1050                                    (p_resp && p_resp->hdr.status) ? "succeeded"
1051                                                                   : "failed");
1052         }
1053 }
1054
1055 enum _ecore_status_t
1056 ecore_vf_pf_vport_update(struct ecore_hwfn *p_hwfn,
1057                          struct ecore_sp_vport_update_params *p_params)
1058 {
1059         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1060         struct vfpf_vport_update_tlv *req;
1061         struct pfvf_def_resp_tlv *resp;
1062         u8 update_rx, update_tx;
1063         u32 resp_size = 0;
1064         u16 size, tlv;
1065         enum _ecore_status_t rc;
1066
1067         resp = &p_iov->pf2vf_reply->default_resp;
1068         resp_size = sizeof(*resp);
1069
1070         update_rx = p_params->update_vport_active_rx_flg;
1071         update_tx = p_params->update_vport_active_tx_flg;
1072
1073         /* clear mailbox and prep header tlv */
1074         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_UPDATE, sizeof(*req));
1075
1076         /* Prepare extended tlvs */
1077         if (update_rx || update_tx) {
1078                 struct vfpf_vport_update_activate_tlv *p_act_tlv;
1079
1080                 size = sizeof(struct vfpf_vport_update_activate_tlv);
1081                 p_act_tlv = ecore_add_tlv(&p_iov->offset,
1082                                           CHANNEL_TLV_VPORT_UPDATE_ACTIVATE,
1083                                           size);
1084                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1085
1086                 if (update_rx) {
1087                         p_act_tlv->update_rx = update_rx;
1088                         p_act_tlv->active_rx = p_params->vport_active_rx_flg;
1089                 }
1090
1091                 if (update_tx) {
1092                         p_act_tlv->update_tx = update_tx;
1093                         p_act_tlv->active_tx = p_params->vport_active_tx_flg;
1094                 }
1095         }
1096
1097         if (p_params->update_inner_vlan_removal_flg) {
1098                 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
1099
1100                 size = sizeof(struct vfpf_vport_update_vlan_strip_tlv);
1101                 p_vlan_tlv = ecore_add_tlv(&p_iov->offset,
1102                                            CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP,
1103                                            size);
1104                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1105
1106                 p_vlan_tlv->remove_vlan = p_params->inner_vlan_removal_flg;
1107         }
1108
1109         if (p_params->update_tx_switching_flg) {
1110                 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
1111
1112                 size = sizeof(struct vfpf_vport_update_tx_switch_tlv);
1113                 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
1114                 p_tx_switch_tlv = ecore_add_tlv(&p_iov->offset,
1115                                                 tlv, size);
1116                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1117
1118                 p_tx_switch_tlv->tx_switching = p_params->tx_switching_flg;
1119         }
1120
1121         if (p_params->update_approx_mcast_flg) {
1122                 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
1123
1124                 size = sizeof(struct vfpf_vport_update_mcast_bin_tlv);
1125                 p_mcast_tlv = ecore_add_tlv(&p_iov->offset,
1126                                             CHANNEL_TLV_VPORT_UPDATE_MCAST,
1127                                             size);
1128                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1129
1130                 OSAL_MEMCPY(p_mcast_tlv->bins, p_params->bins,
1131                             sizeof(unsigned long) *
1132                             ETH_MULTICAST_MAC_BINS_IN_REGS);
1133         }
1134
1135         update_rx = p_params->accept_flags.update_rx_mode_config;
1136         update_tx = p_params->accept_flags.update_tx_mode_config;
1137
1138         if (update_rx || update_tx) {
1139                 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
1140
1141                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1142                 size = sizeof(struct vfpf_vport_update_accept_param_tlv);
1143                 p_accept_tlv = ecore_add_tlv(&p_iov->offset, tlv, size);
1144                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1145
1146                 if (update_rx) {
1147                         p_accept_tlv->update_rx_mode = update_rx;
1148                         p_accept_tlv->rx_accept_filter =
1149                             p_params->accept_flags.rx_accept_filter;
1150                 }
1151
1152                 if (update_tx) {
1153                         p_accept_tlv->update_tx_mode = update_tx;
1154                         p_accept_tlv->tx_accept_filter =
1155                             p_params->accept_flags.tx_accept_filter;
1156                 }
1157         }
1158
1159         if (p_params->rss_params) {
1160                 struct ecore_rss_params *rss_params = p_params->rss_params;
1161                 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
1162                 int i, table_size;
1163
1164                 size = sizeof(struct vfpf_vport_update_rss_tlv);
1165                 p_rss_tlv = ecore_add_tlv(&p_iov->offset,
1166                                           CHANNEL_TLV_VPORT_UPDATE_RSS, size);
1167                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1168
1169                 if (rss_params->update_rss_config)
1170                         p_rss_tlv->update_rss_flags |=
1171                             VFPF_UPDATE_RSS_CONFIG_FLAG;
1172                 if (rss_params->update_rss_capabilities)
1173                         p_rss_tlv->update_rss_flags |=
1174                             VFPF_UPDATE_RSS_CAPS_FLAG;
1175                 if (rss_params->update_rss_ind_table)
1176                         p_rss_tlv->update_rss_flags |=
1177                             VFPF_UPDATE_RSS_IND_TABLE_FLAG;
1178                 if (rss_params->update_rss_key)
1179                         p_rss_tlv->update_rss_flags |= VFPF_UPDATE_RSS_KEY_FLAG;
1180
1181                 p_rss_tlv->rss_enable = rss_params->rss_enable;
1182                 p_rss_tlv->rss_caps = rss_params->rss_caps;
1183                 p_rss_tlv->rss_table_size_log = rss_params->rss_table_size_log;
1184
1185                 table_size = OSAL_MIN_T(int, T_ETH_INDIRECTION_TABLE_SIZE,
1186                                         1 << p_rss_tlv->rss_table_size_log);
1187                 for (i = 0; i < table_size; i++) {
1188                         struct ecore_queue_cid *p_queue;
1189
1190                         p_queue = rss_params->rss_ind_table[i];
1191                         p_rss_tlv->rss_ind_table[i] = p_queue->rel.queue_id;
1192                 }
1193
1194                 OSAL_MEMCPY(p_rss_tlv->rss_key, rss_params->rss_key,
1195                             sizeof(rss_params->rss_key));
1196         }
1197
1198         if (p_params->update_accept_any_vlan_flg) {
1199                 struct vfpf_vport_update_accept_any_vlan_tlv *p_any_vlan_tlv;
1200
1201                 size = sizeof(struct vfpf_vport_update_accept_any_vlan_tlv);
1202                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1203                 p_any_vlan_tlv = ecore_add_tlv(&p_iov->offset, tlv, size);
1204
1205                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1206                 p_any_vlan_tlv->accept_any_vlan = p_params->accept_any_vlan;
1207                 p_any_vlan_tlv->update_accept_any_vlan_flg =
1208                     p_params->update_accept_any_vlan_flg;
1209         }
1210
1211         if (p_params->sge_tpa_params) {
1212                 struct ecore_sge_tpa_params *sge_tpa_params;
1213                 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
1214
1215                 sge_tpa_params = p_params->sge_tpa_params;
1216                 size = sizeof(struct vfpf_vport_update_sge_tpa_tlv);
1217                 p_sge_tpa_tlv = ecore_add_tlv(&p_iov->offset,
1218                                               CHANNEL_TLV_VPORT_UPDATE_SGE_TPA,
1219                                               size);
1220                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1221
1222                 if (sge_tpa_params->update_tpa_en_flg)
1223                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1224                             VFPF_UPDATE_TPA_EN_FLAG;
1225                 if (sge_tpa_params->update_tpa_param_flg)
1226                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1227                             VFPF_UPDATE_TPA_PARAM_FLAG;
1228
1229                 if (sge_tpa_params->tpa_ipv4_en_flg)
1230                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV4_EN_FLAG;
1231                 if (sge_tpa_params->tpa_ipv6_en_flg)
1232                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV6_EN_FLAG;
1233                 if (sge_tpa_params->tpa_pkt_split_flg)
1234                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_PKT_SPLIT_FLAG;
1235                 if (sge_tpa_params->tpa_hdr_data_split_flg)
1236                         p_sge_tpa_tlv->sge_tpa_flags |=
1237                             VFPF_TPA_HDR_DATA_SPLIT_FLAG;
1238                 if (sge_tpa_params->tpa_gro_consistent_flg)
1239                         p_sge_tpa_tlv->sge_tpa_flags |=
1240                             VFPF_TPA_GRO_CONSIST_FLAG;
1241
1242                 p_sge_tpa_tlv->tpa_max_aggs_num =
1243                     sge_tpa_params->tpa_max_aggs_num;
1244                 p_sge_tpa_tlv->tpa_max_size = sge_tpa_params->tpa_max_size;
1245                 p_sge_tpa_tlv->tpa_min_size_to_start =
1246                     sge_tpa_params->tpa_min_size_to_start;
1247                 p_sge_tpa_tlv->tpa_min_size_to_cont =
1248                     sge_tpa_params->tpa_min_size_to_cont;
1249
1250                 p_sge_tpa_tlv->max_buffers_per_cqe =
1251                     sge_tpa_params->max_buffers_per_cqe;
1252         }
1253
1254         /* add list termination tlv */
1255         ecore_add_tlv(&p_iov->offset,
1256                       CHANNEL_TLV_LIST_END,
1257                       sizeof(struct channel_list_end_tlv));
1258
1259         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, resp_size);
1260         if (rc)
1261                 goto exit;
1262
1263         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1264                 rc = ECORE_INVAL;
1265                 goto exit;
1266         }
1267
1268         ecore_vf_handle_vp_update_tlvs_resp(p_hwfn, p_params);
1269
1270 exit:
1271         ecore_vf_pf_req_end(p_hwfn, rc);
1272
1273         return rc;
1274 }
1275
1276 enum _ecore_status_t ecore_vf_pf_reset(struct ecore_hwfn *p_hwfn)
1277 {
1278         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1279         struct pfvf_def_resp_tlv *resp;
1280         struct vfpf_first_tlv *req;
1281         enum _ecore_status_t rc;
1282
1283         /* clear mailbox and prep first tlv */
1284         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_CLOSE, sizeof(*req));
1285
1286         /* add list termination tlv */
1287         ecore_add_tlv(&p_iov->offset,
1288                       CHANNEL_TLV_LIST_END,
1289                       sizeof(struct channel_list_end_tlv));
1290
1291         resp = &p_iov->pf2vf_reply->default_resp;
1292         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1293         if (rc)
1294                 goto exit;
1295
1296         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1297                 rc = ECORE_AGAIN;
1298                 goto exit;
1299         }
1300
1301         p_hwfn->b_int_enabled = 0;
1302
1303 exit:
1304         ecore_vf_pf_req_end(p_hwfn, rc);
1305
1306         return rc;
1307 }
1308
1309 enum _ecore_status_t ecore_vf_pf_release(struct ecore_hwfn *p_hwfn)
1310 {
1311         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1312         struct pfvf_def_resp_tlv *resp;
1313         struct vfpf_first_tlv *req;
1314         u32 size;
1315         enum _ecore_status_t rc;
1316
1317         /* clear mailbox and prep first tlv */
1318         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_RELEASE, sizeof(*req));
1319
1320         /* add list termination tlv */
1321         ecore_add_tlv(&p_iov->offset,
1322                       CHANNEL_TLV_LIST_END,
1323                       sizeof(struct channel_list_end_tlv));
1324
1325         resp = &p_iov->pf2vf_reply->default_resp;
1326         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1327
1328         if (rc == ECORE_SUCCESS && resp->hdr.status != PFVF_STATUS_SUCCESS)
1329                 rc = ECORE_AGAIN;
1330
1331         ecore_vf_pf_req_end(p_hwfn, rc);
1332
1333         p_hwfn->b_int_enabled = 0;
1334
1335         if (p_iov->vf2pf_request)
1336                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
1337                                        p_iov->vf2pf_request,
1338                                        p_iov->vf2pf_request_phys,
1339                                        sizeof(union vfpf_tlvs));
1340         if (p_iov->pf2vf_reply)
1341                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
1342                                        p_iov->pf2vf_reply,
1343                                        p_iov->pf2vf_reply_phys,
1344                                        sizeof(union pfvf_tlvs));
1345
1346         if (p_iov->bulletin.p_virt) {
1347                 size = sizeof(struct ecore_bulletin_content);
1348                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
1349                                        p_iov->bulletin.p_virt,
1350                                        p_iov->bulletin.phys, size);
1351         }
1352
1353 #ifdef CONFIG_ECORE_LOCK_ALLOC
1354         OSAL_MUTEX_DEALLOC(&p_iov->mutex);
1355 #endif
1356
1357         OSAL_FREE(p_hwfn->p_dev, p_hwfn->vf_iov_info);
1358
1359         return rc;
1360 }
1361
1362 void ecore_vf_pf_filter_mcast(struct ecore_hwfn *p_hwfn,
1363                               struct ecore_filter_mcast *p_filter_cmd)
1364 {
1365         struct ecore_sp_vport_update_params sp_params;
1366         int i;
1367
1368         OSAL_MEMSET(&sp_params, 0, sizeof(sp_params));
1369         sp_params.update_approx_mcast_flg = 1;
1370
1371         if (p_filter_cmd->opcode == ECORE_FILTER_ADD) {
1372                 for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
1373                         u32 bit;
1374
1375                         bit = ecore_mcast_bin_from_mac(p_filter_cmd->mac[i]);
1376                         OSAL_SET_BIT(bit, sp_params.bins);
1377                 }
1378         }
1379
1380         ecore_vf_pf_vport_update(p_hwfn, &sp_params);
1381 }
1382
1383 enum _ecore_status_t ecore_vf_pf_filter_ucast(struct ecore_hwfn *p_hwfn,
1384                                               struct ecore_filter_ucast
1385                                               *p_ucast)
1386 {
1387         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1388         struct vfpf_ucast_filter_tlv *req;
1389         struct pfvf_def_resp_tlv *resp;
1390         enum _ecore_status_t rc;
1391
1392         /* Sanitize */
1393         if (p_ucast->opcode == ECORE_FILTER_MOVE) {
1394                 DP_NOTICE(p_hwfn, true,
1395                           "VFs don't support Moving of filters\n");
1396                 return ECORE_INVAL;
1397         }
1398
1399         /* clear mailbox and prep first tlv */
1400         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UCAST_FILTER, sizeof(*req));
1401         req->opcode = (u8)p_ucast->opcode;
1402         req->type = (u8)p_ucast->type;
1403         OSAL_MEMCPY(req->mac, p_ucast->mac, ETH_ALEN);
1404         req->vlan = p_ucast->vlan;
1405
1406         /* add list termination tlv */
1407         ecore_add_tlv(&p_iov->offset,
1408                       CHANNEL_TLV_LIST_END,
1409                       sizeof(struct channel_list_end_tlv));
1410
1411         resp = &p_iov->pf2vf_reply->default_resp;
1412         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1413         if (rc)
1414                 goto exit;
1415
1416         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1417                 rc = ECORE_AGAIN;
1418                 goto exit;
1419         }
1420
1421 exit:
1422         ecore_vf_pf_req_end(p_hwfn, rc);
1423
1424         return rc;
1425 }
1426
1427 enum _ecore_status_t ecore_vf_pf_int_cleanup(struct ecore_hwfn *p_hwfn)
1428 {
1429         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1430         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1431         enum _ecore_status_t rc;
1432
1433         /* clear mailbox and prep first tlv */
1434         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_INT_CLEANUP,
1435                          sizeof(struct vfpf_first_tlv));
1436
1437         /* add list termination tlv */
1438         ecore_add_tlv(&p_iov->offset,
1439                       CHANNEL_TLV_LIST_END,
1440                       sizeof(struct channel_list_end_tlv));
1441
1442         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1443         if (rc)
1444                 goto exit;
1445
1446         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1447                 rc = ECORE_INVAL;
1448                 goto exit;
1449         }
1450
1451 exit:
1452         ecore_vf_pf_req_end(p_hwfn, rc);
1453
1454         return rc;
1455 }
1456
1457 enum _ecore_status_t
1458 ecore_vf_pf_set_coalesce(struct ecore_hwfn *p_hwfn, u16 rx_coal, u16 tx_coal,
1459                          struct ecore_queue_cid     *p_cid)
1460 {
1461         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1462         struct vfpf_update_coalesce *req;
1463         struct pfvf_def_resp_tlv *resp;
1464         enum _ecore_status_t rc;
1465
1466         /* clear mailbox and prep header tlv */
1467         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_UPDATE,
1468                                sizeof(*req));
1469
1470         req->rx_coal = rx_coal;
1471         req->tx_coal = tx_coal;
1472         req->qid = p_cid->rel.queue_id;
1473
1474         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1475                    "Setting coalesce rx_coal = %d, tx_coal = %d at queue = %d\n",
1476                    rx_coal, tx_coal, req->qid);
1477
1478         /* add list termination tlv */
1479         ecore_add_tlv(&p_iov->offset, CHANNEL_TLV_LIST_END,
1480                       sizeof(struct channel_list_end_tlv));
1481
1482         resp = &p_iov->pf2vf_reply->default_resp;
1483         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1484
1485         if (rc != ECORE_SUCCESS)
1486                 goto exit;
1487
1488         if (resp->hdr.status != PFVF_STATUS_SUCCESS)
1489                 goto exit;
1490
1491         p_hwfn->p_dev->rx_coalesce_usecs = rx_coal;
1492         p_hwfn->p_dev->tx_coalesce_usecs = tx_coal;
1493
1494 exit:
1495         ecore_vf_pf_req_end(p_hwfn, rc);
1496         return rc;
1497 }
1498
1499 u16 ecore_vf_get_igu_sb_id(struct ecore_hwfn *p_hwfn,
1500                            u16               sb_id)
1501 {
1502         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1503
1504         if (!p_iov) {
1505                 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
1506                 return 0;
1507         }
1508
1509         return p_iov->acquire_resp.resc.hw_sbs[sb_id].hw_sb_id;
1510 }
1511
1512 void ecore_vf_set_sb_info(struct ecore_hwfn *p_hwfn,
1513                           u16 sb_id, struct ecore_sb_info *p_sb)
1514 {
1515         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1516
1517         if (!p_iov) {
1518                 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
1519                 return;
1520         }
1521
1522         if (sb_id >= PFVF_MAX_SBS_PER_VF) {
1523                 DP_NOTICE(p_hwfn, true, "Can't configure SB %04x\n", sb_id);
1524                 return;
1525         }
1526
1527         p_iov->sbs_info[sb_id] = p_sb;
1528 }
1529
1530 enum _ecore_status_t ecore_vf_read_bulletin(struct ecore_hwfn *p_hwfn,
1531                                             u8 *p_change)
1532 {
1533         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1534         struct ecore_bulletin_content shadow;
1535         u32 crc, crc_size;
1536
1537         crc_size = sizeof(p_iov->bulletin.p_virt->crc);
1538         *p_change = 0;
1539
1540         /* Need to guarantee PF is not in the middle of writing it */
1541         OSAL_MEMCPY(&shadow, p_iov->bulletin.p_virt, p_iov->bulletin.size);
1542
1543         /* If version did not update, no need to do anything */
1544         if (shadow.version == p_iov->bulletin_shadow.version)
1545                 return ECORE_SUCCESS;
1546
1547         /* Verify the bulletin we see is valid */
1548         crc = OSAL_CRC32(0, (u8 *)&shadow + crc_size,
1549                          p_iov->bulletin.size - crc_size);
1550         if (crc != shadow.crc)
1551                 return ECORE_AGAIN;
1552
1553         /* Set the shadow bulletin and process it */
1554         OSAL_MEMCPY(&p_iov->bulletin_shadow, &shadow, p_iov->bulletin.size);
1555
1556         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1557                    "Read a bulletin update %08x\n", shadow.version);
1558
1559         *p_change = 1;
1560
1561         return ECORE_SUCCESS;
1562 }
1563
1564 void __ecore_vf_get_link_params(struct ecore_mcp_link_params *p_params,
1565                                 struct ecore_bulletin_content *p_bulletin)
1566 {
1567         OSAL_MEMSET(p_params, 0, sizeof(*p_params));
1568
1569         p_params->speed.autoneg = p_bulletin->req_autoneg;
1570         p_params->speed.advertised_speeds = p_bulletin->req_adv_speed;
1571         p_params->speed.forced_speed = p_bulletin->req_forced_speed;
1572         p_params->pause.autoneg = p_bulletin->req_autoneg_pause;
1573         p_params->pause.forced_rx = p_bulletin->req_forced_rx;
1574         p_params->pause.forced_tx = p_bulletin->req_forced_tx;
1575         p_params->loopback_mode = p_bulletin->req_loopback;
1576 }
1577
1578 void ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
1579                               struct ecore_mcp_link_params *params)
1580 {
1581         __ecore_vf_get_link_params(params,
1582                                    &p_hwfn->vf_iov_info->bulletin_shadow);
1583 }
1584
1585 void __ecore_vf_get_link_state(struct ecore_mcp_link_state *p_link,
1586                                struct ecore_bulletin_content *p_bulletin)
1587 {
1588         OSAL_MEMSET(p_link, 0, sizeof(*p_link));
1589
1590         p_link->link_up = p_bulletin->link_up;
1591         p_link->speed = p_bulletin->speed;
1592         p_link->full_duplex = p_bulletin->full_duplex;
1593         p_link->an = p_bulletin->autoneg;
1594         p_link->an_complete = p_bulletin->autoneg_complete;
1595         p_link->parallel_detection = p_bulletin->parallel_detection;
1596         p_link->pfc_enabled = p_bulletin->pfc_enabled;
1597         p_link->partner_adv_speed = p_bulletin->partner_adv_speed;
1598         p_link->partner_tx_flow_ctrl_en = p_bulletin->partner_tx_flow_ctrl_en;
1599         p_link->partner_rx_flow_ctrl_en = p_bulletin->partner_rx_flow_ctrl_en;
1600         p_link->partner_adv_pause = p_bulletin->partner_adv_pause;
1601         p_link->sfp_tx_fault = p_bulletin->sfp_tx_fault;
1602 }
1603
1604 void ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
1605                              struct ecore_mcp_link_state *link)
1606 {
1607         __ecore_vf_get_link_state(link,
1608                                   &p_hwfn->vf_iov_info->bulletin_shadow);
1609 }
1610
1611 void __ecore_vf_get_link_caps(struct ecore_mcp_link_capabilities *p_link_caps,
1612                               struct ecore_bulletin_content *p_bulletin)
1613 {
1614         OSAL_MEMSET(p_link_caps, 0, sizeof(*p_link_caps));
1615         p_link_caps->speed_capabilities = p_bulletin->capability_speed;
1616 }
1617
1618 void ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
1619                             struct ecore_mcp_link_capabilities *p_link_caps)
1620 {
1621         __ecore_vf_get_link_caps(p_link_caps,
1622                                  &p_hwfn->vf_iov_info->bulletin_shadow);
1623 }
1624
1625 void ecore_vf_get_num_rxqs(struct ecore_hwfn *p_hwfn, u8 *num_rxqs)
1626 {
1627         *num_rxqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_rxqs;
1628 }
1629
1630 void ecore_vf_get_num_txqs(struct ecore_hwfn *p_hwfn,
1631                            u8 *num_txqs)
1632 {
1633         *num_txqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_txqs;
1634 }
1635
1636 void ecore_vf_get_port_mac(struct ecore_hwfn *p_hwfn, u8 *port_mac)
1637 {
1638         OSAL_MEMCPY(port_mac,
1639                     p_hwfn->vf_iov_info->acquire_resp.pfdev_info.port_mac,
1640                     ETH_ALEN);
1641 }
1642
1643 void ecore_vf_get_num_vlan_filters(struct ecore_hwfn *p_hwfn,
1644                                    u8 *num_vlan_filters)
1645 {
1646         struct ecore_vf_iov *p_vf;
1647
1648         p_vf = p_hwfn->vf_iov_info;
1649         *num_vlan_filters = p_vf->acquire_resp.resc.num_vlan_filters;
1650 }
1651
1652 void ecore_vf_get_num_sbs(struct ecore_hwfn *p_hwfn,
1653                           u32 *num_sbs)
1654 {
1655         struct ecore_vf_iov *p_vf;
1656
1657         p_vf = p_hwfn->vf_iov_info;
1658         *num_sbs = (u32)p_vf->acquire_resp.resc.num_sbs;
1659 }
1660
1661 void ecore_vf_get_num_mac_filters(struct ecore_hwfn *p_hwfn,
1662                                   u32 *num_mac_filters)
1663 {
1664         struct ecore_vf_iov *p_vf = p_hwfn->vf_iov_info;
1665
1666         *num_mac_filters = p_vf->acquire_resp.resc.num_mac_filters;
1667 }
1668
1669 bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac)
1670 {
1671         struct ecore_bulletin_content *bulletin;
1672
1673         bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
1674         if (!(bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)))
1675                 return true;
1676
1677         /* Forbid VF from changing a MAC enforced by PF */
1678         if (OSAL_MEMCMP(bulletin->mac, mac, ETH_ALEN))
1679                 return false;
1680
1681         return false;
1682 }
1683
1684 bool ecore_vf_bulletin_get_forced_mac(struct ecore_hwfn *hwfn, u8 *dst_mac,
1685                                       u8 *p_is_forced)
1686 {
1687         struct ecore_bulletin_content *bulletin;
1688
1689         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1690
1691         if (bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
1692                 if (p_is_forced)
1693                         *p_is_forced = 1;
1694         } else if (bulletin->valid_bitmap & (1 << VFPF_BULLETIN_MAC_ADDR)) {
1695                 if (p_is_forced)
1696                         *p_is_forced = 0;
1697         } else {
1698                 return false;
1699         }
1700
1701         OSAL_MEMCPY(dst_mac, bulletin->mac, ETH_ALEN);
1702
1703         return true;
1704 }
1705
1706 void ecore_vf_bulletin_get_udp_ports(struct ecore_hwfn *p_hwfn,
1707                                      u16 *p_vxlan_port,
1708                                      u16 *p_geneve_port)
1709 {
1710         struct ecore_bulletin_content *p_bulletin;
1711
1712         p_bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
1713
1714         *p_vxlan_port = p_bulletin->vxlan_udp_port;
1715         *p_geneve_port = p_bulletin->geneve_udp_port;
1716 }
1717
1718 bool ecore_vf_bulletin_get_forced_vlan(struct ecore_hwfn *hwfn, u16 *dst_pvid)
1719 {
1720         struct ecore_bulletin_content *bulletin;
1721
1722         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1723
1724         if (!(bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
1725                 return false;
1726
1727         if (dst_pvid)
1728                 *dst_pvid = bulletin->pvid;
1729
1730         return true;
1731 }
1732
1733 bool ecore_vf_get_pre_fp_hsi(struct ecore_hwfn *p_hwfn)
1734 {
1735         return p_hwfn->vf_iov_info->b_pre_fp_hsi;
1736 }
1737
1738 void ecore_vf_get_fw_version(struct ecore_hwfn *p_hwfn,
1739                              u16 *fw_major, u16 *fw_minor, u16 *fw_rev,
1740                              u16 *fw_eng)
1741 {
1742         struct pf_vf_pfdev_info *info;
1743
1744         info = &p_hwfn->vf_iov_info->acquire_resp.pfdev_info;
1745
1746         *fw_major = info->fw_major;
1747         *fw_minor = info->fw_minor;
1748         *fw_rev = info->fw_rev;
1749         *fw_eng = info->fw_eng;
1750 }