drivers/net/qede/qede_ethdev.c

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9 #include "qede_ethdev.h"
  10 #include <rte_alarm.h>
  11
  12 /* Globals */
  13 static const struct qed_eth_ops *qed_ops;
  14 static const char *drivername = "qede pmd";
  15 static int64_t timer_period = 1;
  16
  17 struct rte_qede_xstats_name_off {
  18         char name[RTE_ETH_XSTATS_NAME_SIZE];
  19         uint64_t offset;
  20 };
  21
  22 static const struct rte_qede_xstats_name_off qede_xstats_strings[] = {
  23         {"rx_unicast_bytes", offsetof(struct ecore_eth_stats, rx_ucast_bytes)},
  24         {"rx_multicast_bytes",
  25                 offsetof(struct ecore_eth_stats, rx_mcast_bytes)},
  26         {"rx_broadcast_bytes",
  27                 offsetof(struct ecore_eth_stats, rx_bcast_bytes)},
  28         {"rx_unicast_packets", offsetof(struct ecore_eth_stats, rx_ucast_pkts)},
  29         {"rx_multicast_packets",
  30                 offsetof(struct ecore_eth_stats, rx_mcast_pkts)},
  31         {"rx_broadcast_packets",
  32                 offsetof(struct ecore_eth_stats, rx_bcast_pkts)},
  33
  34         {"tx_unicast_bytes", offsetof(struct ecore_eth_stats, tx_ucast_bytes)},
  35         {"tx_multicast_bytes",
  36                 offsetof(struct ecore_eth_stats, tx_mcast_bytes)},
  37         {"tx_broadcast_bytes",
  38                 offsetof(struct ecore_eth_stats, tx_bcast_bytes)},
  39         {"tx_unicast_packets", offsetof(struct ecore_eth_stats, tx_ucast_pkts)},
  40         {"tx_multicast_packets",
  41                 offsetof(struct ecore_eth_stats, tx_mcast_pkts)},
  42         {"tx_broadcast_packets",
  43                 offsetof(struct ecore_eth_stats, tx_bcast_pkts)},
  44
  45         {"rx_64_byte_packets",
  46                 offsetof(struct ecore_eth_stats, rx_64_byte_packets)},
  47         {"rx_65_to_127_byte_packets",
  48                 offsetof(struct ecore_eth_stats, rx_65_to_127_byte_packets)},
  49         {"rx_128_to_255_byte_packets",
  50                 offsetof(struct ecore_eth_stats, rx_128_to_255_byte_packets)},
  51         {"rx_256_to_511_byte_packets",
  52                 offsetof(struct ecore_eth_stats, rx_256_to_511_byte_packets)},
  53         {"rx_512_to_1023_byte_packets",
  54                 offsetof(struct ecore_eth_stats, rx_512_to_1023_byte_packets)},
  55         {"rx_1024_to_1518_byte_packets",
  56                 offsetof(struct ecore_eth_stats, rx_1024_to_1518_byte_packets)},
  57         {"rx_1519_to_1522_byte_packets",
  58                 offsetof(struct ecore_eth_stats, rx_1519_to_1522_byte_packets)},
  59         {"rx_1519_to_2047_byte_packets",
  60                 offsetof(struct ecore_eth_stats, rx_1519_to_2047_byte_packets)},
  61         {"rx_2048_to_4095_byte_packets",
  62                 offsetof(struct ecore_eth_stats, rx_2048_to_4095_byte_packets)},
  63         {"rx_4096_to_9216_byte_packets",
  64                 offsetof(struct ecore_eth_stats, rx_4096_to_9216_byte_packets)},
  65         {"rx_9217_to_16383_byte_packets",
  66                 offsetof(struct ecore_eth_stats,
  67                          rx_9217_to_16383_byte_packets)},
  68         {"tx_64_byte_packets",
  69                 offsetof(struct ecore_eth_stats, tx_64_byte_packets)},
  70         {"tx_65_to_127_byte_packets",
  71                 offsetof(struct ecore_eth_stats, tx_65_to_127_byte_packets)},
  72         {"tx_128_to_255_byte_packets",
  73                 offsetof(struct ecore_eth_stats, tx_128_to_255_byte_packets)},
  74         {"tx_256_to_511_byte_packets",
  75                 offsetof(struct ecore_eth_stats, tx_256_to_511_byte_packets)},
  76         {"tx_512_to_1023_byte_packets",
  77                 offsetof(struct ecore_eth_stats, tx_512_to_1023_byte_packets)},
  78         {"tx_1024_to_1518_byte_packets",
  79                 offsetof(struct ecore_eth_stats, tx_1024_to_1518_byte_packets)},
  80         {"trx_1519_to_1522_byte_packets",
  81                 offsetof(struct ecore_eth_stats, tx_1519_to_2047_byte_packets)},
  82         {"tx_2048_to_4095_byte_packets",
  83                 offsetof(struct ecore_eth_stats, tx_2048_to_4095_byte_packets)},
  84         {"tx_4096_to_9216_byte_packets",
  85                 offsetof(struct ecore_eth_stats, tx_4096_to_9216_byte_packets)},
  86         {"tx_9217_to_16383_byte_packets",
  87                 offsetof(struct ecore_eth_stats,
  88                          tx_9217_to_16383_byte_packets)},
  89
  90         {"rx_mac_crtl_frames",
  91                 offsetof(struct ecore_eth_stats, rx_mac_crtl_frames)},
  92         {"tx_mac_control_frames",
  93                 offsetof(struct ecore_eth_stats, tx_mac_ctrl_frames)},
  94         {"rx_pause_frames", offsetof(struct ecore_eth_stats, rx_pause_frames)},
  95         {"tx_pause_frames", offsetof(struct ecore_eth_stats, tx_pause_frames)},
  96         {"rx_priority_flow_control_frames",
  97                 offsetof(struct ecore_eth_stats, rx_pfc_frames)},
  98         {"tx_priority_flow_control_frames",
  99                 offsetof(struct ecore_eth_stats, tx_pfc_frames)},
 100
 101         {"rx_crc_errors", offsetof(struct ecore_eth_stats, rx_crc_errors)},
 102         {"rx_align_errors", offsetof(struct ecore_eth_stats, rx_align_errors)},
 103         {"rx_carrier_errors",
 104                 offsetof(struct ecore_eth_stats, rx_carrier_errors)},
 105         {"rx_oversize_packet_errors",
 106                 offsetof(struct ecore_eth_stats, rx_oversize_packets)},
 107         {"rx_jabber_errors", offsetof(struct ecore_eth_stats, rx_jabbers)},
 108         {"rx_undersize_packet_errors",
 109                 offsetof(struct ecore_eth_stats, rx_undersize_packets)},
 110         {"rx_fragments", offsetof(struct ecore_eth_stats, rx_fragments)},
 111         {"rx_host_buffer_not_available",
 112                 offsetof(struct ecore_eth_stats, no_buff_discards)},
 113         /* Number of packets discarded because they are bigger than MTU */
 114         {"rx_packet_too_big_discards",
 115                 offsetof(struct ecore_eth_stats, packet_too_big_discard)},
 116         {"rx_ttl_zero_discards",
 117                 offsetof(struct ecore_eth_stats, ttl0_discard)},
 118         {"rx_multi_function_tag_filter_discards",
 119                 offsetof(struct ecore_eth_stats, mftag_filter_discards)},
 120         {"rx_mac_filter_discards",
 121                 offsetof(struct ecore_eth_stats, mac_filter_discards)},
 122         {"rx_hw_buffer_truncates",
 123                 offsetof(struct ecore_eth_stats, brb_truncates)},
 124         {"rx_hw_buffer_discards",
 125                 offsetof(struct ecore_eth_stats, brb_discards)},
 126         {"tx_lpi_entry_count",
 127                 offsetof(struct ecore_eth_stats, tx_lpi_entry_count)},
 128         {"tx_total_collisions",
 129                 offsetof(struct ecore_eth_stats, tx_total_collisions)},
 130         {"tx_error_drop_packets",
 131                 offsetof(struct ecore_eth_stats, tx_err_drop_pkts)},
 132
 133         {"rx_mac_bytes", offsetof(struct ecore_eth_stats, rx_mac_bytes)},
 134         {"rx_mac_unicast_packets",
 135                 offsetof(struct ecore_eth_stats, rx_mac_uc_packets)},
 136         {"rx_mac_multicast_packets",
 137                 offsetof(struct ecore_eth_stats, rx_mac_mc_packets)},
 138         {"rx_mac_broadcast_packets",
 139                 offsetof(struct ecore_eth_stats, rx_mac_bc_packets)},
 140         {"rx_mac_frames_ok",
 141                 offsetof(struct ecore_eth_stats, rx_mac_frames_ok)},
 142         {"tx_mac_bytes", offsetof(struct ecore_eth_stats, tx_mac_bytes)},
 143         {"tx_mac_unicast_packets",
 144                 offsetof(struct ecore_eth_stats, tx_mac_uc_packets)},
 145         {"tx_mac_multicast_packets",
 146                 offsetof(struct ecore_eth_stats, tx_mac_mc_packets)},
 147         {"tx_mac_broadcast_packets",
 148                 offsetof(struct ecore_eth_stats, tx_mac_bc_packets)},
 149
 150         {"lro_coalesced_packets",
 151                 offsetof(struct ecore_eth_stats, tpa_coalesced_pkts)},
 152         {"lro_coalesced_events",
 153                 offsetof(struct ecore_eth_stats, tpa_coalesced_events)},
 154         {"lro_aborts_num",
 155                 offsetof(struct ecore_eth_stats, tpa_aborts_num)},
 156         {"lro_not_coalesced_packets",
 157                 offsetof(struct ecore_eth_stats, tpa_not_coalesced_pkts)},
 158         {"lro_coalesced_bytes",
 159                 offsetof(struct ecore_eth_stats, tpa_coalesced_bytes)},
 160 };
 161
 162 static void qede_interrupt_action(struct ecore_hwfn *p_hwfn)
 163 {
 164         ecore_int_sp_dpc((osal_int_ptr_t)(p_hwfn));
 165 }
 166
 167 static void
 168 qede_interrupt_handler(__rte_unused struct rte_intr_handle *handle, void *param)
 169 {
 170         struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
 171         struct qede_dev *qdev = eth_dev->data->dev_private;
 172         struct ecore_dev *edev = &qdev->edev;
 173
 174         qede_interrupt_action(ECORE_LEADING_HWFN(edev));
 175         if (rte_intr_enable(&eth_dev->pci_dev->intr_handle))
 176                 DP_ERR(edev, "rte_intr_enable failed\n");
 177 }
 178
 179 static void
 180 qede_alloc_etherdev(struct qede_dev *qdev, struct qed_dev_eth_info *info)
 181 {
 182         rte_memcpy(&qdev->dev_info, info, sizeof(*info));
 183         qdev->num_tc = qdev->dev_info.num_tc;
 184         qdev->ops = qed_ops;
 185 }
 186
 187 static void qede_print_adapter_info(struct qede_dev *qdev)
 188 {
 189         struct ecore_dev *edev = &qdev->edev;
 190         struct qed_dev_info *info = &qdev->dev_info.common;
 191         static char ver_str[QED_DRV_VER_STR_SIZE];
 192
 193         DP_INFO(edev, "*********************************\n");
 194         DP_INFO(edev, " Chip details : %s%d\n",
 195                 ECORE_IS_BB(edev) ? "BB" : "AH",
 196                 CHIP_REV_IS_A0(edev) ? 0 : 1);
 197
 198         sprintf(ver_str, "%s %s_%d.%d.%d.%d", QEDE_PMD_VER_PREFIX,
 199                 edev->ver_str, QEDE_PMD_VERSION_MAJOR, QEDE_PMD_VERSION_MINOR,
 200                 QEDE_PMD_VERSION_REVISION, QEDE_PMD_VERSION_PATCH);
 201         strcpy(qdev->drv_ver, ver_str);
 202         DP_INFO(edev, " Driver version : %s\n", ver_str);
 203
 204         sprintf(ver_str, "%d.%d.%d.%d", info->fw_major, info->fw_minor,
 205                 info->fw_rev, info->fw_eng);
 206         DP_INFO(edev, " Firmware version : %s\n", ver_str);
 207
 208         sprintf(ver_str, "%d.%d.%d.%d",
 209                 (info->mfw_rev >> 24) & 0xff,
 210                 (info->mfw_rev >> 16) & 0xff,
 211                 (info->mfw_rev >> 8) & 0xff, (info->mfw_rev) & 0xff);
 212         DP_INFO(edev, " Management firmware version : %s\n", ver_str);
 213
 214         DP_INFO(edev, " Firmware file : %s\n", fw_file);
 215
 216         DP_INFO(edev, "*********************************\n");
 217 }
 218
 219 static int
 220 qede_set_ucast_rx_mac(struct qede_dev *qdev,
 221                       enum qed_filter_xcast_params_type opcode,
 222                       uint8_t mac[ETHER_ADDR_LEN])
 223 {
 224         struct ecore_dev *edev = &qdev->edev;
 225         struct qed_filter_params filter_cmd;
 226
 227         memset(&filter_cmd, 0, sizeof(filter_cmd));
 228         filter_cmd.type = QED_FILTER_TYPE_UCAST;
 229         filter_cmd.filter.ucast.type = opcode;
 230         filter_cmd.filter.ucast.mac_valid = 1;
 231         rte_memcpy(&filter_cmd.filter.ucast.mac[0], &mac[0], ETHER_ADDR_LEN);
 232         return qdev->ops->filter_config(edev, &filter_cmd);
 233 }
 234
 235 static void
 236 qede_mac_addr_add(struct rte_eth_dev *eth_dev, struct ether_addr *mac_addr,
 237                   uint32_t index, __rte_unused uint32_t pool)
 238 {
 239         struct qede_dev *qdev = eth_dev->data->dev_private;
 240         struct ecore_dev *edev = &qdev->edev;
 241         int rc;
 242
 243         PMD_INIT_FUNC_TRACE(edev);
 244
 245         if (index >= qdev->dev_info.num_mac_addrs) {
 246                 DP_ERR(edev, "Index %u is above MAC filter limit %u\n",
 247                        index, qdev->dev_info.num_mac_addrs);
 248                 return;
 249         }
 250
 251         /* Adding macaddr even though promiscuous mode is set */
 252         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
 253                 DP_INFO(edev, "Port is in promisc mode, yet adding it\n");
 254
 255         /* Add MAC filters according to the unicast secondary macs */
 256         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_ADD,
 257                                    mac_addr->addr_bytes);
 258         if (rc)
 259                 DP_ERR(edev, "Unable to add macaddr rc=%d\n", rc);
 260 }
 261
 262 static void
 263 qede_mac_addr_remove(struct rte_eth_dev *eth_dev, uint32_t index)
 264 {
 265         struct qede_dev *qdev = eth_dev->data->dev_private;
 266         struct ecore_dev *edev = &qdev->edev;
 267         struct ether_addr mac_addr;
 268         int rc;
 269
 270         PMD_INIT_FUNC_TRACE(edev);
 271
 272         if (index >= qdev->dev_info.num_mac_addrs) {
 273                 DP_ERR(edev, "Index %u is above MAC filter limit %u\n",
 274                        index, qdev->dev_info.num_mac_addrs);
 275                 return;
 276         }
 277
 278         /* Use the index maintained by rte */
 279         ether_addr_copy(&eth_dev->data->mac_addrs[index], &mac_addr);
 280         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_DEL,
 281                                    mac_addr.addr_bytes);
 282         if (rc)
 283                 DP_ERR(edev, "Unable to remove macaddr rc=%d\n", rc);
 284 }
 285
 286 static void
 287 qede_mac_addr_set(struct rte_eth_dev *eth_dev, struct ether_addr *mac_addr)
 288 {
 289         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 290         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 291         int rc;
 292
 293         if (IS_VF(edev) && !ecore_vf_check_mac(ECORE_LEADING_HWFN(edev),
 294                                                mac_addr->addr_bytes)) {
 295                 DP_ERR(edev, "Setting MAC address is not allowed\n");
 296                 ether_addr_copy(&qdev->primary_mac,
 297                                 &eth_dev->data->mac_addrs[0]);
 298                 return;
 299         }
 300
 301         /* First remove the primary mac */
 302         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_DEL,
 303                                    qdev->primary_mac.addr_bytes);
 304
 305         if (rc) {
 306                 DP_ERR(edev, "Unable to remove current macaddr"
 307                              " Reverting to previous default mac\n");
 308                 ether_addr_copy(&qdev->primary_mac,
 309                                 &eth_dev->data->mac_addrs[0]);
 310                 return;
 311         }
 312
 313         /* Add new MAC */
 314         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_ADD,
 315                                    mac_addr->addr_bytes);
 316
 317         if (rc)
 318                 DP_ERR(edev, "Unable to add new default mac\n");
 319         else
 320                 ether_addr_copy(mac_addr, &qdev->primary_mac);
 321 }
 322
 323
 324
 325
 326 static void qede_config_accept_any_vlan(struct qede_dev *qdev, bool action)
 327 {
 328         struct ecore_dev *edev = &qdev->edev;
 329         struct qed_update_vport_params params = {
 330                 .vport_id = 0,
 331                 .accept_any_vlan = action,
 332                 .update_accept_any_vlan_flg = 1,
 333         };
 334         int rc;
 335
 336         /* Proceed only if action actually needs to be performed */
 337         if (qdev->accept_any_vlan == action)
 338                 return;
 339
 340         rc = qdev->ops->vport_update(edev, &params);
 341         if (rc) {
 342                 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
 343                        action ? "enable" : "disable");
 344         } else {
 345                 DP_INFO(edev, "%s accept-any-vlan\n",
 346                         action ? "enabled" : "disabled");
 347                 qdev->accept_any_vlan = action;
 348         }
 349 }
 350
 351 static int qede_vlan_stripping(struct rte_eth_dev *eth_dev, bool set_stripping)
 352 {
 353         struct qed_update_vport_params vport_update_params;
 354         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 355         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 356         int rc;
 357
 358         memset(&vport_update_params, 0, sizeof(vport_update_params));
 359         vport_update_params.vport_id = 0;
 360         vport_update_params.update_inner_vlan_removal_flg = 1;
 361         vport_update_params.inner_vlan_removal_flg = set_stripping;
 362         rc = qdev->ops->vport_update(edev, &vport_update_params);
 363         if (rc) {
 364                 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
 365                 return rc;
 366         }
 367
 368         return 0;
 369 }
 370
 371 static void qede_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
 372 {
 373         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 374         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 375         struct rte_eth_rxmode *rxmode = &eth_dev->data->dev_conf.rxmode;
 376
 377         if (mask & ETH_VLAN_STRIP_MASK) {
 378                 if (rxmode->hw_vlan_strip)
 379                         (void)qede_vlan_stripping(eth_dev, 1);
 380                 else
 381                         (void)qede_vlan_stripping(eth_dev, 0);
 382         }
 383
 384         if (mask & ETH_VLAN_FILTER_MASK) {
 385                 /* VLAN filtering kicks in when a VLAN is added */
 386                 if (rxmode->hw_vlan_filter) {
 387                         qede_vlan_filter_set(eth_dev, 0, 1);
 388                 } else {
 389                         if (qdev->configured_vlans > 1) { /* Excluding VLAN0 */
 390                                 DP_NOTICE(edev, false,
 391                                   " Please remove existing VLAN filters"
 392                                   " before disabling VLAN filtering\n");
 393                                 /* Signal app that VLAN filtering is still
 394                                  * enabled
 395                                  */
 396                                 rxmode->hw_vlan_filter = true;
 397                         } else {
 398                                 qede_vlan_filter_set(eth_dev, 0, 0);
 399                         }
 400                 }
 401         }
 402
 403         if (mask & ETH_VLAN_EXTEND_MASK)
 404                 DP_INFO(edev, "No offloads are supported with VLAN Q-in-Q"
 405                         " and classification is based on outer tag only\n");
 406
 407         DP_INFO(edev, "vlan offload mask %d vlan-strip %d vlan-filter %d\n",
 408                 mask, rxmode->hw_vlan_strip, rxmode->hw_vlan_filter);
 409 }
 410
 411 static int qede_set_ucast_rx_vlan(struct qede_dev *qdev,
 412                                   enum qed_filter_xcast_params_type opcode,
 413                                   uint16_t vid)
 414 {
 415         struct qed_filter_params filter_cmd;
 416         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 417
 418         memset(&filter_cmd, 0, sizeof(filter_cmd));
 419         filter_cmd.type = QED_FILTER_TYPE_UCAST;
 420         filter_cmd.filter.ucast.type = opcode;
 421         filter_cmd.filter.ucast.vlan_valid = 1;
 422         filter_cmd.filter.ucast.vlan = vid;
 423
 424         return qdev->ops->filter_config(edev, &filter_cmd);
 425 }
 426
 427 static int qede_vlan_filter_set(struct rte_eth_dev *eth_dev,
 428                                 uint16_t vlan_id, int on)
 429 {
 430         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 431         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 432         struct qed_dev_eth_info *dev_info = &qdev->dev_info;
 433         struct qede_vlan_entry *tmp = NULL;
 434         struct qede_vlan_entry *vlan;
 435         int rc;
 436
 437         if (qdev->configured_vlans == dev_info->num_vlan_filters) {
 438                 DP_NOTICE(edev, false, "Reached max VLAN filter limit"
 439                                      " enabling accept_any_vlan\n");
 440                 qede_config_accept_any_vlan(qdev, true);
 441                 return 0;
 442         }
 443
 444         if (on) {
 445                 SLIST_FOREACH(tmp, &qdev->vlan_list_head, list) {
 446                         if (tmp->vid == vlan_id) {
 447                                 DP_ERR(edev, "VLAN %u already configured\n",
 448                                        vlan_id);
 449                                 return -EEXIST;
 450                         }
 451                 }
 452
 453                 vlan = rte_malloc(NULL, sizeof(struct qede_vlan_entry),
 454                                   RTE_CACHE_LINE_SIZE);
 455
 456                 if (!vlan) {
 457                         DP_ERR(edev, "Did not allocate memory for VLAN\n");
 458                         return -ENOMEM;
 459                 }
 460
 461                 rc = qede_set_ucast_rx_vlan(qdev, QED_FILTER_XCAST_TYPE_ADD,
 462                                             vlan_id);
 463                 if (rc) {
 464                         DP_ERR(edev, "Failed to add VLAN %u rc %d\n", vlan_id,
 465                                rc);
 466                         rte_free(vlan);
 467                 } else {
 468                         vlan->vid = vlan_id;
 469                         SLIST_INSERT_HEAD(&qdev->vlan_list_head, vlan, list);
 470                         qdev->configured_vlans++;
 471                         DP_INFO(edev, "VLAN %u added, configured_vlans %u\n",
 472                                 vlan_id, qdev->configured_vlans);
 473                 }
 474         } else {
 475                 SLIST_FOREACH(tmp, &qdev->vlan_list_head, list) {
 476                         if (tmp->vid == vlan_id)
 477                                 break;
 478                 }
 479
 480                 if (!tmp) {
 481                         if (qdev->configured_vlans == 0) {
 482                                 DP_INFO(edev,
 483                                         "No VLAN filters configured yet\n");
 484                                 return 0;
 485                         }
 486
 487                         DP_ERR(edev, "VLAN %u not configured\n", vlan_id);
 488                         return -EINVAL;
 489                 }
 490
 491                 SLIST_REMOVE(&qdev->vlan_list_head, tmp, qede_vlan_entry, list);
 492
 493                 rc = qede_set_ucast_rx_vlan(qdev, QED_FILTER_XCAST_TYPE_DEL,
 494                                             vlan_id);
 495                 if (rc) {
 496                         DP_ERR(edev, "Failed to delete VLAN %u rc %d\n",
 497                                vlan_id, rc);
 498                 } else {
 499                         qdev->configured_vlans--;
 500                         DP_INFO(edev, "VLAN %u removed configured_vlans %u\n",
 501                                 vlan_id, qdev->configured_vlans);
 502                 }
 503         }
 504
 505         return rc;
 506 }
 507
 508 static int qede_init_vport(struct qede_dev *qdev)
 509 {
 510         struct ecore_dev *edev = &qdev->edev;
 511         struct qed_start_vport_params start = {0};
 512         int rc;
 513
 514         start.remove_inner_vlan = 1;
 515         start.gro_enable = 0;
 516         start.mtu = ETHER_MTU + QEDE_ETH_OVERHEAD;
 517         start.vport_id = 0;
 518         start.drop_ttl0 = false;
 519         start.clear_stats = 1;
 520         start.handle_ptp_pkts = 0;
 521
 522         rc = qdev->ops->vport_start(edev, &start);
 523         if (rc) {
 524                 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
 525                 return rc;
 526         }
 527
 528         DP_INFO(edev,
 529                 "Start vport ramrod passed, vport_id = %d, MTU = %u\n",
 530                 start.vport_id, ETHER_MTU);
 531
 532         return 0;
 533 }
 534
 535 static int qede_dev_configure(struct rte_eth_dev *eth_dev)
 536 {
 537         struct qede_dev *qdev = eth_dev->data->dev_private;
 538         struct ecore_dev *edev = &qdev->edev;
 539         struct rte_eth_rxmode *rxmode = &eth_dev->data->dev_conf.rxmode;
 540         int rc, i, j;
 541
 542         PMD_INIT_FUNC_TRACE(edev);
 543
 544         /* Check requirements for 100G mode */
 545         if (edev->num_hwfns > 1) {
 546                 if (eth_dev->data->nb_rx_queues < 2 ||
 547                     eth_dev->data->nb_tx_queues < 2) {
 548                         DP_NOTICE(edev, false,
 549                                   "100G mode needs min. 2 RX/TX queues\n");
 550                         return -EINVAL;
 551                 }
 552
 553                 if ((eth_dev->data->nb_rx_queues % 2 != 0) ||
 554                     (eth_dev->data->nb_tx_queues % 2 != 0)) {
 555                         DP_NOTICE(edev, false,
 556                                   "100G mode needs even no. of RX/TX queues\n");
 557                         return -EINVAL;
 558                 }
 559         }
 560
 561         /* Sanity checks and throw warnings */
 562         if (rxmode->enable_scatter == 1) {
 563                 DP_ERR(edev, "RX scatter packets is not supported\n");
 564                 return -EINVAL;
 565         }
 566
 567         if (rxmode->enable_lro == 1) {
 568                 DP_INFO(edev, "LRO is not supported\n");
 569                 return -EINVAL;
 570         }
 571
 572         if (!rxmode->hw_strip_crc)
 573                 DP_INFO(edev, "L2 CRC stripping is always enabled in hw\n");
 574
 575         if (!rxmode->hw_ip_checksum)
 576                 DP_INFO(edev, "IP/UDP/TCP checksum offload is always enabled "
 577                               "in hw\n");
 578
 579         /* Check for the port restart case */
 580         if (qdev->state != QEDE_DEV_INIT) {
 581                 rc = qdev->ops->vport_stop(edev, 0);
 582                 if (rc != 0)
 583                         return rc;
 584                 qede_dealloc_fp_resc(eth_dev);
 585         }
 586
 587         qdev->fp_num_tx = eth_dev->data->nb_tx_queues;
 588         qdev->fp_num_rx = eth_dev->data->nb_rx_queues;
 589         qdev->num_queues = qdev->fp_num_tx + qdev->fp_num_rx;
 590
 591         /* Fastpath status block should be initialized before sending
 592          * VPORT-START in the case of VF. Anyway, do it for both VF/PF.
 593          */
 594         rc = qede_alloc_fp_resc(qdev);
 595         if (rc != 0)
 596                 return rc;
 597
 598         /* Issue VPORT-START with default config values to allow
 599          * other port configurations early on.
 600          */
 601         rc = qede_init_vport(qdev);
 602         if (rc != 0)
 603                 return rc;
 604
 605         SLIST_INIT(&qdev->vlan_list_head);
 606
 607         /* Add primary mac for PF */
 608         if (IS_PF(edev))
 609                 qede_mac_addr_set(eth_dev, &qdev->primary_mac);
 610
 611         /* Enable VLAN offloads by default */
 612         qede_vlan_offload_set(eth_dev, ETH_VLAN_STRIP_MASK  |
 613                                        ETH_VLAN_FILTER_MASK |
 614                                        ETH_VLAN_EXTEND_MASK);
 615
 616         qdev->state = QEDE_DEV_CONFIG;
 617
 618         DP_INFO(edev, "Allocated RSS=%d TSS=%d (with CoS=%d)\n",
 619                 (int)QEDE_RSS_COUNT(qdev), (int)QEDE_TSS_COUNT(qdev),
 620                 qdev->num_tc);
 621
 622         return 0;
 623 }
 624
 625 /* Info about HW descriptor ring limitations */
 626 static const struct rte_eth_desc_lim qede_rx_desc_lim = {
 627         .nb_max = NUM_RX_BDS_MAX,
 628         .nb_min = 128,
 629         .nb_align = 128 /* lowest common multiple */
 630 };
 631
 632 static const struct rte_eth_desc_lim qede_tx_desc_lim = {
 633         .nb_max = NUM_TX_BDS_MAX,
 634         .nb_min = 256,
 635         .nb_align = 256
 636 };
 637
 638 static void
 639 qede_dev_info_get(struct rte_eth_dev *eth_dev,
 640                   struct rte_eth_dev_info *dev_info)
 641 {
 642         struct qede_dev *qdev = eth_dev->data->dev_private;
 643         struct ecore_dev *edev = &qdev->edev;
 644
 645         PMD_INIT_FUNC_TRACE(edev);
 646
 647         dev_info->min_rx_bufsize = (uint32_t)(ETHER_MIN_MTU +
 648                                               QEDE_ETH_OVERHEAD);
 649         dev_info->max_rx_pktlen = (uint32_t)ETH_TX_MAX_NON_LSO_PKT_LEN;
 650         dev_info->rx_desc_lim = qede_rx_desc_lim;
 651         dev_info->tx_desc_lim = qede_tx_desc_lim;
 652         dev_info->max_rx_queues = (uint16_t)QEDE_MAX_RSS_CNT(qdev);
 653         dev_info->max_tx_queues = dev_info->max_rx_queues;
 654         dev_info->max_mac_addrs = qdev->dev_info.num_mac_addrs;
 655         if (IS_VF(edev))
 656                 dev_info->max_vfs = 0;
 657         else
 658                 dev_info->max_vfs = (uint16_t)NUM_OF_VFS(&qdev->edev);
 659         dev_info->driver_name = qdev->drv_ver;
 660         dev_info->reta_size = ECORE_RSS_IND_TABLE_SIZE;
 661         dev_info->flow_type_rss_offloads = (uint64_t)QEDE_RSS_OFFLOAD_ALL;
 662
 663         dev_info->default_txconf = (struct rte_eth_txconf) {
 664                 .txq_flags = QEDE_TXQ_FLAGS,
 665         };
 666
 667         dev_info->rx_offload_capa = (DEV_RX_OFFLOAD_VLAN_STRIP |
 668                                      DEV_RX_OFFLOAD_IPV4_CKSUM |
 669                                      DEV_RX_OFFLOAD_UDP_CKSUM |
 670                                      DEV_RX_OFFLOAD_TCP_CKSUM);
 671         dev_info->tx_offload_capa = (DEV_TX_OFFLOAD_VLAN_INSERT |
 672                                      DEV_TX_OFFLOAD_IPV4_CKSUM |
 673                                      DEV_TX_OFFLOAD_UDP_CKSUM |
 674                                      DEV_TX_OFFLOAD_TCP_CKSUM);
 675
 676         dev_info->speed_capa = ETH_LINK_SPEED_25G | ETH_LINK_SPEED_40G |
 677                                ETH_LINK_SPEED_100G;
 678 }
 679
 680 /* return 0 means link status changed, -1 means not changed */
 681 static int
 682 qede_link_update(struct rte_eth_dev *eth_dev, __rte_unused int wait_to_complete)
 683 {
 684         struct qede_dev *qdev = eth_dev->data->dev_private;
 685         struct ecore_dev *edev = &qdev->edev;
 686         uint16_t link_duplex;
 687         struct qed_link_output link;
 688         struct rte_eth_link *curr = &eth_dev->data->dev_link;
 689
 690         memset(&link, 0, sizeof(struct qed_link_output));
 691         qdev->ops->common->get_link(edev, &link);
 692
 693         /* Link Speed */
 694         curr->link_speed = link.speed;
 695
 696         /* Link Mode */
 697         switch (link.duplex) {
 698         case QEDE_DUPLEX_HALF:
 699                 link_duplex = ETH_LINK_HALF_DUPLEX;
 700                 break;
 701         case QEDE_DUPLEX_FULL:
 702                 link_duplex = ETH_LINK_FULL_DUPLEX;
 703                 break;
 704         case QEDE_DUPLEX_UNKNOWN:
 705         default:
 706                 link_duplex = -1;
 707         }
 708         curr->link_duplex = link_duplex;
 709
 710         /* Link Status */
 711         curr->link_status = (link.link_up) ? ETH_LINK_UP : ETH_LINK_DOWN;
 712
 713         /* AN */
 714         curr->link_autoneg = (link.supported_caps & QEDE_SUPPORTED_AUTONEG) ?
 715                              ETH_LINK_AUTONEG : ETH_LINK_FIXED;
 716
 717         DP_INFO(edev, "Link - Speed %u Mode %u AN %u Status %u\n",
 718                 curr->link_speed, curr->link_duplex,
 719                 curr->link_autoneg, curr->link_status);
 720
 721         /* return 0 means link status changed, -1 means not changed */
 722         return ((curr->link_status == link.link_up) ? -1 : 0);
 723 }
 724
 725 static void
 726 qede_rx_mode_setting(struct rte_eth_dev *eth_dev,
 727                      enum qed_filter_rx_mode_type accept_flags)
 728 {
 729         struct qede_dev *qdev = eth_dev->data->dev_private;
 730         struct ecore_dev *edev = &qdev->edev;
 731         struct qed_filter_params rx_mode;
 732
 733         DP_INFO(edev, "%s mode %u\n", __func__, accept_flags);
 734
 735         memset(&rx_mode, 0, sizeof(struct qed_filter_params));
 736         rx_mode.type = QED_FILTER_TYPE_RX_MODE;
 737         rx_mode.filter.accept_flags = accept_flags;
 738         qdev->ops->filter_config(edev, &rx_mode);
 739 }
 740
 741 static void qede_promiscuous_enable(struct rte_eth_dev *eth_dev)
 742 {
 743         struct qede_dev *qdev = eth_dev->data->dev_private;
 744         struct ecore_dev *edev = &qdev->edev;
 745
 746         PMD_INIT_FUNC_TRACE(edev);
 747
 748         enum qed_filter_rx_mode_type type = QED_FILTER_RX_MODE_TYPE_PROMISC;
 749
 750         if (rte_eth_allmulticast_get(eth_dev->data->port_id) == 1)
 751                 type |= QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
 752
 753         qede_rx_mode_setting(eth_dev, type);
 754 }
 755
 756 static void qede_promiscuous_disable(struct rte_eth_dev *eth_dev)
 757 {
 758         struct qede_dev *qdev = eth_dev->data->dev_private;
 759         struct ecore_dev *edev = &qdev->edev;
 760
 761         PMD_INIT_FUNC_TRACE(edev);
 762
 763         if (rte_eth_allmulticast_get(eth_dev->data->port_id) == 1)
 764                 qede_rx_mode_setting(eth_dev,
 765                                      QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC);
 766         else
 767                 qede_rx_mode_setting(eth_dev, QED_FILTER_RX_MODE_TYPE_REGULAR);
 768 }
 769
 770 static void qede_poll_sp_sb_cb(void *param)
 771 {
 772         struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
 773         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 774         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 775         int rc;
 776
 777         qede_interrupt_action(ECORE_LEADING_HWFN(edev));
 778         qede_interrupt_action(&edev->hwfns[1]);
 779
 780         rc = rte_eal_alarm_set(timer_period * US_PER_S,
 781                                qede_poll_sp_sb_cb,
 782                                (void *)eth_dev);
 783         if (rc != 0) {
 784                 DP_ERR(edev, "Unable to start periodic"
 785                              " timer rc %d\n", rc);
 786                 assert(false && "Unable to start periodic timer");
 787         }
 788 }
 789
 790 static void qede_dev_close(struct rte_eth_dev *eth_dev)
 791 {
 792         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 793         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 794         int rc;
 795
 796         PMD_INIT_FUNC_TRACE(edev);
 797
 798         /* dev_stop() shall cleanup fp resources in hw but without releasing
 799          * dma memories and sw structures so that dev_start() can be called
 800          * by the app without reconfiguration. However, in dev_close() we
 801          * can release all the resources and device can be brought up newly
 802          */
 803         if (qdev->state != QEDE_DEV_STOP)
 804                 qede_dev_stop(eth_dev);
 805         else
 806                 DP_INFO(edev, "Device is already stopped\n");
 807
 808         rc = qdev->ops->vport_stop(edev, 0);
 809         if (rc != 0)
 810                 DP_ERR(edev, "Failed to stop VPORT\n");
 811
 812         qede_dealloc_fp_resc(eth_dev);
 813
 814         qdev->ops->common->slowpath_stop(edev);
 815
 816         qdev->ops->common->remove(edev);
 817
 818         rte_intr_disable(&eth_dev->pci_dev->intr_handle);
 819
 820         rte_intr_callback_unregister(&eth_dev->pci_dev->intr_handle,
 821                                      qede_interrupt_handler, (void *)eth_dev);
 822
 823         if (edev->num_hwfns > 1)
 824                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb, (void *)eth_dev);
 825
 826         qdev->state = QEDE_DEV_INIT; /* Go back to init state */
 827 }
 828
 829 static void
 830 qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
 831 {
 832         struct qede_dev *qdev = eth_dev->data->dev_private;
 833         struct ecore_dev *edev = &qdev->edev;
 834         struct ecore_eth_stats stats;
 835
 836         qdev->ops->get_vport_stats(edev, &stats);
 837
 838         /* RX Stats */
 839         eth_stats->ipackets = stats.rx_ucast_pkts +
 840             stats.rx_mcast_pkts + stats.rx_bcast_pkts;
 841
 842         eth_stats->ibytes = stats.rx_ucast_bytes +
 843             stats.rx_mcast_bytes + stats.rx_bcast_bytes;
 844
 845         eth_stats->ierrors = stats.rx_crc_errors +
 846             stats.rx_align_errors +
 847             stats.rx_carrier_errors +
 848             stats.rx_oversize_packets +
 849             stats.rx_jabbers + stats.rx_undersize_packets;
 850
 851         eth_stats->rx_nombuf = stats.no_buff_discards;
 852
 853         eth_stats->imissed = stats.mftag_filter_discards +
 854             stats.mac_filter_discards +
 855             stats.no_buff_discards + stats.brb_truncates + stats.brb_discards;
 856
 857         /* TX stats */
 858         eth_stats->opackets = stats.tx_ucast_pkts +
 859             stats.tx_mcast_pkts + stats.tx_bcast_pkts;
 860
 861         eth_stats->obytes = stats.tx_ucast_bytes +
 862             stats.tx_mcast_bytes + stats.tx_bcast_bytes;
 863
 864         eth_stats->oerrors = stats.tx_err_drop_pkts;
 865 }
 866
 867 static int
 868 qede_get_xstats_names(__rte_unused struct rte_eth_dev *dev,
 869                       struct rte_eth_xstat_name *xstats_names, unsigned limit)
 870 {
 871         unsigned int i, stat_cnt = RTE_DIM(qede_xstats_strings);
 872
 873         if (xstats_names != NULL)
 874                 for (i = 0; i < stat_cnt; i++)
 875                         snprintf(xstats_names[i].name,
 876                                 sizeof(xstats_names[i].name),
 877                                 "%s",
 878                                 qede_xstats_strings[i].name);
 879
 880         return stat_cnt;
 881 }
 882
 883 static int
 884 qede_get_xstats(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 885                 unsigned int n)
 886 {
 887         struct qede_dev *qdev = dev->data->dev_private;
 888         struct ecore_dev *edev = &qdev->edev;
 889         struct ecore_eth_stats stats;
 890         unsigned int num = RTE_DIM(qede_xstats_strings);
 891
 892         if (n < num)
 893                 return num;
 894
 895         qdev->ops->get_vport_stats(edev, &stats);
 896
 897         for (num = 0; num < n; num++)
 898                 xstats[num].value = *(u64 *)(((char *)&stats) +
 899                                              qede_xstats_strings[num].offset);
 900
 901         return num;
 902 }
 903
 904 static void
 905 qede_reset_xstats(struct rte_eth_dev *dev)
 906 {
 907         struct qede_dev *qdev = dev->data->dev_private;
 908         struct ecore_dev *edev = &qdev->edev;
 909
 910         ecore_reset_vport_stats(edev);
 911 }
 912
 913 int qede_dev_set_link_state(struct rte_eth_dev *eth_dev, bool link_up)
 914 {
 915         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 916         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 917         struct qed_link_params link_params;
 918         int rc;
 919
 920         DP_INFO(edev, "setting link state %d\n", link_up);
 921         memset(&link_params, 0, sizeof(link_params));
 922         link_params.link_up = link_up;
 923         rc = qdev->ops->common->set_link(edev, &link_params);
 924         if (rc != ECORE_SUCCESS)
 925                 DP_ERR(edev, "Unable to set link state %d\n", link_up);
 926
 927         return rc;
 928 }
 929
 930 static int qede_dev_set_link_up(struct rte_eth_dev *eth_dev)
 931 {
 932         return qede_dev_set_link_state(eth_dev, true);
 933 }
 934
 935 static int qede_dev_set_link_down(struct rte_eth_dev *eth_dev)
 936 {
 937         return qede_dev_set_link_state(eth_dev, false);
 938 }
 939
 940 static void qede_reset_stats(struct rte_eth_dev *eth_dev)
 941 {
 942         struct qede_dev *qdev = eth_dev->data->dev_private;
 943         struct ecore_dev *edev = &qdev->edev;
 944
 945         ecore_reset_vport_stats(edev);
 946 }
 947
 948 static void qede_allmulticast_enable(struct rte_eth_dev *eth_dev)
 949 {
 950         enum qed_filter_rx_mode_type type =
 951             QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
 952
 953         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
 954                 type |= QED_FILTER_RX_MODE_TYPE_PROMISC;
 955
 956         qede_rx_mode_setting(eth_dev, type);
 957 }
 958
 959 static void qede_allmulticast_disable(struct rte_eth_dev *eth_dev)
 960 {
 961         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
 962                 qede_rx_mode_setting(eth_dev, QED_FILTER_RX_MODE_TYPE_PROMISC);
 963         else
 964                 qede_rx_mode_setting(eth_dev, QED_FILTER_RX_MODE_TYPE_REGULAR);
 965 }
 966
 967 static int qede_flow_ctrl_set(struct rte_eth_dev *eth_dev,
 968                               struct rte_eth_fc_conf *fc_conf)
 969 {
 970         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 971         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 972         struct qed_link_output current_link;
 973         struct qed_link_params params;
 974
 975         memset(&current_link, 0, sizeof(current_link));
 976         qdev->ops->common->get_link(edev, &current_link);
 977
 978         memset(&params, 0, sizeof(params));
 979         params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
 980         if (fc_conf->autoneg) {
 981                 if (!(current_link.supported_caps & QEDE_SUPPORTED_AUTONEG)) {
 982                         DP_ERR(edev, "Autoneg not supported\n");
 983                         return -EINVAL;
 984                 }
 985                 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
 986         }
 987
 988         /* Pause is assumed to be supported (SUPPORTED_Pause) */
 989         if (fc_conf->mode == RTE_FC_FULL)
 990                 params.pause_config |= (QED_LINK_PAUSE_TX_ENABLE |
 991                                         QED_LINK_PAUSE_RX_ENABLE);
 992         if (fc_conf->mode == RTE_FC_TX_PAUSE)
 993                 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
 994         if (fc_conf->mode == RTE_FC_RX_PAUSE)
 995                 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
 996
 997         params.link_up = true;
 998         (void)qdev->ops->common->set_link(edev, &params);
 999
1000         return 0;
1001 }
1002
1003 static int qede_flow_ctrl_get(struct rte_eth_dev *eth_dev,
1004                               struct rte_eth_fc_conf *fc_conf)
1005 {
1006         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
1007         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
1008         struct qed_link_output current_link;
1009
1010         memset(&current_link, 0, sizeof(current_link));
1011         qdev->ops->common->get_link(edev, &current_link);
1012
1013         if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
1014                 fc_conf->autoneg = true;
1015
1016         if (current_link.pause_config & (QED_LINK_PAUSE_RX_ENABLE |
1017                                          QED_LINK_PAUSE_TX_ENABLE))
1018                 fc_conf->mode = RTE_FC_FULL;
1019         else if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
1020                 fc_conf->mode = RTE_FC_RX_PAUSE;
1021         else if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
1022                 fc_conf->mode = RTE_FC_TX_PAUSE;
1023         else
1024                 fc_conf->mode = RTE_FC_NONE;
1025
1026         return 0;
1027 }
1028
1029 static const uint32_t *
1030 qede_dev_supported_ptypes_get(struct rte_eth_dev *eth_dev)
1031 {
1032         static const uint32_t ptypes[] = {
1033                 RTE_PTYPE_L3_IPV4,
1034                 RTE_PTYPE_L3_IPV6,
1035                 RTE_PTYPE_UNKNOWN
1036         };
1037
1038         if (eth_dev->rx_pkt_burst == qede_recv_pkts)
1039                 return ptypes;
1040
1041         return NULL;
1042 }
1043
1044 void qede_init_rss_caps(uint8_t *rss_caps, uint64_t hf)
1045 {
1046         *rss_caps = 0;
1047         *rss_caps |= (hf & ETH_RSS_IPV4)              ? ECORE_RSS_IPV4 : 0;
1048         *rss_caps |= (hf & ETH_RSS_IPV6)              ? ECORE_RSS_IPV6 : 0;
1049         *rss_caps |= (hf & ETH_RSS_IPV6_EX)           ? ECORE_RSS_IPV6 : 0;
1050         *rss_caps |= (hf & ETH_RSS_NONFRAG_IPV4_TCP)  ? ECORE_RSS_IPV4_TCP : 0;
1051         *rss_caps |= (hf & ETH_RSS_NONFRAG_IPV6_TCP)  ? ECORE_RSS_IPV6_TCP : 0;
1052         *rss_caps |= (hf & ETH_RSS_IPV6_TCP_EX)       ? ECORE_RSS_IPV6_TCP : 0;
1053 }
1054
1055 static int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
1056                                 struct rte_eth_rss_conf *rss_conf)
1057 {
1058         struct qed_update_vport_params vport_update_params;
1059         struct qede_dev *qdev = eth_dev->data->dev_private;
1060         struct ecore_dev *edev = &qdev->edev;
1061         uint32_t *key = (uint32_t *)rss_conf->rss_key;
1062         uint64_t hf = rss_conf->rss_hf;
1063         int i;
1064
1065         memset(&vport_update_params, 0, sizeof(vport_update_params));
1066
1067         if (hf != 0) {
1068                 /* Enable RSS */
1069                 qede_init_rss_caps(&qdev->rss_params.rss_caps, hf);
1070                 memcpy(&vport_update_params.rss_params, &qdev->rss_params,
1071                        sizeof(vport_update_params.rss_params));
1072                 if (key)
1073                         memcpy(qdev->rss_params.rss_key, rss_conf->rss_key,
1074                                rss_conf->rss_key_len);
1075                 vport_update_params.update_rss_flg = 1;
1076                 qdev->rss_enabled = 1;
1077         } else {
1078                 /* Disable RSS */
1079                 qdev->rss_enabled = 0;
1080         }
1081
1082         /* If the mapping doesn't fit any supported, return */
1083         if (qdev->rss_params.rss_caps == 0 && hf != 0)
1084                 return -EINVAL;
1085
1086         DP_INFO(edev, "%s\n", (vport_update_params.update_rss_flg) ?
1087                                 "Enabling RSS" : "Disabling RSS");
1088
1089         vport_update_params.vport_id = 0;
1090
1091         return qdev->ops->vport_update(edev, &vport_update_params);
1092 }
1093
1094 int qede_rss_hash_conf_get(struct rte_eth_dev *eth_dev,
1095                            struct rte_eth_rss_conf *rss_conf)
1096 {
1097         struct qede_dev *qdev = eth_dev->data->dev_private;
1098         uint64_t hf;
1099
1100         if (rss_conf->rss_key_len < sizeof(qdev->rss_params.rss_key))
1101                 return -EINVAL;
1102
1103         if (rss_conf->rss_key)
1104                 memcpy(rss_conf->rss_key, qdev->rss_params.rss_key,
1105                        sizeof(qdev->rss_params.rss_key));
1106
1107         hf = 0;
1108         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV4)     ?
1109                         ETH_RSS_IPV4 : 0;
1110         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6)     ?
1111                         ETH_RSS_IPV6 : 0;
1112         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6)     ?
1113                         ETH_RSS_IPV6_EX : 0;
1114         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV4_TCP) ?
1115                         ETH_RSS_NONFRAG_IPV4_TCP : 0;
1116         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6_TCP) ?
1117                         ETH_RSS_NONFRAG_IPV6_TCP : 0;
1118         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6_TCP) ?
1119                         ETH_RSS_IPV6_TCP_EX : 0;
1120
1121         rss_conf->rss_hf = hf;
1122
1123         return 0;
1124 }
1125
1126 static int qede_rss_reta_update(struct rte_eth_dev *eth_dev,
1127                                 struct rte_eth_rss_reta_entry64 *reta_conf,
1128                                 uint16_t reta_size)
1129 {
1130         struct qed_update_vport_params vport_update_params;
1131         struct qede_dev *qdev = eth_dev->data->dev_private;
1132         struct ecore_dev *edev = &qdev->edev;
1133         uint16_t i, idx, shift;
1134
1135         if (reta_size > ETH_RSS_RETA_SIZE_128) {
1136                 DP_ERR(edev, "reta_size %d is not supported by hardware\n",
1137                        reta_size);
1138                 return -EINVAL;
1139         }
1140
1141         memset(&vport_update_params, 0, sizeof(vport_update_params));
1142         memcpy(&vport_update_params.rss_params, &qdev->rss_params,
1143                sizeof(vport_update_params.rss_params));
1144
1145         for (i = 0; i < reta_size; i++) {
1146                 idx = i / RTE_RETA_GROUP_SIZE;
1147                 shift = i % RTE_RETA_GROUP_SIZE;
1148                 if (reta_conf[idx].mask & (1ULL << shift)) {
1149                         uint8_t entry = reta_conf[idx].reta[shift];
1150                         qdev->rss_params.rss_ind_table[i] = entry;
1151                 }
1152         }
1153
1154         vport_update_params.update_rss_flg = 1;
1155         vport_update_params.vport_id = 0;
1156
1157         return qdev->ops->vport_update(edev, &vport_update_params);
1158 }
1159
1160 int qede_rss_reta_query(struct rte_eth_dev *eth_dev,
1161                         struct rte_eth_rss_reta_entry64 *reta_conf,
1162                         uint16_t reta_size)
1163 {
1164         struct qede_dev *qdev = eth_dev->data->dev_private;
1165         uint16_t i, idx, shift;
1166
1167         if (reta_size > ETH_RSS_RETA_SIZE_128) {
1168                 struct ecore_dev *edev = &qdev->edev;
1169                 DP_ERR(edev, "reta_size %d is not supported\n",
1170                        reta_size);
1171         }
1172
1173         for (i = 0; i < reta_size; i++) {
1174                 idx = i / RTE_RETA_GROUP_SIZE;
1175                 shift = i % RTE_RETA_GROUP_SIZE;
1176                 if (reta_conf[idx].mask & (1ULL << shift)) {
1177                         uint8_t entry = qdev->rss_params.rss_ind_table[i];
1178                         reta_conf[idx].reta[shift] = entry;
1179                 }
1180         }
1181
1182         return 0;
1183 }
1184
1185 int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1186 {
1187         uint32_t frame_size;
1188         struct qede_dev *qdev = dev->data->dev_private;
1189         struct rte_eth_dev_info dev_info = {0};
1190
1191         qede_dev_info_get(dev, &dev_info);
1192
1193         /* VLAN_TAG = 4 */
1194         frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + 4;
1195
1196         if ((mtu < ETHER_MIN_MTU) || (frame_size > dev_info.max_rx_pktlen))
1197                 return -EINVAL;
1198
1199         if (!dev->data->scattered_rx &&
1200             frame_size > dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)
1201                 return -EINVAL;
1202
1203         if (frame_size > ETHER_MAX_LEN)
1204                 dev->data->dev_conf.rxmode.jumbo_frame = 1;
1205         else
1206                 dev->data->dev_conf.rxmode.jumbo_frame = 0;
1207
1208         /* update max frame size */
1209         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1210         qdev->mtu = mtu;
1211         qede_dev_stop(dev);
1212         qede_dev_start(dev);
1213
1214         return 0;
1215 }
1216
1217 static const struct eth_dev_ops qede_eth_dev_ops = {
1218         .dev_configure = qede_dev_configure,
1219         .dev_infos_get = qede_dev_info_get,
1220         .rx_queue_setup = qede_rx_queue_setup,
1221         .rx_queue_release = qede_rx_queue_release,
1222         .tx_queue_setup = qede_tx_queue_setup,
1223         .tx_queue_release = qede_tx_queue_release,
1224         .dev_start = qede_dev_start,
1225         .dev_set_link_up = qede_dev_set_link_up,
1226         .dev_set_link_down = qede_dev_set_link_down,
1227         .link_update = qede_link_update,
1228         .promiscuous_enable = qede_promiscuous_enable,
1229         .promiscuous_disable = qede_promiscuous_disable,
1230         .allmulticast_enable = qede_allmulticast_enable,
1231         .allmulticast_disable = qede_allmulticast_disable,
1232         .dev_stop = qede_dev_stop,
1233         .dev_close = qede_dev_close,
1234         .stats_get = qede_get_stats,
1235         .stats_reset = qede_reset_stats,
1236         .xstats_get = qede_get_xstats,
1237         .xstats_reset = qede_reset_xstats,
1238         .xstats_get_names = qede_get_xstats_names,
1239         .mac_addr_add = qede_mac_addr_add,
1240         .mac_addr_remove = qede_mac_addr_remove,
1241         .mac_addr_set = qede_mac_addr_set,
1242         .vlan_offload_set = qede_vlan_offload_set,
1243         .vlan_filter_set = qede_vlan_filter_set,
1244         .flow_ctrl_set = qede_flow_ctrl_set,
1245         .flow_ctrl_get = qede_flow_ctrl_get,
1246         .dev_supported_ptypes_get = qede_dev_supported_ptypes_get,
1247         .rss_hash_update = qede_rss_hash_update,
1248         .rss_hash_conf_get = qede_rss_hash_conf_get,
1249         .reta_update  = qede_rss_reta_update,
1250         .reta_query  = qede_rss_reta_query,
1251         .mtu_set = qede_set_mtu,
1252 };
1253
1254 static const struct eth_dev_ops qede_eth_vf_dev_ops = {
1255         .dev_configure = qede_dev_configure,
1256         .dev_infos_get = qede_dev_info_get,
1257         .rx_queue_setup = qede_rx_queue_setup,
1258         .rx_queue_release = qede_rx_queue_release,
1259         .tx_queue_setup = qede_tx_queue_setup,
1260         .tx_queue_release = qede_tx_queue_release,
1261         .dev_start = qede_dev_start,
1262         .dev_set_link_up = qede_dev_set_link_up,
1263         .dev_set_link_down = qede_dev_set_link_down,
1264         .link_update = qede_link_update,
1265         .promiscuous_enable = qede_promiscuous_enable,
1266         .promiscuous_disable = qede_promiscuous_disable,
1267         .allmulticast_enable = qede_allmulticast_enable,
1268         .allmulticast_disable = qede_allmulticast_disable,
1269         .dev_stop = qede_dev_stop,
1270         .dev_close = qede_dev_close,
1271         .stats_get = qede_get_stats,
1272         .stats_reset = qede_reset_stats,
1273         .xstats_get = qede_get_xstats,
1274         .xstats_reset = qede_reset_xstats,
1275         .xstats_get_names = qede_get_xstats_names,
1276         .vlan_offload_set = qede_vlan_offload_set,
1277         .vlan_filter_set = qede_vlan_filter_set,
1278         .dev_supported_ptypes_get = qede_dev_supported_ptypes_get,
1279         .rss_hash_update = qede_rss_hash_update,
1280         .rss_hash_conf_get = qede_rss_hash_conf_get,
1281         .reta_update  = qede_rss_reta_update,
1282         .reta_query  = qede_rss_reta_query,
1283         .mtu_set = qede_set_mtu,
1284 };
1285
1286 static void qede_update_pf_params(struct ecore_dev *edev)
1287 {
1288         struct ecore_pf_params pf_params;
1289         /* 32 rx + 32 tx */
1290         memset(&pf_params, 0, sizeof(struct ecore_pf_params));
1291         pf_params.eth_pf_params.num_cons = 64;
1292         qed_ops->common->update_pf_params(edev, &pf_params);
1293 }
1294
1295 static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
1296 {
1297         struct rte_pci_device *pci_dev;
1298         struct rte_pci_addr pci_addr;
1299         struct qede_dev *adapter;
1300         struct ecore_dev *edev;
1301         struct qed_dev_eth_info dev_info;
1302         struct qed_slowpath_params params;
1303         static bool do_once = true;
1304         uint8_t bulletin_change;
1305         uint8_t vf_mac[ETHER_ADDR_LEN];
1306         uint8_t is_mac_forced;
1307         bool is_mac_exist;
1308         /* Fix up ecore debug level */
1309         uint32_t dp_module = ~0 & ~ECORE_MSG_HW;
1310         uint8_t dp_level = ECORE_LEVEL_VERBOSE;
1311         uint32_t max_mac_addrs;
1312         int rc;
1313
1314         /* Extract key data structures */
1315         adapter = eth_dev->data->dev_private;
1316         edev = &adapter->edev;
1317         pci_addr = eth_dev->pci_dev->addr;
1318
1319         PMD_INIT_FUNC_TRACE(edev);
1320
1321         snprintf(edev->name, NAME_SIZE, PCI_SHORT_PRI_FMT ":dpdk-port-%u",
1322                  pci_addr.bus, pci_addr.devid, pci_addr.function,
1323                  eth_dev->data->port_id);
1324
1325         eth_dev->rx_pkt_burst = qede_recv_pkts;
1326         eth_dev->tx_pkt_burst = qede_xmit_pkts;
1327
1328         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1329                 DP_NOTICE(edev, false,
1330                           "Skipping device init from secondary process\n");
1331                 return 0;
1332         }
1333
1334         pci_dev = eth_dev->pci_dev;
1335
1336         rte_eth_copy_pci_info(eth_dev, pci_dev);
1337
1338         qed_ops = qed_get_eth_ops();
1339         if (!qed_ops) {
1340                 DP_ERR(edev, "Failed to get qed_eth_ops_pass\n");
1341                 return -EINVAL;
1342         }
1343
1344         DP_INFO(edev, "Starting qede probe\n");
1345
1346         rc = qed_ops->common->probe(edev, pci_dev, QED_PROTOCOL_ETH,
1347                                     dp_module, dp_level, is_vf);
1348
1349         if (rc != 0) {
1350                 DP_ERR(edev, "qede probe failed rc %d\n", rc);
1351                 return -ENODEV;
1352         }
1353
1354         qede_update_pf_params(edev);
1355
1356         rte_intr_callback_register(&eth_dev->pci_dev->intr_handle,
1357                                    qede_interrupt_handler, (void *)eth_dev);
1358
1359         if (rte_intr_enable(&eth_dev->pci_dev->intr_handle)) {
1360                 DP_ERR(edev, "rte_intr_enable() failed\n");
1361                 return -ENODEV;
1362         }
1363
1364         /* Start the Slowpath-process */
1365         memset(&params, 0, sizeof(struct qed_slowpath_params));
1366         params.int_mode = ECORE_INT_MODE_MSIX;
1367         params.drv_major = QEDE_MAJOR_VERSION;
1368         params.drv_minor = QEDE_MINOR_VERSION;
1369         params.drv_rev = QEDE_REVISION_VERSION;
1370         params.drv_eng = QEDE_ENGINEERING_VERSION;
1371         strncpy((char *)params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1372
1373         /* For CMT mode device do periodic polling for slowpath events.
1374          * This is required since uio device uses only one MSI-x
1375          * interrupt vector but we need one for each engine.
1376          */
1377         if (edev->num_hwfns > 1) {
1378                 rc = rte_eal_alarm_set(timer_period * US_PER_S,
1379                                        qede_poll_sp_sb_cb,
1380                                        (void *)eth_dev);
1381                 if (rc != 0) {
1382                         DP_ERR(edev, "Unable to start periodic"
1383                                      " timer rc %d\n", rc);
1384                         return -EINVAL;
1385                 }
1386         }
1387
1388         rc = qed_ops->common->slowpath_start(edev, &params);
1389         if (rc) {
1390                 DP_ERR(edev, "Cannot start slowpath rc = %d\n", rc);
1391                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1392                                      (void *)eth_dev);
1393                 return -ENODEV;
1394         }
1395
1396         rc = qed_ops->fill_dev_info(edev, &dev_info);
1397         if (rc) {
1398                 DP_ERR(edev, "Cannot get device_info rc %d\n", rc);
1399                 qed_ops->common->slowpath_stop(edev);
1400                 qed_ops->common->remove(edev);
1401                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1402                                      (void *)eth_dev);
1403                 return -ENODEV;
1404         }
1405
1406         qede_alloc_etherdev(adapter, &dev_info);
1407
1408         adapter->ops->common->set_id(edev, edev->name, QEDE_DRV_MODULE_VERSION);
1409
1410         if (!is_vf)
1411                 adapter->dev_info.num_mac_addrs =
1412                         (uint32_t)RESC_NUM(ECORE_LEADING_HWFN(edev),
1413                                             ECORE_MAC);
1414         else
1415                 ecore_vf_get_num_mac_filters(ECORE_LEADING_HWFN(edev),
1416                                              &adapter->dev_info.num_mac_addrs);
1417
1418         /* Allocate memory for storing MAC addr */
1419         eth_dev->data->mac_addrs = rte_zmalloc(edev->name,
1420                                         (ETHER_ADDR_LEN *
1421                                         adapter->dev_info.num_mac_addrs),
1422                                         RTE_CACHE_LINE_SIZE);
1423
1424         if (eth_dev->data->mac_addrs == NULL) {
1425                 DP_ERR(edev, "Failed to allocate MAC address\n");
1426                 qed_ops->common->slowpath_stop(edev);
1427                 qed_ops->common->remove(edev);
1428                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1429                                      (void *)eth_dev);
1430                 return -ENOMEM;
1431         }
1432
1433         if (!is_vf) {
1434                 ether_addr_copy((struct ether_addr *)edev->hwfns[0].
1435                                 hw_info.hw_mac_addr,
1436                                 &eth_dev->data->mac_addrs[0]);
1437                 ether_addr_copy(&eth_dev->data->mac_addrs[0],
1438                                 &adapter->primary_mac);
1439         } else {
1440                 ecore_vf_read_bulletin(ECORE_LEADING_HWFN(edev),
1441                                        &bulletin_change);
1442                 if (bulletin_change) {
1443                         is_mac_exist =
1444                             ecore_vf_bulletin_get_forced_mac(
1445                                                 ECORE_LEADING_HWFN(edev),
1446                                                 vf_mac,
1447                                                 &is_mac_forced);
1448                         if (is_mac_exist && is_mac_forced) {
1449                                 DP_INFO(edev, "VF macaddr received from PF\n");
1450                                 ether_addr_copy((struct ether_addr *)&vf_mac,
1451                                                 &eth_dev->data->mac_addrs[0]);
1452                                 ether_addr_copy(&eth_dev->data->mac_addrs[0],
1453                                                 &adapter->primary_mac);
1454                         } else {
1455                                 DP_NOTICE(edev, false,
1456                                           "No VF macaddr assigned\n");
1457                         }
1458                 }
1459         }
1460
1461         eth_dev->dev_ops = (is_vf) ? &qede_eth_vf_dev_ops : &qede_eth_dev_ops;
1462
1463         if (do_once) {
1464                 qede_print_adapter_info(adapter);
1465                 do_once = false;
1466         }
1467
1468         adapter->state = QEDE_DEV_INIT;
1469
1470         DP_NOTICE(edev, false, "MAC address : %02x:%02x:%02x:%02x:%02x:%02x\n",
1471                   adapter->primary_mac.addr_bytes[0],
1472                   adapter->primary_mac.addr_bytes[1],
1473                   adapter->primary_mac.addr_bytes[2],
1474                   adapter->primary_mac.addr_bytes[3],
1475                   adapter->primary_mac.addr_bytes[4],
1476                   adapter->primary_mac.addr_bytes[5]);
1477
1478         return rc;
1479 }
1480
1481 static int qedevf_eth_dev_init(struct rte_eth_dev *eth_dev)
1482 {
1483         return qede_common_dev_init(eth_dev, 1);
1484 }
1485
1486 static int qede_eth_dev_init(struct rte_eth_dev *eth_dev)
1487 {
1488         return qede_common_dev_init(eth_dev, 0);
1489 }
1490
1491 static int qede_dev_common_uninit(struct rte_eth_dev *eth_dev)
1492 {
1493         /* only uninitialize in the primary process */
1494         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1495                 return 0;
1496
1497         /* safe to close dev here */
1498         qede_dev_close(eth_dev);
1499
1500         eth_dev->dev_ops = NULL;
1501         eth_dev->rx_pkt_burst = NULL;
1502         eth_dev->tx_pkt_burst = NULL;
1503
1504         if (eth_dev->data->mac_addrs)
1505                 rte_free(eth_dev->data->mac_addrs);
1506
1507         eth_dev->data->mac_addrs = NULL;
1508
1509         return 0;
1510 }
1511
1512 static int qede_eth_dev_uninit(struct rte_eth_dev *eth_dev)
1513 {
1514         return qede_dev_common_uninit(eth_dev);
1515 }
1516
1517 static int qedevf_eth_dev_uninit(struct rte_eth_dev *eth_dev)
1518 {
1519         return qede_dev_common_uninit(eth_dev);
1520 }
1521
1522 static struct rte_pci_id pci_id_qedevf_map[] = {
1523 #define QEDEVF_RTE_PCI_DEVICE(dev) RTE_PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, dev)
1524         {
1525                 QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_VF)
1526         },
1527         {
1528                 QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_IOV)
1529         },
1530         {.vendor_id = 0,}
1531 };
1532
1533 static struct rte_pci_id pci_id_qede_map[] = {
1534 #define QEDE_RTE_PCI_DEVICE(dev) RTE_PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, dev)
1535         {
1536                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_57980E)
1537         },
1538         {
1539                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_57980S)
1540         },
1541         {
1542                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_40)
1543         },
1544         {
1545                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_25)
1546         },
1547         {
1548                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_100)
1549         },
1550         {.vendor_id = 0,}
1551 };
1552
1553 static struct eth_driver rte_qedevf_pmd = {
1554         .pci_drv = {
1555                     .id_table = pci_id_qedevf_map,
1556                     .drv_flags =
1557                     RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1558                     .probe = rte_eth_dev_pci_probe,
1559                     .remove = rte_eth_dev_pci_remove,
1560                    },
1561         .eth_dev_init = qedevf_eth_dev_init,
1562         .eth_dev_uninit = qedevf_eth_dev_uninit,
1563         .dev_private_size = sizeof(struct qede_dev),
1564 };
1565
1566 static struct eth_driver rte_qede_pmd = {
1567         .pci_drv = {
1568                     .id_table = pci_id_qede_map,
1569                     .drv_flags =
1570                     RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1571                     .probe = rte_eth_dev_pci_probe,
1572                     .remove = rte_eth_dev_pci_remove,
1573                    },
1574         .eth_dev_init = qede_eth_dev_init,
1575         .eth_dev_uninit = qede_eth_dev_uninit,
1576         .dev_private_size = sizeof(struct qede_dev),
1577 };
1578
1579 RTE_PMD_REGISTER_PCI(net_qede, rte_qede_pmd.pci_drv);
1580 RTE_PMD_REGISTER_PCI_TABLE(net_qede, pci_id_qede_map);
1581 RTE_PMD_REGISTER_PCI(net_qede_vf, rte_qedevf_pmd.pci_drv);
1582 RTE_PMD_REGISTER_PCI_TABLE(net_qede_vf, pci_id_qedevf_map);