drivers/net/qede/qede_ethdev.c

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9 #include "qede_ethdev.h"
  10 #include <rte_alarm.h>
  11
  12 /* Globals */
  13 static const struct qed_eth_ops *qed_ops;
  14 static const char *drivername = "qede pmd";
  15 static int64_t timer_period = 1;
  16
  17 struct rte_qede_xstats_name_off {
  18         char name[RTE_ETH_XSTATS_NAME_SIZE];
  19         uint64_t offset;
  20 };
  21
  22 static const struct rte_qede_xstats_name_off qede_xstats_strings[] = {
  23         {"rx_unicast_bytes", offsetof(struct ecore_eth_stats, rx_ucast_bytes)},
  24         {"rx_multicast_bytes",
  25                 offsetof(struct ecore_eth_stats, rx_mcast_bytes)},
  26         {"rx_broadcast_bytes",
  27                 offsetof(struct ecore_eth_stats, rx_bcast_bytes)},
  28         {"rx_unicast_packets", offsetof(struct ecore_eth_stats, rx_ucast_pkts)},
  29         {"rx_multicast_packets",
  30                 offsetof(struct ecore_eth_stats, rx_mcast_pkts)},
  31         {"rx_broadcast_packets",
  32                 offsetof(struct ecore_eth_stats, rx_bcast_pkts)},
  33
  34         {"tx_unicast_bytes", offsetof(struct ecore_eth_stats, tx_ucast_bytes)},
  35         {"tx_multicast_bytes",
  36                 offsetof(struct ecore_eth_stats, tx_mcast_bytes)},
  37         {"tx_broadcast_bytes",
  38                 offsetof(struct ecore_eth_stats, tx_bcast_bytes)},
  39         {"tx_unicast_packets", offsetof(struct ecore_eth_stats, tx_ucast_pkts)},
  40         {"tx_multicast_packets",
  41                 offsetof(struct ecore_eth_stats, tx_mcast_pkts)},
  42         {"tx_broadcast_packets",
  43                 offsetof(struct ecore_eth_stats, tx_bcast_pkts)},
  44
  45         {"rx_64_byte_packets",
  46                 offsetof(struct ecore_eth_stats, rx_64_byte_packets)},
  47         {"rx_65_to_127_byte_packets",
  48                 offsetof(struct ecore_eth_stats, rx_65_to_127_byte_packets)},
  49         {"rx_128_to_255_byte_packets",
  50                 offsetof(struct ecore_eth_stats, rx_128_to_255_byte_packets)},
  51         {"rx_256_to_511_byte_packets",
  52                 offsetof(struct ecore_eth_stats, rx_256_to_511_byte_packets)},
  53         {"rx_512_to_1023_byte_packets",
  54                 offsetof(struct ecore_eth_stats, rx_512_to_1023_byte_packets)},
  55         {"rx_1024_to_1518_byte_packets",
  56                 offsetof(struct ecore_eth_stats, rx_1024_to_1518_byte_packets)},
  57         {"rx_1519_to_1522_byte_packets",
  58                 offsetof(struct ecore_eth_stats, rx_1519_to_1522_byte_packets)},
  59         {"rx_1519_to_2047_byte_packets",
  60                 offsetof(struct ecore_eth_stats, rx_1519_to_2047_byte_packets)},
  61         {"rx_2048_to_4095_byte_packets",
  62                 offsetof(struct ecore_eth_stats, rx_2048_to_4095_byte_packets)},
  63         {"rx_4096_to_9216_byte_packets",
  64                 offsetof(struct ecore_eth_stats, rx_4096_to_9216_byte_packets)},
  65         {"rx_9217_to_16383_byte_packets",
  66                 offsetof(struct ecore_eth_stats,
  67                          rx_9217_to_16383_byte_packets)},
  68         {"tx_64_byte_packets",
  69                 offsetof(struct ecore_eth_stats, tx_64_byte_packets)},
  70         {"tx_65_to_127_byte_packets",
  71                 offsetof(struct ecore_eth_stats, tx_65_to_127_byte_packets)},
  72         {"tx_128_to_255_byte_packets",
  73                 offsetof(struct ecore_eth_stats, tx_128_to_255_byte_packets)},
  74         {"tx_256_to_511_byte_packets",
  75                 offsetof(struct ecore_eth_stats, tx_256_to_511_byte_packets)},
  76         {"tx_512_to_1023_byte_packets",
  77                 offsetof(struct ecore_eth_stats, tx_512_to_1023_byte_packets)},
  78         {"tx_1024_to_1518_byte_packets",
  79                 offsetof(struct ecore_eth_stats, tx_1024_to_1518_byte_packets)},
  80         {"trx_1519_to_1522_byte_packets",
  81                 offsetof(struct ecore_eth_stats, tx_1519_to_2047_byte_packets)},
  82         {"tx_2048_to_4095_byte_packets",
  83                 offsetof(struct ecore_eth_stats, tx_2048_to_4095_byte_packets)},
  84         {"tx_4096_to_9216_byte_packets",
  85                 offsetof(struct ecore_eth_stats, tx_4096_to_9216_byte_packets)},
  86         {"tx_9217_to_16383_byte_packets",
  87                 offsetof(struct ecore_eth_stats,
  88                          tx_9217_to_16383_byte_packets)},
  89
  90         {"rx_mac_crtl_frames",
  91                 offsetof(struct ecore_eth_stats, rx_mac_crtl_frames)},
  92         {"tx_mac_control_frames",
  93                 offsetof(struct ecore_eth_stats, tx_mac_ctrl_frames)},
  94         {"rx_pause_frames", offsetof(struct ecore_eth_stats, rx_pause_frames)},
  95         {"tx_pause_frames", offsetof(struct ecore_eth_stats, tx_pause_frames)},
  96         {"rx_priority_flow_control_frames",
  97                 offsetof(struct ecore_eth_stats, rx_pfc_frames)},
  98         {"tx_priority_flow_control_frames",
  99                 offsetof(struct ecore_eth_stats, tx_pfc_frames)},
 100
 101         {"rx_crc_errors", offsetof(struct ecore_eth_stats, rx_crc_errors)},
 102         {"rx_align_errors", offsetof(struct ecore_eth_stats, rx_align_errors)},
 103         {"rx_carrier_errors",
 104                 offsetof(struct ecore_eth_stats, rx_carrier_errors)},
 105         {"rx_oversize_packet_errors",
 106                 offsetof(struct ecore_eth_stats, rx_oversize_packets)},
 107         {"rx_jabber_errors", offsetof(struct ecore_eth_stats, rx_jabbers)},
 108         {"rx_undersize_packet_errors",
 109                 offsetof(struct ecore_eth_stats, rx_undersize_packets)},
 110         {"rx_fragments", offsetof(struct ecore_eth_stats, rx_fragments)},
 111         {"rx_host_buffer_not_available",
 112                 offsetof(struct ecore_eth_stats, no_buff_discards)},
 113         /* Number of packets discarded because they are bigger than MTU */
 114         {"rx_packet_too_big_discards",
 115                 offsetof(struct ecore_eth_stats, packet_too_big_discard)},
 116         {"rx_ttl_zero_discards",
 117                 offsetof(struct ecore_eth_stats, ttl0_discard)},
 118         {"rx_multi_function_tag_filter_discards",
 119                 offsetof(struct ecore_eth_stats, mftag_filter_discards)},
 120         {"rx_mac_filter_discards",
 121                 offsetof(struct ecore_eth_stats, mac_filter_discards)},
 122         {"rx_hw_buffer_truncates",
 123                 offsetof(struct ecore_eth_stats, brb_truncates)},
 124         {"rx_hw_buffer_discards",
 125                 offsetof(struct ecore_eth_stats, brb_discards)},
 126         {"tx_lpi_entry_count",
 127                 offsetof(struct ecore_eth_stats, tx_lpi_entry_count)},
 128         {"tx_total_collisions",
 129                 offsetof(struct ecore_eth_stats, tx_total_collisions)},
 130         {"tx_error_drop_packets",
 131                 offsetof(struct ecore_eth_stats, tx_err_drop_pkts)},
 132
 133         {"rx_mac_bytes", offsetof(struct ecore_eth_stats, rx_mac_bytes)},
 134         {"rx_mac_unicast_packets",
 135                 offsetof(struct ecore_eth_stats, rx_mac_uc_packets)},
 136         {"rx_mac_multicast_packets",
 137                 offsetof(struct ecore_eth_stats, rx_mac_mc_packets)},
 138         {"rx_mac_broadcast_packets",
 139                 offsetof(struct ecore_eth_stats, rx_mac_bc_packets)},
 140         {"rx_mac_frames_ok",
 141                 offsetof(struct ecore_eth_stats, rx_mac_frames_ok)},
 142         {"tx_mac_bytes", offsetof(struct ecore_eth_stats, tx_mac_bytes)},
 143         {"tx_mac_unicast_packets",
 144                 offsetof(struct ecore_eth_stats, tx_mac_uc_packets)},
 145         {"tx_mac_multicast_packets",
 146                 offsetof(struct ecore_eth_stats, tx_mac_mc_packets)},
 147         {"tx_mac_broadcast_packets",
 148                 offsetof(struct ecore_eth_stats, tx_mac_bc_packets)},
 149
 150         {"lro_coalesced_packets",
 151                 offsetof(struct ecore_eth_stats, tpa_coalesced_pkts)},
 152         {"lro_coalesced_events",
 153                 offsetof(struct ecore_eth_stats, tpa_coalesced_events)},
 154         {"lro_aborts_num",
 155                 offsetof(struct ecore_eth_stats, tpa_aborts_num)},
 156         {"lro_not_coalesced_packets",
 157                 offsetof(struct ecore_eth_stats, tpa_not_coalesced_pkts)},
 158         {"lro_coalesced_bytes",
 159                 offsetof(struct ecore_eth_stats, tpa_coalesced_bytes)},
 160 };
 161
 162 static void qede_interrupt_action(struct ecore_hwfn *p_hwfn)
 163 {
 164         ecore_int_sp_dpc((osal_int_ptr_t)(p_hwfn));
 165 }
 166
 167 static void
 168 qede_interrupt_handler(__rte_unused struct rte_intr_handle *handle, void *param)
 169 {
 170         struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
 171         struct qede_dev *qdev = eth_dev->data->dev_private;
 172         struct ecore_dev *edev = &qdev->edev;
 173
 174         qede_interrupt_action(ECORE_LEADING_HWFN(edev));
 175         if (rte_intr_enable(&eth_dev->pci_dev->intr_handle))
 176                 DP_ERR(edev, "rte_intr_enable failed\n");
 177 }
 178
 179 static void
 180 qede_alloc_etherdev(struct qede_dev *qdev, struct qed_dev_eth_info *info)
 181 {
 182         rte_memcpy(&qdev->dev_info, info, sizeof(*info));
 183         qdev->num_tc = qdev->dev_info.num_tc;
 184         qdev->ops = qed_ops;
 185 }
 186
 187 static void qede_print_adapter_info(struct qede_dev *qdev)
 188 {
 189         struct ecore_dev *edev = &qdev->edev;
 190         struct qed_dev_info *info = &qdev->dev_info.common;
 191         static char ver_str[QED_DRV_VER_STR_SIZE];
 192
 193         DP_INFO(edev, "*********************************\n");
 194         DP_INFO(edev, " Chip details : %s%d\n",
 195                 ECORE_IS_BB(edev) ? "BB" : "AH",
 196                 CHIP_REV_IS_A0(edev) ? 0 : 1);
 197
 198         sprintf(ver_str, "%s %s_%d.%d.%d.%d", QEDE_PMD_VER_PREFIX,
 199                 edev->ver_str, QEDE_PMD_VERSION_MAJOR, QEDE_PMD_VERSION_MINOR,
 200                 QEDE_PMD_VERSION_REVISION, QEDE_PMD_VERSION_PATCH);
 201         strcpy(qdev->drv_ver, ver_str);
 202         DP_INFO(edev, " Driver version : %s\n", ver_str);
 203
 204         sprintf(ver_str, "%d.%d.%d.%d", info->fw_major, info->fw_minor,
 205                 info->fw_rev, info->fw_eng);
 206         DP_INFO(edev, " Firmware version : %s\n", ver_str);
 207
 208         sprintf(ver_str, "%d.%d.%d.%d",
 209                 (info->mfw_rev >> 24) & 0xff,
 210                 (info->mfw_rev >> 16) & 0xff,
 211                 (info->mfw_rev >> 8) & 0xff, (info->mfw_rev) & 0xff);
 212         DP_INFO(edev, " Management firmware version : %s\n", ver_str);
 213
 214         DP_INFO(edev, " Firmware file : %s\n", fw_file);
 215
 216         DP_INFO(edev, "*********************************\n");
 217 }
 218
 219 static int
 220 qede_set_ucast_rx_mac(struct qede_dev *qdev,
 221                       enum qed_filter_xcast_params_type opcode,
 222                       uint8_t mac[ETHER_ADDR_LEN])
 223 {
 224         struct ecore_dev *edev = &qdev->edev;
 225         struct qed_filter_params filter_cmd;
 226
 227         memset(&filter_cmd, 0, sizeof(filter_cmd));
 228         filter_cmd.type = QED_FILTER_TYPE_UCAST;
 229         filter_cmd.filter.ucast.type = opcode;
 230         filter_cmd.filter.ucast.mac_valid = 1;
 231         rte_memcpy(&filter_cmd.filter.ucast.mac[0], &mac[0], ETHER_ADDR_LEN);
 232         return qdev->ops->filter_config(edev, &filter_cmd);
 233 }
 234
 235 static void
 236 qede_mac_addr_add(struct rte_eth_dev *eth_dev, struct ether_addr *mac_addr,
 237                   uint32_t index, __rte_unused uint32_t pool)
 238 {
 239         struct qede_dev *qdev = eth_dev->data->dev_private;
 240         struct ecore_dev *edev = &qdev->edev;
 241         int rc;
 242
 243         PMD_INIT_FUNC_TRACE(edev);
 244
 245         if (index >= qdev->dev_info.num_mac_addrs) {
 246                 DP_ERR(edev, "Index %u is above MAC filter limit %u\n",
 247                        index, qdev->dev_info.num_mac_addrs);
 248                 return;
 249         }
 250
 251         /* Adding macaddr even though promiscuous mode is set */
 252         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
 253                 DP_INFO(edev, "Port is in promisc mode, yet adding it\n");
 254
 255         /* Add MAC filters according to the unicast secondary macs */
 256         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_ADD,
 257                                    mac_addr->addr_bytes);
 258         if (rc)
 259                 DP_ERR(edev, "Unable to add macaddr rc=%d\n", rc);
 260 }
 261
 262 static void
 263 qede_mac_addr_remove(struct rte_eth_dev *eth_dev, uint32_t index)
 264 {
 265         struct qede_dev *qdev = eth_dev->data->dev_private;
 266         struct ecore_dev *edev = &qdev->edev;
 267         struct ether_addr mac_addr;
 268         int rc;
 269
 270         PMD_INIT_FUNC_TRACE(edev);
 271
 272         if (index >= qdev->dev_info.num_mac_addrs) {
 273                 DP_ERR(edev, "Index %u is above MAC filter limit %u\n",
 274                        index, qdev->dev_info.num_mac_addrs);
 275                 return;
 276         }
 277
 278         /* Use the index maintained by rte */
 279         ether_addr_copy(&eth_dev->data->mac_addrs[index], &mac_addr);
 280         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_DEL,
 281                                    mac_addr.addr_bytes);
 282         if (rc)
 283                 DP_ERR(edev, "Unable to remove macaddr rc=%d\n", rc);
 284 }
 285
 286 static void
 287 qede_mac_addr_set(struct rte_eth_dev *eth_dev, struct ether_addr *mac_addr)
 288 {
 289         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 290         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 291         int rc;
 292
 293         if (IS_VF(edev) && !ecore_vf_check_mac(ECORE_LEADING_HWFN(edev),
 294                                                mac_addr->addr_bytes)) {
 295                 DP_ERR(edev, "Setting MAC address is not allowed\n");
 296                 ether_addr_copy(&qdev->primary_mac,
 297                                 &eth_dev->data->mac_addrs[0]);
 298                 return;
 299         }
 300
 301         /* First remove the primary mac */
 302         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_DEL,
 303                                    qdev->primary_mac.addr_bytes);
 304
 305         if (rc) {
 306                 DP_ERR(edev, "Unable to remove current macaddr"
 307                              " Reverting to previous default mac\n");
 308                 ether_addr_copy(&qdev->primary_mac,
 309                                 &eth_dev->data->mac_addrs[0]);
 310                 return;
 311         }
 312
 313         /* Add new MAC */
 314         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_ADD,
 315                                    mac_addr->addr_bytes);
 316
 317         if (rc)
 318                 DP_ERR(edev, "Unable to add new default mac\n");
 319         else
 320                 ether_addr_copy(mac_addr, &qdev->primary_mac);
 321 }
 322
 323
 324
 325
 326 static void qede_config_accept_any_vlan(struct qede_dev *qdev, bool action)
 327 {
 328         struct ecore_dev *edev = &qdev->edev;
 329         struct qed_update_vport_params params = {
 330                 .vport_id = 0,
 331                 .accept_any_vlan = action,
 332                 .update_accept_any_vlan_flg = 1,
 333         };
 334         int rc;
 335
 336         /* Proceed only if action actually needs to be performed */
 337         if (qdev->accept_any_vlan == action)
 338                 return;
 339
 340         rc = qdev->ops->vport_update(edev, &params);
 341         if (rc) {
 342                 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
 343                        action ? "enable" : "disable");
 344         } else {
 345                 DP_INFO(edev, "%s accept-any-vlan\n",
 346                         action ? "enabled" : "disabled");
 347                 qdev->accept_any_vlan = action;
 348         }
 349 }
 350
 351 void qede_config_rx_mode(struct rte_eth_dev *eth_dev)
 352 {
 353         struct qede_dev *qdev = eth_dev->data->dev_private;
 354         struct ecore_dev *edev = &qdev->edev;
 355         /* TODO: - QED_FILTER_TYPE_UCAST */
 356         enum qed_filter_rx_mode_type accept_flags =
 357                         QED_FILTER_RX_MODE_TYPE_REGULAR;
 358         struct qed_filter_params rx_mode;
 359         int rc;
 360
 361         /* Configure the struct for the Rx mode */
 362         memset(&rx_mode, 0, sizeof(struct qed_filter_params));
 363         rx_mode.type = QED_FILTER_TYPE_RX_MODE;
 364
 365         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_REPLACE,
 366                                    eth_dev->data->mac_addrs[0].addr_bytes);
 367         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1) {
 368                 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
 369         } else {
 370                 rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_ADD,
 371                                            eth_dev->data->
 372                                            mac_addrs[0].addr_bytes);
 373                 if (rc) {
 374                         DP_ERR(edev, "Unable to add filter\n");
 375                         return;
 376                 }
 377         }
 378
 379         /* take care of VLAN mode */
 380         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1) {
 381                 qede_config_accept_any_vlan(qdev, true);
 382         } else if (!qdev->non_configured_vlans) {
 383                 /* If we dont have non-configured VLANs and promisc
 384                  * is not set, then check if we need to disable
 385                  * accept_any_vlan mode.
 386                  * Because in this case, accept_any_vlan mode is set
 387                  * as part of IFF_RPOMISC flag handling.
 388                  */
 389                 qede_config_accept_any_vlan(qdev, false);
 390         }
 391         rx_mode.filter.accept_flags = accept_flags;
 392         rc = qdev->ops->filter_config(edev, &rx_mode);
 393         if (rc)
 394                 DP_ERR(edev, "Filter config failed rc=%d\n", rc);
 395 }
 396
 397 static int qede_vlan_stripping(struct rte_eth_dev *eth_dev, bool set_stripping)
 398 {
 399         struct qed_update_vport_params vport_update_params;
 400         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 401         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 402         int rc;
 403
 404         memset(&vport_update_params, 0, sizeof(vport_update_params));
 405         vport_update_params.vport_id = 0;
 406         vport_update_params.update_inner_vlan_removal_flg = 1;
 407         vport_update_params.inner_vlan_removal_flg = set_stripping;
 408         rc = qdev->ops->vport_update(edev, &vport_update_params);
 409         if (rc) {
 410                 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
 411                 return rc;
 412         }
 413
 414         return 0;
 415 }
 416
 417 static void qede_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
 418 {
 419         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 420         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 421
 422         if (mask & ETH_VLAN_STRIP_MASK) {
 423                 if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 424                         (void)qede_vlan_stripping(eth_dev, 1);
 425                 else
 426                         (void)qede_vlan_stripping(eth_dev, 0);
 427         }
 428
 429         DP_INFO(edev, "vlan offload mask %d vlan-strip %d\n",
 430                 mask, eth_dev->data->dev_conf.rxmode.hw_vlan_strip);
 431 }
 432
 433 static int qede_set_ucast_rx_vlan(struct qede_dev *qdev,
 434                                   enum qed_filter_xcast_params_type opcode,
 435                                   uint16_t vid)
 436 {
 437         struct qed_filter_params filter_cmd;
 438         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 439
 440         memset(&filter_cmd, 0, sizeof(filter_cmd));
 441         filter_cmd.type = QED_FILTER_TYPE_UCAST;
 442         filter_cmd.filter.ucast.type = opcode;
 443         filter_cmd.filter.ucast.vlan_valid = 1;
 444         filter_cmd.filter.ucast.vlan = vid;
 445
 446         return qdev->ops->filter_config(edev, &filter_cmd);
 447 }
 448
 449 static int qede_vlan_filter_set(struct rte_eth_dev *eth_dev,
 450                                 uint16_t vlan_id, int on)
 451 {
 452         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 453         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 454         struct qed_dev_eth_info *dev_info = &qdev->dev_info;
 455         int rc;
 456
 457         if (vlan_id != 0 &&
 458             qdev->configured_vlans == dev_info->num_vlan_filters) {
 459                 DP_NOTICE(edev, false, "Reached max VLAN filter limit"
 460                                      " enabling accept_any_vlan\n");
 461                 qede_config_accept_any_vlan(qdev, true);
 462                 return 0;
 463         }
 464
 465         if (on) {
 466                 rc = qede_set_ucast_rx_vlan(qdev, QED_FILTER_XCAST_TYPE_ADD,
 467                                             vlan_id);
 468                 if (rc)
 469                         DP_ERR(edev, "Failed to add VLAN %u rc %d\n", vlan_id,
 470                                rc);
 471                 else
 472                         if (vlan_id != 0)
 473                                 qdev->configured_vlans++;
 474         } else {
 475                 rc = qede_set_ucast_rx_vlan(qdev, QED_FILTER_XCAST_TYPE_DEL,
 476                                             vlan_id);
 477                 if (rc)
 478                         DP_ERR(edev, "Failed to delete VLAN %u rc %d\n",
 479                                vlan_id, rc);
 480                 else
 481                         if (vlan_id != 0)
 482                                 qdev->configured_vlans--;
 483         }
 484
 485         DP_INFO(edev, "vlan_id %u on %u rc %d configured_vlans %u\n",
 486                         vlan_id, on, rc, qdev->configured_vlans);
 487
 488         return rc;
 489 }
 490
 491 static int qede_dev_configure(struct rte_eth_dev *eth_dev)
 492 {
 493         struct qede_dev *qdev = eth_dev->data->dev_private;
 494         struct ecore_dev *edev = &qdev->edev;
 495         struct rte_eth_rxmode *rxmode = &eth_dev->data->dev_conf.rxmode;
 496
 497         PMD_INIT_FUNC_TRACE(edev);
 498
 499         /* Check requirements for 100G mode */
 500         if (edev->num_hwfns > 1) {
 501                 if (eth_dev->data->nb_rx_queues < 2 ||
 502                     eth_dev->data->nb_tx_queues < 2) {
 503                         DP_NOTICE(edev, false,
 504                                   "100G mode needs min. 2 RX/TX queues\n");
 505                         return -EINVAL;
 506                 }
 507
 508                 if ((eth_dev->data->nb_rx_queues % 2 != 0) ||
 509                     (eth_dev->data->nb_tx_queues % 2 != 0)) {
 510                         DP_NOTICE(edev, false,
 511                                   "100G mode needs even no. of RX/TX queues\n");
 512                         return -EINVAL;
 513                 }
 514         }
 515
 516         qdev->fp_num_tx = eth_dev->data->nb_tx_queues;
 517         qdev->fp_num_rx = eth_dev->data->nb_rx_queues;
 518         qdev->num_queues = qdev->fp_num_tx + qdev->fp_num_rx;
 519
 520         /* Initial state */
 521         qdev->state = QEDE_CLOSE;
 522
 523         /* Sanity checks and throw warnings */
 524
 525         if (rxmode->enable_scatter == 1) {
 526                 DP_ERR(edev, "RX scatter packets is not supported\n");
 527                 return -EINVAL;
 528         }
 529
 530         if (rxmode->enable_lro == 1) {
 531                 DP_INFO(edev, "LRO is not supported\n");
 532                 return -EINVAL;
 533         }
 534
 535         if (!rxmode->hw_strip_crc)
 536                 DP_INFO(edev, "L2 CRC stripping is always enabled in hw\n");
 537
 538         if (!rxmode->hw_ip_checksum)
 539                 DP_INFO(edev, "IP/UDP/TCP checksum offload is always enabled "
 540                               "in hw\n");
 541
 542
 543         DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
 544                 QEDE_RSS_CNT(qdev), qdev->num_tc);
 545
 546         DP_INFO(edev, "my_id %u rel_pf_id %u abs_pf_id %u"
 547                 " port %u first_on_engine %d\n",
 548                 edev->hwfns[0].my_id,
 549                 edev->hwfns[0].rel_pf_id,
 550                 edev->hwfns[0].abs_pf_id,
 551                 edev->hwfns[0].port_id, edev->hwfns[0].first_on_engine);
 552
 553         return 0;
 554 }
 555
 556 /* Info about HW descriptor ring limitations */
 557 static const struct rte_eth_desc_lim qede_rx_desc_lim = {
 558         .nb_max = NUM_RX_BDS_MAX,
 559         .nb_min = 128,
 560         .nb_align = 128 /* lowest common multiple */
 561 };
 562
 563 static const struct rte_eth_desc_lim qede_tx_desc_lim = {
 564         .nb_max = NUM_TX_BDS_MAX,
 565         .nb_min = 256,
 566         .nb_align = 256
 567 };
 568
 569 static void
 570 qede_dev_info_get(struct rte_eth_dev *eth_dev,
 571                   struct rte_eth_dev_info *dev_info)
 572 {
 573         struct qede_dev *qdev = eth_dev->data->dev_private;
 574         struct ecore_dev *edev = &qdev->edev;
 575
 576         PMD_INIT_FUNC_TRACE(edev);
 577
 578         dev_info->min_rx_bufsize = (uint32_t)(ETHER_MIN_MTU +
 579                                               QEDE_ETH_OVERHEAD);
 580         dev_info->max_rx_pktlen = (uint32_t)ETH_TX_MAX_NON_LSO_PKT_LEN;
 581         dev_info->rx_desc_lim = qede_rx_desc_lim;
 582         dev_info->tx_desc_lim = qede_tx_desc_lim;
 583         dev_info->max_rx_queues = (uint16_t)QEDE_MAX_RSS_CNT(qdev);
 584         dev_info->max_tx_queues = dev_info->max_rx_queues;
 585         dev_info->max_mac_addrs = qdev->dev_info.num_mac_addrs;
 586         if (IS_VF(edev))
 587                 dev_info->max_vfs = 0;
 588         else
 589                 dev_info->max_vfs = (uint16_t)NUM_OF_VFS(&qdev->edev);
 590         dev_info->driver_name = qdev->drv_ver;
 591         dev_info->reta_size = ECORE_RSS_IND_TABLE_SIZE;
 592         dev_info->flow_type_rss_offloads = (uint64_t)QEDE_RSS_OFFLOAD_ALL;
 593
 594         dev_info->default_txconf = (struct rte_eth_txconf) {
 595                 .txq_flags = QEDE_TXQ_FLAGS,
 596         };
 597
 598         dev_info->rx_offload_capa = (DEV_RX_OFFLOAD_VLAN_STRIP |
 599                                      DEV_RX_OFFLOAD_IPV4_CKSUM |
 600                                      DEV_RX_OFFLOAD_UDP_CKSUM |
 601                                      DEV_RX_OFFLOAD_TCP_CKSUM);
 602         dev_info->tx_offload_capa = (DEV_TX_OFFLOAD_VLAN_INSERT |
 603                                      DEV_TX_OFFLOAD_IPV4_CKSUM |
 604                                      DEV_TX_OFFLOAD_UDP_CKSUM |
 605                                      DEV_TX_OFFLOAD_TCP_CKSUM);
 606
 607         dev_info->speed_capa = ETH_LINK_SPEED_25G | ETH_LINK_SPEED_40G;
 608 }
 609
 610 /* return 0 means link status changed, -1 means not changed */
 611 static int
 612 qede_link_update(struct rte_eth_dev *eth_dev, __rte_unused int wait_to_complete)
 613 {
 614         struct qede_dev *qdev = eth_dev->data->dev_private;
 615         struct ecore_dev *edev = &qdev->edev;
 616         uint16_t link_duplex;
 617         struct qed_link_output link;
 618         struct rte_eth_link *curr = &eth_dev->data->dev_link;
 619
 620         memset(&link, 0, sizeof(struct qed_link_output));
 621         qdev->ops->common->get_link(edev, &link);
 622
 623         /* Link Speed */
 624         curr->link_speed = link.speed;
 625
 626         /* Link Mode */
 627         switch (link.duplex) {
 628         case QEDE_DUPLEX_HALF:
 629                 link_duplex = ETH_LINK_HALF_DUPLEX;
 630                 break;
 631         case QEDE_DUPLEX_FULL:
 632                 link_duplex = ETH_LINK_FULL_DUPLEX;
 633                 break;
 634         case QEDE_DUPLEX_UNKNOWN:
 635         default:
 636                 link_duplex = -1;
 637         }
 638         curr->link_duplex = link_duplex;
 639
 640         /* Link Status */
 641         curr->link_status = (link.link_up) ? ETH_LINK_UP : ETH_LINK_DOWN;
 642
 643         /* AN */
 644         curr->link_autoneg = (link.supported_caps & QEDE_SUPPORTED_AUTONEG) ?
 645                              ETH_LINK_AUTONEG : ETH_LINK_FIXED;
 646
 647         DP_INFO(edev, "Link - Speed %u Mode %u AN %u Status %u\n",
 648                 curr->link_speed, curr->link_duplex,
 649                 curr->link_autoneg, curr->link_status);
 650
 651         /* return 0 means link status changed, -1 means not changed */
 652         return ((curr->link_status == link.link_up) ? -1 : 0);
 653 }
 654
 655 static void
 656 qede_rx_mode_setting(struct rte_eth_dev *eth_dev,
 657                      enum qed_filter_rx_mode_type accept_flags)
 658 {
 659         struct qede_dev *qdev = eth_dev->data->dev_private;
 660         struct ecore_dev *edev = &qdev->edev;
 661         struct qed_filter_params rx_mode;
 662
 663         DP_INFO(edev, "%s mode %u\n", __func__, accept_flags);
 664
 665         memset(&rx_mode, 0, sizeof(struct qed_filter_params));
 666         rx_mode.type = QED_FILTER_TYPE_RX_MODE;
 667         rx_mode.filter.accept_flags = accept_flags;
 668         qdev->ops->filter_config(edev, &rx_mode);
 669 }
 670
 671 static void qede_promiscuous_enable(struct rte_eth_dev *eth_dev)
 672 {
 673         struct qede_dev *qdev = eth_dev->data->dev_private;
 674         struct ecore_dev *edev = &qdev->edev;
 675
 676         PMD_INIT_FUNC_TRACE(edev);
 677
 678         enum qed_filter_rx_mode_type type = QED_FILTER_RX_MODE_TYPE_PROMISC;
 679
 680         if (rte_eth_allmulticast_get(eth_dev->data->port_id) == 1)
 681                 type |= QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
 682
 683         qede_rx_mode_setting(eth_dev, type);
 684 }
 685
 686 static void qede_promiscuous_disable(struct rte_eth_dev *eth_dev)
 687 {
 688         struct qede_dev *qdev = eth_dev->data->dev_private;
 689         struct ecore_dev *edev = &qdev->edev;
 690
 691         PMD_INIT_FUNC_TRACE(edev);
 692
 693         if (rte_eth_allmulticast_get(eth_dev->data->port_id) == 1)
 694                 qede_rx_mode_setting(eth_dev,
 695                                      QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC);
 696         else
 697                 qede_rx_mode_setting(eth_dev, QED_FILTER_RX_MODE_TYPE_REGULAR);
 698 }
 699
 700 static void qede_poll_sp_sb_cb(void *param)
 701 {
 702         struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
 703         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 704         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 705         int rc;
 706
 707         qede_interrupt_action(ECORE_LEADING_HWFN(edev));
 708         qede_interrupt_action(&edev->hwfns[1]);
 709
 710         rc = rte_eal_alarm_set(timer_period * US_PER_S,
 711                                qede_poll_sp_sb_cb,
 712                                (void *)eth_dev);
 713         if (rc != 0) {
 714                 DP_ERR(edev, "Unable to start periodic"
 715                              " timer rc %d\n", rc);
 716                 assert(false && "Unable to start periodic timer");
 717         }
 718 }
 719
 720 static void qede_dev_close(struct rte_eth_dev *eth_dev)
 721 {
 722         struct qede_dev *qdev = eth_dev->data->dev_private;
 723         struct ecore_dev *edev = &qdev->edev;
 724
 725         PMD_INIT_FUNC_TRACE(edev);
 726
 727         /* dev_stop() shall cleanup fp resources in hw but without releasing
 728          * dma memories and sw structures so that dev_start() can be called
 729          * by the app without reconfiguration. However, in dev_close() we
 730          * can release all the resources and device can be brought up newly
 731          */
 732         if (qdev->state != QEDE_STOP)
 733                 qede_dev_stop(eth_dev);
 734         else
 735                 DP_INFO(edev, "Device is already stopped\n");
 736
 737         qede_free_mem_load(qdev);
 738
 739         qede_free_fp_arrays(qdev);
 740
 741         qede_dev_set_link_state(eth_dev, false);
 742
 743         qdev->ops->common->slowpath_stop(edev);
 744
 745         qdev->ops->common->remove(edev);
 746
 747         rte_intr_disable(&eth_dev->pci_dev->intr_handle);
 748
 749         rte_intr_callback_unregister(&eth_dev->pci_dev->intr_handle,
 750                                      qede_interrupt_handler, (void *)eth_dev);
 751
 752         if (edev->num_hwfns > 1)
 753                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb, (void *)eth_dev);
 754
 755         qdev->state = QEDE_CLOSE;
 756 }
 757
 758 static void
 759 qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
 760 {
 761         struct qede_dev *qdev = eth_dev->data->dev_private;
 762         struct ecore_dev *edev = &qdev->edev;
 763         struct ecore_eth_stats stats;
 764
 765         qdev->ops->get_vport_stats(edev, &stats);
 766
 767         /* RX Stats */
 768         eth_stats->ipackets = stats.rx_ucast_pkts +
 769             stats.rx_mcast_pkts + stats.rx_bcast_pkts;
 770
 771         eth_stats->ibytes = stats.rx_ucast_bytes +
 772             stats.rx_mcast_bytes + stats.rx_bcast_bytes;
 773
 774         eth_stats->ierrors = stats.rx_crc_errors +
 775             stats.rx_align_errors +
 776             stats.rx_carrier_errors +
 777             stats.rx_oversize_packets +
 778             stats.rx_jabbers + stats.rx_undersize_packets;
 779
 780         eth_stats->rx_nombuf = stats.no_buff_discards;
 781
 782         eth_stats->imissed = stats.mftag_filter_discards +
 783             stats.mac_filter_discards +
 784             stats.no_buff_discards + stats.brb_truncates + stats.brb_discards;
 785
 786         /* TX stats */
 787         eth_stats->opackets = stats.tx_ucast_pkts +
 788             stats.tx_mcast_pkts + stats.tx_bcast_pkts;
 789
 790         eth_stats->obytes = stats.tx_ucast_bytes +
 791             stats.tx_mcast_bytes + stats.tx_bcast_bytes;
 792
 793         eth_stats->oerrors = stats.tx_err_drop_pkts;
 794 }
 795
 796 static int
 797 qede_get_xstats_names(__rte_unused struct rte_eth_dev *dev,
 798                       struct rte_eth_xstat_name *xstats_names, unsigned limit)
 799 {
 800         unsigned int i, stat_cnt = RTE_DIM(qede_xstats_strings);
 801
 802         if (xstats_names != NULL)
 803                 for (i = 0; i < stat_cnt; i++)
 804                         snprintf(xstats_names[i].name,
 805                                 sizeof(xstats_names[i].name),
 806                                 "%s",
 807                                 qede_xstats_strings[i].name);
 808
 809         return stat_cnt;
 810 }
 811
 812 static int
 813 qede_get_xstats(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 814                 unsigned int n)
 815 {
 816         struct qede_dev *qdev = dev->data->dev_private;
 817         struct ecore_dev *edev = &qdev->edev;
 818         struct ecore_eth_stats stats;
 819         unsigned int num = RTE_DIM(qede_xstats_strings);
 820
 821         if (n < num)
 822                 return num;
 823
 824         qdev->ops->get_vport_stats(edev, &stats);
 825
 826         for (num = 0; num < n; num++)
 827                 xstats[num].value = *(u64 *)(((char *)&stats) +
 828                                              qede_xstats_strings[num].offset);
 829
 830         return num;
 831 }
 832
 833 static void
 834 qede_reset_xstats(struct rte_eth_dev *dev)
 835 {
 836         struct qede_dev *qdev = dev->data->dev_private;
 837         struct ecore_dev *edev = &qdev->edev;
 838
 839         ecore_reset_vport_stats(edev);
 840 }
 841
 842 int qede_dev_set_link_state(struct rte_eth_dev *eth_dev, bool link_up)
 843 {
 844         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 845         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 846         struct qed_link_params link_params;
 847         int rc;
 848
 849         DP_INFO(edev, "setting link state %d\n", link_up);
 850         memset(&link_params, 0, sizeof(link_params));
 851         link_params.link_up = link_up;
 852         rc = qdev->ops->common->set_link(edev, &link_params);
 853         if (rc != ECORE_SUCCESS)
 854                 DP_ERR(edev, "Unable to set link state %d\n", link_up);
 855
 856         return rc;
 857 }
 858
 859 static int qede_dev_set_link_up(struct rte_eth_dev *eth_dev)
 860 {
 861         return qede_dev_set_link_state(eth_dev, true);
 862 }
 863
 864 static int qede_dev_set_link_down(struct rte_eth_dev *eth_dev)
 865 {
 866         return qede_dev_set_link_state(eth_dev, false);
 867 }
 868
 869 static void qede_reset_stats(struct rte_eth_dev *eth_dev)
 870 {
 871         struct qede_dev *qdev = eth_dev->data->dev_private;
 872         struct ecore_dev *edev = &qdev->edev;
 873
 874         ecore_reset_vport_stats(edev);
 875 }
 876
 877 static void qede_allmulticast_enable(struct rte_eth_dev *eth_dev)
 878 {
 879         enum qed_filter_rx_mode_type type =
 880             QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
 881
 882         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
 883                 type |= QED_FILTER_RX_MODE_TYPE_PROMISC;
 884
 885         qede_rx_mode_setting(eth_dev, type);
 886 }
 887
 888 static void qede_allmulticast_disable(struct rte_eth_dev *eth_dev)
 889 {
 890         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
 891                 qede_rx_mode_setting(eth_dev, QED_FILTER_RX_MODE_TYPE_PROMISC);
 892         else
 893                 qede_rx_mode_setting(eth_dev, QED_FILTER_RX_MODE_TYPE_REGULAR);
 894 }
 895
 896 static int qede_flow_ctrl_set(struct rte_eth_dev *eth_dev,
 897                               struct rte_eth_fc_conf *fc_conf)
 898 {
 899         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 900         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 901         struct qed_link_output current_link;
 902         struct qed_link_params params;
 903
 904         memset(&current_link, 0, sizeof(current_link));
 905         qdev->ops->common->get_link(edev, &current_link);
 906
 907         memset(&params, 0, sizeof(params));
 908         params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
 909         if (fc_conf->autoneg) {
 910                 if (!(current_link.supported_caps & QEDE_SUPPORTED_AUTONEG)) {
 911                         DP_ERR(edev, "Autoneg not supported\n");
 912                         return -EINVAL;
 913                 }
 914                 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
 915         }
 916
 917         /* Pause is assumed to be supported (SUPPORTED_Pause) */
 918         if (fc_conf->mode == RTE_FC_FULL)
 919                 params.pause_config |= (QED_LINK_PAUSE_TX_ENABLE |
 920                                         QED_LINK_PAUSE_RX_ENABLE);
 921         if (fc_conf->mode == RTE_FC_TX_PAUSE)
 922                 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
 923         if (fc_conf->mode == RTE_FC_RX_PAUSE)
 924                 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
 925
 926         params.link_up = true;
 927         (void)qdev->ops->common->set_link(edev, &params);
 928
 929         return 0;
 930 }
 931
 932 static int qede_flow_ctrl_get(struct rte_eth_dev *eth_dev,
 933                               struct rte_eth_fc_conf *fc_conf)
 934 {
 935         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 936         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 937         struct qed_link_output current_link;
 938
 939         memset(&current_link, 0, sizeof(current_link));
 940         qdev->ops->common->get_link(edev, &current_link);
 941
 942         if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
 943                 fc_conf->autoneg = true;
 944
 945         if (current_link.pause_config & (QED_LINK_PAUSE_RX_ENABLE |
 946                                          QED_LINK_PAUSE_TX_ENABLE))
 947                 fc_conf->mode = RTE_FC_FULL;
 948         else if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
 949                 fc_conf->mode = RTE_FC_RX_PAUSE;
 950         else if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
 951                 fc_conf->mode = RTE_FC_TX_PAUSE;
 952         else
 953                 fc_conf->mode = RTE_FC_NONE;
 954
 955         return 0;
 956 }
 957
 958 static const uint32_t *
 959 qede_dev_supported_ptypes_get(struct rte_eth_dev *eth_dev)
 960 {
 961         static const uint32_t ptypes[] = {
 962                 RTE_PTYPE_L3_IPV4,
 963                 RTE_PTYPE_L3_IPV6,
 964                 RTE_PTYPE_UNKNOWN
 965         };
 966
 967         if (eth_dev->rx_pkt_burst == qede_recv_pkts)
 968                 return ptypes;
 969
 970         return NULL;
 971 }
 972
 973 int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
 974                          struct rte_eth_rss_conf *rss_conf)
 975 {
 976         struct qed_update_vport_params vport_update_params;
 977         struct qede_dev *qdev = eth_dev->data->dev_private;
 978         struct ecore_dev *edev = &qdev->edev;
 979         uint8_t rss_caps;
 980         uint32_t *key = (uint32_t *)rss_conf->rss_key;
 981         uint64_t hf = rss_conf->rss_hf;
 982         int i;
 983
 984         if (hf == 0)
 985                 DP_ERR(edev, "hash function 0 will disable RSS\n");
 986
 987         rss_caps = 0;
 988         rss_caps |= (hf & ETH_RSS_IPV4)              ? ECORE_RSS_IPV4 : 0;
 989         rss_caps |= (hf & ETH_RSS_IPV6)              ? ECORE_RSS_IPV6 : 0;
 990         rss_caps |= (hf & ETH_RSS_IPV6_EX)           ? ECORE_RSS_IPV6 : 0;
 991         rss_caps |= (hf & ETH_RSS_NONFRAG_IPV4_TCP)  ? ECORE_RSS_IPV4_TCP : 0;
 992         rss_caps |= (hf & ETH_RSS_NONFRAG_IPV6_TCP)  ? ECORE_RSS_IPV6_TCP : 0;
 993         rss_caps |= (hf & ETH_RSS_IPV6_TCP_EX)       ? ECORE_RSS_IPV6_TCP : 0;
 994
 995         /* If the mapping doesn't fit any supported, return */
 996         if (rss_caps == 0 && hf != 0)
 997                 return -EINVAL;
 998
 999         memset(&vport_update_params, 0, sizeof(vport_update_params));
1000
1001         if (key != NULL)
1002                 memcpy(qdev->rss_params.rss_key, rss_conf->rss_key,
1003                        rss_conf->rss_key_len);
1004
1005         qdev->rss_params.rss_caps = rss_caps;
1006         memcpy(&vport_update_params.rss_params, &qdev->rss_params,
1007                sizeof(vport_update_params.rss_params));
1008         vport_update_params.update_rss_flg = 1;
1009         vport_update_params.vport_id = 0;
1010
1011         return qdev->ops->vport_update(edev, &vport_update_params);
1012 }
1013
1014 int qede_rss_hash_conf_get(struct rte_eth_dev *eth_dev,
1015                            struct rte_eth_rss_conf *rss_conf)
1016 {
1017         struct qede_dev *qdev = eth_dev->data->dev_private;
1018         uint64_t hf;
1019
1020         if (rss_conf->rss_key_len < sizeof(qdev->rss_params.rss_key))
1021                 return -EINVAL;
1022
1023         if (rss_conf->rss_key)
1024                 memcpy(rss_conf->rss_key, qdev->rss_params.rss_key,
1025                        sizeof(qdev->rss_params.rss_key));
1026
1027         hf = 0;
1028         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV4)     ?
1029                         ETH_RSS_IPV4 : 0;
1030         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6)     ?
1031                         ETH_RSS_IPV6 : 0;
1032         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6)     ?
1033                         ETH_RSS_IPV6_EX : 0;
1034         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV4_TCP) ?
1035                         ETH_RSS_NONFRAG_IPV4_TCP : 0;
1036         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6_TCP) ?
1037                         ETH_RSS_NONFRAG_IPV6_TCP : 0;
1038         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6_TCP) ?
1039                         ETH_RSS_IPV6_TCP_EX : 0;
1040
1041         rss_conf->rss_hf = hf;
1042
1043         return 0;
1044 }
1045
1046 int qede_rss_reta_update(struct rte_eth_dev *eth_dev,
1047                          struct rte_eth_rss_reta_entry64 *reta_conf,
1048                          uint16_t reta_size)
1049 {
1050         struct qed_update_vport_params vport_update_params;
1051         struct qede_dev *qdev = eth_dev->data->dev_private;
1052         struct ecore_dev *edev = &qdev->edev;
1053         uint16_t i, idx, shift;
1054
1055         if (reta_size > ETH_RSS_RETA_SIZE_128) {
1056                 DP_ERR(edev, "reta_size %d is not supported by hardware\n",
1057                        reta_size);
1058                 return -EINVAL;
1059         }
1060
1061         memset(&vport_update_params, 0, sizeof(vport_update_params));
1062         memcpy(&vport_update_params.rss_params, &qdev->rss_params,
1063                sizeof(vport_update_params.rss_params));
1064
1065         for (i = 0; i < reta_size; i++) {
1066                 idx = i / RTE_RETA_GROUP_SIZE;
1067                 shift = i % RTE_RETA_GROUP_SIZE;
1068                 if (reta_conf[idx].mask & (1ULL << shift)) {
1069                         uint8_t entry = reta_conf[idx].reta[shift];
1070                         qdev->rss_params.rss_ind_table[i] = entry;
1071                 }
1072         }
1073
1074         vport_update_params.update_rss_flg = 1;
1075         vport_update_params.vport_id = 0;
1076
1077         return qdev->ops->vport_update(edev, &vport_update_params);
1078 }
1079
1080 int qede_rss_reta_query(struct rte_eth_dev *eth_dev,
1081                         struct rte_eth_rss_reta_entry64 *reta_conf,
1082                         uint16_t reta_size)
1083 {
1084         struct qede_dev *qdev = eth_dev->data->dev_private;
1085         uint16_t i, idx, shift;
1086
1087         if (reta_size > ETH_RSS_RETA_SIZE_128) {
1088                 struct ecore_dev *edev = &qdev->edev;
1089                 DP_ERR(edev, "reta_size %d is not supported\n",
1090                        reta_size);
1091         }
1092
1093         for (i = 0; i < reta_size; i++) {
1094                 idx = i / RTE_RETA_GROUP_SIZE;
1095                 shift = i % RTE_RETA_GROUP_SIZE;
1096                 if (reta_conf[idx].mask & (1ULL << shift)) {
1097                         uint8_t entry = qdev->rss_params.rss_ind_table[i];
1098                         reta_conf[idx].reta[shift] = entry;
1099                 }
1100         }
1101
1102         return 0;
1103 }
1104
1105 int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1106 {
1107         uint32_t frame_size;
1108         struct qede_dev *qdev = dev->data->dev_private;
1109         struct rte_eth_dev_info dev_info = {0};
1110
1111         qede_dev_info_get(dev, &dev_info);
1112
1113         /* VLAN_TAG = 4 */
1114         frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + 4;
1115
1116         if ((mtu < ETHER_MIN_MTU) || (frame_size > dev_info.max_rx_pktlen))
1117                 return -EINVAL;
1118
1119         if (!dev->data->scattered_rx &&
1120             frame_size > dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)
1121                 return -EINVAL;
1122
1123         if (frame_size > ETHER_MAX_LEN)
1124                 dev->data->dev_conf.rxmode.jumbo_frame = 1;
1125         else
1126                 dev->data->dev_conf.rxmode.jumbo_frame = 0;
1127
1128         /* update max frame size */
1129         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1130         qdev->mtu = mtu;
1131         qede_dev_stop(dev);
1132         qede_dev_start(dev);
1133
1134         return 0;
1135 }
1136
1137 static const struct eth_dev_ops qede_eth_dev_ops = {
1138         .dev_configure = qede_dev_configure,
1139         .dev_infos_get = qede_dev_info_get,
1140         .rx_queue_setup = qede_rx_queue_setup,
1141         .rx_queue_release = qede_rx_queue_release,
1142         .tx_queue_setup = qede_tx_queue_setup,
1143         .tx_queue_release = qede_tx_queue_release,
1144         .dev_start = qede_dev_start,
1145         .dev_set_link_up = qede_dev_set_link_up,
1146         .dev_set_link_down = qede_dev_set_link_down,
1147         .link_update = qede_link_update,
1148         .promiscuous_enable = qede_promiscuous_enable,
1149         .promiscuous_disable = qede_promiscuous_disable,
1150         .allmulticast_enable = qede_allmulticast_enable,
1151         .allmulticast_disable = qede_allmulticast_disable,
1152         .dev_stop = qede_dev_stop,
1153         .dev_close = qede_dev_close,
1154         .stats_get = qede_get_stats,
1155         .stats_reset = qede_reset_stats,
1156         .xstats_get = qede_get_xstats,
1157         .xstats_reset = qede_reset_xstats,
1158         .xstats_get_names = qede_get_xstats_names,
1159         .mac_addr_add = qede_mac_addr_add,
1160         .mac_addr_remove = qede_mac_addr_remove,
1161         .mac_addr_set = qede_mac_addr_set,
1162         .vlan_offload_set = qede_vlan_offload_set,
1163         .vlan_filter_set = qede_vlan_filter_set,
1164         .flow_ctrl_set = qede_flow_ctrl_set,
1165         .flow_ctrl_get = qede_flow_ctrl_get,
1166         .dev_supported_ptypes_get = qede_dev_supported_ptypes_get,
1167         .rss_hash_update = qede_rss_hash_update,
1168         .rss_hash_conf_get = qede_rss_hash_conf_get,
1169         .reta_update  = qede_rss_reta_update,
1170         .reta_query  = qede_rss_reta_query,
1171         .mtu_set = qede_set_mtu,
1172 };
1173
1174 static const struct eth_dev_ops qede_eth_vf_dev_ops = {
1175         .dev_configure = qede_dev_configure,
1176         .dev_infos_get = qede_dev_info_get,
1177         .rx_queue_setup = qede_rx_queue_setup,
1178         .rx_queue_release = qede_rx_queue_release,
1179         .tx_queue_setup = qede_tx_queue_setup,
1180         .tx_queue_release = qede_tx_queue_release,
1181         .dev_start = qede_dev_start,
1182         .dev_set_link_up = qede_dev_set_link_up,
1183         .dev_set_link_down = qede_dev_set_link_down,
1184         .link_update = qede_link_update,
1185         .promiscuous_enable = qede_promiscuous_enable,
1186         .promiscuous_disable = qede_promiscuous_disable,
1187         .allmulticast_enable = qede_allmulticast_enable,
1188         .allmulticast_disable = qede_allmulticast_disable,
1189         .dev_stop = qede_dev_stop,
1190         .dev_close = qede_dev_close,
1191         .stats_get = qede_get_stats,
1192         .stats_reset = qede_reset_stats,
1193         .xstats_get = qede_get_xstats,
1194         .xstats_reset = qede_reset_xstats,
1195         .xstats_get_names = qede_get_xstats_names,
1196         .vlan_offload_set = qede_vlan_offload_set,
1197         .vlan_filter_set = qede_vlan_filter_set,
1198         .dev_supported_ptypes_get = qede_dev_supported_ptypes_get,
1199         .rss_hash_update = qede_rss_hash_update,
1200         .rss_hash_conf_get = qede_rss_hash_conf_get,
1201         .reta_update  = qede_rss_reta_update,
1202         .reta_query  = qede_rss_reta_query,
1203         .mtu_set = qede_set_mtu,
1204 };
1205
1206 static void qede_update_pf_params(struct ecore_dev *edev)
1207 {
1208         struct ecore_pf_params pf_params;
1209         /* 32 rx + 32 tx */
1210         memset(&pf_params, 0, sizeof(struct ecore_pf_params));
1211         pf_params.eth_pf_params.num_cons = 64;
1212         qed_ops->common->update_pf_params(edev, &pf_params);
1213 }
1214
1215 static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
1216 {
1217         struct rte_pci_device *pci_dev;
1218         struct rte_pci_addr pci_addr;
1219         struct qede_dev *adapter;
1220         struct ecore_dev *edev;
1221         struct qed_dev_eth_info dev_info;
1222         struct qed_slowpath_params params;
1223         uint32_t qed_ver;
1224         static bool do_once = true;
1225         uint8_t bulletin_change;
1226         uint8_t vf_mac[ETHER_ADDR_LEN];
1227         uint8_t is_mac_forced;
1228         bool is_mac_exist;
1229         /* Fix up ecore debug level */
1230         uint32_t dp_module = ~0 & ~ECORE_MSG_HW;
1231         uint8_t dp_level = ECORE_LEVEL_VERBOSE;
1232         uint32_t max_mac_addrs;
1233         int rc;
1234
1235         /* Extract key data structures */
1236         adapter = eth_dev->data->dev_private;
1237         edev = &adapter->edev;
1238         pci_addr = eth_dev->pci_dev->addr;
1239
1240         PMD_INIT_FUNC_TRACE(edev);
1241
1242         snprintf(edev->name, NAME_SIZE, PCI_SHORT_PRI_FMT ":dpdk-port-%u",
1243                  pci_addr.bus, pci_addr.devid, pci_addr.function,
1244                  eth_dev->data->port_id);
1245
1246         eth_dev->rx_pkt_burst = qede_recv_pkts;
1247         eth_dev->tx_pkt_burst = qede_xmit_pkts;
1248
1249         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1250                 DP_NOTICE(edev, false,
1251                           "Skipping device init from secondary process\n");
1252                 return 0;
1253         }
1254
1255         pci_dev = eth_dev->pci_dev;
1256
1257         rte_eth_copy_pci_info(eth_dev, pci_dev);
1258
1259         qed_ver = qed_get_protocol_version(QED_PROTOCOL_ETH);
1260
1261         qed_ops = qed_get_eth_ops();
1262         if (!qed_ops) {
1263                 DP_ERR(edev, "Failed to get qed_eth_ops_pass\n");
1264                 return -EINVAL;
1265         }
1266
1267         DP_INFO(edev, "Starting qede probe\n");
1268
1269         rc = qed_ops->common->probe(edev, pci_dev, QED_PROTOCOL_ETH,
1270                                     dp_module, dp_level, is_vf);
1271
1272         if (rc != 0) {
1273                 DP_ERR(edev, "qede probe failed rc %d\n", rc);
1274                 return -ENODEV;
1275         }
1276
1277         qede_update_pf_params(edev);
1278
1279         rte_intr_callback_register(&eth_dev->pci_dev->intr_handle,
1280                                    qede_interrupt_handler, (void *)eth_dev);
1281
1282         if (rte_intr_enable(&eth_dev->pci_dev->intr_handle)) {
1283                 DP_ERR(edev, "rte_intr_enable() failed\n");
1284                 return -ENODEV;
1285         }
1286
1287         /* Start the Slowpath-process */
1288         memset(&params, 0, sizeof(struct qed_slowpath_params));
1289         params.int_mode = ECORE_INT_MODE_MSIX;
1290         params.drv_major = QEDE_MAJOR_VERSION;
1291         params.drv_minor = QEDE_MINOR_VERSION;
1292         params.drv_rev = QEDE_REVISION_VERSION;
1293         params.drv_eng = QEDE_ENGINEERING_VERSION;
1294         strncpy((char *)params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1295
1296         /* For CMT mode device do periodic polling for slowpath events.
1297          * This is required since uio device uses only one MSI-x
1298          * interrupt vector but we need one for each engine.
1299          */
1300         if (edev->num_hwfns > 1) {
1301                 rc = rte_eal_alarm_set(timer_period * US_PER_S,
1302                                        qede_poll_sp_sb_cb,
1303                                        (void *)eth_dev);
1304                 if (rc != 0) {
1305                         DP_ERR(edev, "Unable to start periodic"
1306                                      " timer rc %d\n", rc);
1307                         return -EINVAL;
1308                 }
1309         }
1310
1311         rc = qed_ops->common->slowpath_start(edev, &params);
1312         if (rc) {
1313                 DP_ERR(edev, "Cannot start slowpath rc = %d\n", rc);
1314                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1315                                      (void *)eth_dev);
1316                 return -ENODEV;
1317         }
1318
1319         rc = qed_ops->fill_dev_info(edev, &dev_info);
1320         if (rc) {
1321                 DP_ERR(edev, "Cannot get device_info rc %d\n", rc);
1322                 qed_ops->common->slowpath_stop(edev);
1323                 qed_ops->common->remove(edev);
1324                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1325                                      (void *)eth_dev);
1326                 return -ENODEV;
1327         }
1328
1329         qede_alloc_etherdev(adapter, &dev_info);
1330
1331         adapter->ops->common->set_id(edev, edev->name, QEDE_DRV_MODULE_VERSION);
1332
1333         if (!is_vf)
1334                 adapter->dev_info.num_mac_addrs =
1335                         (uint32_t)RESC_NUM(ECORE_LEADING_HWFN(edev),
1336                                             ECORE_MAC);
1337         else
1338                 ecore_vf_get_num_mac_filters(ECORE_LEADING_HWFN(edev),
1339                                              &adapter->dev_info.num_mac_addrs);
1340
1341         /* Allocate memory for storing MAC addr */
1342         eth_dev->data->mac_addrs = rte_zmalloc(edev->name,
1343                                         (ETHER_ADDR_LEN *
1344                                         adapter->dev_info.num_mac_addrs),
1345                                         RTE_CACHE_LINE_SIZE);
1346
1347         if (eth_dev->data->mac_addrs == NULL) {
1348                 DP_ERR(edev, "Failed to allocate MAC address\n");
1349                 qed_ops->common->slowpath_stop(edev);
1350                 qed_ops->common->remove(edev);
1351                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1352                                      (void *)eth_dev);
1353                 return -ENOMEM;
1354         }
1355
1356         if (!is_vf) {
1357                 ether_addr_copy((struct ether_addr *)edev->hwfns[0].
1358                                 hw_info.hw_mac_addr,
1359                                 &eth_dev->data->mac_addrs[0]);
1360                 ether_addr_copy(&eth_dev->data->mac_addrs[0],
1361                                 &adapter->primary_mac);
1362         } else {
1363                 ecore_vf_read_bulletin(ECORE_LEADING_HWFN(edev),
1364                                        &bulletin_change);
1365                 if (bulletin_change) {
1366                         is_mac_exist =
1367                             ecore_vf_bulletin_get_forced_mac(
1368                                                 ECORE_LEADING_HWFN(edev),
1369                                                 vf_mac,
1370                                                 &is_mac_forced);
1371                         if (is_mac_exist && is_mac_forced) {
1372                                 DP_INFO(edev, "VF macaddr received from PF\n");
1373                                 ether_addr_copy((struct ether_addr *)&vf_mac,
1374                                                 &eth_dev->data->mac_addrs[0]);
1375                                 ether_addr_copy(&eth_dev->data->mac_addrs[0],
1376                                                 &adapter->primary_mac);
1377                         } else {
1378                                 DP_NOTICE(edev, false,
1379                                           "No VF macaddr assigned\n");
1380                         }
1381                 }
1382         }
1383
1384         eth_dev->dev_ops = (is_vf) ? &qede_eth_vf_dev_ops : &qede_eth_dev_ops;
1385
1386         if (do_once) {
1387                 qede_print_adapter_info(adapter);
1388                 do_once = false;
1389         }
1390
1391         DP_NOTICE(edev, false, "MAC address : %02x:%02x:%02x:%02x:%02x:%02x\n",
1392                   adapter->primary_mac.addr_bytes[0],
1393                   adapter->primary_mac.addr_bytes[1],
1394                   adapter->primary_mac.addr_bytes[2],
1395                   adapter->primary_mac.addr_bytes[3],
1396                   adapter->primary_mac.addr_bytes[4],
1397                   adapter->primary_mac.addr_bytes[5]);
1398
1399         return rc;
1400 }
1401
1402 static int qedevf_eth_dev_init(struct rte_eth_dev *eth_dev)
1403 {
1404         return qede_common_dev_init(eth_dev, 1);
1405 }
1406
1407 static int qede_eth_dev_init(struct rte_eth_dev *eth_dev)
1408 {
1409         return qede_common_dev_init(eth_dev, 0);
1410 }
1411
1412 static int qede_dev_common_uninit(struct rte_eth_dev *eth_dev)
1413 {
1414         /* only uninitialize in the primary process */
1415         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1416                 return 0;
1417
1418         /* safe to close dev here */
1419         qede_dev_close(eth_dev);
1420
1421         eth_dev->dev_ops = NULL;
1422         eth_dev->rx_pkt_burst = NULL;
1423         eth_dev->tx_pkt_burst = NULL;
1424
1425         if (eth_dev->data->mac_addrs)
1426                 rte_free(eth_dev->data->mac_addrs);
1427
1428         eth_dev->data->mac_addrs = NULL;
1429
1430         return 0;
1431 }
1432
1433 static int qede_eth_dev_uninit(struct rte_eth_dev *eth_dev)
1434 {
1435         return qede_dev_common_uninit(eth_dev);
1436 }
1437
1438 static int qedevf_eth_dev_uninit(struct rte_eth_dev *eth_dev)
1439 {
1440         return qede_dev_common_uninit(eth_dev);
1441 }
1442
1443 static struct rte_pci_id pci_id_qedevf_map[] = {
1444 #define QEDEVF_RTE_PCI_DEVICE(dev) RTE_PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, dev)
1445         {
1446                 QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_VF)
1447         },
1448         {
1449                 QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_IOV)
1450         },
1451         {.vendor_id = 0,}
1452 };
1453
1454 static struct rte_pci_id pci_id_qede_map[] = {
1455 #define QEDE_RTE_PCI_DEVICE(dev) RTE_PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, dev)
1456         {
1457                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_57980E)
1458         },
1459         {
1460                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_57980S)
1461         },
1462         {
1463                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_40)
1464         },
1465         {
1466                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_25)
1467         },
1468         {
1469                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_100)
1470         },
1471         {.vendor_id = 0,}
1472 };
1473
1474 static struct eth_driver rte_qedevf_pmd = {
1475         .pci_drv = {
1476                     .id_table = pci_id_qedevf_map,
1477                     .drv_flags =
1478                     RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1479                     .probe = rte_eth_dev_pci_probe,
1480                     .remove = rte_eth_dev_pci_remove,
1481                    },
1482         .eth_dev_init = qedevf_eth_dev_init,
1483         .eth_dev_uninit = qedevf_eth_dev_uninit,
1484         .dev_private_size = sizeof(struct qede_dev),
1485 };
1486
1487 static struct eth_driver rte_qede_pmd = {
1488         .pci_drv = {
1489                     .id_table = pci_id_qede_map,
1490                     .drv_flags =
1491                     RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1492                     .probe = rte_eth_dev_pci_probe,
1493                     .remove = rte_eth_dev_pci_remove,
1494                    },
1495         .eth_dev_init = qede_eth_dev_init,
1496         .eth_dev_uninit = qede_eth_dev_uninit,
1497         .dev_private_size = sizeof(struct qede_dev),
1498 };
1499
1500 RTE_PMD_REGISTER_PCI(net_qede, rte_qede_pmd.pci_drv);
1501 RTE_PMD_REGISTER_PCI_TABLE(net_qede, pci_id_qede_map);
1502 RTE_PMD_REGISTER_PCI(net_qede_vf, rte_qedevf_pmd.pci_drv);
1503 RTE_PMD_REGISTER_PCI_TABLE(net_qede_vf, pci_id_qedevf_map);