drivers/net/qede/qede_ethdev.c

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9 #include "qede_ethdev.h"
  10 #include <rte_alarm.h>
  11 #include <rte_version.h>
  12
  13 /* Globals */
  14 static const struct qed_eth_ops *qed_ops;
  15 static int64_t timer_period = 1;
  16
  17 struct rte_qede_xstats_name_off {
  18         char name[RTE_ETH_XSTATS_NAME_SIZE];
  19         uint64_t offset;
  20 };
  21
  22 static const struct rte_qede_xstats_name_off qede_xstats_strings[] = {
  23         {"rx_unicast_bytes", offsetof(struct ecore_eth_stats, rx_ucast_bytes)},
  24         {"rx_multicast_bytes",
  25                 offsetof(struct ecore_eth_stats, rx_mcast_bytes)},
  26         {"rx_broadcast_bytes",
  27                 offsetof(struct ecore_eth_stats, rx_bcast_bytes)},
  28         {"rx_unicast_packets", offsetof(struct ecore_eth_stats, rx_ucast_pkts)},
  29         {"rx_multicast_packets",
  30                 offsetof(struct ecore_eth_stats, rx_mcast_pkts)},
  31         {"rx_broadcast_packets",
  32                 offsetof(struct ecore_eth_stats, rx_bcast_pkts)},
  33
  34         {"tx_unicast_bytes", offsetof(struct ecore_eth_stats, tx_ucast_bytes)},
  35         {"tx_multicast_bytes",
  36                 offsetof(struct ecore_eth_stats, tx_mcast_bytes)},
  37         {"tx_broadcast_bytes",
  38                 offsetof(struct ecore_eth_stats, tx_bcast_bytes)},
  39         {"tx_unicast_packets", offsetof(struct ecore_eth_stats, tx_ucast_pkts)},
  40         {"tx_multicast_packets",
  41                 offsetof(struct ecore_eth_stats, tx_mcast_pkts)},
  42         {"tx_broadcast_packets",
  43                 offsetof(struct ecore_eth_stats, tx_bcast_pkts)},
  44
  45         {"rx_64_byte_packets",
  46                 offsetof(struct ecore_eth_stats, rx_64_byte_packets)},
  47         {"rx_65_to_127_byte_packets",
  48                 offsetof(struct ecore_eth_stats, rx_65_to_127_byte_packets)},
  49         {"rx_128_to_255_byte_packets",
  50                 offsetof(struct ecore_eth_stats, rx_128_to_255_byte_packets)},
  51         {"rx_256_to_511_byte_packets",
  52                 offsetof(struct ecore_eth_stats, rx_256_to_511_byte_packets)},
  53         {"rx_512_to_1023_byte_packets",
  54                 offsetof(struct ecore_eth_stats, rx_512_to_1023_byte_packets)},
  55         {"rx_1024_to_1518_byte_packets",
  56                 offsetof(struct ecore_eth_stats, rx_1024_to_1518_byte_packets)},
  57         {"rx_1519_to_1522_byte_packets",
  58                 offsetof(struct ecore_eth_stats, rx_1519_to_1522_byte_packets)},
  59         {"rx_1519_to_2047_byte_packets",
  60                 offsetof(struct ecore_eth_stats, rx_1519_to_2047_byte_packets)},
  61         {"rx_2048_to_4095_byte_packets",
  62                 offsetof(struct ecore_eth_stats, rx_2048_to_4095_byte_packets)},
  63         {"rx_4096_to_9216_byte_packets",
  64                 offsetof(struct ecore_eth_stats, rx_4096_to_9216_byte_packets)},
  65         {"rx_9217_to_16383_byte_packets",
  66                 offsetof(struct ecore_eth_stats,
  67                          rx_9217_to_16383_byte_packets)},
  68         {"tx_64_byte_packets",
  69                 offsetof(struct ecore_eth_stats, tx_64_byte_packets)},
  70         {"tx_65_to_127_byte_packets",
  71                 offsetof(struct ecore_eth_stats, tx_65_to_127_byte_packets)},
  72         {"tx_128_to_255_byte_packets",
  73                 offsetof(struct ecore_eth_stats, tx_128_to_255_byte_packets)},
  74         {"tx_256_to_511_byte_packets",
  75                 offsetof(struct ecore_eth_stats, tx_256_to_511_byte_packets)},
  76         {"tx_512_to_1023_byte_packets",
  77                 offsetof(struct ecore_eth_stats, tx_512_to_1023_byte_packets)},
  78         {"tx_1024_to_1518_byte_packets",
  79                 offsetof(struct ecore_eth_stats, tx_1024_to_1518_byte_packets)},
  80         {"trx_1519_to_1522_byte_packets",
  81                 offsetof(struct ecore_eth_stats, tx_1519_to_2047_byte_packets)},
  82         {"tx_2048_to_4095_byte_packets",
  83                 offsetof(struct ecore_eth_stats, tx_2048_to_4095_byte_packets)},
  84         {"tx_4096_to_9216_byte_packets",
  85                 offsetof(struct ecore_eth_stats, tx_4096_to_9216_byte_packets)},
  86         {"tx_9217_to_16383_byte_packets",
  87                 offsetof(struct ecore_eth_stats,
  88                          tx_9217_to_16383_byte_packets)},
  89
  90         {"rx_mac_crtl_frames",
  91                 offsetof(struct ecore_eth_stats, rx_mac_crtl_frames)},
  92         {"tx_mac_control_frames",
  93                 offsetof(struct ecore_eth_stats, tx_mac_ctrl_frames)},
  94         {"rx_pause_frames", offsetof(struct ecore_eth_stats, rx_pause_frames)},
  95         {"tx_pause_frames", offsetof(struct ecore_eth_stats, tx_pause_frames)},
  96         {"rx_priority_flow_control_frames",
  97                 offsetof(struct ecore_eth_stats, rx_pfc_frames)},
  98         {"tx_priority_flow_control_frames",
  99                 offsetof(struct ecore_eth_stats, tx_pfc_frames)},
 100
 101         {"rx_crc_errors", offsetof(struct ecore_eth_stats, rx_crc_errors)},
 102         {"rx_align_errors", offsetof(struct ecore_eth_stats, rx_align_errors)},
 103         {"rx_carrier_errors",
 104                 offsetof(struct ecore_eth_stats, rx_carrier_errors)},
 105         {"rx_oversize_packet_errors",
 106                 offsetof(struct ecore_eth_stats, rx_oversize_packets)},
 107         {"rx_jabber_errors", offsetof(struct ecore_eth_stats, rx_jabbers)},
 108         {"rx_undersize_packet_errors",
 109                 offsetof(struct ecore_eth_stats, rx_undersize_packets)},
 110         {"rx_fragments", offsetof(struct ecore_eth_stats, rx_fragments)},
 111         {"rx_host_buffer_not_available",
 112                 offsetof(struct ecore_eth_stats, no_buff_discards)},
 113         /* Number of packets discarded because they are bigger than MTU */
 114         {"rx_packet_too_big_discards",
 115                 offsetof(struct ecore_eth_stats, packet_too_big_discard)},
 116         {"rx_ttl_zero_discards",
 117                 offsetof(struct ecore_eth_stats, ttl0_discard)},
 118         {"rx_multi_function_tag_filter_discards",
 119                 offsetof(struct ecore_eth_stats, mftag_filter_discards)},
 120         {"rx_mac_filter_discards",
 121                 offsetof(struct ecore_eth_stats, mac_filter_discards)},
 122         {"rx_hw_buffer_truncates",
 123                 offsetof(struct ecore_eth_stats, brb_truncates)},
 124         {"rx_hw_buffer_discards",
 125                 offsetof(struct ecore_eth_stats, brb_discards)},
 126         {"tx_lpi_entry_count",
 127                 offsetof(struct ecore_eth_stats, tx_lpi_entry_count)},
 128         {"tx_total_collisions",
 129                 offsetof(struct ecore_eth_stats, tx_total_collisions)},
 130         {"tx_error_drop_packets",
 131                 offsetof(struct ecore_eth_stats, tx_err_drop_pkts)},
 132
 133         {"rx_mac_bytes", offsetof(struct ecore_eth_stats, rx_mac_bytes)},
 134         {"rx_mac_unicast_packets",
 135                 offsetof(struct ecore_eth_stats, rx_mac_uc_packets)},
 136         {"rx_mac_multicast_packets",
 137                 offsetof(struct ecore_eth_stats, rx_mac_mc_packets)},
 138         {"rx_mac_broadcast_packets",
 139                 offsetof(struct ecore_eth_stats, rx_mac_bc_packets)},
 140         {"rx_mac_frames_ok",
 141                 offsetof(struct ecore_eth_stats, rx_mac_frames_ok)},
 142         {"tx_mac_bytes", offsetof(struct ecore_eth_stats, tx_mac_bytes)},
 143         {"tx_mac_unicast_packets",
 144                 offsetof(struct ecore_eth_stats, tx_mac_uc_packets)},
 145         {"tx_mac_multicast_packets",
 146                 offsetof(struct ecore_eth_stats, tx_mac_mc_packets)},
 147         {"tx_mac_broadcast_packets",
 148                 offsetof(struct ecore_eth_stats, tx_mac_bc_packets)},
 149
 150         {"lro_coalesced_packets",
 151                 offsetof(struct ecore_eth_stats, tpa_coalesced_pkts)},
 152         {"lro_coalesced_events",
 153                 offsetof(struct ecore_eth_stats, tpa_coalesced_events)},
 154         {"lro_aborts_num",
 155                 offsetof(struct ecore_eth_stats, tpa_aborts_num)},
 156         {"lro_not_coalesced_packets",
 157                 offsetof(struct ecore_eth_stats, tpa_not_coalesced_pkts)},
 158         {"lro_coalesced_bytes",
 159                 offsetof(struct ecore_eth_stats, tpa_coalesced_bytes)},
 160 };
 161
 162 static const struct rte_qede_xstats_name_off qede_rxq_xstats_strings[] = {
 163         {"rx_q_segments",
 164                 offsetof(struct qede_rx_queue, rx_segs)},
 165         {"rx_q_hw_errors",
 166                 offsetof(struct qede_rx_queue, rx_hw_errors)},
 167         {"rx_q_allocation_errors",
 168                 offsetof(struct qede_rx_queue, rx_alloc_errors)}
 169 };
 170
 171 static void qede_interrupt_action(struct ecore_hwfn *p_hwfn)
 172 {
 173         ecore_int_sp_dpc((osal_int_ptr_t)(p_hwfn));
 174 }
 175
 176 static void
 177 qede_interrupt_handler(struct rte_intr_handle *handle, void *param)
 178 {
 179         struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
 180         struct qede_dev *qdev = eth_dev->data->dev_private;
 181         struct ecore_dev *edev = &qdev->edev;
 182
 183         qede_interrupt_action(ECORE_LEADING_HWFN(edev));
 184         if (rte_intr_enable(handle))
 185                 DP_ERR(edev, "rte_intr_enable failed\n");
 186 }
 187
 188 static void
 189 qede_alloc_etherdev(struct qede_dev *qdev, struct qed_dev_eth_info *info)
 190 {
 191         rte_memcpy(&qdev->dev_info, info, sizeof(*info));
 192         qdev->num_tc = qdev->dev_info.num_tc;
 193         qdev->ops = qed_ops;
 194 }
 195
 196 static void qede_print_adapter_info(struct qede_dev *qdev)
 197 {
 198         struct ecore_dev *edev = &qdev->edev;
 199         struct qed_dev_info *info = &qdev->dev_info.common;
 200         static char drv_ver[QEDE_PMD_DRV_VER_STR_SIZE];
 201         static char ver_str[QEDE_PMD_DRV_VER_STR_SIZE];
 202
 203         DP_INFO(edev, "*********************************\n");
 204         DP_INFO(edev, " DPDK version:%s\n", rte_version());
 205         DP_INFO(edev, " Chip details : %s%d\n",
 206                   ECORE_IS_BB(edev) ? "BB" : "AH",
 207                   CHIP_REV_IS_A0(edev) ? 0 : 1);
 208         snprintf(ver_str, QEDE_PMD_DRV_VER_STR_SIZE, "%d.%d.%d.%d",
 209                  info->fw_major, info->fw_minor, info->fw_rev, info->fw_eng);
 210         snprintf(drv_ver, QEDE_PMD_DRV_VER_STR_SIZE, "%s_%s",
 211                  ver_str, QEDE_PMD_VERSION);
 212         DP_INFO(edev, " Driver version : %s\n", drv_ver);
 213         DP_INFO(edev, " Firmware version : %s\n", ver_str);
 214
 215         snprintf(ver_str, MCP_DRV_VER_STR_SIZE,
 216                  "%d.%d.%d.%d",
 217                 (info->mfw_rev >> 24) & 0xff,
 218                 (info->mfw_rev >> 16) & 0xff,
 219                 (info->mfw_rev >> 8) & 0xff, (info->mfw_rev) & 0xff);
 220         DP_INFO(edev, " Management Firmware version : %s\n", ver_str);
 221         DP_INFO(edev, " Firmware file : %s\n", fw_file);
 222         DP_INFO(edev, "*********************************\n");
 223 }
 224
 225 static int
 226 qede_set_ucast_rx_mac(struct qede_dev *qdev,
 227                       enum qed_filter_xcast_params_type opcode,
 228                       uint8_t mac[ETHER_ADDR_LEN])
 229 {
 230         struct ecore_dev *edev = &qdev->edev;
 231         struct qed_filter_params filter_cmd;
 232
 233         memset(&filter_cmd, 0, sizeof(filter_cmd));
 234         filter_cmd.type = QED_FILTER_TYPE_UCAST;
 235         filter_cmd.filter.ucast.type = opcode;
 236         filter_cmd.filter.ucast.mac_valid = 1;
 237         rte_memcpy(&filter_cmd.filter.ucast.mac[0], &mac[0], ETHER_ADDR_LEN);
 238         return qdev->ops->filter_config(edev, &filter_cmd);
 239 }
 240
 241 static void
 242 qede_mac_addr_add(struct rte_eth_dev *eth_dev, struct ether_addr *mac_addr,
 243                   uint32_t index, __rte_unused uint32_t pool)
 244 {
 245         struct qede_dev *qdev = eth_dev->data->dev_private;
 246         struct ecore_dev *edev = &qdev->edev;
 247         int rc;
 248
 249         PMD_INIT_FUNC_TRACE(edev);
 250
 251         if (index >= qdev->dev_info.num_mac_addrs) {
 252                 DP_ERR(edev, "Index %u is above MAC filter limit %u\n",
 253                        index, qdev->dev_info.num_mac_addrs);
 254                 return;
 255         }
 256
 257         /* Adding macaddr even though promiscuous mode is set */
 258         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
 259                 DP_INFO(edev, "Port is in promisc mode, yet adding it\n");
 260
 261         /* Add MAC filters according to the unicast secondary macs */
 262         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_ADD,
 263                                    mac_addr->addr_bytes);
 264         if (rc)
 265                 DP_ERR(edev, "Unable to add macaddr rc=%d\n", rc);
 266 }
 267
 268 static void
 269 qede_mac_addr_remove(struct rte_eth_dev *eth_dev, uint32_t index)
 270 {
 271         struct qede_dev *qdev = eth_dev->data->dev_private;
 272         struct ecore_dev *edev = &qdev->edev;
 273         struct ether_addr mac_addr;
 274         int rc;
 275
 276         PMD_INIT_FUNC_TRACE(edev);
 277
 278         if (index >= qdev->dev_info.num_mac_addrs) {
 279                 DP_ERR(edev, "Index %u is above MAC filter limit %u\n",
 280                        index, qdev->dev_info.num_mac_addrs);
 281                 return;
 282         }
 283
 284         /* Use the index maintained by rte */
 285         ether_addr_copy(&eth_dev->data->mac_addrs[index], &mac_addr);
 286         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_DEL,
 287                                    mac_addr.addr_bytes);
 288         if (rc)
 289                 DP_ERR(edev, "Unable to remove macaddr rc=%d\n", rc);
 290 }
 291
 292 static void
 293 qede_mac_addr_set(struct rte_eth_dev *eth_dev, struct ether_addr *mac_addr)
 294 {
 295         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 296         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 297         int rc;
 298
 299         if (IS_VF(edev) && !ecore_vf_check_mac(ECORE_LEADING_HWFN(edev),
 300                                                mac_addr->addr_bytes)) {
 301                 DP_ERR(edev, "Setting MAC address is not allowed\n");
 302                 ether_addr_copy(&qdev->primary_mac,
 303                                 &eth_dev->data->mac_addrs[0]);
 304                 return;
 305         }
 306
 307         /* First remove the primary mac */
 308         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_DEL,
 309                                    qdev->primary_mac.addr_bytes);
 310
 311         if (rc) {
 312                 DP_ERR(edev, "Unable to remove current macaddr"
 313                              " Reverting to previous default mac\n");
 314                 ether_addr_copy(&qdev->primary_mac,
 315                                 &eth_dev->data->mac_addrs[0]);
 316                 return;
 317         }
 318
 319         /* Add new MAC */
 320         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_ADD,
 321                                    mac_addr->addr_bytes);
 322
 323         if (rc)
 324                 DP_ERR(edev, "Unable to add new default mac\n");
 325         else
 326                 ether_addr_copy(mac_addr, &qdev->primary_mac);
 327 }
 328
 329
 330
 331
 332 static void qede_config_accept_any_vlan(struct qede_dev *qdev, bool action)
 333 {
 334         struct ecore_dev *edev = &qdev->edev;
 335         struct qed_update_vport_params params = {
 336                 .vport_id = 0,
 337                 .accept_any_vlan = action,
 338                 .update_accept_any_vlan_flg = 1,
 339         };
 340         int rc;
 341
 342         /* Proceed only if action actually needs to be performed */
 343         if (qdev->accept_any_vlan == action)
 344                 return;
 345
 346         rc = qdev->ops->vport_update(edev, &params);
 347         if (rc) {
 348                 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
 349                        action ? "enable" : "disable");
 350         } else {
 351                 DP_INFO(edev, "%s accept-any-vlan\n",
 352                         action ? "enabled" : "disabled");
 353                 qdev->accept_any_vlan = action;
 354         }
 355 }
 356
 357 static int qede_vlan_stripping(struct rte_eth_dev *eth_dev, bool set_stripping)
 358 {
 359         struct qed_update_vport_params vport_update_params;
 360         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 361         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 362         int rc;
 363
 364         memset(&vport_update_params, 0, sizeof(vport_update_params));
 365         vport_update_params.vport_id = 0;
 366         vport_update_params.update_inner_vlan_removal_flg = 1;
 367         vport_update_params.inner_vlan_removal_flg = set_stripping;
 368         rc = qdev->ops->vport_update(edev, &vport_update_params);
 369         if (rc) {
 370                 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
 371                 return rc;
 372         }
 373
 374         return 0;
 375 }
 376
 377 static void qede_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
 378 {
 379         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 380         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 381         struct rte_eth_rxmode *rxmode = &eth_dev->data->dev_conf.rxmode;
 382
 383         if (mask & ETH_VLAN_STRIP_MASK) {
 384                 if (rxmode->hw_vlan_strip)
 385                         (void)qede_vlan_stripping(eth_dev, 1);
 386                 else
 387                         (void)qede_vlan_stripping(eth_dev, 0);
 388         }
 389
 390         if (mask & ETH_VLAN_FILTER_MASK) {
 391                 /* VLAN filtering kicks in when a VLAN is added */
 392                 if (rxmode->hw_vlan_filter) {
 393                         qede_vlan_filter_set(eth_dev, 0, 1);
 394                 } else {
 395                         if (qdev->configured_vlans > 1) { /* Excluding VLAN0 */
 396                                 DP_NOTICE(edev, false,
 397                                   " Please remove existing VLAN filters"
 398                                   " before disabling VLAN filtering\n");
 399                                 /* Signal app that VLAN filtering is still
 400                                  * enabled
 401                                  */
 402                                 rxmode->hw_vlan_filter = true;
 403                         } else {
 404                                 qede_vlan_filter_set(eth_dev, 0, 0);
 405                         }
 406                 }
 407         }
 408
 409         if (mask & ETH_VLAN_EXTEND_MASK)
 410                 DP_INFO(edev, "No offloads are supported with VLAN Q-in-Q"
 411                         " and classification is based on outer tag only\n");
 412
 413         DP_INFO(edev, "vlan offload mask %d vlan-strip %d vlan-filter %d\n",
 414                 mask, rxmode->hw_vlan_strip, rxmode->hw_vlan_filter);
 415 }
 416
 417 static int qede_set_ucast_rx_vlan(struct qede_dev *qdev,
 418                                   enum qed_filter_xcast_params_type opcode,
 419                                   uint16_t vid)
 420 {
 421         struct qed_filter_params filter_cmd;
 422         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 423
 424         memset(&filter_cmd, 0, sizeof(filter_cmd));
 425         filter_cmd.type = QED_FILTER_TYPE_UCAST;
 426         filter_cmd.filter.ucast.type = opcode;
 427         filter_cmd.filter.ucast.vlan_valid = 1;
 428         filter_cmd.filter.ucast.vlan = vid;
 429
 430         return qdev->ops->filter_config(edev, &filter_cmd);
 431 }
 432
 433 static int qede_vlan_filter_set(struct rte_eth_dev *eth_dev,
 434                                 uint16_t vlan_id, int on)
 435 {
 436         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 437         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 438         struct qed_dev_eth_info *dev_info = &qdev->dev_info;
 439         struct qede_vlan_entry *tmp = NULL;
 440         struct qede_vlan_entry *vlan;
 441         int rc;
 442
 443         if (on) {
 444                 if (qdev->configured_vlans == dev_info->num_vlan_filters) {
 445                         DP_INFO(edev, "Reached max VLAN filter limit"
 446                                       " enabling accept_any_vlan\n");
 447                         qede_config_accept_any_vlan(qdev, true);
 448                         return 0;
 449                 }
 450
 451                 SLIST_FOREACH(tmp, &qdev->vlan_list_head, list) {
 452                         if (tmp->vid == vlan_id) {
 453                                 DP_ERR(edev, "VLAN %u already configured\n",
 454                                        vlan_id);
 455                                 return -EEXIST;
 456                         }
 457                 }
 458
 459                 vlan = rte_malloc(NULL, sizeof(struct qede_vlan_entry),
 460                                   RTE_CACHE_LINE_SIZE);
 461
 462                 if (!vlan) {
 463                         DP_ERR(edev, "Did not allocate memory for VLAN\n");
 464                         return -ENOMEM;
 465                 }
 466
 467                 rc = qede_set_ucast_rx_vlan(qdev, QED_FILTER_XCAST_TYPE_ADD,
 468                                             vlan_id);
 469                 if (rc) {
 470                         DP_ERR(edev, "Failed to add VLAN %u rc %d\n", vlan_id,
 471                                rc);
 472                         rte_free(vlan);
 473                 } else {
 474                         vlan->vid = vlan_id;
 475                         SLIST_INSERT_HEAD(&qdev->vlan_list_head, vlan, list);
 476                         qdev->configured_vlans++;
 477                         DP_INFO(edev, "VLAN %u added, configured_vlans %u\n",
 478                                 vlan_id, qdev->configured_vlans);
 479                 }
 480         } else {
 481                 SLIST_FOREACH(tmp, &qdev->vlan_list_head, list) {
 482                         if (tmp->vid == vlan_id)
 483                                 break;
 484                 }
 485
 486                 if (!tmp) {
 487                         if (qdev->configured_vlans == 0) {
 488                                 DP_INFO(edev,
 489                                         "No VLAN filters configured yet\n");
 490                                 return 0;
 491                         }
 492
 493                         DP_ERR(edev, "VLAN %u not configured\n", vlan_id);
 494                         return -EINVAL;
 495                 }
 496
 497                 SLIST_REMOVE(&qdev->vlan_list_head, tmp, qede_vlan_entry, list);
 498
 499                 rc = qede_set_ucast_rx_vlan(qdev, QED_FILTER_XCAST_TYPE_DEL,
 500                                             vlan_id);
 501                 if (rc) {
 502                         DP_ERR(edev, "Failed to delete VLAN %u rc %d\n",
 503                                vlan_id, rc);
 504                 } else {
 505                         qdev->configured_vlans--;
 506                         DP_INFO(edev, "VLAN %u removed configured_vlans %u\n",
 507                                 vlan_id, qdev->configured_vlans);
 508                 }
 509         }
 510
 511         return rc;
 512 }
 513
 514 static int qede_init_vport(struct qede_dev *qdev)
 515 {
 516         struct ecore_dev *edev = &qdev->edev;
 517         struct qed_start_vport_params start = {0};
 518         int rc;
 519
 520         start.remove_inner_vlan = 1;
 521         start.gro_enable = 0;
 522         start.mtu = ETHER_MTU + QEDE_ETH_OVERHEAD;
 523         start.vport_id = 0;
 524         start.drop_ttl0 = false;
 525         start.clear_stats = 1;
 526         start.handle_ptp_pkts = 0;
 527
 528         rc = qdev->ops->vport_start(edev, &start);
 529         if (rc) {
 530                 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
 531                 return rc;
 532         }
 533
 534         DP_INFO(edev,
 535                 "Start vport ramrod passed, vport_id = %d, MTU = %u\n",
 536                 start.vport_id, ETHER_MTU);
 537
 538         return 0;
 539 }
 540
 541 static int qede_dev_configure(struct rte_eth_dev *eth_dev)
 542 {
 543         struct qede_dev *qdev = eth_dev->data->dev_private;
 544         struct ecore_dev *edev = &qdev->edev;
 545         struct rte_eth_rxmode *rxmode = &eth_dev->data->dev_conf.rxmode;
 546         int rc, i, j;
 547
 548         PMD_INIT_FUNC_TRACE(edev);
 549
 550         /* Check requirements for 100G mode */
 551         if (edev->num_hwfns > 1) {
 552                 if (eth_dev->data->nb_rx_queues < 2 ||
 553                     eth_dev->data->nb_tx_queues < 2) {
 554                         DP_NOTICE(edev, false,
 555                                   "100G mode needs min. 2 RX/TX queues\n");
 556                         return -EINVAL;
 557                 }
 558
 559                 if ((eth_dev->data->nb_rx_queues % 2 != 0) ||
 560                     (eth_dev->data->nb_tx_queues % 2 != 0)) {
 561                         DP_NOTICE(edev, false,
 562                                   "100G mode needs even no. of RX/TX queues\n");
 563                         return -EINVAL;
 564                 }
 565         }
 566
 567         /* Sanity checks and throw warnings */
 568         if (rxmode->enable_scatter == 1)
 569                 eth_dev->data->scattered_rx = 1;
 570
 571         if (rxmode->enable_lro == 1) {
 572                 DP_INFO(edev, "LRO is not supported\n");
 573                 return -EINVAL;
 574         }
 575
 576         if (!rxmode->hw_strip_crc)
 577                 DP_INFO(edev, "L2 CRC stripping is always enabled in hw\n");
 578
 579         if (!rxmode->hw_ip_checksum)
 580                 DP_INFO(edev, "IP/UDP/TCP checksum offload is always enabled "
 581                               "in hw\n");
 582
 583         /* Check for the port restart case */
 584         if (qdev->state != QEDE_DEV_INIT) {
 585                 rc = qdev->ops->vport_stop(edev, 0);
 586                 if (rc != 0)
 587                         return rc;
 588                 qede_dealloc_fp_resc(eth_dev);
 589         }
 590
 591         qdev->fp_num_tx = eth_dev->data->nb_tx_queues;
 592         qdev->fp_num_rx = eth_dev->data->nb_rx_queues;
 593         qdev->num_queues = qdev->fp_num_tx + qdev->fp_num_rx;
 594
 595         /* Fastpath status block should be initialized before sending
 596          * VPORT-START in the case of VF. Anyway, do it for both VF/PF.
 597          */
 598         rc = qede_alloc_fp_resc(qdev);
 599         if (rc != 0)
 600                 return rc;
 601
 602         /* Issue VPORT-START with default config values to allow
 603          * other port configurations early on.
 604          */
 605         rc = qede_init_vport(qdev);
 606         if (rc != 0)
 607                 return rc;
 608
 609         SLIST_INIT(&qdev->vlan_list_head);
 610
 611         /* Add primary mac for PF */
 612         if (IS_PF(edev))
 613                 qede_mac_addr_set(eth_dev, &qdev->primary_mac);
 614
 615         /* Enable VLAN offloads by default */
 616         qede_vlan_offload_set(eth_dev, ETH_VLAN_STRIP_MASK  |
 617                                        ETH_VLAN_FILTER_MASK |
 618                                        ETH_VLAN_EXTEND_MASK);
 619
 620         qdev->state = QEDE_DEV_CONFIG;
 621
 622         DP_INFO(edev, "Allocated RSS=%d TSS=%d (with CoS=%d)\n",
 623                 (int)QEDE_RSS_COUNT(qdev), (int)QEDE_TSS_COUNT(qdev),
 624                 qdev->num_tc);
 625
 626         return 0;
 627 }
 628
 629 /* Info about HW descriptor ring limitations */
 630 static const struct rte_eth_desc_lim qede_rx_desc_lim = {
 631         .nb_max = NUM_RX_BDS_MAX,
 632         .nb_min = 128,
 633         .nb_align = 128 /* lowest common multiple */
 634 };
 635
 636 static const struct rte_eth_desc_lim qede_tx_desc_lim = {
 637         .nb_max = NUM_TX_BDS_MAX,
 638         .nb_min = 256,
 639         .nb_align = 256
 640 };
 641
 642 static void
 643 qede_dev_info_get(struct rte_eth_dev *eth_dev,
 644                   struct rte_eth_dev_info *dev_info)
 645 {
 646         struct qede_dev *qdev = eth_dev->data->dev_private;
 647         struct ecore_dev *edev = &qdev->edev;
 648         struct qed_link_output link;
 649         uint32_t speed_cap = 0;
 650
 651         PMD_INIT_FUNC_TRACE(edev);
 652
 653         dev_info->pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
 654         dev_info->min_rx_bufsize = (uint32_t)(ETHER_MIN_MTU +
 655                                               QEDE_ETH_OVERHEAD);
 656         dev_info->max_rx_pktlen = (uint32_t)ETH_TX_MAX_NON_LSO_PKT_LEN;
 657         dev_info->rx_desc_lim = qede_rx_desc_lim;
 658         dev_info->tx_desc_lim = qede_tx_desc_lim;
 659         dev_info->max_rx_queues = (uint16_t)QEDE_MAX_RSS_CNT(qdev);
 660         dev_info->max_tx_queues = dev_info->max_rx_queues;
 661         dev_info->max_mac_addrs = qdev->dev_info.num_mac_addrs;
 662         if (IS_VF(edev))
 663                 dev_info->max_vfs = 0;
 664         else
 665                 dev_info->max_vfs = (uint16_t)NUM_OF_VFS(&qdev->edev);
 666         dev_info->reta_size = ECORE_RSS_IND_TABLE_SIZE;
 667         dev_info->flow_type_rss_offloads = (uint64_t)QEDE_RSS_OFFLOAD_ALL;
 668
 669         dev_info->default_txconf = (struct rte_eth_txconf) {
 670                 .txq_flags = QEDE_TXQ_FLAGS,
 671         };
 672
 673         dev_info->rx_offload_capa = (DEV_RX_OFFLOAD_VLAN_STRIP |
 674                                      DEV_RX_OFFLOAD_IPV4_CKSUM |
 675                                      DEV_RX_OFFLOAD_UDP_CKSUM |
 676                                      DEV_RX_OFFLOAD_TCP_CKSUM);
 677         dev_info->tx_offload_capa = (DEV_TX_OFFLOAD_VLAN_INSERT |
 678                                      DEV_TX_OFFLOAD_IPV4_CKSUM |
 679                                      DEV_TX_OFFLOAD_UDP_CKSUM |
 680                                      DEV_TX_OFFLOAD_TCP_CKSUM);
 681
 682         memset(&link, 0, sizeof(struct qed_link_output));
 683         qdev->ops->common->get_link(edev, &link);
 684         if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
 685                 speed_cap |= ETH_LINK_SPEED_1G;
 686         if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
 687                 speed_cap |= ETH_LINK_SPEED_10G;
 688         if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G)
 689                 speed_cap |= ETH_LINK_SPEED_25G;
 690         if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
 691                 speed_cap |= ETH_LINK_SPEED_40G;
 692         if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
 693                 speed_cap |= ETH_LINK_SPEED_50G;
 694         if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G)
 695                 speed_cap |= ETH_LINK_SPEED_100G;
 696         dev_info->speed_capa = speed_cap;
 697 }
 698
 699 /* return 0 means link status changed, -1 means not changed */
 700 static int
 701 qede_link_update(struct rte_eth_dev *eth_dev, __rte_unused int wait_to_complete)
 702 {
 703         struct qede_dev *qdev = eth_dev->data->dev_private;
 704         struct ecore_dev *edev = &qdev->edev;
 705         uint16_t link_duplex;
 706         struct qed_link_output link;
 707         struct rte_eth_link *curr = &eth_dev->data->dev_link;
 708
 709         memset(&link, 0, sizeof(struct qed_link_output));
 710         qdev->ops->common->get_link(edev, &link);
 711
 712         /* Link Speed */
 713         curr->link_speed = link.speed;
 714
 715         /* Link Mode */
 716         switch (link.duplex) {
 717         case QEDE_DUPLEX_HALF:
 718                 link_duplex = ETH_LINK_HALF_DUPLEX;
 719                 break;
 720         case QEDE_DUPLEX_FULL:
 721                 link_duplex = ETH_LINK_FULL_DUPLEX;
 722                 break;
 723         case QEDE_DUPLEX_UNKNOWN:
 724         default:
 725                 link_duplex = -1;
 726         }
 727         curr->link_duplex = link_duplex;
 728
 729         /* Link Status */
 730         curr->link_status = (link.link_up) ? ETH_LINK_UP : ETH_LINK_DOWN;
 731
 732         /* AN */
 733         curr->link_autoneg = (link.supported_caps & QEDE_SUPPORTED_AUTONEG) ?
 734                              ETH_LINK_AUTONEG : ETH_LINK_FIXED;
 735
 736         DP_INFO(edev, "Link - Speed %u Mode %u AN %u Status %u\n",
 737                 curr->link_speed, curr->link_duplex,
 738                 curr->link_autoneg, curr->link_status);
 739
 740         /* return 0 means link status changed, -1 means not changed */
 741         return ((curr->link_status == link.link_up) ? -1 : 0);
 742 }
 743
 744 static void
 745 qede_rx_mode_setting(struct rte_eth_dev *eth_dev,
 746                      enum qed_filter_rx_mode_type accept_flags)
 747 {
 748         struct qede_dev *qdev = eth_dev->data->dev_private;
 749         struct ecore_dev *edev = &qdev->edev;
 750         struct qed_filter_params rx_mode;
 751
 752         DP_INFO(edev, "%s mode %u\n", __func__, accept_flags);
 753
 754         memset(&rx_mode, 0, sizeof(struct qed_filter_params));
 755         rx_mode.type = QED_FILTER_TYPE_RX_MODE;
 756         rx_mode.filter.accept_flags = accept_flags;
 757         qdev->ops->filter_config(edev, &rx_mode);
 758 }
 759
 760 static void qede_promiscuous_enable(struct rte_eth_dev *eth_dev)
 761 {
 762         struct qede_dev *qdev = eth_dev->data->dev_private;
 763         struct ecore_dev *edev = &qdev->edev;
 764
 765         PMD_INIT_FUNC_TRACE(edev);
 766
 767         enum qed_filter_rx_mode_type type = QED_FILTER_RX_MODE_TYPE_PROMISC;
 768
 769         if (rte_eth_allmulticast_get(eth_dev->data->port_id) == 1)
 770                 type |= QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
 771
 772         qede_rx_mode_setting(eth_dev, type);
 773 }
 774
 775 static void qede_promiscuous_disable(struct rte_eth_dev *eth_dev)
 776 {
 777         struct qede_dev *qdev = eth_dev->data->dev_private;
 778         struct ecore_dev *edev = &qdev->edev;
 779
 780         PMD_INIT_FUNC_TRACE(edev);
 781
 782         if (rte_eth_allmulticast_get(eth_dev->data->port_id) == 1)
 783                 qede_rx_mode_setting(eth_dev,
 784                                      QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC);
 785         else
 786                 qede_rx_mode_setting(eth_dev, QED_FILTER_RX_MODE_TYPE_REGULAR);
 787 }
 788
 789 static void qede_poll_sp_sb_cb(void *param)
 790 {
 791         struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
 792         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 793         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 794         int rc;
 795
 796         qede_interrupt_action(ECORE_LEADING_HWFN(edev));
 797         qede_interrupt_action(&edev->hwfns[1]);
 798
 799         rc = rte_eal_alarm_set(timer_period * US_PER_S,
 800                                qede_poll_sp_sb_cb,
 801                                (void *)eth_dev);
 802         if (rc != 0) {
 803                 DP_ERR(edev, "Unable to start periodic"
 804                              " timer rc %d\n", rc);
 805                 assert(false && "Unable to start periodic timer");
 806         }
 807 }
 808
 809 static void qede_dev_close(struct rte_eth_dev *eth_dev)
 810 {
 811         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
 812         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 813         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 814         int rc;
 815
 816         PMD_INIT_FUNC_TRACE(edev);
 817
 818         /* dev_stop() shall cleanup fp resources in hw but without releasing
 819          * dma memories and sw structures so that dev_start() can be called
 820          * by the app without reconfiguration. However, in dev_close() we
 821          * can release all the resources and device can be brought up newly
 822          */
 823         if (qdev->state != QEDE_DEV_STOP)
 824                 qede_dev_stop(eth_dev);
 825         else
 826                 DP_INFO(edev, "Device is already stopped\n");
 827
 828         rc = qdev->ops->vport_stop(edev, 0);
 829         if (rc != 0)
 830                 DP_ERR(edev, "Failed to stop VPORT\n");
 831
 832         qede_dealloc_fp_resc(eth_dev);
 833
 834         qdev->ops->common->slowpath_stop(edev);
 835
 836         qdev->ops->common->remove(edev);
 837
 838         rte_intr_disable(&pci_dev->intr_handle);
 839
 840         rte_intr_callback_unregister(&pci_dev->intr_handle,
 841                                      qede_interrupt_handler, (void *)eth_dev);
 842
 843         if (edev->num_hwfns > 1)
 844                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb, (void *)eth_dev);
 845
 846         qdev->state = QEDE_DEV_INIT; /* Go back to init state */
 847 }
 848
 849 static void
 850 qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
 851 {
 852         struct qede_dev *qdev = eth_dev->data->dev_private;
 853         struct ecore_dev *edev = &qdev->edev;
 854         struct ecore_eth_stats stats;
 855         unsigned int i = 0, j = 0, qid;
 856         struct qede_tx_queue *txq;
 857
 858         qdev->ops->get_vport_stats(edev, &stats);
 859
 860         /* RX Stats */
 861         eth_stats->ipackets = stats.rx_ucast_pkts +
 862             stats.rx_mcast_pkts + stats.rx_bcast_pkts;
 863
 864         eth_stats->ibytes = stats.rx_ucast_bytes +
 865             stats.rx_mcast_bytes + stats.rx_bcast_bytes;
 866
 867         eth_stats->ierrors = stats.rx_crc_errors +
 868             stats.rx_align_errors +
 869             stats.rx_carrier_errors +
 870             stats.rx_oversize_packets +
 871             stats.rx_jabbers + stats.rx_undersize_packets;
 872
 873         eth_stats->rx_nombuf = stats.no_buff_discards;
 874
 875         eth_stats->imissed = stats.mftag_filter_discards +
 876             stats.mac_filter_discards +
 877             stats.no_buff_discards + stats.brb_truncates + stats.brb_discards;
 878
 879         /* TX stats */
 880         eth_stats->opackets = stats.tx_ucast_pkts +
 881             stats.tx_mcast_pkts + stats.tx_bcast_pkts;
 882
 883         eth_stats->obytes = stats.tx_ucast_bytes +
 884             stats.tx_mcast_bytes + stats.tx_bcast_bytes;
 885
 886         eth_stats->oerrors = stats.tx_err_drop_pkts;
 887
 888         /* Queue stats */
 889         for (qid = 0; qid < QEDE_QUEUE_CNT(qdev); qid++) {
 890                 if (qdev->fp_array[qid].type & QEDE_FASTPATH_RX) {
 891                         eth_stats->q_ipackets[i] =
 892                                 *(uint64_t *)(
 893                                         ((char *)(qdev->fp_array[(qid)].rxq)) +
 894                                         offsetof(struct qede_rx_queue,
 895                                         rcv_pkts));
 896                         eth_stats->q_errors[i] =
 897                                 *(uint64_t *)(
 898                                         ((char *)(qdev->fp_array[(qid)].rxq)) +
 899                                         offsetof(struct qede_rx_queue,
 900                                         rx_hw_errors)) +
 901                                 *(uint64_t *)(
 902                                         ((char *)(qdev->fp_array[(qid)].rxq)) +
 903                                         offsetof(struct qede_rx_queue,
 904                                         rx_alloc_errors));
 905                         i++;
 906                 }
 907
 908                 if (qdev->fp_array[qid].type & QEDE_FASTPATH_TX) {
 909                         txq = qdev->fp_array[(qid)].txqs[0];
 910                         eth_stats->q_opackets[j] =
 911                                 *((uint64_t *)(uintptr_t)
 912                                         (((uint64_t)(uintptr_t)(txq)) +
 913                                          offsetof(struct qede_tx_queue,
 914                                                   xmit_pkts)));
 915                         j++;
 916                 }
 917         }
 918 }
 919
 920 static unsigned
 921 qede_get_xstats_count(struct qede_dev *qdev) {
 922         return RTE_DIM(qede_xstats_strings) +
 923                 (RTE_DIM(qede_rxq_xstats_strings) * QEDE_RSS_COUNT(qdev));
 924 }
 925
 926 static int
 927 qede_get_xstats_names(__rte_unused struct rte_eth_dev *dev,
 928                       struct rte_eth_xstat_name *xstats_names, unsigned limit)
 929 {
 930         struct qede_dev *qdev = dev->data->dev_private;
 931         const unsigned int stat_cnt = qede_get_xstats_count(qdev);
 932         unsigned int i, qid, stat_idx = 0;
 933
 934         if (xstats_names != NULL) {
 935                 for (i = 0; i < RTE_DIM(qede_xstats_strings); i++) {
 936                         snprintf(xstats_names[stat_idx].name,
 937                                 sizeof(xstats_names[stat_idx].name),
 938                                 "%s",
 939                                 qede_xstats_strings[i].name);
 940                         stat_idx++;
 941                 }
 942
 943                 for (qid = 0; qid < QEDE_RSS_COUNT(qdev); qid++) {
 944                         for (i = 0; i < RTE_DIM(qede_rxq_xstats_strings); i++) {
 945                                 snprintf(xstats_names[stat_idx].name,
 946                                         sizeof(xstats_names[stat_idx].name),
 947                                         "%.4s%d%s",
 948                                         qede_rxq_xstats_strings[i].name, qid,
 949                                         qede_rxq_xstats_strings[i].name + 4);
 950                                 stat_idx++;
 951                         }
 952                 }
 953         }
 954
 955         return stat_cnt;
 956 }
 957
 958 static int
 959 qede_get_xstats(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 960                 unsigned int n)
 961 {
 962         struct qede_dev *qdev = dev->data->dev_private;
 963         struct ecore_dev *edev = &qdev->edev;
 964         struct ecore_eth_stats stats;
 965         const unsigned int num = qede_get_xstats_count(qdev);
 966         unsigned int i, qid, stat_idx = 0;
 967
 968         if (n < num)
 969                 return num;
 970
 971         qdev->ops->get_vport_stats(edev, &stats);
 972
 973         for (i = 0; i < RTE_DIM(qede_xstats_strings); i++) {
 974                 xstats[stat_idx].value = *(uint64_t *)(((char *)&stats) +
 975                                              qede_xstats_strings[i].offset);
 976                 xstats[stat_idx].id = stat_idx;
 977                 stat_idx++;
 978         }
 979
 980         for (qid = 0; qid < QEDE_QUEUE_CNT(qdev); qid++) {
 981                 if (qdev->fp_array[qid].type & QEDE_FASTPATH_RX) {
 982                         for (i = 0; i < RTE_DIM(qede_rxq_xstats_strings); i++) {
 983                                 xstats[stat_idx].value = *(uint64_t *)(
 984                                         ((char *)(qdev->fp_array[(qid)].rxq)) +
 985                                          qede_rxq_xstats_strings[i].offset);
 986                                 xstats[stat_idx].id = stat_idx;
 987                                 stat_idx++;
 988                         }
 989                 }
 990         }
 991
 992         return stat_idx;
 993 }
 994
 995 static void
 996 qede_reset_xstats(struct rte_eth_dev *dev)
 997 {
 998         struct qede_dev *qdev = dev->data->dev_private;
 999         struct ecore_dev *edev = &qdev->edev;
1000
1001         ecore_reset_vport_stats(edev);
1002 }
1003
1004 int qede_dev_set_link_state(struct rte_eth_dev *eth_dev, bool link_up)
1005 {
1006         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
1007         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
1008         struct qed_link_params link_params;
1009         int rc;
1010
1011         DP_INFO(edev, "setting link state %d\n", link_up);
1012         memset(&link_params, 0, sizeof(link_params));
1013         link_params.link_up = link_up;
1014         rc = qdev->ops->common->set_link(edev, &link_params);
1015         if (rc != ECORE_SUCCESS)
1016                 DP_ERR(edev, "Unable to set link state %d\n", link_up);
1017
1018         return rc;
1019 }
1020
1021 static int qede_dev_set_link_up(struct rte_eth_dev *eth_dev)
1022 {
1023         return qede_dev_set_link_state(eth_dev, true);
1024 }
1025
1026 static int qede_dev_set_link_down(struct rte_eth_dev *eth_dev)
1027 {
1028         return qede_dev_set_link_state(eth_dev, false);
1029 }
1030
1031 static void qede_reset_stats(struct rte_eth_dev *eth_dev)
1032 {
1033         struct qede_dev *qdev = eth_dev->data->dev_private;
1034         struct ecore_dev *edev = &qdev->edev;
1035
1036         ecore_reset_vport_stats(edev);
1037 }
1038
1039 static void qede_allmulticast_enable(struct rte_eth_dev *eth_dev)
1040 {
1041         enum qed_filter_rx_mode_type type =
1042             QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
1043
1044         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
1045                 type |= QED_FILTER_RX_MODE_TYPE_PROMISC;
1046
1047         qede_rx_mode_setting(eth_dev, type);
1048 }
1049
1050 static void qede_allmulticast_disable(struct rte_eth_dev *eth_dev)
1051 {
1052         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
1053                 qede_rx_mode_setting(eth_dev, QED_FILTER_RX_MODE_TYPE_PROMISC);
1054         else
1055                 qede_rx_mode_setting(eth_dev, QED_FILTER_RX_MODE_TYPE_REGULAR);
1056 }
1057
1058 static int qede_flow_ctrl_set(struct rte_eth_dev *eth_dev,
1059                               struct rte_eth_fc_conf *fc_conf)
1060 {
1061         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
1062         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
1063         struct qed_link_output current_link;
1064         struct qed_link_params params;
1065
1066         memset(&current_link, 0, sizeof(current_link));
1067         qdev->ops->common->get_link(edev, &current_link);
1068
1069         memset(&params, 0, sizeof(params));
1070         params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
1071         if (fc_conf->autoneg) {
1072                 if (!(current_link.supported_caps & QEDE_SUPPORTED_AUTONEG)) {
1073                         DP_ERR(edev, "Autoneg not supported\n");
1074                         return -EINVAL;
1075                 }
1076                 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
1077         }
1078
1079         /* Pause is assumed to be supported (SUPPORTED_Pause) */
1080         if (fc_conf->mode == RTE_FC_FULL)
1081                 params.pause_config |= (QED_LINK_PAUSE_TX_ENABLE |
1082                                         QED_LINK_PAUSE_RX_ENABLE);
1083         if (fc_conf->mode == RTE_FC_TX_PAUSE)
1084                 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
1085         if (fc_conf->mode == RTE_FC_RX_PAUSE)
1086                 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
1087
1088         params.link_up = true;
1089         (void)qdev->ops->common->set_link(edev, &params);
1090
1091         return 0;
1092 }
1093
1094 static int qede_flow_ctrl_get(struct rte_eth_dev *eth_dev,
1095                               struct rte_eth_fc_conf *fc_conf)
1096 {
1097         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
1098         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
1099         struct qed_link_output current_link;
1100
1101         memset(&current_link, 0, sizeof(current_link));
1102         qdev->ops->common->get_link(edev, &current_link);
1103
1104         if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
1105                 fc_conf->autoneg = true;
1106
1107         if (current_link.pause_config & (QED_LINK_PAUSE_RX_ENABLE |
1108                                          QED_LINK_PAUSE_TX_ENABLE))
1109                 fc_conf->mode = RTE_FC_FULL;
1110         else if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
1111                 fc_conf->mode = RTE_FC_RX_PAUSE;
1112         else if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
1113                 fc_conf->mode = RTE_FC_TX_PAUSE;
1114         else
1115                 fc_conf->mode = RTE_FC_NONE;
1116
1117         return 0;
1118 }
1119
1120 static const uint32_t *
1121 qede_dev_supported_ptypes_get(struct rte_eth_dev *eth_dev)
1122 {
1123         static const uint32_t ptypes[] = {
1124                 RTE_PTYPE_L3_IPV4,
1125                 RTE_PTYPE_L3_IPV6,
1126                 RTE_PTYPE_UNKNOWN
1127         };
1128
1129         if (eth_dev->rx_pkt_burst == qede_recv_pkts)
1130                 return ptypes;
1131
1132         return NULL;
1133 }
1134
1135 void qede_init_rss_caps(uint8_t *rss_caps, uint64_t hf)
1136 {
1137         *rss_caps = 0;
1138         *rss_caps |= (hf & ETH_RSS_IPV4)              ? ECORE_RSS_IPV4 : 0;
1139         *rss_caps |= (hf & ETH_RSS_IPV6)              ? ECORE_RSS_IPV6 : 0;
1140         *rss_caps |= (hf & ETH_RSS_IPV6_EX)           ? ECORE_RSS_IPV6 : 0;
1141         *rss_caps |= (hf & ETH_RSS_NONFRAG_IPV4_TCP)  ? ECORE_RSS_IPV4_TCP : 0;
1142         *rss_caps |= (hf & ETH_RSS_NONFRAG_IPV6_TCP)  ? ECORE_RSS_IPV6_TCP : 0;
1143         *rss_caps |= (hf & ETH_RSS_IPV6_TCP_EX)       ? ECORE_RSS_IPV6_TCP : 0;
1144 }
1145
1146 static int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
1147                                 struct rte_eth_rss_conf *rss_conf)
1148 {
1149         struct qed_update_vport_params vport_update_params;
1150         struct qede_dev *qdev = eth_dev->data->dev_private;
1151         struct ecore_dev *edev = &qdev->edev;
1152         uint32_t *key = (uint32_t *)rss_conf->rss_key;
1153         uint64_t hf = rss_conf->rss_hf;
1154         int i;
1155
1156         memset(&vport_update_params, 0, sizeof(vport_update_params));
1157
1158         if (hf != 0) {
1159                 /* Enable RSS */
1160                 qede_init_rss_caps(&qdev->rss_params.rss_caps, hf);
1161                 memcpy(&vport_update_params.rss_params, &qdev->rss_params,
1162                        sizeof(vport_update_params.rss_params));
1163                 if (key)
1164                         memcpy(qdev->rss_params.rss_key, rss_conf->rss_key,
1165                                rss_conf->rss_key_len);
1166                 vport_update_params.update_rss_flg = 1;
1167                 qdev->rss_enabled = 1;
1168         } else {
1169                 /* Disable RSS */
1170                 qdev->rss_enabled = 0;
1171         }
1172
1173         /* If the mapping doesn't fit any supported, return */
1174         if (qdev->rss_params.rss_caps == 0 && hf != 0)
1175                 return -EINVAL;
1176
1177         DP_INFO(edev, "%s\n", (vport_update_params.update_rss_flg) ?
1178                                 "Enabling RSS" : "Disabling RSS");
1179
1180         vport_update_params.vport_id = 0;
1181
1182         return qdev->ops->vport_update(edev, &vport_update_params);
1183 }
1184
1185 int qede_rss_hash_conf_get(struct rte_eth_dev *eth_dev,
1186                            struct rte_eth_rss_conf *rss_conf)
1187 {
1188         struct qede_dev *qdev = eth_dev->data->dev_private;
1189         uint64_t hf;
1190
1191         if (rss_conf->rss_key_len < sizeof(qdev->rss_params.rss_key))
1192                 return -EINVAL;
1193
1194         if (rss_conf->rss_key)
1195                 memcpy(rss_conf->rss_key, qdev->rss_params.rss_key,
1196                        sizeof(qdev->rss_params.rss_key));
1197
1198         hf = 0;
1199         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV4)     ?
1200                         ETH_RSS_IPV4 : 0;
1201         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6)     ?
1202                         ETH_RSS_IPV6 : 0;
1203         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6)     ?
1204                         ETH_RSS_IPV6_EX : 0;
1205         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV4_TCP) ?
1206                         ETH_RSS_NONFRAG_IPV4_TCP : 0;
1207         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6_TCP) ?
1208                         ETH_RSS_NONFRAG_IPV6_TCP : 0;
1209         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6_TCP) ?
1210                         ETH_RSS_IPV6_TCP_EX : 0;
1211
1212         rss_conf->rss_hf = hf;
1213
1214         return 0;
1215 }
1216
1217 static int qede_rss_reta_update(struct rte_eth_dev *eth_dev,
1218                                 struct rte_eth_rss_reta_entry64 *reta_conf,
1219                                 uint16_t reta_size)
1220 {
1221         struct qed_update_vport_params vport_update_params;
1222         struct qede_dev *qdev = eth_dev->data->dev_private;
1223         struct ecore_dev *edev = &qdev->edev;
1224         uint16_t i, idx, shift;
1225
1226         if (reta_size > ETH_RSS_RETA_SIZE_128) {
1227                 DP_ERR(edev, "reta_size %d is not supported by hardware\n",
1228                        reta_size);
1229                 return -EINVAL;
1230         }
1231
1232         memset(&vport_update_params, 0, sizeof(vport_update_params));
1233         memcpy(&vport_update_params.rss_params, &qdev->rss_params,
1234                sizeof(vport_update_params.rss_params));
1235
1236         for (i = 0; i < reta_size; i++) {
1237                 idx = i / RTE_RETA_GROUP_SIZE;
1238                 shift = i % RTE_RETA_GROUP_SIZE;
1239                 if (reta_conf[idx].mask & (1ULL << shift)) {
1240                         uint8_t entry = reta_conf[idx].reta[shift];
1241                         qdev->rss_params.rss_ind_table[i] = entry;
1242                 }
1243         }
1244
1245         vport_update_params.update_rss_flg = 1;
1246         vport_update_params.vport_id = 0;
1247
1248         return qdev->ops->vport_update(edev, &vport_update_params);
1249 }
1250
1251 int qede_rss_reta_query(struct rte_eth_dev *eth_dev,
1252                         struct rte_eth_rss_reta_entry64 *reta_conf,
1253                         uint16_t reta_size)
1254 {
1255         struct qede_dev *qdev = eth_dev->data->dev_private;
1256         uint16_t i, idx, shift;
1257
1258         if (reta_size > ETH_RSS_RETA_SIZE_128) {
1259                 struct ecore_dev *edev = &qdev->edev;
1260                 DP_ERR(edev, "reta_size %d is not supported\n",
1261                        reta_size);
1262         }
1263
1264         for (i = 0; i < reta_size; i++) {
1265                 idx = i / RTE_RETA_GROUP_SIZE;
1266                 shift = i % RTE_RETA_GROUP_SIZE;
1267                 if (reta_conf[idx].mask & (1ULL << shift)) {
1268                         uint8_t entry = qdev->rss_params.rss_ind_table[i];
1269                         reta_conf[idx].reta[shift] = entry;
1270                 }
1271         }
1272
1273         return 0;
1274 }
1275
1276 int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1277 {
1278         uint32_t frame_size;
1279         struct qede_dev *qdev = dev->data->dev_private;
1280         struct rte_eth_dev_info dev_info = {0};
1281
1282         qede_dev_info_get(dev, &dev_info);
1283
1284         /* VLAN_TAG = 4 */
1285         frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + 4;
1286
1287         if ((mtu < ETHER_MIN_MTU) || (frame_size > dev_info.max_rx_pktlen))
1288                 return -EINVAL;
1289
1290         if (!dev->data->scattered_rx &&
1291             frame_size > dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)
1292                 return -EINVAL;
1293
1294         if (frame_size > ETHER_MAX_LEN)
1295                 dev->data->dev_conf.rxmode.jumbo_frame = 1;
1296         else
1297                 dev->data->dev_conf.rxmode.jumbo_frame = 0;
1298
1299         /* update max frame size */
1300         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1301         qdev->mtu = mtu;
1302         qede_dev_stop(dev);
1303         qede_dev_start(dev);
1304
1305         return 0;
1306 }
1307
1308 static const struct eth_dev_ops qede_eth_dev_ops = {
1309         .dev_configure = qede_dev_configure,
1310         .dev_infos_get = qede_dev_info_get,
1311         .rx_queue_setup = qede_rx_queue_setup,
1312         .rx_queue_release = qede_rx_queue_release,
1313         .tx_queue_setup = qede_tx_queue_setup,
1314         .tx_queue_release = qede_tx_queue_release,
1315         .dev_start = qede_dev_start,
1316         .dev_set_link_up = qede_dev_set_link_up,
1317         .dev_set_link_down = qede_dev_set_link_down,
1318         .link_update = qede_link_update,
1319         .promiscuous_enable = qede_promiscuous_enable,
1320         .promiscuous_disable = qede_promiscuous_disable,
1321         .allmulticast_enable = qede_allmulticast_enable,
1322         .allmulticast_disable = qede_allmulticast_disable,
1323         .dev_stop = qede_dev_stop,
1324         .dev_close = qede_dev_close,
1325         .stats_get = qede_get_stats,
1326         .stats_reset = qede_reset_stats,
1327         .xstats_get = qede_get_xstats,
1328         .xstats_reset = qede_reset_xstats,
1329         .xstats_get_names = qede_get_xstats_names,
1330         .mac_addr_add = qede_mac_addr_add,
1331         .mac_addr_remove = qede_mac_addr_remove,
1332         .mac_addr_set = qede_mac_addr_set,
1333         .vlan_offload_set = qede_vlan_offload_set,
1334         .vlan_filter_set = qede_vlan_filter_set,
1335         .flow_ctrl_set = qede_flow_ctrl_set,
1336         .flow_ctrl_get = qede_flow_ctrl_get,
1337         .dev_supported_ptypes_get = qede_dev_supported_ptypes_get,
1338         .rss_hash_update = qede_rss_hash_update,
1339         .rss_hash_conf_get = qede_rss_hash_conf_get,
1340         .reta_update  = qede_rss_reta_update,
1341         .reta_query  = qede_rss_reta_query,
1342         .mtu_set = qede_set_mtu,
1343 };
1344
1345 static const struct eth_dev_ops qede_eth_vf_dev_ops = {
1346         .dev_configure = qede_dev_configure,
1347         .dev_infos_get = qede_dev_info_get,
1348         .rx_queue_setup = qede_rx_queue_setup,
1349         .rx_queue_release = qede_rx_queue_release,
1350         .tx_queue_setup = qede_tx_queue_setup,
1351         .tx_queue_release = qede_tx_queue_release,
1352         .dev_start = qede_dev_start,
1353         .dev_set_link_up = qede_dev_set_link_up,
1354         .dev_set_link_down = qede_dev_set_link_down,
1355         .link_update = qede_link_update,
1356         .promiscuous_enable = qede_promiscuous_enable,
1357         .promiscuous_disable = qede_promiscuous_disable,
1358         .allmulticast_enable = qede_allmulticast_enable,
1359         .allmulticast_disable = qede_allmulticast_disable,
1360         .dev_stop = qede_dev_stop,
1361         .dev_close = qede_dev_close,
1362         .stats_get = qede_get_stats,
1363         .stats_reset = qede_reset_stats,
1364         .xstats_get = qede_get_xstats,
1365         .xstats_reset = qede_reset_xstats,
1366         .xstats_get_names = qede_get_xstats_names,
1367         .vlan_offload_set = qede_vlan_offload_set,
1368         .vlan_filter_set = qede_vlan_filter_set,
1369         .dev_supported_ptypes_get = qede_dev_supported_ptypes_get,
1370         .rss_hash_update = qede_rss_hash_update,
1371         .rss_hash_conf_get = qede_rss_hash_conf_get,
1372         .reta_update  = qede_rss_reta_update,
1373         .reta_query  = qede_rss_reta_query,
1374         .mtu_set = qede_set_mtu,
1375 };
1376
1377 static void qede_update_pf_params(struct ecore_dev *edev)
1378 {
1379         struct ecore_pf_params pf_params;
1380         /* 32 rx + 32 tx */
1381         memset(&pf_params, 0, sizeof(struct ecore_pf_params));
1382         pf_params.eth_pf_params.num_cons = 64;
1383         qed_ops->common->update_pf_params(edev, &pf_params);
1384 }
1385
1386 static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
1387 {
1388         struct rte_pci_device *pci_dev;
1389         struct rte_pci_addr pci_addr;
1390         struct qede_dev *adapter;
1391         struct ecore_dev *edev;
1392         struct qed_dev_eth_info dev_info;
1393         struct qed_slowpath_params params;
1394         static bool do_once = true;
1395         uint8_t bulletin_change;
1396         uint8_t vf_mac[ETHER_ADDR_LEN];
1397         uint8_t is_mac_forced;
1398         bool is_mac_exist;
1399         /* Fix up ecore debug level */
1400         uint32_t dp_module = ~0 & ~ECORE_MSG_HW;
1401         uint8_t dp_level = ECORE_LEVEL_VERBOSE;
1402         uint32_t max_mac_addrs;
1403         int rc;
1404
1405         /* Extract key data structures */
1406         adapter = eth_dev->data->dev_private;
1407         edev = &adapter->edev;
1408         pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
1409         pci_addr = pci_dev->addr;
1410
1411         PMD_INIT_FUNC_TRACE(edev);
1412
1413         snprintf(edev->name, NAME_SIZE, PCI_SHORT_PRI_FMT ":dpdk-port-%u",
1414                  pci_addr.bus, pci_addr.devid, pci_addr.function,
1415                  eth_dev->data->port_id);
1416
1417         eth_dev->rx_pkt_burst = qede_recv_pkts;
1418         eth_dev->tx_pkt_burst = qede_xmit_pkts;
1419
1420         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1421                 DP_NOTICE(edev, false,
1422                           "Skipping device init from secondary process\n");
1423                 return 0;
1424         }
1425
1426         rte_eth_copy_pci_info(eth_dev, pci_dev);
1427
1428         qed_ops = qed_get_eth_ops();
1429         if (!qed_ops) {
1430                 DP_ERR(edev, "Failed to get qed_eth_ops_pass\n");
1431                 return -EINVAL;
1432         }
1433
1434         DP_INFO(edev, "Starting qede probe\n");
1435
1436         rc = qed_ops->common->probe(edev, pci_dev, QED_PROTOCOL_ETH,
1437                                     dp_module, dp_level, is_vf);
1438
1439         if (rc != 0) {
1440                 DP_ERR(edev, "qede probe failed rc %d\n", rc);
1441                 return -ENODEV;
1442         }
1443
1444         qede_update_pf_params(edev);
1445
1446         rte_intr_callback_register(&pci_dev->intr_handle,
1447                                    qede_interrupt_handler, (void *)eth_dev);
1448
1449         if (rte_intr_enable(&pci_dev->intr_handle)) {
1450                 DP_ERR(edev, "rte_intr_enable() failed\n");
1451                 return -ENODEV;
1452         }
1453
1454         /* Start the Slowpath-process */
1455         memset(&params, 0, sizeof(struct qed_slowpath_params));
1456         params.int_mode = ECORE_INT_MODE_MSIX;
1457         params.drv_major = QEDE_PMD_VERSION_MAJOR;
1458         params.drv_minor = QEDE_PMD_VERSION_MINOR;
1459         params.drv_rev = QEDE_PMD_VERSION_REVISION;
1460         params.drv_eng = QEDE_PMD_VERSION_PATCH;
1461         strncpy((char *)params.name, QEDE_PMD_VER_PREFIX,
1462                 QEDE_PMD_DRV_VER_STR_SIZE);
1463
1464         /* For CMT mode device do periodic polling for slowpath events.
1465          * This is required since uio device uses only one MSI-x
1466          * interrupt vector but we need one for each engine.
1467          */
1468         if (edev->num_hwfns > 1 && IS_PF(edev)) {
1469                 rc = rte_eal_alarm_set(timer_period * US_PER_S,
1470                                        qede_poll_sp_sb_cb,
1471                                        (void *)eth_dev);
1472                 if (rc != 0) {
1473                         DP_ERR(edev, "Unable to start periodic"
1474                                      " timer rc %d\n", rc);
1475                         return -EINVAL;
1476                 }
1477         }
1478
1479         rc = qed_ops->common->slowpath_start(edev, &params);
1480         if (rc) {
1481                 DP_ERR(edev, "Cannot start slowpath rc = %d\n", rc);
1482                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1483                                      (void *)eth_dev);
1484                 return -ENODEV;
1485         }
1486
1487         rc = qed_ops->fill_dev_info(edev, &dev_info);
1488         if (rc) {
1489                 DP_ERR(edev, "Cannot get device_info rc %d\n", rc);
1490                 qed_ops->common->slowpath_stop(edev);
1491                 qed_ops->common->remove(edev);
1492                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1493                                      (void *)eth_dev);
1494                 return -ENODEV;
1495         }
1496
1497         qede_alloc_etherdev(adapter, &dev_info);
1498
1499         adapter->ops->common->set_id(edev, edev->name, QEDE_PMD_VERSION);
1500
1501         if (!is_vf)
1502                 adapter->dev_info.num_mac_addrs =
1503                         (uint32_t)RESC_NUM(ECORE_LEADING_HWFN(edev),
1504                                             ECORE_MAC);
1505         else
1506                 ecore_vf_get_num_mac_filters(ECORE_LEADING_HWFN(edev),
1507                                              &adapter->dev_info.num_mac_addrs);
1508
1509         /* Allocate memory for storing MAC addr */
1510         eth_dev->data->mac_addrs = rte_zmalloc(edev->name,
1511                                         (ETHER_ADDR_LEN *
1512                                         adapter->dev_info.num_mac_addrs),
1513                                         RTE_CACHE_LINE_SIZE);
1514
1515         if (eth_dev->data->mac_addrs == NULL) {
1516                 DP_ERR(edev, "Failed to allocate MAC address\n");
1517                 qed_ops->common->slowpath_stop(edev);
1518                 qed_ops->common->remove(edev);
1519                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1520                                      (void *)eth_dev);
1521                 return -ENOMEM;
1522         }
1523
1524         if (!is_vf) {
1525                 ether_addr_copy((struct ether_addr *)edev->hwfns[0].
1526                                 hw_info.hw_mac_addr,
1527                                 &eth_dev->data->mac_addrs[0]);
1528                 ether_addr_copy(&eth_dev->data->mac_addrs[0],
1529                                 &adapter->primary_mac);
1530         } else {
1531                 ecore_vf_read_bulletin(ECORE_LEADING_HWFN(edev),
1532                                        &bulletin_change);
1533                 if (bulletin_change) {
1534                         is_mac_exist =
1535                             ecore_vf_bulletin_get_forced_mac(
1536                                                 ECORE_LEADING_HWFN(edev),
1537                                                 vf_mac,
1538                                                 &is_mac_forced);
1539                         if (is_mac_exist && is_mac_forced) {
1540                                 DP_INFO(edev, "VF macaddr received from PF\n");
1541                                 ether_addr_copy((struct ether_addr *)&vf_mac,
1542                                                 &eth_dev->data->mac_addrs[0]);
1543                                 ether_addr_copy(&eth_dev->data->mac_addrs[0],
1544                                                 &adapter->primary_mac);
1545                         } else {
1546                                 DP_NOTICE(edev, false,
1547                                           "No VF macaddr assigned\n");
1548                         }
1549                 }
1550         }
1551
1552         eth_dev->dev_ops = (is_vf) ? &qede_eth_vf_dev_ops : &qede_eth_dev_ops;
1553
1554         if (do_once) {
1555                 qede_print_adapter_info(adapter);
1556                 do_once = false;
1557         }
1558
1559         adapter->state = QEDE_DEV_INIT;
1560
1561         DP_NOTICE(edev, false, "MAC address : %02x:%02x:%02x:%02x:%02x:%02x\n",
1562                   adapter->primary_mac.addr_bytes[0],
1563                   adapter->primary_mac.addr_bytes[1],
1564                   adapter->primary_mac.addr_bytes[2],
1565                   adapter->primary_mac.addr_bytes[3],
1566                   adapter->primary_mac.addr_bytes[4],
1567                   adapter->primary_mac.addr_bytes[5]);
1568
1569         return rc;
1570 }
1571
1572 static int qedevf_eth_dev_init(struct rte_eth_dev *eth_dev)
1573 {
1574         return qede_common_dev_init(eth_dev, 1);
1575 }
1576
1577 static int qede_eth_dev_init(struct rte_eth_dev *eth_dev)
1578 {
1579         return qede_common_dev_init(eth_dev, 0);
1580 }
1581
1582 static int qede_dev_common_uninit(struct rte_eth_dev *eth_dev)
1583 {
1584         /* only uninitialize in the primary process */
1585         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1586                 return 0;
1587
1588         /* safe to close dev here */
1589         qede_dev_close(eth_dev);
1590
1591         eth_dev->dev_ops = NULL;
1592         eth_dev->rx_pkt_burst = NULL;
1593         eth_dev->tx_pkt_burst = NULL;
1594
1595         if (eth_dev->data->mac_addrs)
1596                 rte_free(eth_dev->data->mac_addrs);
1597
1598         eth_dev->data->mac_addrs = NULL;
1599
1600         return 0;
1601 }
1602
1603 static int qede_eth_dev_uninit(struct rte_eth_dev *eth_dev)
1604 {
1605         return qede_dev_common_uninit(eth_dev);
1606 }
1607
1608 static int qedevf_eth_dev_uninit(struct rte_eth_dev *eth_dev)
1609 {
1610         return qede_dev_common_uninit(eth_dev);
1611 }
1612
1613 static struct rte_pci_id pci_id_qedevf_map[] = {
1614 #define QEDEVF_RTE_PCI_DEVICE(dev) RTE_PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, dev)
1615         {
1616                 QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_VF)
1617         },
1618         {
1619                 QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_IOV)
1620         },
1621         {.vendor_id = 0,}
1622 };
1623
1624 static struct rte_pci_id pci_id_qede_map[] = {
1625 #define QEDE_RTE_PCI_DEVICE(dev) RTE_PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, dev)
1626         {
1627                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_57980E)
1628         },
1629         {
1630                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_57980S)
1631         },
1632         {
1633                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_40)
1634         },
1635         {
1636                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_25)
1637         },
1638         {
1639                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_100)
1640         },
1641         {.vendor_id = 0,}
1642 };
1643
1644 static struct eth_driver rte_qedevf_pmd = {
1645         .pci_drv = {
1646                     .id_table = pci_id_qedevf_map,
1647                     .drv_flags =
1648                     RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1649                     .probe = rte_eth_dev_pci_probe,
1650                     .remove = rte_eth_dev_pci_remove,
1651                    },
1652         .eth_dev_init = qedevf_eth_dev_init,
1653         .eth_dev_uninit = qedevf_eth_dev_uninit,
1654         .dev_private_size = sizeof(struct qede_dev),
1655 };
1656
1657 static struct eth_driver rte_qede_pmd = {
1658         .pci_drv = {
1659                     .id_table = pci_id_qede_map,
1660                     .drv_flags =
1661                     RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1662                     .probe = rte_eth_dev_pci_probe,
1663                     .remove = rte_eth_dev_pci_remove,
1664                    },
1665         .eth_dev_init = qede_eth_dev_init,
1666         .eth_dev_uninit = qede_eth_dev_uninit,
1667         .dev_private_size = sizeof(struct qede_dev),
1668 };
1669
1670 RTE_PMD_REGISTER_PCI(net_qede, rte_qede_pmd.pci_drv);
1671 RTE_PMD_REGISTER_PCI_TABLE(net_qede, pci_id_qede_map);
1672 RTE_PMD_REGISTER_KMOD_DEP(net_qede, "* igb_uio | uio_pci_generic | vfio");
1673 RTE_PMD_REGISTER_PCI(net_qede_vf, rte_qedevf_pmd.pci_drv);
1674 RTE_PMD_REGISTER_PCI_TABLE(net_qede_vf, pci_id_qedevf_map);
1675 RTE_PMD_REGISTER_KMOD_DEP(net_qede_vf, "* igb_uio | vfio");