drivers/net/qede/qede_ethdev.c

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9 #include "qede_ethdev.h"
  10 #include <rte_alarm.h>
  11
  12 /* Globals */
  13 static const struct qed_eth_ops *qed_ops;
  14 static const char *drivername = "qede pmd";
  15 static int64_t timer_period = 1;
  16
  17 struct rte_qede_xstats_name_off {
  18         char name[RTE_ETH_XSTATS_NAME_SIZE];
  19         uint64_t offset;
  20 };
  21
  22 static const struct rte_qede_xstats_name_off qede_xstats_strings[] = {
  23         {"rx_unicast_bytes", offsetof(struct ecore_eth_stats, rx_ucast_bytes)},
  24         {"rx_multicast_bytes",
  25                 offsetof(struct ecore_eth_stats, rx_mcast_bytes)},
  26         {"rx_broadcast_bytes",
  27                 offsetof(struct ecore_eth_stats, rx_bcast_bytes)},
  28         {"rx_unicast_packets", offsetof(struct ecore_eth_stats, rx_ucast_pkts)},
  29         {"rx_multicast_packets",
  30                 offsetof(struct ecore_eth_stats, rx_mcast_pkts)},
  31         {"rx_broadcast_packets",
  32                 offsetof(struct ecore_eth_stats, rx_bcast_pkts)},
  33
  34         {"tx_unicast_bytes", offsetof(struct ecore_eth_stats, tx_ucast_bytes)},
  35         {"tx_multicast_bytes",
  36                 offsetof(struct ecore_eth_stats, tx_mcast_bytes)},
  37         {"tx_broadcast_bytes",
  38                 offsetof(struct ecore_eth_stats, tx_bcast_bytes)},
  39         {"tx_unicast_packets", offsetof(struct ecore_eth_stats, tx_ucast_pkts)},
  40         {"tx_multicast_packets",
  41                 offsetof(struct ecore_eth_stats, tx_mcast_pkts)},
  42         {"tx_broadcast_packets",
  43                 offsetof(struct ecore_eth_stats, tx_bcast_pkts)},
  44
  45         {"rx_64_byte_packets",
  46                 offsetof(struct ecore_eth_stats, rx_64_byte_packets)},
  47         {"rx_65_to_127_byte_packets",
  48                 offsetof(struct ecore_eth_stats, rx_65_to_127_byte_packets)},
  49         {"rx_128_to_255_byte_packets",
  50                 offsetof(struct ecore_eth_stats, rx_128_to_255_byte_packets)},
  51         {"rx_256_to_511_byte_packets",
  52                 offsetof(struct ecore_eth_stats, rx_256_to_511_byte_packets)},
  53         {"rx_512_to_1023_byte_packets",
  54                 offsetof(struct ecore_eth_stats, rx_512_to_1023_byte_packets)},
  55         {"rx_1024_to_1518_byte_packets",
  56                 offsetof(struct ecore_eth_stats, rx_1024_to_1518_byte_packets)},
  57         {"rx_1519_to_1522_byte_packets",
  58                 offsetof(struct ecore_eth_stats, rx_1519_to_1522_byte_packets)},
  59         {"rx_1519_to_2047_byte_packets",
  60                 offsetof(struct ecore_eth_stats, rx_1519_to_2047_byte_packets)},
  61         {"rx_2048_to_4095_byte_packets",
  62                 offsetof(struct ecore_eth_stats, rx_2048_to_4095_byte_packets)},
  63         {"rx_4096_to_9216_byte_packets",
  64                 offsetof(struct ecore_eth_stats, rx_4096_to_9216_byte_packets)},
  65         {"rx_9217_to_16383_byte_packets",
  66                 offsetof(struct ecore_eth_stats,
  67                          rx_9217_to_16383_byte_packets)},
  68         {"tx_64_byte_packets",
  69                 offsetof(struct ecore_eth_stats, tx_64_byte_packets)},
  70         {"tx_65_to_127_byte_packets",
  71                 offsetof(struct ecore_eth_stats, tx_65_to_127_byte_packets)},
  72         {"tx_128_to_255_byte_packets",
  73                 offsetof(struct ecore_eth_stats, tx_128_to_255_byte_packets)},
  74         {"tx_256_to_511_byte_packets",
  75                 offsetof(struct ecore_eth_stats, tx_256_to_511_byte_packets)},
  76         {"tx_512_to_1023_byte_packets",
  77                 offsetof(struct ecore_eth_stats, tx_512_to_1023_byte_packets)},
  78         {"tx_1024_to_1518_byte_packets",
  79                 offsetof(struct ecore_eth_stats, tx_1024_to_1518_byte_packets)},
  80         {"trx_1519_to_1522_byte_packets",
  81                 offsetof(struct ecore_eth_stats, tx_1519_to_2047_byte_packets)},
  82         {"tx_2048_to_4095_byte_packets",
  83                 offsetof(struct ecore_eth_stats, tx_2048_to_4095_byte_packets)},
  84         {"tx_4096_to_9216_byte_packets",
  85                 offsetof(struct ecore_eth_stats, tx_4096_to_9216_byte_packets)},
  86         {"tx_9217_to_16383_byte_packets",
  87                 offsetof(struct ecore_eth_stats,
  88                          tx_9217_to_16383_byte_packets)},
  89
  90         {"rx_mac_crtl_frames",
  91                 offsetof(struct ecore_eth_stats, rx_mac_crtl_frames)},
  92         {"tx_mac_control_frames",
  93                 offsetof(struct ecore_eth_stats, tx_mac_ctrl_frames)},
  94         {"rx_pause_frames", offsetof(struct ecore_eth_stats, rx_pause_frames)},
  95         {"tx_pause_frames", offsetof(struct ecore_eth_stats, tx_pause_frames)},
  96         {"rx_priority_flow_control_frames",
  97                 offsetof(struct ecore_eth_stats, rx_pfc_frames)},
  98         {"tx_priority_flow_control_frames",
  99                 offsetof(struct ecore_eth_stats, tx_pfc_frames)},
 100
 101         {"rx_crc_errors", offsetof(struct ecore_eth_stats, rx_crc_errors)},
 102         {"rx_align_errors", offsetof(struct ecore_eth_stats, rx_align_errors)},
 103         {"rx_carrier_errors",
 104                 offsetof(struct ecore_eth_stats, rx_carrier_errors)},
 105         {"rx_oversize_packet_errors",
 106                 offsetof(struct ecore_eth_stats, rx_oversize_packets)},
 107         {"rx_jabber_errors", offsetof(struct ecore_eth_stats, rx_jabbers)},
 108         {"rx_undersize_packet_errors",
 109                 offsetof(struct ecore_eth_stats, rx_undersize_packets)},
 110         {"rx_fragments", offsetof(struct ecore_eth_stats, rx_fragments)},
 111         {"rx_host_buffer_not_available",
 112                 offsetof(struct ecore_eth_stats, no_buff_discards)},
 113         /* Number of packets discarded because they are bigger than MTU */
 114         {"rx_packet_too_big_discards",
 115                 offsetof(struct ecore_eth_stats, packet_too_big_discard)},
 116         {"rx_ttl_zero_discards",
 117                 offsetof(struct ecore_eth_stats, ttl0_discard)},
 118         {"rx_multi_function_tag_filter_discards",
 119                 offsetof(struct ecore_eth_stats, mftag_filter_discards)},
 120         {"rx_mac_filter_discards",
 121                 offsetof(struct ecore_eth_stats, mac_filter_discards)},
 122         {"rx_hw_buffer_truncates",
 123                 offsetof(struct ecore_eth_stats, brb_truncates)},
 124         {"rx_hw_buffer_discards",
 125                 offsetof(struct ecore_eth_stats, brb_discards)},
 126         {"tx_lpi_entry_count",
 127                 offsetof(struct ecore_eth_stats, tx_lpi_entry_count)},
 128         {"tx_total_collisions",
 129                 offsetof(struct ecore_eth_stats, tx_total_collisions)},
 130         {"tx_error_drop_packets",
 131                 offsetof(struct ecore_eth_stats, tx_err_drop_pkts)},
 132
 133         {"rx_mac_bytes", offsetof(struct ecore_eth_stats, rx_mac_bytes)},
 134         {"rx_mac_unicast_packets",
 135                 offsetof(struct ecore_eth_stats, rx_mac_uc_packets)},
 136         {"rx_mac_multicast_packets",
 137                 offsetof(struct ecore_eth_stats, rx_mac_mc_packets)},
 138         {"rx_mac_broadcast_packets",
 139                 offsetof(struct ecore_eth_stats, rx_mac_bc_packets)},
 140         {"rx_mac_frames_ok",
 141                 offsetof(struct ecore_eth_stats, rx_mac_frames_ok)},
 142         {"tx_mac_bytes", offsetof(struct ecore_eth_stats, tx_mac_bytes)},
 143         {"tx_mac_unicast_packets",
 144                 offsetof(struct ecore_eth_stats, tx_mac_uc_packets)},
 145         {"tx_mac_multicast_packets",
 146                 offsetof(struct ecore_eth_stats, tx_mac_mc_packets)},
 147         {"tx_mac_broadcast_packets",
 148                 offsetof(struct ecore_eth_stats, tx_mac_bc_packets)},
 149
 150         {"lro_coalesced_packets",
 151                 offsetof(struct ecore_eth_stats, tpa_coalesced_pkts)},
 152         {"lro_coalesced_events",
 153                 offsetof(struct ecore_eth_stats, tpa_coalesced_events)},
 154         {"lro_aborts_num",
 155                 offsetof(struct ecore_eth_stats, tpa_aborts_num)},
 156         {"lro_not_coalesced_packets",
 157                 offsetof(struct ecore_eth_stats, tpa_not_coalesced_pkts)},
 158         {"lro_coalesced_bytes",
 159                 offsetof(struct ecore_eth_stats, tpa_coalesced_bytes)},
 160 };
 161
 162 static void qede_interrupt_action(struct ecore_hwfn *p_hwfn)
 163 {
 164         ecore_int_sp_dpc((osal_int_ptr_t)(p_hwfn));
 165 }
 166
 167 static void
 168 qede_interrupt_handler(__rte_unused struct rte_intr_handle *handle, void *param)
 169 {
 170         struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
 171         struct qede_dev *qdev = eth_dev->data->dev_private;
 172         struct ecore_dev *edev = &qdev->edev;
 173
 174         qede_interrupt_action(ECORE_LEADING_HWFN(edev));
 175         if (rte_intr_enable(&eth_dev->pci_dev->intr_handle))
 176                 DP_ERR(edev, "rte_intr_enable failed\n");
 177 }
 178
 179 static void
 180 qede_alloc_etherdev(struct qede_dev *qdev, struct qed_dev_eth_info *info)
 181 {
 182         rte_memcpy(&qdev->dev_info, info, sizeof(*info));
 183         qdev->num_tc = qdev->dev_info.num_tc;
 184         qdev->ops = qed_ops;
 185 }
 186
 187 static void qede_print_adapter_info(struct qede_dev *qdev)
 188 {
 189         struct ecore_dev *edev = &qdev->edev;
 190         struct qed_dev_info *info = &qdev->dev_info.common;
 191         static char ver_str[QED_DRV_VER_STR_SIZE];
 192
 193         DP_INFO(edev, "*********************************\n");
 194         DP_INFO(edev, " Chip details : %s%d\n",
 195                 ECORE_IS_BB(edev) ? "BB" : "AH",
 196                 CHIP_REV_IS_A0(edev) ? 0 : 1);
 197
 198         sprintf(ver_str, "%s %s_%d.%d.%d.%d", QEDE_PMD_VER_PREFIX,
 199                 edev->ver_str, QEDE_PMD_VERSION_MAJOR, QEDE_PMD_VERSION_MINOR,
 200                 QEDE_PMD_VERSION_REVISION, QEDE_PMD_VERSION_PATCH);
 201         strcpy(qdev->drv_ver, ver_str);
 202         DP_INFO(edev, " Driver version : %s\n", ver_str);
 203
 204         sprintf(ver_str, "%d.%d.%d.%d", info->fw_major, info->fw_minor,
 205                 info->fw_rev, info->fw_eng);
 206         DP_INFO(edev, " Firmware version : %s\n", ver_str);
 207
 208         sprintf(ver_str, "%d.%d.%d.%d",
 209                 (info->mfw_rev >> 24) & 0xff,
 210                 (info->mfw_rev >> 16) & 0xff,
 211                 (info->mfw_rev >> 8) & 0xff, (info->mfw_rev) & 0xff);
 212         DP_INFO(edev, " Management firmware version : %s\n", ver_str);
 213
 214         DP_INFO(edev, " Firmware file : %s\n", fw_file);
 215
 216         DP_INFO(edev, "*********************************\n");
 217 }
 218
 219 static int
 220 qede_set_ucast_rx_mac(struct qede_dev *qdev,
 221                       enum qed_filter_xcast_params_type opcode,
 222                       uint8_t mac[ETHER_ADDR_LEN])
 223 {
 224         struct ecore_dev *edev = &qdev->edev;
 225         struct qed_filter_params filter_cmd;
 226
 227         memset(&filter_cmd, 0, sizeof(filter_cmd));
 228         filter_cmd.type = QED_FILTER_TYPE_UCAST;
 229         filter_cmd.filter.ucast.type = opcode;
 230         filter_cmd.filter.ucast.mac_valid = 1;
 231         rte_memcpy(&filter_cmd.filter.ucast.mac[0], &mac[0], ETHER_ADDR_LEN);
 232         return qdev->ops->filter_config(edev, &filter_cmd);
 233 }
 234
 235 static void
 236 qede_mac_addr_add(struct rte_eth_dev *eth_dev, struct ether_addr *mac_addr,
 237                   uint32_t index, __rte_unused uint32_t pool)
 238 {
 239         struct qede_dev *qdev = eth_dev->data->dev_private;
 240         struct ecore_dev *edev = &qdev->edev;
 241         int rc;
 242
 243         PMD_INIT_FUNC_TRACE(edev);
 244
 245         if (index >= qdev->dev_info.num_mac_addrs) {
 246                 DP_ERR(edev, "Index %u is above MAC filter limit %u\n",
 247                        index, qdev->dev_info.num_mac_addrs);
 248                 return;
 249         }
 250
 251         /* Adding macaddr even though promiscuous mode is set */
 252         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
 253                 DP_INFO(edev, "Port is in promisc mode, yet adding it\n");
 254
 255         /* Add MAC filters according to the unicast secondary macs */
 256         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_ADD,
 257                                    mac_addr->addr_bytes);
 258         if (rc)
 259                 DP_ERR(edev, "Unable to add macaddr rc=%d\n", rc);
 260 }
 261
 262 static void
 263 qede_mac_addr_remove(struct rte_eth_dev *eth_dev, uint32_t index)
 264 {
 265         struct qede_dev *qdev = eth_dev->data->dev_private;
 266         struct ecore_dev *edev = &qdev->edev;
 267         struct ether_addr mac_addr;
 268         int rc;
 269
 270         PMD_INIT_FUNC_TRACE(edev);
 271
 272         if (index >= qdev->dev_info.num_mac_addrs) {
 273                 DP_ERR(edev, "Index %u is above MAC filter limit %u\n",
 274                        index, qdev->dev_info.num_mac_addrs);
 275                 return;
 276         }
 277
 278         /* Use the index maintained by rte */
 279         ether_addr_copy(&eth_dev->data->mac_addrs[index], &mac_addr);
 280         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_DEL,
 281                                    mac_addr.addr_bytes);
 282         if (rc)
 283                 DP_ERR(edev, "Unable to remove macaddr rc=%d\n", rc);
 284 }
 285
 286 static void
 287 qede_mac_addr_set(struct rte_eth_dev *eth_dev, struct ether_addr *mac_addr)
 288 {
 289         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 290         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 291         int rc;
 292
 293         if (IS_VF(edev) && !ecore_vf_check_mac(ECORE_LEADING_HWFN(edev),
 294                                                mac_addr->addr_bytes)) {
 295                 DP_ERR(edev, "Setting MAC address is not allowed\n");
 296                 ether_addr_copy(&qdev->primary_mac,
 297                                 &eth_dev->data->mac_addrs[0]);
 298                 return;
 299         }
 300
 301         /* First remove the primary mac */
 302         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_DEL,
 303                                    qdev->primary_mac.addr_bytes);
 304
 305         if (rc) {
 306                 DP_ERR(edev, "Unable to remove current macaddr"
 307                              " Reverting to previous default mac\n");
 308                 ether_addr_copy(&qdev->primary_mac,
 309                                 &eth_dev->data->mac_addrs[0]);
 310                 return;
 311         }
 312
 313         /* Add new MAC */
 314         rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_ADD,
 315                                    mac_addr->addr_bytes);
 316
 317         if (rc)
 318                 DP_ERR(edev, "Unable to add new default mac\n");
 319         else
 320                 ether_addr_copy(mac_addr, &qdev->primary_mac);
 321 }
 322
 323
 324
 325
 326 static void qede_config_accept_any_vlan(struct qede_dev *qdev, bool action)
 327 {
 328         struct ecore_dev *edev = &qdev->edev;
 329         struct qed_update_vport_params params = {
 330                 .vport_id = 0,
 331                 .accept_any_vlan = action,
 332                 .update_accept_any_vlan_flg = 1,
 333         };
 334         int rc;
 335
 336         /* Proceed only if action actually needs to be performed */
 337         if (qdev->accept_any_vlan == action)
 338                 return;
 339
 340         rc = qdev->ops->vport_update(edev, &params);
 341         if (rc) {
 342                 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
 343                        action ? "enable" : "disable");
 344         } else {
 345                 DP_INFO(edev, "%s accept-any-vlan\n",
 346                         action ? "enabled" : "disabled");
 347                 qdev->accept_any_vlan = action;
 348         }
 349 }
 350
 351 static int qede_vlan_stripping(struct rte_eth_dev *eth_dev, bool set_stripping)
 352 {
 353         struct qed_update_vport_params vport_update_params;
 354         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 355         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 356         int rc;
 357
 358         memset(&vport_update_params, 0, sizeof(vport_update_params));
 359         vport_update_params.vport_id = 0;
 360         vport_update_params.update_inner_vlan_removal_flg = 1;
 361         vport_update_params.inner_vlan_removal_flg = set_stripping;
 362         rc = qdev->ops->vport_update(edev, &vport_update_params);
 363         if (rc) {
 364                 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
 365                 return rc;
 366         }
 367
 368         return 0;
 369 }
 370
 371 static void qede_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
 372 {
 373         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 374         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 375         struct rte_eth_rxmode *rxmode = &eth_dev->data->dev_conf.rxmode;
 376
 377         if (mask & ETH_VLAN_STRIP_MASK) {
 378                 if (rxmode->hw_vlan_strip)
 379                         (void)qede_vlan_stripping(eth_dev, 1);
 380                 else
 381                         (void)qede_vlan_stripping(eth_dev, 0);
 382         }
 383
 384         if (mask & ETH_VLAN_FILTER_MASK) {
 385                 /* VLAN filtering kicks in when a VLAN is added */
 386                 if (rxmode->hw_vlan_filter) {
 387                         qede_vlan_filter_set(eth_dev, 0, 1);
 388                 } else {
 389                         if (qdev->configured_vlans > 1) { /* Excluding VLAN0 */
 390                                 DP_NOTICE(edev, false,
 391                                   " Please remove existing VLAN filters"
 392                                   " before disabling VLAN filtering\n");
 393                                 /* Signal app that VLAN filtering is still
 394                                  * enabled
 395                                  */
 396                                 rxmode->hw_vlan_filter = true;
 397                         } else {
 398                                 qede_vlan_filter_set(eth_dev, 0, 0);
 399                         }
 400                 }
 401         }
 402
 403         if (mask & ETH_VLAN_EXTEND_MASK)
 404                 DP_INFO(edev, "No offloads are supported with VLAN Q-in-Q"
 405                         " and classification is based on outer tag only\n");
 406
 407         DP_INFO(edev, "vlan offload mask %d vlan-strip %d vlan-filter %d\n",
 408                 mask, rxmode->hw_vlan_strip, rxmode->hw_vlan_filter);
 409 }
 410
 411 static int qede_set_ucast_rx_vlan(struct qede_dev *qdev,
 412                                   enum qed_filter_xcast_params_type opcode,
 413                                   uint16_t vid)
 414 {
 415         struct qed_filter_params filter_cmd;
 416         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 417
 418         memset(&filter_cmd, 0, sizeof(filter_cmd));
 419         filter_cmd.type = QED_FILTER_TYPE_UCAST;
 420         filter_cmd.filter.ucast.type = opcode;
 421         filter_cmd.filter.ucast.vlan_valid = 1;
 422         filter_cmd.filter.ucast.vlan = vid;
 423
 424         return qdev->ops->filter_config(edev, &filter_cmd);
 425 }
 426
 427 static int qede_vlan_filter_set(struct rte_eth_dev *eth_dev,
 428                                 uint16_t vlan_id, int on)
 429 {
 430         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 431         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 432         struct qed_dev_eth_info *dev_info = &qdev->dev_info;
 433         struct qede_vlan_entry *tmp = NULL;
 434         struct qede_vlan_entry *vlan;
 435         int rc;
 436
 437         if (qdev->configured_vlans == dev_info->num_vlan_filters) {
 438                 DP_NOTICE(edev, false, "Reached max VLAN filter limit"
 439                                      " enabling accept_any_vlan\n");
 440                 qede_config_accept_any_vlan(qdev, true);
 441                 return 0;
 442         }
 443
 444         if (on) {
 445                 SLIST_FOREACH(tmp, &qdev->vlan_list_head, list) {
 446                         if (tmp->vid == vlan_id) {
 447                                 DP_ERR(edev, "VLAN %u already configured\n",
 448                                        vlan_id);
 449                                 return -EEXIST;
 450                         }
 451                 }
 452
 453                 vlan = rte_malloc(NULL, sizeof(struct qede_vlan_entry),
 454                                   RTE_CACHE_LINE_SIZE);
 455
 456                 if (!vlan) {
 457                         DP_ERR(edev, "Did not allocate memory for VLAN\n");
 458                         return -ENOMEM;
 459                 }
 460
 461                 rc = qede_set_ucast_rx_vlan(qdev, QED_FILTER_XCAST_TYPE_ADD,
 462                                             vlan_id);
 463                 if (rc) {
 464                         DP_ERR(edev, "Failed to add VLAN %u rc %d\n", vlan_id,
 465                                rc);
 466                         rte_free(vlan);
 467                 } else {
 468                         vlan->vid = vlan_id;
 469                         SLIST_INSERT_HEAD(&qdev->vlan_list_head, vlan, list);
 470                         qdev->configured_vlans++;
 471                         DP_INFO(edev, "VLAN %u added, configured_vlans %u\n",
 472                                 vlan_id, qdev->configured_vlans);
 473                 }
 474         } else {
 475                 SLIST_FOREACH(tmp, &qdev->vlan_list_head, list) {
 476                         if (tmp->vid == vlan_id)
 477                                 break;
 478                 }
 479
 480                 if (!tmp) {
 481                         if (qdev->configured_vlans == 0) {
 482                                 DP_INFO(edev,
 483                                         "No VLAN filters configured yet\n");
 484                                 return 0;
 485                         }
 486
 487                         DP_ERR(edev, "VLAN %u not configured\n", vlan_id);
 488                         return -EINVAL;
 489                 }
 490
 491                 SLIST_REMOVE(&qdev->vlan_list_head, tmp, qede_vlan_entry, list);
 492
 493                 rc = qede_set_ucast_rx_vlan(qdev, QED_FILTER_XCAST_TYPE_DEL,
 494                                             vlan_id);
 495                 if (rc) {
 496                         DP_ERR(edev, "Failed to delete VLAN %u rc %d\n",
 497                                vlan_id, rc);
 498                 } else {
 499                         qdev->configured_vlans--;
 500                         DP_INFO(edev, "VLAN %u removed configured_vlans %u\n",
 501                                 vlan_id, qdev->configured_vlans);
 502                 }
 503         }
 504
 505         return rc;
 506 }
 507
 508 static int qede_init_vport(struct qede_dev *qdev)
 509 {
 510         struct ecore_dev *edev = &qdev->edev;
 511         struct qed_start_vport_params start = {0};
 512         int rc;
 513
 514         start.remove_inner_vlan = 1;
 515         start.gro_enable = 0;
 516         start.mtu = ETHER_MTU + QEDE_ETH_OVERHEAD;
 517         start.vport_id = 0;
 518         start.drop_ttl0 = false;
 519         start.clear_stats = 1;
 520         start.handle_ptp_pkts = 0;
 521
 522         rc = qdev->ops->vport_start(edev, &start);
 523         if (rc) {
 524                 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
 525                 return rc;
 526         }
 527
 528         DP_INFO(edev,
 529                 "Start vport ramrod passed, vport_id = %d, MTU = %u\n",
 530                 start.vport_id, ETHER_MTU);
 531
 532         return 0;
 533 }
 534
 535 static int qede_dev_configure(struct rte_eth_dev *eth_dev)
 536 {
 537         struct qede_dev *qdev = eth_dev->data->dev_private;
 538         struct ecore_dev *edev = &qdev->edev;
 539         struct rte_eth_rxmode *rxmode = &eth_dev->data->dev_conf.rxmode;
 540         int rc;
 541
 542         PMD_INIT_FUNC_TRACE(edev);
 543
 544         /* Check requirements for 100G mode */
 545         if (edev->num_hwfns > 1) {
 546                 if (eth_dev->data->nb_rx_queues < 2 ||
 547                     eth_dev->data->nb_tx_queues < 2) {
 548                         DP_NOTICE(edev, false,
 549                                   "100G mode needs min. 2 RX/TX queues\n");
 550                         return -EINVAL;
 551                 }
 552
 553                 if ((eth_dev->data->nb_rx_queues % 2 != 0) ||
 554                     (eth_dev->data->nb_tx_queues % 2 != 0)) {
 555                         DP_NOTICE(edev, false,
 556                                   "100G mode needs even no. of RX/TX queues\n");
 557                         return -EINVAL;
 558                 }
 559         }
 560
 561         qdev->fp_num_tx = eth_dev->data->nb_tx_queues;
 562         qdev->fp_num_rx = eth_dev->data->nb_rx_queues;
 563         qdev->num_queues = qdev->fp_num_tx + qdev->fp_num_rx;
 564
 565         /* Sanity checks and throw warnings */
 566         if (rxmode->enable_scatter == 1) {
 567                 DP_ERR(edev, "RX scatter packets is not supported\n");
 568                 return -EINVAL;
 569         }
 570
 571         if (rxmode->enable_lro == 1) {
 572                 DP_INFO(edev, "LRO is not supported\n");
 573                 return -EINVAL;
 574         }
 575
 576         if (!rxmode->hw_strip_crc)
 577                 DP_INFO(edev, "L2 CRC stripping is always enabled in hw\n");
 578
 579         if (!rxmode->hw_ip_checksum)
 580                 DP_INFO(edev, "IP/UDP/TCP checksum offload is always enabled "
 581                               "in hw\n");
 582
 583         SLIST_INIT(&qdev->vlan_list_head);
 584
 585         /* Check for the port restart case */
 586         if (qdev->state != QEDE_DEV_INIT) {
 587                 rc = qdev->ops->vport_stop(edev, 0);
 588                 if (rc != 0)
 589                         return rc;
 590                 qede_dealloc_fp_resc(eth_dev);
 591         }
 592
 593         /* Fastpath status block should be initialized before sending
 594          * VPORT-START in the case of VF. Anyway, do it for both VF/PF.
 595          */
 596         rc = qede_alloc_fp_resc(qdev);
 597         if (rc != 0)
 598                 return rc;
 599
 600         /* Issue VPORT-START with default config values to allow
 601          * other port configurations early on.
 602          */
 603         rc = qede_init_vport(qdev);
 604         if (rc != 0)
 605                 return rc;
 606
 607         /* Add primary mac for PF */
 608         if (IS_PF(edev))
 609                 qede_mac_addr_set(eth_dev, &qdev->primary_mac);
 610
 611         /* Enable VLAN offloads by default */
 612         qede_vlan_offload_set(eth_dev, ETH_VLAN_STRIP_MASK  |
 613                                        ETH_VLAN_FILTER_MASK |
 614                                        ETH_VLAN_EXTEND_MASK);
 615
 616         qdev->state = QEDE_DEV_CONFIG;
 617
 618         return 0;
 619 }
 620
 621 /* Info about HW descriptor ring limitations */
 622 static const struct rte_eth_desc_lim qede_rx_desc_lim = {
 623         .nb_max = NUM_RX_BDS_MAX,
 624         .nb_min = 128,
 625         .nb_align = 128 /* lowest common multiple */
 626 };
 627
 628 static const struct rte_eth_desc_lim qede_tx_desc_lim = {
 629         .nb_max = NUM_TX_BDS_MAX,
 630         .nb_min = 256,
 631         .nb_align = 256
 632 };
 633
 634 static void
 635 qede_dev_info_get(struct rte_eth_dev *eth_dev,
 636                   struct rte_eth_dev_info *dev_info)
 637 {
 638         struct qede_dev *qdev = eth_dev->data->dev_private;
 639         struct ecore_dev *edev = &qdev->edev;
 640
 641         PMD_INIT_FUNC_TRACE(edev);
 642
 643         dev_info->min_rx_bufsize = (uint32_t)(ETHER_MIN_MTU +
 644                                               QEDE_ETH_OVERHEAD);
 645         dev_info->max_rx_pktlen = (uint32_t)ETH_TX_MAX_NON_LSO_PKT_LEN;
 646         dev_info->rx_desc_lim = qede_rx_desc_lim;
 647         dev_info->tx_desc_lim = qede_tx_desc_lim;
 648         dev_info->max_rx_queues = (uint16_t)QEDE_MAX_RSS_CNT(qdev);
 649         dev_info->max_tx_queues = dev_info->max_rx_queues;
 650         dev_info->max_mac_addrs = qdev->dev_info.num_mac_addrs;
 651         if (IS_VF(edev))
 652                 dev_info->max_vfs = 0;
 653         else
 654                 dev_info->max_vfs = (uint16_t)NUM_OF_VFS(&qdev->edev);
 655         dev_info->driver_name = qdev->drv_ver;
 656         dev_info->reta_size = ECORE_RSS_IND_TABLE_SIZE;
 657         dev_info->flow_type_rss_offloads = (uint64_t)QEDE_RSS_OFFLOAD_ALL;
 658
 659         dev_info->default_txconf = (struct rte_eth_txconf) {
 660                 .txq_flags = QEDE_TXQ_FLAGS,
 661         };
 662
 663         dev_info->rx_offload_capa = (DEV_RX_OFFLOAD_VLAN_STRIP |
 664                                      DEV_RX_OFFLOAD_IPV4_CKSUM |
 665                                      DEV_RX_OFFLOAD_UDP_CKSUM |
 666                                      DEV_RX_OFFLOAD_TCP_CKSUM);
 667         dev_info->tx_offload_capa = (DEV_TX_OFFLOAD_VLAN_INSERT |
 668                                      DEV_TX_OFFLOAD_IPV4_CKSUM |
 669                                      DEV_TX_OFFLOAD_UDP_CKSUM |
 670                                      DEV_TX_OFFLOAD_TCP_CKSUM);
 671
 672         dev_info->speed_capa = ETH_LINK_SPEED_25G | ETH_LINK_SPEED_40G |
 673                                ETH_LINK_SPEED_100G;
 674 }
 675
 676 /* return 0 means link status changed, -1 means not changed */
 677 static int
 678 qede_link_update(struct rte_eth_dev *eth_dev, __rte_unused int wait_to_complete)
 679 {
 680         struct qede_dev *qdev = eth_dev->data->dev_private;
 681         struct ecore_dev *edev = &qdev->edev;
 682         uint16_t link_duplex;
 683         struct qed_link_output link;
 684         struct rte_eth_link *curr = &eth_dev->data->dev_link;
 685
 686         memset(&link, 0, sizeof(struct qed_link_output));
 687         qdev->ops->common->get_link(edev, &link);
 688
 689         /* Link Speed */
 690         curr->link_speed = link.speed;
 691
 692         /* Link Mode */
 693         switch (link.duplex) {
 694         case QEDE_DUPLEX_HALF:
 695                 link_duplex = ETH_LINK_HALF_DUPLEX;
 696                 break;
 697         case QEDE_DUPLEX_FULL:
 698                 link_duplex = ETH_LINK_FULL_DUPLEX;
 699                 break;
 700         case QEDE_DUPLEX_UNKNOWN:
 701         default:
 702                 link_duplex = -1;
 703         }
 704         curr->link_duplex = link_duplex;
 705
 706         /* Link Status */
 707         curr->link_status = (link.link_up) ? ETH_LINK_UP : ETH_LINK_DOWN;
 708
 709         /* AN */
 710         curr->link_autoneg = (link.supported_caps & QEDE_SUPPORTED_AUTONEG) ?
 711                              ETH_LINK_AUTONEG : ETH_LINK_FIXED;
 712
 713         DP_INFO(edev, "Link - Speed %u Mode %u AN %u Status %u\n",
 714                 curr->link_speed, curr->link_duplex,
 715                 curr->link_autoneg, curr->link_status);
 716
 717         /* return 0 means link status changed, -1 means not changed */
 718         return ((curr->link_status == link.link_up) ? -1 : 0);
 719 }
 720
 721 static void
 722 qede_rx_mode_setting(struct rte_eth_dev *eth_dev,
 723                      enum qed_filter_rx_mode_type accept_flags)
 724 {
 725         struct qede_dev *qdev = eth_dev->data->dev_private;
 726         struct ecore_dev *edev = &qdev->edev;
 727         struct qed_filter_params rx_mode;
 728
 729         DP_INFO(edev, "%s mode %u\n", __func__, accept_flags);
 730
 731         memset(&rx_mode, 0, sizeof(struct qed_filter_params));
 732         rx_mode.type = QED_FILTER_TYPE_RX_MODE;
 733         rx_mode.filter.accept_flags = accept_flags;
 734         qdev->ops->filter_config(edev, &rx_mode);
 735 }
 736
 737 static void qede_promiscuous_enable(struct rte_eth_dev *eth_dev)
 738 {
 739         struct qede_dev *qdev = eth_dev->data->dev_private;
 740         struct ecore_dev *edev = &qdev->edev;
 741
 742         PMD_INIT_FUNC_TRACE(edev);
 743
 744         enum qed_filter_rx_mode_type type = QED_FILTER_RX_MODE_TYPE_PROMISC;
 745
 746         if (rte_eth_allmulticast_get(eth_dev->data->port_id) == 1)
 747                 type |= QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
 748
 749         qede_rx_mode_setting(eth_dev, type);
 750 }
 751
 752 static void qede_promiscuous_disable(struct rte_eth_dev *eth_dev)
 753 {
 754         struct qede_dev *qdev = eth_dev->data->dev_private;
 755         struct ecore_dev *edev = &qdev->edev;
 756
 757         PMD_INIT_FUNC_TRACE(edev);
 758
 759         if (rte_eth_allmulticast_get(eth_dev->data->port_id) == 1)
 760                 qede_rx_mode_setting(eth_dev,
 761                                      QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC);
 762         else
 763                 qede_rx_mode_setting(eth_dev, QED_FILTER_RX_MODE_TYPE_REGULAR);
 764 }
 765
 766 static void qede_poll_sp_sb_cb(void *param)
 767 {
 768         struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
 769         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 770         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 771         int rc;
 772
 773         qede_interrupt_action(ECORE_LEADING_HWFN(edev));
 774         qede_interrupt_action(&edev->hwfns[1]);
 775
 776         rc = rte_eal_alarm_set(timer_period * US_PER_S,
 777                                qede_poll_sp_sb_cb,
 778                                (void *)eth_dev);
 779         if (rc != 0) {
 780                 DP_ERR(edev, "Unable to start periodic"
 781                              " timer rc %d\n", rc);
 782                 assert(false && "Unable to start periodic timer");
 783         }
 784 }
 785
 786 static void qede_dev_close(struct rte_eth_dev *eth_dev)
 787 {
 788         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 789         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 790         int rc;
 791
 792         PMD_INIT_FUNC_TRACE(edev);
 793
 794         /* dev_stop() shall cleanup fp resources in hw but without releasing
 795          * dma memories and sw structures so that dev_start() can be called
 796          * by the app without reconfiguration. However, in dev_close() we
 797          * can release all the resources and device can be brought up newly
 798          */
 799         if (qdev->state != QEDE_DEV_STOP)
 800                 qede_dev_stop(eth_dev);
 801         else
 802                 DP_INFO(edev, "Device is already stopped\n");
 803
 804         rc = qdev->ops->vport_stop(edev, 0);
 805         if (rc != 0)
 806                 DP_ERR(edev, "Failed to stop VPORT\n");
 807
 808         qede_dealloc_fp_resc(eth_dev);
 809
 810         qdev->ops->common->slowpath_stop(edev);
 811
 812         qdev->ops->common->remove(edev);
 813
 814         rte_intr_disable(&eth_dev->pci_dev->intr_handle);
 815
 816         rte_intr_callback_unregister(&eth_dev->pci_dev->intr_handle,
 817                                      qede_interrupt_handler, (void *)eth_dev);
 818
 819         if (edev->num_hwfns > 1)
 820                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb, (void *)eth_dev);
 821
 822         qdev->state = QEDE_DEV_INIT; /* Go back to init state */
 823 }
 824
 825 static void
 826 qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
 827 {
 828         struct qede_dev *qdev = eth_dev->data->dev_private;
 829         struct ecore_dev *edev = &qdev->edev;
 830         struct ecore_eth_stats stats;
 831
 832         qdev->ops->get_vport_stats(edev, &stats);
 833
 834         /* RX Stats */
 835         eth_stats->ipackets = stats.rx_ucast_pkts +
 836             stats.rx_mcast_pkts + stats.rx_bcast_pkts;
 837
 838         eth_stats->ibytes = stats.rx_ucast_bytes +
 839             stats.rx_mcast_bytes + stats.rx_bcast_bytes;
 840
 841         eth_stats->ierrors = stats.rx_crc_errors +
 842             stats.rx_align_errors +
 843             stats.rx_carrier_errors +
 844             stats.rx_oversize_packets +
 845             stats.rx_jabbers + stats.rx_undersize_packets;
 846
 847         eth_stats->rx_nombuf = stats.no_buff_discards;
 848
 849         eth_stats->imissed = stats.mftag_filter_discards +
 850             stats.mac_filter_discards +
 851             stats.no_buff_discards + stats.brb_truncates + stats.brb_discards;
 852
 853         /* TX stats */
 854         eth_stats->opackets = stats.tx_ucast_pkts +
 855             stats.tx_mcast_pkts + stats.tx_bcast_pkts;
 856
 857         eth_stats->obytes = stats.tx_ucast_bytes +
 858             stats.tx_mcast_bytes + stats.tx_bcast_bytes;
 859
 860         eth_stats->oerrors = stats.tx_err_drop_pkts;
 861 }
 862
 863 static int
 864 qede_get_xstats_names(__rte_unused struct rte_eth_dev *dev,
 865                       struct rte_eth_xstat_name *xstats_names, unsigned limit)
 866 {
 867         unsigned int i, stat_cnt = RTE_DIM(qede_xstats_strings);
 868
 869         if (xstats_names != NULL)
 870                 for (i = 0; i < stat_cnt; i++)
 871                         snprintf(xstats_names[i].name,
 872                                 sizeof(xstats_names[i].name),
 873                                 "%s",
 874                                 qede_xstats_strings[i].name);
 875
 876         return stat_cnt;
 877 }
 878
 879 static int
 880 qede_get_xstats(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 881                 unsigned int n)
 882 {
 883         struct qede_dev *qdev = dev->data->dev_private;
 884         struct ecore_dev *edev = &qdev->edev;
 885         struct ecore_eth_stats stats;
 886         unsigned int num = RTE_DIM(qede_xstats_strings);
 887
 888         if (n < num)
 889                 return num;
 890
 891         qdev->ops->get_vport_stats(edev, &stats);
 892
 893         for (num = 0; num < n; num++)
 894                 xstats[num].value = *(u64 *)(((char *)&stats) +
 895                                              qede_xstats_strings[num].offset);
 896
 897         return num;
 898 }
 899
 900 static void
 901 qede_reset_xstats(struct rte_eth_dev *dev)
 902 {
 903         struct qede_dev *qdev = dev->data->dev_private;
 904         struct ecore_dev *edev = &qdev->edev;
 905
 906         ecore_reset_vport_stats(edev);
 907 }
 908
 909 int qede_dev_set_link_state(struct rte_eth_dev *eth_dev, bool link_up)
 910 {
 911         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 912         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 913         struct qed_link_params link_params;
 914         int rc;
 915
 916         DP_INFO(edev, "setting link state %d\n", link_up);
 917         memset(&link_params, 0, sizeof(link_params));
 918         link_params.link_up = link_up;
 919         rc = qdev->ops->common->set_link(edev, &link_params);
 920         if (rc != ECORE_SUCCESS)
 921                 DP_ERR(edev, "Unable to set link state %d\n", link_up);
 922
 923         return rc;
 924 }
 925
 926 static int qede_dev_set_link_up(struct rte_eth_dev *eth_dev)
 927 {
 928         return qede_dev_set_link_state(eth_dev, true);
 929 }
 930
 931 static int qede_dev_set_link_down(struct rte_eth_dev *eth_dev)
 932 {
 933         return qede_dev_set_link_state(eth_dev, false);
 934 }
 935
 936 static void qede_reset_stats(struct rte_eth_dev *eth_dev)
 937 {
 938         struct qede_dev *qdev = eth_dev->data->dev_private;
 939         struct ecore_dev *edev = &qdev->edev;
 940
 941         ecore_reset_vport_stats(edev);
 942 }
 943
 944 static void qede_allmulticast_enable(struct rte_eth_dev *eth_dev)
 945 {
 946         enum qed_filter_rx_mode_type type =
 947             QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
 948
 949         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
 950                 type |= QED_FILTER_RX_MODE_TYPE_PROMISC;
 951
 952         qede_rx_mode_setting(eth_dev, type);
 953 }
 954
 955 static void qede_allmulticast_disable(struct rte_eth_dev *eth_dev)
 956 {
 957         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
 958                 qede_rx_mode_setting(eth_dev, QED_FILTER_RX_MODE_TYPE_PROMISC);
 959         else
 960                 qede_rx_mode_setting(eth_dev, QED_FILTER_RX_MODE_TYPE_REGULAR);
 961 }
 962
 963 static int qede_flow_ctrl_set(struct rte_eth_dev *eth_dev,
 964                               struct rte_eth_fc_conf *fc_conf)
 965 {
 966         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 967         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 968         struct qed_link_output current_link;
 969         struct qed_link_params params;
 970
 971         memset(&current_link, 0, sizeof(current_link));
 972         qdev->ops->common->get_link(edev, &current_link);
 973
 974         memset(&params, 0, sizeof(params));
 975         params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
 976         if (fc_conf->autoneg) {
 977                 if (!(current_link.supported_caps & QEDE_SUPPORTED_AUTONEG)) {
 978                         DP_ERR(edev, "Autoneg not supported\n");
 979                         return -EINVAL;
 980                 }
 981                 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
 982         }
 983
 984         /* Pause is assumed to be supported (SUPPORTED_Pause) */
 985         if (fc_conf->mode == RTE_FC_FULL)
 986                 params.pause_config |= (QED_LINK_PAUSE_TX_ENABLE |
 987                                         QED_LINK_PAUSE_RX_ENABLE);
 988         if (fc_conf->mode == RTE_FC_TX_PAUSE)
 989                 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
 990         if (fc_conf->mode == RTE_FC_RX_PAUSE)
 991                 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
 992
 993         params.link_up = true;
 994         (void)qdev->ops->common->set_link(edev, &params);
 995
 996         return 0;
 997 }
 998
 999 static int qede_flow_ctrl_get(struct rte_eth_dev *eth_dev,
1000                               struct rte_eth_fc_conf *fc_conf)
1001 {
1002         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
1003         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
1004         struct qed_link_output current_link;
1005
1006         memset(&current_link, 0, sizeof(current_link));
1007         qdev->ops->common->get_link(edev, &current_link);
1008
1009         if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
1010                 fc_conf->autoneg = true;
1011
1012         if (current_link.pause_config & (QED_LINK_PAUSE_RX_ENABLE |
1013                                          QED_LINK_PAUSE_TX_ENABLE))
1014                 fc_conf->mode = RTE_FC_FULL;
1015         else if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
1016                 fc_conf->mode = RTE_FC_RX_PAUSE;
1017         else if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
1018                 fc_conf->mode = RTE_FC_TX_PAUSE;
1019         else
1020                 fc_conf->mode = RTE_FC_NONE;
1021
1022         return 0;
1023 }
1024
1025 static const uint32_t *
1026 qede_dev_supported_ptypes_get(struct rte_eth_dev *eth_dev)
1027 {
1028         static const uint32_t ptypes[] = {
1029                 RTE_PTYPE_L3_IPV4,
1030                 RTE_PTYPE_L3_IPV6,
1031                 RTE_PTYPE_UNKNOWN
1032         };
1033
1034         if (eth_dev->rx_pkt_burst == qede_recv_pkts)
1035                 return ptypes;
1036
1037         return NULL;
1038 }
1039
1040 int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
1041                          struct rte_eth_rss_conf *rss_conf)
1042 {
1043         struct qed_update_vport_params vport_update_params;
1044         struct qede_dev *qdev = eth_dev->data->dev_private;
1045         struct ecore_dev *edev = &qdev->edev;
1046         uint8_t rss_caps;
1047         uint32_t *key = (uint32_t *)rss_conf->rss_key;
1048         uint64_t hf = rss_conf->rss_hf;
1049         int i;
1050
1051         if (hf == 0)
1052                 DP_ERR(edev, "hash function 0 will disable RSS\n");
1053
1054         rss_caps = 0;
1055         rss_caps |= (hf & ETH_RSS_IPV4)              ? ECORE_RSS_IPV4 : 0;
1056         rss_caps |= (hf & ETH_RSS_IPV6)              ? ECORE_RSS_IPV6 : 0;
1057         rss_caps |= (hf & ETH_RSS_IPV6_EX)           ? ECORE_RSS_IPV6 : 0;
1058         rss_caps |= (hf & ETH_RSS_NONFRAG_IPV4_TCP)  ? ECORE_RSS_IPV4_TCP : 0;
1059         rss_caps |= (hf & ETH_RSS_NONFRAG_IPV6_TCP)  ? ECORE_RSS_IPV6_TCP : 0;
1060         rss_caps |= (hf & ETH_RSS_IPV6_TCP_EX)       ? ECORE_RSS_IPV6_TCP : 0;
1061
1062         /* If the mapping doesn't fit any supported, return */
1063         if (rss_caps == 0 && hf != 0)
1064                 return -EINVAL;
1065
1066         memset(&vport_update_params, 0, sizeof(vport_update_params));
1067
1068         if (key != NULL)
1069                 memcpy(qdev->rss_params.rss_key, rss_conf->rss_key,
1070                        rss_conf->rss_key_len);
1071
1072         qdev->rss_params.rss_caps = rss_caps;
1073         memcpy(&vport_update_params.rss_params, &qdev->rss_params,
1074                sizeof(vport_update_params.rss_params));
1075         vport_update_params.update_rss_flg = 1;
1076         vport_update_params.vport_id = 0;
1077
1078         return qdev->ops->vport_update(edev, &vport_update_params);
1079 }
1080
1081 int qede_rss_hash_conf_get(struct rte_eth_dev *eth_dev,
1082                            struct rte_eth_rss_conf *rss_conf)
1083 {
1084         struct qede_dev *qdev = eth_dev->data->dev_private;
1085         uint64_t hf;
1086
1087         if (rss_conf->rss_key_len < sizeof(qdev->rss_params.rss_key))
1088                 return -EINVAL;
1089
1090         if (rss_conf->rss_key)
1091                 memcpy(rss_conf->rss_key, qdev->rss_params.rss_key,
1092                        sizeof(qdev->rss_params.rss_key));
1093
1094         hf = 0;
1095         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV4)     ?
1096                         ETH_RSS_IPV4 : 0;
1097         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6)     ?
1098                         ETH_RSS_IPV6 : 0;
1099         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6)     ?
1100                         ETH_RSS_IPV6_EX : 0;
1101         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV4_TCP) ?
1102                         ETH_RSS_NONFRAG_IPV4_TCP : 0;
1103         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6_TCP) ?
1104                         ETH_RSS_NONFRAG_IPV6_TCP : 0;
1105         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6_TCP) ?
1106                         ETH_RSS_IPV6_TCP_EX : 0;
1107
1108         rss_conf->rss_hf = hf;
1109
1110         return 0;
1111 }
1112
1113 int qede_rss_reta_update(struct rte_eth_dev *eth_dev,
1114                          struct rte_eth_rss_reta_entry64 *reta_conf,
1115                          uint16_t reta_size)
1116 {
1117         struct qed_update_vport_params vport_update_params;
1118         struct qede_dev *qdev = eth_dev->data->dev_private;
1119         struct ecore_dev *edev = &qdev->edev;
1120         uint16_t i, idx, shift;
1121
1122         if (reta_size > ETH_RSS_RETA_SIZE_128) {
1123                 DP_ERR(edev, "reta_size %d is not supported by hardware\n",
1124                        reta_size);
1125                 return -EINVAL;
1126         }
1127
1128         memset(&vport_update_params, 0, sizeof(vport_update_params));
1129         memcpy(&vport_update_params.rss_params, &qdev->rss_params,
1130                sizeof(vport_update_params.rss_params));
1131
1132         for (i = 0; i < reta_size; i++) {
1133                 idx = i / RTE_RETA_GROUP_SIZE;
1134                 shift = i % RTE_RETA_GROUP_SIZE;
1135                 if (reta_conf[idx].mask & (1ULL << shift)) {
1136                         uint8_t entry = reta_conf[idx].reta[shift];
1137                         qdev->rss_params.rss_ind_table[i] = entry;
1138                 }
1139         }
1140
1141         vport_update_params.update_rss_flg = 1;
1142         vport_update_params.vport_id = 0;
1143
1144         return qdev->ops->vport_update(edev, &vport_update_params);
1145 }
1146
1147 int qede_rss_reta_query(struct rte_eth_dev *eth_dev,
1148                         struct rte_eth_rss_reta_entry64 *reta_conf,
1149                         uint16_t reta_size)
1150 {
1151         struct qede_dev *qdev = eth_dev->data->dev_private;
1152         uint16_t i, idx, shift;
1153
1154         if (reta_size > ETH_RSS_RETA_SIZE_128) {
1155                 struct ecore_dev *edev = &qdev->edev;
1156                 DP_ERR(edev, "reta_size %d is not supported\n",
1157                        reta_size);
1158         }
1159
1160         for (i = 0; i < reta_size; i++) {
1161                 idx = i / RTE_RETA_GROUP_SIZE;
1162                 shift = i % RTE_RETA_GROUP_SIZE;
1163                 if (reta_conf[idx].mask & (1ULL << shift)) {
1164                         uint8_t entry = qdev->rss_params.rss_ind_table[i];
1165                         reta_conf[idx].reta[shift] = entry;
1166                 }
1167         }
1168
1169         return 0;
1170 }
1171
1172 int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1173 {
1174         uint32_t frame_size;
1175         struct qede_dev *qdev = dev->data->dev_private;
1176         struct rte_eth_dev_info dev_info = {0};
1177
1178         qede_dev_info_get(dev, &dev_info);
1179
1180         /* VLAN_TAG = 4 */
1181         frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + 4;
1182
1183         if ((mtu < ETHER_MIN_MTU) || (frame_size > dev_info.max_rx_pktlen))
1184                 return -EINVAL;
1185
1186         if (!dev->data->scattered_rx &&
1187             frame_size > dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)
1188                 return -EINVAL;
1189
1190         if (frame_size > ETHER_MAX_LEN)
1191                 dev->data->dev_conf.rxmode.jumbo_frame = 1;
1192         else
1193                 dev->data->dev_conf.rxmode.jumbo_frame = 0;
1194
1195         /* update max frame size */
1196         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1197         qdev->mtu = mtu;
1198         qede_dev_stop(dev);
1199         qede_dev_start(dev);
1200
1201         return 0;
1202 }
1203
1204 static const struct eth_dev_ops qede_eth_dev_ops = {
1205         .dev_configure = qede_dev_configure,
1206         .dev_infos_get = qede_dev_info_get,
1207         .rx_queue_setup = qede_rx_queue_setup,
1208         .rx_queue_release = qede_rx_queue_release,
1209         .tx_queue_setup = qede_tx_queue_setup,
1210         .tx_queue_release = qede_tx_queue_release,
1211         .dev_start = qede_dev_start,
1212         .dev_set_link_up = qede_dev_set_link_up,
1213         .dev_set_link_down = qede_dev_set_link_down,
1214         .link_update = qede_link_update,
1215         .promiscuous_enable = qede_promiscuous_enable,
1216         .promiscuous_disable = qede_promiscuous_disable,
1217         .allmulticast_enable = qede_allmulticast_enable,
1218         .allmulticast_disable = qede_allmulticast_disable,
1219         .dev_stop = qede_dev_stop,
1220         .dev_close = qede_dev_close,
1221         .stats_get = qede_get_stats,
1222         .stats_reset = qede_reset_stats,
1223         .xstats_get = qede_get_xstats,
1224         .xstats_reset = qede_reset_xstats,
1225         .xstats_get_names = qede_get_xstats_names,
1226         .mac_addr_add = qede_mac_addr_add,
1227         .mac_addr_remove = qede_mac_addr_remove,
1228         .mac_addr_set = qede_mac_addr_set,
1229         .vlan_offload_set = qede_vlan_offload_set,
1230         .vlan_filter_set = qede_vlan_filter_set,
1231         .flow_ctrl_set = qede_flow_ctrl_set,
1232         .flow_ctrl_get = qede_flow_ctrl_get,
1233         .dev_supported_ptypes_get = qede_dev_supported_ptypes_get,
1234         .rss_hash_update = qede_rss_hash_update,
1235         .rss_hash_conf_get = qede_rss_hash_conf_get,
1236         .reta_update  = qede_rss_reta_update,
1237         .reta_query  = qede_rss_reta_query,
1238         .mtu_set = qede_set_mtu,
1239 };
1240
1241 static const struct eth_dev_ops qede_eth_vf_dev_ops = {
1242         .dev_configure = qede_dev_configure,
1243         .dev_infos_get = qede_dev_info_get,
1244         .rx_queue_setup = qede_rx_queue_setup,
1245         .rx_queue_release = qede_rx_queue_release,
1246         .tx_queue_setup = qede_tx_queue_setup,
1247         .tx_queue_release = qede_tx_queue_release,
1248         .dev_start = qede_dev_start,
1249         .dev_set_link_up = qede_dev_set_link_up,
1250         .dev_set_link_down = qede_dev_set_link_down,
1251         .link_update = qede_link_update,
1252         .promiscuous_enable = qede_promiscuous_enable,
1253         .promiscuous_disable = qede_promiscuous_disable,
1254         .allmulticast_enable = qede_allmulticast_enable,
1255         .allmulticast_disable = qede_allmulticast_disable,
1256         .dev_stop = qede_dev_stop,
1257         .dev_close = qede_dev_close,
1258         .stats_get = qede_get_stats,
1259         .stats_reset = qede_reset_stats,
1260         .xstats_get = qede_get_xstats,
1261         .xstats_reset = qede_reset_xstats,
1262         .xstats_get_names = qede_get_xstats_names,
1263         .vlan_offload_set = qede_vlan_offload_set,
1264         .vlan_filter_set = qede_vlan_filter_set,
1265         .dev_supported_ptypes_get = qede_dev_supported_ptypes_get,
1266         .rss_hash_update = qede_rss_hash_update,
1267         .rss_hash_conf_get = qede_rss_hash_conf_get,
1268         .reta_update  = qede_rss_reta_update,
1269         .reta_query  = qede_rss_reta_query,
1270         .mtu_set = qede_set_mtu,
1271 };
1272
1273 static void qede_update_pf_params(struct ecore_dev *edev)
1274 {
1275         struct ecore_pf_params pf_params;
1276         /* 32 rx + 32 tx */
1277         memset(&pf_params, 0, sizeof(struct ecore_pf_params));
1278         pf_params.eth_pf_params.num_cons = 64;
1279         qed_ops->common->update_pf_params(edev, &pf_params);
1280 }
1281
1282 static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
1283 {
1284         struct rte_pci_device *pci_dev;
1285         struct rte_pci_addr pci_addr;
1286         struct qede_dev *adapter;
1287         struct ecore_dev *edev;
1288         struct qed_dev_eth_info dev_info;
1289         struct qed_slowpath_params params;
1290         static bool do_once = true;
1291         uint8_t bulletin_change;
1292         uint8_t vf_mac[ETHER_ADDR_LEN];
1293         uint8_t is_mac_forced;
1294         bool is_mac_exist;
1295         /* Fix up ecore debug level */
1296         uint32_t dp_module = ~0 & ~ECORE_MSG_HW;
1297         uint8_t dp_level = ECORE_LEVEL_VERBOSE;
1298         uint32_t max_mac_addrs;
1299         int rc;
1300
1301         /* Extract key data structures */
1302         adapter = eth_dev->data->dev_private;
1303         edev = &adapter->edev;
1304         pci_addr = eth_dev->pci_dev->addr;
1305
1306         PMD_INIT_FUNC_TRACE(edev);
1307
1308         snprintf(edev->name, NAME_SIZE, PCI_SHORT_PRI_FMT ":dpdk-port-%u",
1309                  pci_addr.bus, pci_addr.devid, pci_addr.function,
1310                  eth_dev->data->port_id);
1311
1312         eth_dev->rx_pkt_burst = qede_recv_pkts;
1313         eth_dev->tx_pkt_burst = qede_xmit_pkts;
1314
1315         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1316                 DP_NOTICE(edev, false,
1317                           "Skipping device init from secondary process\n");
1318                 return 0;
1319         }
1320
1321         pci_dev = eth_dev->pci_dev;
1322
1323         rte_eth_copy_pci_info(eth_dev, pci_dev);
1324
1325         qed_ops = qed_get_eth_ops();
1326         if (!qed_ops) {
1327                 DP_ERR(edev, "Failed to get qed_eth_ops_pass\n");
1328                 return -EINVAL;
1329         }
1330
1331         DP_INFO(edev, "Starting qede probe\n");
1332
1333         rc = qed_ops->common->probe(edev, pci_dev, QED_PROTOCOL_ETH,
1334                                     dp_module, dp_level, is_vf);
1335
1336         if (rc != 0) {
1337                 DP_ERR(edev, "qede probe failed rc %d\n", rc);
1338                 return -ENODEV;
1339         }
1340
1341         qede_update_pf_params(edev);
1342
1343         rte_intr_callback_register(&eth_dev->pci_dev->intr_handle,
1344                                    qede_interrupt_handler, (void *)eth_dev);
1345
1346         if (rte_intr_enable(&eth_dev->pci_dev->intr_handle)) {
1347                 DP_ERR(edev, "rte_intr_enable() failed\n");
1348                 return -ENODEV;
1349         }
1350
1351         /* Start the Slowpath-process */
1352         memset(&params, 0, sizeof(struct qed_slowpath_params));
1353         params.int_mode = ECORE_INT_MODE_MSIX;
1354         params.drv_major = QEDE_MAJOR_VERSION;
1355         params.drv_minor = QEDE_MINOR_VERSION;
1356         params.drv_rev = QEDE_REVISION_VERSION;
1357         params.drv_eng = QEDE_ENGINEERING_VERSION;
1358         strncpy((char *)params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1359
1360         /* For CMT mode device do periodic polling for slowpath events.
1361          * This is required since uio device uses only one MSI-x
1362          * interrupt vector but we need one for each engine.
1363          */
1364         if (edev->num_hwfns > 1) {
1365                 rc = rte_eal_alarm_set(timer_period * US_PER_S,
1366                                        qede_poll_sp_sb_cb,
1367                                        (void *)eth_dev);
1368                 if (rc != 0) {
1369                         DP_ERR(edev, "Unable to start periodic"
1370                                      " timer rc %d\n", rc);
1371                         return -EINVAL;
1372                 }
1373         }
1374
1375         rc = qed_ops->common->slowpath_start(edev, &params);
1376         if (rc) {
1377                 DP_ERR(edev, "Cannot start slowpath rc = %d\n", rc);
1378                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1379                                      (void *)eth_dev);
1380                 return -ENODEV;
1381         }
1382
1383         rc = qed_ops->fill_dev_info(edev, &dev_info);
1384         if (rc) {
1385                 DP_ERR(edev, "Cannot get device_info rc %d\n", rc);
1386                 qed_ops->common->slowpath_stop(edev);
1387                 qed_ops->common->remove(edev);
1388                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1389                                      (void *)eth_dev);
1390                 return -ENODEV;
1391         }
1392
1393         qede_alloc_etherdev(adapter, &dev_info);
1394
1395         adapter->ops->common->set_id(edev, edev->name, QEDE_DRV_MODULE_VERSION);
1396
1397         if (!is_vf)
1398                 adapter->dev_info.num_mac_addrs =
1399                         (uint32_t)RESC_NUM(ECORE_LEADING_HWFN(edev),
1400                                             ECORE_MAC);
1401         else
1402                 ecore_vf_get_num_mac_filters(ECORE_LEADING_HWFN(edev),
1403                                              &adapter->dev_info.num_mac_addrs);
1404
1405         /* Allocate memory for storing MAC addr */
1406         eth_dev->data->mac_addrs = rte_zmalloc(edev->name,
1407                                         (ETHER_ADDR_LEN *
1408                                         adapter->dev_info.num_mac_addrs),
1409                                         RTE_CACHE_LINE_SIZE);
1410
1411         if (eth_dev->data->mac_addrs == NULL) {
1412                 DP_ERR(edev, "Failed to allocate MAC address\n");
1413                 qed_ops->common->slowpath_stop(edev);
1414                 qed_ops->common->remove(edev);
1415                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1416                                      (void *)eth_dev);
1417                 return -ENOMEM;
1418         }
1419
1420         if (!is_vf) {
1421                 ether_addr_copy((struct ether_addr *)edev->hwfns[0].
1422                                 hw_info.hw_mac_addr,
1423                                 &eth_dev->data->mac_addrs[0]);
1424                 ether_addr_copy(&eth_dev->data->mac_addrs[0],
1425                                 &adapter->primary_mac);
1426         } else {
1427                 ecore_vf_read_bulletin(ECORE_LEADING_HWFN(edev),
1428                                        &bulletin_change);
1429                 if (bulletin_change) {
1430                         is_mac_exist =
1431                             ecore_vf_bulletin_get_forced_mac(
1432                                                 ECORE_LEADING_HWFN(edev),
1433                                                 vf_mac,
1434                                                 &is_mac_forced);
1435                         if (is_mac_exist && is_mac_forced) {
1436                                 DP_INFO(edev, "VF macaddr received from PF\n");
1437                                 ether_addr_copy((struct ether_addr *)&vf_mac,
1438                                                 &eth_dev->data->mac_addrs[0]);
1439                                 ether_addr_copy(&eth_dev->data->mac_addrs[0],
1440                                                 &adapter->primary_mac);
1441                         } else {
1442                                 DP_NOTICE(edev, false,
1443                                           "No VF macaddr assigned\n");
1444                         }
1445                 }
1446         }
1447
1448         eth_dev->dev_ops = (is_vf) ? &qede_eth_vf_dev_ops : &qede_eth_dev_ops;
1449
1450         if (do_once) {
1451                 qede_print_adapter_info(adapter);
1452                 do_once = false;
1453         }
1454
1455         adapter->state = QEDE_DEV_INIT;
1456
1457         DP_NOTICE(edev, false, "MAC address : %02x:%02x:%02x:%02x:%02x:%02x\n",
1458                   adapter->primary_mac.addr_bytes[0],
1459                   adapter->primary_mac.addr_bytes[1],
1460                   adapter->primary_mac.addr_bytes[2],
1461                   adapter->primary_mac.addr_bytes[3],
1462                   adapter->primary_mac.addr_bytes[4],
1463                   adapter->primary_mac.addr_bytes[5]);
1464
1465         return rc;
1466 }
1467
1468 static int qedevf_eth_dev_init(struct rte_eth_dev *eth_dev)
1469 {
1470         return qede_common_dev_init(eth_dev, 1);
1471 }
1472
1473 static int qede_eth_dev_init(struct rte_eth_dev *eth_dev)
1474 {
1475         return qede_common_dev_init(eth_dev, 0);
1476 }
1477
1478 static int qede_dev_common_uninit(struct rte_eth_dev *eth_dev)
1479 {
1480         /* only uninitialize in the primary process */
1481         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1482                 return 0;
1483
1484         /* safe to close dev here */
1485         qede_dev_close(eth_dev);
1486
1487         eth_dev->dev_ops = NULL;
1488         eth_dev->rx_pkt_burst = NULL;
1489         eth_dev->tx_pkt_burst = NULL;
1490
1491         if (eth_dev->data->mac_addrs)
1492                 rte_free(eth_dev->data->mac_addrs);
1493
1494         eth_dev->data->mac_addrs = NULL;
1495
1496         return 0;
1497 }
1498
1499 static int qede_eth_dev_uninit(struct rte_eth_dev *eth_dev)
1500 {
1501         return qede_dev_common_uninit(eth_dev);
1502 }
1503
1504 static int qedevf_eth_dev_uninit(struct rte_eth_dev *eth_dev)
1505 {
1506         return qede_dev_common_uninit(eth_dev);
1507 }
1508
1509 static struct rte_pci_id pci_id_qedevf_map[] = {
1510 #define QEDEVF_RTE_PCI_DEVICE(dev) RTE_PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, dev)
1511         {
1512                 QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_VF)
1513         },
1514         {
1515                 QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_IOV)
1516         },
1517         {.vendor_id = 0,}
1518 };
1519
1520 static struct rte_pci_id pci_id_qede_map[] = {
1521 #define QEDE_RTE_PCI_DEVICE(dev) RTE_PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, dev)
1522         {
1523                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_57980E)
1524         },
1525         {
1526                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_57980S)
1527         },
1528         {
1529                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_40)
1530         },
1531         {
1532                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_25)
1533         },
1534         {
1535                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_100)
1536         },
1537         {.vendor_id = 0,}
1538 };
1539
1540 static struct eth_driver rte_qedevf_pmd = {
1541         .pci_drv = {
1542                     .id_table = pci_id_qedevf_map,
1543                     .drv_flags =
1544                     RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1545                     .probe = rte_eth_dev_pci_probe,
1546                     .remove = rte_eth_dev_pci_remove,
1547                    },
1548         .eth_dev_init = qedevf_eth_dev_init,
1549         .eth_dev_uninit = qedevf_eth_dev_uninit,
1550         .dev_private_size = sizeof(struct qede_dev),
1551 };
1552
1553 static struct eth_driver rte_qede_pmd = {
1554         .pci_drv = {
1555                     .id_table = pci_id_qede_map,
1556                     .drv_flags =
1557                     RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1558                     .probe = rte_eth_dev_pci_probe,
1559                     .remove = rte_eth_dev_pci_remove,
1560                    },
1561         .eth_dev_init = qede_eth_dev_init,
1562         .eth_dev_uninit = qede_eth_dev_uninit,
1563         .dev_private_size = sizeof(struct qede_dev),
1564 };
1565
1566 RTE_PMD_REGISTER_PCI(net_qede, rte_qede_pmd.pci_drv);
1567 RTE_PMD_REGISTER_PCI_TABLE(net_qede, pci_id_qede_map);
1568 RTE_PMD_REGISTER_PCI(net_qede_vf, rte_qedevf_pmd.pci_drv);
1569 RTE_PMD_REGISTER_PCI_TABLE(net_qede_vf, pci_id_qedevf_map);