drivers/net/qede/qede_ethdev.h

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9
  10 #ifndef _QEDE_ETHDEV_H_
  11 #define _QEDE_ETHDEV_H_
  12
  13 #include <sys/queue.h>
  14
  15 #include <rte_ether.h>
  16 #include <rte_ethdev.h>
  17 #include <rte_dev.h>
  18 #include <rte_ip.h>
  19
  20 /* ecore includes */
  21 #include "base/bcm_osal.h"
  22 #include "base/ecore.h"
  23 #include "base/ecore_dev_api.h"
  24 #include "base/ecore_l2_api.h"
  25 #include "base/ecore_vf_api.h"
  26 #include "base/ecore_hsi_common.h"
  27 #include "base/ecore_int_api.h"
  28 #include "base/ecore_chain.h"
  29 #include "base/ecore_status.h"
  30 #include "base/ecore_hsi_eth.h"
  31 #include "base/ecore_dev_api.h"
  32 #include "base/ecore_iov_api.h"
  33 #include "base/ecore_cxt.h"
  34 #include "base/nvm_cfg.h"
  35 #include "base/ecore_iov_api.h"
  36 #include "base/ecore_sp_commands.h"
  37
  38 #include "qede_logs.h"
  39 #include "qede_if.h"
  40 #include "qede_eth_if.h"
  41
  42 #include "qede_rxtx.h"
  43
  44 #define qede_stringify1(x...)           #x
  45 #define qede_stringify(x...)            qede_stringify1(x)
  46
  47 /* Driver versions */
  48 #define QEDE_PMD_VER_PREFIX             "QEDE PMD"
  49 #define QEDE_PMD_VERSION_MAJOR          1
  50 #define QEDE_PMD_VERSION_MINOR          2
  51 #define QEDE_PMD_VERSION_REVISION       0
  52 #define QEDE_PMD_VERSION_PATCH          1
  53
  54 #define QEDE_PMD_VERSION qede_stringify(QEDE_PMD_VERSION_MAJOR) "."     \
  55                          qede_stringify(QEDE_PMD_VERSION_MINOR) "."     \
  56                          qede_stringify(QEDE_PMD_VERSION_REVISION) "."  \
  57                          qede_stringify(QEDE_PMD_VERSION_PATCH)
  58
  59 #define QEDE_PMD_DRV_VER_STR_SIZE NAME_SIZE
  60 #define QEDE_PMD_VER_PREFIX "QEDE PMD"
  61
  62
  63 #define QEDE_RSS_INDIR_INITED     (1 << 0)
  64 #define QEDE_RSS_KEY_INITED       (1 << 1)
  65 #define QEDE_RSS_CAPS_INITED      (1 << 2)
  66
  67 #define QEDE_MAX_RSS_CNT(edev)  ((edev)->dev_info.num_queues)
  68 #define QEDE_MAX_TSS_CNT(edev)  ((edev)->dev_info.num_queues * \
  69                                         (edev)->dev_info.num_tc)
  70
  71 #define QEDE_QUEUE_CNT(qdev) ((qdev)->num_queues)
  72 #define QEDE_RSS_COUNT(qdev) ((qdev)->num_queues - (qdev)->fp_num_tx)
  73 #define QEDE_TSS_COUNT(qdev) (((qdev)->num_queues - (qdev)->fp_num_rx) * \
  74                                         (qdev)->num_tc)
  75
  76 #define QEDE_FASTPATH_TX        (1 << 0)
  77 #define QEDE_FASTPATH_RX        (1 << 1)
  78
  79 #define QEDE_DUPLEX_FULL        1
  80 #define QEDE_DUPLEX_HALF        2
  81 #define QEDE_DUPLEX_UNKNOWN     0xff
  82
  83 #define QEDE_SUPPORTED_AUTONEG (1 << 6)
  84 #define QEDE_SUPPORTED_PAUSE   (1 << 13)
  85
  86 #define QEDE_INIT_QDEV(eth_dev) (eth_dev->data->dev_private)
  87
  88 #define QEDE_INIT_EDEV(adapter) (&((struct qede_dev *)adapter)->edev)
  89
  90 #define QEDE_INIT(eth_dev) {                                    \
  91         struct qede_dev *qdev = eth_dev->data->dev_private;     \
  92         struct ecore_dev *edev = &qdev->edev;                   \
  93 }
  94
  95 /************* QLogic 25G/40G/100G vendor/devices ids *************/
  96 #define PCI_VENDOR_ID_QLOGIC            0x1077
  97
  98 #define CHIP_NUM_57980E                 0x1634
  99 #define CHIP_NUM_57980S                 0x1629
 100 #define CHIP_NUM_VF                     0x1630
 101 #define CHIP_NUM_57980S_40              0x1634
 102 #define CHIP_NUM_57980S_25              0x1656
 103 #define CHIP_NUM_57980S_IOV             0x1664
 104 #define CHIP_NUM_57980S_100             0x1644
 105
 106 #define PCI_DEVICE_ID_NX2_57980E        CHIP_NUM_57980E
 107 #define PCI_DEVICE_ID_NX2_57980S        CHIP_NUM_57980S
 108 #define PCI_DEVICE_ID_NX2_VF            CHIP_NUM_VF
 109 #define PCI_DEVICE_ID_57980S_40         CHIP_NUM_57980S_40
 110 #define PCI_DEVICE_ID_57980S_25         CHIP_NUM_57980S_25
 111 #define PCI_DEVICE_ID_57980S_IOV        CHIP_NUM_57980S_IOV
 112 #define PCI_DEVICE_ID_57980S_100        CHIP_NUM_57980S_100
 113
 114 #define QEDE_VXLAN_DEF_PORT             8472
 115
 116 extern char fw_file[];
 117
 118 /* Port/function states */
 119 enum qede_dev_state {
 120         QEDE_DEV_INIT, /* Init the chip and Slowpath */
 121         QEDE_DEV_CONFIG, /* Create Vport/Fastpath resources */
 122         QEDE_DEV_START, /* Start RX/TX queues, enable traffic */
 123         QEDE_DEV_STOP, /* Deactivate vport and stop traffic */
 124 };
 125
 126 struct qede_vlan_entry {
 127         SLIST_ENTRY(qede_vlan_entry) list;
 128         uint16_t vid;
 129 };
 130
 131 struct qede_mcast_entry {
 132         struct ether_addr mac;
 133         SLIST_ENTRY(qede_mcast_entry) list;
 134 };
 135
 136 struct qede_ucast_entry {
 137         struct ether_addr mac;
 138         uint16_t vlan;
 139         uint16_t vni;
 140         SLIST_ENTRY(qede_ucast_entry) list;
 141 };
 142
 143 /*
 144  *  Structure to store private data for each port.
 145  */
 146 struct qede_dev {
 147         struct ecore_dev edev;
 148         uint8_t protocol;
 149         const struct qed_eth_ops *ops;
 150         struct qed_dev_eth_info dev_info;
 151         struct ecore_sb_info *sb_array;
 152         struct qede_fastpath *fp_array;
 153         uint8_t num_tc;
 154         uint16_t mtu;
 155         bool rss_enabled;
 156         struct qed_update_vport_rss_params rss_params;
 157         uint32_t flags;
 158         bool gro_disable;
 159         uint16_t num_queues;
 160         uint8_t fp_num_tx;
 161         uint8_t fp_num_rx;
 162         enum qede_dev_state state;
 163         SLIST_HEAD(vlan_list_head, qede_vlan_entry)vlan_list_head;
 164         uint16_t configured_vlans;
 165         bool accept_any_vlan;
 166         struct ether_addr primary_mac;
 167         SLIST_HEAD(mc_list_head, qede_mcast_entry) mc_list_head;
 168         uint16_t num_mc_addr;
 169         SLIST_HEAD(uc_list_head, qede_ucast_entry) uc_list_head;
 170         uint16_t num_uc_addr;
 171         bool handle_hw_err;
 172         uint16_t num_tunn_filters;
 173         uint16_t vxlan_filter_type;
 174         char drv_ver[QEDE_PMD_DRV_VER_STR_SIZE];
 175 };
 176
 177 /* Static functions */
 178 static int qede_vlan_filter_set(struct rte_eth_dev *eth_dev,
 179                                 uint16_t vlan_id, int on);
 180
 181 static int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
 182                                 struct rte_eth_rss_conf *rss_conf);
 183
 184 static int qede_rss_reta_update(struct rte_eth_dev *eth_dev,
 185                                 struct rte_eth_rss_reta_entry64 *reta_conf,
 186                                 uint16_t reta_size);
 187
 188 static inline uint32_t qede_rx_cqe_to_pkt_type(uint16_t flags);
 189
 190 /* Non-static functions */
 191 void qede_init_rss_caps(uint8_t *rss_caps, uint64_t hf);
 192
 193 int qed_fill_eth_dev_info(struct ecore_dev *edev,
 194                                  struct qed_dev_eth_info *info);
 195 int qede_dev_set_link_state(struct rte_eth_dev *eth_dev, bool link_up);
 196
 197 #endif /* _QEDE_ETHDEV_H_ */