net/qede: enable and disable VLAN filtering
[dpdk.git] / drivers / net / qede / qede_ethdev.h
1 /*
2  * Copyright (c) 2016 QLogic Corporation.
3  * All rights reserved.
4  * www.qlogic.com
5  *
6  * See LICENSE.qede_pmd for copyright and licensing details.
7  */
8
9
10 #ifndef _QEDE_ETHDEV_H_
11 #define _QEDE_ETHDEV_H_
12
13 #include <sys/queue.h>
14
15 #include <rte_ether.h>
16 #include <rte_ethdev.h>
17 #include <rte_dev.h>
18
19 /* ecore includes */
20 #include "base/bcm_osal.h"
21 #include "base/ecore.h"
22 #include "base/ecore_dev_api.h"
23 #include "base/ecore_l2_api.h"
24 #include "base/ecore_vf_api.h"
25 #include "base/ecore_hsi_common.h"
26 #include "base/ecore_int_api.h"
27 #include "base/ecore_chain.h"
28 #include "base/ecore_status.h"
29 #include "base/ecore_hsi_eth.h"
30 #include "base/ecore_dev_api.h"
31 #include "base/ecore_iov_api.h"
32
33 #include "qede_logs.h"
34 #include "qede_if.h"
35 #include "qede_eth_if.h"
36
37 #include "qede_rxtx.h"
38
39 #define qede_stringify1(x...)           #x
40 #define qede_stringify(x...)            qede_stringify1(x)
41
42 /* Driver versions */
43 #define QEDE_PMD_VER_PREFIX             "QEDE PMD"
44 #define QEDE_PMD_VERSION_MAJOR          1
45 #define QEDE_PMD_VERSION_MINOR          1
46 #define QEDE_PMD_VERSION_REVISION       0
47 #define QEDE_PMD_VERSION_PATCH          1
48
49 #define QEDE_MAJOR_VERSION              8
50 #define QEDE_MINOR_VERSION              7
51 #define QEDE_REVISION_VERSION           9
52 #define QEDE_ENGINEERING_VERSION        0
53
54 #define QEDE_DRV_MODULE_VERSION qede_stringify(QEDE_MAJOR_VERSION) "."  \
55                 qede_stringify(QEDE_MINOR_VERSION) "."                  \
56                 qede_stringify(QEDE_REVISION_VERSION) "."               \
57                 qede_stringify(QEDE_ENGINEERING_VERSION)
58
59 #define QEDE_RSS_INDIR_INITED     (1 << 0)
60 #define QEDE_RSS_KEY_INITED       (1 << 1)
61 #define QEDE_RSS_CAPS_INITED      (1 << 2)
62
63 #define QEDE_MAX_RSS_CNT(edev)  ((edev)->dev_info.num_queues)
64 #define QEDE_MAX_TSS_CNT(edev)  ((edev)->dev_info.num_queues * \
65                                         (edev)->dev_info.num_tc)
66
67 #define QEDE_RSS_CNT(edev)      ((edev)->fp_num_rx)
68 #define QEDE_TSS_CNT(edev)      ((edev)->fp_num_rx * (edev)->num_tc)
69
70 #define QEDE_DUPLEX_FULL        1
71 #define QEDE_DUPLEX_HALF        2
72 #define QEDE_DUPLEX_UNKNOWN     0xff
73
74 #define QEDE_SUPPORTED_AUTONEG (1 << 6)
75 #define QEDE_SUPPORTED_PAUSE   (1 << 13)
76
77 #define QEDE_INIT_QDEV(eth_dev) (eth_dev->data->dev_private)
78
79 #define QEDE_INIT_EDEV(adapter) (&((struct qede_dev *)adapter)->edev)
80
81 #define QEDE_QUEUE_CNT(qdev) ((qdev)->num_queues)
82 #define QEDE_RSS_COUNT(qdev) ((qdev)->num_queues - (qdev)->fp_num_tx)
83 #define QEDE_TSS_COUNT(qdev) (((qdev)->num_queues - (qdev)->fp_num_rx) * \
84                 (qdev)->num_tc)
85 #define QEDE_TC_IDX(qdev, txqidx) ((txqidx) / QEDE_TSS_COUNT(qdev))
86
87 #define QEDE_INIT(eth_dev) {                                    \
88         struct qede_dev *qdev = eth_dev->data->dev_private;     \
89         struct ecore_dev *edev = &qdev->edev;                   \
90 }
91
92 /************* QLogic 25G/40G/100G vendor/devices ids *************/
93 #define PCI_VENDOR_ID_QLOGIC            0x1077
94
95 #define CHIP_NUM_57980E                 0x1634
96 #define CHIP_NUM_57980S                 0x1629
97 #define CHIP_NUM_VF                     0x1630
98 #define CHIP_NUM_57980S_40              0x1634
99 #define CHIP_NUM_57980S_25              0x1656
100 #define CHIP_NUM_57980S_IOV             0x1664
101 #define CHIP_NUM_57980S_100             0x1644
102
103 #define PCI_DEVICE_ID_NX2_57980E        CHIP_NUM_57980E
104 #define PCI_DEVICE_ID_NX2_57980S        CHIP_NUM_57980S
105 #define PCI_DEVICE_ID_NX2_VF            CHIP_NUM_VF
106 #define PCI_DEVICE_ID_57980S_40         CHIP_NUM_57980S_40
107 #define PCI_DEVICE_ID_57980S_25         CHIP_NUM_57980S_25
108 #define PCI_DEVICE_ID_57980S_IOV        CHIP_NUM_57980S_IOV
109 #define PCI_DEVICE_ID_57980S_100        CHIP_NUM_57980S_100
110
111 extern char fw_file[];
112
113 /* Port/function states */
114 enum qede_dev_state {
115         QEDE_DEV_INIT, /* Init the chip and Slowpath */
116         QEDE_DEV_CONFIG, /* Create Vport/Fastpath resources */
117         QEDE_DEV_START, /* Start RX/TX queues, enable traffic */
118         QEDE_DEV_STOP, /* Deactivate vport and stop traffic */
119 };
120
121 struct qede_vlan_entry {
122         SLIST_ENTRY(qede_vlan_entry) list;
123         uint16_t vid;
124 };
125
126 /*
127  *  Structure to store private data for each port.
128  */
129 struct qede_dev {
130         struct ecore_dev edev;
131         uint8_t protocol;
132         const struct qed_eth_ops *ops;
133         struct qed_dev_eth_info dev_info;
134         struct ecore_sb_info *sb_array;
135         struct qede_fastpath *fp_array;
136         uint16_t num_rss;
137         uint8_t num_tc;
138         uint16_t mtu;
139         bool rss_enabled;
140         struct qed_update_vport_rss_params rss_params;
141         uint32_t flags;
142         bool gro_disable;
143         uint16_t num_queues;
144         uint8_t fp_num_tx;
145         uint8_t fp_num_rx;
146         enum qede_dev_state state;
147         SLIST_HEAD(vlan_list_head, qede_vlan_entry)vlan_list_head;
148         uint16_t configured_vlans;
149         bool accept_any_vlan;
150         struct ether_addr primary_mac;
151         bool handle_hw_err;
152         char drv_ver[QED_DRV_VER_STR_SIZE];
153 };
154
155 /* Static functions */
156 static int qede_vlan_filter_set(struct rte_eth_dev *eth_dev,
157                                 uint16_t vlan_id, int on);
158
159 int qed_fill_eth_dev_info(struct ecore_dev *edev,
160                                  struct qed_dev_eth_info *info);
161 int qede_dev_set_link_state(struct rte_eth_dev *eth_dev, bool link_up);
162
163 #endif /* _QEDE_ETHDEV_H_ */