1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2017 Cavium Inc.
10 #include <rte_errno.h>
11 #include <rte_flow_driver.h>
13 #include "qede_ethdev.h"
15 /* VXLAN tunnel classification mapping */
16 const struct _qede_udp_tunn_types {
17 uint16_t rte_filter_type;
18 enum ecore_filter_ucast_type qede_type;
19 enum ecore_tunn_clss qede_tunn_clss;
21 } qede_tunn_types[] = {
23 ETH_TUNNEL_FILTER_OMAC,
25 ECORE_TUNN_CLSS_MAC_VLAN,
29 ETH_TUNNEL_FILTER_TENID,
31 ECORE_TUNN_CLSS_MAC_VNI,
35 ETH_TUNNEL_FILTER_IMAC,
36 ECORE_FILTER_INNER_MAC,
37 ECORE_TUNN_CLSS_INNER_MAC_VLAN,
41 ETH_TUNNEL_FILTER_IVLAN,
42 ECORE_FILTER_INNER_VLAN,
43 ECORE_TUNN_CLSS_INNER_MAC_VLAN,
47 ETH_TUNNEL_FILTER_OMAC | ETH_TUNNEL_FILTER_TENID,
48 ECORE_FILTER_MAC_VNI_PAIR,
49 ECORE_TUNN_CLSS_MAC_VNI,
53 ETH_TUNNEL_FILTER_OMAC | ETH_TUNNEL_FILTER_IMAC,
56 "outer-mac and inner-mac"
59 ETH_TUNNEL_FILTER_OMAC | ETH_TUNNEL_FILTER_IVLAN,
62 "outer-mac and inner-vlan"
65 ETH_TUNNEL_FILTER_TENID | ETH_TUNNEL_FILTER_IMAC,
66 ECORE_FILTER_INNER_MAC_VNI_PAIR,
67 ECORE_TUNN_CLSS_INNER_MAC_VNI,
71 ETH_TUNNEL_FILTER_TENID | ETH_TUNNEL_FILTER_IVLAN,
77 ETH_TUNNEL_FILTER_IMAC | ETH_TUNNEL_FILTER_IVLAN,
78 ECORE_FILTER_INNER_PAIR,
79 ECORE_TUNN_CLSS_INNER_MAC_VLAN,
80 "inner-mac and inner-vlan",
83 ETH_TUNNEL_FILTER_OIP,
89 ETH_TUNNEL_FILTER_IIP,
95 RTE_TUNNEL_FILTER_IMAC_IVLAN,
101 RTE_TUNNEL_FILTER_IMAC_IVLAN_TENID,
107 RTE_TUNNEL_FILTER_IMAC_TENID,
113 RTE_TUNNEL_FILTER_OMAC_TENID_IMAC,
120 #define IP_VERSION (0x40)
121 #define IP_HDRLEN (0x5)
122 #define QEDE_FDIR_IP_DEFAULT_VERSION_IHL (IP_VERSION | IP_HDRLEN)
123 #define QEDE_FDIR_TCP_DEFAULT_DATAOFF (0x50)
124 #define QEDE_FDIR_IPV4_DEF_TTL (64)
125 #define QEDE_FDIR_IPV6_DEFAULT_VTC_FLOW (0x60000000)
126 /* Sum of length of header types of L2, L3, L4.
127 * L2 : ether_hdr + vlan_hdr + vxlan_hdr
131 #define QEDE_MAX_FDIR_PKT_LEN (86)
134 qede_arfs_construct_pkt(struct rte_eth_dev *eth_dev,
135 struct qede_arfs_entry *arfs,
137 struct ecore_arfs_config_params *params);
139 /* Note: Flowdir support is only partial.
140 * For ex: drop_queue, FDIR masks, flex_conf are not supported.
141 * Parameters like pballoc/status fields are irrelevant here.
143 int qede_check_fdir_support(struct rte_eth_dev *eth_dev)
145 struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
146 struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
147 struct rte_fdir_conf *fdir = ð_dev->data->dev_conf.fdir_conf;
149 /* check FDIR modes */
150 switch (fdir->mode) {
151 case RTE_FDIR_MODE_NONE:
152 qdev->arfs_info.arfs.mode = ECORE_FILTER_CONFIG_MODE_DISABLE;
153 DP_INFO(edev, "flowdir is disabled\n");
155 case RTE_FDIR_MODE_PERFECT:
156 if (ECORE_IS_CMT(edev)) {
157 DP_ERR(edev, "flowdir is not supported in 100G mode\n");
158 qdev->arfs_info.arfs.mode =
159 ECORE_FILTER_CONFIG_MODE_DISABLE;
162 qdev->arfs_info.arfs.mode =
163 ECORE_FILTER_CONFIG_MODE_5_TUPLE;
164 DP_INFO(edev, "flowdir is enabled (5 Tuple mode)\n");
166 case RTE_FDIR_MODE_PERFECT_TUNNEL:
167 case RTE_FDIR_MODE_SIGNATURE:
168 case RTE_FDIR_MODE_PERFECT_MAC_VLAN:
169 DP_ERR(edev, "Unsupported flowdir mode %d\n", fdir->mode);
176 void qede_fdir_dealloc_resc(struct rte_eth_dev *eth_dev)
178 struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
179 struct qede_arfs_entry *tmp = NULL;
181 SLIST_FOREACH(tmp, &qdev->arfs_info.arfs_list_head, list) {
184 rte_memzone_free(tmp->mz);
185 SLIST_REMOVE(&qdev->arfs_info.arfs_list_head, tmp,
186 qede_arfs_entry, list);
193 qede_config_arfs_filter(struct rte_eth_dev *eth_dev,
194 struct qede_arfs_entry *arfs,
197 struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
198 struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
199 struct ecore_ntuple_filter_params params;
200 char mz_name[RTE_MEMZONE_NAMESIZE] = {0};
201 struct qede_arfs_entry *tmp = NULL;
202 const struct rte_memzone *mz;
203 struct ecore_hwfn *p_hwfn;
204 enum _ecore_status_t rc;
209 if (qdev->arfs_info.filter_count == QEDE_RFS_MAX_FLTR - 1) {
210 DP_ERR(edev, "Reached max flowdir filter limit\n");
215 /* soft_id could have been used as memzone string, but soft_id is
216 * not currently used so it has no significance.
218 snprintf(mz_name, sizeof(mz_name), "%lx",
219 (unsigned long)rte_get_timer_cycles());
220 mz = rte_memzone_reserve_aligned(mz_name, QEDE_MAX_FDIR_PKT_LEN,
221 SOCKET_ID_ANY, 0, RTE_CACHE_LINE_SIZE);
223 DP_ERR(edev, "Failed to allocate memzone for fdir, err = %s\n",
224 rte_strerror(rte_errno));
229 memset(pkt, 0, QEDE_MAX_FDIR_PKT_LEN);
230 pkt_len = qede_arfs_construct_pkt(eth_dev, arfs, pkt,
231 &qdev->arfs_info.arfs);
237 DP_INFO(edev, "pkt_len = %u memzone = %s\n", pkt_len, mz_name);
239 SLIST_FOREACH(tmp, &qdev->arfs_info.arfs_list_head, list) {
240 if (memcmp(tmp->mz->addr, pkt, pkt_len) == 0) {
241 DP_INFO(edev, "flowdir filter exist\n");
247 SLIST_FOREACH(tmp, &qdev->arfs_info.arfs_list_head, list) {
248 if (memcmp(tmp->mz->addr, pkt, pkt_len) == 0)
252 DP_ERR(edev, "flowdir filter does not exist\n");
257 p_hwfn = ECORE_LEADING_HWFN(edev);
259 if (qdev->arfs_info.arfs.mode ==
260 ECORE_FILTER_CONFIG_MODE_DISABLE) {
262 eth_dev->data->dev_conf.fdir_conf.mode =
263 RTE_FDIR_MODE_PERFECT;
264 qdev->arfs_info.arfs.mode =
265 ECORE_FILTER_CONFIG_MODE_5_TUPLE;
266 DP_INFO(edev, "Force enable flowdir in perfect mode\n");
268 /* Enable ARFS searcher with updated flow_types */
269 ecore_arfs_mode_configure(p_hwfn, p_hwfn->p_arfs_ptt,
270 &qdev->arfs_info.arfs);
273 memset(¶ms, 0, sizeof(params));
274 params.addr = (dma_addr_t)mz->iova;
275 params.length = pkt_len;
276 params.qid = arfs->rx_queue;
278 params.b_is_add = add;
279 params.b_is_drop = arfs->is_drop;
281 /* configure filter with ECORE_SPQ_MODE_EBLOCK */
282 rc = ecore_configure_rfs_ntuple_filter(p_hwfn, NULL,
284 if (rc == ECORE_SUCCESS) {
286 arfs->pkt_len = pkt_len;
288 SLIST_INSERT_HEAD(&qdev->arfs_info.arfs_list_head,
290 qdev->arfs_info.filter_count++;
291 DP_INFO(edev, "flowdir filter added, count = %d\n",
292 qdev->arfs_info.filter_count);
294 rte_memzone_free(tmp->mz);
295 SLIST_REMOVE(&qdev->arfs_info.arfs_list_head, tmp,
296 qede_arfs_entry, list);
297 rte_free(tmp); /* the node deleted */
298 rte_memzone_free(mz); /* temp node allocated */
299 qdev->arfs_info.filter_count--;
300 DP_INFO(edev, "Fdir filter deleted, count = %d\n",
301 qdev->arfs_info.filter_count);
304 DP_ERR(edev, "flowdir filter failed, rc=%d filter_count=%d\n",
305 rc, qdev->arfs_info.filter_count);
308 /* Disable ARFS searcher if there are no more filters */
309 if (qdev->arfs_info.filter_count == 0) {
310 memset(&qdev->arfs_info.arfs, 0,
311 sizeof(struct ecore_arfs_config_params));
312 DP_INFO(edev, "Disabling flowdir\n");
313 qdev->arfs_info.arfs.mode = ECORE_FILTER_CONFIG_MODE_DISABLE;
314 ecore_arfs_mode_configure(p_hwfn, p_hwfn->p_arfs_ptt,
315 &qdev->arfs_info.arfs);
320 rte_memzone_free(mz);
324 /* Fills the L3/L4 headers and returns the actual length of flowdir packet */
326 qede_arfs_construct_pkt(struct rte_eth_dev *eth_dev,
327 struct qede_arfs_entry *arfs,
329 struct ecore_arfs_config_params *params)
332 struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
333 struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
334 uint16_t *ether_type;
336 struct rte_ipv4_hdr *ip;
337 struct rte_ipv6_hdr *ip6;
338 struct rte_udp_hdr *udp;
339 struct rte_tcp_hdr *tcp;
342 raw_pkt = (uint8_t *)buff;
344 len = 2 * sizeof(struct rte_ether_addr);
345 raw_pkt += 2 * sizeof(struct rte_ether_addr);
346 ether_type = (uint16_t *)raw_pkt;
347 raw_pkt += sizeof(uint16_t);
348 len += sizeof(uint16_t);
350 *ether_type = rte_cpu_to_be_16(arfs->tuple.eth_proto);
351 switch (arfs->tuple.eth_proto) {
352 case RTE_ETHER_TYPE_IPV4:
353 ip = (struct rte_ipv4_hdr *)raw_pkt;
354 ip->version_ihl = QEDE_FDIR_IP_DEFAULT_VERSION_IHL;
355 ip->total_length = sizeof(struct rte_ipv4_hdr);
356 ip->next_proto_id = arfs->tuple.ip_proto;
357 ip->time_to_live = QEDE_FDIR_IPV4_DEF_TTL;
358 ip->dst_addr = arfs->tuple.dst_ipv4;
359 ip->src_addr = arfs->tuple.src_ipv4;
360 len += sizeof(struct rte_ipv4_hdr);
363 raw_pkt = (uint8_t *)buff;
365 if (arfs->tuple.ip_proto == IPPROTO_UDP) {
366 udp = (struct rte_udp_hdr *)(raw_pkt + len);
367 udp->dst_port = arfs->tuple.dst_port;
368 udp->src_port = arfs->tuple.src_port;
369 udp->dgram_len = sizeof(struct rte_udp_hdr);
370 len += sizeof(struct rte_udp_hdr);
371 /* adjust ip total_length */
372 ip->total_length += sizeof(struct rte_udp_hdr);
375 tcp = (struct rte_tcp_hdr *)(raw_pkt + len);
376 tcp->src_port = arfs->tuple.src_port;
377 tcp->dst_port = arfs->tuple.dst_port;
378 tcp->data_off = QEDE_FDIR_TCP_DEFAULT_DATAOFF;
379 len += sizeof(struct rte_tcp_hdr);
380 /* adjust ip total_length */
381 ip->total_length += sizeof(struct rte_tcp_hdr);
385 case RTE_ETHER_TYPE_IPV6:
386 ip6 = (struct rte_ipv6_hdr *)raw_pkt;
387 ip6->proto = arfs->tuple.ip_proto;
389 rte_cpu_to_be_32(QEDE_FDIR_IPV6_DEFAULT_VTC_FLOW);
391 rte_memcpy(&ip6->src_addr, arfs->tuple.src_ipv6,
393 rte_memcpy(&ip6->dst_addr, arfs->tuple.dst_ipv6,
395 len += sizeof(struct rte_ipv6_hdr);
398 raw_pkt = (uint8_t *)buff;
400 if (arfs->tuple.ip_proto == IPPROTO_UDP) {
401 udp = (struct rte_udp_hdr *)(raw_pkt + len);
402 udp->src_port = arfs->tuple.src_port;
403 udp->dst_port = arfs->tuple.dst_port;
404 len += sizeof(struct rte_udp_hdr);
407 tcp = (struct rte_tcp_hdr *)(raw_pkt + len);
408 tcp->src_port = arfs->tuple.src_port;
409 tcp->dst_port = arfs->tuple.dst_port;
410 tcp->data_off = QEDE_FDIR_TCP_DEFAULT_DATAOFF;
411 len += sizeof(struct rte_tcp_hdr);
416 DP_ERR(edev, "Unsupported eth_proto %u\n",
417 arfs->tuple.eth_proto);
425 qede_tunnel_update(struct qede_dev *qdev,
426 struct ecore_tunnel_info *tunn_info)
428 struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
429 enum _ecore_status_t rc = ECORE_INVAL;
430 struct ecore_hwfn *p_hwfn;
431 struct ecore_ptt *p_ptt;
434 for_each_hwfn(edev, i) {
435 p_hwfn = &edev->hwfns[i];
437 p_ptt = ecore_ptt_acquire(p_hwfn);
439 DP_ERR(p_hwfn, "Can't acquire PTT\n");
446 rc = ecore_sp_pf_update_tunn_cfg(p_hwfn, p_ptt,
447 tunn_info, ECORE_SPQ_MODE_CB, NULL);
449 ecore_ptt_release(p_hwfn, p_ptt);
451 if (rc != ECORE_SUCCESS)
459 qede_vxlan_enable(struct rte_eth_dev *eth_dev, uint8_t clss,
462 struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
463 struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
464 enum _ecore_status_t rc = ECORE_INVAL;
465 struct ecore_tunnel_info tunn;
467 if (qdev->vxlan.enable == enable)
468 return ECORE_SUCCESS;
470 memset(&tunn, 0, sizeof(struct ecore_tunnel_info));
471 tunn.vxlan.b_update_mode = true;
472 tunn.vxlan.b_mode_enabled = enable;
473 tunn.b_update_rx_cls = true;
474 tunn.b_update_tx_cls = true;
475 tunn.vxlan.tun_cls = clss;
477 tunn.vxlan_port.b_update_port = true;
478 tunn.vxlan_port.port = enable ? QEDE_VXLAN_DEF_PORT : 0;
480 rc = qede_tunnel_update(qdev, &tunn);
481 if (rc == ECORE_SUCCESS) {
482 qdev->vxlan.enable = enable;
483 qdev->vxlan.udp_port = (enable) ? QEDE_VXLAN_DEF_PORT : 0;
484 DP_INFO(edev, "vxlan is %s, UDP port = %d\n",
485 enable ? "enabled" : "disabled", qdev->vxlan.udp_port);
487 DP_ERR(edev, "Failed to update tunn_clss %u\n",
495 qede_geneve_enable(struct rte_eth_dev *eth_dev, uint8_t clss,
498 struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
499 struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
500 enum _ecore_status_t rc = ECORE_INVAL;
501 struct ecore_tunnel_info tunn;
503 memset(&tunn, 0, sizeof(struct ecore_tunnel_info));
504 tunn.l2_geneve.b_update_mode = true;
505 tunn.l2_geneve.b_mode_enabled = enable;
506 tunn.ip_geneve.b_update_mode = true;
507 tunn.ip_geneve.b_mode_enabled = enable;
508 tunn.l2_geneve.tun_cls = clss;
509 tunn.ip_geneve.tun_cls = clss;
510 tunn.b_update_rx_cls = true;
511 tunn.b_update_tx_cls = true;
513 tunn.geneve_port.b_update_port = true;
514 tunn.geneve_port.port = enable ? QEDE_GENEVE_DEF_PORT : 0;
516 rc = qede_tunnel_update(qdev, &tunn);
517 if (rc == ECORE_SUCCESS) {
518 qdev->geneve.enable = enable;
519 qdev->geneve.udp_port = (enable) ? QEDE_GENEVE_DEF_PORT : 0;
520 DP_INFO(edev, "GENEVE is %s, UDP port = %d\n",
521 enable ? "enabled" : "disabled", qdev->geneve.udp_port);
523 DP_ERR(edev, "Failed to update tunn_clss %u\n",
531 qede_udp_dst_port_del(struct rte_eth_dev *eth_dev,
532 struct rte_eth_udp_tunnel *tunnel_udp)
534 struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
535 struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
536 struct ecore_tunnel_info tunn; /* @DPDK */
540 PMD_INIT_FUNC_TRACE(edev);
542 memset(&tunn, 0, sizeof(tunn));
544 switch (tunnel_udp->prot_type) {
545 case RTE_TUNNEL_TYPE_VXLAN:
546 if (qdev->vxlan.udp_port != tunnel_udp->udp_port) {
547 DP_ERR(edev, "UDP port %u doesn't exist\n",
548 tunnel_udp->udp_port);
553 tunn.vxlan_port.b_update_port = true;
554 tunn.vxlan_port.port = udp_port;
556 rc = qede_tunnel_update(qdev, &tunn);
557 if (rc != ECORE_SUCCESS) {
558 DP_ERR(edev, "Unable to config UDP port %u\n",
559 tunn.vxlan_port.port);
563 qdev->vxlan.udp_port = udp_port;
564 /* If the request is to delete UDP port and if the number of
565 * VXLAN filters have reached 0 then VxLAN offload can be be
568 if (qdev->vxlan.enable && qdev->vxlan.num_filters == 0)
569 return qede_vxlan_enable(eth_dev,
570 ECORE_TUNN_CLSS_MAC_VLAN, false);
573 case RTE_TUNNEL_TYPE_GENEVE:
574 if (qdev->geneve.udp_port != tunnel_udp->udp_port) {
575 DP_ERR(edev, "UDP port %u doesn't exist\n",
576 tunnel_udp->udp_port);
582 tunn.geneve_port.b_update_port = true;
583 tunn.geneve_port.port = udp_port;
585 rc = qede_tunnel_update(qdev, &tunn);
586 if (rc != ECORE_SUCCESS) {
587 DP_ERR(edev, "Unable to config UDP port %u\n",
588 tunn.vxlan_port.port);
592 qdev->vxlan.udp_port = udp_port;
593 /* If the request is to delete UDP port and if the number of
594 * GENEVE filters have reached 0 then GENEVE offload can be be
597 if (qdev->geneve.enable && qdev->geneve.num_filters == 0)
598 return qede_geneve_enable(eth_dev,
599 ECORE_TUNN_CLSS_MAC_VLAN, false);
611 qede_udp_dst_port_add(struct rte_eth_dev *eth_dev,
612 struct rte_eth_udp_tunnel *tunnel_udp)
614 struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
615 struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
616 struct ecore_tunnel_info tunn; /* @DPDK */
620 PMD_INIT_FUNC_TRACE(edev);
622 memset(&tunn, 0, sizeof(tunn));
624 switch (tunnel_udp->prot_type) {
625 case RTE_TUNNEL_TYPE_VXLAN:
626 if (qdev->vxlan.udp_port == tunnel_udp->udp_port) {
628 "UDP port %u for VXLAN was already configured\n",
629 tunnel_udp->udp_port);
630 return ECORE_SUCCESS;
633 /* Enable VxLAN tunnel with default MAC/VLAN classification if
634 * it was not enabled while adding VXLAN filter before UDP port
637 if (!qdev->vxlan.enable) {
638 rc = qede_vxlan_enable(eth_dev,
639 ECORE_TUNN_CLSS_MAC_VLAN, true);
640 if (rc != ECORE_SUCCESS) {
641 DP_ERR(edev, "Failed to enable VXLAN "
642 "prior to updating UDP port\n");
646 udp_port = tunnel_udp->udp_port;
648 tunn.vxlan_port.b_update_port = true;
649 tunn.vxlan_port.port = udp_port;
651 rc = qede_tunnel_update(qdev, &tunn);
652 if (rc != ECORE_SUCCESS) {
653 DP_ERR(edev, "Unable to config UDP port %u for VXLAN\n",
658 DP_INFO(edev, "Updated UDP port %u for VXLAN\n", udp_port);
660 qdev->vxlan.udp_port = udp_port;
662 case RTE_TUNNEL_TYPE_GENEVE:
663 if (qdev->geneve.udp_port == tunnel_udp->udp_port) {
665 "UDP port %u for GENEVE was already configured\n",
666 tunnel_udp->udp_port);
667 return ECORE_SUCCESS;
670 /* Enable GENEVE tunnel with default MAC/VLAN classification if
671 * it was not enabled while adding GENEVE filter before UDP port
674 if (!qdev->geneve.enable) {
675 rc = qede_geneve_enable(eth_dev,
676 ECORE_TUNN_CLSS_MAC_VLAN, true);
677 if (rc != ECORE_SUCCESS) {
678 DP_ERR(edev, "Failed to enable GENEVE "
679 "prior to updating UDP port\n");
683 udp_port = tunnel_udp->udp_port;
685 tunn.geneve_port.b_update_port = true;
686 tunn.geneve_port.port = udp_port;
688 rc = qede_tunnel_update(qdev, &tunn);
689 if (rc != ECORE_SUCCESS) {
690 DP_ERR(edev, "Unable to config UDP port %u for GENEVE\n",
695 DP_INFO(edev, "Updated UDP port %u for GENEVE\n", udp_port);
697 qdev->geneve.udp_port = udp_port;
707 qede_flow_validate_attr(__rte_unused struct rte_eth_dev *dev,
708 const struct rte_flow_attr *attr,
709 struct rte_flow_error *error)
712 rte_flow_error_set(error, EINVAL,
713 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
718 if (attr->group != 0) {
719 rte_flow_error_set(error, ENOTSUP,
720 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, attr,
721 "Groups are not supported");
725 if (attr->priority != 0) {
726 rte_flow_error_set(error, ENOTSUP,
727 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, attr,
728 "Priorities are not supported");
732 if (attr->egress != 0) {
733 rte_flow_error_set(error, ENOTSUP,
734 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attr,
735 "Egress is not supported");
739 if (attr->transfer != 0) {
740 rte_flow_error_set(error, ENOTSUP,
741 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, attr,
742 "Transfer is not supported");
746 if (attr->ingress == 0) {
747 rte_flow_error_set(error, ENOTSUP,
748 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, attr,
749 "Only ingress is supported");
757 qede_flow_parse_pattern(__rte_unused struct rte_eth_dev *dev,
758 const struct rte_flow_item pattern[],
759 struct rte_flow_error *error,
760 struct rte_flow *flow)
762 bool l3 = false, l4 = false;
764 if (pattern == NULL) {
765 rte_flow_error_set(error, EINVAL,
766 RTE_FLOW_ERROR_TYPE_ITEM_NUM, NULL,
771 for (; pattern->type != RTE_FLOW_ITEM_TYPE_END; pattern++) {
772 if (!pattern->spec) {
773 rte_flow_error_set(error, EINVAL,
774 RTE_FLOW_ERROR_TYPE_ITEM,
776 "Item spec not defined");
781 rte_flow_error_set(error, EINVAL,
782 RTE_FLOW_ERROR_TYPE_ITEM,
784 "Item last not supported");
789 rte_flow_error_set(error, EINVAL,
790 RTE_FLOW_ERROR_TYPE_ITEM,
792 "Item mask not supported");
796 /* Below validation is only for 4 tuple flow
797 * (GFT_PROFILE_TYPE_4_TUPLE)
798 * - src and dst L3 address (IPv4 or IPv6)
799 * - src and dst L4 port (TCP or UDP)
802 switch (pattern->type) {
803 case RTE_FLOW_ITEM_TYPE_IPV4:
807 const struct rte_flow_item_ipv4 *spec;
809 spec = pattern->spec;
810 flow->entry.tuple.src_ipv4 = spec->hdr.src_addr;
811 flow->entry.tuple.dst_ipv4 = spec->hdr.dst_addr;
812 flow->entry.tuple.eth_proto =
817 case RTE_FLOW_ITEM_TYPE_IPV6:
821 const struct rte_flow_item_ipv6 *spec;
823 spec = pattern->spec;
824 rte_memcpy(flow->entry.tuple.src_ipv6,
827 rte_memcpy(flow->entry.tuple.dst_ipv6,
830 flow->entry.tuple.eth_proto =
835 case RTE_FLOW_ITEM_TYPE_UDP:
839 const struct rte_flow_item_udp *spec;
841 spec = pattern->spec;
842 flow->entry.tuple.src_port =
844 flow->entry.tuple.dst_port =
846 flow->entry.tuple.ip_proto = IPPROTO_UDP;
850 case RTE_FLOW_ITEM_TYPE_TCP:
854 const struct rte_flow_item_tcp *spec;
856 spec = pattern->spec;
857 flow->entry.tuple.src_port =
859 flow->entry.tuple.dst_port =
861 flow->entry.tuple.ip_proto = IPPROTO_TCP;
866 rte_flow_error_set(error, EINVAL,
867 RTE_FLOW_ERROR_TYPE_ITEM,
869 "Only 4 tuple (IPV4, IPV6, UDP and TCP) item types supported");
875 rte_flow_error_set(error, EINVAL,
876 RTE_FLOW_ERROR_TYPE_ITEM,
878 "Item types need to have both L3 and L4 protocols");
886 qede_flow_parse_actions(struct rte_eth_dev *dev,
887 const struct rte_flow_action actions[],
888 struct rte_flow_error *error,
889 struct rte_flow *flow)
891 const struct rte_flow_action_queue *queue;
893 if (actions == NULL) {
894 rte_flow_error_set(error, EINVAL,
895 RTE_FLOW_ERROR_TYPE_ACTION_NUM, NULL,
900 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
901 switch (actions->type) {
902 case RTE_FLOW_ACTION_TYPE_QUEUE:
903 queue = actions->conf;
905 if (queue->index >= QEDE_RSS_COUNT(dev)) {
906 rte_flow_error_set(error, EINVAL,
907 RTE_FLOW_ERROR_TYPE_ACTION,
914 flow->entry.rx_queue = queue->index;
917 case RTE_FLOW_ACTION_TYPE_DROP:
919 flow->entry.is_drop = true;
922 rte_flow_error_set(error, ENOTSUP,
923 RTE_FLOW_ERROR_TYPE_ACTION,
925 "Action is not supported - only ACTION_TYPE_QUEUE and ACTION_TYPE_DROP supported");
934 qede_flow_parse(struct rte_eth_dev *dev,
935 const struct rte_flow_attr *attr,
936 const struct rte_flow_item patterns[],
937 const struct rte_flow_action actions[],
938 struct rte_flow_error *error,
939 struct rte_flow *flow)
944 rc = qede_flow_validate_attr(dev, attr, error);
948 /* parse and validate item pattern and actions.
949 * Given item list and actions will be translate to qede PMD
950 * specific arfs structure.
952 rc = qede_flow_parse_pattern(dev, patterns, error, flow);
956 rc = qede_flow_parse_actions(dev, actions, error, flow);
962 qede_flow_validate(struct rte_eth_dev *dev,
963 const struct rte_flow_attr *attr,
964 const struct rte_flow_item patterns[],
965 const struct rte_flow_action actions[],
966 struct rte_flow_error *error)
968 return qede_flow_parse(dev, attr, patterns, actions, error, NULL);
971 static struct rte_flow *
972 qede_flow_create(struct rte_eth_dev *dev,
973 const struct rte_flow_attr *attr,
974 const struct rte_flow_item pattern[],
975 const struct rte_flow_action actions[],
976 struct rte_flow_error *error)
978 struct rte_flow *flow = NULL;
981 flow = rte_zmalloc("qede_rte_flow", sizeof(*flow), 0);
983 rte_flow_error_set(error, ENOMEM,
984 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
985 "Failed to allocate memory");
989 rc = qede_flow_parse(dev, attr, pattern, actions, error, flow);
995 rc = qede_config_arfs_filter(dev, &flow->entry, true);
997 rte_flow_error_set(error, rc,
998 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
999 "Failed to configure flow filter");
1008 qede_flow_destroy(struct rte_eth_dev *eth_dev,
1009 struct rte_flow *flow,
1010 struct rte_flow_error *error)
1014 rc = qede_config_arfs_filter(eth_dev, &flow->entry, false);
1016 rte_flow_error_set(error, rc,
1017 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1018 "Failed to delete flow filter");
1026 qede_flow_flush(struct rte_eth_dev *eth_dev,
1027 struct rte_flow_error *error)
1029 struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
1030 struct qede_arfs_entry *tmp = NULL;
1033 while (!SLIST_EMPTY(&qdev->arfs_info.arfs_list_head)) {
1034 tmp = SLIST_FIRST(&qdev->arfs_info.arfs_list_head);
1036 rc = qede_config_arfs_filter(eth_dev, tmp, false);
1038 rte_flow_error_set(error, rc,
1039 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1040 "Failed to flush flow filter");
1046 const struct rte_flow_ops qede_flow_ops = {
1047 .validate = qede_flow_validate,
1048 .create = qede_flow_create,
1049 .destroy = qede_flow_destroy,
1050 .flush = qede_flow_flush,
1053 int qede_dev_filter_ctrl(struct rte_eth_dev *eth_dev,
1054 enum rte_filter_type filter_type,
1055 enum rte_filter_op filter_op,
1058 struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
1059 struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
1061 switch (filter_type) {
1062 case RTE_ETH_FILTER_GENERIC:
1063 if (ECORE_IS_CMT(edev)) {
1064 DP_ERR(edev, "flowdir is not supported in 100G mode\n");
1068 if (filter_op != RTE_ETH_FILTER_GET)
1071 *(const void **)arg = &qede_flow_ops;
1073 case RTE_ETH_FILTER_MAX:
1075 DP_ERR(edev, "Unsupported filter type %d\n",