net/qede/base: support MFW crash dump
[dpdk.git] / drivers / net / qede / qede_main.c
1 /*
2  * Copyright (c) 2016 QLogic Corporation.
3  * All rights reserved.
4  * www.qlogic.com
5  *
6  * See LICENSE.qede_pmd for copyright and licensing details.
7  */
8
9 #include <limits.h>
10 #include <time.h>
11 #include <rte_alarm.h>
12
13 #include "qede_ethdev.h"
14
15 static uint8_t npar_tx_switching = 1;
16
17 /* Alarm timeout. */
18 #define QEDE_ALARM_TIMEOUT_US 100000
19
20 /* Global variable to hold absolute path of fw file */
21 char fw_file[PATH_MAX];
22
23 const char *QEDE_DEFAULT_FIRMWARE =
24         "/lib/firmware/qed/qed_init_values_zipped-8.10.9.0.bin";
25
26 static void
27 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
28 {
29         int i;
30
31         for (i = 0; i < edev->num_hwfns; i++) {
32                 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
33                 p_hwfn->pf_params = *params;
34         }
35 }
36
37 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev)
38 {
39         edev->regview = pci_dev->mem_resource[0].addr;
40         edev->doorbells = pci_dev->mem_resource[2].addr;
41 }
42
43 static int
44 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
45           enum qed_protocol protocol, uint32_t dp_module,
46           uint8_t dp_level, bool is_vf)
47 {
48         struct ecore_hw_prepare_params hw_prepare_params;
49         struct qede_dev *qdev = (struct qede_dev *)edev;
50         int rc;
51
52         ecore_init_struct(edev);
53         qdev->protocol = protocol;
54         if (is_vf) {
55                 edev->b_is_vf = true;
56                 edev->b_hw_channel = true; /* @DPDK */
57         }
58         ecore_init_dp(edev, dp_module, dp_level, NULL);
59         qed_init_pci(edev, pci_dev);
60
61         memset(&hw_prepare_params, 0, sizeof(hw_prepare_params));
62         hw_prepare_params.personality = ECORE_PCI_ETH;
63         hw_prepare_params.drv_resc_alloc = false;
64         hw_prepare_params.chk_reg_fifo = false;
65         rc = ecore_hw_prepare(edev, &hw_prepare_params);
66         if (rc) {
67                 DP_ERR(edev, "hw prepare failed\n");
68                 return rc;
69         }
70
71         return rc;
72 }
73
74 static int qed_nic_setup(struct ecore_dev *edev)
75 {
76         int rc, i;
77
78         rc = ecore_resc_alloc(edev);
79         if (rc)
80                 return rc;
81
82         DP_INFO(edev, "Allocated qed resources\n");
83         ecore_resc_setup(edev);
84
85         return rc;
86 }
87
88 #ifdef CONFIG_ECORE_ZIPPED_FW
89 static int qed_alloc_stream_mem(struct ecore_dev *edev)
90 {
91         int i;
92
93         for_each_hwfn(edev, i) {
94                 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
95
96                 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
97                                              sizeof(*p_hwfn->stream));
98                 if (!p_hwfn->stream)
99                         return -ENOMEM;
100         }
101
102         return 0;
103 }
104
105 static void qed_free_stream_mem(struct ecore_dev *edev)
106 {
107         int i;
108
109         for_each_hwfn(edev, i) {
110                 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
111
112                 if (!p_hwfn->stream)
113                         return;
114
115                 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
116         }
117 }
118 #endif
119
120 #ifdef CONFIG_ECORE_BINARY_FW
121 static int qed_load_firmware_data(struct ecore_dev *edev)
122 {
123         int fd;
124         struct stat st;
125         const char *fw = RTE_LIBRTE_QEDE_FW;
126
127         if (strcmp(fw, "") == 0)
128                 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE);
129         else
130                 strcpy(fw_file, fw);
131
132         fd = open(fw_file, O_RDONLY);
133         if (fd < 0) {
134                 DP_NOTICE(edev, false, "Can't open firmware file\n");
135                 return -ENOENT;
136         }
137
138         if (fstat(fd, &st) < 0) {
139                 DP_NOTICE(edev, false, "Can't stat firmware file\n");
140                 return -1;
141         }
142
143         edev->firmware = rte_zmalloc("qede_fw", st.st_size,
144                                     RTE_CACHE_LINE_SIZE);
145         if (!edev->firmware) {
146                 DP_NOTICE(edev, false, "Can't allocate memory for firmware\n");
147                 close(fd);
148                 return -ENOMEM;
149         }
150
151         if (read(fd, edev->firmware, st.st_size) != st.st_size) {
152                 DP_NOTICE(edev, false, "Can't read firmware data\n");
153                 close(fd);
154                 return -1;
155         }
156
157         edev->fw_len = st.st_size;
158         if (edev->fw_len < 104) {
159                 DP_NOTICE(edev, false, "Invalid fw size: %" PRIu64 "\n",
160                           edev->fw_len);
161                 return -EINVAL;
162         }
163
164         return 0;
165 }
166 #endif
167
168 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn)
169 {
170         uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced;
171
172         is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac,
173                                                       &is_mac_forced);
174         if (is_mac_exist && is_mac_forced)
175                 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN);
176
177         /* Always update link configuration according to bulletin */
178         qed_link_update(hwfn);
179 }
180
181 static void qede_vf_task(void *arg)
182 {
183         struct ecore_hwfn *p_hwfn = arg;
184         uint8_t change = 0;
185
186         /* Read the bulletin board, and re-schedule the task */
187         ecore_vf_read_bulletin(p_hwfn, &change);
188         if (change)
189                 qed_handle_bulletin_change(p_hwfn);
190
191         rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn);
192 }
193
194 static void qed_start_iov_task(struct ecore_dev *edev)
195 {
196         struct ecore_hwfn *p_hwfn;
197         int i;
198
199         for_each_hwfn(edev, i) {
200                 p_hwfn = &edev->hwfns[i];
201                 if (!IS_PF(edev))
202                         rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task,
203                                           p_hwfn);
204         }
205 }
206
207 static void qed_stop_iov_task(struct ecore_dev *edev)
208 {
209         struct ecore_hwfn *p_hwfn;
210         int i;
211
212         for_each_hwfn(edev, i) {
213                 p_hwfn = &edev->hwfns[i];
214                 if (!IS_PF(edev))
215                         rte_eal_alarm_cancel(qede_vf_task, p_hwfn);
216         }
217 }
218 static int qed_slowpath_start(struct ecore_dev *edev,
219                               struct qed_slowpath_params *params)
220 {
221         bool allow_npar_tx_switching;
222         const uint8_t *data = NULL;
223         struct ecore_hwfn *hwfn;
224         struct ecore_mcp_drv_version drv_version;
225         struct ecore_hw_init_params hw_init_params;
226         struct qede_dev *qdev = (struct qede_dev *)edev;
227         int rc;
228 #ifdef QED_ENC_SUPPORTED
229         struct ecore_tunn_start_params tunn_info;
230 #endif
231
232 #ifdef CONFIG_ECORE_BINARY_FW
233         if (IS_PF(edev)) {
234                 rc = qed_load_firmware_data(edev);
235                 if (rc) {
236                         DP_NOTICE(edev, true,
237                                   "Failed to find fw file %s\n", fw_file);
238                         goto err;
239                 }
240         }
241 #endif
242
243         rc = qed_nic_setup(edev);
244         if (rc)
245                 goto err;
246
247         /* set int_coalescing_mode */
248         edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
249
250 #ifdef CONFIG_ECORE_ZIPPED_FW
251         if (IS_PF(edev)) {
252                 /* Allocate stream for unzipping */
253                 rc = qed_alloc_stream_mem(edev);
254                 if (rc) {
255                         DP_NOTICE(edev, true,
256                         "Failed to allocate stream memory\n");
257                         goto err2;
258                 }
259         }
260
261         qed_start_iov_task(edev);
262 #endif
263
264 #ifdef CONFIG_ECORE_BINARY_FW
265         if (IS_PF(edev))
266                 data = (const uint8_t *)edev->firmware + sizeof(u32);
267 #endif
268
269         allow_npar_tx_switching = npar_tx_switching ? true : false;
270
271         /* Start the slowpath */
272         memset(&hw_init_params, 0, sizeof(hw_init_params));
273 #ifdef QED_ENC_SUPPORTED
274         memset(&tunn_info, 0, sizeof(tunn_info));
275         tunn_info.tunn_mode |= 1 << QED_MODE_VXLAN_TUNN |
276             1 << QED_MODE_L2GRE_TUNN |
277             1 << QED_MODE_IPGRE_TUNN |
278             1 << QED_MODE_L2GENEVE_TUNN | 1 << QED_MODE_IPGENEVE_TUNN;
279         tunn_info.tunn_clss_vxlan = QED_TUNN_CLSS_MAC_VLAN;
280         tunn_info.tunn_clss_l2gre = QED_TUNN_CLSS_MAC_VLAN;
281         tunn_info.tunn_clss_ipgre = QED_TUNN_CLSS_MAC_VLAN;
282         hw_init_params.p_tunn = &tunn_info;
283 #endif
284         hw_init_params.b_hw_start = true;
285         hw_init_params.int_mode = ECORE_INT_MODE_MSIX;
286         hw_init_params.allow_npar_tx_switch = allow_npar_tx_switching;
287         hw_init_params.bin_fw_data = data;
288         hw_init_params.epoch = (u32)time(NULL);
289         rc = ecore_hw_init(edev, &hw_init_params);
290         if (rc) {
291                 DP_ERR(edev, "ecore_hw_init failed\n");
292                 goto err2;
293         }
294
295         DP_INFO(edev, "HW inited and function started\n");
296
297         if (IS_PF(edev)) {
298                 hwfn = ECORE_LEADING_HWFN(edev);
299                 drv_version.version = (params->drv_major << 24) |
300                     (params->drv_minor << 16) |
301                     (params->drv_rev << 8) | (params->drv_eng);
302                 /* TBD: strlcpy() */
303                 strncpy((char *)drv_version.name, (const char *)params->name,
304                         MCP_DRV_VER_STR_SIZE - 4);
305                 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
306                                                 &drv_version);
307                 if (rc) {
308                         DP_NOTICE(edev, true,
309                                   "Failed sending drv version command\n");
310                         return rc;
311                 }
312         }
313
314         ecore_reset_vport_stats(edev);
315
316         return 0;
317
318         ecore_hw_stop(edev);
319 err2:
320         ecore_resc_free(edev);
321 err:
322 #ifdef CONFIG_ECORE_BINARY_FW
323         if (IS_PF(edev)) {
324                 if (edev->firmware)
325                         rte_free(edev->firmware);
326                 edev->firmware = NULL;
327         }
328 #endif
329         qed_stop_iov_task(edev);
330
331         return rc;
332 }
333
334 static int
335 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
336 {
337         struct ecore_ptt *ptt = NULL;
338
339         memset(dev_info, 0, sizeof(struct qed_dev_info));
340         dev_info->num_hwfns = edev->num_hwfns;
341         dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]);
342         rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
343                ETHER_ADDR_LEN);
344
345         if (IS_PF(edev)) {
346                 dev_info->fw_major = FW_MAJOR_VERSION;
347                 dev_info->fw_minor = FW_MINOR_VERSION;
348                 dev_info->fw_rev = FW_REVISION_VERSION;
349                 dev_info->fw_eng = FW_ENGINEERING_VERSION;
350                 dev_info->mf_mode = edev->mf_mode;
351                 dev_info->tx_switching = false;
352         } else {
353                 ecore_vf_get_fw_version(&edev->hwfns[0], &dev_info->fw_major,
354                                         &dev_info->fw_minor, &dev_info->fw_rev,
355                                         &dev_info->fw_eng);
356         }
357
358         if (IS_PF(edev)) {
359                 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
360                 if (ptt) {
361                         ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
362                                               &dev_info->mfw_rev, NULL);
363
364                         ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
365                                                  &dev_info->flash_size);
366
367                         /* Workaround to allow PHY-read commands for
368                          * B0 bringup.
369                          */
370                         if (ECORE_IS_BB_B0(edev))
371                                 dev_info->flash_size = 0xffffffff;
372
373                         ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
374                 }
375         } else {
376                 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
377                                       &dev_info->mfw_rev, NULL);
378         }
379
380         return 0;
381 }
382
383 int
384 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
385 {
386         struct qede_dev *qdev = (struct qede_dev *)edev;
387         int i;
388
389         memset(info, 0, sizeof(*info));
390
391         info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
392
393         if (IS_PF(edev)) {
394                 info->num_queues = 0;
395                 for_each_hwfn(edev, i)
396                         info->num_queues +=
397                         FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
398
399                 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN);
400
401                 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
402                            ETHER_ADDR_LEN);
403         } else {
404                 ecore_vf_get_num_rxqs(&edev->hwfns[0], &info->num_queues);
405
406                 ecore_vf_get_num_vlan_filters(&edev->hwfns[0],
407                                               &info->num_vlan_filters);
408
409                 ecore_vf_get_port_mac(&edev->hwfns[0],
410                                       (uint8_t *)&info->port_mac);
411         }
412
413         qed_fill_dev_info(edev, &info->common);
414
415         if (IS_VF(edev))
416                 memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN);
417
418         return 0;
419 }
420
421 static void
422 qed_set_id(struct ecore_dev *edev, char name[NAME_SIZE],
423            const char ver_str[VER_SIZE])
424 {
425         int i;
426
427         rte_memcpy(edev->name, name, NAME_SIZE);
428         for_each_hwfn(edev, i) {
429                 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
430         }
431         rte_memcpy(edev->ver_str, ver_str, VER_SIZE);
432         edev->drv_type = DRV_ID_DRV_TYPE_LINUX;
433 }
434
435 static uint32_t
436 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info,
437             void *sb_virt_addr, dma_addr_t sb_phy_addr,
438             uint16_t sb_id, enum qed_sb_type type)
439 {
440         struct ecore_hwfn *p_hwfn;
441         int hwfn_index;
442         uint16_t rel_sb_id;
443         uint8_t n_hwfns;
444         uint32_t rc;
445
446         /* RoCE uses single engine and CMT uses two engines. When using both
447          * we force only a single engine. Storage uses only engine 0 too.
448          */
449         if (type == QED_SB_TYPE_L2_QUEUE)
450                 n_hwfns = edev->num_hwfns;
451         else
452                 n_hwfns = 1;
453
454         hwfn_index = sb_id % n_hwfns;
455         p_hwfn = &edev->hwfns[hwfn_index];
456         rel_sb_id = sb_id / n_hwfns;
457
458         DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
459                 hwfn_index, rel_sb_id, sb_id);
460
461         rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
462                                sb_virt_addr, sb_phy_addr, rel_sb_id);
463
464         return rc;
465 }
466
467 static void qed_fill_link(struct ecore_hwfn *hwfn,
468                           struct qed_link_output *if_link)
469 {
470         struct ecore_mcp_link_params params;
471         struct ecore_mcp_link_state link;
472         struct ecore_mcp_link_capabilities link_caps;
473         uint32_t media_type;
474         uint8_t change = 0;
475
476         memset(if_link, 0, sizeof(*if_link));
477
478         /* Prepare source inputs */
479         if (IS_PF(hwfn->p_dev)) {
480                 rte_memcpy(&params, ecore_mcp_get_link_params(hwfn),
481                        sizeof(params));
482                 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
483                 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
484                        sizeof(link_caps));
485         } else {
486                 ecore_vf_read_bulletin(hwfn, &change);
487                 ecore_vf_get_link_params(hwfn, &params);
488                 ecore_vf_get_link_state(hwfn, &link);
489                 ecore_vf_get_link_caps(hwfn, &link_caps);
490         }
491
492         /* Set the link parameters to pass to protocol driver */
493         if (link.link_up)
494                 if_link->link_up = true;
495
496         if (link.link_up)
497                 if_link->speed = link.speed;
498
499         if_link->duplex = QEDE_DUPLEX_FULL;
500
501         if (params.speed.autoneg)
502                 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;
503
504         if (params.pause.autoneg || params.pause.forced_rx ||
505             params.pause.forced_tx)
506                 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE;
507
508         if (params.pause.autoneg)
509                 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
510
511         if (params.pause.forced_rx)
512                 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
513
514         if (params.pause.forced_tx)
515                 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
516 }
517
518 static void
519 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link)
520 {
521         qed_fill_link(&edev->hwfns[0], if_link);
522
523 #ifdef CONFIG_QED_SRIOV
524         for_each_hwfn(cdev, i)
525                 qed_inform_vf_link_state(&cdev->hwfns[i]);
526 #endif
527 }
528
529 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
530 {
531         struct ecore_hwfn *hwfn;
532         struct ecore_ptt *ptt;
533         struct ecore_mcp_link_params *link_params;
534         int rc;
535
536         if (IS_VF(edev))
537                 return 0;
538
539         /* The link should be set only once per PF */
540         hwfn = &edev->hwfns[0];
541
542         ptt = ecore_ptt_acquire(hwfn);
543         if (!ptt)
544                 return -EBUSY;
545
546         link_params = ecore_mcp_get_link_params(hwfn);
547         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
548                 link_params->speed.autoneg = params->autoneg;
549
550         if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
551                 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
552                         link_params->pause.autoneg = true;
553                 else
554                         link_params->pause.autoneg = false;
555                 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
556                         link_params->pause.forced_rx = true;
557                 else
558                         link_params->pause.forced_rx = false;
559                 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
560                         link_params->pause.forced_tx = true;
561                 else
562                         link_params->pause.forced_tx = false;
563         }
564
565         rc = ecore_mcp_set_link(hwfn, ptt, params->link_up);
566
567         ecore_ptt_release(hwfn, ptt);
568
569         return rc;
570 }
571
572 void qed_link_update(struct ecore_hwfn *hwfn)
573 {
574         struct qed_link_output if_link;
575
576         qed_fill_link(hwfn, &if_link);
577 }
578
579 static int qed_drain(struct ecore_dev *edev)
580 {
581         struct ecore_hwfn *hwfn;
582         struct ecore_ptt *ptt;
583         int i, rc;
584
585         if (IS_VF(edev))
586                 return 0;
587
588         for_each_hwfn(edev, i) {
589                 hwfn = &edev->hwfns[i];
590                 ptt = ecore_ptt_acquire(hwfn);
591                 if (!ptt) {
592                         DP_NOTICE(hwfn, true, "Failed to drain NIG; No PTT\n");
593                         return -EBUSY;
594                 }
595                 rc = ecore_mcp_drain(hwfn, ptt);
596                 if (rc)
597                         return rc;
598                 ecore_ptt_release(hwfn, ptt);
599         }
600
601         return 0;
602 }
603
604 static int qed_nic_stop(struct ecore_dev *edev)
605 {
606         int i, rc;
607
608         rc = ecore_hw_stop(edev);
609         for (i = 0; i < edev->num_hwfns; i++) {
610                 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
611
612                 if (p_hwfn->b_sp_dpc_enabled)
613                         p_hwfn->b_sp_dpc_enabled = false;
614         }
615         return rc;
616 }
617
618 static int qed_nic_reset(struct ecore_dev *edev)
619 {
620         int rc;
621
622         rc = ecore_hw_reset(edev);
623         if (rc)
624                 return rc;
625
626         ecore_resc_free(edev);
627
628         return 0;
629 }
630
631 static int qed_slowpath_stop(struct ecore_dev *edev)
632 {
633 #ifdef CONFIG_QED_SRIOV
634         int i;
635 #endif
636
637         if (!edev)
638                 return -ENODEV;
639
640         if (IS_PF(edev)) {
641 #ifdef CONFIG_ECORE_ZIPPED_FW
642                 qed_free_stream_mem(edev);
643 #endif
644
645 #ifdef CONFIG_QED_SRIOV
646                 if (IS_QED_ETH_IF(edev))
647                         qed_sriov_disable(edev, true);
648 #endif
649                 qed_nic_stop(edev);
650         }
651
652         qed_nic_reset(edev);
653         qed_stop_iov_task(edev);
654
655         return 0;
656 }
657
658 static void qed_remove(struct ecore_dev *edev)
659 {
660         if (!edev)
661                 return;
662
663         ecore_hw_remove(edev);
664 }
665
666 const struct qed_common_ops qed_common_ops_pass = {
667         INIT_STRUCT_FIELD(probe, &qed_probe),
668         INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params),
669         INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start),
670         INIT_STRUCT_FIELD(set_id, &qed_set_id),
671         INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc),
672         INIT_STRUCT_FIELD(chain_free, &ecore_chain_free),
673         INIT_STRUCT_FIELD(sb_init, &qed_sb_init),
674         INIT_STRUCT_FIELD(get_link, &qed_get_current_link),
675         INIT_STRUCT_FIELD(set_link, &qed_set_link),
676         INIT_STRUCT_FIELD(drain, &qed_drain),
677         INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
678         INIT_STRUCT_FIELD(remove, &qed_remove),
679 };