drivers/net/sfc/base/efx_impl.h

   1 /*
   2  * Copyright (c) 2007-2016 Solarflare Communications Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *
   8  * 1. Redistributions of source code must retain the above copyright notice,
   9  *    this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright notice,
  11  *    this list of conditions and the following disclaimer in the documentation
  12  *    and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  * The views and conclusions contained in the software and documentation are
  27  * those of the authors and should not be interpreted as representing official
  28  * policies, either expressed or implied, of the FreeBSD Project.
  29  */
  30
  31 #ifndef _SYS_EFX_IMPL_H
  32 #define _SYS_EFX_IMPL_H
  33
  34 #include "efx.h"
  35 #include "efx_regs.h"
  36 #include "efx_regs_ef10.h"
  37
  38 /* FIXME: Add definition for driver generated software events */
  39 #ifndef ESE_DZ_EV_CODE_DRV_GEN_EV
  40 #define ESE_DZ_EV_CODE_DRV_GEN_EV FSE_AZ_EV_CODE_DRV_GEN_EV
  41 #endif
  42
  43
  44 #ifdef  __cplusplus
  45 extern "C" {
  46 #endif
  47
  48 #define EFX_MOD_MCDI            0x00000001
  49 #define EFX_MOD_PROBE           0x00000002
  50 #define EFX_MOD_NVRAM           0x00000004
  51 #define EFX_MOD_VPD             0x00000008
  52 #define EFX_MOD_NIC             0x00000010
  53 #define EFX_MOD_INTR            0x00000020
  54 #define EFX_MOD_EV              0x00000040
  55 #define EFX_MOD_RX              0x00000080
  56 #define EFX_MOD_TX              0x00000100
  57 #define EFX_MOD_PORT            0x00000200
  58 #define EFX_MOD_MON             0x00000400
  59 #define EFX_MOD_FILTER          0x00001000
  60 #define EFX_MOD_LIC             0x00002000
  61
  62 #define EFX_RESET_PHY           0x00000001
  63 #define EFX_RESET_RXQ_ERR       0x00000002
  64 #define EFX_RESET_TXQ_ERR       0x00000004
  65
  66 typedef enum efx_mac_type_e {
  67         EFX_MAC_INVALID = 0,
  68         EFX_MAC_SIENA,
  69         EFX_MAC_HUNTINGTON,
  70         EFX_MAC_MEDFORD,
  71         EFX_MAC_NTYPES
  72 } efx_mac_type_t;
  73
  74 typedef struct efx_ev_ops_s {
  75         efx_rc_t        (*eevo_init)(efx_nic_t *);
  76         void            (*eevo_fini)(efx_nic_t *);
  77         efx_rc_t        (*eevo_qcreate)(efx_nic_t *, unsigned int,
  78                                           efsys_mem_t *, size_t, uint32_t,
  79                                           uint32_t, uint32_t, efx_evq_t *);
  80         void            (*eevo_qdestroy)(efx_evq_t *);
  81         efx_rc_t        (*eevo_qprime)(efx_evq_t *, unsigned int);
  82         void            (*eevo_qpost)(efx_evq_t *, uint16_t);
  83         efx_rc_t        (*eevo_qmoderate)(efx_evq_t *, unsigned int);
  84 } efx_ev_ops_t;
  85
  86 typedef struct efx_tx_ops_s {
  87         efx_rc_t        (*etxo_init)(efx_nic_t *);
  88         void            (*etxo_fini)(efx_nic_t *);
  89         efx_rc_t        (*etxo_qcreate)(efx_nic_t *,
  90                                         unsigned int, unsigned int,
  91                                         efsys_mem_t *, size_t,
  92                                         uint32_t, uint16_t,
  93                                         efx_evq_t *, efx_txq_t *,
  94                                         unsigned int *);
  95         void            (*etxo_qdestroy)(efx_txq_t *);
  96         efx_rc_t        (*etxo_qpost)(efx_txq_t *, efx_buffer_t *,
  97                                       unsigned int, unsigned int,
  98                                       unsigned int *);
  99         void            (*etxo_qpush)(efx_txq_t *, unsigned int, unsigned int);
 100         efx_rc_t        (*etxo_qpace)(efx_txq_t *, unsigned int);
 101         efx_rc_t        (*etxo_qflush)(efx_txq_t *);
 102         void            (*etxo_qenable)(efx_txq_t *);
 103         efx_rc_t        (*etxo_qpio_enable)(efx_txq_t *);
 104         void            (*etxo_qpio_disable)(efx_txq_t *);
 105         efx_rc_t        (*etxo_qpio_write)(efx_txq_t *, uint8_t *, size_t,
 106                                            size_t);
 107         efx_rc_t        (*etxo_qpio_post)(efx_txq_t *, size_t, unsigned int,
 108                                            unsigned int *);
 109         efx_rc_t        (*etxo_qdesc_post)(efx_txq_t *, efx_desc_t *,
 110                                       unsigned int, unsigned int,
 111                                       unsigned int *);
 112         void            (*etxo_qdesc_dma_create)(efx_txq_t *, efsys_dma_addr_t,
 113                                                 size_t, boolean_t,
 114                                                 efx_desc_t *);
 115         void            (*etxo_qdesc_tso_create)(efx_txq_t *, uint16_t,
 116                                                 uint32_t, uint8_t,
 117                                                 efx_desc_t *);
 118         void            (*etxo_qdesc_tso2_create)(efx_txq_t *, uint16_t,
 119                                                 uint32_t, uint16_t,
 120                                                 efx_desc_t *, int);
 121         void            (*etxo_qdesc_vlantci_create)(efx_txq_t *, uint16_t,
 122                                                 efx_desc_t *);
 123 } efx_tx_ops_t;
 124
 125 typedef struct efx_rx_ops_s {
 126         efx_rc_t        (*erxo_init)(efx_nic_t *);
 127         void            (*erxo_fini)(efx_nic_t *);
 128         efx_rc_t        (*erxo_prefix_pktlen)(efx_nic_t *, uint8_t *,
 129                                               uint16_t *);
 130         void            (*erxo_qpost)(efx_rxq_t *, efsys_dma_addr_t *, size_t,
 131                                       unsigned int, unsigned int,
 132                                       unsigned int);
 133         void            (*erxo_qpush)(efx_rxq_t *, unsigned int, unsigned int *);
 134         efx_rc_t        (*erxo_qflush)(efx_rxq_t *);
 135         void            (*erxo_qenable)(efx_rxq_t *);
 136         efx_rc_t        (*erxo_qcreate)(efx_nic_t *enp, unsigned int,
 137                                         unsigned int, efx_rxq_type_t,
 138                                         efsys_mem_t *, size_t, uint32_t,
 139                                         efx_evq_t *, efx_rxq_t *);
 140         void            (*erxo_qdestroy)(efx_rxq_t *);
 141 } efx_rx_ops_t;
 142
 143 typedef struct efx_mac_ops_s {
 144         efx_rc_t        (*emo_poll)(efx_nic_t *, efx_link_mode_t *);
 145         efx_rc_t        (*emo_up)(efx_nic_t *, boolean_t *);
 146         efx_rc_t        (*emo_addr_set)(efx_nic_t *);
 147         efx_rc_t        (*emo_pdu_set)(efx_nic_t *);
 148         efx_rc_t        (*emo_pdu_get)(efx_nic_t *, size_t *);
 149         efx_rc_t        (*emo_reconfigure)(efx_nic_t *);
 150         efx_rc_t        (*emo_multicast_list_set)(efx_nic_t *);
 151         efx_rc_t        (*emo_filter_default_rxq_set)(efx_nic_t *,
 152                                                       efx_rxq_t *, boolean_t);
 153         void            (*emo_filter_default_rxq_clear)(efx_nic_t *);
 154 } efx_mac_ops_t;
 155
 156 typedef struct efx_phy_ops_s {
 157         efx_rc_t        (*epo_power)(efx_nic_t *, boolean_t); /* optional */
 158         efx_rc_t        (*epo_reset)(efx_nic_t *);
 159         efx_rc_t        (*epo_reconfigure)(efx_nic_t *);
 160         efx_rc_t        (*epo_verify)(efx_nic_t *);
 161         efx_rc_t        (*epo_oui_get)(efx_nic_t *, uint32_t *);
 162 } efx_phy_ops_t;
 163
 164 #if EFSYS_OPT_FILTER
 165 typedef struct efx_filter_ops_s {
 166         efx_rc_t        (*efo_init)(efx_nic_t *);
 167         void            (*efo_fini)(efx_nic_t *);
 168         efx_rc_t        (*efo_restore)(efx_nic_t *);
 169         efx_rc_t        (*efo_add)(efx_nic_t *, efx_filter_spec_t *,
 170                                    boolean_t may_replace);
 171         efx_rc_t        (*efo_delete)(efx_nic_t *, efx_filter_spec_t *);
 172         efx_rc_t        (*efo_supported_filters)(efx_nic_t *, uint32_t *, size_t *);
 173         efx_rc_t        (*efo_reconfigure)(efx_nic_t *, uint8_t const *, boolean_t,
 174                                    boolean_t, boolean_t, boolean_t,
 175                                    uint8_t const *, uint32_t);
 176 } efx_filter_ops_t;
 177
 178 extern  __checkReturn   efx_rc_t
 179 efx_filter_reconfigure(
 180         __in                            efx_nic_t *enp,
 181         __in_ecount(6)                  uint8_t const *mac_addr,
 182         __in                            boolean_t all_unicst,
 183         __in                            boolean_t mulcst,
 184         __in                            boolean_t all_mulcst,
 185         __in                            boolean_t brdcst,
 186         __in_ecount(6*count)            uint8_t const *addrs,
 187         __in                            uint32_t count);
 188
 189 #endif /* EFSYS_OPT_FILTER */
 190
 191
 192 typedef struct efx_port_s {
 193         efx_mac_type_t          ep_mac_type;
 194         uint32_t                ep_phy_type;
 195         uint8_t                 ep_port;
 196         uint32_t                ep_mac_pdu;
 197         uint8_t                 ep_mac_addr[6];
 198         efx_link_mode_t         ep_link_mode;
 199         boolean_t               ep_all_unicst;
 200         boolean_t               ep_mulcst;
 201         boolean_t               ep_all_mulcst;
 202         boolean_t               ep_brdcst;
 203         unsigned int            ep_fcntl;
 204         boolean_t               ep_fcntl_autoneg;
 205         efx_oword_t             ep_multicst_hash[2];
 206         uint8_t                 ep_mulcst_addr_list[EFX_MAC_ADDR_LEN *
 207                                                     EFX_MAC_MULTICAST_LIST_MAX];
 208         uint32_t                ep_mulcst_addr_count;
 209         efx_phy_media_type_t    ep_fixed_port_type;
 210         efx_phy_media_type_t    ep_module_type;
 211         uint32_t                ep_adv_cap_mask;
 212         uint32_t                ep_lp_cap_mask;
 213         uint32_t                ep_default_adv_cap_mask;
 214         uint32_t                ep_phy_cap_mask;
 215         boolean_t               ep_mac_drain;
 216         boolean_t               ep_mac_stats_pending;
 217         const efx_mac_ops_t     *ep_emop;
 218         const efx_phy_ops_t     *ep_epop;
 219 } efx_port_t;
 220
 221 typedef struct efx_mon_ops_s {
 222 } efx_mon_ops_t;
 223
 224 typedef struct efx_mon_s {
 225         efx_mon_type_t          em_type;
 226         const efx_mon_ops_t     *em_emop;
 227 } efx_mon_t;
 228
 229 typedef struct efx_intr_ops_s {
 230         efx_rc_t        (*eio_init)(efx_nic_t *, efx_intr_type_t, efsys_mem_t *);
 231         void            (*eio_enable)(efx_nic_t *);
 232         void            (*eio_disable)(efx_nic_t *);
 233         void            (*eio_disable_unlocked)(efx_nic_t *);
 234         efx_rc_t        (*eio_trigger)(efx_nic_t *, unsigned int);
 235         void            (*eio_status_line)(efx_nic_t *, boolean_t *, uint32_t *);
 236         void            (*eio_status_message)(efx_nic_t *, unsigned int,
 237                                  boolean_t *);
 238         void            (*eio_fatal)(efx_nic_t *);
 239         void            (*eio_fini)(efx_nic_t *);
 240 } efx_intr_ops_t;
 241
 242 typedef struct efx_intr_s {
 243         const efx_intr_ops_t    *ei_eiop;
 244         efsys_mem_t             *ei_esmp;
 245         efx_intr_type_t         ei_type;
 246         unsigned int            ei_level;
 247 } efx_intr_t;
 248
 249 typedef struct efx_nic_ops_s {
 250         efx_rc_t        (*eno_probe)(efx_nic_t *);
 251         efx_rc_t        (*eno_board_cfg)(efx_nic_t *);
 252         efx_rc_t        (*eno_set_drv_limits)(efx_nic_t *, efx_drv_limits_t*);
 253         efx_rc_t        (*eno_reset)(efx_nic_t *);
 254         efx_rc_t        (*eno_init)(efx_nic_t *);
 255         efx_rc_t        (*eno_get_vi_pool)(efx_nic_t *, uint32_t *);
 256         efx_rc_t        (*eno_get_bar_region)(efx_nic_t *, efx_nic_region_t,
 257                                         uint32_t *, size_t *);
 258         void            (*eno_fini)(efx_nic_t *);
 259         void            (*eno_unprobe)(efx_nic_t *);
 260 } efx_nic_ops_t;
 261
 262 #ifndef EFX_TXQ_LIMIT_TARGET
 263 #define EFX_TXQ_LIMIT_TARGET 259
 264 #endif
 265 #ifndef EFX_RXQ_LIMIT_TARGET
 266 #define EFX_RXQ_LIMIT_TARGET 512
 267 #endif
 268 #ifndef EFX_TXQ_DC_SIZE
 269 #define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */
 270 #endif
 271 #ifndef EFX_RXQ_DC_SIZE
 272 #define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */
 273 #endif
 274
 275 #if EFSYS_OPT_FILTER
 276
 277 typedef struct efx_filter_s {
 278 } efx_filter_t;
 279
 280 #endif  /* EFSYS_OPT_FILTER */
 281
 282 typedef struct efx_drv_cfg_s {
 283         uint32_t                edc_min_vi_count;
 284         uint32_t                edc_max_vi_count;
 285
 286         uint32_t                edc_max_piobuf_count;
 287         uint32_t                edc_pio_alloc_size;
 288 } efx_drv_cfg_t;
 289
 290 struct efx_nic_s {
 291         uint32_t                en_magic;
 292         efx_family_t            en_family;
 293         uint32_t                en_features;
 294         efsys_identifier_t      *en_esip;
 295         efsys_lock_t            *en_eslp;
 296         efsys_bar_t             *en_esbp;
 297         unsigned int            en_mod_flags;
 298         unsigned int            en_reset_flags;
 299         efx_nic_cfg_t           en_nic_cfg;
 300         efx_drv_cfg_t           en_drv_cfg;
 301         efx_port_t              en_port;
 302         efx_mon_t               en_mon;
 303         efx_intr_t              en_intr;
 304         uint32_t                en_ev_qcount;
 305         uint32_t                en_rx_qcount;
 306         uint32_t                en_tx_qcount;
 307         const efx_nic_ops_t     *en_enop;
 308         const efx_ev_ops_t      *en_eevop;
 309         const efx_tx_ops_t      *en_etxop;
 310         const efx_rx_ops_t      *en_erxop;
 311 #if EFSYS_OPT_FILTER
 312         efx_filter_t            en_filter;
 313         const efx_filter_ops_t  *en_efop;
 314 #endif  /* EFSYS_OPT_FILTER */
 315         uint32_t                en_vport_id;
 316         union {
 317                 int     enu_unused;
 318         } en_u;
 319 };
 320
 321
 322 #define EFX_NIC_MAGIC   0x02121996
 323
 324 typedef boolean_t (*efx_ev_handler_t)(efx_evq_t *, efx_qword_t *,
 325     const efx_ev_callbacks_t *, void *);
 326
 327 typedef struct efx_evq_rxq_state_s {
 328         unsigned int                    eers_rx_read_ptr;
 329         unsigned int                    eers_rx_mask;
 330 } efx_evq_rxq_state_t;
 331
 332 struct efx_evq_s {
 333         uint32_t                        ee_magic;
 334         efx_nic_t                       *ee_enp;
 335         unsigned int                    ee_index;
 336         unsigned int                    ee_mask;
 337         efsys_mem_t                     *ee_esmp;
 338
 339         efx_ev_handler_t                ee_rx;
 340         efx_ev_handler_t                ee_tx;
 341         efx_ev_handler_t                ee_driver;
 342         efx_ev_handler_t                ee_global;
 343         efx_ev_handler_t                ee_drv_gen;
 344
 345         efx_evq_rxq_state_t             ee_rxq_state[EFX_EV_RX_NLABELS];
 346
 347         uint32_t                        ee_flags;
 348 };
 349
 350 #define EFX_EVQ_MAGIC   0x08081997
 351
 352 #define EFX_EVQ_SIENA_TIMER_QUANTUM_NS  6144 /* 768 cycles */
 353
 354 struct efx_rxq_s {
 355         uint32_t                        er_magic;
 356         efx_nic_t                       *er_enp;
 357         efx_evq_t                       *er_eep;
 358         unsigned int                    er_index;
 359         unsigned int                    er_label;
 360         unsigned int                    er_mask;
 361         efsys_mem_t                     *er_esmp;
 362 };
 363
 364 #define EFX_RXQ_MAGIC   0x15022005
 365
 366 struct efx_txq_s {
 367         uint32_t                        et_magic;
 368         efx_nic_t                       *et_enp;
 369         unsigned int                    et_index;
 370         unsigned int                    et_mask;
 371         efsys_mem_t                     *et_esmp;
 372 };
 373
 374 #define EFX_TXQ_MAGIC   0x05092005
 375
 376 #define EFX_MAC_ADDR_COPY(_dst, _src)                                   \
 377         do {                                                            \
 378                 (_dst)[0] = (_src)[0];                                  \
 379                 (_dst)[1] = (_src)[1];                                  \
 380                 (_dst)[2] = (_src)[2];                                  \
 381                 (_dst)[3] = (_src)[3];                                  \
 382                 (_dst)[4] = (_src)[4];                                  \
 383                 (_dst)[5] = (_src)[5];                                  \
 384         _NOTE(CONSTANTCONDITION)                                        \
 385         } while (B_FALSE)
 386
 387 #define EFX_MAC_BROADCAST_ADDR_SET(_dst)                                \
 388         do {                                                            \
 389                 uint16_t *_d = (uint16_t *)(_dst);                      \
 390                 _d[0] = 0xffff;                                         \
 391                 _d[1] = 0xffff;                                         \
 392                 _d[2] = 0xffff;                                         \
 393         _NOTE(CONSTANTCONDITION)                                        \
 394         } while (B_FALSE)
 395
 396 #if EFSYS_OPT_CHECK_REG
 397 #define EFX_CHECK_REG(_enp, _reg)                                       \
 398         do {                                                            \
 399                 const char *name = #_reg;                               \
 400                 char min = name[4];                                     \
 401                 char max = name[5];                                     \
 402                 char rev;                                               \
 403                                                                         \
 404                 switch ((_enp)->en_family) {                            \
 405                 case EFX_FAMILY_SIENA:                                  \
 406                         rev = 'C';                                      \
 407                         break;                                          \
 408                                                                         \
 409                 case EFX_FAMILY_HUNTINGTON:                             \
 410                         rev = 'D';                                      \
 411                         break;                                          \
 412                                                                         \
 413                 case EFX_FAMILY_MEDFORD:                                \
 414                         rev = 'E';                                      \
 415                         break;                                          \
 416                                                                         \
 417                 default:                                                \
 418                         rev = '?';                                      \
 419                         break;                                          \
 420                 }                                                       \
 421                                                                         \
 422                 EFSYS_ASSERT3S(rev, >=, min);                           \
 423                 EFSYS_ASSERT3S(rev, <=, max);                           \
 424                                                                         \
 425         _NOTE(CONSTANTCONDITION)                                        \
 426         } while (B_FALSE)
 427 #else
 428 #define EFX_CHECK_REG(_enp, _reg) do {                                  \
 429         _NOTE(CONSTANTCONDITION)                                        \
 430         } while (B_FALSE)
 431 #endif
 432
 433 #define EFX_BAR_READD(_enp, _reg, _edp, _lock)                          \
 434         do {                                                            \
 435                 EFX_CHECK_REG((_enp), (_reg));                          \
 436                 EFSYS_BAR_READD((_enp)->en_esbp, _reg ## _OFST,         \
 437                     (_edp), (_lock));                                   \
 438                 EFSYS_PROBE3(efx_bar_readd, const char *, #_reg,        \
 439                     uint32_t, _reg ## _OFST,                            \
 440                     uint32_t, (_edp)->ed_u32[0]);                       \
 441         _NOTE(CONSTANTCONDITION)                                        \
 442         } while (B_FALSE)
 443
 444 #define EFX_BAR_WRITED(_enp, _reg, _edp, _lock)                         \
 445         do {                                                            \
 446                 EFX_CHECK_REG((_enp), (_reg));                          \
 447                 EFSYS_PROBE3(efx_bar_writed, const char *, #_reg,       \
 448                     uint32_t, _reg ## _OFST,                            \
 449                     uint32_t, (_edp)->ed_u32[0]);                       \
 450                 EFSYS_BAR_WRITED((_enp)->en_esbp, _reg ## _OFST,        \
 451                     (_edp), (_lock));                                   \
 452         _NOTE(CONSTANTCONDITION)                                        \
 453         } while (B_FALSE)
 454
 455 #define EFX_BAR_READQ(_enp, _reg, _eqp)                                 \
 456         do {                                                            \
 457                 EFX_CHECK_REG((_enp), (_reg));                          \
 458                 EFSYS_BAR_READQ((_enp)->en_esbp, _reg ## _OFST,         \
 459                     (_eqp));                                            \
 460                 EFSYS_PROBE4(efx_bar_readq, const char *, #_reg,        \
 461                     uint32_t, _reg ## _OFST,                            \
 462                     uint32_t, (_eqp)->eq_u32[1],                        \
 463                     uint32_t, (_eqp)->eq_u32[0]);                       \
 464         _NOTE(CONSTANTCONDITION)                                        \
 465         } while (B_FALSE)
 466
 467 #define EFX_BAR_WRITEQ(_enp, _reg, _eqp)                                \
 468         do {                                                            \
 469                 EFX_CHECK_REG((_enp), (_reg));                          \
 470                 EFSYS_PROBE4(efx_bar_writeq, const char *, #_reg,       \
 471                     uint32_t, _reg ## _OFST,                            \
 472                     uint32_t, (_eqp)->eq_u32[1],                        \
 473                     uint32_t, (_eqp)->eq_u32[0]);                       \
 474                 EFSYS_BAR_WRITEQ((_enp)->en_esbp, _reg ## _OFST,        \
 475                     (_eqp));                                            \
 476         _NOTE(CONSTANTCONDITION)                                        \
 477         } while (B_FALSE)
 478
 479 #define EFX_BAR_READO(_enp, _reg, _eop)                                 \
 480         do {                                                            \
 481                 EFX_CHECK_REG((_enp), (_reg));                          \
 482                 EFSYS_BAR_READO((_enp)->en_esbp, _reg ## _OFST,         \
 483                     (_eop), B_TRUE);                                    \
 484                 EFSYS_PROBE6(efx_bar_reado, const char *, #_reg,        \
 485                     uint32_t, _reg ## _OFST,                            \
 486                     uint32_t, (_eop)->eo_u32[3],                        \
 487                     uint32_t, (_eop)->eo_u32[2],                        \
 488                     uint32_t, (_eop)->eo_u32[1],                        \
 489                     uint32_t, (_eop)->eo_u32[0]);                       \
 490         _NOTE(CONSTANTCONDITION)                                        \
 491         } while (B_FALSE)
 492
 493 #define EFX_BAR_WRITEO(_enp, _reg, _eop)                                \
 494         do {                                                            \
 495                 EFX_CHECK_REG((_enp), (_reg));                          \
 496                 EFSYS_PROBE6(efx_bar_writeo, const char *, #_reg,       \
 497                     uint32_t, _reg ## _OFST,                            \
 498                     uint32_t, (_eop)->eo_u32[3],                        \
 499                     uint32_t, (_eop)->eo_u32[2],                        \
 500                     uint32_t, (_eop)->eo_u32[1],                        \
 501                     uint32_t, (_eop)->eo_u32[0]);                       \
 502                 EFSYS_BAR_WRITEO((_enp)->en_esbp, _reg ## _OFST,        \
 503                     (_eop), B_TRUE);                                    \
 504         _NOTE(CONSTANTCONDITION)                                        \
 505         } while (B_FALSE)
 506
 507 #define EFX_BAR_TBL_READD(_enp, _reg, _index, _edp, _lock)              \
 508         do {                                                            \
 509                 EFX_CHECK_REG((_enp), (_reg));                          \
 510                 EFSYS_BAR_READD((_enp)->en_esbp,                        \
 511                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 512                     (_edp), (_lock));                                   \
 513                 EFSYS_PROBE4(efx_bar_tbl_readd, const char *, #_reg,    \
 514                     uint32_t, (_index),                                 \
 515                     uint32_t, _reg ## _OFST,                            \
 516                     uint32_t, (_edp)->ed_u32[0]);                       \
 517         _NOTE(CONSTANTCONDITION)                                        \
 518         } while (B_FALSE)
 519
 520 #define EFX_BAR_TBL_WRITED(_enp, _reg, _index, _edp, _lock)             \
 521         do {                                                            \
 522                 EFX_CHECK_REG((_enp), (_reg));                          \
 523                 EFSYS_PROBE4(efx_bar_tbl_writed, const char *, #_reg,   \
 524                     uint32_t, (_index),                                 \
 525                     uint32_t, _reg ## _OFST,                            \
 526                     uint32_t, (_edp)->ed_u32[0]);                       \
 527                 EFSYS_BAR_WRITED((_enp)->en_esbp,                       \
 528                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 529                     (_edp), (_lock));                                   \
 530         _NOTE(CONSTANTCONDITION)                                        \
 531         } while (B_FALSE)
 532
 533 #define EFX_BAR_TBL_WRITED2(_enp, _reg, _index, _edp, _lock)            \
 534         do {                                                            \
 535                 EFX_CHECK_REG((_enp), (_reg));                          \
 536                 EFSYS_PROBE4(efx_bar_tbl_writed, const char *, #_reg,   \
 537                     uint32_t, (_index),                                 \
 538                     uint32_t, _reg ## _OFST,                            \
 539                     uint32_t, (_edp)->ed_u32[0]);                       \
 540                 EFSYS_BAR_WRITED((_enp)->en_esbp,                       \
 541                     (_reg ## _OFST +                                    \
 542                     (2 * sizeof (efx_dword_t)) +                        \
 543                     ((_index) * _reg ## _STEP)),                        \
 544                     (_edp), (_lock));                                   \
 545         _NOTE(CONSTANTCONDITION)                                        \
 546         } while (B_FALSE)
 547
 548 #define EFX_BAR_TBL_WRITED3(_enp, _reg, _index, _edp, _lock)            \
 549         do {                                                            \
 550                 EFX_CHECK_REG((_enp), (_reg));                          \
 551                 EFSYS_PROBE4(efx_bar_tbl_writed, const char *, #_reg,   \
 552                     uint32_t, (_index),                                 \
 553                     uint32_t, _reg ## _OFST,                            \
 554                     uint32_t, (_edp)->ed_u32[0]);                       \
 555                 EFSYS_BAR_WRITED((_enp)->en_esbp,                       \
 556                     (_reg ## _OFST +                                    \
 557                     (3 * sizeof (efx_dword_t)) +                        \
 558                     ((_index) * _reg ## _STEP)),                        \
 559                     (_edp), (_lock));                                   \
 560         _NOTE(CONSTANTCONDITION)                                        \
 561         } while (B_FALSE)
 562
 563 #define EFX_BAR_TBL_READQ(_enp, _reg, _index, _eqp)                     \
 564         do {                                                            \
 565                 EFX_CHECK_REG((_enp), (_reg));                          \
 566                 EFSYS_BAR_READQ((_enp)->en_esbp,                        \
 567                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 568                     (_eqp));                                            \
 569                 EFSYS_PROBE5(efx_bar_tbl_readq, const char *, #_reg,    \
 570                     uint32_t, (_index),                                 \
 571                     uint32_t, _reg ## _OFST,                            \
 572                     uint32_t, (_eqp)->eq_u32[1],                        \
 573                     uint32_t, (_eqp)->eq_u32[0]);                       \
 574         _NOTE(CONSTANTCONDITION)                                        \
 575         } while (B_FALSE)
 576
 577 #define EFX_BAR_TBL_WRITEQ(_enp, _reg, _index, _eqp)                    \
 578         do {                                                            \
 579                 EFX_CHECK_REG((_enp), (_reg));                          \
 580                 EFSYS_PROBE5(efx_bar_tbl_writeq, const char *, #_reg,   \
 581                     uint32_t, (_index),                                 \
 582                     uint32_t, _reg ## _OFST,                            \
 583                     uint32_t, (_eqp)->eq_u32[1],                        \
 584                     uint32_t, (_eqp)->eq_u32[0]);                       \
 585                 EFSYS_BAR_WRITEQ((_enp)->en_esbp,                       \
 586                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 587                     (_eqp));                                            \
 588         _NOTE(CONSTANTCONDITION)                                        \
 589         } while (B_FALSE)
 590
 591 #define EFX_BAR_TBL_READO(_enp, _reg, _index, _eop, _lock)              \
 592         do {                                                            \
 593                 EFX_CHECK_REG((_enp), (_reg));                          \
 594                 EFSYS_BAR_READO((_enp)->en_esbp,                        \
 595                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 596                     (_eop), (_lock));                                   \
 597                 EFSYS_PROBE7(efx_bar_tbl_reado, const char *, #_reg,    \
 598                     uint32_t, (_index),                                 \
 599                     uint32_t, _reg ## _OFST,                            \
 600                     uint32_t, (_eop)->eo_u32[3],                        \
 601                     uint32_t, (_eop)->eo_u32[2],                        \
 602                     uint32_t, (_eop)->eo_u32[1],                        \
 603                     uint32_t, (_eop)->eo_u32[0]);                       \
 604         _NOTE(CONSTANTCONDITION)                                        \
 605         } while (B_FALSE)
 606
 607 #define EFX_BAR_TBL_WRITEO(_enp, _reg, _index, _eop, _lock)             \
 608         do {                                                            \
 609                 EFX_CHECK_REG((_enp), (_reg));                          \
 610                 EFSYS_PROBE7(efx_bar_tbl_writeo, const char *, #_reg,   \
 611                     uint32_t, (_index),                                 \
 612                     uint32_t, _reg ## _OFST,                            \
 613                     uint32_t, (_eop)->eo_u32[3],                        \
 614                     uint32_t, (_eop)->eo_u32[2],                        \
 615                     uint32_t, (_eop)->eo_u32[1],                        \
 616                     uint32_t, (_eop)->eo_u32[0]);                       \
 617                 EFSYS_BAR_WRITEO((_enp)->en_esbp,                       \
 618                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 619                     (_eop), (_lock));                                   \
 620         _NOTE(CONSTANTCONDITION)                                        \
 621         } while (B_FALSE)
 622
 623 /*
 624  * Allow drivers to perform optimised 128-bit doorbell writes.
 625  * The DMA descriptor pointers (RX_DESC_UPD and TX_DESC_UPD) are
 626  * special-cased in the BIU on the Falcon/Siena and EF10 architectures to avoid
 627  * the need for locking in the host, and are the only ones known to be safe to
 628  * use 128-bites write with.
 629  */
 630 #define EFX_BAR_TBL_DOORBELL_WRITEO(_enp, _reg, _index, _eop)           \
 631         do {                                                            \
 632                 EFX_CHECK_REG((_enp), (_reg));                          \
 633                 EFSYS_PROBE7(efx_bar_tbl_doorbell_writeo,               \
 634                     const char *,                                       \
 635                     #_reg,                                              \
 636                     uint32_t, (_index),                                 \
 637                     uint32_t, _reg ## _OFST,                            \
 638                     uint32_t, (_eop)->eo_u32[3],                        \
 639                     uint32_t, (_eop)->eo_u32[2],                        \
 640                     uint32_t, (_eop)->eo_u32[1],                        \
 641                     uint32_t, (_eop)->eo_u32[0]);                       \
 642                 EFSYS_BAR_DOORBELL_WRITEO((_enp)->en_esbp,              \
 643                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 644                     (_eop));                                            \
 645         _NOTE(CONSTANTCONDITION)                                        \
 646         } while (B_FALSE)
 647
 648 #define EFX_DMA_SYNC_QUEUE_FOR_DEVICE(_esmp, _entries, _wptr, _owptr)   \
 649         do {                                                            \
 650                 unsigned int _new = (_wptr);                            \
 651                 unsigned int _old = (_owptr);                           \
 652                                                                         \
 653                 if ((_new) >= (_old))                                   \
 654                         EFSYS_DMA_SYNC_FOR_DEVICE((_esmp),              \
 655                             (_old) * sizeof (efx_desc_t),               \
 656                             ((_new) - (_old)) * sizeof (efx_desc_t));   \
 657                 else                                                    \
 658                         /*                                              \
 659                          * It is cheaper to sync entire map than sync   \
 660                          * two parts especially when offset/size are    \
 661                          * ignored and entire map is synced in any case.\
 662                          */                                             \
 663                         EFSYS_DMA_SYNC_FOR_DEVICE((_esmp),              \
 664                             0,                                          \
 665                             (_entries) * sizeof (efx_desc_t));          \
 666         _NOTE(CONSTANTCONDITION)                                        \
 667         } while (B_FALSE)
 668
 669 extern  __checkReturn   efx_rc_t
 670 efx_nic_biu_test(
 671         __in            efx_nic_t *enp);
 672
 673 extern  __checkReturn   efx_rc_t
 674 efx_mac_select(
 675         __in            efx_nic_t *enp);
 676
 677 extern  void
 678 efx_mac_multicast_hash_compute(
 679         __in_ecount(6*count)            uint8_t const *addrs,
 680         __in                            int count,
 681         __out                           efx_oword_t *hash_low,
 682         __out                           efx_oword_t *hash_high);
 683
 684 extern  __checkReturn   efx_rc_t
 685 efx_phy_probe(
 686         __in            efx_nic_t *enp);
 687
 688 extern                  void
 689 efx_phy_unprobe(
 690         __in            efx_nic_t *enp);
 691
 692 #ifdef  __cplusplus
 693 }
 694 #endif
 695
 696 #endif  /* _SYS_EFX_IMPL_H */