drivers/net/sfc/base/efx_impl.h

   1 /*
   2  * Copyright (c) 2007-2016 Solarflare Communications Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *
   8  * 1. Redistributions of source code must retain the above copyright notice,
   9  *    this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright notice,
  11  *    this list of conditions and the following disclaimer in the documentation
  12  *    and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  * The views and conclusions contained in the software and documentation are
  27  * those of the authors and should not be interpreted as representing official
  28  * policies, either expressed or implied, of the FreeBSD Project.
  29  */
  30
  31 #ifndef _SYS_EFX_IMPL_H
  32 #define _SYS_EFX_IMPL_H
  33
  34 #include "efx.h"
  35 #include "efx_regs.h"
  36 #include "efx_regs_ef10.h"
  37
  38 /* FIXME: Add definition for driver generated software events */
  39 #ifndef ESE_DZ_EV_CODE_DRV_GEN_EV
  40 #define ESE_DZ_EV_CODE_DRV_GEN_EV FSE_AZ_EV_CODE_DRV_GEN_EV
  41 #endif
  42
  43
  44 #ifdef  __cplusplus
  45 extern "C" {
  46 #endif
  47
  48 #define EFX_MOD_MCDI            0x00000001
  49 #define EFX_MOD_PROBE           0x00000002
  50 #define EFX_MOD_NVRAM           0x00000004
  51 #define EFX_MOD_VPD             0x00000008
  52 #define EFX_MOD_NIC             0x00000010
  53 #define EFX_MOD_INTR            0x00000020
  54 #define EFX_MOD_EV              0x00000040
  55 #define EFX_MOD_RX              0x00000080
  56 #define EFX_MOD_TX              0x00000100
  57 #define EFX_MOD_PORT            0x00000200
  58 #define EFX_MOD_MON             0x00000400
  59 #define EFX_MOD_FILTER          0x00001000
  60 #define EFX_MOD_LIC             0x00002000
  61
  62 #define EFX_RESET_PHY           0x00000001
  63 #define EFX_RESET_RXQ_ERR       0x00000002
  64 #define EFX_RESET_TXQ_ERR       0x00000004
  65
  66 typedef enum efx_mac_type_e {
  67         EFX_MAC_INVALID = 0,
  68         EFX_MAC_SIENA,
  69         EFX_MAC_HUNTINGTON,
  70         EFX_MAC_MEDFORD,
  71         EFX_MAC_NTYPES
  72 } efx_mac_type_t;
  73
  74 typedef struct efx_ev_ops_s {
  75         efx_rc_t        (*eevo_init)(efx_nic_t *);
  76         void            (*eevo_fini)(efx_nic_t *);
  77         efx_rc_t        (*eevo_qcreate)(efx_nic_t *, unsigned int,
  78                                           efsys_mem_t *, size_t, uint32_t,
  79                                           uint32_t, uint32_t, efx_evq_t *);
  80         void            (*eevo_qdestroy)(efx_evq_t *);
  81         efx_rc_t        (*eevo_qprime)(efx_evq_t *, unsigned int);
  82         void            (*eevo_qpost)(efx_evq_t *, uint16_t);
  83         efx_rc_t        (*eevo_qmoderate)(efx_evq_t *, unsigned int);
  84 } efx_ev_ops_t;
  85
  86 typedef struct efx_tx_ops_s {
  87         efx_rc_t        (*etxo_init)(efx_nic_t *);
  88         void            (*etxo_fini)(efx_nic_t *);
  89         efx_rc_t        (*etxo_qcreate)(efx_nic_t *,
  90                                         unsigned int, unsigned int,
  91                                         efsys_mem_t *, size_t,
  92                                         uint32_t, uint16_t,
  93                                         efx_evq_t *, efx_txq_t *,
  94                                         unsigned int *);
  95         void            (*etxo_qdestroy)(efx_txq_t *);
  96         efx_rc_t        (*etxo_qpost)(efx_txq_t *, efx_buffer_t *,
  97                                       unsigned int, unsigned int,
  98                                       unsigned int *);
  99         void            (*etxo_qpush)(efx_txq_t *, unsigned int, unsigned int);
 100         efx_rc_t        (*etxo_qpace)(efx_txq_t *, unsigned int);
 101         efx_rc_t        (*etxo_qflush)(efx_txq_t *);
 102         void            (*etxo_qenable)(efx_txq_t *);
 103         efx_rc_t        (*etxo_qpio_enable)(efx_txq_t *);
 104         void            (*etxo_qpio_disable)(efx_txq_t *);
 105         efx_rc_t        (*etxo_qpio_write)(efx_txq_t *, uint8_t *, size_t,
 106                                            size_t);
 107         efx_rc_t        (*etxo_qpio_post)(efx_txq_t *, size_t, unsigned int,
 108                                            unsigned int *);
 109         efx_rc_t        (*etxo_qdesc_post)(efx_txq_t *, efx_desc_t *,
 110                                       unsigned int, unsigned int,
 111                                       unsigned int *);
 112         void            (*etxo_qdesc_dma_create)(efx_txq_t *, efsys_dma_addr_t,
 113                                                 size_t, boolean_t,
 114                                                 efx_desc_t *);
 115         void            (*etxo_qdesc_tso_create)(efx_txq_t *, uint16_t,
 116                                                 uint32_t, uint8_t,
 117                                                 efx_desc_t *);
 118         void            (*etxo_qdesc_tso2_create)(efx_txq_t *, uint16_t,
 119                                                 uint32_t, uint16_t,
 120                                                 efx_desc_t *, int);
 121         void            (*etxo_qdesc_vlantci_create)(efx_txq_t *, uint16_t,
 122                                                 efx_desc_t *);
 123 } efx_tx_ops_t;
 124
 125 typedef struct efx_rx_ops_s {
 126         efx_rc_t        (*erxo_init)(efx_nic_t *);
 127         void            (*erxo_fini)(efx_nic_t *);
 128         efx_rc_t        (*erxo_prefix_pktlen)(efx_nic_t *, uint8_t *,
 129                                               uint16_t *);
 130         void            (*erxo_qpost)(efx_rxq_t *, efsys_dma_addr_t *, size_t,
 131                                       unsigned int, unsigned int,
 132                                       unsigned int);
 133         void            (*erxo_qpush)(efx_rxq_t *, unsigned int, unsigned int *);
 134         efx_rc_t        (*erxo_qflush)(efx_rxq_t *);
 135         void            (*erxo_qenable)(efx_rxq_t *);
 136         efx_rc_t        (*erxo_qcreate)(efx_nic_t *enp, unsigned int,
 137                                         unsigned int, efx_rxq_type_t,
 138                                         efsys_mem_t *, size_t, uint32_t,
 139                                         efx_evq_t *, efx_rxq_t *);
 140         void            (*erxo_qdestroy)(efx_rxq_t *);
 141 } efx_rx_ops_t;
 142
 143 typedef struct efx_mac_ops_s {
 144         efx_rc_t        (*emo_poll)(efx_nic_t *, efx_link_mode_t *);
 145         efx_rc_t        (*emo_up)(efx_nic_t *, boolean_t *);
 146         efx_rc_t        (*emo_addr_set)(efx_nic_t *);
 147         efx_rc_t        (*emo_pdu_set)(efx_nic_t *);
 148         efx_rc_t        (*emo_pdu_get)(efx_nic_t *, size_t *);
 149         efx_rc_t        (*emo_reconfigure)(efx_nic_t *);
 150         efx_rc_t        (*emo_multicast_list_set)(efx_nic_t *);
 151         efx_rc_t        (*emo_filter_default_rxq_set)(efx_nic_t *,
 152                                                       efx_rxq_t *, boolean_t);
 153         void            (*emo_filter_default_rxq_clear)(efx_nic_t *);
 154 } efx_mac_ops_t;
 155
 156 typedef struct efx_phy_ops_s {
 157         efx_rc_t        (*epo_power)(efx_nic_t *, boolean_t); /* optional */
 158         efx_rc_t        (*epo_reset)(efx_nic_t *);
 159         efx_rc_t        (*epo_reconfigure)(efx_nic_t *);
 160         efx_rc_t        (*epo_verify)(efx_nic_t *);
 161         efx_rc_t        (*epo_oui_get)(efx_nic_t *, uint32_t *);
 162 } efx_phy_ops_t;
 163
 164
 165 typedef struct efx_port_s {
 166         efx_mac_type_t          ep_mac_type;
 167         uint32_t                ep_phy_type;
 168         uint8_t                 ep_port;
 169         uint32_t                ep_mac_pdu;
 170         uint8_t                 ep_mac_addr[6];
 171         efx_link_mode_t         ep_link_mode;
 172         boolean_t               ep_all_unicst;
 173         boolean_t               ep_mulcst;
 174         boolean_t               ep_all_mulcst;
 175         boolean_t               ep_brdcst;
 176         unsigned int            ep_fcntl;
 177         boolean_t               ep_fcntl_autoneg;
 178         efx_oword_t             ep_multicst_hash[2];
 179         uint8_t                 ep_mulcst_addr_list[EFX_MAC_ADDR_LEN *
 180                                                     EFX_MAC_MULTICAST_LIST_MAX];
 181         uint32_t                ep_mulcst_addr_count;
 182         efx_phy_media_type_t    ep_fixed_port_type;
 183         efx_phy_media_type_t    ep_module_type;
 184         uint32_t                ep_adv_cap_mask;
 185         uint32_t                ep_lp_cap_mask;
 186         uint32_t                ep_default_adv_cap_mask;
 187         uint32_t                ep_phy_cap_mask;
 188         boolean_t               ep_mac_drain;
 189         boolean_t               ep_mac_stats_pending;
 190         const efx_mac_ops_t     *ep_emop;
 191         const efx_phy_ops_t     *ep_epop;
 192 } efx_port_t;
 193
 194 typedef struct efx_mon_ops_s {
 195 } efx_mon_ops_t;
 196
 197 typedef struct efx_mon_s {
 198         efx_mon_type_t          em_type;
 199         const efx_mon_ops_t     *em_emop;
 200 } efx_mon_t;
 201
 202 typedef struct efx_intr_ops_s {
 203         efx_rc_t        (*eio_init)(efx_nic_t *, efx_intr_type_t, efsys_mem_t *);
 204         void            (*eio_enable)(efx_nic_t *);
 205         void            (*eio_disable)(efx_nic_t *);
 206         void            (*eio_disable_unlocked)(efx_nic_t *);
 207         efx_rc_t        (*eio_trigger)(efx_nic_t *, unsigned int);
 208         void            (*eio_status_line)(efx_nic_t *, boolean_t *, uint32_t *);
 209         void            (*eio_status_message)(efx_nic_t *, unsigned int,
 210                                  boolean_t *);
 211         void            (*eio_fatal)(efx_nic_t *);
 212         void            (*eio_fini)(efx_nic_t *);
 213 } efx_intr_ops_t;
 214
 215 typedef struct efx_intr_s {
 216         const efx_intr_ops_t    *ei_eiop;
 217         efsys_mem_t             *ei_esmp;
 218         efx_intr_type_t         ei_type;
 219         unsigned int            ei_level;
 220 } efx_intr_t;
 221
 222 typedef struct efx_nic_ops_s {
 223         efx_rc_t        (*eno_probe)(efx_nic_t *);
 224         efx_rc_t        (*eno_board_cfg)(efx_nic_t *);
 225         efx_rc_t        (*eno_set_drv_limits)(efx_nic_t *, efx_drv_limits_t*);
 226         efx_rc_t        (*eno_reset)(efx_nic_t *);
 227         efx_rc_t        (*eno_init)(efx_nic_t *);
 228         efx_rc_t        (*eno_get_vi_pool)(efx_nic_t *, uint32_t *);
 229         efx_rc_t        (*eno_get_bar_region)(efx_nic_t *, efx_nic_region_t,
 230                                         uint32_t *, size_t *);
 231         void            (*eno_fini)(efx_nic_t *);
 232         void            (*eno_unprobe)(efx_nic_t *);
 233 } efx_nic_ops_t;
 234
 235 #ifndef EFX_TXQ_LIMIT_TARGET
 236 #define EFX_TXQ_LIMIT_TARGET 259
 237 #endif
 238 #ifndef EFX_RXQ_LIMIT_TARGET
 239 #define EFX_RXQ_LIMIT_TARGET 512
 240 #endif
 241 #ifndef EFX_TXQ_DC_SIZE
 242 #define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */
 243 #endif
 244 #ifndef EFX_RXQ_DC_SIZE
 245 #define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */
 246 #endif
 247
 248 typedef struct efx_drv_cfg_s {
 249         uint32_t                edc_min_vi_count;
 250         uint32_t                edc_max_vi_count;
 251
 252         uint32_t                edc_max_piobuf_count;
 253         uint32_t                edc_pio_alloc_size;
 254 } efx_drv_cfg_t;
 255
 256 struct efx_nic_s {
 257         uint32_t                en_magic;
 258         efx_family_t            en_family;
 259         uint32_t                en_features;
 260         efsys_identifier_t      *en_esip;
 261         efsys_lock_t            *en_eslp;
 262         efsys_bar_t             *en_esbp;
 263         unsigned int            en_mod_flags;
 264         unsigned int            en_reset_flags;
 265         efx_nic_cfg_t           en_nic_cfg;
 266         efx_drv_cfg_t           en_drv_cfg;
 267         efx_port_t              en_port;
 268         efx_mon_t               en_mon;
 269         efx_intr_t              en_intr;
 270         uint32_t                en_ev_qcount;
 271         uint32_t                en_rx_qcount;
 272         uint32_t                en_tx_qcount;
 273         const efx_nic_ops_t     *en_enop;
 274         const efx_ev_ops_t      *en_eevop;
 275         const efx_tx_ops_t      *en_etxop;
 276         const efx_rx_ops_t      *en_erxop;
 277         uint32_t                en_vport_id;
 278         union {
 279                 int     enu_unused;
 280         } en_u;
 281 };
 282
 283
 284 #define EFX_NIC_MAGIC   0x02121996
 285
 286 typedef boolean_t (*efx_ev_handler_t)(efx_evq_t *, efx_qword_t *,
 287     const efx_ev_callbacks_t *, void *);
 288
 289 typedef struct efx_evq_rxq_state_s {
 290         unsigned int                    eers_rx_read_ptr;
 291         unsigned int                    eers_rx_mask;
 292 } efx_evq_rxq_state_t;
 293
 294 struct efx_evq_s {
 295         uint32_t                        ee_magic;
 296         efx_nic_t                       *ee_enp;
 297         unsigned int                    ee_index;
 298         unsigned int                    ee_mask;
 299         efsys_mem_t                     *ee_esmp;
 300
 301         efx_ev_handler_t                ee_rx;
 302         efx_ev_handler_t                ee_tx;
 303         efx_ev_handler_t                ee_driver;
 304         efx_ev_handler_t                ee_global;
 305         efx_ev_handler_t                ee_drv_gen;
 306
 307         efx_evq_rxq_state_t             ee_rxq_state[EFX_EV_RX_NLABELS];
 308
 309         uint32_t                        ee_flags;
 310 };
 311
 312 #define EFX_EVQ_MAGIC   0x08081997
 313
 314 #define EFX_EVQ_SIENA_TIMER_QUANTUM_NS  6144 /* 768 cycles */
 315
 316 struct efx_rxq_s {
 317         uint32_t                        er_magic;
 318         efx_nic_t                       *er_enp;
 319         efx_evq_t                       *er_eep;
 320         unsigned int                    er_index;
 321         unsigned int                    er_label;
 322         unsigned int                    er_mask;
 323         efsys_mem_t                     *er_esmp;
 324 };
 325
 326 #define EFX_RXQ_MAGIC   0x15022005
 327
 328 struct efx_txq_s {
 329         uint32_t                        et_magic;
 330         efx_nic_t                       *et_enp;
 331         unsigned int                    et_index;
 332         unsigned int                    et_mask;
 333         efsys_mem_t                     *et_esmp;
 334 };
 335
 336 #define EFX_TXQ_MAGIC   0x05092005
 337
 338 #define EFX_MAC_ADDR_COPY(_dst, _src)                                   \
 339         do {                                                            \
 340                 (_dst)[0] = (_src)[0];                                  \
 341                 (_dst)[1] = (_src)[1];                                  \
 342                 (_dst)[2] = (_src)[2];                                  \
 343                 (_dst)[3] = (_src)[3];                                  \
 344                 (_dst)[4] = (_src)[4];                                  \
 345                 (_dst)[5] = (_src)[5];                                  \
 346         _NOTE(CONSTANTCONDITION)                                        \
 347         } while (B_FALSE)
 348
 349 #define EFX_MAC_BROADCAST_ADDR_SET(_dst)                                \
 350         do {                                                            \
 351                 uint16_t *_d = (uint16_t *)(_dst);                      \
 352                 _d[0] = 0xffff;                                         \
 353                 _d[1] = 0xffff;                                         \
 354                 _d[2] = 0xffff;                                         \
 355         _NOTE(CONSTANTCONDITION)                                        \
 356         } while (B_FALSE)
 357
 358 #if EFSYS_OPT_CHECK_REG
 359 #define EFX_CHECK_REG(_enp, _reg)                                       \
 360         do {                                                            \
 361                 const char *name = #_reg;                               \
 362                 char min = name[4];                                     \
 363                 char max = name[5];                                     \
 364                 char rev;                                               \
 365                                                                         \
 366                 switch ((_enp)->en_family) {                            \
 367                 case EFX_FAMILY_SIENA:                                  \
 368                         rev = 'C';                                      \
 369                         break;                                          \
 370                                                                         \
 371                 case EFX_FAMILY_HUNTINGTON:                             \
 372                         rev = 'D';                                      \
 373                         break;                                          \
 374                                                                         \
 375                 case EFX_FAMILY_MEDFORD:                                \
 376                         rev = 'E';                                      \
 377                         break;                                          \
 378                                                                         \
 379                 default:                                                \
 380                         rev = '?';                                      \
 381                         break;                                          \
 382                 }                                                       \
 383                                                                         \
 384                 EFSYS_ASSERT3S(rev, >=, min);                           \
 385                 EFSYS_ASSERT3S(rev, <=, max);                           \
 386                                                                         \
 387         _NOTE(CONSTANTCONDITION)                                        \
 388         } while (B_FALSE)
 389 #else
 390 #define EFX_CHECK_REG(_enp, _reg) do {                                  \
 391         _NOTE(CONSTANTCONDITION)                                        \
 392         } while (B_FALSE)
 393 #endif
 394
 395 #define EFX_BAR_READD(_enp, _reg, _edp, _lock)                          \
 396         do {                                                            \
 397                 EFX_CHECK_REG((_enp), (_reg));                          \
 398                 EFSYS_BAR_READD((_enp)->en_esbp, _reg ## _OFST,         \
 399                     (_edp), (_lock));                                   \
 400                 EFSYS_PROBE3(efx_bar_readd, const char *, #_reg,        \
 401                     uint32_t, _reg ## _OFST,                            \
 402                     uint32_t, (_edp)->ed_u32[0]);                       \
 403         _NOTE(CONSTANTCONDITION)                                        \
 404         } while (B_FALSE)
 405
 406 #define EFX_BAR_WRITED(_enp, _reg, _edp, _lock)                         \
 407         do {                                                            \
 408                 EFX_CHECK_REG((_enp), (_reg));                          \
 409                 EFSYS_PROBE3(efx_bar_writed, const char *, #_reg,       \
 410                     uint32_t, _reg ## _OFST,                            \
 411                     uint32_t, (_edp)->ed_u32[0]);                       \
 412                 EFSYS_BAR_WRITED((_enp)->en_esbp, _reg ## _OFST,        \
 413                     (_edp), (_lock));                                   \
 414         _NOTE(CONSTANTCONDITION)                                        \
 415         } while (B_FALSE)
 416
 417 #define EFX_BAR_READQ(_enp, _reg, _eqp)                                 \
 418         do {                                                            \
 419                 EFX_CHECK_REG((_enp), (_reg));                          \
 420                 EFSYS_BAR_READQ((_enp)->en_esbp, _reg ## _OFST,         \
 421                     (_eqp));                                            \
 422                 EFSYS_PROBE4(efx_bar_readq, const char *, #_reg,        \
 423                     uint32_t, _reg ## _OFST,                            \
 424                     uint32_t, (_eqp)->eq_u32[1],                        \
 425                     uint32_t, (_eqp)->eq_u32[0]);                       \
 426         _NOTE(CONSTANTCONDITION)                                        \
 427         } while (B_FALSE)
 428
 429 #define EFX_BAR_WRITEQ(_enp, _reg, _eqp)                                \
 430         do {                                                            \
 431                 EFX_CHECK_REG((_enp), (_reg));                          \
 432                 EFSYS_PROBE4(efx_bar_writeq, const char *, #_reg,       \
 433                     uint32_t, _reg ## _OFST,                            \
 434                     uint32_t, (_eqp)->eq_u32[1],                        \
 435                     uint32_t, (_eqp)->eq_u32[0]);                       \
 436                 EFSYS_BAR_WRITEQ((_enp)->en_esbp, _reg ## _OFST,        \
 437                     (_eqp));                                            \
 438         _NOTE(CONSTANTCONDITION)                                        \
 439         } while (B_FALSE)
 440
 441 #define EFX_BAR_READO(_enp, _reg, _eop)                                 \
 442         do {                                                            \
 443                 EFX_CHECK_REG((_enp), (_reg));                          \
 444                 EFSYS_BAR_READO((_enp)->en_esbp, _reg ## _OFST,         \
 445                     (_eop), B_TRUE);                                    \
 446                 EFSYS_PROBE6(efx_bar_reado, const char *, #_reg,        \
 447                     uint32_t, _reg ## _OFST,                            \
 448                     uint32_t, (_eop)->eo_u32[3],                        \
 449                     uint32_t, (_eop)->eo_u32[2],                        \
 450                     uint32_t, (_eop)->eo_u32[1],                        \
 451                     uint32_t, (_eop)->eo_u32[0]);                       \
 452         _NOTE(CONSTANTCONDITION)                                        \
 453         } while (B_FALSE)
 454
 455 #define EFX_BAR_WRITEO(_enp, _reg, _eop)                                \
 456         do {                                                            \
 457                 EFX_CHECK_REG((_enp), (_reg));                          \
 458                 EFSYS_PROBE6(efx_bar_writeo, const char *, #_reg,       \
 459                     uint32_t, _reg ## _OFST,                            \
 460                     uint32_t, (_eop)->eo_u32[3],                        \
 461                     uint32_t, (_eop)->eo_u32[2],                        \
 462                     uint32_t, (_eop)->eo_u32[1],                        \
 463                     uint32_t, (_eop)->eo_u32[0]);                       \
 464                 EFSYS_BAR_WRITEO((_enp)->en_esbp, _reg ## _OFST,        \
 465                     (_eop), B_TRUE);                                    \
 466         _NOTE(CONSTANTCONDITION)                                        \
 467         } while (B_FALSE)
 468
 469 #define EFX_BAR_TBL_READD(_enp, _reg, _index, _edp, _lock)              \
 470         do {                                                            \
 471                 EFX_CHECK_REG((_enp), (_reg));                          \
 472                 EFSYS_BAR_READD((_enp)->en_esbp,                        \
 473                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 474                     (_edp), (_lock));                                   \
 475                 EFSYS_PROBE4(efx_bar_tbl_readd, const char *, #_reg,    \
 476                     uint32_t, (_index),                                 \
 477                     uint32_t, _reg ## _OFST,                            \
 478                     uint32_t, (_edp)->ed_u32[0]);                       \
 479         _NOTE(CONSTANTCONDITION)                                        \
 480         } while (B_FALSE)
 481
 482 #define EFX_BAR_TBL_WRITED(_enp, _reg, _index, _edp, _lock)             \
 483         do {                                                            \
 484                 EFX_CHECK_REG((_enp), (_reg));                          \
 485                 EFSYS_PROBE4(efx_bar_tbl_writed, const char *, #_reg,   \
 486                     uint32_t, (_index),                                 \
 487                     uint32_t, _reg ## _OFST,                            \
 488                     uint32_t, (_edp)->ed_u32[0]);                       \
 489                 EFSYS_BAR_WRITED((_enp)->en_esbp,                       \
 490                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 491                     (_edp), (_lock));                                   \
 492         _NOTE(CONSTANTCONDITION)                                        \
 493         } while (B_FALSE)
 494
 495 #define EFX_BAR_TBL_WRITED2(_enp, _reg, _index, _edp, _lock)            \
 496         do {                                                            \
 497                 EFX_CHECK_REG((_enp), (_reg));                          \
 498                 EFSYS_PROBE4(efx_bar_tbl_writed, const char *, #_reg,   \
 499                     uint32_t, (_index),                                 \
 500                     uint32_t, _reg ## _OFST,                            \
 501                     uint32_t, (_edp)->ed_u32[0]);                       \
 502                 EFSYS_BAR_WRITED((_enp)->en_esbp,                       \
 503                     (_reg ## _OFST +                                    \
 504                     (2 * sizeof (efx_dword_t)) +                        \
 505                     ((_index) * _reg ## _STEP)),                        \
 506                     (_edp), (_lock));                                   \
 507         _NOTE(CONSTANTCONDITION)                                        \
 508         } while (B_FALSE)
 509
 510 #define EFX_BAR_TBL_WRITED3(_enp, _reg, _index, _edp, _lock)            \
 511         do {                                                            \
 512                 EFX_CHECK_REG((_enp), (_reg));                          \
 513                 EFSYS_PROBE4(efx_bar_tbl_writed, const char *, #_reg,   \
 514                     uint32_t, (_index),                                 \
 515                     uint32_t, _reg ## _OFST,                            \
 516                     uint32_t, (_edp)->ed_u32[0]);                       \
 517                 EFSYS_BAR_WRITED((_enp)->en_esbp,                       \
 518                     (_reg ## _OFST +                                    \
 519                     (3 * sizeof (efx_dword_t)) +                        \
 520                     ((_index) * _reg ## _STEP)),                        \
 521                     (_edp), (_lock));                                   \
 522         _NOTE(CONSTANTCONDITION)                                        \
 523         } while (B_FALSE)
 524
 525 #define EFX_BAR_TBL_READQ(_enp, _reg, _index, _eqp)                     \
 526         do {                                                            \
 527                 EFX_CHECK_REG((_enp), (_reg));                          \
 528                 EFSYS_BAR_READQ((_enp)->en_esbp,                        \
 529                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 530                     (_eqp));                                            \
 531                 EFSYS_PROBE5(efx_bar_tbl_readq, const char *, #_reg,    \
 532                     uint32_t, (_index),                                 \
 533                     uint32_t, _reg ## _OFST,                            \
 534                     uint32_t, (_eqp)->eq_u32[1],                        \
 535                     uint32_t, (_eqp)->eq_u32[0]);                       \
 536         _NOTE(CONSTANTCONDITION)                                        \
 537         } while (B_FALSE)
 538
 539 #define EFX_BAR_TBL_WRITEQ(_enp, _reg, _index, _eqp)                    \
 540         do {                                                            \
 541                 EFX_CHECK_REG((_enp), (_reg));                          \
 542                 EFSYS_PROBE5(efx_bar_tbl_writeq, const char *, #_reg,   \
 543                     uint32_t, (_index),                                 \
 544                     uint32_t, _reg ## _OFST,                            \
 545                     uint32_t, (_eqp)->eq_u32[1],                        \
 546                     uint32_t, (_eqp)->eq_u32[0]);                       \
 547                 EFSYS_BAR_WRITEQ((_enp)->en_esbp,                       \
 548                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 549                     (_eqp));                                            \
 550         _NOTE(CONSTANTCONDITION)                                        \
 551         } while (B_FALSE)
 552
 553 #define EFX_BAR_TBL_READO(_enp, _reg, _index, _eop, _lock)              \
 554         do {                                                            \
 555                 EFX_CHECK_REG((_enp), (_reg));                          \
 556                 EFSYS_BAR_READO((_enp)->en_esbp,                        \
 557                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 558                     (_eop), (_lock));                                   \
 559                 EFSYS_PROBE7(efx_bar_tbl_reado, const char *, #_reg,    \
 560                     uint32_t, (_index),                                 \
 561                     uint32_t, _reg ## _OFST,                            \
 562                     uint32_t, (_eop)->eo_u32[3],                        \
 563                     uint32_t, (_eop)->eo_u32[2],                        \
 564                     uint32_t, (_eop)->eo_u32[1],                        \
 565                     uint32_t, (_eop)->eo_u32[0]);                       \
 566         _NOTE(CONSTANTCONDITION)                                        \
 567         } while (B_FALSE)
 568
 569 #define EFX_BAR_TBL_WRITEO(_enp, _reg, _index, _eop, _lock)             \
 570         do {                                                            \
 571                 EFX_CHECK_REG((_enp), (_reg));                          \
 572                 EFSYS_PROBE7(efx_bar_tbl_writeo, const char *, #_reg,   \
 573                     uint32_t, (_index),                                 \
 574                     uint32_t, _reg ## _OFST,                            \
 575                     uint32_t, (_eop)->eo_u32[3],                        \
 576                     uint32_t, (_eop)->eo_u32[2],                        \
 577                     uint32_t, (_eop)->eo_u32[1],                        \
 578                     uint32_t, (_eop)->eo_u32[0]);                       \
 579                 EFSYS_BAR_WRITEO((_enp)->en_esbp,                       \
 580                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 581                     (_eop), (_lock));                                   \
 582         _NOTE(CONSTANTCONDITION)                                        \
 583         } while (B_FALSE)
 584
 585 /*
 586  * Allow drivers to perform optimised 128-bit doorbell writes.
 587  * The DMA descriptor pointers (RX_DESC_UPD and TX_DESC_UPD) are
 588  * special-cased in the BIU on the Falcon/Siena and EF10 architectures to avoid
 589  * the need for locking in the host, and are the only ones known to be safe to
 590  * use 128-bites write with.
 591  */
 592 #define EFX_BAR_TBL_DOORBELL_WRITEO(_enp, _reg, _index, _eop)           \
 593         do {                                                            \
 594                 EFX_CHECK_REG((_enp), (_reg));                          \
 595                 EFSYS_PROBE7(efx_bar_tbl_doorbell_writeo,               \
 596                     const char *,                                       \
 597                     #_reg,                                              \
 598                     uint32_t, (_index),                                 \
 599                     uint32_t, _reg ## _OFST,                            \
 600                     uint32_t, (_eop)->eo_u32[3],                        \
 601                     uint32_t, (_eop)->eo_u32[2],                        \
 602                     uint32_t, (_eop)->eo_u32[1],                        \
 603                     uint32_t, (_eop)->eo_u32[0]);                       \
 604                 EFSYS_BAR_DOORBELL_WRITEO((_enp)->en_esbp,              \
 605                     (_reg ## _OFST + ((_index) * _reg ## _STEP)),       \
 606                     (_eop));                                            \
 607         _NOTE(CONSTANTCONDITION)                                        \
 608         } while (B_FALSE)
 609
 610 #define EFX_DMA_SYNC_QUEUE_FOR_DEVICE(_esmp, _entries, _wptr, _owptr)   \
 611         do {                                                            \
 612                 unsigned int _new = (_wptr);                            \
 613                 unsigned int _old = (_owptr);                           \
 614                                                                         \
 615                 if ((_new) >= (_old))                                   \
 616                         EFSYS_DMA_SYNC_FOR_DEVICE((_esmp),              \
 617                             (_old) * sizeof (efx_desc_t),               \
 618                             ((_new) - (_old)) * sizeof (efx_desc_t));   \
 619                 else                                                    \
 620                         /*                                              \
 621                          * It is cheaper to sync entire map than sync   \
 622                          * two parts especially when offset/size are    \
 623                          * ignored and entire map is synced in any case.\
 624                          */                                             \
 625                         EFSYS_DMA_SYNC_FOR_DEVICE((_esmp),              \
 626                             0,                                          \
 627                             (_entries) * sizeof (efx_desc_t));          \
 628         _NOTE(CONSTANTCONDITION)                                        \
 629         } while (B_FALSE)
 630
 631 extern  __checkReturn   efx_rc_t
 632 efx_nic_biu_test(
 633         __in            efx_nic_t *enp);
 634
 635 extern  __checkReturn   efx_rc_t
 636 efx_mac_select(
 637         __in            efx_nic_t *enp);
 638
 639 extern  void
 640 efx_mac_multicast_hash_compute(
 641         __in_ecount(6*count)            uint8_t const *addrs,
 642         __in                            int count,
 643         __out                           efx_oword_t *hash_low,
 644         __out                           efx_oword_t *hash_high);
 645
 646 extern  __checkReturn   efx_rc_t
 647 efx_phy_probe(
 648         __in            efx_nic_t *enp);
 649
 650 extern                  void
 651 efx_phy_unprobe(
 652         __in            efx_nic_t *enp);
 653
 654 #ifdef  __cplusplus
 655 }
 656 #endif
 657
 658 #endif  /* _SYS_EFX_IMPL_H */