net/sfc: fix flow control settings on port start
[dpdk.git] / drivers / net / sfc / sfc_port.c
1 /*-
2  * Copyright (c) 2016 Solarflare Communications Inc.
3  * All rights reserved.
4  *
5  * This software was jointly developed between OKTET Labs (under contract
6  * for Solarflare) and Solarflare Communications, Inc.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright notice,
12  *    this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright notice,
14  *    this list of conditions and the following disclaimer in the documentation
15  *    and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29
30 #include "efx.h"
31
32 #include "sfc.h"
33 #include "sfc_log.h"
34
35 /**
36  * Update MAC statistics in the buffer.
37  *
38  * @param       sa      Adapter
39  *
40  * @return Status code
41  * @retval      0       Success
42  * @retval      EAGAIN  Try again
43  * @retval      ENOMEM  Memory allocation failure
44  */
45 int
46 sfc_port_update_mac_stats(struct sfc_adapter *sa)
47 {
48         struct sfc_port *port = &sa->port;
49         int rc;
50
51         SFC_ASSERT(rte_spinlock_is_locked(&port->mac_stats_lock));
52
53         if (sa->state != SFC_ADAPTER_STARTED)
54                 return EINVAL;
55
56         rc = efx_mac_stats_update(sa->nic, &port->mac_stats_dma_mem,
57                                   port->mac_stats_buf, NULL);
58         if (rc != 0)
59                 return rc;
60
61         return 0;
62 }
63
64 static int
65 sfc_port_init_dev_link(struct sfc_adapter *sa)
66 {
67         struct rte_eth_link *dev_link = &sa->eth_dev->data->dev_link;
68         int rc;
69         efx_link_mode_t link_mode;
70         struct rte_eth_link current_link;
71
72         rc = efx_port_poll(sa->nic, &link_mode);
73         if (rc != 0)
74                 return rc;
75
76         sfc_port_link_mode_to_info(link_mode, &current_link);
77
78         EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
79         rte_atomic64_set((rte_atomic64_t *)dev_link,
80                          *(uint64_t *)&current_link);
81
82         return 0;
83 }
84
85 int
86 sfc_port_start(struct sfc_adapter *sa)
87 {
88         struct sfc_port *port = &sa->port;
89         int rc;
90         uint32_t phy_adv_cap;
91         const uint32_t phy_pause_caps =
92                 ((1u << EFX_PHY_CAP_PAUSE) | (1u << EFX_PHY_CAP_ASYM));
93
94         sfc_log_init(sa, "entry");
95
96         sfc_log_init(sa, "init filters");
97         rc = efx_filter_init(sa->nic);
98         if (rc != 0)
99                 goto fail_filter_init;
100
101         sfc_log_init(sa, "init port");
102         rc = efx_port_init(sa->nic);
103         if (rc != 0)
104                 goto fail_port_init;
105
106         sfc_log_init(sa, "set flow control to %#x autoneg=%u",
107                      port->flow_ctrl, port->flow_ctrl_autoneg);
108         rc = efx_mac_fcntl_set(sa->nic, port->flow_ctrl,
109                                port->flow_ctrl_autoneg);
110         if (rc != 0)
111                 goto fail_mac_fcntl_set;
112
113         /* Preserve pause capabilities set by above efx_mac_fcntl_set()  */
114         efx_phy_adv_cap_get(sa->nic, EFX_PHY_CAP_CURRENT, &phy_adv_cap);
115         SFC_ASSERT((port->phy_adv_cap & phy_pause_caps) == 0);
116         phy_adv_cap = port->phy_adv_cap | (phy_adv_cap & phy_pause_caps);
117
118         sfc_log_init(sa, "set phy adv caps to %#x", phy_adv_cap);
119         rc = efx_phy_adv_cap_set(sa->nic, phy_adv_cap);
120         if (rc != 0)
121                 goto fail_phy_adv_cap_set;
122
123         sfc_log_init(sa, "set MAC PDU %u", (unsigned int)port->pdu);
124         rc = efx_mac_pdu_set(sa->nic, port->pdu);
125         if (rc != 0)
126                 goto fail_mac_pdu_set;
127
128         sfc_log_init(sa, "set MAC address");
129         rc = efx_mac_addr_set(sa->nic,
130                               sa->eth_dev->data->mac_addrs[0].addr_bytes);
131         if (rc != 0)
132                 goto fail_mac_addr_set;
133
134         sfc_log_init(sa, "set MAC filters");
135         port->promisc = (sa->eth_dev->data->promiscuous != 0) ?
136                         B_TRUE : B_FALSE;
137         port->allmulti = (sa->eth_dev->data->all_multicast != 0) ?
138                          B_TRUE : B_FALSE;
139         rc = sfc_set_rx_mode(sa);
140         if (rc != 0)
141                 goto fail_mac_filter_set;
142
143         efx_mac_stats_get_mask(sa->nic, port->mac_stats_mask,
144                                sizeof(port->mac_stats_mask));
145
146         /* Update MAC stats using periodic DMA.
147          * Common code always uses 1000ms update period, so period_ms
148          * parameter only needs to be non-zero to start updates.
149          */
150         sfc_log_init(sa, "request MAC stats DMA'ing");
151         rc = efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
152                                     1000, B_FALSE);
153         if (rc != 0)
154                 goto fail_mac_stats_periodic;
155
156         sfc_log_init(sa, "disable MAC drain");
157         rc = efx_mac_drain(sa->nic, B_FALSE);
158         if (rc != 0)
159                 goto fail_mac_drain;
160
161         /* Synchronize link status knowledge */
162         rc = sfc_port_init_dev_link(sa);
163         if (rc != 0)
164                 goto fail_port_init_dev_link;
165
166         sfc_log_init(sa, "done");
167         return 0;
168
169 fail_port_init_dev_link:
170         (void)efx_mac_drain(sa->nic, B_TRUE);
171
172 fail_mac_drain:
173         (void)efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
174                                      0, B_FALSE);
175
176 fail_mac_stats_periodic:
177 fail_mac_filter_set:
178 fail_mac_addr_set:
179 fail_mac_pdu_set:
180 fail_phy_adv_cap_set:
181 fail_mac_fcntl_set:
182         efx_port_fini(sa->nic);
183
184 fail_port_init:
185         efx_filter_fini(sa->nic);
186
187 fail_filter_init:
188         sfc_log_init(sa, "failed %d", rc);
189         return rc;
190 }
191
192 void
193 sfc_port_stop(struct sfc_adapter *sa)
194 {
195         sfc_log_init(sa, "entry");
196
197         efx_mac_drain(sa->nic, B_TRUE);
198
199         (void)efx_mac_stats_periodic(sa->nic, &sa->port.mac_stats_dma_mem,
200                                      0, B_FALSE);
201
202         efx_port_fini(sa->nic);
203         efx_filter_fini(sa->nic);
204
205         sfc_log_init(sa, "done");
206 }
207
208 int
209 sfc_port_init(struct sfc_adapter *sa)
210 {
211         const struct rte_eth_dev_data *dev_data = sa->eth_dev->data;
212         struct sfc_port *port = &sa->port;
213         int rc;
214
215         sfc_log_init(sa, "entry");
216
217         /* Enable flow control by default */
218         port->flow_ctrl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
219         port->flow_ctrl_autoneg = B_TRUE;
220
221         if (dev_data->dev_conf.rxmode.jumbo_frame)
222                 port->pdu = dev_data->dev_conf.rxmode.max_rx_pkt_len;
223         else
224                 port->pdu = EFX_MAC_PDU(dev_data->mtu);
225
226         rte_spinlock_init(&port->mac_stats_lock);
227
228         rc = ENOMEM;
229         port->mac_stats_buf = rte_calloc_socket("mac_stats_buf", EFX_MAC_NSTATS,
230                                                 sizeof(uint64_t), 0,
231                                                 sa->socket_id);
232         if (port->mac_stats_buf == NULL)
233                 goto fail_mac_stats_buf_alloc;
234
235         rc = sfc_dma_alloc(sa, "mac_stats", 0, EFX_MAC_STATS_SIZE,
236                            sa->socket_id, &port->mac_stats_dma_mem);
237         if (rc != 0)
238                 goto fail_mac_stats_dma_alloc;
239
240         sfc_log_init(sa, "done");
241         return 0;
242
243 fail_mac_stats_dma_alloc:
244         rte_free(port->mac_stats_buf);
245 fail_mac_stats_buf_alloc:
246         sfc_log_init(sa, "failed %d", rc);
247         return rc;
248 }
249
250 void
251 sfc_port_fini(struct sfc_adapter *sa)
252 {
253         struct sfc_port *port = &sa->port;
254
255         sfc_log_init(sa, "entry");
256
257         sfc_dma_free(sa, &port->mac_stats_dma_mem);
258         rte_free(port->mac_stats_buf);
259
260         sfc_log_init(sa, "done");
261 }
262
263 int
264 sfc_set_rx_mode(struct sfc_adapter *sa)
265 {
266         struct sfc_port *port = &sa->port;
267         int rc;
268
269         rc = efx_mac_filter_set(sa->nic, port->promisc, B_TRUE,
270                                 port->promisc || port->allmulti, B_TRUE);
271
272         return rc;
273 }
274
275 void
276 sfc_port_link_mode_to_info(efx_link_mode_t link_mode,
277                            struct rte_eth_link *link_info)
278 {
279         SFC_ASSERT(link_mode < EFX_LINK_NMODES);
280
281         memset(link_info, 0, sizeof(*link_info));
282         if ((link_mode == EFX_LINK_DOWN) || (link_mode == EFX_LINK_UNKNOWN))
283                 link_info->link_status = ETH_LINK_DOWN;
284         else
285                 link_info->link_status = ETH_LINK_UP;
286
287         switch (link_mode) {
288         case EFX_LINK_10HDX:
289                 link_info->link_speed  = ETH_SPEED_NUM_10M;
290                 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
291                 break;
292         case EFX_LINK_10FDX:
293                 link_info->link_speed  = ETH_SPEED_NUM_10M;
294                 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
295                 break;
296         case EFX_LINK_100HDX:
297                 link_info->link_speed  = ETH_SPEED_NUM_100M;
298                 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
299                 break;
300         case EFX_LINK_100FDX:
301                 link_info->link_speed  = ETH_SPEED_NUM_100M;
302                 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
303                 break;
304         case EFX_LINK_1000HDX:
305                 link_info->link_speed  = ETH_SPEED_NUM_1G;
306                 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
307                 break;
308         case EFX_LINK_1000FDX:
309                 link_info->link_speed  = ETH_SPEED_NUM_1G;
310                 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
311                 break;
312         case EFX_LINK_10000FDX:
313                 link_info->link_speed  = ETH_SPEED_NUM_10G;
314                 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
315                 break;
316         case EFX_LINK_40000FDX:
317                 link_info->link_speed  = ETH_SPEED_NUM_40G;
318                 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
319                 break;
320         default:
321                 SFC_ASSERT(B_FALSE);
322                 /* FALLTHROUGH */
323         case EFX_LINK_UNKNOWN:
324         case EFX_LINK_DOWN:
325                 link_info->link_speed  = ETH_SPEED_NUM_NONE;
326                 link_info->link_duplex = 0;
327                 break;
328         }
329
330         link_info->link_autoneg = ETH_LINK_AUTONEG;
331 }