net/sfc: avoid failure on port start if Rx mode is rejected
[dpdk.git] / drivers / net / sfc / sfc_rx.c
1 /*-
2  * Copyright (c) 2016 Solarflare Communications Inc.
3  * All rights reserved.
4  *
5  * This software was jointly developed between OKTET Labs (under contract
6  * for Solarflare) and Solarflare Communications, Inc.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright notice,
12  *    this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright notice,
14  *    this list of conditions and the following disclaimer in the documentation
15  *    and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29
30 #include <rte_mempool.h>
31
32 #include "efx.h"
33
34 #include "sfc.h"
35 #include "sfc_debug.h"
36 #include "sfc_log.h"
37 #include "sfc_ev.h"
38 #include "sfc_rx.h"
39 #include "sfc_tweak.h"
40
41 /*
42  * Maximum number of Rx queue flush attempt in the case of failure or
43  * flush timeout
44  */
45 #define SFC_RX_QFLUSH_ATTEMPTS          (3)
46
47 /*
48  * Time to wait between event queue polling attempts when waiting for Rx
49  * queue flush done or failed events.
50  */
51 #define SFC_RX_QFLUSH_POLL_WAIT_MS      (1)
52
53 /*
54  * Maximum number of event queue polling attempts when waiting for Rx queue
55  * flush done or failed events. It defines Rx queue flush attempt timeout
56  * together with SFC_RX_QFLUSH_POLL_WAIT_MS.
57  */
58 #define SFC_RX_QFLUSH_POLL_ATTEMPTS     (2000)
59
60 void
61 sfc_rx_qflush_done(struct sfc_rxq *rxq)
62 {
63         rxq->state |= SFC_RXQ_FLUSHED;
64         rxq->state &= ~SFC_RXQ_FLUSHING;
65 }
66
67 void
68 sfc_rx_qflush_failed(struct sfc_rxq *rxq)
69 {
70         rxq->state |= SFC_RXQ_FLUSH_FAILED;
71         rxq->state &= ~SFC_RXQ_FLUSHING;
72 }
73
74 static void
75 sfc_rx_qrefill(struct sfc_rxq *rxq)
76 {
77         unsigned int free_space;
78         unsigned int bulks;
79         void *objs[SFC_RX_REFILL_BULK];
80         efsys_dma_addr_t addr[RTE_DIM(objs)];
81         unsigned int added = rxq->added;
82         unsigned int id;
83         unsigned int i;
84         struct sfc_rx_sw_desc *rxd;
85         struct rte_mbuf *m;
86         uint8_t port_id = rxq->port_id;
87
88         free_space = EFX_RXQ_LIMIT(rxq->ptr_mask + 1) -
89                 (added - rxq->completed);
90
91         if (free_space < rxq->refill_threshold)
92                 return;
93
94         bulks = free_space / RTE_DIM(objs);
95
96         id = added & rxq->ptr_mask;
97         while (bulks-- > 0) {
98                 if (rte_mempool_get_bulk(rxq->refill_mb_pool, objs,
99                                          RTE_DIM(objs)) < 0) {
100                         /*
101                          * It is hardly a safe way to increment counter
102                          * from different contexts, but all PMDs do it.
103                          */
104                         rxq->evq->sa->eth_dev->data->rx_mbuf_alloc_failed +=
105                                 RTE_DIM(objs);
106                         break;
107                 }
108
109                 for (i = 0; i < RTE_DIM(objs);
110                      ++i, id = (id + 1) & rxq->ptr_mask) {
111                         m = objs[i];
112
113                         rxd = &rxq->sw_desc[id];
114                         rxd->mbuf = m;
115
116                         rte_mbuf_refcnt_set(m, 1);
117                         m->data_off = RTE_PKTMBUF_HEADROOM;
118                         m->next = NULL;
119                         m->nb_segs = 1;
120                         m->port = port_id;
121
122                         addr[i] = rte_pktmbuf_mtophys(m);
123                 }
124
125                 efx_rx_qpost(rxq->common, addr, rxq->buf_size,
126                              RTE_DIM(objs), rxq->completed, added);
127                 added += RTE_DIM(objs);
128         }
129
130         /* Push doorbell if something is posted */
131         if (rxq->added != added) {
132                 rxq->added = added;
133                 efx_rx_qpush(rxq->common, added, &rxq->pushed);
134         }
135 }
136
137 static uint64_t
138 sfc_rx_desc_flags_to_offload_flags(const unsigned int desc_flags)
139 {
140         uint64_t mbuf_flags = 0;
141
142         switch (desc_flags & (EFX_PKT_IPV4 | EFX_CKSUM_IPV4)) {
143         case (EFX_PKT_IPV4 | EFX_CKSUM_IPV4):
144                 mbuf_flags |= PKT_RX_IP_CKSUM_GOOD;
145                 break;
146         case EFX_PKT_IPV4:
147                 mbuf_flags |= PKT_RX_IP_CKSUM_BAD;
148                 break;
149         default:
150                 RTE_BUILD_BUG_ON(PKT_RX_IP_CKSUM_UNKNOWN != 0);
151                 SFC_ASSERT((mbuf_flags & PKT_RX_IP_CKSUM_MASK) ==
152                            PKT_RX_IP_CKSUM_UNKNOWN);
153                 break;
154         }
155
156         switch ((desc_flags &
157                  (EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP))) {
158         case (EFX_PKT_TCP | EFX_CKSUM_TCPUDP):
159         case (EFX_PKT_UDP | EFX_CKSUM_TCPUDP):
160                 mbuf_flags |= PKT_RX_L4_CKSUM_GOOD;
161                 break;
162         case EFX_PKT_TCP:
163         case EFX_PKT_UDP:
164                 mbuf_flags |= PKT_RX_L4_CKSUM_BAD;
165                 break;
166         default:
167                 RTE_BUILD_BUG_ON(PKT_RX_L4_CKSUM_UNKNOWN != 0);
168                 SFC_ASSERT((mbuf_flags & PKT_RX_L4_CKSUM_MASK) ==
169                            PKT_RX_L4_CKSUM_UNKNOWN);
170                 break;
171         }
172
173         return mbuf_flags;
174 }
175
176 static uint32_t
177 sfc_rx_desc_flags_to_packet_type(const unsigned int desc_flags)
178 {
179         return RTE_PTYPE_L2_ETHER |
180                 ((desc_flags & EFX_PKT_IPV4) ?
181                         RTE_PTYPE_L3_IPV4_EXT_UNKNOWN : 0) |
182                 ((desc_flags & EFX_PKT_IPV6) ?
183                         RTE_PTYPE_L3_IPV6_EXT_UNKNOWN : 0) |
184                 ((desc_flags & EFX_PKT_TCP) ? RTE_PTYPE_L4_TCP : 0) |
185                 ((desc_flags & EFX_PKT_UDP) ? RTE_PTYPE_L4_UDP : 0);
186 }
187
188 static void
189 sfc_rx_set_rss_hash(struct sfc_rxq *rxq, unsigned int flags, struct rte_mbuf *m)
190 {
191 #if EFSYS_OPT_RX_SCALE
192         uint8_t *mbuf_data;
193
194
195         if ((rxq->flags & SFC_RXQ_RSS_HASH) == 0)
196                 return;
197
198         mbuf_data = rte_pktmbuf_mtod(m, uint8_t *);
199
200         if (flags & (EFX_PKT_IPV4 | EFX_PKT_IPV6)) {
201                 m->hash.rss = efx_pseudo_hdr_hash_get(rxq->common,
202                                                       EFX_RX_HASHALG_TOEPLITZ,
203                                                       mbuf_data);
204
205                 m->ol_flags |= PKT_RX_RSS_HASH;
206         }
207 #endif
208 }
209
210 uint16_t
211 sfc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
212 {
213         struct sfc_rxq *rxq = rx_queue;
214         unsigned int completed;
215         unsigned int prefix_size = rxq->prefix_size;
216         unsigned int done_pkts = 0;
217         boolean_t discard_next = B_FALSE;
218         struct rte_mbuf *scatter_pkt = NULL;
219
220         if (unlikely((rxq->state & SFC_RXQ_RUNNING) == 0))
221                 return 0;
222
223         sfc_ev_qpoll(rxq->evq);
224
225         completed = rxq->completed;
226         while (completed != rxq->pending && done_pkts < nb_pkts) {
227                 unsigned int id;
228                 struct sfc_rx_sw_desc *rxd;
229                 struct rte_mbuf *m;
230                 unsigned int seg_len;
231                 unsigned int desc_flags;
232
233                 id = completed++ & rxq->ptr_mask;
234                 rxd = &rxq->sw_desc[id];
235                 m = rxd->mbuf;
236                 desc_flags = rxd->flags;
237
238                 if (discard_next)
239                         goto discard;
240
241                 if (desc_flags & (EFX_ADDR_MISMATCH | EFX_DISCARD))
242                         goto discard;
243
244                 if (desc_flags & EFX_PKT_PREFIX_LEN) {
245                         uint16_t tmp_size;
246                         int rc __rte_unused;
247
248                         rc = efx_pseudo_hdr_pkt_length_get(rxq->common,
249                                 rte_pktmbuf_mtod(m, uint8_t *), &tmp_size);
250                         SFC_ASSERT(rc == 0);
251                         seg_len = tmp_size;
252                 } else {
253                         seg_len = rxd->size - prefix_size;
254                 }
255
256                 rte_pktmbuf_data_len(m) = seg_len;
257                 rte_pktmbuf_pkt_len(m) = seg_len;
258
259                 if (scatter_pkt != NULL) {
260                         if (rte_pktmbuf_chain(scatter_pkt, m) != 0) {
261                                 rte_mempool_put(rxq->refill_mb_pool,
262                                                 scatter_pkt);
263                                 goto discard;
264                         }
265                         /* The packet to deliver */
266                         m = scatter_pkt;
267                 }
268
269                 if (desc_flags & EFX_PKT_CONT) {
270                         /* The packet is scattered, more fragments to come */
271                         scatter_pkt = m;
272                         /* Futher fragments have no prefix */
273                         prefix_size = 0;
274                         continue;
275                 }
276
277                 /* Scattered packet is done */
278                 scatter_pkt = NULL;
279                 /* The first fragment of the packet has prefix */
280                 prefix_size = rxq->prefix_size;
281
282                 m->ol_flags = sfc_rx_desc_flags_to_offload_flags(desc_flags);
283                 m->packet_type = sfc_rx_desc_flags_to_packet_type(desc_flags);
284
285                 /*
286                  * Extract RSS hash from the packet prefix and
287                  * set the corresponding field (if needed and possible)
288                  */
289                 sfc_rx_set_rss_hash(rxq, desc_flags, m);
290
291                 m->data_off += prefix_size;
292
293                 *rx_pkts++ = m;
294                 done_pkts++;
295                 continue;
296
297 discard:
298                 discard_next = ((desc_flags & EFX_PKT_CONT) != 0);
299                 rte_mempool_put(rxq->refill_mb_pool, m);
300                 rxd->mbuf = NULL;
301         }
302
303         /* pending is only moved when entire packet is received */
304         SFC_ASSERT(scatter_pkt == NULL);
305
306         rxq->completed = completed;
307
308         sfc_rx_qrefill(rxq);
309
310         return done_pkts;
311 }
312
313 unsigned int
314 sfc_rx_qdesc_npending(struct sfc_adapter *sa, unsigned int sw_index)
315 {
316         struct sfc_rxq *rxq;
317
318         SFC_ASSERT(sw_index < sa->rxq_count);
319         rxq = sa->rxq_info[sw_index].rxq;
320
321         if (rxq == NULL || (rxq->state & SFC_RXQ_RUNNING) == 0)
322                 return 0;
323
324         sfc_ev_qpoll(rxq->evq);
325
326         return rxq->pending - rxq->completed;
327 }
328
329 int
330 sfc_rx_qdesc_done(struct sfc_rxq *rxq, unsigned int offset)
331 {
332         if ((rxq->state & SFC_RXQ_RUNNING) == 0)
333                 return 0;
334
335         sfc_ev_qpoll(rxq->evq);
336
337         return offset < (rxq->pending - rxq->completed);
338 }
339
340 static void
341 sfc_rx_qpurge(struct sfc_rxq *rxq)
342 {
343         unsigned int i;
344         struct sfc_rx_sw_desc *rxd;
345
346         for (i = rxq->completed; i != rxq->added; ++i) {
347                 rxd = &rxq->sw_desc[i & rxq->ptr_mask];
348                 rte_mempool_put(rxq->refill_mb_pool, rxd->mbuf);
349                 rxd->mbuf = NULL;
350         }
351 }
352
353 static void
354 sfc_rx_qflush(struct sfc_adapter *sa, unsigned int sw_index)
355 {
356         struct sfc_rxq *rxq;
357         unsigned int retry_count;
358         unsigned int wait_count;
359
360         rxq = sa->rxq_info[sw_index].rxq;
361         SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
362
363         /*
364          * Retry Rx queue flushing in the case of flush failed or
365          * timeout. In the worst case it can delay for 6 seconds.
366          */
367         for (retry_count = 0;
368              ((rxq->state & SFC_RXQ_FLUSHED) == 0) &&
369              (retry_count < SFC_RX_QFLUSH_ATTEMPTS);
370              ++retry_count) {
371                 if (efx_rx_qflush(rxq->common) != 0) {
372                         rxq->state |= SFC_RXQ_FLUSH_FAILED;
373                         break;
374                 }
375                 rxq->state &= ~SFC_RXQ_FLUSH_FAILED;
376                 rxq->state |= SFC_RXQ_FLUSHING;
377
378                 /*
379                  * Wait for Rx queue flush done or failed event at least
380                  * SFC_RX_QFLUSH_POLL_WAIT_MS milliseconds and not more
381                  * than 2 seconds (SFC_RX_QFLUSH_POLL_WAIT_MS multiplied
382                  * by SFC_RX_QFLUSH_POLL_ATTEMPTS).
383                  */
384                 wait_count = 0;
385                 do {
386                         rte_delay_ms(SFC_RX_QFLUSH_POLL_WAIT_MS);
387                         sfc_ev_qpoll(rxq->evq);
388                 } while ((rxq->state & SFC_RXQ_FLUSHING) &&
389                          (wait_count++ < SFC_RX_QFLUSH_POLL_ATTEMPTS));
390
391                 if (rxq->state & SFC_RXQ_FLUSHING)
392                         sfc_err(sa, "RxQ %u flush timed out", sw_index);
393
394                 if (rxq->state & SFC_RXQ_FLUSH_FAILED)
395                         sfc_err(sa, "RxQ %u flush failed", sw_index);
396
397                 if (rxq->state & SFC_RXQ_FLUSHED)
398                         sfc_info(sa, "RxQ %u flushed", sw_index);
399         }
400
401         sfc_rx_qpurge(rxq);
402 }
403
404 static int
405 sfc_rx_default_rxq_set_filter(struct sfc_adapter *sa, struct sfc_rxq *rxq)
406 {
407         boolean_t rss = (sa->rss_channels > 1) ? B_TRUE : B_FALSE;
408         struct sfc_port *port = &sa->port;
409         int rc;
410
411         /*
412          * If promiscuous or all-multicast mode has been requested, setting
413          * filter for the default Rx queue might fail, in particular, while
414          * running over PCI function which is not a member of corresponding
415          * privilege groups; if this occurs, few iterations will be made to
416          * repeat this step without promiscuous and all-multicast flags set
417          */
418 retry:
419         rc = efx_mac_filter_default_rxq_set(sa->nic, rxq->common, rss);
420         if (rc == 0)
421                 return 0;
422         else if (rc != EOPNOTSUPP)
423                 return rc;
424
425         if (port->promisc) {
426                 sfc_warn(sa, "promiscuous mode has been requested, "
427                              "but the HW rejects it");
428                 sfc_warn(sa, "promiscuous mode will be disabled");
429
430                 port->promisc = B_FALSE;
431                 rc = sfc_set_rx_mode(sa);
432                 if (rc != 0)
433                         return rc;
434
435                 goto retry;
436         }
437
438         if (port->allmulti) {
439                 sfc_warn(sa, "all-multicast mode has been requested, "
440                              "but the HW rejects it");
441                 sfc_warn(sa, "all-multicast mode will be disabled");
442
443                 port->allmulti = B_FALSE;
444                 rc = sfc_set_rx_mode(sa);
445                 if (rc != 0)
446                         return rc;
447
448                 goto retry;
449         }
450
451         return rc;
452 }
453
454 int
455 sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
456 {
457         struct sfc_rxq_info *rxq_info;
458         struct sfc_rxq *rxq;
459         struct sfc_evq *evq;
460         int rc;
461
462         sfc_log_init(sa, "sw_index=%u", sw_index);
463
464         SFC_ASSERT(sw_index < sa->rxq_count);
465
466         rxq_info = &sa->rxq_info[sw_index];
467         rxq = rxq_info->rxq;
468         SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
469
470         evq = rxq->evq;
471
472         rc = sfc_ev_qstart(sa, evq->evq_index);
473         if (rc != 0)
474                 goto fail_ev_qstart;
475
476         rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
477                             &rxq->mem, rxq_info->entries,
478                             0 /* not used on EF10 */, evq->common,
479                             &rxq->common);
480         if (rc != 0)
481                 goto fail_rx_qcreate;
482
483         efx_rx_qenable(rxq->common);
484
485         rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
486
487         rxq->state |= (SFC_RXQ_STARTED | SFC_RXQ_RUNNING);
488
489         sfc_rx_qrefill(rxq);
490
491         if (sw_index == 0) {
492                 rc = sfc_rx_default_rxq_set_filter(sa, rxq);
493                 if (rc != 0)
494                         goto fail_mac_filter_default_rxq_set;
495         }
496
497         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
498         sa->eth_dev->data->rx_queue_state[sw_index] =
499                 RTE_ETH_QUEUE_STATE_STARTED;
500
501         return 0;
502
503 fail_mac_filter_default_rxq_set:
504         sfc_rx_qflush(sa, sw_index);
505
506 fail_rx_qcreate:
507         sfc_ev_qstop(sa, evq->evq_index);
508
509 fail_ev_qstart:
510         return rc;
511 }
512
513 void
514 sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index)
515 {
516         struct sfc_rxq_info *rxq_info;
517         struct sfc_rxq *rxq;
518
519         sfc_log_init(sa, "sw_index=%u", sw_index);
520
521         SFC_ASSERT(sw_index < sa->rxq_count);
522
523         rxq_info = &sa->rxq_info[sw_index];
524         rxq = rxq_info->rxq;
525
526         if (rxq->state == SFC_RXQ_INITIALIZED)
527                 return;
528         SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
529
530         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
531         sa->eth_dev->data->rx_queue_state[sw_index] =
532                 RTE_ETH_QUEUE_STATE_STOPPED;
533
534         rxq->state &= ~SFC_RXQ_RUNNING;
535
536         if (sw_index == 0)
537                 efx_mac_filter_default_rxq_clear(sa->nic);
538
539         sfc_rx_qflush(sa, sw_index);
540
541         rxq->state = SFC_RXQ_INITIALIZED;
542
543         efx_rx_qdestroy(rxq->common);
544
545         sfc_ev_qstop(sa, rxq->evq->evq_index);
546 }
547
548 static int
549 sfc_rx_qcheck_conf(struct sfc_adapter *sa, uint16_t nb_rx_desc,
550                    const struct rte_eth_rxconf *rx_conf)
551 {
552         const uint16_t rx_free_thresh_max = EFX_RXQ_LIMIT(nb_rx_desc);
553         int rc = 0;
554
555         if (rx_conf->rx_thresh.pthresh != 0 ||
556             rx_conf->rx_thresh.hthresh != 0 ||
557             rx_conf->rx_thresh.wthresh != 0) {
558                 sfc_err(sa,
559                         "RxQ prefetch/host/writeback thresholds are not supported");
560                 rc = EINVAL;
561         }
562
563         if (rx_conf->rx_free_thresh > rx_free_thresh_max) {
564                 sfc_err(sa,
565                         "RxQ free threshold too large: %u vs maximum %u",
566                         rx_conf->rx_free_thresh, rx_free_thresh_max);
567                 rc = EINVAL;
568         }
569
570         if (rx_conf->rx_drop_en == 0) {
571                 sfc_err(sa, "RxQ drop disable is not supported");
572                 rc = EINVAL;
573         }
574
575         return rc;
576 }
577
578 static unsigned int
579 sfc_rx_mbuf_data_alignment(struct rte_mempool *mb_pool)
580 {
581         uint32_t data_off;
582         uint32_t order;
583
584         /* The mbuf object itself is always cache line aligned */
585         order = rte_bsf32(RTE_CACHE_LINE_SIZE);
586
587         /* Data offset from mbuf object start */
588         data_off = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mb_pool) +
589                 RTE_PKTMBUF_HEADROOM;
590
591         order = MIN(order, rte_bsf32(data_off));
592
593         return 1u << (order - 1);
594 }
595
596 static uint16_t
597 sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool)
598 {
599         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
600         const uint32_t nic_align_start = MAX(1, encp->enc_rx_buf_align_start);
601         const uint32_t nic_align_end = MAX(1, encp->enc_rx_buf_align_end);
602         uint16_t buf_size;
603         unsigned int buf_aligned;
604         unsigned int start_alignment;
605         unsigned int end_padding_alignment;
606
607         /* Below it is assumed that both alignments are power of 2 */
608         SFC_ASSERT(rte_is_power_of_2(nic_align_start));
609         SFC_ASSERT(rte_is_power_of_2(nic_align_end));
610
611         /*
612          * mbuf is always cache line aligned, double-check
613          * that it meets rx buffer start alignment requirements.
614          */
615
616         /* Start from mbuf pool data room size */
617         buf_size = rte_pktmbuf_data_room_size(mb_pool);
618
619         /* Remove headroom */
620         if (buf_size <= RTE_PKTMBUF_HEADROOM) {
621                 sfc_err(sa,
622                         "RxQ mbuf pool %s object data room size %u is smaller than headroom %u",
623                         mb_pool->name, buf_size, RTE_PKTMBUF_HEADROOM);
624                 return 0;
625         }
626         buf_size -= RTE_PKTMBUF_HEADROOM;
627
628         /* Calculate guaranteed data start alignment */
629         buf_aligned = sfc_rx_mbuf_data_alignment(mb_pool);
630
631         /* Reserve space for start alignment */
632         if (buf_aligned < nic_align_start) {
633                 start_alignment = nic_align_start - buf_aligned;
634                 if (buf_size <= start_alignment) {
635                         sfc_err(sa,
636                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u and buffer start alignment %u required by NIC",
637                                 mb_pool->name,
638                                 rte_pktmbuf_data_room_size(mb_pool),
639                                 RTE_PKTMBUF_HEADROOM, start_alignment);
640                         return 0;
641                 }
642                 buf_aligned = nic_align_start;
643                 buf_size -= start_alignment;
644         } else {
645                 start_alignment = 0;
646         }
647
648         /* Make sure that end padding does not write beyond the buffer */
649         if (buf_aligned < nic_align_end) {
650                 /*
651                  * Estimate space which can be lost. If guarnteed buffer
652                  * size is odd, lost space is (nic_align_end - 1). More
653                  * accurate formula is below.
654                  */
655                 end_padding_alignment = nic_align_end -
656                         MIN(buf_aligned, 1u << (rte_bsf32(buf_size) - 1));
657                 if (buf_size <= end_padding_alignment) {
658                         sfc_err(sa,
659                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u, buffer start alignment %u and end padding alignment %u required by NIC",
660                                 mb_pool->name,
661                                 rte_pktmbuf_data_room_size(mb_pool),
662                                 RTE_PKTMBUF_HEADROOM, start_alignment,
663                                 end_padding_alignment);
664                         return 0;
665                 }
666                 buf_size -= end_padding_alignment;
667         } else {
668                 /*
669                  * Start is aligned the same or better than end,
670                  * just align length.
671                  */
672                 buf_size = P2ALIGN(buf_size, nic_align_end);
673         }
674
675         return buf_size;
676 }
677
678 int
679 sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
680              uint16_t nb_rx_desc, unsigned int socket_id,
681              const struct rte_eth_rxconf *rx_conf,
682              struct rte_mempool *mb_pool)
683 {
684         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
685         int rc;
686         uint16_t buf_size;
687         struct sfc_rxq_info *rxq_info;
688         unsigned int evq_index;
689         struct sfc_evq *evq;
690         struct sfc_rxq *rxq;
691
692         rc = sfc_rx_qcheck_conf(sa, nb_rx_desc, rx_conf);
693         if (rc != 0)
694                 goto fail_bad_conf;
695
696         buf_size = sfc_rx_mb_pool_buf_size(sa, mb_pool);
697         if (buf_size == 0) {
698                 sfc_err(sa, "RxQ %u mbuf pool object size is too small",
699                         sw_index);
700                 rc = EINVAL;
701                 goto fail_bad_conf;
702         }
703
704         if ((buf_size < sa->port.pdu + encp->enc_rx_prefix_size) &&
705             !sa->eth_dev->data->dev_conf.rxmode.enable_scatter) {
706                 sfc_err(sa, "Rx scatter is disabled and RxQ %u mbuf pool "
707                         "object size is too small", sw_index);
708                 sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
709                         "PDU size %u plus Rx prefix %u bytes",
710                         sw_index, buf_size, (unsigned int)sa->port.pdu,
711                         encp->enc_rx_prefix_size);
712                 rc = EINVAL;
713                 goto fail_bad_conf;
714         }
715
716         SFC_ASSERT(sw_index < sa->rxq_count);
717         rxq_info = &sa->rxq_info[sw_index];
718
719         SFC_ASSERT(nb_rx_desc <= rxq_info->max_entries);
720         rxq_info->entries = nb_rx_desc;
721         rxq_info->type =
722                 sa->eth_dev->data->dev_conf.rxmode.enable_scatter ?
723                 EFX_RXQ_TYPE_SCATTER : EFX_RXQ_TYPE_DEFAULT;
724
725         evq_index = sfc_evq_index_by_rxq_sw_index(sa, sw_index);
726
727         rc = sfc_ev_qinit(sa, evq_index, rxq_info->entries, socket_id);
728         if (rc != 0)
729                 goto fail_ev_qinit;
730
731         evq = sa->evq_info[evq_index].evq;
732
733         rc = ENOMEM;
734         rxq = rte_zmalloc_socket("sfc-rxq", sizeof(*rxq), RTE_CACHE_LINE_SIZE,
735                                  socket_id);
736         if (rxq == NULL)
737                 goto fail_rxq_alloc;
738
739         rc = sfc_dma_alloc(sa, "rxq", sw_index, EFX_RXQ_SIZE(rxq_info->entries),
740                            socket_id, &rxq->mem);
741         if (rc != 0)
742                 goto fail_dma_alloc;
743
744         rc = ENOMEM;
745         rxq->sw_desc = rte_calloc_socket("sfc-rxq-sw_desc", rxq_info->entries,
746                                          sizeof(*rxq->sw_desc),
747                                          RTE_CACHE_LINE_SIZE, socket_id);
748         if (rxq->sw_desc == NULL)
749                 goto fail_desc_alloc;
750
751         evq->rxq = rxq;
752         rxq->evq = evq;
753         rxq->ptr_mask = rxq_info->entries - 1;
754         rxq->refill_threshold = rx_conf->rx_free_thresh;
755         rxq->refill_mb_pool = mb_pool;
756         rxq->buf_size = buf_size;
757         rxq->hw_index = sw_index;
758         rxq->port_id = sa->eth_dev->data->port_id;
759
760         /* Cache limits required on datapath in RxQ structure */
761         rxq->batch_max = encp->enc_rx_batch_max;
762         rxq->prefix_size = encp->enc_rx_prefix_size;
763
764 #if EFSYS_OPT_RX_SCALE
765         if (sa->hash_support == EFX_RX_HASH_AVAILABLE)
766                 rxq->flags |= SFC_RXQ_RSS_HASH;
767 #endif
768
769         rxq->state = SFC_RXQ_INITIALIZED;
770
771         rxq_info->rxq = rxq;
772         rxq_info->deferred_start = (rx_conf->rx_deferred_start != 0);
773
774         return 0;
775
776 fail_desc_alloc:
777         sfc_dma_free(sa, &rxq->mem);
778
779 fail_dma_alloc:
780         rte_free(rxq);
781
782 fail_rxq_alloc:
783         sfc_ev_qfini(sa, evq_index);
784
785 fail_ev_qinit:
786         rxq_info->entries = 0;
787
788 fail_bad_conf:
789         sfc_log_init(sa, "failed %d", rc);
790         return rc;
791 }
792
793 void
794 sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
795 {
796         struct sfc_rxq_info *rxq_info;
797         struct sfc_rxq *rxq;
798
799         SFC_ASSERT(sw_index < sa->rxq_count);
800
801         rxq_info = &sa->rxq_info[sw_index];
802
803         rxq = rxq_info->rxq;
804         SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
805
806         rxq_info->rxq = NULL;
807         rxq_info->entries = 0;
808
809         rte_free(rxq->sw_desc);
810         sfc_dma_free(sa, &rxq->mem);
811         rte_free(rxq);
812 }
813
814 #if EFSYS_OPT_RX_SCALE
815 efx_rx_hash_type_t
816 sfc_rte_to_efx_hash_type(uint64_t rss_hf)
817 {
818         efx_rx_hash_type_t efx_hash_types = 0;
819
820         if ((rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
821                        ETH_RSS_NONFRAG_IPV4_OTHER)) != 0)
822                 efx_hash_types |= EFX_RX_HASH_IPV4;
823
824         if ((rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) != 0)
825                 efx_hash_types |= EFX_RX_HASH_TCPIPV4;
826
827         if ((rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
828                         ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX)) != 0)
829                 efx_hash_types |= EFX_RX_HASH_IPV6;
830
831         if ((rss_hf & (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX)) != 0)
832                 efx_hash_types |= EFX_RX_HASH_TCPIPV6;
833
834         return efx_hash_types;
835 }
836
837 uint64_t
838 sfc_efx_to_rte_hash_type(efx_rx_hash_type_t efx_hash_types)
839 {
840         uint64_t rss_hf = 0;
841
842         if ((efx_hash_types & EFX_RX_HASH_IPV4) != 0)
843                 rss_hf |= (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
844                            ETH_RSS_NONFRAG_IPV4_OTHER);
845
846         if ((efx_hash_types & EFX_RX_HASH_TCPIPV4) != 0)
847                 rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
848
849         if ((efx_hash_types & EFX_RX_HASH_IPV6) != 0)
850                 rss_hf |= (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
851                            ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX);
852
853         if ((efx_hash_types & EFX_RX_HASH_TCPIPV6) != 0)
854                 rss_hf |= (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX);
855
856         return rss_hf;
857 }
858 #endif
859
860 static int
861 sfc_rx_rss_config(struct sfc_adapter *sa)
862 {
863         int rc = 0;
864
865 #if EFSYS_OPT_RX_SCALE
866         if (sa->rss_channels > 1) {
867                 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
868                                            sa->rss_hash_types, B_TRUE);
869                 if (rc != 0)
870                         goto finish;
871
872                 rc = efx_rx_scale_key_set(sa->nic, sa->rss_key,
873                                           sizeof(sa->rss_key));
874                 if (rc != 0)
875                         goto finish;
876
877                 rc = efx_rx_scale_tbl_set(sa->nic, sa->rss_tbl,
878                                           sizeof(sa->rss_tbl));
879         }
880
881 finish:
882 #endif
883         return rc;
884 }
885
886 int
887 sfc_rx_start(struct sfc_adapter *sa)
888 {
889         unsigned int sw_index;
890         int rc;
891
892         sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
893
894         rc = efx_rx_init(sa->nic);
895         if (rc != 0)
896                 goto fail_rx_init;
897
898         rc = sfc_rx_rss_config(sa);
899         if (rc != 0)
900                 goto fail_rss_config;
901
902         for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
903                 if ((!sa->rxq_info[sw_index].deferred_start ||
904                      sa->rxq_info[sw_index].deferred_started)) {
905                         rc = sfc_rx_qstart(sa, sw_index);
906                         if (rc != 0)
907                                 goto fail_rx_qstart;
908                 }
909         }
910
911         return 0;
912
913 fail_rx_qstart:
914         while (sw_index-- > 0)
915                 sfc_rx_qstop(sa, sw_index);
916
917 fail_rss_config:
918         efx_rx_fini(sa->nic);
919
920 fail_rx_init:
921         sfc_log_init(sa, "failed %d", rc);
922         return rc;
923 }
924
925 void
926 sfc_rx_stop(struct sfc_adapter *sa)
927 {
928         unsigned int sw_index;
929
930         sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
931
932         sw_index = sa->rxq_count;
933         while (sw_index-- > 0) {
934                 if (sa->rxq_info[sw_index].rxq != NULL)
935                         sfc_rx_qstop(sa, sw_index);
936         }
937
938         efx_rx_fini(sa->nic);
939 }
940
941 static int
942 sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
943 {
944         struct sfc_rxq_info *rxq_info = &sa->rxq_info[sw_index];
945         unsigned int max_entries;
946
947         max_entries = EFX_RXQ_MAXNDESCS;
948         SFC_ASSERT(rte_is_power_of_2(max_entries));
949
950         rxq_info->max_entries = max_entries;
951
952         return 0;
953 }
954
955 static int
956 sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode)
957 {
958         int rc = 0;
959
960         switch (rxmode->mq_mode) {
961         case ETH_MQ_RX_NONE:
962                 /* No special checks are required */
963                 break;
964 #if EFSYS_OPT_RX_SCALE
965         case ETH_MQ_RX_RSS:
966                 if (sa->rss_support == EFX_RX_SCALE_UNAVAILABLE) {
967                         sfc_err(sa, "RSS is not available");
968                         rc = EINVAL;
969                 }
970                 break;
971 #endif
972         default:
973                 sfc_err(sa, "Rx multi-queue mode %u not supported",
974                         rxmode->mq_mode);
975                 rc = EINVAL;
976         }
977
978         if (rxmode->header_split) {
979                 sfc_err(sa, "Header split on Rx not supported");
980                 rc = EINVAL;
981         }
982
983         if (rxmode->hw_vlan_filter) {
984                 sfc_err(sa, "HW VLAN filtering not supported");
985                 rc = EINVAL;
986         }
987
988         if (rxmode->hw_vlan_strip) {
989                 sfc_err(sa, "HW VLAN stripping not supported");
990                 rc = EINVAL;
991         }
992
993         if (rxmode->hw_vlan_extend) {
994                 sfc_err(sa,
995                         "Q-in-Q HW VLAN stripping not supported");
996                 rc = EINVAL;
997         }
998
999         if (!rxmode->hw_strip_crc) {
1000                 sfc_warn(sa,
1001                          "FCS stripping control not supported - always stripped");
1002                 rxmode->hw_strip_crc = 1;
1003         }
1004
1005         if (rxmode->enable_lro) {
1006                 sfc_err(sa, "LRO not supported");
1007                 rc = EINVAL;
1008         }
1009
1010         return rc;
1011 }
1012
1013 /**
1014  * Initialize Rx subsystem.
1015  *
1016  * Called at device configuration stage when number of receive queues is
1017  * specified together with other device level receive configuration.
1018  *
1019  * It should be used to allocate NUMA-unaware resources.
1020  */
1021 int
1022 sfc_rx_init(struct sfc_adapter *sa)
1023 {
1024         struct rte_eth_conf *dev_conf = &sa->eth_dev->data->dev_conf;
1025         unsigned int sw_index;
1026         int rc;
1027
1028         rc = sfc_rx_check_mode(sa, &dev_conf->rxmode);
1029         if (rc != 0)
1030                 goto fail_check_mode;
1031
1032         sa->rxq_count = sa->eth_dev->data->nb_rx_queues;
1033
1034         rc = ENOMEM;
1035         sa->rxq_info = rte_calloc_socket("sfc-rxqs", sa->rxq_count,
1036                                          sizeof(struct sfc_rxq_info), 0,
1037                                          sa->socket_id);
1038         if (sa->rxq_info == NULL)
1039                 goto fail_rxqs_alloc;
1040
1041         for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
1042                 rc = sfc_rx_qinit_info(sa, sw_index);
1043                 if (rc != 0)
1044                         goto fail_rx_qinit_info;
1045         }
1046
1047 #if EFSYS_OPT_RX_SCALE
1048         sa->rss_channels = (dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) ?
1049                            MIN(sa->rxq_count, EFX_MAXRSS) : 1;
1050
1051         if (sa->rss_channels > 1) {
1052                 for (sw_index = 0; sw_index < EFX_RSS_TBL_SIZE; ++sw_index)
1053                         sa->rss_tbl[sw_index] = sw_index % sa->rss_channels;
1054         }
1055 #endif
1056
1057         return 0;
1058
1059 fail_rx_qinit_info:
1060         rte_free(sa->rxq_info);
1061         sa->rxq_info = NULL;
1062
1063 fail_rxqs_alloc:
1064         sa->rxq_count = 0;
1065 fail_check_mode:
1066         sfc_log_init(sa, "failed %d", rc);
1067         return rc;
1068 }
1069
1070 /**
1071  * Shutdown Rx subsystem.
1072  *
1073  * Called at device close stage, for example, before device
1074  * reconfiguration or shutdown.
1075  */
1076 void
1077 sfc_rx_fini(struct sfc_adapter *sa)
1078 {
1079         unsigned int sw_index;
1080
1081         sw_index = sa->rxq_count;
1082         while (sw_index-- > 0) {
1083                 if (sa->rxq_info[sw_index].rxq != NULL)
1084                         sfc_rx_qfini(sa, sw_index);
1085         }
1086
1087         rte_free(sa->rxq_info);
1088         sa->rxq_info = NULL;
1089         sa->rxq_count = 0;
1090 }