drivers/net/sfc/sfc_rx.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2016-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  *
   6  * This software was jointly developed between OKTET Labs (under contract
   7  * for Solarflare) and Solarflare Communications, Inc.
   8  */
   9
  10 #include <rte_mempool.h>
  11
  12 #include "efx.h"
  13
  14 #include "sfc.h"
  15 #include "sfc_debug.h"
  16 #include "sfc_log.h"
  17 #include "sfc_ev.h"
  18 #include "sfc_rx.h"
  19 #include "sfc_kvargs.h"
  20 #include "sfc_tweak.h"
  21
  22 /*
  23  * Maximum number of Rx queue flush attempt in the case of failure or
  24  * flush timeout
  25  */
  26 #define SFC_RX_QFLUSH_ATTEMPTS          (3)
  27
  28 /*
  29  * Time to wait between event queue polling attempts when waiting for Rx
  30  * queue flush done or failed events.
  31  */
  32 #define SFC_RX_QFLUSH_POLL_WAIT_MS      (1)
  33
  34 /*
  35  * Maximum number of event queue polling attempts when waiting for Rx queue
  36  * flush done or failed events. It defines Rx queue flush attempt timeout
  37  * together with SFC_RX_QFLUSH_POLL_WAIT_MS.
  38  */
  39 #define SFC_RX_QFLUSH_POLL_ATTEMPTS     (2000)
  40
  41 void
  42 sfc_rx_qflush_done(struct sfc_rxq_info *rxq_info)
  43 {
  44         rxq_info->state |= SFC_RXQ_FLUSHED;
  45         rxq_info->state &= ~SFC_RXQ_FLUSHING;
  46 }
  47
  48 void
  49 sfc_rx_qflush_failed(struct sfc_rxq_info *rxq_info)
  50 {
  51         rxq_info->state |= SFC_RXQ_FLUSH_FAILED;
  52         rxq_info->state &= ~SFC_RXQ_FLUSHING;
  53 }
  54
  55 static void
  56 sfc_efx_rx_qrefill(struct sfc_efx_rxq *rxq)
  57 {
  58         unsigned int free_space;
  59         unsigned int bulks;
  60         void *objs[SFC_RX_REFILL_BULK];
  61         efsys_dma_addr_t addr[RTE_DIM(objs)];
  62         unsigned int added = rxq->added;
  63         unsigned int id;
  64         unsigned int i;
  65         struct sfc_efx_rx_sw_desc *rxd;
  66         struct rte_mbuf *m;
  67         uint16_t port_id = rxq->dp.dpq.port_id;
  68
  69         free_space = rxq->max_fill_level - (added - rxq->completed);
  70
  71         if (free_space < rxq->refill_threshold)
  72                 return;
  73
  74         bulks = free_space / RTE_DIM(objs);
  75         /* refill_threshold guarantees that bulks is positive */
  76         SFC_ASSERT(bulks > 0);
  77
  78         id = added & rxq->ptr_mask;
  79         do {
  80                 if (unlikely(rte_mempool_get_bulk(rxq->refill_mb_pool, objs,
  81                                                   RTE_DIM(objs)) < 0)) {
  82                         /*
  83                          * It is hardly a safe way to increment counter
  84                          * from different contexts, but all PMDs do it.
  85                          */
  86                         rxq->evq->sa->eth_dev->data->rx_mbuf_alloc_failed +=
  87                                 RTE_DIM(objs);
  88                         /* Return if we have posted nothing yet */
  89                         if (added == rxq->added)
  90                                 return;
  91                         /* Push posted */
  92                         break;
  93                 }
  94
  95                 for (i = 0; i < RTE_DIM(objs);
  96                      ++i, id = (id + 1) & rxq->ptr_mask) {
  97                         m = objs[i];
  98
  99                         MBUF_RAW_ALLOC_CHECK(m);
 100
 101                         rxd = &rxq->sw_desc[id];
 102                         rxd->mbuf = m;
 103
 104                         m->data_off = RTE_PKTMBUF_HEADROOM;
 105                         m->port = port_id;
 106
 107                         addr[i] = rte_pktmbuf_iova(m);
 108                 }
 109
 110                 efx_rx_qpost(rxq->common, addr, rxq->buf_size,
 111                              RTE_DIM(objs), rxq->completed, added);
 112                 added += RTE_DIM(objs);
 113         } while (--bulks > 0);
 114
 115         SFC_ASSERT(added != rxq->added);
 116         rxq->added = added;
 117         efx_rx_qpush(rxq->common, added, &rxq->pushed);
 118 }
 119
 120 static uint64_t
 121 sfc_efx_rx_desc_flags_to_offload_flags(const unsigned int desc_flags)
 122 {
 123         uint64_t mbuf_flags = 0;
 124
 125         switch (desc_flags & (EFX_PKT_IPV4 | EFX_CKSUM_IPV4)) {
 126         case (EFX_PKT_IPV4 | EFX_CKSUM_IPV4):
 127                 mbuf_flags |= PKT_RX_IP_CKSUM_GOOD;
 128                 break;
 129         case EFX_PKT_IPV4:
 130                 mbuf_flags |= PKT_RX_IP_CKSUM_BAD;
 131                 break;
 132         default:
 133                 RTE_BUILD_BUG_ON(PKT_RX_IP_CKSUM_UNKNOWN != 0);
 134                 SFC_ASSERT((mbuf_flags & PKT_RX_IP_CKSUM_MASK) ==
 135                            PKT_RX_IP_CKSUM_UNKNOWN);
 136                 break;
 137         }
 138
 139         switch ((desc_flags &
 140                  (EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP))) {
 141         case (EFX_PKT_TCP | EFX_CKSUM_TCPUDP):
 142         case (EFX_PKT_UDP | EFX_CKSUM_TCPUDP):
 143                 mbuf_flags |= PKT_RX_L4_CKSUM_GOOD;
 144                 break;
 145         case EFX_PKT_TCP:
 146         case EFX_PKT_UDP:
 147                 mbuf_flags |= PKT_RX_L4_CKSUM_BAD;
 148                 break;
 149         default:
 150                 RTE_BUILD_BUG_ON(PKT_RX_L4_CKSUM_UNKNOWN != 0);
 151                 SFC_ASSERT((mbuf_flags & PKT_RX_L4_CKSUM_MASK) ==
 152                            PKT_RX_L4_CKSUM_UNKNOWN);
 153                 break;
 154         }
 155
 156         return mbuf_flags;
 157 }
 158
 159 static uint32_t
 160 sfc_efx_rx_desc_flags_to_packet_type(const unsigned int desc_flags)
 161 {
 162         return RTE_PTYPE_L2_ETHER |
 163                 ((desc_flags & EFX_PKT_IPV4) ?
 164                         RTE_PTYPE_L3_IPV4_EXT_UNKNOWN : 0) |
 165                 ((desc_flags & EFX_PKT_IPV6) ?
 166                         RTE_PTYPE_L3_IPV6_EXT_UNKNOWN : 0) |
 167                 ((desc_flags & EFX_PKT_TCP) ? RTE_PTYPE_L4_TCP : 0) |
 168                 ((desc_flags & EFX_PKT_UDP) ? RTE_PTYPE_L4_UDP : 0);
 169 }
 170
 171 static const uint32_t *
 172 sfc_efx_supported_ptypes_get(__rte_unused uint32_t tunnel_encaps)
 173 {
 174         static const uint32_t ptypes[] = {
 175                 RTE_PTYPE_L2_ETHER,
 176                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
 177                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
 178                 RTE_PTYPE_L4_TCP,
 179                 RTE_PTYPE_L4_UDP,
 180                 RTE_PTYPE_UNKNOWN
 181         };
 182
 183         return ptypes;
 184 }
 185
 186 static void
 187 sfc_efx_rx_set_rss_hash(struct sfc_efx_rxq *rxq, unsigned int flags,
 188                         struct rte_mbuf *m)
 189 {
 190         uint8_t *mbuf_data;
 191
 192
 193         if ((rxq->flags & SFC_EFX_RXQ_FLAG_RSS_HASH) == 0)
 194                 return;
 195
 196         mbuf_data = rte_pktmbuf_mtod(m, uint8_t *);
 197
 198         if (flags & (EFX_PKT_IPV4 | EFX_PKT_IPV6)) {
 199                 m->hash.rss = efx_pseudo_hdr_hash_get(rxq->common,
 200                                                       EFX_RX_HASHALG_TOEPLITZ,
 201                                                       mbuf_data);
 202
 203                 m->ol_flags |= PKT_RX_RSS_HASH;
 204         }
 205 }
 206
 207 static uint16_t
 208 sfc_efx_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
 209 {
 210         struct sfc_dp_rxq *dp_rxq = rx_queue;
 211         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 212         unsigned int completed;
 213         unsigned int prefix_size = rxq->prefix_size;
 214         unsigned int done_pkts = 0;
 215         boolean_t discard_next = B_FALSE;
 216         struct rte_mbuf *scatter_pkt = NULL;
 217
 218         if (unlikely((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0))
 219                 return 0;
 220
 221         sfc_ev_qpoll(rxq->evq);
 222
 223         completed = rxq->completed;
 224         while (completed != rxq->pending && done_pkts < nb_pkts) {
 225                 unsigned int id;
 226                 struct sfc_efx_rx_sw_desc *rxd;
 227                 struct rte_mbuf *m;
 228                 unsigned int seg_len;
 229                 unsigned int desc_flags;
 230
 231                 id = completed++ & rxq->ptr_mask;
 232                 rxd = &rxq->sw_desc[id];
 233                 m = rxd->mbuf;
 234                 desc_flags = rxd->flags;
 235
 236                 if (discard_next)
 237                         goto discard;
 238
 239                 if (desc_flags & (EFX_ADDR_MISMATCH | EFX_DISCARD))
 240                         goto discard;
 241
 242                 if (desc_flags & EFX_PKT_PREFIX_LEN) {
 243                         uint16_t tmp_size;
 244                         int rc __rte_unused;
 245
 246                         rc = efx_pseudo_hdr_pkt_length_get(rxq->common,
 247                                 rte_pktmbuf_mtod(m, uint8_t *), &tmp_size);
 248                         SFC_ASSERT(rc == 0);
 249                         seg_len = tmp_size;
 250                 } else {
 251                         seg_len = rxd->size - prefix_size;
 252                 }
 253
 254                 rte_pktmbuf_data_len(m) = seg_len;
 255                 rte_pktmbuf_pkt_len(m) = seg_len;
 256
 257                 if (scatter_pkt != NULL) {
 258                         if (rte_pktmbuf_chain(scatter_pkt, m) != 0) {
 259                                 rte_pktmbuf_free(scatter_pkt);
 260                                 goto discard;
 261                         }
 262                         /* The packet to deliver */
 263                         m = scatter_pkt;
 264                 }
 265
 266                 if (desc_flags & EFX_PKT_CONT) {
 267                         /* The packet is scattered, more fragments to come */
 268                         scatter_pkt = m;
 269                         /* Further fragments have no prefix */
 270                         prefix_size = 0;
 271                         continue;
 272                 }
 273
 274                 /* Scattered packet is done */
 275                 scatter_pkt = NULL;
 276                 /* The first fragment of the packet has prefix */
 277                 prefix_size = rxq->prefix_size;
 278
 279                 m->ol_flags =
 280                         sfc_efx_rx_desc_flags_to_offload_flags(desc_flags);
 281                 m->packet_type =
 282                         sfc_efx_rx_desc_flags_to_packet_type(desc_flags);
 283
 284                 /*
 285                  * Extract RSS hash from the packet prefix and
 286                  * set the corresponding field (if needed and possible)
 287                  */
 288                 sfc_efx_rx_set_rss_hash(rxq, desc_flags, m);
 289
 290                 m->data_off += prefix_size;
 291
 292                 *rx_pkts++ = m;
 293                 done_pkts++;
 294                 continue;
 295
 296 discard:
 297                 discard_next = ((desc_flags & EFX_PKT_CONT) != 0);
 298                 rte_mbuf_raw_free(m);
 299                 rxd->mbuf = NULL;
 300         }
 301
 302         /* pending is only moved when entire packet is received */
 303         SFC_ASSERT(scatter_pkt == NULL);
 304
 305         rxq->completed = completed;
 306
 307         sfc_efx_rx_qrefill(rxq);
 308
 309         return done_pkts;
 310 }
 311
 312 static sfc_dp_rx_qdesc_npending_t sfc_efx_rx_qdesc_npending;
 313 static unsigned int
 314 sfc_efx_rx_qdesc_npending(struct sfc_dp_rxq *dp_rxq)
 315 {
 316         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 317
 318         if ((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0)
 319                 return 0;
 320
 321         sfc_ev_qpoll(rxq->evq);
 322
 323         return rxq->pending - rxq->completed;
 324 }
 325
 326 static sfc_dp_rx_qdesc_status_t sfc_efx_rx_qdesc_status;
 327 static int
 328 sfc_efx_rx_qdesc_status(struct sfc_dp_rxq *dp_rxq, uint16_t offset)
 329 {
 330         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 331
 332         if (unlikely(offset > rxq->ptr_mask))
 333                 return -EINVAL;
 334
 335         /*
 336          * Poll EvQ to derive up-to-date 'rxq->pending' figure;
 337          * it is required for the queue to be running, but the
 338          * check is omitted because API design assumes that it
 339          * is the duty of the caller to satisfy all conditions
 340          */
 341         SFC_ASSERT((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) ==
 342                    SFC_EFX_RXQ_FLAG_RUNNING);
 343         sfc_ev_qpoll(rxq->evq);
 344
 345         /*
 346          * There is a handful of reserved entries in the ring,
 347          * but an explicit check whether the offset points to
 348          * a reserved entry is neglected since the two checks
 349          * below rely on the figures which take the HW limits
 350          * into account and thus if an entry is reserved, the
 351          * checks will fail and UNAVAIL code will be returned
 352          */
 353
 354         if (offset < (rxq->pending - rxq->completed))
 355                 return RTE_ETH_RX_DESC_DONE;
 356
 357         if (offset < (rxq->added - rxq->completed))
 358                 return RTE_ETH_RX_DESC_AVAIL;
 359
 360         return RTE_ETH_RX_DESC_UNAVAIL;
 361 }
 362
 363 /** Get Rx datapath ops by the datapath RxQ handle */
 364 const struct sfc_dp_rx *
 365 sfc_dp_rx_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
 366 {
 367         const struct sfc_dp_queue *dpq = &dp_rxq->dpq;
 368         struct rte_eth_dev *eth_dev;
 369         struct sfc_adapter_priv *sap;
 370
 371         SFC_ASSERT(rte_eth_dev_is_valid_port(dpq->port_id));
 372         eth_dev = &rte_eth_devices[dpq->port_id];
 373
 374         sap = sfc_adapter_priv_by_eth_dev(eth_dev);
 375
 376         return sap->dp_rx;
 377 }
 378
 379 struct sfc_rxq_info *
 380 sfc_rxq_info_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
 381 {
 382         const struct sfc_dp_queue *dpq = &dp_rxq->dpq;
 383         struct rte_eth_dev *eth_dev;
 384         struct sfc_adapter_shared *sas;
 385
 386         SFC_ASSERT(rte_eth_dev_is_valid_port(dpq->port_id));
 387         eth_dev = &rte_eth_devices[dpq->port_id];
 388
 389         sas = sfc_adapter_shared_by_eth_dev(eth_dev);
 390
 391         SFC_ASSERT(dpq->queue_id < sas->rxq_count);
 392         return &sas->rxq_info[dpq->queue_id];
 393 }
 394
 395 struct sfc_rxq *
 396 sfc_rxq_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
 397 {
 398         const struct sfc_dp_queue *dpq = &dp_rxq->dpq;
 399         struct rte_eth_dev *eth_dev;
 400         struct sfc_adapter *sa;
 401
 402         SFC_ASSERT(rte_eth_dev_is_valid_port(dpq->port_id));
 403         eth_dev = &rte_eth_devices[dpq->port_id];
 404
 405         sa = sfc_adapter_by_eth_dev(eth_dev);
 406
 407         SFC_ASSERT(dpq->queue_id < sfc_sa2shared(sa)->rxq_count);
 408         return &sa->rxq_ctrl[dpq->queue_id];
 409 }
 410
 411 static sfc_dp_rx_qsize_up_rings_t sfc_efx_rx_qsize_up_rings;
 412 static int
 413 sfc_efx_rx_qsize_up_rings(uint16_t nb_rx_desc,
 414                           __rte_unused struct rte_mempool *mb_pool,
 415                           unsigned int *rxq_entries,
 416                           unsigned int *evq_entries,
 417                           unsigned int *rxq_max_fill_level)
 418 {
 419         *rxq_entries = nb_rx_desc;
 420         *evq_entries = nb_rx_desc;
 421         *rxq_max_fill_level = EFX_RXQ_LIMIT(*rxq_entries);
 422         return 0;
 423 }
 424
 425 static sfc_dp_rx_qcreate_t sfc_efx_rx_qcreate;
 426 static int
 427 sfc_efx_rx_qcreate(uint16_t port_id, uint16_t queue_id,
 428                    const struct rte_pci_addr *pci_addr, int socket_id,
 429                    const struct sfc_dp_rx_qcreate_info *info,
 430                    struct sfc_dp_rxq **dp_rxqp)
 431 {
 432         struct sfc_efx_rxq *rxq;
 433         int rc;
 434
 435         rc = ENOMEM;
 436         rxq = rte_zmalloc_socket("sfc-efx-rxq", sizeof(*rxq),
 437                                  RTE_CACHE_LINE_SIZE, socket_id);
 438         if (rxq == NULL)
 439                 goto fail_rxq_alloc;
 440
 441         sfc_dp_queue_init(&rxq->dp.dpq, port_id, queue_id, pci_addr);
 442
 443         rc = ENOMEM;
 444         rxq->sw_desc = rte_calloc_socket("sfc-efx-rxq-sw_desc",
 445                                          info->rxq_entries,
 446                                          sizeof(*rxq->sw_desc),
 447                                          RTE_CACHE_LINE_SIZE, socket_id);
 448         if (rxq->sw_desc == NULL)
 449                 goto fail_desc_alloc;
 450
 451         /* efx datapath is bound to efx control path */
 452         rxq->evq = sfc_rxq_by_dp_rxq(&rxq->dp)->evq;
 453         if (info->flags & SFC_RXQ_FLAG_RSS_HASH)
 454                 rxq->flags |= SFC_EFX_RXQ_FLAG_RSS_HASH;
 455         rxq->ptr_mask = info->rxq_entries - 1;
 456         rxq->batch_max = info->batch_max;
 457         rxq->prefix_size = info->prefix_size;
 458         rxq->max_fill_level = info->max_fill_level;
 459         rxq->refill_threshold = info->refill_threshold;
 460         rxq->buf_size = info->buf_size;
 461         rxq->refill_mb_pool = info->refill_mb_pool;
 462
 463         *dp_rxqp = &rxq->dp;
 464         return 0;
 465
 466 fail_desc_alloc:
 467         rte_free(rxq);
 468
 469 fail_rxq_alloc:
 470         return rc;
 471 }
 472
 473 static sfc_dp_rx_qdestroy_t sfc_efx_rx_qdestroy;
 474 static void
 475 sfc_efx_rx_qdestroy(struct sfc_dp_rxq *dp_rxq)
 476 {
 477         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 478
 479         rte_free(rxq->sw_desc);
 480         rte_free(rxq);
 481 }
 482
 483 static sfc_dp_rx_qstart_t sfc_efx_rx_qstart;
 484 static int
 485 sfc_efx_rx_qstart(struct sfc_dp_rxq *dp_rxq,
 486                   __rte_unused unsigned int evq_read_ptr)
 487 {
 488         /* libefx-based datapath is specific to libefx-based PMD */
 489         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 490         struct sfc_rxq *crxq = sfc_rxq_by_dp_rxq(dp_rxq);
 491
 492         rxq->common = crxq->common;
 493
 494         rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
 495
 496         sfc_efx_rx_qrefill(rxq);
 497
 498         rxq->flags |= (SFC_EFX_RXQ_FLAG_STARTED | SFC_EFX_RXQ_FLAG_RUNNING);
 499
 500         return 0;
 501 }
 502
 503 static sfc_dp_rx_qstop_t sfc_efx_rx_qstop;
 504 static void
 505 sfc_efx_rx_qstop(struct sfc_dp_rxq *dp_rxq,
 506                  __rte_unused unsigned int *evq_read_ptr)
 507 {
 508         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 509
 510         rxq->flags &= ~SFC_EFX_RXQ_FLAG_RUNNING;
 511
 512         /* libefx-based datapath is bound to libefx-based PMD and uses
 513          * event queue structure directly. So, there is no necessity to
 514          * return EvQ read pointer.
 515          */
 516 }
 517
 518 static sfc_dp_rx_qpurge_t sfc_efx_rx_qpurge;
 519 static void
 520 sfc_efx_rx_qpurge(struct sfc_dp_rxq *dp_rxq)
 521 {
 522         struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
 523         unsigned int i;
 524         struct sfc_efx_rx_sw_desc *rxd;
 525
 526         for (i = rxq->completed; i != rxq->added; ++i) {
 527                 rxd = &rxq->sw_desc[i & rxq->ptr_mask];
 528                 rte_mbuf_raw_free(rxd->mbuf);
 529                 rxd->mbuf = NULL;
 530                 /* Packed stream relies on 0 in inactive SW desc.
 531                  * Rx queue stop is not performance critical, so
 532                  * there is no harm to do it always.
 533                  */
 534                 rxd->flags = 0;
 535                 rxd->size = 0;
 536         }
 537
 538         rxq->flags &= ~SFC_EFX_RXQ_FLAG_STARTED;
 539 }
 540
 541 struct sfc_dp_rx sfc_efx_rx = {
 542         .dp = {
 543                 .name           = SFC_KVARG_DATAPATH_EFX,
 544                 .type           = SFC_DP_RX,
 545                 .hw_fw_caps     = 0,
 546         },
 547         .features               = SFC_DP_RX_FEAT_SCATTER |
 548                                   SFC_DP_RX_FEAT_CHECKSUM,
 549         .qsize_up_rings         = sfc_efx_rx_qsize_up_rings,
 550         .qcreate                = sfc_efx_rx_qcreate,
 551         .qdestroy               = sfc_efx_rx_qdestroy,
 552         .qstart                 = sfc_efx_rx_qstart,
 553         .qstop                  = sfc_efx_rx_qstop,
 554         .qpurge                 = sfc_efx_rx_qpurge,
 555         .supported_ptypes_get   = sfc_efx_supported_ptypes_get,
 556         .qdesc_npending         = sfc_efx_rx_qdesc_npending,
 557         .qdesc_status           = sfc_efx_rx_qdesc_status,
 558         .pkt_burst              = sfc_efx_recv_pkts,
 559 };
 560
 561 static void
 562 sfc_rx_qflush(struct sfc_adapter *sa, unsigned int sw_index)
 563 {
 564         struct sfc_rxq_info *rxq_info;
 565         struct sfc_rxq *rxq;
 566         unsigned int retry_count;
 567         unsigned int wait_count;
 568         int rc;
 569
 570         rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
 571         SFC_ASSERT(rxq_info->state & SFC_RXQ_STARTED);
 572
 573         rxq = &sa->rxq_ctrl[sw_index];
 574
 575         /*
 576          * Retry Rx queue flushing in the case of flush failed or
 577          * timeout. In the worst case it can delay for 6 seconds.
 578          */
 579         for (retry_count = 0;
 580              ((rxq_info->state & SFC_RXQ_FLUSHED) == 0) &&
 581              (retry_count < SFC_RX_QFLUSH_ATTEMPTS);
 582              ++retry_count) {
 583                 rc = efx_rx_qflush(rxq->common);
 584                 if (rc != 0) {
 585                         rxq_info->state |= (rc == EALREADY) ?
 586                                 SFC_RXQ_FLUSHED : SFC_RXQ_FLUSH_FAILED;
 587                         break;
 588                 }
 589                 rxq_info->state &= ~SFC_RXQ_FLUSH_FAILED;
 590                 rxq_info->state |= SFC_RXQ_FLUSHING;
 591
 592                 /*
 593                  * Wait for Rx queue flush done or failed event at least
 594                  * SFC_RX_QFLUSH_POLL_WAIT_MS milliseconds and not more
 595                  * than 2 seconds (SFC_RX_QFLUSH_POLL_WAIT_MS multiplied
 596                  * by SFC_RX_QFLUSH_POLL_ATTEMPTS).
 597                  */
 598                 wait_count = 0;
 599                 do {
 600                         rte_delay_ms(SFC_RX_QFLUSH_POLL_WAIT_MS);
 601                         sfc_ev_qpoll(rxq->evq);
 602                 } while ((rxq_info->state & SFC_RXQ_FLUSHING) &&
 603                          (wait_count++ < SFC_RX_QFLUSH_POLL_ATTEMPTS));
 604
 605                 if (rxq_info->state & SFC_RXQ_FLUSHING)
 606                         sfc_err(sa, "RxQ %u flush timed out", sw_index);
 607
 608                 if (rxq_info->state & SFC_RXQ_FLUSH_FAILED)
 609                         sfc_err(sa, "RxQ %u flush failed", sw_index);
 610
 611                 if (rxq_info->state & SFC_RXQ_FLUSHED)
 612                         sfc_notice(sa, "RxQ %u flushed", sw_index);
 613         }
 614
 615         sa->priv.dp_rx->qpurge(rxq_info->dp);
 616 }
 617
 618 static int
 619 sfc_rx_default_rxq_set_filter(struct sfc_adapter *sa, struct sfc_rxq *rxq)
 620 {
 621         struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
 622         boolean_t need_rss = (rss->channels > 0) ? B_TRUE : B_FALSE;
 623         struct sfc_port *port = &sa->port;
 624         int rc;
 625
 626         /*
 627          * If promiscuous or all-multicast mode has been requested, setting
 628          * filter for the default Rx queue might fail, in particular, while
 629          * running over PCI function which is not a member of corresponding
 630          * privilege groups; if this occurs, few iterations will be made to
 631          * repeat this step without promiscuous and all-multicast flags set
 632          */
 633 retry:
 634         rc = efx_mac_filter_default_rxq_set(sa->nic, rxq->common, need_rss);
 635         if (rc == 0)
 636                 return 0;
 637         else if (rc != EOPNOTSUPP)
 638                 return rc;
 639
 640         if (port->promisc) {
 641                 sfc_warn(sa, "promiscuous mode has been requested, "
 642                              "but the HW rejects it");
 643                 sfc_warn(sa, "promiscuous mode will be disabled");
 644
 645                 port->promisc = B_FALSE;
 646                 rc = sfc_set_rx_mode(sa);
 647                 if (rc != 0)
 648                         return rc;
 649
 650                 goto retry;
 651         }
 652
 653         if (port->allmulti) {
 654                 sfc_warn(sa, "all-multicast mode has been requested, "
 655                              "but the HW rejects it");
 656                 sfc_warn(sa, "all-multicast mode will be disabled");
 657
 658                 port->allmulti = B_FALSE;
 659                 rc = sfc_set_rx_mode(sa);
 660                 if (rc != 0)
 661                         return rc;
 662
 663                 goto retry;
 664         }
 665
 666         return rc;
 667 }
 668
 669 int
 670 sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
 671 {
 672         struct sfc_rxq_info *rxq_info;
 673         struct sfc_rxq *rxq;
 674         struct sfc_evq *evq;
 675         int rc;
 676
 677         sfc_log_init(sa, "sw_index=%u", sw_index);
 678
 679         SFC_ASSERT(sw_index < sfc_sa2shared(sa)->rxq_count);
 680
 681         rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
 682         SFC_ASSERT(rxq_info->state == SFC_RXQ_INITIALIZED);
 683
 684         rxq = &sa->rxq_ctrl[sw_index];
 685         evq = rxq->evq;
 686
 687         rc = sfc_ev_qstart(evq, sfc_evq_index_by_rxq_sw_index(sa, sw_index));
 688         if (rc != 0)
 689                 goto fail_ev_qstart;
 690
 691         switch (rxq_info->type) {
 692         case EFX_RXQ_TYPE_DEFAULT:
 693                 rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
 694                         &rxq->mem, rxq_info->entries, 0 /* not used on EF10 */,
 695                         rxq_info->type_flags, evq->common, &rxq->common);
 696                 break;
 697         case EFX_RXQ_TYPE_ES_SUPER_BUFFER: {
 698                 struct rte_mempool *mp = rxq_info->refill_mb_pool;
 699                 struct rte_mempool_info mp_info;
 700
 701                 rc = rte_mempool_ops_get_info(mp, &mp_info);
 702                 if (rc != 0) {
 703                         /* Positive errno is used in the driver */
 704                         rc = -rc;
 705                         goto fail_mp_get_info;
 706                 }
 707                 if (mp_info.contig_block_size <= 0) {
 708                         rc = EINVAL;
 709                         goto fail_bad_contig_block_size;
 710                 }
 711                 rc = efx_rx_qcreate_es_super_buffer(sa->nic, rxq->hw_index, 0,
 712                         mp_info.contig_block_size, rxq->buf_size,
 713                         mp->header_size + mp->elt_size + mp->trailer_size,
 714                         sa->rxd_wait_timeout_ns,
 715                         &rxq->mem, rxq_info->entries, rxq_info->type_flags,
 716                         evq->common, &rxq->common);
 717                 break;
 718         }
 719         default:
 720                 rc = ENOTSUP;
 721         }
 722         if (rc != 0)
 723                 goto fail_rx_qcreate;
 724
 725         efx_rx_qenable(rxq->common);
 726
 727         rc = sa->priv.dp_rx->qstart(rxq_info->dp, evq->read_ptr);
 728         if (rc != 0)
 729                 goto fail_dp_qstart;
 730
 731         rxq_info->state |= SFC_RXQ_STARTED;
 732
 733         if (sw_index == 0 && !sfc_sa2shared(sa)->isolated) {
 734                 rc = sfc_rx_default_rxq_set_filter(sa, rxq);
 735                 if (rc != 0)
 736                         goto fail_mac_filter_default_rxq_set;
 737         }
 738
 739         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
 740         sa->eth_dev->data->rx_queue_state[sw_index] =
 741                 RTE_ETH_QUEUE_STATE_STARTED;
 742
 743         return 0;
 744
 745 fail_mac_filter_default_rxq_set:
 746         sa->priv.dp_rx->qstop(rxq_info->dp, &rxq->evq->read_ptr);
 747
 748 fail_dp_qstart:
 749         sfc_rx_qflush(sa, sw_index);
 750
 751 fail_rx_qcreate:
 752 fail_bad_contig_block_size:
 753 fail_mp_get_info:
 754         sfc_ev_qstop(evq);
 755
 756 fail_ev_qstart:
 757         return rc;
 758 }
 759
 760 void
 761 sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index)
 762 {
 763         struct sfc_rxq_info *rxq_info;
 764         struct sfc_rxq *rxq;
 765
 766         sfc_log_init(sa, "sw_index=%u", sw_index);
 767
 768         SFC_ASSERT(sw_index < sfc_sa2shared(sa)->rxq_count);
 769
 770         rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
 771
 772         if (rxq_info->state == SFC_RXQ_INITIALIZED)
 773                 return;
 774         SFC_ASSERT(rxq_info->state & SFC_RXQ_STARTED);
 775
 776         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
 777         sa->eth_dev->data->rx_queue_state[sw_index] =
 778                 RTE_ETH_QUEUE_STATE_STOPPED;
 779
 780         rxq = &sa->rxq_ctrl[sw_index];
 781         sa->priv.dp_rx->qstop(rxq_info->dp, &rxq->evq->read_ptr);
 782
 783         if (sw_index == 0)
 784                 efx_mac_filter_default_rxq_clear(sa->nic);
 785
 786         sfc_rx_qflush(sa, sw_index);
 787
 788         rxq_info->state = SFC_RXQ_INITIALIZED;
 789
 790         efx_rx_qdestroy(rxq->common);
 791
 792         sfc_ev_qstop(rxq->evq);
 793 }
 794
 795 uint64_t
 796 sfc_rx_get_dev_offload_caps(struct sfc_adapter *sa)
 797 {
 798         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
 799         uint64_t caps = 0;
 800
 801         caps |= DEV_RX_OFFLOAD_JUMBO_FRAME;
 802
 803         if (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_CHECKSUM) {
 804                 caps |= DEV_RX_OFFLOAD_IPV4_CKSUM;
 805                 caps |= DEV_RX_OFFLOAD_UDP_CKSUM;
 806                 caps |= DEV_RX_OFFLOAD_TCP_CKSUM;
 807         }
 808
 809         if (encp->enc_tunnel_encapsulations_supported &&
 810             (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_TUNNELS))
 811                 caps |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 812
 813         return caps;
 814 }
 815
 816 uint64_t
 817 sfc_rx_get_queue_offload_caps(struct sfc_adapter *sa)
 818 {
 819         uint64_t caps = 0;
 820
 821         if (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_SCATTER)
 822                 caps |= DEV_RX_OFFLOAD_SCATTER;
 823
 824         return caps;
 825 }
 826
 827 static int
 828 sfc_rx_qcheck_conf(struct sfc_adapter *sa, unsigned int rxq_max_fill_level,
 829                    const struct rte_eth_rxconf *rx_conf,
 830                    __rte_unused uint64_t offloads)
 831 {
 832         int rc = 0;
 833
 834         if (rx_conf->rx_thresh.pthresh != 0 ||
 835             rx_conf->rx_thresh.hthresh != 0 ||
 836             rx_conf->rx_thresh.wthresh != 0) {
 837                 sfc_warn(sa,
 838                         "RxQ prefetch/host/writeback thresholds are not supported");
 839         }
 840
 841         if (rx_conf->rx_free_thresh > rxq_max_fill_level) {
 842                 sfc_err(sa,
 843                         "RxQ free threshold too large: %u vs maximum %u",
 844                         rx_conf->rx_free_thresh, rxq_max_fill_level);
 845                 rc = EINVAL;
 846         }
 847
 848         if (rx_conf->rx_drop_en == 0) {
 849                 sfc_err(sa, "RxQ drop disable is not supported");
 850                 rc = EINVAL;
 851         }
 852
 853         return rc;
 854 }
 855
 856 static unsigned int
 857 sfc_rx_mbuf_data_alignment(struct rte_mempool *mb_pool)
 858 {
 859         uint32_t data_off;
 860         uint32_t order;
 861
 862         /* The mbuf object itself is always cache line aligned */
 863         order = rte_bsf32(RTE_CACHE_LINE_SIZE);
 864
 865         /* Data offset from mbuf object start */
 866         data_off = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mb_pool) +
 867                 RTE_PKTMBUF_HEADROOM;
 868
 869         order = MIN(order, rte_bsf32(data_off));
 870
 871         return 1u << order;
 872 }
 873
 874 static uint16_t
 875 sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool)
 876 {
 877         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
 878         const uint32_t nic_align_start = MAX(1, encp->enc_rx_buf_align_start);
 879         const uint32_t nic_align_end = MAX(1, encp->enc_rx_buf_align_end);
 880         uint16_t buf_size;
 881         unsigned int buf_aligned;
 882         unsigned int start_alignment;
 883         unsigned int end_padding_alignment;
 884
 885         /* Below it is assumed that both alignments are power of 2 */
 886         SFC_ASSERT(rte_is_power_of_2(nic_align_start));
 887         SFC_ASSERT(rte_is_power_of_2(nic_align_end));
 888
 889         /*
 890          * mbuf is always cache line aligned, double-check
 891          * that it meets rx buffer start alignment requirements.
 892          */
 893
 894         /* Start from mbuf pool data room size */
 895         buf_size = rte_pktmbuf_data_room_size(mb_pool);
 896
 897         /* Remove headroom */
 898         if (buf_size <= RTE_PKTMBUF_HEADROOM) {
 899                 sfc_err(sa,
 900                         "RxQ mbuf pool %s object data room size %u is smaller than headroom %u",
 901                         mb_pool->name, buf_size, RTE_PKTMBUF_HEADROOM);
 902                 return 0;
 903         }
 904         buf_size -= RTE_PKTMBUF_HEADROOM;
 905
 906         /* Calculate guaranteed data start alignment */
 907         buf_aligned = sfc_rx_mbuf_data_alignment(mb_pool);
 908
 909         /* Reserve space for start alignment */
 910         if (buf_aligned < nic_align_start) {
 911                 start_alignment = nic_align_start - buf_aligned;
 912                 if (buf_size <= start_alignment) {
 913                         sfc_err(sa,
 914                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u and buffer start alignment %u required by NIC",
 915                                 mb_pool->name,
 916                                 rte_pktmbuf_data_room_size(mb_pool),
 917                                 RTE_PKTMBUF_HEADROOM, start_alignment);
 918                         return 0;
 919                 }
 920                 buf_aligned = nic_align_start;
 921                 buf_size -= start_alignment;
 922         } else {
 923                 start_alignment = 0;
 924         }
 925
 926         /* Make sure that end padding does not write beyond the buffer */
 927         if (buf_aligned < nic_align_end) {
 928                 /*
 929                  * Estimate space which can be lost. If guarnteed buffer
 930                  * size is odd, lost space is (nic_align_end - 1). More
 931                  * accurate formula is below.
 932                  */
 933                 end_padding_alignment = nic_align_end -
 934                         MIN(buf_aligned, 1u << (rte_bsf32(buf_size) - 1));
 935                 if (buf_size <= end_padding_alignment) {
 936                         sfc_err(sa,
 937                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u, buffer start alignment %u and end padding alignment %u required by NIC",
 938                                 mb_pool->name,
 939                                 rte_pktmbuf_data_room_size(mb_pool),
 940                                 RTE_PKTMBUF_HEADROOM, start_alignment,
 941                                 end_padding_alignment);
 942                         return 0;
 943                 }
 944                 buf_size -= end_padding_alignment;
 945         } else {
 946                 /*
 947                  * Start is aligned the same or better than end,
 948                  * just align length.
 949                  */
 950                 buf_size = P2ALIGN(buf_size, nic_align_end);
 951         }
 952
 953         return buf_size;
 954 }
 955
 956 int
 957 sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
 958              uint16_t nb_rx_desc, unsigned int socket_id,
 959              const struct rte_eth_rxconf *rx_conf,
 960              struct rte_mempool *mb_pool)
 961 {
 962         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
 963         struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
 964         int rc;
 965         unsigned int rxq_entries;
 966         unsigned int evq_entries;
 967         unsigned int rxq_max_fill_level;
 968         uint64_t offloads;
 969         uint16_t buf_size;
 970         struct sfc_rxq_info *rxq_info;
 971         struct sfc_evq *evq;
 972         struct sfc_rxq *rxq;
 973         struct sfc_dp_rx_qcreate_info info;
 974
 975         rc = sa->priv.dp_rx->qsize_up_rings(nb_rx_desc, mb_pool, &rxq_entries,
 976                                             &evq_entries, &rxq_max_fill_level);
 977         if (rc != 0)
 978                 goto fail_size_up_rings;
 979         SFC_ASSERT(rxq_entries >= EFX_RXQ_MINNDESCS);
 980         SFC_ASSERT(rxq_entries <= EFX_RXQ_MAXNDESCS);
 981         SFC_ASSERT(rxq_max_fill_level <= nb_rx_desc);
 982
 983         offloads = rx_conf->offloads |
 984                 sa->eth_dev->data->dev_conf.rxmode.offloads;
 985         rc = sfc_rx_qcheck_conf(sa, rxq_max_fill_level, rx_conf, offloads);
 986         if (rc != 0)
 987                 goto fail_bad_conf;
 988
 989         buf_size = sfc_rx_mb_pool_buf_size(sa, mb_pool);
 990         if (buf_size == 0) {
 991                 sfc_err(sa, "RxQ %u mbuf pool object size is too small",
 992                         sw_index);
 993                 rc = EINVAL;
 994                 goto fail_bad_conf;
 995         }
 996
 997         if ((buf_size < sa->port.pdu + encp->enc_rx_prefix_size) &&
 998             (~offloads & DEV_RX_OFFLOAD_SCATTER)) {
 999                 sfc_err(sa, "Rx scatter is disabled and RxQ %u mbuf pool "
1000                         "object size is too small", sw_index);
1001                 sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
1002                         "PDU size %u plus Rx prefix %u bytes",
1003                         sw_index, buf_size, (unsigned int)sa->port.pdu,
1004                         encp->enc_rx_prefix_size);
1005                 rc = EINVAL;
1006                 goto fail_bad_conf;
1007         }
1008
1009         SFC_ASSERT(sw_index < sfc_sa2shared(sa)->rxq_count);
1010         rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
1011
1012         SFC_ASSERT(rxq_entries <= rxq_info->max_entries);
1013         rxq_info->entries = rxq_entries;
1014
1015         if (sa->priv.dp_rx->dp.hw_fw_caps & SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER)
1016                 rxq_info->type = EFX_RXQ_TYPE_ES_SUPER_BUFFER;
1017         else
1018                 rxq_info->type = EFX_RXQ_TYPE_DEFAULT;
1019
1020         rxq_info->type_flags =
1021                 (offloads & DEV_RX_OFFLOAD_SCATTER) ?
1022                 EFX_RXQ_FLAG_SCATTER : EFX_RXQ_FLAG_NONE;
1023
1024         if ((encp->enc_tunnel_encapsulations_supported != 0) &&
1025             (sa->priv.dp_rx->features & SFC_DP_RX_FEAT_TUNNELS))
1026                 rxq_info->type_flags |= EFX_RXQ_FLAG_INNER_CLASSES;
1027
1028         rc = sfc_ev_qinit(sa, SFC_EVQ_TYPE_RX, sw_index,
1029                           evq_entries, socket_id, &evq);
1030         if (rc != 0)
1031                 goto fail_ev_qinit;
1032
1033         rxq = &sa->rxq_ctrl[sw_index];
1034         rxq->evq = evq;
1035         rxq->hw_index = sw_index;
1036         rxq_info->refill_threshold =
1037                 RTE_MAX(rx_conf->rx_free_thresh, SFC_RX_REFILL_BULK);
1038         rxq_info->refill_mb_pool = mb_pool;
1039         rxq->buf_size = buf_size;
1040
1041         rc = sfc_dma_alloc(sa, "rxq", sw_index, EFX_RXQ_SIZE(rxq_info->entries),
1042                            socket_id, &rxq->mem);
1043         if (rc != 0)
1044                 goto fail_dma_alloc;
1045
1046         memset(&info, 0, sizeof(info));
1047         info.refill_mb_pool = rxq_info->refill_mb_pool;
1048         info.max_fill_level = rxq_max_fill_level;
1049         info.refill_threshold = rxq_info->refill_threshold;
1050         info.buf_size = buf_size;
1051         info.batch_max = encp->enc_rx_batch_max;
1052         info.prefix_size = encp->enc_rx_prefix_size;
1053
1054         if (rss->hash_support == EFX_RX_HASH_AVAILABLE && rss->channels > 0)
1055                 info.flags |= SFC_RXQ_FLAG_RSS_HASH;
1056
1057         info.rxq_entries = rxq_info->entries;
1058         info.rxq_hw_ring = rxq->mem.esm_base;
1059         info.evq_entries = evq_entries;
1060         info.evq_hw_ring = evq->mem.esm_base;
1061         info.hw_index = rxq->hw_index;
1062         info.mem_bar = sa->mem_bar.esb_base;
1063         info.vi_window_shift = encp->enc_vi_window_shift;
1064
1065         rc = sa->priv.dp_rx->qcreate(sa->eth_dev->data->port_id, sw_index,
1066                                      &RTE_ETH_DEV_TO_PCI(sa->eth_dev)->addr,
1067                                      socket_id, &info, &rxq_info->dp);
1068         if (rc != 0)
1069                 goto fail_dp_rx_qcreate;
1070
1071         evq->dp_rxq = rxq_info->dp;
1072
1073         rxq_info->state = SFC_RXQ_INITIALIZED;
1074
1075         rxq_info->deferred_start = (rx_conf->rx_deferred_start != 0);
1076
1077         return 0;
1078
1079 fail_dp_rx_qcreate:
1080         sfc_dma_free(sa, &rxq->mem);
1081
1082 fail_dma_alloc:
1083         sfc_ev_qfini(evq);
1084
1085 fail_ev_qinit:
1086         rxq_info->entries = 0;
1087
1088 fail_bad_conf:
1089 fail_size_up_rings:
1090         sfc_log_init(sa, "failed %d", rc);
1091         return rc;
1092 }
1093
1094 void
1095 sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
1096 {
1097         struct sfc_rxq_info *rxq_info;
1098         struct sfc_rxq *rxq;
1099
1100         SFC_ASSERT(sw_index < sfc_sa2shared(sa)->rxq_count);
1101         sa->eth_dev->data->rx_queues[sw_index] = NULL;
1102
1103         rxq_info = &sfc_sa2shared(sa)->rxq_info[sw_index];
1104
1105         SFC_ASSERT(rxq_info->state == SFC_RXQ_INITIALIZED);
1106
1107         sa->priv.dp_rx->qdestroy(rxq_info->dp);
1108         rxq_info->dp = NULL;
1109
1110         rxq_info->state &= ~SFC_RXQ_INITIALIZED;
1111         rxq_info->entries = 0;
1112
1113         rxq = &sa->rxq_ctrl[sw_index];
1114
1115         sfc_dma_free(sa, &rxq->mem);
1116
1117         sfc_ev_qfini(rxq->evq);
1118         rxq->evq = NULL;
1119 }
1120
1121 /*
1122  * Mapping between RTE RSS hash functions and their EFX counterparts.
1123  */
1124 static const struct sfc_rss_hf_rte_to_efx sfc_rss_hf_map[] = {
1125         { ETH_RSS_NONFRAG_IPV4_TCP,
1126           EFX_RX_HASH(IPV4_TCP, 4TUPLE) },
1127         { ETH_RSS_NONFRAG_IPV4_UDP,
1128           EFX_RX_HASH(IPV4_UDP, 4TUPLE) },
1129         { ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX,
1130           EFX_RX_HASH(IPV6_TCP, 4TUPLE) },
1131         { ETH_RSS_NONFRAG_IPV6_UDP | ETH_RSS_IPV6_UDP_EX,
1132           EFX_RX_HASH(IPV6_UDP, 4TUPLE) },
1133         { ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | ETH_RSS_NONFRAG_IPV4_OTHER,
1134           EFX_RX_HASH(IPV4_TCP, 2TUPLE) | EFX_RX_HASH(IPV4_UDP, 2TUPLE) |
1135           EFX_RX_HASH(IPV4, 2TUPLE) },
1136         { ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | ETH_RSS_NONFRAG_IPV6_OTHER |
1137           ETH_RSS_IPV6_EX,
1138           EFX_RX_HASH(IPV6_TCP, 2TUPLE) | EFX_RX_HASH(IPV6_UDP, 2TUPLE) |
1139           EFX_RX_HASH(IPV6, 2TUPLE) }
1140 };
1141
1142 static efx_rx_hash_type_t
1143 sfc_rx_hash_types_mask_supp(efx_rx_hash_type_t hash_type,
1144                             unsigned int *hash_type_flags_supported,
1145                             unsigned int nb_hash_type_flags_supported)
1146 {
1147         efx_rx_hash_type_t hash_type_masked = 0;
1148         unsigned int i, j;
1149
1150         for (i = 0; i < nb_hash_type_flags_supported; ++i) {
1151                 unsigned int class_tuple_lbn[] = {
1152                         EFX_RX_CLASS_IPV4_TCP_LBN,
1153                         EFX_RX_CLASS_IPV4_UDP_LBN,
1154                         EFX_RX_CLASS_IPV4_LBN,
1155                         EFX_RX_CLASS_IPV6_TCP_LBN,
1156                         EFX_RX_CLASS_IPV6_UDP_LBN,
1157                         EFX_RX_CLASS_IPV6_LBN
1158                 };
1159
1160                 for (j = 0; j < RTE_DIM(class_tuple_lbn); ++j) {
1161                         unsigned int tuple_mask = EFX_RX_CLASS_HASH_4TUPLE;
1162                         unsigned int flag;
1163
1164                         tuple_mask <<= class_tuple_lbn[j];
1165                         flag = hash_type & tuple_mask;
1166
1167                         if (flag == hash_type_flags_supported[i])
1168                                 hash_type_masked |= flag;
1169                 }
1170         }
1171
1172         return hash_type_masked;
1173 }
1174
1175 int
1176 sfc_rx_hash_init(struct sfc_adapter *sa)
1177 {
1178         struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
1179         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
1180         uint32_t alg_mask = encp->enc_rx_scale_hash_alg_mask;
1181         efx_rx_hash_alg_t alg;
1182         unsigned int flags_supp[EFX_RX_HASH_NFLAGS];
1183         unsigned int nb_flags_supp;
1184         struct sfc_rss_hf_rte_to_efx *hf_map;
1185         struct sfc_rss_hf_rte_to_efx *entry;
1186         efx_rx_hash_type_t efx_hash_types;
1187         unsigned int i;
1188         int rc;
1189
1190         if (alg_mask & (1U << EFX_RX_HASHALG_TOEPLITZ))
1191                 alg = EFX_RX_HASHALG_TOEPLITZ;
1192         else if (alg_mask & (1U << EFX_RX_HASHALG_PACKED_STREAM))
1193                 alg = EFX_RX_HASHALG_PACKED_STREAM;
1194         else
1195                 return EINVAL;
1196
1197         rc = efx_rx_scale_hash_flags_get(sa->nic, alg, flags_supp,
1198                                          RTE_DIM(flags_supp), &nb_flags_supp);
1199         if (rc != 0)
1200                 return rc;
1201
1202         hf_map = rte_calloc_socket("sfc-rss-hf-map",
1203                                    RTE_DIM(sfc_rss_hf_map),
1204                                    sizeof(*hf_map), 0, sa->socket_id);
1205         if (hf_map == NULL)
1206                 return ENOMEM;
1207
1208         entry = hf_map;
1209         efx_hash_types = 0;
1210         for (i = 0; i < RTE_DIM(sfc_rss_hf_map); ++i) {
1211                 efx_rx_hash_type_t ht;
1212
1213                 ht = sfc_rx_hash_types_mask_supp(sfc_rss_hf_map[i].efx,
1214                                                  flags_supp, nb_flags_supp);
1215                 if (ht != 0) {
1216                         entry->rte = sfc_rss_hf_map[i].rte;
1217                         entry->efx = ht;
1218                         efx_hash_types |= ht;
1219                         ++entry;
1220                 }
1221         }
1222
1223         rss->hash_alg = alg;
1224         rss->hf_map_nb_entries = (unsigned int)(entry - hf_map);
1225         rss->hf_map = hf_map;
1226         rss->hash_types = efx_hash_types;
1227
1228         return 0;
1229 }
1230
1231 void
1232 sfc_rx_hash_fini(struct sfc_adapter *sa)
1233 {
1234         struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
1235
1236         rte_free(rss->hf_map);
1237 }
1238
1239 int
1240 sfc_rx_hf_rte_to_efx(struct sfc_adapter *sa, uint64_t rte,
1241                      efx_rx_hash_type_t *efx)
1242 {
1243         struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
1244         efx_rx_hash_type_t hash_types = 0;
1245         unsigned int i;
1246
1247         for (i = 0; i < rss->hf_map_nb_entries; ++i) {
1248                 uint64_t rte_mask = rss->hf_map[i].rte;
1249
1250                 if ((rte & rte_mask) != 0) {
1251                         rte &= ~rte_mask;
1252                         hash_types |= rss->hf_map[i].efx;
1253                 }
1254         }
1255
1256         if (rte != 0) {
1257                 sfc_err(sa, "unsupported hash functions requested");
1258                 return EINVAL;
1259         }
1260
1261         *efx = hash_types;
1262
1263         return 0;
1264 }
1265
1266 uint64_t
1267 sfc_rx_hf_efx_to_rte(struct sfc_rss *rss, efx_rx_hash_type_t efx)
1268 {
1269         uint64_t rte = 0;
1270         unsigned int i;
1271
1272         for (i = 0; i < rss->hf_map_nb_entries; ++i) {
1273                 efx_rx_hash_type_t hash_type = rss->hf_map[i].efx;
1274
1275                 if ((efx & hash_type) == hash_type)
1276                         rte |= rss->hf_map[i].rte;
1277         }
1278
1279         return rte;
1280 }
1281
1282 static int
1283 sfc_rx_process_adv_conf_rss(struct sfc_adapter *sa,
1284                             struct rte_eth_rss_conf *conf)
1285 {
1286         struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
1287         efx_rx_hash_type_t efx_hash_types = rss->hash_types;
1288         uint64_t rss_hf = sfc_rx_hf_efx_to_rte(rss, efx_hash_types);
1289         int rc;
1290
1291         if (rss->context_type != EFX_RX_SCALE_EXCLUSIVE) {
1292                 if ((conf->rss_hf != 0 && conf->rss_hf != rss_hf) ||
1293                     conf->rss_key != NULL)
1294                         return EINVAL;
1295         }
1296
1297         if (conf->rss_hf != 0) {
1298                 rc = sfc_rx_hf_rte_to_efx(sa, conf->rss_hf, &efx_hash_types);
1299                 if (rc != 0)
1300                         return rc;
1301         }
1302
1303         if (conf->rss_key != NULL) {
1304                 if (conf->rss_key_len != sizeof(rss->key)) {
1305                         sfc_err(sa, "RSS key size is wrong (should be %lu)",
1306                                 sizeof(rss->key));
1307                         return EINVAL;
1308                 }
1309                 rte_memcpy(rss->key, conf->rss_key, sizeof(rss->key));
1310         }
1311
1312         rss->hash_types = efx_hash_types;
1313
1314         return 0;
1315 }
1316
1317 static int
1318 sfc_rx_rss_config(struct sfc_adapter *sa)
1319 {
1320         struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
1321         int rc = 0;
1322
1323         if (rss->channels > 0) {
1324                 rc = efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1325                                            rss->hash_alg, rss->hash_types,
1326                                            B_TRUE);
1327                 if (rc != 0)
1328                         goto finish;
1329
1330                 rc = efx_rx_scale_key_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1331                                           rss->key, sizeof(rss->key));
1332                 if (rc != 0)
1333                         goto finish;
1334
1335                 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1336                                           rss->tbl, RTE_DIM(rss->tbl));
1337         }
1338
1339 finish:
1340         return rc;
1341 }
1342
1343 int
1344 sfc_rx_start(struct sfc_adapter *sa)
1345 {
1346         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1347         unsigned int sw_index;
1348         int rc;
1349
1350         sfc_log_init(sa, "rxq_count=%u", sas->rxq_count);
1351
1352         rc = efx_rx_init(sa->nic);
1353         if (rc != 0)
1354                 goto fail_rx_init;
1355
1356         rc = sfc_rx_rss_config(sa);
1357         if (rc != 0)
1358                 goto fail_rss_config;
1359
1360         for (sw_index = 0; sw_index < sas->rxq_count; ++sw_index) {
1361                 if (sas->rxq_info[sw_index].state == SFC_RXQ_INITIALIZED &&
1362                     (!sas->rxq_info[sw_index].deferred_start ||
1363                      sas->rxq_info[sw_index].deferred_started)) {
1364                         rc = sfc_rx_qstart(sa, sw_index);
1365                         if (rc != 0)
1366                                 goto fail_rx_qstart;
1367                 }
1368         }
1369
1370         return 0;
1371
1372 fail_rx_qstart:
1373         while (sw_index-- > 0)
1374                 sfc_rx_qstop(sa, sw_index);
1375
1376 fail_rss_config:
1377         efx_rx_fini(sa->nic);
1378
1379 fail_rx_init:
1380         sfc_log_init(sa, "failed %d", rc);
1381         return rc;
1382 }
1383
1384 void
1385 sfc_rx_stop(struct sfc_adapter *sa)
1386 {
1387         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1388         unsigned int sw_index;
1389
1390         sfc_log_init(sa, "rxq_count=%u", sas->rxq_count);
1391
1392         sw_index = sas->rxq_count;
1393         while (sw_index-- > 0) {
1394                 if (sas->rxq_info[sw_index].state & SFC_RXQ_STARTED)
1395                         sfc_rx_qstop(sa, sw_index);
1396         }
1397
1398         efx_rx_fini(sa->nic);
1399 }
1400
1401 static int
1402 sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
1403 {
1404         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1405         struct sfc_rxq_info *rxq_info = &sas->rxq_info[sw_index];
1406         unsigned int max_entries;
1407
1408         max_entries = EFX_RXQ_MAXNDESCS;
1409         SFC_ASSERT(rte_is_power_of_2(max_entries));
1410
1411         rxq_info->max_entries = max_entries;
1412
1413         return 0;
1414 }
1415
1416 static int
1417 sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode)
1418 {
1419         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1420         uint64_t offloads_supported = sfc_rx_get_dev_offload_caps(sa) |
1421                                       sfc_rx_get_queue_offload_caps(sa);
1422         struct sfc_rss *rss = &sas->rss;
1423         int rc = 0;
1424
1425         switch (rxmode->mq_mode) {
1426         case ETH_MQ_RX_NONE:
1427                 /* No special checks are required */
1428                 break;
1429         case ETH_MQ_RX_RSS:
1430                 if (rss->context_type == EFX_RX_SCALE_UNAVAILABLE) {
1431                         sfc_err(sa, "RSS is not available");
1432                         rc = EINVAL;
1433                 }
1434                 break;
1435         default:
1436                 sfc_err(sa, "Rx multi-queue mode %u not supported",
1437                         rxmode->mq_mode);
1438                 rc = EINVAL;
1439         }
1440
1441         /*
1442          * Requested offloads are validated against supported by ethdev,
1443          * so unsupported offloads cannot be added as the result of
1444          * below check.
1445          */
1446         if ((rxmode->offloads & DEV_RX_OFFLOAD_CHECKSUM) !=
1447             (offloads_supported & DEV_RX_OFFLOAD_CHECKSUM)) {
1448                 sfc_warn(sa, "Rx checksum offloads cannot be disabled - always on (IPv4/TCP/UDP)");
1449                 rxmode->offloads |= DEV_RX_OFFLOAD_CHECKSUM;
1450         }
1451
1452         if ((offloads_supported & DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM) &&
1453             (~rxmode->offloads & DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM)) {
1454                 sfc_warn(sa, "Rx outer IPv4 checksum offload cannot be disabled - always on");
1455                 rxmode->offloads |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
1456         }
1457
1458         return rc;
1459 }
1460
1461 /**
1462  * Destroy excess queues that are no longer needed after reconfiguration
1463  * or complete close.
1464  */
1465 static void
1466 sfc_rx_fini_queues(struct sfc_adapter *sa, unsigned int nb_rx_queues)
1467 {
1468         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1469         int sw_index;
1470
1471         SFC_ASSERT(nb_rx_queues <= sas->rxq_count);
1472
1473         sw_index = sas->rxq_count;
1474         while (--sw_index >= (int)nb_rx_queues) {
1475                 if (sas->rxq_info[sw_index].state & SFC_RXQ_INITIALIZED)
1476                         sfc_rx_qfini(sa, sw_index);
1477         }
1478
1479         sas->rxq_count = nb_rx_queues;
1480 }
1481
1482 /**
1483  * Initialize Rx subsystem.
1484  *
1485  * Called at device (re)configuration stage when number of receive queues is
1486  * specified together with other device level receive configuration.
1487  *
1488  * It should be used to allocate NUMA-unaware resources.
1489  */
1490 int
1491 sfc_rx_configure(struct sfc_adapter *sa)
1492 {
1493         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
1494         struct sfc_rss *rss = &sas->rss;
1495         struct rte_eth_conf *dev_conf = &sa->eth_dev->data->dev_conf;
1496         const unsigned int nb_rx_queues = sa->eth_dev->data->nb_rx_queues;
1497         int rc;
1498
1499         sfc_log_init(sa, "nb_rx_queues=%u (old %u)",
1500                      nb_rx_queues, sas->rxq_count);
1501
1502         rc = sfc_rx_check_mode(sa, &dev_conf->rxmode);
1503         if (rc != 0)
1504                 goto fail_check_mode;
1505
1506         if (nb_rx_queues == sas->rxq_count)
1507                 goto configure_rss;
1508
1509         if (sas->rxq_info == NULL) {
1510                 rc = ENOMEM;
1511                 sas->rxq_info = rte_calloc_socket("sfc-rxqs", nb_rx_queues,
1512                                                   sizeof(sas->rxq_info[0]), 0,
1513                                                   sa->socket_id);
1514                 if (sas->rxq_info == NULL)
1515                         goto fail_rxqs_alloc;
1516
1517                 /*
1518                  * Allocate primary process only RxQ control from heap
1519                  * since it should not be shared.
1520                  */
1521                 rc = ENOMEM;
1522                 sa->rxq_ctrl = calloc(nb_rx_queues, sizeof(sa->rxq_ctrl[0]));
1523                 if (sa->rxq_ctrl == NULL)
1524                         goto fail_rxqs_ctrl_alloc;
1525         } else {
1526                 struct sfc_rxq_info *new_rxq_info;
1527                 struct sfc_rxq *new_rxq_ctrl;
1528
1529                 if (nb_rx_queues < sas->rxq_count)
1530                         sfc_rx_fini_queues(sa, nb_rx_queues);
1531
1532                 rc = ENOMEM;
1533                 new_rxq_info =
1534                         rte_realloc(sas->rxq_info,
1535                                     nb_rx_queues * sizeof(sas->rxq_info[0]), 0);
1536                 if (new_rxq_info == NULL && nb_rx_queues > 0)
1537                         goto fail_rxqs_realloc;
1538
1539                 rc = ENOMEM;
1540                 new_rxq_ctrl = realloc(sa->rxq_ctrl,
1541                                        nb_rx_queues * sizeof(sa->rxq_ctrl[0]));
1542                 if (new_rxq_ctrl == NULL && nb_rx_queues > 0)
1543                         goto fail_rxqs_ctrl_realloc;
1544
1545                 sas->rxq_info = new_rxq_info;
1546                 sa->rxq_ctrl = new_rxq_ctrl;
1547                 if (nb_rx_queues > sas->rxq_count) {
1548                         memset(&sas->rxq_info[sas->rxq_count], 0,
1549                                (nb_rx_queues - sas->rxq_count) *
1550                                sizeof(sas->rxq_info[0]));
1551                         memset(&sa->rxq_ctrl[sas->rxq_count], 0,
1552                                (nb_rx_queues - sas->rxq_count) *
1553                                sizeof(sa->rxq_ctrl[0]));
1554                 }
1555         }
1556
1557         while (sas->rxq_count < nb_rx_queues) {
1558                 rc = sfc_rx_qinit_info(sa, sas->rxq_count);
1559                 if (rc != 0)
1560                         goto fail_rx_qinit_info;
1561
1562                 sas->rxq_count++;
1563         }
1564
1565 configure_rss:
1566         rss->channels = (dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) ?
1567                          MIN(sas->rxq_count, EFX_MAXRSS) : 0;
1568
1569         if (rss->channels > 0) {
1570                 struct rte_eth_rss_conf *adv_conf_rss;
1571                 unsigned int sw_index;
1572
1573                 for (sw_index = 0; sw_index < EFX_RSS_TBL_SIZE; ++sw_index)
1574                         rss->tbl[sw_index] = sw_index % rss->channels;
1575
1576                 adv_conf_rss = &dev_conf->rx_adv_conf.rss_conf;
1577                 rc = sfc_rx_process_adv_conf_rss(sa, adv_conf_rss);
1578                 if (rc != 0)
1579                         goto fail_rx_process_adv_conf_rss;
1580         }
1581
1582         return 0;
1583
1584 fail_rx_process_adv_conf_rss:
1585 fail_rx_qinit_info:
1586 fail_rxqs_ctrl_realloc:
1587 fail_rxqs_realloc:
1588 fail_rxqs_ctrl_alloc:
1589 fail_rxqs_alloc:
1590         sfc_rx_close(sa);
1591
1592 fail_check_mode:
1593         sfc_log_init(sa, "failed %d", rc);
1594         return rc;
1595 }
1596
1597 /**
1598  * Shutdown Rx subsystem.
1599  *
1600  * Called at device close stage, for example, before device shutdown.
1601  */
1602 void
1603 sfc_rx_close(struct sfc_adapter *sa)
1604 {
1605         struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
1606
1607         sfc_rx_fini_queues(sa, 0);
1608
1609         rss->channels = 0;
1610
1611         free(sa->rxq_ctrl);
1612         sa->rxq_ctrl = NULL;
1613
1614         rte_free(sfc_sa2shared(sa)->rxq_info);
1615         sfc_sa2shared(sa)->rxq_info = NULL;
1616 }