1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2018 Solarflare Communications Inc.
6 * This software was jointly developed between OKTET Labs (under contract
7 * for Solarflare) and Solarflare Communications, Inc.
10 #include <rte_mempool.h>
15 #include "sfc_debug.h"
19 #include "sfc_kvargs.h"
20 #include "sfc_tweak.h"
23 * Maximum number of Rx queue flush attempt in the case of failure or
26 #define SFC_RX_QFLUSH_ATTEMPTS (3)
29 * Time to wait between event queue polling attempts when waiting for Rx
30 * queue flush done or failed events.
32 #define SFC_RX_QFLUSH_POLL_WAIT_MS (1)
35 * Maximum number of event queue polling attempts when waiting for Rx queue
36 * flush done or failed events. It defines Rx queue flush attempt timeout
37 * together with SFC_RX_QFLUSH_POLL_WAIT_MS.
39 #define SFC_RX_QFLUSH_POLL_ATTEMPTS (2000)
42 sfc_rx_qflush_done(struct sfc_rxq *rxq)
44 rxq->state |= SFC_RXQ_FLUSHED;
45 rxq->state &= ~SFC_RXQ_FLUSHING;
49 sfc_rx_qflush_failed(struct sfc_rxq *rxq)
51 rxq->state |= SFC_RXQ_FLUSH_FAILED;
52 rxq->state &= ~SFC_RXQ_FLUSHING;
56 sfc_efx_rx_qrefill(struct sfc_efx_rxq *rxq)
58 unsigned int free_space;
60 void *objs[SFC_RX_REFILL_BULK];
61 efsys_dma_addr_t addr[RTE_DIM(objs)];
62 unsigned int added = rxq->added;
65 struct sfc_efx_rx_sw_desc *rxd;
67 uint16_t port_id = rxq->dp.dpq.port_id;
69 free_space = rxq->max_fill_level - (added - rxq->completed);
71 if (free_space < rxq->refill_threshold)
74 bulks = free_space / RTE_DIM(objs);
75 /* refill_threshold guarantees that bulks is positive */
76 SFC_ASSERT(bulks > 0);
78 id = added & rxq->ptr_mask;
80 if (unlikely(rte_mempool_get_bulk(rxq->refill_mb_pool, objs,
81 RTE_DIM(objs)) < 0)) {
83 * It is hardly a safe way to increment counter
84 * from different contexts, but all PMDs do it.
86 rxq->evq->sa->eth_dev->data->rx_mbuf_alloc_failed +=
88 /* Return if we have posted nothing yet */
89 if (added == rxq->added)
95 for (i = 0; i < RTE_DIM(objs);
96 ++i, id = (id + 1) & rxq->ptr_mask) {
99 rxd = &rxq->sw_desc[id];
102 SFC_ASSERT(rte_mbuf_refcnt_read(m) == 1);
103 m->data_off = RTE_PKTMBUF_HEADROOM;
104 SFC_ASSERT(m->next == NULL);
105 SFC_ASSERT(m->nb_segs == 1);
108 addr[i] = rte_pktmbuf_iova(m);
111 efx_rx_qpost(rxq->common, addr, rxq->buf_size,
112 RTE_DIM(objs), rxq->completed, added);
113 added += RTE_DIM(objs);
114 } while (--bulks > 0);
116 SFC_ASSERT(added != rxq->added);
118 efx_rx_qpush(rxq->common, added, &rxq->pushed);
122 sfc_efx_rx_desc_flags_to_offload_flags(const unsigned int desc_flags)
124 uint64_t mbuf_flags = 0;
126 switch (desc_flags & (EFX_PKT_IPV4 | EFX_CKSUM_IPV4)) {
127 case (EFX_PKT_IPV4 | EFX_CKSUM_IPV4):
128 mbuf_flags |= PKT_RX_IP_CKSUM_GOOD;
131 mbuf_flags |= PKT_RX_IP_CKSUM_BAD;
134 RTE_BUILD_BUG_ON(PKT_RX_IP_CKSUM_UNKNOWN != 0);
135 SFC_ASSERT((mbuf_flags & PKT_RX_IP_CKSUM_MASK) ==
136 PKT_RX_IP_CKSUM_UNKNOWN);
140 switch ((desc_flags &
141 (EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP))) {
142 case (EFX_PKT_TCP | EFX_CKSUM_TCPUDP):
143 case (EFX_PKT_UDP | EFX_CKSUM_TCPUDP):
144 mbuf_flags |= PKT_RX_L4_CKSUM_GOOD;
148 mbuf_flags |= PKT_RX_L4_CKSUM_BAD;
151 RTE_BUILD_BUG_ON(PKT_RX_L4_CKSUM_UNKNOWN != 0);
152 SFC_ASSERT((mbuf_flags & PKT_RX_L4_CKSUM_MASK) ==
153 PKT_RX_L4_CKSUM_UNKNOWN);
161 sfc_efx_rx_desc_flags_to_packet_type(const unsigned int desc_flags)
163 return RTE_PTYPE_L2_ETHER |
164 ((desc_flags & EFX_PKT_IPV4) ?
165 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN : 0) |
166 ((desc_flags & EFX_PKT_IPV6) ?
167 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN : 0) |
168 ((desc_flags & EFX_PKT_TCP) ? RTE_PTYPE_L4_TCP : 0) |
169 ((desc_flags & EFX_PKT_UDP) ? RTE_PTYPE_L4_UDP : 0);
172 static const uint32_t *
173 sfc_efx_supported_ptypes_get(__rte_unused uint32_t tunnel_encaps)
175 static const uint32_t ptypes[] = {
177 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
178 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
187 #if EFSYS_OPT_RX_SCALE
189 sfc_efx_rx_set_rss_hash(struct sfc_efx_rxq *rxq, unsigned int flags,
195 if ((rxq->flags & SFC_EFX_RXQ_FLAG_RSS_HASH) == 0)
198 mbuf_data = rte_pktmbuf_mtod(m, uint8_t *);
200 if (flags & (EFX_PKT_IPV4 | EFX_PKT_IPV6)) {
201 m->hash.rss = efx_pseudo_hdr_hash_get(rxq->common,
202 EFX_RX_HASHALG_TOEPLITZ,
205 m->ol_flags |= PKT_RX_RSS_HASH;
210 sfc_efx_rx_set_rss_hash(__rte_unused struct sfc_efx_rxq *rxq,
211 __rte_unused unsigned int flags,
212 __rte_unused struct rte_mbuf *m)
218 sfc_efx_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
220 struct sfc_dp_rxq *dp_rxq = rx_queue;
221 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
222 unsigned int completed;
223 unsigned int prefix_size = rxq->prefix_size;
224 unsigned int done_pkts = 0;
225 boolean_t discard_next = B_FALSE;
226 struct rte_mbuf *scatter_pkt = NULL;
228 if (unlikely((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0))
231 sfc_ev_qpoll(rxq->evq);
233 completed = rxq->completed;
234 while (completed != rxq->pending && done_pkts < nb_pkts) {
236 struct sfc_efx_rx_sw_desc *rxd;
238 unsigned int seg_len;
239 unsigned int desc_flags;
241 id = completed++ & rxq->ptr_mask;
242 rxd = &rxq->sw_desc[id];
244 desc_flags = rxd->flags;
249 if (desc_flags & (EFX_ADDR_MISMATCH | EFX_DISCARD))
252 if (desc_flags & EFX_PKT_PREFIX_LEN) {
256 rc = efx_pseudo_hdr_pkt_length_get(rxq->common,
257 rte_pktmbuf_mtod(m, uint8_t *), &tmp_size);
261 seg_len = rxd->size - prefix_size;
264 rte_pktmbuf_data_len(m) = seg_len;
265 rte_pktmbuf_pkt_len(m) = seg_len;
267 if (scatter_pkt != NULL) {
268 if (rte_pktmbuf_chain(scatter_pkt, m) != 0) {
269 rte_pktmbuf_free(scatter_pkt);
272 /* The packet to deliver */
276 if (desc_flags & EFX_PKT_CONT) {
277 /* The packet is scattered, more fragments to come */
279 /* Further fragments have no prefix */
284 /* Scattered packet is done */
286 /* The first fragment of the packet has prefix */
287 prefix_size = rxq->prefix_size;
290 sfc_efx_rx_desc_flags_to_offload_flags(desc_flags);
292 sfc_efx_rx_desc_flags_to_packet_type(desc_flags);
295 * Extract RSS hash from the packet prefix and
296 * set the corresponding field (if needed and possible)
298 sfc_efx_rx_set_rss_hash(rxq, desc_flags, m);
300 m->data_off += prefix_size;
307 discard_next = ((desc_flags & EFX_PKT_CONT) != 0);
308 rte_mempool_put(rxq->refill_mb_pool, m);
312 /* pending is only moved when entire packet is received */
313 SFC_ASSERT(scatter_pkt == NULL);
315 rxq->completed = completed;
317 sfc_efx_rx_qrefill(rxq);
322 static sfc_dp_rx_qdesc_npending_t sfc_efx_rx_qdesc_npending;
324 sfc_efx_rx_qdesc_npending(struct sfc_dp_rxq *dp_rxq)
326 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
328 if ((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) == 0)
331 sfc_ev_qpoll(rxq->evq);
333 return rxq->pending - rxq->completed;
336 static sfc_dp_rx_qdesc_status_t sfc_efx_rx_qdesc_status;
338 sfc_efx_rx_qdesc_status(struct sfc_dp_rxq *dp_rxq, uint16_t offset)
340 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
342 if (unlikely(offset > rxq->ptr_mask))
346 * Poll EvQ to derive up-to-date 'rxq->pending' figure;
347 * it is required for the queue to be running, but the
348 * check is omitted because API design assumes that it
349 * is the duty of the caller to satisfy all conditions
351 SFC_ASSERT((rxq->flags & SFC_EFX_RXQ_FLAG_RUNNING) ==
352 SFC_EFX_RXQ_FLAG_RUNNING);
353 sfc_ev_qpoll(rxq->evq);
356 * There is a handful of reserved entries in the ring,
357 * but an explicit check whether the offset points to
358 * a reserved entry is neglected since the two checks
359 * below rely on the figures which take the HW limits
360 * into account and thus if an entry is reserved, the
361 * checks will fail and UNAVAIL code will be returned
364 if (offset < (rxq->pending - rxq->completed))
365 return RTE_ETH_RX_DESC_DONE;
367 if (offset < (rxq->added - rxq->completed))
368 return RTE_ETH_RX_DESC_AVAIL;
370 return RTE_ETH_RX_DESC_UNAVAIL;
374 sfc_rxq_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq)
376 const struct sfc_dp_queue *dpq = &dp_rxq->dpq;
377 struct rte_eth_dev *eth_dev;
378 struct sfc_adapter *sa;
381 SFC_ASSERT(rte_eth_dev_is_valid_port(dpq->port_id));
382 eth_dev = &rte_eth_devices[dpq->port_id];
384 sa = eth_dev->data->dev_private;
386 SFC_ASSERT(dpq->queue_id < sa->rxq_count);
387 rxq = sa->rxq_info[dpq->queue_id].rxq;
389 SFC_ASSERT(rxq != NULL);
393 static sfc_dp_rx_qsize_up_rings_t sfc_efx_rx_qsize_up_rings;
395 sfc_efx_rx_qsize_up_rings(uint16_t nb_rx_desc,
396 unsigned int *rxq_entries,
397 unsigned int *evq_entries,
398 unsigned int *rxq_max_fill_level)
400 *rxq_entries = nb_rx_desc;
401 *evq_entries = nb_rx_desc;
402 *rxq_max_fill_level = EFX_RXQ_LIMIT(*rxq_entries);
406 static sfc_dp_rx_qcreate_t sfc_efx_rx_qcreate;
408 sfc_efx_rx_qcreate(uint16_t port_id, uint16_t queue_id,
409 const struct rte_pci_addr *pci_addr, int socket_id,
410 const struct sfc_dp_rx_qcreate_info *info,
411 struct sfc_dp_rxq **dp_rxqp)
413 struct sfc_efx_rxq *rxq;
417 rxq = rte_zmalloc_socket("sfc-efx-rxq", sizeof(*rxq),
418 RTE_CACHE_LINE_SIZE, socket_id);
422 sfc_dp_queue_init(&rxq->dp.dpq, port_id, queue_id, pci_addr);
425 rxq->sw_desc = rte_calloc_socket("sfc-efx-rxq-sw_desc",
427 sizeof(*rxq->sw_desc),
428 RTE_CACHE_LINE_SIZE, socket_id);
429 if (rxq->sw_desc == NULL)
430 goto fail_desc_alloc;
432 /* efx datapath is bound to efx control path */
433 rxq->evq = sfc_rxq_by_dp_rxq(&rxq->dp)->evq;
434 if (info->flags & SFC_RXQ_FLAG_RSS_HASH)
435 rxq->flags |= SFC_EFX_RXQ_FLAG_RSS_HASH;
436 rxq->ptr_mask = info->rxq_entries - 1;
437 rxq->batch_max = info->batch_max;
438 rxq->prefix_size = info->prefix_size;
439 rxq->max_fill_level = info->max_fill_level;
440 rxq->refill_threshold = info->refill_threshold;
441 rxq->buf_size = info->buf_size;
442 rxq->refill_mb_pool = info->refill_mb_pool;
454 static sfc_dp_rx_qdestroy_t sfc_efx_rx_qdestroy;
456 sfc_efx_rx_qdestroy(struct sfc_dp_rxq *dp_rxq)
458 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
460 rte_free(rxq->sw_desc);
464 static sfc_dp_rx_qstart_t sfc_efx_rx_qstart;
466 sfc_efx_rx_qstart(struct sfc_dp_rxq *dp_rxq,
467 __rte_unused unsigned int evq_read_ptr)
469 /* libefx-based datapath is specific to libefx-based PMD */
470 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
471 struct sfc_rxq *crxq = sfc_rxq_by_dp_rxq(dp_rxq);
473 rxq->common = crxq->common;
475 rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
477 sfc_efx_rx_qrefill(rxq);
479 rxq->flags |= (SFC_EFX_RXQ_FLAG_STARTED | SFC_EFX_RXQ_FLAG_RUNNING);
484 static sfc_dp_rx_qstop_t sfc_efx_rx_qstop;
486 sfc_efx_rx_qstop(struct sfc_dp_rxq *dp_rxq,
487 __rte_unused unsigned int *evq_read_ptr)
489 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
491 rxq->flags &= ~SFC_EFX_RXQ_FLAG_RUNNING;
493 /* libefx-based datapath is bound to libefx-based PMD and uses
494 * event queue structure directly. So, there is no necessity to
495 * return EvQ read pointer.
499 static sfc_dp_rx_qpurge_t sfc_efx_rx_qpurge;
501 sfc_efx_rx_qpurge(struct sfc_dp_rxq *dp_rxq)
503 struct sfc_efx_rxq *rxq = sfc_efx_rxq_by_dp_rxq(dp_rxq);
505 struct sfc_efx_rx_sw_desc *rxd;
507 for (i = rxq->completed; i != rxq->added; ++i) {
508 rxd = &rxq->sw_desc[i & rxq->ptr_mask];
509 rte_mempool_put(rxq->refill_mb_pool, rxd->mbuf);
511 /* Packed stream relies on 0 in inactive SW desc.
512 * Rx queue stop is not performance critical, so
513 * there is no harm to do it always.
519 rxq->flags &= ~SFC_EFX_RXQ_FLAG_STARTED;
522 struct sfc_dp_rx sfc_efx_rx = {
524 .name = SFC_KVARG_DATAPATH_EFX,
528 .features = SFC_DP_RX_FEAT_SCATTER,
529 .qsize_up_rings = sfc_efx_rx_qsize_up_rings,
530 .qcreate = sfc_efx_rx_qcreate,
531 .qdestroy = sfc_efx_rx_qdestroy,
532 .qstart = sfc_efx_rx_qstart,
533 .qstop = sfc_efx_rx_qstop,
534 .qpurge = sfc_efx_rx_qpurge,
535 .supported_ptypes_get = sfc_efx_supported_ptypes_get,
536 .qdesc_npending = sfc_efx_rx_qdesc_npending,
537 .qdesc_status = sfc_efx_rx_qdesc_status,
538 .pkt_burst = sfc_efx_recv_pkts,
542 sfc_rx_qdesc_npending(struct sfc_adapter *sa, unsigned int sw_index)
546 SFC_ASSERT(sw_index < sa->rxq_count);
547 rxq = sa->rxq_info[sw_index].rxq;
549 if (rxq == NULL || (rxq->state & SFC_RXQ_STARTED) == 0)
552 return sa->dp_rx->qdesc_npending(rxq->dp);
556 sfc_rx_qdesc_done(struct sfc_dp_rxq *dp_rxq, unsigned int offset)
558 struct sfc_rxq *rxq = sfc_rxq_by_dp_rxq(dp_rxq);
560 return offset < rxq->evq->sa->dp_rx->qdesc_npending(dp_rxq);
564 sfc_rx_qflush(struct sfc_adapter *sa, unsigned int sw_index)
567 unsigned int retry_count;
568 unsigned int wait_count;
571 rxq = sa->rxq_info[sw_index].rxq;
572 SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
575 * Retry Rx queue flushing in the case of flush failed or
576 * timeout. In the worst case it can delay for 6 seconds.
578 for (retry_count = 0;
579 ((rxq->state & SFC_RXQ_FLUSHED) == 0) &&
580 (retry_count < SFC_RX_QFLUSH_ATTEMPTS);
582 rc = efx_rx_qflush(rxq->common);
584 rxq->state |= (rc == EALREADY) ?
585 SFC_RXQ_FLUSHED : SFC_RXQ_FLUSH_FAILED;
588 rxq->state &= ~SFC_RXQ_FLUSH_FAILED;
589 rxq->state |= SFC_RXQ_FLUSHING;
592 * Wait for Rx queue flush done or failed event at least
593 * SFC_RX_QFLUSH_POLL_WAIT_MS milliseconds and not more
594 * than 2 seconds (SFC_RX_QFLUSH_POLL_WAIT_MS multiplied
595 * by SFC_RX_QFLUSH_POLL_ATTEMPTS).
599 rte_delay_ms(SFC_RX_QFLUSH_POLL_WAIT_MS);
600 sfc_ev_qpoll(rxq->evq);
601 } while ((rxq->state & SFC_RXQ_FLUSHING) &&
602 (wait_count++ < SFC_RX_QFLUSH_POLL_ATTEMPTS));
604 if (rxq->state & SFC_RXQ_FLUSHING)
605 sfc_err(sa, "RxQ %u flush timed out", sw_index);
607 if (rxq->state & SFC_RXQ_FLUSH_FAILED)
608 sfc_err(sa, "RxQ %u flush failed", sw_index);
610 if (rxq->state & SFC_RXQ_FLUSHED)
611 sfc_info(sa, "RxQ %u flushed", sw_index);
614 sa->dp_rx->qpurge(rxq->dp);
618 sfc_rx_default_rxq_set_filter(struct sfc_adapter *sa, struct sfc_rxq *rxq)
620 boolean_t rss = (sa->rss_channels > 0) ? B_TRUE : B_FALSE;
621 struct sfc_port *port = &sa->port;
625 * If promiscuous or all-multicast mode has been requested, setting
626 * filter for the default Rx queue might fail, in particular, while
627 * running over PCI function which is not a member of corresponding
628 * privilege groups; if this occurs, few iterations will be made to
629 * repeat this step without promiscuous and all-multicast flags set
632 rc = efx_mac_filter_default_rxq_set(sa->nic, rxq->common, rss);
635 else if (rc != EOPNOTSUPP)
639 sfc_warn(sa, "promiscuous mode has been requested, "
640 "but the HW rejects it");
641 sfc_warn(sa, "promiscuous mode will be disabled");
643 port->promisc = B_FALSE;
644 rc = sfc_set_rx_mode(sa);
651 if (port->allmulti) {
652 sfc_warn(sa, "all-multicast mode has been requested, "
653 "but the HW rejects it");
654 sfc_warn(sa, "all-multicast mode will be disabled");
656 port->allmulti = B_FALSE;
657 rc = sfc_set_rx_mode(sa);
668 sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
670 struct sfc_port *port = &sa->port;
671 struct sfc_rxq_info *rxq_info;
676 sfc_log_init(sa, "sw_index=%u", sw_index);
678 SFC_ASSERT(sw_index < sa->rxq_count);
680 rxq_info = &sa->rxq_info[sw_index];
682 SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
686 rc = sfc_ev_qstart(evq, sfc_evq_index_by_rxq_sw_index(sa, sw_index));
690 rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
691 &rxq->mem, rxq_info->entries,
692 0 /* not used on EF10 */, rxq_info->type_flags,
693 evq->common, &rxq->common);
695 goto fail_rx_qcreate;
697 efx_rx_qenable(rxq->common);
699 rc = sa->dp_rx->qstart(rxq->dp, evq->read_ptr);
703 rxq->state |= SFC_RXQ_STARTED;
705 if ((sw_index == 0) && !port->isolated) {
706 rc = sfc_rx_default_rxq_set_filter(sa, rxq);
708 goto fail_mac_filter_default_rxq_set;
711 /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
712 sa->eth_dev->data->rx_queue_state[sw_index] =
713 RTE_ETH_QUEUE_STATE_STARTED;
717 fail_mac_filter_default_rxq_set:
718 sa->dp_rx->qstop(rxq->dp, &rxq->evq->read_ptr);
721 sfc_rx_qflush(sa, sw_index);
731 sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index)
733 struct sfc_rxq_info *rxq_info;
736 sfc_log_init(sa, "sw_index=%u", sw_index);
738 SFC_ASSERT(sw_index < sa->rxq_count);
740 rxq_info = &sa->rxq_info[sw_index];
743 if (rxq->state == SFC_RXQ_INITIALIZED)
745 SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
747 /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
748 sa->eth_dev->data->rx_queue_state[sw_index] =
749 RTE_ETH_QUEUE_STATE_STOPPED;
751 sa->dp_rx->qstop(rxq->dp, &rxq->evq->read_ptr);
754 efx_mac_filter_default_rxq_clear(sa->nic);
756 sfc_rx_qflush(sa, sw_index);
758 rxq->state = SFC_RXQ_INITIALIZED;
760 efx_rx_qdestroy(rxq->common);
762 sfc_ev_qstop(rxq->evq);
766 sfc_rx_get_dev_offload_caps(struct sfc_adapter *sa)
768 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
771 caps |= DEV_RX_OFFLOAD_IPV4_CKSUM;
772 caps |= DEV_RX_OFFLOAD_UDP_CKSUM;
773 caps |= DEV_RX_OFFLOAD_TCP_CKSUM;
775 if (encp->enc_tunnel_encapsulations_supported &&
776 (sa->dp_rx->features & SFC_DP_RX_FEAT_TUNNELS))
777 caps |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
783 sfc_rx_qcheck_conf(struct sfc_adapter *sa, unsigned int rxq_max_fill_level,
784 const struct rte_eth_rxconf *rx_conf)
788 if (rx_conf->rx_thresh.pthresh != 0 ||
789 rx_conf->rx_thresh.hthresh != 0 ||
790 rx_conf->rx_thresh.wthresh != 0) {
792 "RxQ prefetch/host/writeback thresholds are not supported");
795 if (rx_conf->rx_free_thresh > rxq_max_fill_level) {
797 "RxQ free threshold too large: %u vs maximum %u",
798 rx_conf->rx_free_thresh, rxq_max_fill_level);
802 if (rx_conf->rx_drop_en == 0) {
803 sfc_err(sa, "RxQ drop disable is not supported");
811 sfc_rx_mbuf_data_alignment(struct rte_mempool *mb_pool)
816 /* The mbuf object itself is always cache line aligned */
817 order = rte_bsf32(RTE_CACHE_LINE_SIZE);
819 /* Data offset from mbuf object start */
820 data_off = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mb_pool) +
821 RTE_PKTMBUF_HEADROOM;
823 order = MIN(order, rte_bsf32(data_off));
825 return 1u << (order - 1);
829 sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool)
831 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
832 const uint32_t nic_align_start = MAX(1, encp->enc_rx_buf_align_start);
833 const uint32_t nic_align_end = MAX(1, encp->enc_rx_buf_align_end);
835 unsigned int buf_aligned;
836 unsigned int start_alignment;
837 unsigned int end_padding_alignment;
839 /* Below it is assumed that both alignments are power of 2 */
840 SFC_ASSERT(rte_is_power_of_2(nic_align_start));
841 SFC_ASSERT(rte_is_power_of_2(nic_align_end));
844 * mbuf is always cache line aligned, double-check
845 * that it meets rx buffer start alignment requirements.
848 /* Start from mbuf pool data room size */
849 buf_size = rte_pktmbuf_data_room_size(mb_pool);
851 /* Remove headroom */
852 if (buf_size <= RTE_PKTMBUF_HEADROOM) {
854 "RxQ mbuf pool %s object data room size %u is smaller than headroom %u",
855 mb_pool->name, buf_size, RTE_PKTMBUF_HEADROOM);
858 buf_size -= RTE_PKTMBUF_HEADROOM;
860 /* Calculate guaranteed data start alignment */
861 buf_aligned = sfc_rx_mbuf_data_alignment(mb_pool);
863 /* Reserve space for start alignment */
864 if (buf_aligned < nic_align_start) {
865 start_alignment = nic_align_start - buf_aligned;
866 if (buf_size <= start_alignment) {
868 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u and buffer start alignment %u required by NIC",
870 rte_pktmbuf_data_room_size(mb_pool),
871 RTE_PKTMBUF_HEADROOM, start_alignment);
874 buf_aligned = nic_align_start;
875 buf_size -= start_alignment;
880 /* Make sure that end padding does not write beyond the buffer */
881 if (buf_aligned < nic_align_end) {
883 * Estimate space which can be lost. If guarnteed buffer
884 * size is odd, lost space is (nic_align_end - 1). More
885 * accurate formula is below.
887 end_padding_alignment = nic_align_end -
888 MIN(buf_aligned, 1u << (rte_bsf32(buf_size) - 1));
889 if (buf_size <= end_padding_alignment) {
891 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u, buffer start alignment %u and end padding alignment %u required by NIC",
893 rte_pktmbuf_data_room_size(mb_pool),
894 RTE_PKTMBUF_HEADROOM, start_alignment,
895 end_padding_alignment);
898 buf_size -= end_padding_alignment;
901 * Start is aligned the same or better than end,
904 buf_size = P2ALIGN(buf_size, nic_align_end);
911 sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
912 uint16_t nb_rx_desc, unsigned int socket_id,
913 const struct rte_eth_rxconf *rx_conf,
914 struct rte_mempool *mb_pool)
916 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
918 unsigned int rxq_entries;
919 unsigned int evq_entries;
920 unsigned int rxq_max_fill_level;
922 struct sfc_rxq_info *rxq_info;
925 struct sfc_dp_rx_qcreate_info info;
927 rc = sa->dp_rx->qsize_up_rings(nb_rx_desc, &rxq_entries, &evq_entries,
928 &rxq_max_fill_level);
930 goto fail_size_up_rings;
931 SFC_ASSERT(rxq_entries >= EFX_RXQ_MINNDESCS);
932 SFC_ASSERT(rxq_entries <= EFX_RXQ_MAXNDESCS);
933 SFC_ASSERT(rxq_entries >= nb_rx_desc);
934 SFC_ASSERT(rxq_max_fill_level <= nb_rx_desc);
936 rc = sfc_rx_qcheck_conf(sa, rxq_max_fill_level, rx_conf);
940 buf_size = sfc_rx_mb_pool_buf_size(sa, mb_pool);
942 sfc_err(sa, "RxQ %u mbuf pool object size is too small",
948 if ((buf_size < sa->port.pdu + encp->enc_rx_prefix_size) &&
949 !sa->eth_dev->data->dev_conf.rxmode.enable_scatter) {
950 sfc_err(sa, "Rx scatter is disabled and RxQ %u mbuf pool "
951 "object size is too small", sw_index);
952 sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
953 "PDU size %u plus Rx prefix %u bytes",
954 sw_index, buf_size, (unsigned int)sa->port.pdu,
955 encp->enc_rx_prefix_size);
960 SFC_ASSERT(sw_index < sa->rxq_count);
961 rxq_info = &sa->rxq_info[sw_index];
963 SFC_ASSERT(rxq_entries <= rxq_info->max_entries);
964 rxq_info->entries = rxq_entries;
965 rxq_info->type = EFX_RXQ_TYPE_DEFAULT;
966 rxq_info->type_flags =
967 sa->eth_dev->data->dev_conf.rxmode.enable_scatter ?
968 EFX_RXQ_FLAG_SCATTER : EFX_RXQ_FLAG_NONE;
970 if ((encp->enc_tunnel_encapsulations_supported != 0) &&
971 (sa->dp_rx->features & SFC_DP_RX_FEAT_TUNNELS))
972 rxq_info->type_flags |= EFX_RXQ_FLAG_INNER_CLASSES;
974 rc = sfc_ev_qinit(sa, SFC_EVQ_TYPE_RX, sw_index,
975 evq_entries, socket_id, &evq);
980 rxq = rte_zmalloc_socket("sfc-rxq", sizeof(*rxq), RTE_CACHE_LINE_SIZE,
988 rxq->hw_index = sw_index;
989 rxq->refill_threshold =
990 RTE_MAX(rx_conf->rx_free_thresh, SFC_RX_REFILL_BULK);
991 rxq->refill_mb_pool = mb_pool;
993 rc = sfc_dma_alloc(sa, "rxq", sw_index, EFX_RXQ_SIZE(rxq_info->entries),
994 socket_id, &rxq->mem);
998 memset(&info, 0, sizeof(info));
999 info.refill_mb_pool = rxq->refill_mb_pool;
1000 info.max_fill_level = rxq_max_fill_level;
1001 info.refill_threshold = rxq->refill_threshold;
1002 info.buf_size = buf_size;
1003 info.batch_max = encp->enc_rx_batch_max;
1004 info.prefix_size = encp->enc_rx_prefix_size;
1006 #if EFSYS_OPT_RX_SCALE
1007 if (sa->hash_support == EFX_RX_HASH_AVAILABLE && sa->rss_channels > 0)
1008 info.flags |= SFC_RXQ_FLAG_RSS_HASH;
1011 info.rxq_entries = rxq_info->entries;
1012 info.rxq_hw_ring = rxq->mem.esm_base;
1013 info.evq_entries = evq_entries;
1014 info.evq_hw_ring = evq->mem.esm_base;
1015 info.hw_index = rxq->hw_index;
1016 info.mem_bar = sa->mem_bar.esb_base;
1018 rc = sa->dp_rx->qcreate(sa->eth_dev->data->port_id, sw_index,
1019 &RTE_ETH_DEV_TO_PCI(sa->eth_dev)->addr,
1020 socket_id, &info, &rxq->dp);
1022 goto fail_dp_rx_qcreate;
1024 evq->dp_rxq = rxq->dp;
1026 rxq->state = SFC_RXQ_INITIALIZED;
1028 rxq_info->deferred_start = (rx_conf->rx_deferred_start != 0);
1033 sfc_dma_free(sa, &rxq->mem);
1036 rxq_info->rxq = NULL;
1043 rxq_info->entries = 0;
1047 sfc_log_init(sa, "failed %d", rc);
1052 sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
1054 struct sfc_rxq_info *rxq_info;
1055 struct sfc_rxq *rxq;
1057 SFC_ASSERT(sw_index < sa->rxq_count);
1059 rxq_info = &sa->rxq_info[sw_index];
1061 rxq = rxq_info->rxq;
1062 SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
1064 sa->dp_rx->qdestroy(rxq->dp);
1067 rxq_info->rxq = NULL;
1068 rxq_info->entries = 0;
1070 sfc_dma_free(sa, &rxq->mem);
1072 sfc_ev_qfini(rxq->evq);
1078 #if EFSYS_OPT_RX_SCALE
1080 sfc_rte_to_efx_hash_type(uint64_t rss_hf)
1082 efx_rx_hash_type_t efx_hash_types = 0;
1084 if ((rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
1085 ETH_RSS_NONFRAG_IPV4_OTHER)) != 0)
1086 efx_hash_types |= EFX_RX_HASH_IPV4;
1088 if ((rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) != 0)
1089 efx_hash_types |= EFX_RX_HASH_TCPIPV4;
1091 if ((rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
1092 ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX)) != 0)
1093 efx_hash_types |= EFX_RX_HASH_IPV6;
1095 if ((rss_hf & (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX)) != 0)
1096 efx_hash_types |= EFX_RX_HASH_TCPIPV6;
1098 return efx_hash_types;
1102 sfc_efx_to_rte_hash_type(efx_rx_hash_type_t efx_hash_types)
1104 uint64_t rss_hf = 0;
1106 if ((efx_hash_types & EFX_RX_HASH_IPV4) != 0)
1107 rss_hf |= (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
1108 ETH_RSS_NONFRAG_IPV4_OTHER);
1110 if ((efx_hash_types & EFX_RX_HASH_TCPIPV4) != 0)
1111 rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
1113 if ((efx_hash_types & EFX_RX_HASH_IPV6) != 0)
1114 rss_hf |= (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
1115 ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX);
1117 if ((efx_hash_types & EFX_RX_HASH_TCPIPV6) != 0)
1118 rss_hf |= (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX);
1124 #if EFSYS_OPT_RX_SCALE
1126 sfc_rx_rss_config(struct sfc_adapter *sa)
1130 if (sa->rss_channels > 0) {
1131 rc = efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1132 EFX_RX_HASHALG_TOEPLITZ,
1133 sa->rss_hash_types, B_TRUE);
1137 rc = efx_rx_scale_key_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1139 sizeof(sa->rss_key));
1143 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1144 sa->rss_tbl, RTE_DIM(sa->rss_tbl));
1152 sfc_rx_rss_config(__rte_unused struct sfc_adapter *sa)
1159 sfc_rx_start(struct sfc_adapter *sa)
1161 unsigned int sw_index;
1164 sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
1166 rc = efx_rx_init(sa->nic);
1170 rc = sfc_rx_rss_config(sa);
1172 goto fail_rss_config;
1174 for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
1175 if ((!sa->rxq_info[sw_index].deferred_start ||
1176 sa->rxq_info[sw_index].deferred_started)) {
1177 rc = sfc_rx_qstart(sa, sw_index);
1179 goto fail_rx_qstart;
1186 while (sw_index-- > 0)
1187 sfc_rx_qstop(sa, sw_index);
1190 efx_rx_fini(sa->nic);
1193 sfc_log_init(sa, "failed %d", rc);
1198 sfc_rx_stop(struct sfc_adapter *sa)
1200 unsigned int sw_index;
1202 sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
1204 sw_index = sa->rxq_count;
1205 while (sw_index-- > 0) {
1206 if (sa->rxq_info[sw_index].rxq != NULL)
1207 sfc_rx_qstop(sa, sw_index);
1210 efx_rx_fini(sa->nic);
1214 sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
1216 struct sfc_rxq_info *rxq_info = &sa->rxq_info[sw_index];
1217 unsigned int max_entries;
1219 max_entries = EFX_RXQ_MAXNDESCS;
1220 SFC_ASSERT(rte_is_power_of_2(max_entries));
1222 rxq_info->max_entries = max_entries;
1228 sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode)
1232 switch (rxmode->mq_mode) {
1233 case ETH_MQ_RX_NONE:
1234 /* No special checks are required */
1236 #if EFSYS_OPT_RX_SCALE
1238 if (sa->rss_support == EFX_RX_SCALE_UNAVAILABLE) {
1239 sfc_err(sa, "RSS is not available");
1245 sfc_err(sa, "Rx multi-queue mode %u not supported",
1250 if (rxmode->header_split) {
1251 sfc_err(sa, "Header split on Rx not supported");
1255 if (rxmode->hw_vlan_filter) {
1256 sfc_err(sa, "HW VLAN filtering not supported");
1260 if (rxmode->hw_vlan_strip) {
1261 sfc_err(sa, "HW VLAN stripping not supported");
1265 if (rxmode->hw_vlan_extend) {
1267 "Q-in-Q HW VLAN stripping not supported");
1271 if (!rxmode->hw_strip_crc) {
1273 "FCS stripping control not supported - always stripped");
1274 rxmode->hw_strip_crc = 1;
1277 if (rxmode->enable_scatter &&
1278 (~sa->dp_rx->features & SFC_DP_RX_FEAT_SCATTER)) {
1279 sfc_err(sa, "Rx scatter not supported by %s datapath",
1280 sa->dp_rx->dp.name);
1284 if (rxmode->enable_lro) {
1285 sfc_err(sa, "LRO not supported");
1293 * Destroy excess queues that are no longer needed after reconfiguration
1294 * or complete close.
1297 sfc_rx_fini_queues(struct sfc_adapter *sa, unsigned int nb_rx_queues)
1301 SFC_ASSERT(nb_rx_queues <= sa->rxq_count);
1303 sw_index = sa->rxq_count;
1304 while (--sw_index >= (int)nb_rx_queues) {
1305 if (sa->rxq_info[sw_index].rxq != NULL)
1306 sfc_rx_qfini(sa, sw_index);
1309 sa->rxq_count = nb_rx_queues;
1313 * Initialize Rx subsystem.
1315 * Called at device (re)configuration stage when number of receive queues is
1316 * specified together with other device level receive configuration.
1318 * It should be used to allocate NUMA-unaware resources.
1321 sfc_rx_configure(struct sfc_adapter *sa)
1323 struct rte_eth_conf *dev_conf = &sa->eth_dev->data->dev_conf;
1324 const unsigned int nb_rx_queues = sa->eth_dev->data->nb_rx_queues;
1327 sfc_log_init(sa, "nb_rx_queues=%u (old %u)",
1328 nb_rx_queues, sa->rxq_count);
1330 rc = sfc_rx_check_mode(sa, &dev_conf->rxmode);
1332 goto fail_check_mode;
1334 if (nb_rx_queues == sa->rxq_count)
1337 if (sa->rxq_info == NULL) {
1339 sa->rxq_info = rte_calloc_socket("sfc-rxqs", nb_rx_queues,
1340 sizeof(sa->rxq_info[0]), 0,
1342 if (sa->rxq_info == NULL)
1343 goto fail_rxqs_alloc;
1345 struct sfc_rxq_info *new_rxq_info;
1347 if (nb_rx_queues < sa->rxq_count)
1348 sfc_rx_fini_queues(sa, nb_rx_queues);
1352 rte_realloc(sa->rxq_info,
1353 nb_rx_queues * sizeof(sa->rxq_info[0]), 0);
1354 if (new_rxq_info == NULL && nb_rx_queues > 0)
1355 goto fail_rxqs_realloc;
1357 sa->rxq_info = new_rxq_info;
1358 if (nb_rx_queues > sa->rxq_count)
1359 memset(&sa->rxq_info[sa->rxq_count], 0,
1360 (nb_rx_queues - sa->rxq_count) *
1361 sizeof(sa->rxq_info[0]));
1364 while (sa->rxq_count < nb_rx_queues) {
1365 rc = sfc_rx_qinit_info(sa, sa->rxq_count);
1367 goto fail_rx_qinit_info;
1372 #if EFSYS_OPT_RX_SCALE
1373 sa->rss_channels = (dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) ?
1374 MIN(sa->rxq_count, EFX_MAXRSS) : 0;
1376 if (sa->rss_channels > 0) {
1377 unsigned int sw_index;
1379 for (sw_index = 0; sw_index < EFX_RSS_TBL_SIZE; ++sw_index)
1380 sa->rss_tbl[sw_index] = sw_index % sa->rss_channels;
1393 sfc_log_init(sa, "failed %d", rc);
1398 * Shutdown Rx subsystem.
1400 * Called at device close stage, for example, before device shutdown.
1403 sfc_rx_close(struct sfc_adapter *sa)
1405 sfc_rx_fini_queues(sa, 0);
1407 sa->rss_channels = 0;
1409 rte_free(sa->rxq_info);
1410 sa->rxq_info = NULL;