drivers/net/sfc/sfc_rx.c

   1 /*-
   2  * Copyright (c) 2016 Solarflare Communications Inc.
   3  * All rights reserved.
   4  *
   5  * This software was jointly developed between OKTET Labs (under contract
   6  * for Solarflare) and Solarflare Communications, Inc.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright notice,
  12  *    this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright notice,
  14  *    this list of conditions and the following disclaimer in the documentation
  15  *    and/or other materials provided with the distribution.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  18  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  19  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  20  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  21  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  22  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  23  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  24  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  25  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  26  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  27  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  */
  29
  30 #include <rte_mempool.h>
  31
  32 #include "efx.h"
  33
  34 #include "sfc.h"
  35 #include "sfc_debug.h"
  36 #include "sfc_log.h"
  37 #include "sfc_ev.h"
  38 #include "sfc_rx.h"
  39 #include "sfc_tweak.h"
  40
  41 /*
  42  * Maximum number of Rx queue flush attempt in the case of failure or
  43  * flush timeout
  44  */
  45 #define SFC_RX_QFLUSH_ATTEMPTS          (3)
  46
  47 /*
  48  * Time to wait between event queue polling attempts when waiting for Rx
  49  * queue flush done or failed events.
  50  */
  51 #define SFC_RX_QFLUSH_POLL_WAIT_MS      (1)
  52
  53 /*
  54  * Maximum number of event queue polling attempts when waiting for Rx queue
  55  * flush done or failed events. It defines Rx queue flush attempt timeout
  56  * together with SFC_RX_QFLUSH_POLL_WAIT_MS.
  57  */
  58 #define SFC_RX_QFLUSH_POLL_ATTEMPTS     (2000)
  59
  60 void
  61 sfc_rx_qflush_done(struct sfc_rxq *rxq)
  62 {
  63         rxq->state |= SFC_RXQ_FLUSHED;
  64         rxq->state &= ~SFC_RXQ_FLUSHING;
  65 }
  66
  67 void
  68 sfc_rx_qflush_failed(struct sfc_rxq *rxq)
  69 {
  70         rxq->state |= SFC_RXQ_FLUSH_FAILED;
  71         rxq->state &= ~SFC_RXQ_FLUSHING;
  72 }
  73
  74 static void
  75 sfc_rx_qrefill(struct sfc_rxq *rxq)
  76 {
  77         unsigned int free_space;
  78         unsigned int bulks;
  79         void *objs[SFC_RX_REFILL_BULK];
  80         efsys_dma_addr_t addr[RTE_DIM(objs)];
  81         unsigned int added = rxq->added;
  82         unsigned int id;
  83         unsigned int i;
  84         struct sfc_rx_sw_desc *rxd;
  85         struct rte_mbuf *m;
  86         uint8_t port_id = rxq->port_id;
  87
  88         free_space = EFX_RXQ_LIMIT(rxq->ptr_mask + 1) -
  89                 (added - rxq->completed);
  90         bulks = free_space / RTE_DIM(objs);
  91
  92         id = added & rxq->ptr_mask;
  93         while (bulks-- > 0) {
  94                 if (rte_mempool_get_bulk(rxq->refill_mb_pool, objs,
  95                                          RTE_DIM(objs)) < 0) {
  96                         /*
  97                          * It is hardly a safe way to increment counter
  98                          * from different contexts, but all PMDs do it.
  99                          */
 100                         rxq->evq->sa->eth_dev->data->rx_mbuf_alloc_failed +=
 101                                 RTE_DIM(objs);
 102                         break;
 103                 }
 104
 105                 for (i = 0; i < RTE_DIM(objs);
 106                      ++i, id = (id + 1) & rxq->ptr_mask) {
 107                         m = objs[i];
 108
 109                         rxd = &rxq->sw_desc[id];
 110                         rxd->mbuf = m;
 111
 112                         rte_mbuf_refcnt_set(m, 1);
 113                         m->data_off = RTE_PKTMBUF_HEADROOM;
 114                         m->next = NULL;
 115                         m->nb_segs = 1;
 116                         m->port = port_id;
 117
 118                         addr[i] = rte_pktmbuf_mtophys(m);
 119                 }
 120
 121                 efx_rx_qpost(rxq->common, addr, rxq->buf_size,
 122                              RTE_DIM(objs), rxq->completed, added);
 123                 added += RTE_DIM(objs);
 124         }
 125
 126         /* Push doorbell if something is posted */
 127         if (rxq->added != added) {
 128                 rxq->added = added;
 129                 efx_rx_qpush(rxq->common, added, &rxq->pushed);
 130         }
 131 }
 132
 133 static uint64_t
 134 sfc_rx_desc_flags_to_offload_flags(const unsigned int desc_flags)
 135 {
 136         uint64_t mbuf_flags = 0;
 137
 138         switch (desc_flags & (EFX_PKT_IPV4 | EFX_CKSUM_IPV4)) {
 139         case (EFX_PKT_IPV4 | EFX_CKSUM_IPV4):
 140                 mbuf_flags |= PKT_RX_IP_CKSUM_GOOD;
 141                 break;
 142         case EFX_PKT_IPV4:
 143                 mbuf_flags |= PKT_RX_IP_CKSUM_BAD;
 144                 break;
 145         default:
 146                 RTE_BUILD_BUG_ON(PKT_RX_IP_CKSUM_UNKNOWN != 0);
 147                 SFC_ASSERT((mbuf_flags & PKT_RX_IP_CKSUM_MASK) ==
 148                            PKT_RX_IP_CKSUM_UNKNOWN);
 149                 break;
 150         }
 151
 152         switch ((desc_flags &
 153                  (EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP))) {
 154         case (EFX_PKT_TCP | EFX_CKSUM_TCPUDP):
 155         case (EFX_PKT_UDP | EFX_CKSUM_TCPUDP):
 156                 mbuf_flags |= PKT_RX_L4_CKSUM_GOOD;
 157                 break;
 158         case EFX_PKT_TCP:
 159         case EFX_PKT_UDP:
 160                 mbuf_flags |= PKT_RX_L4_CKSUM_BAD;
 161                 break;
 162         default:
 163                 RTE_BUILD_BUG_ON(PKT_RX_L4_CKSUM_UNKNOWN != 0);
 164                 SFC_ASSERT((mbuf_flags & PKT_RX_L4_CKSUM_MASK) ==
 165                            PKT_RX_L4_CKSUM_UNKNOWN);
 166                 break;
 167         }
 168
 169         return mbuf_flags;
 170 }
 171
 172 uint16_t
 173 sfc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
 174 {
 175         struct sfc_rxq *rxq = rx_queue;
 176         unsigned int completed;
 177         unsigned int prefix_size = rxq->prefix_size;
 178         unsigned int done_pkts = 0;
 179         boolean_t discard_next = B_FALSE;
 180
 181         if (unlikely((rxq->state & SFC_RXQ_RUNNING) == 0))
 182                 return 0;
 183
 184         sfc_ev_qpoll(rxq->evq);
 185
 186         completed = rxq->completed;
 187         while (completed != rxq->pending && done_pkts < nb_pkts) {
 188                 unsigned int id;
 189                 struct sfc_rx_sw_desc *rxd;
 190                 struct rte_mbuf *m;
 191                 unsigned int seg_len;
 192                 unsigned int desc_flags;
 193
 194                 id = completed++ & rxq->ptr_mask;
 195                 rxd = &rxq->sw_desc[id];
 196                 m = rxd->mbuf;
 197                 desc_flags = rxd->flags;
 198
 199                 if (discard_next)
 200                         goto discard;
 201
 202                 if (desc_flags & (EFX_ADDR_MISMATCH | EFX_DISCARD))
 203                         goto discard;
 204
 205                 if (desc_flags & EFX_PKT_CONT)
 206                         goto discard;
 207
 208                 if (desc_flags & EFX_PKT_PREFIX_LEN) {
 209                         uint16_t tmp_size;
 210                         int rc __rte_unused;
 211
 212                         rc = efx_pseudo_hdr_pkt_length_get(rxq->common,
 213                                 rte_pktmbuf_mtod(m, uint8_t *), &tmp_size);
 214                         SFC_ASSERT(rc == 0);
 215                         seg_len = tmp_size;
 216                 } else {
 217                         seg_len = rxd->size - prefix_size;
 218                 }
 219
 220                 m->data_off += prefix_size;
 221                 rte_pktmbuf_data_len(m) = seg_len;
 222                 rte_pktmbuf_pkt_len(m) = seg_len;
 223
 224                 m->ol_flags = sfc_rx_desc_flags_to_offload_flags(desc_flags);
 225                 m->packet_type = RTE_PTYPE_L2_ETHER;
 226
 227                 *rx_pkts++ = m;
 228                 done_pkts++;
 229                 continue;
 230
 231 discard:
 232                 discard_next = ((desc_flags & EFX_PKT_CONT) != 0);
 233                 rte_mempool_put(rxq->refill_mb_pool, m);
 234                 rxd->mbuf = NULL;
 235         }
 236
 237         rxq->completed = completed;
 238
 239         sfc_rx_qrefill(rxq);
 240
 241         return done_pkts;
 242 }
 243
 244 static void
 245 sfc_rx_qpurge(struct sfc_rxq *rxq)
 246 {
 247         unsigned int i;
 248         struct sfc_rx_sw_desc *rxd;
 249
 250         for (i = rxq->completed; i != rxq->added; ++i) {
 251                 rxd = &rxq->sw_desc[i & rxq->ptr_mask];
 252                 rte_mempool_put(rxq->refill_mb_pool, rxd->mbuf);
 253                 rxd->mbuf = NULL;
 254         }
 255 }
 256
 257 static void
 258 sfc_rx_qflush(struct sfc_adapter *sa, unsigned int sw_index)
 259 {
 260         struct sfc_rxq *rxq;
 261         unsigned int retry_count;
 262         unsigned int wait_count;
 263
 264         rxq = sa->rxq_info[sw_index].rxq;
 265         SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
 266
 267         /*
 268          * Retry Rx queue flushing in the case of flush failed or
 269          * timeout. In the worst case it can delay for 6 seconds.
 270          */
 271         for (retry_count = 0;
 272              ((rxq->state & SFC_RXQ_FLUSHED) == 0) &&
 273              (retry_count < SFC_RX_QFLUSH_ATTEMPTS);
 274              ++retry_count) {
 275                 if (efx_rx_qflush(rxq->common) != 0) {
 276                         rxq->state |= SFC_RXQ_FLUSH_FAILED;
 277                         break;
 278                 }
 279                 rxq->state &= ~SFC_RXQ_FLUSH_FAILED;
 280                 rxq->state |= SFC_RXQ_FLUSHING;
 281
 282                 /*
 283                  * Wait for Rx queue flush done or failed event at least
 284                  * SFC_RX_QFLUSH_POLL_WAIT_MS milliseconds and not more
 285                  * than 2 seconds (SFC_RX_QFLUSH_POLL_WAIT_MS multiplied
 286                  * by SFC_RX_QFLUSH_POLL_ATTEMPTS).
 287                  */
 288                 wait_count = 0;
 289                 do {
 290                         rte_delay_ms(SFC_RX_QFLUSH_POLL_WAIT_MS);
 291                         sfc_ev_qpoll(rxq->evq);
 292                 } while ((rxq->state & SFC_RXQ_FLUSHING) &&
 293                          (wait_count++ < SFC_RX_QFLUSH_POLL_ATTEMPTS));
 294
 295                 if (rxq->state & SFC_RXQ_FLUSHING)
 296                         sfc_err(sa, "RxQ %u flush timed out", sw_index);
 297
 298                 if (rxq->state & SFC_RXQ_FLUSH_FAILED)
 299                         sfc_err(sa, "RxQ %u flush failed", sw_index);
 300
 301                 if (rxq->state & SFC_RXQ_FLUSHED)
 302                         sfc_info(sa, "RxQ %u flushed", sw_index);
 303         }
 304
 305         sfc_rx_qpurge(rxq);
 306 }
 307
 308 int
 309 sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
 310 {
 311         struct sfc_rxq_info *rxq_info;
 312         struct sfc_rxq *rxq;
 313         struct sfc_evq *evq;
 314         int rc;
 315
 316         sfc_log_init(sa, "sw_index=%u", sw_index);
 317
 318         SFC_ASSERT(sw_index < sa->rxq_count);
 319
 320         rxq_info = &sa->rxq_info[sw_index];
 321         rxq = rxq_info->rxq;
 322         SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
 323
 324         evq = rxq->evq;
 325
 326         rc = sfc_ev_qstart(sa, evq->evq_index);
 327         if (rc != 0)
 328                 goto fail_ev_qstart;
 329
 330         rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
 331                             &rxq->mem, rxq_info->entries,
 332                             0 /* not used on EF10 */, evq->common,
 333                             &rxq->common);
 334         if (rc != 0)
 335                 goto fail_rx_qcreate;
 336
 337         efx_rx_qenable(rxq->common);
 338
 339         rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
 340
 341         rxq->state |= (SFC_RXQ_STARTED | SFC_RXQ_RUNNING);
 342
 343         sfc_rx_qrefill(rxq);
 344
 345         if (sw_index == 0) {
 346                 rc = efx_mac_filter_default_rxq_set(sa->nic, rxq->common,
 347                                                     B_FALSE);
 348                 if (rc != 0)
 349                         goto fail_mac_filter_default_rxq_set;
 350         }
 351
 352         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
 353         sa->eth_dev->data->rx_queue_state[sw_index] =
 354                 RTE_ETH_QUEUE_STATE_STARTED;
 355
 356         return 0;
 357
 358 fail_mac_filter_default_rxq_set:
 359         sfc_rx_qflush(sa, sw_index);
 360
 361 fail_rx_qcreate:
 362         sfc_ev_qstop(sa, evq->evq_index);
 363
 364 fail_ev_qstart:
 365         return rc;
 366 }
 367
 368 void
 369 sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index)
 370 {
 371         struct sfc_rxq_info *rxq_info;
 372         struct sfc_rxq *rxq;
 373
 374         sfc_log_init(sa, "sw_index=%u", sw_index);
 375
 376         SFC_ASSERT(sw_index < sa->rxq_count);
 377
 378         rxq_info = &sa->rxq_info[sw_index];
 379         rxq = rxq_info->rxq;
 380         SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
 381
 382         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
 383         sa->eth_dev->data->rx_queue_state[sw_index] =
 384                 RTE_ETH_QUEUE_STATE_STOPPED;
 385
 386         rxq->state &= ~SFC_RXQ_RUNNING;
 387
 388         if (sw_index == 0)
 389                 efx_mac_filter_default_rxq_clear(sa->nic);
 390
 391         sfc_rx_qflush(sa, sw_index);
 392
 393         rxq->state = SFC_RXQ_INITIALIZED;
 394
 395         efx_rx_qdestroy(rxq->common);
 396
 397         sfc_ev_qstop(sa, rxq->evq->evq_index);
 398 }
 399
 400 static int
 401 sfc_rx_qcheck_conf(struct sfc_adapter *sa,
 402                    const struct rte_eth_rxconf *rx_conf)
 403 {
 404         int rc = 0;
 405
 406         if (rx_conf->rx_thresh.pthresh != 0 ||
 407             rx_conf->rx_thresh.hthresh != 0 ||
 408             rx_conf->rx_thresh.wthresh != 0) {
 409                 sfc_err(sa,
 410                         "RxQ prefetch/host/writeback thresholds are not supported");
 411                 rc = EINVAL;
 412         }
 413
 414         if (rx_conf->rx_free_thresh != 0) {
 415                 sfc_err(sa, "RxQ free threshold is not supported");
 416                 rc = EINVAL;
 417         }
 418
 419         if (rx_conf->rx_drop_en == 0) {
 420                 sfc_err(sa, "RxQ drop disable is not supported");
 421                 rc = EINVAL;
 422         }
 423
 424         if (rx_conf->rx_deferred_start != 0) {
 425                 sfc_err(sa, "RxQ deferred start is not supported");
 426                 rc = EINVAL;
 427         }
 428
 429         return rc;
 430 }
 431
 432 static unsigned int
 433 sfc_rx_mbuf_data_alignment(struct rte_mempool *mb_pool)
 434 {
 435         uint32_t data_off;
 436         uint32_t order;
 437
 438         /* The mbuf object itself is always cache line aligned */
 439         order = rte_bsf32(RTE_CACHE_LINE_SIZE);
 440
 441         /* Data offset from mbuf object start */
 442         data_off = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mb_pool) +
 443                 RTE_PKTMBUF_HEADROOM;
 444
 445         order = MIN(order, rte_bsf32(data_off));
 446
 447         return 1u << (order - 1);
 448 }
 449
 450 static uint16_t
 451 sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool)
 452 {
 453         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
 454         const uint32_t nic_align_start = MAX(1, encp->enc_rx_buf_align_start);
 455         const uint32_t nic_align_end = MAX(1, encp->enc_rx_buf_align_end);
 456         uint16_t buf_size;
 457         unsigned int buf_aligned;
 458         unsigned int start_alignment;
 459         unsigned int end_padding_alignment;
 460
 461         /* Below it is assumed that both alignments are power of 2 */
 462         SFC_ASSERT(rte_is_power_of_2(nic_align_start));
 463         SFC_ASSERT(rte_is_power_of_2(nic_align_end));
 464
 465         /*
 466          * mbuf is always cache line aligned, double-check
 467          * that it meets rx buffer start alignment requirements.
 468          */
 469
 470         /* Start from mbuf pool data room size */
 471         buf_size = rte_pktmbuf_data_room_size(mb_pool);
 472
 473         /* Remove headroom */
 474         if (buf_size <= RTE_PKTMBUF_HEADROOM) {
 475                 sfc_err(sa,
 476                         "RxQ mbuf pool %s object data room size %u is smaller than headroom %u",
 477                         mb_pool->name, buf_size, RTE_PKTMBUF_HEADROOM);
 478                 return 0;
 479         }
 480         buf_size -= RTE_PKTMBUF_HEADROOM;
 481
 482         /* Calculate guaranteed data start alignment */
 483         buf_aligned = sfc_rx_mbuf_data_alignment(mb_pool);
 484
 485         /* Reserve space for start alignment */
 486         if (buf_aligned < nic_align_start) {
 487                 start_alignment = nic_align_start - buf_aligned;
 488                 if (buf_size <= start_alignment) {
 489                         sfc_err(sa,
 490                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u and buffer start alignment %u required by NIC",
 491                                 mb_pool->name,
 492                                 rte_pktmbuf_data_room_size(mb_pool),
 493                                 RTE_PKTMBUF_HEADROOM, start_alignment);
 494                         return 0;
 495                 }
 496                 buf_aligned = nic_align_start;
 497                 buf_size -= start_alignment;
 498         } else {
 499                 start_alignment = 0;
 500         }
 501
 502         /* Make sure that end padding does not write beyond the buffer */
 503         if (buf_aligned < nic_align_end) {
 504                 /*
 505                  * Estimate space which can be lost. If guarnteed buffer
 506                  * size is odd, lost space is (nic_align_end - 1). More
 507                  * accurate formula is below.
 508                  */
 509                 end_padding_alignment = nic_align_end -
 510                         MIN(buf_aligned, 1u << (rte_bsf32(buf_size) - 1));
 511                 if (buf_size <= end_padding_alignment) {
 512                         sfc_err(sa,
 513                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u, buffer start alignment %u and end padding alignment %u required by NIC",
 514                                 mb_pool->name,
 515                                 rte_pktmbuf_data_room_size(mb_pool),
 516                                 RTE_PKTMBUF_HEADROOM, start_alignment,
 517                                 end_padding_alignment);
 518                         return 0;
 519                 }
 520                 buf_size -= end_padding_alignment;
 521         } else {
 522                 /*
 523                  * Start is aligned the same or better than end,
 524                  * just align length.
 525                  */
 526                 buf_size = P2ALIGN(buf_size, nic_align_end);
 527         }
 528
 529         return buf_size;
 530 }
 531
 532 int
 533 sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
 534              uint16_t nb_rx_desc, unsigned int socket_id,
 535              const struct rte_eth_rxconf *rx_conf,
 536              struct rte_mempool *mb_pool)
 537 {
 538         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
 539         int rc;
 540         uint16_t buf_size;
 541         struct sfc_rxq_info *rxq_info;
 542         unsigned int evq_index;
 543         struct sfc_evq *evq;
 544         struct sfc_rxq *rxq;
 545
 546         rc = sfc_rx_qcheck_conf(sa, rx_conf);
 547         if (rc != 0)
 548                 goto fail_bad_conf;
 549
 550         buf_size = sfc_rx_mb_pool_buf_size(sa, mb_pool);
 551         if (buf_size == 0) {
 552                 sfc_err(sa, "RxQ %u mbuf pool object size is too small",
 553                         sw_index);
 554                 rc = EINVAL;
 555                 goto fail_bad_conf;
 556         }
 557
 558         if ((buf_size < sa->port.pdu + encp->enc_rx_prefix_size) &&
 559             !sa->eth_dev->data->dev_conf.rxmode.enable_scatter) {
 560                 sfc_err(sa, "Rx scatter is disabled and RxQ %u mbuf pool "
 561                         "object size is too small", sw_index);
 562                 sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
 563                         "PDU size %u plus Rx prefix %u bytes",
 564                         sw_index, buf_size, (unsigned int)sa->port.pdu,
 565                         encp->enc_rx_prefix_size);
 566                 rc = EINVAL;
 567                 goto fail_bad_conf;
 568         }
 569
 570         SFC_ASSERT(sw_index < sa->rxq_count);
 571         rxq_info = &sa->rxq_info[sw_index];
 572
 573         SFC_ASSERT(nb_rx_desc <= rxq_info->max_entries);
 574         rxq_info->entries = nb_rx_desc;
 575         rxq_info->type = EFX_RXQ_TYPE_DEFAULT;
 576
 577         evq_index = sfc_evq_index_by_rxq_sw_index(sa, sw_index);
 578
 579         rc = sfc_ev_qinit(sa, evq_index, rxq_info->entries, socket_id);
 580         if (rc != 0)
 581                 goto fail_ev_qinit;
 582
 583         evq = sa->evq_info[evq_index].evq;
 584
 585         rc = ENOMEM;
 586         rxq = rte_zmalloc_socket("sfc-rxq", sizeof(*rxq), RTE_CACHE_LINE_SIZE,
 587                                  socket_id);
 588         if (rxq == NULL)
 589                 goto fail_rxq_alloc;
 590
 591         rc = sfc_dma_alloc(sa, "rxq", sw_index, EFX_RXQ_SIZE(rxq_info->entries),
 592                            socket_id, &rxq->mem);
 593         if (rc != 0)
 594                 goto fail_dma_alloc;
 595
 596         rc = ENOMEM;
 597         rxq->sw_desc = rte_calloc_socket("sfc-rxq-sw_desc", rxq_info->entries,
 598                                          sizeof(*rxq->sw_desc),
 599                                          RTE_CACHE_LINE_SIZE, socket_id);
 600         if (rxq->sw_desc == NULL)
 601                 goto fail_desc_alloc;
 602
 603         evq->rxq = rxq;
 604         rxq->evq = evq;
 605         rxq->ptr_mask = rxq_info->entries - 1;
 606         rxq->refill_mb_pool = mb_pool;
 607         rxq->buf_size = buf_size;
 608         rxq->hw_index = sw_index;
 609         rxq->port_id = sa->eth_dev->data->port_id;
 610
 611         /* Cache limits required on datapath in RxQ structure */
 612         rxq->batch_max = encp->enc_rx_batch_max;
 613         rxq->prefix_size = encp->enc_rx_prefix_size;
 614
 615         rxq->state = SFC_RXQ_INITIALIZED;
 616
 617         rxq_info->rxq = rxq;
 618
 619         return 0;
 620
 621 fail_desc_alloc:
 622         sfc_dma_free(sa, &rxq->mem);
 623
 624 fail_dma_alloc:
 625         rte_free(rxq);
 626
 627 fail_rxq_alloc:
 628         sfc_ev_qfini(sa, evq_index);
 629
 630 fail_ev_qinit:
 631         rxq_info->entries = 0;
 632
 633 fail_bad_conf:
 634         sfc_log_init(sa, "failed %d", rc);
 635         return rc;
 636 }
 637
 638 void
 639 sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
 640 {
 641         struct sfc_rxq_info *rxq_info;
 642         struct sfc_rxq *rxq;
 643
 644         SFC_ASSERT(sw_index < sa->rxq_count);
 645
 646         rxq_info = &sa->rxq_info[sw_index];
 647
 648         rxq = rxq_info->rxq;
 649         SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
 650
 651         rxq_info->rxq = NULL;
 652         rxq_info->entries = 0;
 653
 654         rte_free(rxq->sw_desc);
 655         sfc_dma_free(sa, &rxq->mem);
 656         rte_free(rxq);
 657 }
 658
 659 int
 660 sfc_rx_start(struct sfc_adapter *sa)
 661 {
 662         unsigned int sw_index;
 663         int rc;
 664
 665         sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
 666
 667         rc = efx_rx_init(sa->nic);
 668         if (rc != 0)
 669                 goto fail_rx_init;
 670
 671         for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
 672                 rc = sfc_rx_qstart(sa, sw_index);
 673                 if (rc != 0)
 674                         goto fail_rx_qstart;
 675         }
 676
 677         return 0;
 678
 679 fail_rx_qstart:
 680         while (sw_index-- > 0)
 681                 sfc_rx_qstop(sa, sw_index);
 682
 683         efx_rx_fini(sa->nic);
 684
 685 fail_rx_init:
 686         sfc_log_init(sa, "failed %d", rc);
 687         return rc;
 688 }
 689
 690 void
 691 sfc_rx_stop(struct sfc_adapter *sa)
 692 {
 693         unsigned int sw_index;
 694
 695         sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
 696
 697         sw_index = sa->rxq_count;
 698         while (sw_index-- > 0) {
 699                 if (sa->rxq_info[sw_index].rxq != NULL)
 700                         sfc_rx_qstop(sa, sw_index);
 701         }
 702
 703         efx_rx_fini(sa->nic);
 704 }
 705
 706 static int
 707 sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
 708 {
 709         struct sfc_rxq_info *rxq_info = &sa->rxq_info[sw_index];
 710         unsigned int max_entries;
 711
 712         max_entries = EFX_RXQ_MAXNDESCS;
 713         SFC_ASSERT(rte_is_power_of_2(max_entries));
 714
 715         rxq_info->max_entries = max_entries;
 716
 717         return 0;
 718 }
 719
 720 static int
 721 sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode)
 722 {
 723         int rc = 0;
 724
 725         switch (rxmode->mq_mode) {
 726         case ETH_MQ_RX_NONE:
 727                 /* No special checks are required */
 728                 break;
 729         default:
 730                 sfc_err(sa, "Rx multi-queue mode %u not supported",
 731                         rxmode->mq_mode);
 732                 rc = EINVAL;
 733         }
 734
 735         if (rxmode->header_split) {
 736                 sfc_err(sa, "Header split on Rx not supported");
 737                 rc = EINVAL;
 738         }
 739
 740         if (rxmode->hw_vlan_filter) {
 741                 sfc_err(sa, "HW VLAN filtering not supported");
 742                 rc = EINVAL;
 743         }
 744
 745         if (rxmode->hw_vlan_strip) {
 746                 sfc_err(sa, "HW VLAN stripping not supported");
 747                 rc = EINVAL;
 748         }
 749
 750         if (rxmode->hw_vlan_extend) {
 751                 sfc_err(sa,
 752                         "Q-in-Q HW VLAN stripping not supported");
 753                 rc = EINVAL;
 754         }
 755
 756         if (!rxmode->hw_strip_crc) {
 757                 sfc_warn(sa,
 758                          "FCS stripping control not supported - always stripped");
 759                 rxmode->hw_strip_crc = 1;
 760         }
 761
 762         if (rxmode->enable_scatter) {
 763                 sfc_err(sa, "Scatter on Rx not supported");
 764                 rc = EINVAL;
 765         }
 766
 767         if (rxmode->enable_lro) {
 768                 sfc_err(sa, "LRO not supported");
 769                 rc = EINVAL;
 770         }
 771
 772         return rc;
 773 }
 774
 775 /**
 776  * Initialize Rx subsystem.
 777  *
 778  * Called at device configuration stage when number of receive queues is
 779  * specified together with other device level receive configuration.
 780  *
 781  * It should be used to allocate NUMA-unaware resources.
 782  */
 783 int
 784 sfc_rx_init(struct sfc_adapter *sa)
 785 {
 786         struct rte_eth_conf *dev_conf = &sa->eth_dev->data->dev_conf;
 787         unsigned int sw_index;
 788         int rc;
 789
 790         rc = sfc_rx_check_mode(sa, &dev_conf->rxmode);
 791         if (rc != 0)
 792                 goto fail_check_mode;
 793
 794         sa->rxq_count = sa->eth_dev->data->nb_rx_queues;
 795
 796         rc = ENOMEM;
 797         sa->rxq_info = rte_calloc_socket("sfc-rxqs", sa->rxq_count,
 798                                          sizeof(struct sfc_rxq_info), 0,
 799                                          sa->socket_id);
 800         if (sa->rxq_info == NULL)
 801                 goto fail_rxqs_alloc;
 802
 803         for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
 804                 rc = sfc_rx_qinit_info(sa, sw_index);
 805                 if (rc != 0)
 806                         goto fail_rx_qinit_info;
 807         }
 808
 809         return 0;
 810
 811 fail_rx_qinit_info:
 812         rte_free(sa->rxq_info);
 813         sa->rxq_info = NULL;
 814
 815 fail_rxqs_alloc:
 816         sa->rxq_count = 0;
 817 fail_check_mode:
 818         sfc_log_init(sa, "failed %d", rc);
 819         return rc;
 820 }
 821
 822 /**
 823  * Shutdown Rx subsystem.
 824  *
 825  * Called at device close stage, for example, before device
 826  * reconfiguration or shutdown.
 827  */
 828 void
 829 sfc_rx_fini(struct sfc_adapter *sa)
 830 {
 831         unsigned int sw_index;
 832
 833         sw_index = sa->rxq_count;
 834         while (sw_index-- > 0) {
 835                 if (sa->rxq_info[sw_index].rxq != NULL)
 836                         sfc_rx_qfini(sa, sw_index);
 837         }
 838
 839         rte_free(sa->rxq_info);
 840         sa->rxq_info = NULL;
 841         sa->rxq_count = 0;
 842 }