drivers/net/sfc/sfc_rx.c

   1 /*-
   2  * Copyright (c) 2016 Solarflare Communications Inc.
   3  * All rights reserved.
   4  *
   5  * This software was jointly developed between OKTET Labs (under contract
   6  * for Solarflare) and Solarflare Communications, Inc.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright notice,
  12  *    this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright notice,
  14  *    this list of conditions and the following disclaimer in the documentation
  15  *    and/or other materials provided with the distribution.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  18  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  19  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  20  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  21  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  22  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  23  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  24  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  25  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  26  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  27  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  */
  29
  30 #include <rte_mempool.h>
  31
  32 #include "efx.h"
  33
  34 #include "sfc.h"
  35 #include "sfc_debug.h"
  36 #include "sfc_log.h"
  37 #include "sfc_ev.h"
  38 #include "sfc_rx.h"
  39 #include "sfc_tweak.h"
  40
  41 /*
  42  * Maximum number of Rx queue flush attempt in the case of failure or
  43  * flush timeout
  44  */
  45 #define SFC_RX_QFLUSH_ATTEMPTS          (3)
  46
  47 /*
  48  * Time to wait between event queue polling attempts when waiting for Rx
  49  * queue flush done or failed events.
  50  */
  51 #define SFC_RX_QFLUSH_POLL_WAIT_MS      (1)
  52
  53 /*
  54  * Maximum number of event queue polling attempts when waiting for Rx queue
  55  * flush done or failed events. It defines Rx queue flush attempt timeout
  56  * together with SFC_RX_QFLUSH_POLL_WAIT_MS.
  57  */
  58 #define SFC_RX_QFLUSH_POLL_ATTEMPTS     (2000)
  59
  60 void
  61 sfc_rx_qflush_done(struct sfc_rxq *rxq)
  62 {
  63         rxq->state |= SFC_RXQ_FLUSHED;
  64         rxq->state &= ~SFC_RXQ_FLUSHING;
  65 }
  66
  67 void
  68 sfc_rx_qflush_failed(struct sfc_rxq *rxq)
  69 {
  70         rxq->state |= SFC_RXQ_FLUSH_FAILED;
  71         rxq->state &= ~SFC_RXQ_FLUSHING;
  72 }
  73
  74 static void
  75 sfc_rx_qrefill(struct sfc_rxq *rxq)
  76 {
  77         unsigned int free_space;
  78         unsigned int bulks;
  79         void *objs[SFC_RX_REFILL_BULK];
  80         efsys_dma_addr_t addr[RTE_DIM(objs)];
  81         unsigned int added = rxq->added;
  82         unsigned int id;
  83         unsigned int i;
  84         struct sfc_rx_sw_desc *rxd;
  85         struct rte_mbuf *m;
  86         uint8_t port_id = rxq->port_id;
  87
  88         free_space = EFX_RXQ_LIMIT(rxq->ptr_mask + 1) -
  89                 (added - rxq->completed);
  90
  91         if (free_space < rxq->refill_threshold)
  92                 return;
  93
  94         bulks = free_space / RTE_DIM(objs);
  95
  96         id = added & rxq->ptr_mask;
  97         while (bulks-- > 0) {
  98                 if (rte_mempool_get_bulk(rxq->refill_mb_pool, objs,
  99                                          RTE_DIM(objs)) < 0) {
 100                         /*
 101                          * It is hardly a safe way to increment counter
 102                          * from different contexts, but all PMDs do it.
 103                          */
 104                         rxq->evq->sa->eth_dev->data->rx_mbuf_alloc_failed +=
 105                                 RTE_DIM(objs);
 106                         break;
 107                 }
 108
 109                 for (i = 0; i < RTE_DIM(objs);
 110                      ++i, id = (id + 1) & rxq->ptr_mask) {
 111                         m = objs[i];
 112
 113                         rxd = &rxq->sw_desc[id];
 114                         rxd->mbuf = m;
 115
 116                         rte_mbuf_refcnt_set(m, 1);
 117                         m->data_off = RTE_PKTMBUF_HEADROOM;
 118                         m->next = NULL;
 119                         m->nb_segs = 1;
 120                         m->port = port_id;
 121
 122                         addr[i] = rte_pktmbuf_mtophys(m);
 123                 }
 124
 125                 efx_rx_qpost(rxq->common, addr, rxq->buf_size,
 126                              RTE_DIM(objs), rxq->completed, added);
 127                 added += RTE_DIM(objs);
 128         }
 129
 130         /* Push doorbell if something is posted */
 131         if (rxq->added != added) {
 132                 rxq->added = added;
 133                 efx_rx_qpush(rxq->common, added, &rxq->pushed);
 134         }
 135 }
 136
 137 static uint64_t
 138 sfc_rx_desc_flags_to_offload_flags(const unsigned int desc_flags)
 139 {
 140         uint64_t mbuf_flags = 0;
 141
 142         switch (desc_flags & (EFX_PKT_IPV4 | EFX_CKSUM_IPV4)) {
 143         case (EFX_PKT_IPV4 | EFX_CKSUM_IPV4):
 144                 mbuf_flags |= PKT_RX_IP_CKSUM_GOOD;
 145                 break;
 146         case EFX_PKT_IPV4:
 147                 mbuf_flags |= PKT_RX_IP_CKSUM_BAD;
 148                 break;
 149         default:
 150                 RTE_BUILD_BUG_ON(PKT_RX_IP_CKSUM_UNKNOWN != 0);
 151                 SFC_ASSERT((mbuf_flags & PKT_RX_IP_CKSUM_MASK) ==
 152                            PKT_RX_IP_CKSUM_UNKNOWN);
 153                 break;
 154         }
 155
 156         switch ((desc_flags &
 157                  (EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP))) {
 158         case (EFX_PKT_TCP | EFX_CKSUM_TCPUDP):
 159         case (EFX_PKT_UDP | EFX_CKSUM_TCPUDP):
 160                 mbuf_flags |= PKT_RX_L4_CKSUM_GOOD;
 161                 break;
 162         case EFX_PKT_TCP:
 163         case EFX_PKT_UDP:
 164                 mbuf_flags |= PKT_RX_L4_CKSUM_BAD;
 165                 break;
 166         default:
 167                 RTE_BUILD_BUG_ON(PKT_RX_L4_CKSUM_UNKNOWN != 0);
 168                 SFC_ASSERT((mbuf_flags & PKT_RX_L4_CKSUM_MASK) ==
 169                            PKT_RX_L4_CKSUM_UNKNOWN);
 170                 break;
 171         }
 172
 173         return mbuf_flags;
 174 }
 175
 176 static uint32_t
 177 sfc_rx_desc_flags_to_packet_type(const unsigned int desc_flags)
 178 {
 179         return RTE_PTYPE_L2_ETHER |
 180                 ((desc_flags & EFX_PKT_IPV4) ?
 181                         RTE_PTYPE_L3_IPV4_EXT_UNKNOWN : 0) |
 182                 ((desc_flags & EFX_PKT_IPV6) ?
 183                         RTE_PTYPE_L3_IPV6_EXT_UNKNOWN : 0) |
 184                 ((desc_flags & EFX_PKT_TCP) ? RTE_PTYPE_L4_TCP : 0) |
 185                 ((desc_flags & EFX_PKT_UDP) ? RTE_PTYPE_L4_UDP : 0);
 186 }
 187
 188 uint16_t
 189 sfc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
 190 {
 191         struct sfc_rxq *rxq = rx_queue;
 192         unsigned int completed;
 193         unsigned int prefix_size = rxq->prefix_size;
 194         unsigned int done_pkts = 0;
 195         boolean_t discard_next = B_FALSE;
 196         struct rte_mbuf *scatter_pkt = NULL;
 197
 198         if (unlikely((rxq->state & SFC_RXQ_RUNNING) == 0))
 199                 return 0;
 200
 201         sfc_ev_qpoll(rxq->evq);
 202
 203         completed = rxq->completed;
 204         while (completed != rxq->pending && done_pkts < nb_pkts) {
 205                 unsigned int id;
 206                 struct sfc_rx_sw_desc *rxd;
 207                 struct rte_mbuf *m;
 208                 unsigned int seg_len;
 209                 unsigned int desc_flags;
 210
 211                 id = completed++ & rxq->ptr_mask;
 212                 rxd = &rxq->sw_desc[id];
 213                 m = rxd->mbuf;
 214                 desc_flags = rxd->flags;
 215
 216                 if (discard_next)
 217                         goto discard;
 218
 219                 if (desc_flags & (EFX_ADDR_MISMATCH | EFX_DISCARD))
 220                         goto discard;
 221
 222                 if (desc_flags & EFX_PKT_PREFIX_LEN) {
 223                         uint16_t tmp_size;
 224                         int rc __rte_unused;
 225
 226                         rc = efx_pseudo_hdr_pkt_length_get(rxq->common,
 227                                 rte_pktmbuf_mtod(m, uint8_t *), &tmp_size);
 228                         SFC_ASSERT(rc == 0);
 229                         seg_len = tmp_size;
 230                 } else {
 231                         seg_len = rxd->size - prefix_size;
 232                 }
 233
 234                 m->data_off += prefix_size;
 235                 rte_pktmbuf_data_len(m) = seg_len;
 236                 rte_pktmbuf_pkt_len(m) = seg_len;
 237
 238                 if (scatter_pkt != NULL) {
 239                         if (rte_pktmbuf_chain(scatter_pkt, m) != 0) {
 240                                 rte_mempool_put(rxq->refill_mb_pool,
 241                                                 scatter_pkt);
 242                                 goto discard;
 243                         }
 244                         /* The packet to deliver */
 245                         m = scatter_pkt;
 246                 }
 247
 248                 if (desc_flags & EFX_PKT_CONT) {
 249                         /* The packet is scattered, more fragments to come */
 250                         scatter_pkt = m;
 251                         /* Futher fragments have no prefix */
 252                         prefix_size = 0;
 253                         continue;
 254                 }
 255
 256                 /* Scattered packet is done */
 257                 scatter_pkt = NULL;
 258                 /* The first fragment of the packet has prefix */
 259                 prefix_size = rxq->prefix_size;
 260
 261                 m->ol_flags = sfc_rx_desc_flags_to_offload_flags(desc_flags);
 262                 m->packet_type = sfc_rx_desc_flags_to_packet_type(desc_flags);
 263
 264                 *rx_pkts++ = m;
 265                 done_pkts++;
 266                 continue;
 267
 268 discard:
 269                 discard_next = ((desc_flags & EFX_PKT_CONT) != 0);
 270                 rte_mempool_put(rxq->refill_mb_pool, m);
 271                 rxd->mbuf = NULL;
 272         }
 273
 274         /* pending is only moved when entire packet is received */
 275         SFC_ASSERT(scatter_pkt == NULL);
 276
 277         rxq->completed = completed;
 278
 279         sfc_rx_qrefill(rxq);
 280
 281         return done_pkts;
 282 }
 283
 284 unsigned int
 285 sfc_rx_qdesc_npending(struct sfc_adapter *sa, unsigned int sw_index)
 286 {
 287         struct sfc_rxq *rxq;
 288
 289         SFC_ASSERT(sw_index < sa->rxq_count);
 290         rxq = sa->rxq_info[sw_index].rxq;
 291
 292         if (rxq == NULL || (rxq->state & SFC_RXQ_RUNNING) == 0)
 293                 return 0;
 294
 295         sfc_ev_qpoll(rxq->evq);
 296
 297         return rxq->pending - rxq->completed;
 298 }
 299
 300 int
 301 sfc_rx_qdesc_done(struct sfc_rxq *rxq, unsigned int offset)
 302 {
 303         if ((rxq->state & SFC_RXQ_RUNNING) == 0)
 304                 return 0;
 305
 306         sfc_ev_qpoll(rxq->evq);
 307
 308         return offset < (rxq->pending - rxq->completed);
 309 }
 310
 311 static void
 312 sfc_rx_qpurge(struct sfc_rxq *rxq)
 313 {
 314         unsigned int i;
 315         struct sfc_rx_sw_desc *rxd;
 316
 317         for (i = rxq->completed; i != rxq->added; ++i) {
 318                 rxd = &rxq->sw_desc[i & rxq->ptr_mask];
 319                 rte_mempool_put(rxq->refill_mb_pool, rxd->mbuf);
 320                 rxd->mbuf = NULL;
 321         }
 322 }
 323
 324 static void
 325 sfc_rx_qflush(struct sfc_adapter *sa, unsigned int sw_index)
 326 {
 327         struct sfc_rxq *rxq;
 328         unsigned int retry_count;
 329         unsigned int wait_count;
 330
 331         rxq = sa->rxq_info[sw_index].rxq;
 332         SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
 333
 334         /*
 335          * Retry Rx queue flushing in the case of flush failed or
 336          * timeout. In the worst case it can delay for 6 seconds.
 337          */
 338         for (retry_count = 0;
 339              ((rxq->state & SFC_RXQ_FLUSHED) == 0) &&
 340              (retry_count < SFC_RX_QFLUSH_ATTEMPTS);
 341              ++retry_count) {
 342                 if (efx_rx_qflush(rxq->common) != 0) {
 343                         rxq->state |= SFC_RXQ_FLUSH_FAILED;
 344                         break;
 345                 }
 346                 rxq->state &= ~SFC_RXQ_FLUSH_FAILED;
 347                 rxq->state |= SFC_RXQ_FLUSHING;
 348
 349                 /*
 350                  * Wait for Rx queue flush done or failed event at least
 351                  * SFC_RX_QFLUSH_POLL_WAIT_MS milliseconds and not more
 352                  * than 2 seconds (SFC_RX_QFLUSH_POLL_WAIT_MS multiplied
 353                  * by SFC_RX_QFLUSH_POLL_ATTEMPTS).
 354                  */
 355                 wait_count = 0;
 356                 do {
 357                         rte_delay_ms(SFC_RX_QFLUSH_POLL_WAIT_MS);
 358                         sfc_ev_qpoll(rxq->evq);
 359                 } while ((rxq->state & SFC_RXQ_FLUSHING) &&
 360                          (wait_count++ < SFC_RX_QFLUSH_POLL_ATTEMPTS));
 361
 362                 if (rxq->state & SFC_RXQ_FLUSHING)
 363                         sfc_err(sa, "RxQ %u flush timed out", sw_index);
 364
 365                 if (rxq->state & SFC_RXQ_FLUSH_FAILED)
 366                         sfc_err(sa, "RxQ %u flush failed", sw_index);
 367
 368                 if (rxq->state & SFC_RXQ_FLUSHED)
 369                         sfc_info(sa, "RxQ %u flushed", sw_index);
 370         }
 371
 372         sfc_rx_qpurge(rxq);
 373 }
 374
 375 int
 376 sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
 377 {
 378         struct sfc_rxq_info *rxq_info;
 379         struct sfc_rxq *rxq;
 380         struct sfc_evq *evq;
 381         int rc;
 382
 383         sfc_log_init(sa, "sw_index=%u", sw_index);
 384
 385         SFC_ASSERT(sw_index < sa->rxq_count);
 386
 387         rxq_info = &sa->rxq_info[sw_index];
 388         rxq = rxq_info->rxq;
 389         SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
 390
 391         evq = rxq->evq;
 392
 393         rc = sfc_ev_qstart(sa, evq->evq_index);
 394         if (rc != 0)
 395                 goto fail_ev_qstart;
 396
 397         rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
 398                             &rxq->mem, rxq_info->entries,
 399                             0 /* not used on EF10 */, evq->common,
 400                             &rxq->common);
 401         if (rc != 0)
 402                 goto fail_rx_qcreate;
 403
 404         efx_rx_qenable(rxq->common);
 405
 406         rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
 407
 408         rxq->state |= (SFC_RXQ_STARTED | SFC_RXQ_RUNNING);
 409
 410         sfc_rx_qrefill(rxq);
 411
 412         if (sw_index == 0) {
 413                 rc = efx_mac_filter_default_rxq_set(sa->nic, rxq->common,
 414                                                     (sa->rss_channels > 1) ?
 415                                                     B_TRUE : B_FALSE);
 416                 if (rc != 0)
 417                         goto fail_mac_filter_default_rxq_set;
 418         }
 419
 420         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
 421         sa->eth_dev->data->rx_queue_state[sw_index] =
 422                 RTE_ETH_QUEUE_STATE_STARTED;
 423
 424         return 0;
 425
 426 fail_mac_filter_default_rxq_set:
 427         sfc_rx_qflush(sa, sw_index);
 428
 429 fail_rx_qcreate:
 430         sfc_ev_qstop(sa, evq->evq_index);
 431
 432 fail_ev_qstart:
 433         return rc;
 434 }
 435
 436 void
 437 sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index)
 438 {
 439         struct sfc_rxq_info *rxq_info;
 440         struct sfc_rxq *rxq;
 441
 442         sfc_log_init(sa, "sw_index=%u", sw_index);
 443
 444         SFC_ASSERT(sw_index < sa->rxq_count);
 445
 446         rxq_info = &sa->rxq_info[sw_index];
 447         rxq = rxq_info->rxq;
 448
 449         if (rxq->state == SFC_RXQ_INITIALIZED)
 450                 return;
 451         SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
 452
 453         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
 454         sa->eth_dev->data->rx_queue_state[sw_index] =
 455                 RTE_ETH_QUEUE_STATE_STOPPED;
 456
 457         rxq->state &= ~SFC_RXQ_RUNNING;
 458
 459         if (sw_index == 0)
 460                 efx_mac_filter_default_rxq_clear(sa->nic);
 461
 462         sfc_rx_qflush(sa, sw_index);
 463
 464         rxq->state = SFC_RXQ_INITIALIZED;
 465
 466         efx_rx_qdestroy(rxq->common);
 467
 468         sfc_ev_qstop(sa, rxq->evq->evq_index);
 469 }
 470
 471 static int
 472 sfc_rx_qcheck_conf(struct sfc_adapter *sa, uint16_t nb_rx_desc,
 473                    const struct rte_eth_rxconf *rx_conf)
 474 {
 475         const uint16_t rx_free_thresh_max = EFX_RXQ_LIMIT(nb_rx_desc);
 476         int rc = 0;
 477
 478         if (rx_conf->rx_thresh.pthresh != 0 ||
 479             rx_conf->rx_thresh.hthresh != 0 ||
 480             rx_conf->rx_thresh.wthresh != 0) {
 481                 sfc_err(sa,
 482                         "RxQ prefetch/host/writeback thresholds are not supported");
 483                 rc = EINVAL;
 484         }
 485
 486         if (rx_conf->rx_free_thresh > rx_free_thresh_max) {
 487                 sfc_err(sa,
 488                         "RxQ free threshold too large: %u vs maximum %u",
 489                         rx_conf->rx_free_thresh, rx_free_thresh_max);
 490                 rc = EINVAL;
 491         }
 492
 493         if (rx_conf->rx_drop_en == 0) {
 494                 sfc_err(sa, "RxQ drop disable is not supported");
 495                 rc = EINVAL;
 496         }
 497
 498         return rc;
 499 }
 500
 501 static unsigned int
 502 sfc_rx_mbuf_data_alignment(struct rte_mempool *mb_pool)
 503 {
 504         uint32_t data_off;
 505         uint32_t order;
 506
 507         /* The mbuf object itself is always cache line aligned */
 508         order = rte_bsf32(RTE_CACHE_LINE_SIZE);
 509
 510         /* Data offset from mbuf object start */
 511         data_off = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mb_pool) +
 512                 RTE_PKTMBUF_HEADROOM;
 513
 514         order = MIN(order, rte_bsf32(data_off));
 515
 516         return 1u << (order - 1);
 517 }
 518
 519 static uint16_t
 520 sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool)
 521 {
 522         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
 523         const uint32_t nic_align_start = MAX(1, encp->enc_rx_buf_align_start);
 524         const uint32_t nic_align_end = MAX(1, encp->enc_rx_buf_align_end);
 525         uint16_t buf_size;
 526         unsigned int buf_aligned;
 527         unsigned int start_alignment;
 528         unsigned int end_padding_alignment;
 529
 530         /* Below it is assumed that both alignments are power of 2 */
 531         SFC_ASSERT(rte_is_power_of_2(nic_align_start));
 532         SFC_ASSERT(rte_is_power_of_2(nic_align_end));
 533
 534         /*
 535          * mbuf is always cache line aligned, double-check
 536          * that it meets rx buffer start alignment requirements.
 537          */
 538
 539         /* Start from mbuf pool data room size */
 540         buf_size = rte_pktmbuf_data_room_size(mb_pool);
 541
 542         /* Remove headroom */
 543         if (buf_size <= RTE_PKTMBUF_HEADROOM) {
 544                 sfc_err(sa,
 545                         "RxQ mbuf pool %s object data room size %u is smaller than headroom %u",
 546                         mb_pool->name, buf_size, RTE_PKTMBUF_HEADROOM);
 547                 return 0;
 548         }
 549         buf_size -= RTE_PKTMBUF_HEADROOM;
 550
 551         /* Calculate guaranteed data start alignment */
 552         buf_aligned = sfc_rx_mbuf_data_alignment(mb_pool);
 553
 554         /* Reserve space for start alignment */
 555         if (buf_aligned < nic_align_start) {
 556                 start_alignment = nic_align_start - buf_aligned;
 557                 if (buf_size <= start_alignment) {
 558                         sfc_err(sa,
 559                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u and buffer start alignment %u required by NIC",
 560                                 mb_pool->name,
 561                                 rte_pktmbuf_data_room_size(mb_pool),
 562                                 RTE_PKTMBUF_HEADROOM, start_alignment);
 563                         return 0;
 564                 }
 565                 buf_aligned = nic_align_start;
 566                 buf_size -= start_alignment;
 567         } else {
 568                 start_alignment = 0;
 569         }
 570
 571         /* Make sure that end padding does not write beyond the buffer */
 572         if (buf_aligned < nic_align_end) {
 573                 /*
 574                  * Estimate space which can be lost. If guarnteed buffer
 575                  * size is odd, lost space is (nic_align_end - 1). More
 576                  * accurate formula is below.
 577                  */
 578                 end_padding_alignment = nic_align_end -
 579                         MIN(buf_aligned, 1u << (rte_bsf32(buf_size) - 1));
 580                 if (buf_size <= end_padding_alignment) {
 581                         sfc_err(sa,
 582                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u, buffer start alignment %u and end padding alignment %u required by NIC",
 583                                 mb_pool->name,
 584                                 rte_pktmbuf_data_room_size(mb_pool),
 585                                 RTE_PKTMBUF_HEADROOM, start_alignment,
 586                                 end_padding_alignment);
 587                         return 0;
 588                 }
 589                 buf_size -= end_padding_alignment;
 590         } else {
 591                 /*
 592                  * Start is aligned the same or better than end,
 593                  * just align length.
 594                  */
 595                 buf_size = P2ALIGN(buf_size, nic_align_end);
 596         }
 597
 598         return buf_size;
 599 }
 600
 601 int
 602 sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
 603              uint16_t nb_rx_desc, unsigned int socket_id,
 604              const struct rte_eth_rxconf *rx_conf,
 605              struct rte_mempool *mb_pool)
 606 {
 607         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
 608         int rc;
 609         uint16_t buf_size;
 610         struct sfc_rxq_info *rxq_info;
 611         unsigned int evq_index;
 612         struct sfc_evq *evq;
 613         struct sfc_rxq *rxq;
 614
 615         rc = sfc_rx_qcheck_conf(sa, nb_rx_desc, rx_conf);
 616         if (rc != 0)
 617                 goto fail_bad_conf;
 618
 619         buf_size = sfc_rx_mb_pool_buf_size(sa, mb_pool);
 620         if (buf_size == 0) {
 621                 sfc_err(sa, "RxQ %u mbuf pool object size is too small",
 622                         sw_index);
 623                 rc = EINVAL;
 624                 goto fail_bad_conf;
 625         }
 626
 627         if ((buf_size < sa->port.pdu + encp->enc_rx_prefix_size) &&
 628             !sa->eth_dev->data->dev_conf.rxmode.enable_scatter) {
 629                 sfc_err(sa, "Rx scatter is disabled and RxQ %u mbuf pool "
 630                         "object size is too small", sw_index);
 631                 sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
 632                         "PDU size %u plus Rx prefix %u bytes",
 633                         sw_index, buf_size, (unsigned int)sa->port.pdu,
 634                         encp->enc_rx_prefix_size);
 635                 rc = EINVAL;
 636                 goto fail_bad_conf;
 637         }
 638
 639         SFC_ASSERT(sw_index < sa->rxq_count);
 640         rxq_info = &sa->rxq_info[sw_index];
 641
 642         SFC_ASSERT(nb_rx_desc <= rxq_info->max_entries);
 643         rxq_info->entries = nb_rx_desc;
 644         rxq_info->type =
 645                 sa->eth_dev->data->dev_conf.rxmode.enable_scatter ?
 646                 EFX_RXQ_TYPE_SCATTER : EFX_RXQ_TYPE_DEFAULT;
 647
 648         evq_index = sfc_evq_index_by_rxq_sw_index(sa, sw_index);
 649
 650         rc = sfc_ev_qinit(sa, evq_index, rxq_info->entries, socket_id);
 651         if (rc != 0)
 652                 goto fail_ev_qinit;
 653
 654         evq = sa->evq_info[evq_index].evq;
 655
 656         rc = ENOMEM;
 657         rxq = rte_zmalloc_socket("sfc-rxq", sizeof(*rxq), RTE_CACHE_LINE_SIZE,
 658                                  socket_id);
 659         if (rxq == NULL)
 660                 goto fail_rxq_alloc;
 661
 662         rc = sfc_dma_alloc(sa, "rxq", sw_index, EFX_RXQ_SIZE(rxq_info->entries),
 663                            socket_id, &rxq->mem);
 664         if (rc != 0)
 665                 goto fail_dma_alloc;
 666
 667         rc = ENOMEM;
 668         rxq->sw_desc = rte_calloc_socket("sfc-rxq-sw_desc", rxq_info->entries,
 669                                          sizeof(*rxq->sw_desc),
 670                                          RTE_CACHE_LINE_SIZE, socket_id);
 671         if (rxq->sw_desc == NULL)
 672                 goto fail_desc_alloc;
 673
 674         evq->rxq = rxq;
 675         rxq->evq = evq;
 676         rxq->ptr_mask = rxq_info->entries - 1;
 677         rxq->refill_threshold = rx_conf->rx_free_thresh;
 678         rxq->refill_mb_pool = mb_pool;
 679         rxq->buf_size = buf_size;
 680         rxq->hw_index = sw_index;
 681         rxq->port_id = sa->eth_dev->data->port_id;
 682
 683         /* Cache limits required on datapath in RxQ structure */
 684         rxq->batch_max = encp->enc_rx_batch_max;
 685         rxq->prefix_size = encp->enc_rx_prefix_size;
 686
 687 #if EFSYS_OPT_RX_SCALE
 688         if (sa->hash_support == EFX_RX_HASH_AVAILABLE)
 689                 rxq->flags |= SFC_RXQ_RSS_HASH;
 690 #endif
 691
 692         rxq->state = SFC_RXQ_INITIALIZED;
 693
 694         rxq_info->rxq = rxq;
 695         rxq_info->deferred_start = (rx_conf->rx_deferred_start != 0);
 696
 697         return 0;
 698
 699 fail_desc_alloc:
 700         sfc_dma_free(sa, &rxq->mem);
 701
 702 fail_dma_alloc:
 703         rte_free(rxq);
 704
 705 fail_rxq_alloc:
 706         sfc_ev_qfini(sa, evq_index);
 707
 708 fail_ev_qinit:
 709         rxq_info->entries = 0;
 710
 711 fail_bad_conf:
 712         sfc_log_init(sa, "failed %d", rc);
 713         return rc;
 714 }
 715
 716 void
 717 sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
 718 {
 719         struct sfc_rxq_info *rxq_info;
 720         struct sfc_rxq *rxq;
 721
 722         SFC_ASSERT(sw_index < sa->rxq_count);
 723
 724         rxq_info = &sa->rxq_info[sw_index];
 725
 726         rxq = rxq_info->rxq;
 727         SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
 728
 729         rxq_info->rxq = NULL;
 730         rxq_info->entries = 0;
 731
 732         rte_free(rxq->sw_desc);
 733         sfc_dma_free(sa, &rxq->mem);
 734         rte_free(rxq);
 735 }
 736
 737 #if EFSYS_OPT_RX_SCALE
 738 efx_rx_hash_type_t
 739 sfc_rte_to_efx_hash_type(uint64_t rss_hf)
 740 {
 741         efx_rx_hash_type_t efx_hash_types = 0;
 742
 743         if ((rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 744                        ETH_RSS_NONFRAG_IPV4_OTHER)) != 0)
 745                 efx_hash_types |= EFX_RX_HASH_IPV4;
 746
 747         if ((rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) != 0)
 748                 efx_hash_types |= EFX_RX_HASH_TCPIPV4;
 749
 750         if ((rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 751                         ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX)) != 0)
 752                 efx_hash_types |= EFX_RX_HASH_IPV6;
 753
 754         if ((rss_hf & (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX)) != 0)
 755                 efx_hash_types |= EFX_RX_HASH_TCPIPV6;
 756
 757         return efx_hash_types;
 758 }
 759 #endif
 760
 761 static int
 762 sfc_rx_rss_config(struct sfc_adapter *sa)
 763 {
 764         int rc = 0;
 765
 766 #if EFSYS_OPT_RX_SCALE
 767         if (sa->rss_channels > 1) {
 768                 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
 769                                            sa->rss_hash_types, B_TRUE);
 770                 if (rc != 0)
 771                         goto finish;
 772
 773                 rc = efx_rx_scale_key_set(sa->nic, sa->rss_key,
 774                                           sizeof(sa->rss_key));
 775                 if (rc != 0)
 776                         goto finish;
 777
 778                 rc = efx_rx_scale_tbl_set(sa->nic, sa->rss_tbl,
 779                                           sizeof(sa->rss_tbl));
 780         }
 781
 782 finish:
 783 #endif
 784         return rc;
 785 }
 786
 787 int
 788 sfc_rx_start(struct sfc_adapter *sa)
 789 {
 790         unsigned int sw_index;
 791         int rc;
 792
 793         sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
 794
 795         rc = efx_rx_init(sa->nic);
 796         if (rc != 0)
 797                 goto fail_rx_init;
 798
 799         rc = sfc_rx_rss_config(sa);
 800         if (rc != 0)
 801                 goto fail_rss_config;
 802
 803         for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
 804                 if ((!sa->rxq_info[sw_index].deferred_start ||
 805                      sa->rxq_info[sw_index].deferred_started)) {
 806                         rc = sfc_rx_qstart(sa, sw_index);
 807                         if (rc != 0)
 808                                 goto fail_rx_qstart;
 809                 }
 810         }
 811
 812         return 0;
 813
 814 fail_rx_qstart:
 815         while (sw_index-- > 0)
 816                 sfc_rx_qstop(sa, sw_index);
 817
 818 fail_rss_config:
 819         efx_rx_fini(sa->nic);
 820
 821 fail_rx_init:
 822         sfc_log_init(sa, "failed %d", rc);
 823         return rc;
 824 }
 825
 826 void
 827 sfc_rx_stop(struct sfc_adapter *sa)
 828 {
 829         unsigned int sw_index;
 830
 831         sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
 832
 833         sw_index = sa->rxq_count;
 834         while (sw_index-- > 0) {
 835                 if (sa->rxq_info[sw_index].rxq != NULL)
 836                         sfc_rx_qstop(sa, sw_index);
 837         }
 838
 839         efx_rx_fini(sa->nic);
 840 }
 841
 842 static int
 843 sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
 844 {
 845         struct sfc_rxq_info *rxq_info = &sa->rxq_info[sw_index];
 846         unsigned int max_entries;
 847
 848         max_entries = EFX_RXQ_MAXNDESCS;
 849         SFC_ASSERT(rte_is_power_of_2(max_entries));
 850
 851         rxq_info->max_entries = max_entries;
 852
 853         return 0;
 854 }
 855
 856 static int
 857 sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode)
 858 {
 859         int rc = 0;
 860
 861         switch (rxmode->mq_mode) {
 862         case ETH_MQ_RX_NONE:
 863                 /* No special checks are required */
 864                 break;
 865 #if EFSYS_OPT_RX_SCALE
 866         case ETH_MQ_RX_RSS:
 867                 if (sa->rss_support == EFX_RX_SCALE_UNAVAILABLE) {
 868                         sfc_err(sa, "RSS is not available");
 869                         rc = EINVAL;
 870                 }
 871                 break;
 872 #endif
 873         default:
 874                 sfc_err(sa, "Rx multi-queue mode %u not supported",
 875                         rxmode->mq_mode);
 876                 rc = EINVAL;
 877         }
 878
 879         if (rxmode->header_split) {
 880                 sfc_err(sa, "Header split on Rx not supported");
 881                 rc = EINVAL;
 882         }
 883
 884         if (rxmode->hw_vlan_filter) {
 885                 sfc_err(sa, "HW VLAN filtering not supported");
 886                 rc = EINVAL;
 887         }
 888
 889         if (rxmode->hw_vlan_strip) {
 890                 sfc_err(sa, "HW VLAN stripping not supported");
 891                 rc = EINVAL;
 892         }
 893
 894         if (rxmode->hw_vlan_extend) {
 895                 sfc_err(sa,
 896                         "Q-in-Q HW VLAN stripping not supported");
 897                 rc = EINVAL;
 898         }
 899
 900         if (!rxmode->hw_strip_crc) {
 901                 sfc_warn(sa,
 902                          "FCS stripping control not supported - always stripped");
 903                 rxmode->hw_strip_crc = 1;
 904         }
 905
 906         if (rxmode->enable_lro) {
 907                 sfc_err(sa, "LRO not supported");
 908                 rc = EINVAL;
 909         }
 910
 911         return rc;
 912 }
 913
 914 /**
 915  * Initialize Rx subsystem.
 916  *
 917  * Called at device configuration stage when number of receive queues is
 918  * specified together with other device level receive configuration.
 919  *
 920  * It should be used to allocate NUMA-unaware resources.
 921  */
 922 int
 923 sfc_rx_init(struct sfc_adapter *sa)
 924 {
 925         struct rte_eth_conf *dev_conf = &sa->eth_dev->data->dev_conf;
 926         unsigned int sw_index;
 927         int rc;
 928
 929         rc = sfc_rx_check_mode(sa, &dev_conf->rxmode);
 930         if (rc != 0)
 931                 goto fail_check_mode;
 932
 933         sa->rxq_count = sa->eth_dev->data->nb_rx_queues;
 934
 935         rc = ENOMEM;
 936         sa->rxq_info = rte_calloc_socket("sfc-rxqs", sa->rxq_count,
 937                                          sizeof(struct sfc_rxq_info), 0,
 938                                          sa->socket_id);
 939         if (sa->rxq_info == NULL)
 940                 goto fail_rxqs_alloc;
 941
 942         for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
 943                 rc = sfc_rx_qinit_info(sa, sw_index);
 944                 if (rc != 0)
 945                         goto fail_rx_qinit_info;
 946         }
 947
 948 #if EFSYS_OPT_RX_SCALE
 949         sa->rss_channels = (dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) ?
 950                            MIN(sa->rxq_count, EFX_MAXRSS) : 1;
 951
 952         if (sa->rss_channels > 1) {
 953                 for (sw_index = 0; sw_index < EFX_RSS_TBL_SIZE; ++sw_index)
 954                         sa->rss_tbl[sw_index] = sw_index % sa->rss_channels;
 955         }
 956 #endif
 957
 958         return 0;
 959
 960 fail_rx_qinit_info:
 961         rte_free(sa->rxq_info);
 962         sa->rxq_info = NULL;
 963
 964 fail_rxqs_alloc:
 965         sa->rxq_count = 0;
 966 fail_check_mode:
 967         sfc_log_init(sa, "failed %d", rc);
 968         return rc;
 969 }
 970
 971 /**
 972  * Shutdown Rx subsystem.
 973  *
 974  * Called at device close stage, for example, before device
 975  * reconfiguration or shutdown.
 976  */
 977 void
 978 sfc_rx_fini(struct sfc_adapter *sa)
 979 {
 980         unsigned int sw_index;
 981
 982         sw_index = sa->rxq_count;
 983         while (sw_index-- > 0) {
 984                 if (sa->rxq_info[sw_index].rxq != NULL)
 985                         sfc_rx_qfini(sa, sw_index);
 986         }
 987
 988         rte_free(sa->rxq_info);
 989         sa->rxq_info = NULL;
 990         sa->rxq_count = 0;
 991 }