net/sfc: do not use Rx queue control state on datapath
[dpdk.git] / drivers / net / sfc / sfc_rx.c
1 /*-
2  *   BSD LICENSE
3  *
4  * Copyright (c) 2016-2017 Solarflare Communications Inc.
5  * All rights reserved.
6  *
7  * This software was jointly developed between OKTET Labs (under contract
8  * for Solarflare) and Solarflare Communications, Inc.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions are met:
12  *
13  * 1. Redistributions of source code must retain the above copyright notice,
14  *    this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright notice,
16  *    this list of conditions and the following disclaimer in the documentation
17  *    and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31
32 #include <rte_mempool.h>
33
34 #include "efx.h"
35
36 #include "sfc.h"
37 #include "sfc_debug.h"
38 #include "sfc_log.h"
39 #include "sfc_ev.h"
40 #include "sfc_rx.h"
41 #include "sfc_tweak.h"
42
43 /*
44  * Maximum number of Rx queue flush attempt in the case of failure or
45  * flush timeout
46  */
47 #define SFC_RX_QFLUSH_ATTEMPTS          (3)
48
49 /*
50  * Time to wait between event queue polling attempts when waiting for Rx
51  * queue flush done or failed events.
52  */
53 #define SFC_RX_QFLUSH_POLL_WAIT_MS      (1)
54
55 /*
56  * Maximum number of event queue polling attempts when waiting for Rx queue
57  * flush done or failed events. It defines Rx queue flush attempt timeout
58  * together with SFC_RX_QFLUSH_POLL_WAIT_MS.
59  */
60 #define SFC_RX_QFLUSH_POLL_ATTEMPTS     (2000)
61
62 void
63 sfc_rx_qflush_done(struct sfc_rxq *rxq)
64 {
65         rxq->state |= SFC_RXQ_FLUSHED;
66         rxq->state &= ~SFC_RXQ_FLUSHING;
67 }
68
69 void
70 sfc_rx_qflush_failed(struct sfc_rxq *rxq)
71 {
72         rxq->state |= SFC_RXQ_FLUSH_FAILED;
73         rxq->state &= ~SFC_RXQ_FLUSHING;
74 }
75
76 static void
77 sfc_rx_qrefill(struct sfc_rxq *rxq)
78 {
79         unsigned int free_space;
80         unsigned int bulks;
81         void *objs[SFC_RX_REFILL_BULK];
82         efsys_dma_addr_t addr[RTE_DIM(objs)];
83         unsigned int added = rxq->added;
84         unsigned int id;
85         unsigned int i;
86         struct sfc_rx_sw_desc *rxd;
87         struct rte_mbuf *m;
88         uint8_t port_id = rxq->port_id;
89
90         free_space = EFX_RXQ_LIMIT(rxq->ptr_mask + 1) -
91                 (added - rxq->completed);
92
93         if (free_space < rxq->refill_threshold)
94                 return;
95
96         bulks = free_space / RTE_DIM(objs);
97
98         id = added & rxq->ptr_mask;
99         while (bulks-- > 0) {
100                 if (rte_mempool_get_bulk(rxq->refill_mb_pool, objs,
101                                          RTE_DIM(objs)) < 0) {
102                         /*
103                          * It is hardly a safe way to increment counter
104                          * from different contexts, but all PMDs do it.
105                          */
106                         rxq->evq->sa->eth_dev->data->rx_mbuf_alloc_failed +=
107                                 RTE_DIM(objs);
108                         break;
109                 }
110
111                 for (i = 0; i < RTE_DIM(objs);
112                      ++i, id = (id + 1) & rxq->ptr_mask) {
113                         m = objs[i];
114
115                         rxd = &rxq->sw_desc[id];
116                         rxd->mbuf = m;
117
118                         rte_mbuf_refcnt_set(m, 1);
119                         m->data_off = RTE_PKTMBUF_HEADROOM;
120                         m->next = NULL;
121                         m->nb_segs = 1;
122                         m->port = port_id;
123
124                         addr[i] = rte_pktmbuf_mtophys(m);
125                 }
126
127                 efx_rx_qpost(rxq->common, addr, rxq->buf_size,
128                              RTE_DIM(objs), rxq->completed, added);
129                 added += RTE_DIM(objs);
130         }
131
132         /* Push doorbell if something is posted */
133         if (rxq->added != added) {
134                 rxq->added = added;
135                 efx_rx_qpush(rxq->common, added, &rxq->pushed);
136         }
137 }
138
139 static uint64_t
140 sfc_rx_desc_flags_to_offload_flags(const unsigned int desc_flags)
141 {
142         uint64_t mbuf_flags = 0;
143
144         switch (desc_flags & (EFX_PKT_IPV4 | EFX_CKSUM_IPV4)) {
145         case (EFX_PKT_IPV4 | EFX_CKSUM_IPV4):
146                 mbuf_flags |= PKT_RX_IP_CKSUM_GOOD;
147                 break;
148         case EFX_PKT_IPV4:
149                 mbuf_flags |= PKT_RX_IP_CKSUM_BAD;
150                 break;
151         default:
152                 RTE_BUILD_BUG_ON(PKT_RX_IP_CKSUM_UNKNOWN != 0);
153                 SFC_ASSERT((mbuf_flags & PKT_RX_IP_CKSUM_MASK) ==
154                            PKT_RX_IP_CKSUM_UNKNOWN);
155                 break;
156         }
157
158         switch ((desc_flags &
159                  (EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP))) {
160         case (EFX_PKT_TCP | EFX_CKSUM_TCPUDP):
161         case (EFX_PKT_UDP | EFX_CKSUM_TCPUDP):
162                 mbuf_flags |= PKT_RX_L4_CKSUM_GOOD;
163                 break;
164         case EFX_PKT_TCP:
165         case EFX_PKT_UDP:
166                 mbuf_flags |= PKT_RX_L4_CKSUM_BAD;
167                 break;
168         default:
169                 RTE_BUILD_BUG_ON(PKT_RX_L4_CKSUM_UNKNOWN != 0);
170                 SFC_ASSERT((mbuf_flags & PKT_RX_L4_CKSUM_MASK) ==
171                            PKT_RX_L4_CKSUM_UNKNOWN);
172                 break;
173         }
174
175         return mbuf_flags;
176 }
177
178 static uint32_t
179 sfc_rx_desc_flags_to_packet_type(const unsigned int desc_flags)
180 {
181         return RTE_PTYPE_L2_ETHER |
182                 ((desc_flags & EFX_PKT_IPV4) ?
183                         RTE_PTYPE_L3_IPV4_EXT_UNKNOWN : 0) |
184                 ((desc_flags & EFX_PKT_IPV6) ?
185                         RTE_PTYPE_L3_IPV6_EXT_UNKNOWN : 0) |
186                 ((desc_flags & EFX_PKT_TCP) ? RTE_PTYPE_L4_TCP : 0) |
187                 ((desc_flags & EFX_PKT_UDP) ? RTE_PTYPE_L4_UDP : 0);
188 }
189
190 static void
191 sfc_rx_set_rss_hash(struct sfc_rxq *rxq, unsigned int flags, struct rte_mbuf *m)
192 {
193 #if EFSYS_OPT_RX_SCALE
194         uint8_t *mbuf_data;
195
196
197         if ((rxq->flags & SFC_RXQ_FLAG_RSS_HASH) == 0)
198                 return;
199
200         mbuf_data = rte_pktmbuf_mtod(m, uint8_t *);
201
202         if (flags & (EFX_PKT_IPV4 | EFX_PKT_IPV6)) {
203                 m->hash.rss = efx_pseudo_hdr_hash_get(rxq->common,
204                                                       EFX_RX_HASHALG_TOEPLITZ,
205                                                       mbuf_data);
206
207                 m->ol_flags |= PKT_RX_RSS_HASH;
208         }
209 #endif
210 }
211
212 uint16_t
213 sfc_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
214 {
215         struct sfc_rxq *rxq = rx_queue;
216         unsigned int completed;
217         unsigned int prefix_size = rxq->prefix_size;
218         unsigned int done_pkts = 0;
219         boolean_t discard_next = B_FALSE;
220         struct rte_mbuf *scatter_pkt = NULL;
221
222         if (unlikely((rxq->flags & SFC_RXQ_FLAG_RUNNING) == 0))
223                 return 0;
224
225         sfc_ev_qpoll(rxq->evq);
226
227         completed = rxq->completed;
228         while (completed != rxq->pending && done_pkts < nb_pkts) {
229                 unsigned int id;
230                 struct sfc_rx_sw_desc *rxd;
231                 struct rte_mbuf *m;
232                 unsigned int seg_len;
233                 unsigned int desc_flags;
234
235                 id = completed++ & rxq->ptr_mask;
236                 rxd = &rxq->sw_desc[id];
237                 m = rxd->mbuf;
238                 desc_flags = rxd->flags;
239
240                 if (discard_next)
241                         goto discard;
242
243                 if (desc_flags & (EFX_ADDR_MISMATCH | EFX_DISCARD))
244                         goto discard;
245
246                 if (desc_flags & EFX_PKT_PREFIX_LEN) {
247                         uint16_t tmp_size;
248                         int rc __rte_unused;
249
250                         rc = efx_pseudo_hdr_pkt_length_get(rxq->common,
251                                 rte_pktmbuf_mtod(m, uint8_t *), &tmp_size);
252                         SFC_ASSERT(rc == 0);
253                         seg_len = tmp_size;
254                 } else {
255                         seg_len = rxd->size - prefix_size;
256                 }
257
258                 rte_pktmbuf_data_len(m) = seg_len;
259                 rte_pktmbuf_pkt_len(m) = seg_len;
260
261                 if (scatter_pkt != NULL) {
262                         if (rte_pktmbuf_chain(scatter_pkt, m) != 0) {
263                                 rte_mempool_put(rxq->refill_mb_pool,
264                                                 scatter_pkt);
265                                 goto discard;
266                         }
267                         /* The packet to deliver */
268                         m = scatter_pkt;
269                 }
270
271                 if (desc_flags & EFX_PKT_CONT) {
272                         /* The packet is scattered, more fragments to come */
273                         scatter_pkt = m;
274                         /* Futher fragments have no prefix */
275                         prefix_size = 0;
276                         continue;
277                 }
278
279                 /* Scattered packet is done */
280                 scatter_pkt = NULL;
281                 /* The first fragment of the packet has prefix */
282                 prefix_size = rxq->prefix_size;
283
284                 m->ol_flags = sfc_rx_desc_flags_to_offload_flags(desc_flags);
285                 m->packet_type = sfc_rx_desc_flags_to_packet_type(desc_flags);
286
287                 /*
288                  * Extract RSS hash from the packet prefix and
289                  * set the corresponding field (if needed and possible)
290                  */
291                 sfc_rx_set_rss_hash(rxq, desc_flags, m);
292
293                 m->data_off += prefix_size;
294
295                 *rx_pkts++ = m;
296                 done_pkts++;
297                 continue;
298
299 discard:
300                 discard_next = ((desc_flags & EFX_PKT_CONT) != 0);
301                 rte_mempool_put(rxq->refill_mb_pool, m);
302                 rxd->mbuf = NULL;
303         }
304
305         /* pending is only moved when entire packet is received */
306         SFC_ASSERT(scatter_pkt == NULL);
307
308         rxq->completed = completed;
309
310         sfc_rx_qrefill(rxq);
311
312         return done_pkts;
313 }
314
315 unsigned int
316 sfc_rx_qdesc_npending(struct sfc_adapter *sa, unsigned int sw_index)
317 {
318         struct sfc_rxq *rxq;
319
320         SFC_ASSERT(sw_index < sa->rxq_count);
321         rxq = sa->rxq_info[sw_index].rxq;
322
323         if (rxq == NULL || (rxq->flags & SFC_RXQ_FLAG_RUNNING) == 0)
324                 return 0;
325
326         sfc_ev_qpoll(rxq->evq);
327
328         return rxq->pending - rxq->completed;
329 }
330
331 int
332 sfc_rx_qdesc_done(struct sfc_rxq *rxq, unsigned int offset)
333 {
334         if ((rxq->flags & SFC_RXQ_FLAG_RUNNING) == 0)
335                 return 0;
336
337         sfc_ev_qpoll(rxq->evq);
338
339         return offset < (rxq->pending - rxq->completed);
340 }
341
342 static void
343 sfc_rx_qpurge(struct sfc_rxq *rxq)
344 {
345         unsigned int i;
346         struct sfc_rx_sw_desc *rxd;
347
348         for (i = rxq->completed; i != rxq->added; ++i) {
349                 rxd = &rxq->sw_desc[i & rxq->ptr_mask];
350                 rte_mempool_put(rxq->refill_mb_pool, rxd->mbuf);
351                 rxd->mbuf = NULL;
352         }
353 }
354
355 static void
356 sfc_rx_qflush(struct sfc_adapter *sa, unsigned int sw_index)
357 {
358         struct sfc_rxq *rxq;
359         unsigned int retry_count;
360         unsigned int wait_count;
361
362         rxq = sa->rxq_info[sw_index].rxq;
363         SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
364
365         /*
366          * Retry Rx queue flushing in the case of flush failed or
367          * timeout. In the worst case it can delay for 6 seconds.
368          */
369         for (retry_count = 0;
370              ((rxq->state & SFC_RXQ_FLUSHED) == 0) &&
371              (retry_count < SFC_RX_QFLUSH_ATTEMPTS);
372              ++retry_count) {
373                 if (efx_rx_qflush(rxq->common) != 0) {
374                         rxq->state |= SFC_RXQ_FLUSH_FAILED;
375                         break;
376                 }
377                 rxq->state &= ~SFC_RXQ_FLUSH_FAILED;
378                 rxq->state |= SFC_RXQ_FLUSHING;
379
380                 /*
381                  * Wait for Rx queue flush done or failed event at least
382                  * SFC_RX_QFLUSH_POLL_WAIT_MS milliseconds and not more
383                  * than 2 seconds (SFC_RX_QFLUSH_POLL_WAIT_MS multiplied
384                  * by SFC_RX_QFLUSH_POLL_ATTEMPTS).
385                  */
386                 wait_count = 0;
387                 do {
388                         rte_delay_ms(SFC_RX_QFLUSH_POLL_WAIT_MS);
389                         sfc_ev_qpoll(rxq->evq);
390                 } while ((rxq->state & SFC_RXQ_FLUSHING) &&
391                          (wait_count++ < SFC_RX_QFLUSH_POLL_ATTEMPTS));
392
393                 if (rxq->state & SFC_RXQ_FLUSHING)
394                         sfc_err(sa, "RxQ %u flush timed out", sw_index);
395
396                 if (rxq->state & SFC_RXQ_FLUSH_FAILED)
397                         sfc_err(sa, "RxQ %u flush failed", sw_index);
398
399                 if (rxq->state & SFC_RXQ_FLUSHED)
400                         sfc_info(sa, "RxQ %u flushed", sw_index);
401         }
402
403         sfc_rx_qpurge(rxq);
404 }
405
406 static int
407 sfc_rx_default_rxq_set_filter(struct sfc_adapter *sa, struct sfc_rxq *rxq)
408 {
409         boolean_t rss = (sa->rss_channels > 1) ? B_TRUE : B_FALSE;
410         struct sfc_port *port = &sa->port;
411         int rc;
412
413         /*
414          * If promiscuous or all-multicast mode has been requested, setting
415          * filter for the default Rx queue might fail, in particular, while
416          * running over PCI function which is not a member of corresponding
417          * privilege groups; if this occurs, few iterations will be made to
418          * repeat this step without promiscuous and all-multicast flags set
419          */
420 retry:
421         rc = efx_mac_filter_default_rxq_set(sa->nic, rxq->common, rss);
422         if (rc == 0)
423                 return 0;
424         else if (rc != EOPNOTSUPP)
425                 return rc;
426
427         if (port->promisc) {
428                 sfc_warn(sa, "promiscuous mode has been requested, "
429                              "but the HW rejects it");
430                 sfc_warn(sa, "promiscuous mode will be disabled");
431
432                 port->promisc = B_FALSE;
433                 rc = sfc_set_rx_mode(sa);
434                 if (rc != 0)
435                         return rc;
436
437                 goto retry;
438         }
439
440         if (port->allmulti) {
441                 sfc_warn(sa, "all-multicast mode has been requested, "
442                              "but the HW rejects it");
443                 sfc_warn(sa, "all-multicast mode will be disabled");
444
445                 port->allmulti = B_FALSE;
446                 rc = sfc_set_rx_mode(sa);
447                 if (rc != 0)
448                         return rc;
449
450                 goto retry;
451         }
452
453         return rc;
454 }
455
456 int
457 sfc_rx_qstart(struct sfc_adapter *sa, unsigned int sw_index)
458 {
459         struct sfc_rxq_info *rxq_info;
460         struct sfc_rxq *rxq;
461         struct sfc_evq *evq;
462         int rc;
463
464         sfc_log_init(sa, "sw_index=%u", sw_index);
465
466         SFC_ASSERT(sw_index < sa->rxq_count);
467
468         rxq_info = &sa->rxq_info[sw_index];
469         rxq = rxq_info->rxq;
470         SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
471
472         evq = rxq->evq;
473
474         rc = sfc_ev_qstart(sa, evq->evq_index);
475         if (rc != 0)
476                 goto fail_ev_qstart;
477
478         rc = efx_rx_qcreate(sa->nic, rxq->hw_index, 0, rxq_info->type,
479                             &rxq->mem, rxq_info->entries,
480                             0 /* not used on EF10 */, evq->common,
481                             &rxq->common);
482         if (rc != 0)
483                 goto fail_rx_qcreate;
484
485         efx_rx_qenable(rxq->common);
486
487         rxq->pending = rxq->completed = rxq->added = rxq->pushed = 0;
488
489         rxq->state |= SFC_RXQ_STARTED;
490         rxq->flags |= SFC_RXQ_FLAG_STARTED | SFC_RXQ_FLAG_RUNNING;
491
492         sfc_rx_qrefill(rxq);
493
494         if (sw_index == 0) {
495                 rc = sfc_rx_default_rxq_set_filter(sa, rxq);
496                 if (rc != 0)
497                         goto fail_mac_filter_default_rxq_set;
498         }
499
500         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
501         sa->eth_dev->data->rx_queue_state[sw_index] =
502                 RTE_ETH_QUEUE_STATE_STARTED;
503
504         return 0;
505
506 fail_mac_filter_default_rxq_set:
507         sfc_rx_qflush(sa, sw_index);
508
509 fail_rx_qcreate:
510         sfc_ev_qstop(sa, evq->evq_index);
511
512 fail_ev_qstart:
513         return rc;
514 }
515
516 void
517 sfc_rx_qstop(struct sfc_adapter *sa, unsigned int sw_index)
518 {
519         struct sfc_rxq_info *rxq_info;
520         struct sfc_rxq *rxq;
521
522         sfc_log_init(sa, "sw_index=%u", sw_index);
523
524         SFC_ASSERT(sw_index < sa->rxq_count);
525
526         rxq_info = &sa->rxq_info[sw_index];
527         rxq = rxq_info->rxq;
528
529         if (rxq->state == SFC_RXQ_INITIALIZED)
530                 return;
531         SFC_ASSERT(rxq->state & SFC_RXQ_STARTED);
532
533         /* It seems to be used by DPDK for debug purposes only ('rte_ether') */
534         sa->eth_dev->data->rx_queue_state[sw_index] =
535                 RTE_ETH_QUEUE_STATE_STOPPED;
536
537         rxq->flags &= ~SFC_RXQ_FLAG_RUNNING;
538
539         if (sw_index == 0)
540                 efx_mac_filter_default_rxq_clear(sa->nic);
541
542         sfc_rx_qflush(sa, sw_index);
543
544         rxq->flags &= ~SFC_RXQ_FLAG_STARTED;
545         rxq->state = SFC_RXQ_INITIALIZED;
546
547         efx_rx_qdestroy(rxq->common);
548
549         sfc_ev_qstop(sa, rxq->evq->evq_index);
550 }
551
552 static int
553 sfc_rx_qcheck_conf(struct sfc_adapter *sa, uint16_t nb_rx_desc,
554                    const struct rte_eth_rxconf *rx_conf)
555 {
556         const uint16_t rx_free_thresh_max = EFX_RXQ_LIMIT(nb_rx_desc);
557         int rc = 0;
558
559         if (rx_conf->rx_thresh.pthresh != 0 ||
560             rx_conf->rx_thresh.hthresh != 0 ||
561             rx_conf->rx_thresh.wthresh != 0) {
562                 sfc_err(sa,
563                         "RxQ prefetch/host/writeback thresholds are not supported");
564                 rc = EINVAL;
565         }
566
567         if (rx_conf->rx_free_thresh > rx_free_thresh_max) {
568                 sfc_err(sa,
569                         "RxQ free threshold too large: %u vs maximum %u",
570                         rx_conf->rx_free_thresh, rx_free_thresh_max);
571                 rc = EINVAL;
572         }
573
574         if (rx_conf->rx_drop_en == 0) {
575                 sfc_err(sa, "RxQ drop disable is not supported");
576                 rc = EINVAL;
577         }
578
579         return rc;
580 }
581
582 static unsigned int
583 sfc_rx_mbuf_data_alignment(struct rte_mempool *mb_pool)
584 {
585         uint32_t data_off;
586         uint32_t order;
587
588         /* The mbuf object itself is always cache line aligned */
589         order = rte_bsf32(RTE_CACHE_LINE_SIZE);
590
591         /* Data offset from mbuf object start */
592         data_off = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(mb_pool) +
593                 RTE_PKTMBUF_HEADROOM;
594
595         order = MIN(order, rte_bsf32(data_off));
596
597         return 1u << (order - 1);
598 }
599
600 static uint16_t
601 sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool)
602 {
603         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
604         const uint32_t nic_align_start = MAX(1, encp->enc_rx_buf_align_start);
605         const uint32_t nic_align_end = MAX(1, encp->enc_rx_buf_align_end);
606         uint16_t buf_size;
607         unsigned int buf_aligned;
608         unsigned int start_alignment;
609         unsigned int end_padding_alignment;
610
611         /* Below it is assumed that both alignments are power of 2 */
612         SFC_ASSERT(rte_is_power_of_2(nic_align_start));
613         SFC_ASSERT(rte_is_power_of_2(nic_align_end));
614
615         /*
616          * mbuf is always cache line aligned, double-check
617          * that it meets rx buffer start alignment requirements.
618          */
619
620         /* Start from mbuf pool data room size */
621         buf_size = rte_pktmbuf_data_room_size(mb_pool);
622
623         /* Remove headroom */
624         if (buf_size <= RTE_PKTMBUF_HEADROOM) {
625                 sfc_err(sa,
626                         "RxQ mbuf pool %s object data room size %u is smaller than headroom %u",
627                         mb_pool->name, buf_size, RTE_PKTMBUF_HEADROOM);
628                 return 0;
629         }
630         buf_size -= RTE_PKTMBUF_HEADROOM;
631
632         /* Calculate guaranteed data start alignment */
633         buf_aligned = sfc_rx_mbuf_data_alignment(mb_pool);
634
635         /* Reserve space for start alignment */
636         if (buf_aligned < nic_align_start) {
637                 start_alignment = nic_align_start - buf_aligned;
638                 if (buf_size <= start_alignment) {
639                         sfc_err(sa,
640                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u and buffer start alignment %u required by NIC",
641                                 mb_pool->name,
642                                 rte_pktmbuf_data_room_size(mb_pool),
643                                 RTE_PKTMBUF_HEADROOM, start_alignment);
644                         return 0;
645                 }
646                 buf_aligned = nic_align_start;
647                 buf_size -= start_alignment;
648         } else {
649                 start_alignment = 0;
650         }
651
652         /* Make sure that end padding does not write beyond the buffer */
653         if (buf_aligned < nic_align_end) {
654                 /*
655                  * Estimate space which can be lost. If guarnteed buffer
656                  * size is odd, lost space is (nic_align_end - 1). More
657                  * accurate formula is below.
658                  */
659                 end_padding_alignment = nic_align_end -
660                         MIN(buf_aligned, 1u << (rte_bsf32(buf_size) - 1));
661                 if (buf_size <= end_padding_alignment) {
662                         sfc_err(sa,
663                                 "RxQ mbuf pool %s object data room size %u is insufficient for headroom %u, buffer start alignment %u and end padding alignment %u required by NIC",
664                                 mb_pool->name,
665                                 rte_pktmbuf_data_room_size(mb_pool),
666                                 RTE_PKTMBUF_HEADROOM, start_alignment,
667                                 end_padding_alignment);
668                         return 0;
669                 }
670                 buf_size -= end_padding_alignment;
671         } else {
672                 /*
673                  * Start is aligned the same or better than end,
674                  * just align length.
675                  */
676                 buf_size = P2ALIGN(buf_size, nic_align_end);
677         }
678
679         return buf_size;
680 }
681
682 int
683 sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index,
684              uint16_t nb_rx_desc, unsigned int socket_id,
685              const struct rte_eth_rxconf *rx_conf,
686              struct rte_mempool *mb_pool)
687 {
688         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
689         int rc;
690         uint16_t buf_size;
691         struct sfc_rxq_info *rxq_info;
692         unsigned int evq_index;
693         struct sfc_evq *evq;
694         struct sfc_rxq *rxq;
695
696         rc = sfc_rx_qcheck_conf(sa, nb_rx_desc, rx_conf);
697         if (rc != 0)
698                 goto fail_bad_conf;
699
700         buf_size = sfc_rx_mb_pool_buf_size(sa, mb_pool);
701         if (buf_size == 0) {
702                 sfc_err(sa, "RxQ %u mbuf pool object size is too small",
703                         sw_index);
704                 rc = EINVAL;
705                 goto fail_bad_conf;
706         }
707
708         if ((buf_size < sa->port.pdu + encp->enc_rx_prefix_size) &&
709             !sa->eth_dev->data->dev_conf.rxmode.enable_scatter) {
710                 sfc_err(sa, "Rx scatter is disabled and RxQ %u mbuf pool "
711                         "object size is too small", sw_index);
712                 sfc_err(sa, "RxQ %u calculated Rx buffer size is %u vs "
713                         "PDU size %u plus Rx prefix %u bytes",
714                         sw_index, buf_size, (unsigned int)sa->port.pdu,
715                         encp->enc_rx_prefix_size);
716                 rc = EINVAL;
717                 goto fail_bad_conf;
718         }
719
720         SFC_ASSERT(sw_index < sa->rxq_count);
721         rxq_info = &sa->rxq_info[sw_index];
722
723         SFC_ASSERT(nb_rx_desc <= rxq_info->max_entries);
724         rxq_info->entries = nb_rx_desc;
725         rxq_info->type =
726                 sa->eth_dev->data->dev_conf.rxmode.enable_scatter ?
727                 EFX_RXQ_TYPE_SCATTER : EFX_RXQ_TYPE_DEFAULT;
728
729         evq_index = sfc_evq_index_by_rxq_sw_index(sa, sw_index);
730
731         rc = sfc_ev_qinit(sa, evq_index, rxq_info->entries, socket_id);
732         if (rc != 0)
733                 goto fail_ev_qinit;
734
735         evq = sa->evq_info[evq_index].evq;
736
737         rc = ENOMEM;
738         rxq = rte_zmalloc_socket("sfc-rxq", sizeof(*rxq), RTE_CACHE_LINE_SIZE,
739                                  socket_id);
740         if (rxq == NULL)
741                 goto fail_rxq_alloc;
742
743         rc = sfc_dma_alloc(sa, "rxq", sw_index, EFX_RXQ_SIZE(rxq_info->entries),
744                            socket_id, &rxq->mem);
745         if (rc != 0)
746                 goto fail_dma_alloc;
747
748         rc = ENOMEM;
749         rxq->sw_desc = rte_calloc_socket("sfc-rxq-sw_desc", rxq_info->entries,
750                                          sizeof(*rxq->sw_desc),
751                                          RTE_CACHE_LINE_SIZE, socket_id);
752         if (rxq->sw_desc == NULL)
753                 goto fail_desc_alloc;
754
755         evq->rxq = rxq;
756         rxq->evq = evq;
757         rxq->ptr_mask = rxq_info->entries - 1;
758         rxq->refill_threshold = rx_conf->rx_free_thresh;
759         rxq->refill_mb_pool = mb_pool;
760         rxq->buf_size = buf_size;
761         rxq->hw_index = sw_index;
762         rxq->port_id = sa->eth_dev->data->port_id;
763
764         /* Cache limits required on datapath in RxQ structure */
765         rxq->batch_max = encp->enc_rx_batch_max;
766         rxq->prefix_size = encp->enc_rx_prefix_size;
767
768 #if EFSYS_OPT_RX_SCALE
769         if (sa->hash_support == EFX_RX_HASH_AVAILABLE)
770                 rxq->flags |= SFC_RXQ_FLAG_RSS_HASH;
771 #endif
772
773         rxq->state = SFC_RXQ_INITIALIZED;
774
775         rxq_info->rxq = rxq;
776         rxq_info->deferred_start = (rx_conf->rx_deferred_start != 0);
777
778         return 0;
779
780 fail_desc_alloc:
781         sfc_dma_free(sa, &rxq->mem);
782
783 fail_dma_alloc:
784         rte_free(rxq);
785
786 fail_rxq_alloc:
787         sfc_ev_qfini(sa, evq_index);
788
789 fail_ev_qinit:
790         rxq_info->entries = 0;
791
792 fail_bad_conf:
793         sfc_log_init(sa, "failed %d", rc);
794         return rc;
795 }
796
797 void
798 sfc_rx_qfini(struct sfc_adapter *sa, unsigned int sw_index)
799 {
800         struct sfc_rxq_info *rxq_info;
801         struct sfc_rxq *rxq;
802
803         SFC_ASSERT(sw_index < sa->rxq_count);
804
805         rxq_info = &sa->rxq_info[sw_index];
806
807         rxq = rxq_info->rxq;
808         SFC_ASSERT(rxq->state == SFC_RXQ_INITIALIZED);
809
810         rxq_info->rxq = NULL;
811         rxq_info->entries = 0;
812
813         rte_free(rxq->sw_desc);
814         sfc_dma_free(sa, &rxq->mem);
815         rte_free(rxq);
816 }
817
818 #if EFSYS_OPT_RX_SCALE
819 efx_rx_hash_type_t
820 sfc_rte_to_efx_hash_type(uint64_t rss_hf)
821 {
822         efx_rx_hash_type_t efx_hash_types = 0;
823
824         if ((rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
825                        ETH_RSS_NONFRAG_IPV4_OTHER)) != 0)
826                 efx_hash_types |= EFX_RX_HASH_IPV4;
827
828         if ((rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) != 0)
829                 efx_hash_types |= EFX_RX_HASH_TCPIPV4;
830
831         if ((rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
832                         ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX)) != 0)
833                 efx_hash_types |= EFX_RX_HASH_IPV6;
834
835         if ((rss_hf & (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX)) != 0)
836                 efx_hash_types |= EFX_RX_HASH_TCPIPV6;
837
838         return efx_hash_types;
839 }
840
841 uint64_t
842 sfc_efx_to_rte_hash_type(efx_rx_hash_type_t efx_hash_types)
843 {
844         uint64_t rss_hf = 0;
845
846         if ((efx_hash_types & EFX_RX_HASH_IPV4) != 0)
847                 rss_hf |= (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
848                            ETH_RSS_NONFRAG_IPV4_OTHER);
849
850         if ((efx_hash_types & EFX_RX_HASH_TCPIPV4) != 0)
851                 rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
852
853         if ((efx_hash_types & EFX_RX_HASH_IPV6) != 0)
854                 rss_hf |= (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
855                            ETH_RSS_NONFRAG_IPV6_OTHER | ETH_RSS_IPV6_EX);
856
857         if ((efx_hash_types & EFX_RX_HASH_TCPIPV6) != 0)
858                 rss_hf |= (ETH_RSS_NONFRAG_IPV6_TCP | ETH_RSS_IPV6_TCP_EX);
859
860         return rss_hf;
861 }
862 #endif
863
864 static int
865 sfc_rx_rss_config(struct sfc_adapter *sa)
866 {
867         int rc = 0;
868
869 #if EFSYS_OPT_RX_SCALE
870         if (sa->rss_channels > 1) {
871                 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
872                                            sa->rss_hash_types, B_TRUE);
873                 if (rc != 0)
874                         goto finish;
875
876                 rc = efx_rx_scale_key_set(sa->nic, sa->rss_key,
877                                           sizeof(sa->rss_key));
878                 if (rc != 0)
879                         goto finish;
880
881                 rc = efx_rx_scale_tbl_set(sa->nic, sa->rss_tbl,
882                                           sizeof(sa->rss_tbl));
883         }
884
885 finish:
886 #endif
887         return rc;
888 }
889
890 int
891 sfc_rx_start(struct sfc_adapter *sa)
892 {
893         unsigned int sw_index;
894         int rc;
895
896         sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
897
898         rc = efx_rx_init(sa->nic);
899         if (rc != 0)
900                 goto fail_rx_init;
901
902         rc = sfc_rx_rss_config(sa);
903         if (rc != 0)
904                 goto fail_rss_config;
905
906         for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
907                 if ((!sa->rxq_info[sw_index].deferred_start ||
908                      sa->rxq_info[sw_index].deferred_started)) {
909                         rc = sfc_rx_qstart(sa, sw_index);
910                         if (rc != 0)
911                                 goto fail_rx_qstart;
912                 }
913         }
914
915         return 0;
916
917 fail_rx_qstart:
918         while (sw_index-- > 0)
919                 sfc_rx_qstop(sa, sw_index);
920
921 fail_rss_config:
922         efx_rx_fini(sa->nic);
923
924 fail_rx_init:
925         sfc_log_init(sa, "failed %d", rc);
926         return rc;
927 }
928
929 void
930 sfc_rx_stop(struct sfc_adapter *sa)
931 {
932         unsigned int sw_index;
933
934         sfc_log_init(sa, "rxq_count=%u", sa->rxq_count);
935
936         sw_index = sa->rxq_count;
937         while (sw_index-- > 0) {
938                 if (sa->rxq_info[sw_index].rxq != NULL)
939                         sfc_rx_qstop(sa, sw_index);
940         }
941
942         efx_rx_fini(sa->nic);
943 }
944
945 static int
946 sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index)
947 {
948         struct sfc_rxq_info *rxq_info = &sa->rxq_info[sw_index];
949         unsigned int max_entries;
950
951         max_entries = EFX_RXQ_MAXNDESCS;
952         SFC_ASSERT(rte_is_power_of_2(max_entries));
953
954         rxq_info->max_entries = max_entries;
955
956         return 0;
957 }
958
959 static int
960 sfc_rx_check_mode(struct sfc_adapter *sa, struct rte_eth_rxmode *rxmode)
961 {
962         int rc = 0;
963
964         switch (rxmode->mq_mode) {
965         case ETH_MQ_RX_NONE:
966                 /* No special checks are required */
967                 break;
968 #if EFSYS_OPT_RX_SCALE
969         case ETH_MQ_RX_RSS:
970                 if (sa->rss_support == EFX_RX_SCALE_UNAVAILABLE) {
971                         sfc_err(sa, "RSS is not available");
972                         rc = EINVAL;
973                 }
974                 break;
975 #endif
976         default:
977                 sfc_err(sa, "Rx multi-queue mode %u not supported",
978                         rxmode->mq_mode);
979                 rc = EINVAL;
980         }
981
982         if (rxmode->header_split) {
983                 sfc_err(sa, "Header split on Rx not supported");
984                 rc = EINVAL;
985         }
986
987         if (rxmode->hw_vlan_filter) {
988                 sfc_err(sa, "HW VLAN filtering not supported");
989                 rc = EINVAL;
990         }
991
992         if (rxmode->hw_vlan_strip) {
993                 sfc_err(sa, "HW VLAN stripping not supported");
994                 rc = EINVAL;
995         }
996
997         if (rxmode->hw_vlan_extend) {
998                 sfc_err(sa,
999                         "Q-in-Q HW VLAN stripping not supported");
1000                 rc = EINVAL;
1001         }
1002
1003         if (!rxmode->hw_strip_crc) {
1004                 sfc_warn(sa,
1005                          "FCS stripping control not supported - always stripped");
1006                 rxmode->hw_strip_crc = 1;
1007         }
1008
1009         if (rxmode->enable_lro) {
1010                 sfc_err(sa, "LRO not supported");
1011                 rc = EINVAL;
1012         }
1013
1014         return rc;
1015 }
1016
1017 /**
1018  * Initialize Rx subsystem.
1019  *
1020  * Called at device configuration stage when number of receive queues is
1021  * specified together with other device level receive configuration.
1022  *
1023  * It should be used to allocate NUMA-unaware resources.
1024  */
1025 int
1026 sfc_rx_init(struct sfc_adapter *sa)
1027 {
1028         struct rte_eth_conf *dev_conf = &sa->eth_dev->data->dev_conf;
1029         unsigned int sw_index;
1030         int rc;
1031
1032         rc = sfc_rx_check_mode(sa, &dev_conf->rxmode);
1033         if (rc != 0)
1034                 goto fail_check_mode;
1035
1036         sa->rxq_count = sa->eth_dev->data->nb_rx_queues;
1037
1038         rc = ENOMEM;
1039         sa->rxq_info = rte_calloc_socket("sfc-rxqs", sa->rxq_count,
1040                                          sizeof(struct sfc_rxq_info), 0,
1041                                          sa->socket_id);
1042         if (sa->rxq_info == NULL)
1043                 goto fail_rxqs_alloc;
1044
1045         for (sw_index = 0; sw_index < sa->rxq_count; ++sw_index) {
1046                 rc = sfc_rx_qinit_info(sa, sw_index);
1047                 if (rc != 0)
1048                         goto fail_rx_qinit_info;
1049         }
1050
1051 #if EFSYS_OPT_RX_SCALE
1052         sa->rss_channels = (dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) ?
1053                            MIN(sa->rxq_count, EFX_MAXRSS) : 1;
1054
1055         if (sa->rss_channels > 1) {
1056                 for (sw_index = 0; sw_index < EFX_RSS_TBL_SIZE; ++sw_index)
1057                         sa->rss_tbl[sw_index] = sw_index % sa->rss_channels;
1058         }
1059 #endif
1060
1061         return 0;
1062
1063 fail_rx_qinit_info:
1064         rte_free(sa->rxq_info);
1065         sa->rxq_info = NULL;
1066
1067 fail_rxqs_alloc:
1068         sa->rxq_count = 0;
1069 fail_check_mode:
1070         sfc_log_init(sa, "failed %d", rc);
1071         return rc;
1072 }
1073
1074 /**
1075  * Shutdown Rx subsystem.
1076  *
1077  * Called at device close stage, for example, before device
1078  * reconfiguration or shutdown.
1079  */
1080 void
1081 sfc_rx_fini(struct sfc_adapter *sa)
1082 {
1083         unsigned int sw_index;
1084
1085         sw_index = sa->rxq_count;
1086         while (sw_index-- > 0) {
1087                 if (sa->rxq_info[sw_index].rxq != NULL)
1088                         sfc_rx_qfini(sa, sw_index);
1089         }
1090
1091         rte_free(sa->rxq_info);
1092         sa->rxq_info = NULL;
1093         sa->rxq_count = 0;
1094 }