1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Intel Corporation
9 #include <rte_ethdev_driver.h>
10 #include <rte_ethdev_vdev.h>
11 #include <rte_malloc.h>
12 #include <rte_bus_vdev.h>
13 #include <rte_kvargs.h>
14 #include <rte_errno.h>
16 #include <rte_sched.h>
17 #include <rte_tm_driver.h>
19 #include "rte_eth_softnic.h"
20 #include "rte_eth_softnic_internals.h"
23 (&rte_eth_devices[p->hard.port_id])
25 #define PMD_PARAM_SOFT_TM "soft_tm"
26 #define PMD_PARAM_SOFT_TM_RATE "soft_tm_rate"
27 #define PMD_PARAM_SOFT_TM_NB_QUEUES "soft_tm_nb_queues"
28 #define PMD_PARAM_SOFT_TM_QSIZE0 "soft_tm_qsize0"
29 #define PMD_PARAM_SOFT_TM_QSIZE1 "soft_tm_qsize1"
30 #define PMD_PARAM_SOFT_TM_QSIZE2 "soft_tm_qsize2"
31 #define PMD_PARAM_SOFT_TM_QSIZE3 "soft_tm_qsize3"
32 #define PMD_PARAM_SOFT_TM_ENQ_BSZ "soft_tm_enq_bsz"
33 #define PMD_PARAM_SOFT_TM_DEQ_BSZ "soft_tm_deq_bsz"
35 #define PMD_PARAM_HARD_NAME "hard_name"
36 #define PMD_PARAM_HARD_TX_QUEUE_ID "hard_tx_queue_id"
38 static const char *pmd_valid_args[] = {
40 PMD_PARAM_SOFT_TM_RATE,
41 PMD_PARAM_SOFT_TM_NB_QUEUES,
42 PMD_PARAM_SOFT_TM_QSIZE0,
43 PMD_PARAM_SOFT_TM_QSIZE1,
44 PMD_PARAM_SOFT_TM_QSIZE2,
45 PMD_PARAM_SOFT_TM_QSIZE3,
46 PMD_PARAM_SOFT_TM_ENQ_BSZ,
47 PMD_PARAM_SOFT_TM_DEQ_BSZ,
49 PMD_PARAM_HARD_TX_QUEUE_ID,
53 static const struct rte_eth_dev_info pmd_dev_info = {
55 .max_rx_pktlen = UINT32_MAX,
56 .max_rx_queues = UINT16_MAX,
57 .max_tx_queues = UINT16_MAX,
68 .rx_offload_capa = DEV_RX_OFFLOAD_CRC_STRIP,
71 static int pmd_softnic_logtype;
73 #define PMD_LOG(level, fmt, args...) \
74 rte_log(RTE_LOG_ ## level, pmd_softnic_logtype, \
75 "%s(): " fmt "\n", __func__, ##args)
78 pmd_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
79 struct rte_eth_dev_info *dev_info)
81 memcpy(dev_info, &pmd_dev_info, sizeof(*dev_info));
85 pmd_dev_configure(struct rte_eth_dev *dev)
87 struct pmd_internals *p = dev->data->dev_private;
88 struct rte_eth_dev *hard_dev = DEV_HARD(p);
90 if (dev->data->nb_rx_queues > hard_dev->data->nb_rx_queues)
93 if (p->params.hard.tx_queue_id >= hard_dev->data->nb_tx_queues)
100 pmd_rx_queue_setup(struct rte_eth_dev *dev,
101 uint16_t rx_queue_id,
102 uint16_t nb_rx_desc __rte_unused,
103 unsigned int socket_id,
104 const struct rte_eth_rxconf *rx_conf __rte_unused,
105 struct rte_mempool *mb_pool __rte_unused)
107 struct pmd_internals *p = dev->data->dev_private;
109 if (p->params.soft.intrusive == 0) {
110 struct pmd_rx_queue *rxq;
112 rxq = rte_zmalloc_socket(p->params.soft.name,
113 sizeof(struct pmd_rx_queue), 0, socket_id);
117 rxq->hard.port_id = p->hard.port_id;
118 rxq->hard.rx_queue_id = rx_queue_id;
119 dev->data->rx_queues[rx_queue_id] = rxq;
121 struct rte_eth_dev *hard_dev = DEV_HARD(p);
122 void *rxq = hard_dev->data->rx_queues[rx_queue_id];
127 dev->data->rx_queues[rx_queue_id] = rxq;
133 pmd_tx_queue_setup(struct rte_eth_dev *dev,
134 uint16_t tx_queue_id,
136 unsigned int socket_id,
137 const struct rte_eth_txconf *tx_conf __rte_unused)
139 uint32_t size = RTE_ETH_NAME_MAX_LEN + strlen("_txq") + 4;
143 snprintf(name, sizeof(name), "%s_txq%04x",
144 dev->data->name, tx_queue_id);
145 r = rte_ring_create(name, nb_tx_desc, socket_id,
146 RING_F_SP_ENQ | RING_F_SC_DEQ);
150 dev->data->tx_queues[tx_queue_id] = r;
155 pmd_dev_start(struct rte_eth_dev *dev)
157 struct pmd_internals *p = dev->data->dev_private;
160 int status = tm_start(p);
166 dev->data->dev_link.link_status = ETH_LINK_UP;
168 if (p->params.soft.intrusive) {
169 struct rte_eth_dev *hard_dev = DEV_HARD(p);
171 /* The hard_dev->rx_pkt_burst should be stable by now */
172 dev->rx_pkt_burst = hard_dev->rx_pkt_burst;
179 pmd_dev_stop(struct rte_eth_dev *dev)
181 struct pmd_internals *p = dev->data->dev_private;
183 dev->data->dev_link.link_status = ETH_LINK_DOWN;
190 pmd_dev_close(struct rte_eth_dev *dev)
195 for (i = 0; i < dev->data->nb_tx_queues; i++)
196 rte_ring_free((struct rte_ring *)dev->data->tx_queues[i]);
200 pmd_link_update(struct rte_eth_dev *dev __rte_unused,
201 int wait_to_complete __rte_unused)
207 pmd_tm_ops_get(struct rte_eth_dev *dev, void *arg)
209 *(const struct rte_tm_ops **)arg =
210 (tm_enabled(dev)) ? &pmd_tm_ops : NULL;
215 static const struct eth_dev_ops pmd_ops = {
216 .dev_configure = pmd_dev_configure,
217 .dev_start = pmd_dev_start,
218 .dev_stop = pmd_dev_stop,
219 .dev_close = pmd_dev_close,
220 .link_update = pmd_link_update,
221 .dev_infos_get = pmd_dev_infos_get,
222 .rx_queue_setup = pmd_rx_queue_setup,
223 .tx_queue_setup = pmd_tx_queue_setup,
224 .tm_ops_get = pmd_tm_ops_get,
228 pmd_rx_pkt_burst(void *rxq,
229 struct rte_mbuf **rx_pkts,
232 struct pmd_rx_queue *rx_queue = rxq;
234 return rte_eth_rx_burst(rx_queue->hard.port_id,
235 rx_queue->hard.rx_queue_id,
241 pmd_tx_pkt_burst(void *txq,
242 struct rte_mbuf **tx_pkts,
245 return (uint16_t)rte_ring_enqueue_burst(txq,
251 static __rte_always_inline int
252 run_default(struct rte_eth_dev *dev)
254 struct pmd_internals *p = dev->data->dev_private;
256 /* Persistent context: Read Only (update not required) */
257 struct rte_mbuf **pkts = p->soft.def.pkts;
258 uint16_t nb_tx_queues = dev->data->nb_tx_queues;
260 /* Persistent context: Read - Write (update required) */
261 uint32_t txq_pos = p->soft.def.txq_pos;
262 uint32_t pkts_len = p->soft.def.pkts_len;
263 uint32_t flush_count = p->soft.def.flush_count;
265 /* Not part of the persistent context */
269 /* Soft device TXQ read, Hard device TXQ write */
270 for (i = 0; i < nb_tx_queues; i++) {
271 struct rte_ring *txq = dev->data->tx_queues[txq_pos];
273 /* Read soft device TXQ burst to packet enqueue buffer */
274 pkts_len += rte_ring_sc_dequeue_burst(txq,
275 (void **)&pkts[pkts_len],
279 /* Increment soft device TXQ */
281 if (txq_pos >= nb_tx_queues)
284 /* Hard device TXQ write when complete burst is available */
285 if (pkts_len >= DEFAULT_BURST_SIZE) {
286 for (pos = 0; pos < pkts_len; )
287 pos += rte_eth_tx_burst(p->hard.port_id,
288 p->params.hard.tx_queue_id,
290 (uint16_t)(pkts_len - pos));
298 if (flush_count >= FLUSH_COUNT_THRESHOLD) {
299 for (pos = 0; pos < pkts_len; )
300 pos += rte_eth_tx_burst(p->hard.port_id,
301 p->params.hard.tx_queue_id,
303 (uint16_t)(pkts_len - pos));
309 p->soft.def.txq_pos = txq_pos;
310 p->soft.def.pkts_len = pkts_len;
311 p->soft.def.flush_count = flush_count + 1;
316 static __rte_always_inline int
317 run_tm(struct rte_eth_dev *dev)
319 struct pmd_internals *p = dev->data->dev_private;
321 /* Persistent context: Read Only (update not required) */
322 struct rte_sched_port *sched = p->soft.tm.sched;
323 struct rte_mbuf **pkts_enq = p->soft.tm.pkts_enq;
324 struct rte_mbuf **pkts_deq = p->soft.tm.pkts_deq;
325 uint32_t enq_bsz = p->params.soft.tm.enq_bsz;
326 uint32_t deq_bsz = p->params.soft.tm.deq_bsz;
327 uint16_t nb_tx_queues = dev->data->nb_tx_queues;
329 /* Persistent context: Read - Write (update required) */
330 uint32_t txq_pos = p->soft.tm.txq_pos;
331 uint32_t pkts_enq_len = p->soft.tm.pkts_enq_len;
332 uint32_t flush_count = p->soft.tm.flush_count;
334 /* Not part of the persistent context */
335 uint32_t pkts_deq_len, pos;
338 /* Soft device TXQ read, TM enqueue */
339 for (i = 0; i < nb_tx_queues; i++) {
340 struct rte_ring *txq = dev->data->tx_queues[txq_pos];
342 /* Read TXQ burst to packet enqueue buffer */
343 pkts_enq_len += rte_ring_sc_dequeue_burst(txq,
344 (void **)&pkts_enq[pkts_enq_len],
350 if (txq_pos >= nb_tx_queues)
353 /* TM enqueue when complete burst is available */
354 if (pkts_enq_len >= enq_bsz) {
355 rte_sched_port_enqueue(sched, pkts_enq, pkts_enq_len);
363 if (flush_count >= FLUSH_COUNT_THRESHOLD) {
365 rte_sched_port_enqueue(sched, pkts_enq, pkts_enq_len);
371 p->soft.tm.txq_pos = txq_pos;
372 p->soft.tm.pkts_enq_len = pkts_enq_len;
373 p->soft.tm.flush_count = flush_count + 1;
375 /* TM dequeue, Hard device TXQ write */
376 pkts_deq_len = rte_sched_port_dequeue(sched, pkts_deq, deq_bsz);
378 for (pos = 0; pos < pkts_deq_len; )
379 pos += rte_eth_tx_burst(p->hard.port_id,
380 p->params.hard.tx_queue_id,
382 (uint16_t)(pkts_deq_len - pos));
388 rte_pmd_softnic_run(uint16_t port_id)
390 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
392 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
393 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
396 return (tm_used(dev)) ? run_tm(dev) : run_default(dev);
399 static struct ether_addr eth_addr = { .addr_bytes = {0} };
402 eth_dev_speed_max_mbps(uint32_t speed_capa)
404 uint32_t rate_mbps[32] = {
422 uint32_t pos = (speed_capa) ? (31 - __builtin_clz(speed_capa)) : 0;
423 return rate_mbps[pos];
427 default_init(struct pmd_internals *p,
428 struct pmd_params *params,
431 p->soft.def.pkts = rte_zmalloc_socket(params->soft.name,
432 2 * DEFAULT_BURST_SIZE * sizeof(struct rte_mbuf *),
436 if (p->soft.def.pkts == NULL)
443 default_free(struct pmd_internals *p)
445 rte_free(p->soft.def.pkts);
449 pmd_init(struct pmd_params *params, int numa_node)
451 struct pmd_internals *p;
454 p = rte_zmalloc_socket(params->soft.name,
455 sizeof(struct pmd_internals),
461 memcpy(&p->params, params, sizeof(p->params));
462 rte_eth_dev_get_port_by_name(params->hard.name, &p->hard.port_id);
465 status = default_init(p, params, numa_node);
467 free(p->params.hard.name);
472 /* Traffic Management (TM)*/
473 if (params->soft.flags & PMD_FEATURE_TM) {
474 status = tm_init(p, params, numa_node);
477 free(p->params.hard.name);
487 pmd_free(struct pmd_internals *p)
489 if (p->params.soft.flags & PMD_FEATURE_TM)
494 free(p->params.hard.name);
499 pmd_ethdev_register(struct rte_vdev_device *vdev,
500 struct pmd_params *params,
503 struct rte_eth_dev_info hard_info;
504 struct rte_eth_dev *soft_dev;
507 uint16_t hard_port_id;
509 rte_eth_dev_get_port_by_name(params->hard.name, &hard_port_id);
510 rte_eth_dev_info_get(hard_port_id, &hard_info);
511 hard_speed = eth_dev_speed_max_mbps(hard_info.speed_capa);
512 numa_node = rte_eth_dev_socket_id(hard_port_id);
514 /* Ethdev entry allocation */
515 soft_dev = rte_eth_dev_allocate(params->soft.name);
520 soft_dev->rx_pkt_burst = (params->soft.intrusive) ?
521 NULL : /* set up later */
523 soft_dev->tx_pkt_burst = pmd_tx_pkt_burst;
524 soft_dev->tx_pkt_prepare = NULL;
525 soft_dev->dev_ops = &pmd_ops;
526 soft_dev->device = &vdev->device;
529 soft_dev->data->dev_private = dev_private;
530 soft_dev->data->dev_link.link_speed = hard_speed;
531 soft_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
532 soft_dev->data->dev_link.link_autoneg = ETH_LINK_FIXED;
533 soft_dev->data->dev_link.link_status = ETH_LINK_DOWN;
534 soft_dev->data->mac_addrs = ð_addr;
535 soft_dev->data->promiscuous = 1;
536 soft_dev->data->kdrv = RTE_KDRV_NONE;
537 soft_dev->data->numa_node = numa_node;
539 rte_eth_dev_probing_finish(soft_dev);
545 get_string(const char *key __rte_unused, const char *value, void *extra_args)
547 if (!value || !extra_args)
550 *(char **)extra_args = strdup(value);
552 if (!*(char **)extra_args)
559 get_uint32(const char *key __rte_unused, const char *value, void *extra_args)
561 if (!value || !extra_args)
564 *(uint32_t *)extra_args = strtoull(value, NULL, 0);
570 pmd_parse_args(struct pmd_params *p, const char *name, const char *params)
572 struct rte_kvargs *kvlist;
575 kvlist = rte_kvargs_parse(params, pmd_valid_args);
579 /* Set default values */
580 memset(p, 0, sizeof(*p));
582 p->soft.intrusive = INTRUSIVE;
584 p->soft.tm.nb_queues = SOFTNIC_SOFT_TM_NB_QUEUES;
585 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
586 p->soft.tm.qsize[i] = SOFTNIC_SOFT_TM_QUEUE_SIZE;
587 p->soft.tm.enq_bsz = SOFTNIC_SOFT_TM_ENQ_BSZ;
588 p->soft.tm.deq_bsz = SOFTNIC_SOFT_TM_DEQ_BSZ;
589 p->hard.tx_queue_id = SOFTNIC_HARD_TX_QUEUE_ID;
591 /* SOFT: TM (optional) */
592 if (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM) == 1) {
595 ret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM,
600 if (strcmp(s, "on") == 0)
601 p->soft.flags |= PMD_FEATURE_TM;
602 else if (strcmp(s, "off") == 0)
603 p->soft.flags &= ~PMD_FEATURE_TM;
612 /* SOFT: TM rate (measured in bytes/second) (optional) */
613 if (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_RATE) == 1) {
614 ret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_RATE,
615 &get_uint32, &p->soft.tm.rate);
619 p->soft.flags |= PMD_FEATURE_TM;
622 /* SOFT: TM number of queues (optional) */
623 if (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_NB_QUEUES) == 1) {
624 ret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_NB_QUEUES,
625 &get_uint32, &p->soft.tm.nb_queues);
629 p->soft.flags |= PMD_FEATURE_TM;
632 /* SOFT: TM queue size 0 .. 3 (optional) */
633 if (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_QSIZE0) == 1) {
636 ret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_QSIZE0,
637 &get_uint32, &qsize);
641 p->soft.tm.qsize[0] = (uint16_t)qsize;
642 p->soft.flags |= PMD_FEATURE_TM;
645 if (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_QSIZE1) == 1) {
648 ret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_QSIZE1,
649 &get_uint32, &qsize);
653 p->soft.tm.qsize[1] = (uint16_t)qsize;
654 p->soft.flags |= PMD_FEATURE_TM;
657 if (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_QSIZE2) == 1) {
660 ret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_QSIZE2,
661 &get_uint32, &qsize);
665 p->soft.tm.qsize[2] = (uint16_t)qsize;
666 p->soft.flags |= PMD_FEATURE_TM;
669 if (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_QSIZE3) == 1) {
672 ret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_QSIZE3,
673 &get_uint32, &qsize);
677 p->soft.tm.qsize[3] = (uint16_t)qsize;
678 p->soft.flags |= PMD_FEATURE_TM;
681 /* SOFT: TM enqueue burst size (optional) */
682 if (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_ENQ_BSZ) == 1) {
683 ret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_ENQ_BSZ,
684 &get_uint32, &p->soft.tm.enq_bsz);
688 p->soft.flags |= PMD_FEATURE_TM;
691 /* SOFT: TM dequeue burst size (optional) */
692 if (rte_kvargs_count(kvlist, PMD_PARAM_SOFT_TM_DEQ_BSZ) == 1) {
693 ret = rte_kvargs_process(kvlist, PMD_PARAM_SOFT_TM_DEQ_BSZ,
694 &get_uint32, &p->soft.tm.deq_bsz);
698 p->soft.flags |= PMD_FEATURE_TM;
701 /* HARD: name (mandatory) */
702 if (rte_kvargs_count(kvlist, PMD_PARAM_HARD_NAME) == 1) {
703 ret = rte_kvargs_process(kvlist, PMD_PARAM_HARD_NAME,
704 &get_string, &p->hard.name);
712 /* HARD: tx_queue_id (optional) */
713 if (rte_kvargs_count(kvlist, PMD_PARAM_HARD_TX_QUEUE_ID) == 1) {
714 ret = rte_kvargs_process(kvlist, PMD_PARAM_HARD_TX_QUEUE_ID,
715 &get_uint32, &p->hard.tx_queue_id);
721 rte_kvargs_free(kvlist);
726 pmd_probe(struct rte_vdev_device *vdev)
732 struct rte_eth_dev_info hard_info;
734 uint16_t hard_port_id;
737 struct rte_eth_dev *eth_dev;
738 const char *name = rte_vdev_device_name(vdev);
740 PMD_LOG(INFO, "Probing device \"%s\"", name);
742 /* Parse input arguments */
743 params = rte_vdev_device_args(vdev);
745 if (rte_eal_process_type() == RTE_PROC_SECONDARY &&
746 strlen(params) == 0) {
747 eth_dev = rte_eth_dev_attach_secondary(name);
749 PMD_LOG(ERR, "Failed to probe %s", name);
752 /* TODO: request info from primary to set up Rx and Tx */
753 eth_dev->dev_ops = &pmd_ops;
754 rte_eth_dev_probing_finish(eth_dev);
761 status = pmd_parse_args(&p, rte_vdev_device_name(vdev), params);
765 /* Check input arguments */
766 if (rte_eth_dev_get_port_by_name(p.hard.name, &hard_port_id))
769 rte_eth_dev_info_get(hard_port_id, &hard_info);
770 hard_speed = eth_dev_speed_max_mbps(hard_info.speed_capa);
771 numa_node = rte_eth_dev_socket_id(hard_port_id);
773 if (p.hard.tx_queue_id >= hard_info.max_tx_queues)
776 if (p.soft.flags & PMD_FEATURE_TM) {
777 status = tm_params_check(&p, hard_speed);
783 /* Allocate and initialize soft ethdev private data */
784 dev_private = pmd_init(&p, numa_node);
785 if (dev_private == NULL)
788 /* Register soft ethdev */
790 "Creating soft ethdev \"%s\" for hard ethdev \"%s\"",
791 p.soft.name, p.hard.name);
793 status = pmd_ethdev_register(vdev, &p, dev_private);
795 pmd_free(dev_private);
803 pmd_remove(struct rte_vdev_device *vdev)
805 struct rte_eth_dev *dev = NULL;
806 struct pmd_internals *p;
811 PMD_LOG(INFO, "Removing device \"%s\"",
812 rte_vdev_device_name(vdev));
814 /* Find the ethdev entry */
815 dev = rte_eth_dev_allocated(rte_vdev_device_name(vdev));
818 p = dev->data->dev_private;
820 /* Free device data structures*/
823 rte_eth_dev_release_port(dev);
828 static struct rte_vdev_driver pmd_softnic_drv = {
830 .remove = pmd_remove,
833 RTE_PMD_REGISTER_VDEV(net_softnic, pmd_softnic_drv);
834 RTE_PMD_REGISTER_PARAM_STRING(net_softnic,
835 PMD_PARAM_SOFT_TM "=on|off "
836 PMD_PARAM_SOFT_TM_RATE "=<int> "
837 PMD_PARAM_SOFT_TM_NB_QUEUES "=<int> "
838 PMD_PARAM_SOFT_TM_QSIZE0 "=<int> "
839 PMD_PARAM_SOFT_TM_QSIZE1 "=<int> "
840 PMD_PARAM_SOFT_TM_QSIZE2 "=<int> "
841 PMD_PARAM_SOFT_TM_QSIZE3 "=<int> "
842 PMD_PARAM_SOFT_TM_ENQ_BSZ "=<int> "
843 PMD_PARAM_SOFT_TM_DEQ_BSZ "=<int> "
844 PMD_PARAM_HARD_NAME "=<string> "
845 PMD_PARAM_HARD_TX_QUEUE_ID "=<int>");
847 RTE_INIT(pmd_softnic_init_log);
849 pmd_softnic_init_log(void)
851 pmd_softnic_logtype = rte_log_register("pmd.net.softnic");
852 if (pmd_softnic_logtype >= 0)
853 rte_log_set_level(pmd_softnic_logtype, RTE_LOG_NOTICE);