drivers/net/softnic/rte_eth_softnic_internals.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Intel Corporation
   3  */
   4
   5 #ifndef __INCLUDE_RTE_ETH_SOFTNIC_INTERNALS_H__
   6 #define __INCLUDE_RTE_ETH_SOFTNIC_INTERNALS_H__
   7
   8 #include <stddef.h>
   9 #include <stdint.h>
  10
  11 #include <rte_mbuf.h>
  12 #include <rte_ethdev.h>
  13 #include <rte_sched.h>
  14 #include <rte_ethdev_driver.h>
  15 #include <rte_tm_driver.h>
  16
  17 #include "rte_eth_softnic.h"
  18
  19 /**
  20  * PMD Parameters
  21  */
  22
  23 struct pmd_params {
  24         const char *name;
  25         const char *firmware;
  26         uint32_t cpu_id;
  27
  28         /** Traffic Management (TM) */
  29         struct {
  30                 uint32_t n_queues; /**< Number of queues */
  31                 uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  32         } tm;
  33 };
  34
  35 /**
  36  * Traffic Management (TM) Internals
  37  */
  38
  39 #ifndef TM_MAX_SUBPORTS
  40 #define TM_MAX_SUBPORTS                                 8
  41 #endif
  42
  43 #ifndef TM_MAX_PIPES_PER_SUBPORT
  44 #define TM_MAX_PIPES_PER_SUBPORT                        4096
  45 #endif
  46
  47 struct tm_params {
  48         struct rte_sched_port_params port_params;
  49
  50         struct rte_sched_subport_params subport_params[TM_MAX_SUBPORTS];
  51
  52         struct rte_sched_pipe_params
  53                 pipe_profiles[RTE_SCHED_PIPE_PROFILES_PER_PORT];
  54         uint32_t n_pipe_profiles;
  55         uint32_t pipe_to_profile[TM_MAX_SUBPORTS * TM_MAX_PIPES_PER_SUBPORT];
  56 };
  57
  58 /* TM Levels */
  59 enum tm_node_level {
  60         TM_NODE_LEVEL_PORT = 0,
  61         TM_NODE_LEVEL_SUBPORT,
  62         TM_NODE_LEVEL_PIPE,
  63         TM_NODE_LEVEL_TC,
  64         TM_NODE_LEVEL_QUEUE,
  65         TM_NODE_LEVEL_MAX,
  66 };
  67
  68 /* TM Shaper Profile */
  69 struct tm_shaper_profile {
  70         TAILQ_ENTRY(tm_shaper_profile) node;
  71         uint32_t shaper_profile_id;
  72         uint32_t n_users;
  73         struct rte_tm_shaper_params params;
  74 };
  75
  76 TAILQ_HEAD(tm_shaper_profile_list, tm_shaper_profile);
  77
  78 /* TM Shared Shaper */
  79 struct tm_shared_shaper {
  80         TAILQ_ENTRY(tm_shared_shaper) node;
  81         uint32_t shared_shaper_id;
  82         uint32_t n_users;
  83         uint32_t shaper_profile_id;
  84 };
  85
  86 TAILQ_HEAD(tm_shared_shaper_list, tm_shared_shaper);
  87
  88 /* TM WRED Profile */
  89 struct tm_wred_profile {
  90         TAILQ_ENTRY(tm_wred_profile) node;
  91         uint32_t wred_profile_id;
  92         uint32_t n_users;
  93         struct rte_tm_wred_params params;
  94 };
  95
  96 TAILQ_HEAD(tm_wred_profile_list, tm_wred_profile);
  97
  98 /* TM Node */
  99 struct tm_node {
 100         TAILQ_ENTRY(tm_node) node;
 101         uint32_t node_id;
 102         uint32_t parent_node_id;
 103         uint32_t priority;
 104         uint32_t weight;
 105         uint32_t level;
 106         struct tm_node *parent_node;
 107         struct tm_shaper_profile *shaper_profile;
 108         struct tm_wred_profile *wred_profile;
 109         struct rte_tm_node_params params;
 110         struct rte_tm_node_stats stats;
 111         uint32_t n_children;
 112 };
 113
 114 TAILQ_HEAD(tm_node_list, tm_node);
 115
 116 /* TM Hierarchy Specification */
 117 struct tm_hierarchy {
 118         struct tm_shaper_profile_list shaper_profiles;
 119         struct tm_shared_shaper_list shared_shapers;
 120         struct tm_wred_profile_list wred_profiles;
 121         struct tm_node_list nodes;
 122
 123         uint32_t n_shaper_profiles;
 124         uint32_t n_shared_shapers;
 125         uint32_t n_wred_profiles;
 126         uint32_t n_nodes;
 127
 128         uint32_t n_tm_nodes[TM_NODE_LEVEL_MAX];
 129 };
 130
 131 struct tm_internals {
 132         /** Hierarchy specification
 133          *
 134          *     -Hierarchy is unfrozen at init and when port is stopped.
 135          *     -Hierarchy is frozen on successful hierarchy commit.
 136          *     -Run-time hierarchy changes are not allowed, therefore it makes
 137          *      sense to keep the hierarchy frozen after the port is started.
 138          */
 139         struct tm_hierarchy h;
 140         int hierarchy_frozen;
 141
 142         /** Blueprints */
 143         struct tm_params params;
 144         struct rte_sched_port *sched;
 145 };
 146
 147 /**
 148  * PMD Internals
 149  */
 150 struct pmd_internals {
 151         /** Params */
 152         struct pmd_params params;
 153
 154         /** Soft device */
 155         struct {
 156                 struct tm_internals tm; /**< Traffic Management */
 157         } soft;
 158 };
 159
 160 /**
 161  * Traffic Management (TM) Operation
 162  */
 163 extern const struct rte_tm_ops pmd_tm_ops;
 164
 165 int
 166 tm_init(struct pmd_internals *p, struct pmd_params *params, int numa_node);
 167
 168 void
 169 tm_free(struct pmd_internals *p);
 170
 171 int
 172 tm_start(struct pmd_internals *p);
 173
 174 void
 175 tm_stop(struct pmd_internals *p);
 176
 177 static inline int
 178 tm_used(struct rte_eth_dev *dev __rte_unused)
 179 {
 180         return 0;
 181 }
 182
 183 #endif /* __INCLUDE_RTE_ETH_SOFTNIC_INTERNALS_H__ */