drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <fcntl.h>
  42 #include <inttypes.h>
  43 #include <rte_byteorder.h>
  44 #include <rte_common.h>
  45 #include <rte_cycles.h>
  46
  47 #include <rte_interrupts.h>
  48 #include <rte_log.h>
  49 #include <rte_debug.h>
  50 #include <rte_pci.h>
  51 #include <rte_atomic.h>
  52 #include <rte_branch_prediction.h>
  53 #include <rte_memory.h>
  54 #include <rte_memzone.h>
  55 #include <rte_eal.h>
  56 #include <rte_alarm.h>
  57 #include <rte_ether.h>
  58 #include <rte_ethdev.h>
  59 #include <rte_atomic.h>
  60 #include <rte_string_fns.h>
  61 #include <rte_malloc.h>
  62 #include <rte_dev.h>
  63
  64 #include "base/vmxnet3_defs.h"
  65
  66 #include "vmxnet3_ring.h"
  67 #include "vmxnet3_logs.h"
  68 #include "vmxnet3_ethdev.h"
  69
  70 #define PROCESS_SYS_EVENTS 0
  71
  72 #define VMXNET3_TX_MAX_SEG      UINT8_MAX
  73
  74 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  75 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  76 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  77 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  78 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  79 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  80 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  81 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  82 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  83 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  84 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  85 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  86                                    int wait_to_complete);
  87 static void vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  88                                   struct rte_eth_stats *stats);
  89 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  90                                  struct rte_eth_dev_info *dev_info);
  91 static const uint32_t *
  92 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
  93 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
  94                                        uint16_t vid, int on);
  95 static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  96 static void vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
  97                                  struct ether_addr *mac_addr);
  98
  99 #if PROCESS_SYS_EVENTS == 1
 100 static void vmxnet3_process_events(struct vmxnet3_hw *);
 101 #endif
 102 /*
 103  * The set of PCI devices this driver supports
 104  */
 105 #define VMWARE_PCI_VENDOR_ID 0x15AD
 106 #define VMWARE_DEV_ID_VMXNET3 0x07B0
 107 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
 108         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
 109         { .vendor_id = 0, /* sentinel */ },
 110 };
 111
 112 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
 113         .dev_configure        = vmxnet3_dev_configure,
 114         .dev_start            = vmxnet3_dev_start,
 115         .dev_stop             = vmxnet3_dev_stop,
 116         .dev_close            = vmxnet3_dev_close,
 117         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
 118         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
 119         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 120         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 121         .link_update          = vmxnet3_dev_link_update,
 122         .stats_get            = vmxnet3_dev_stats_get,
 123         .mac_addr_set         = vmxnet3_mac_addr_set,
 124         .dev_infos_get        = vmxnet3_dev_info_get,
 125         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
 126         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 127         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 128         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 129         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 130         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 131         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 132 };
 133
 134 static const struct rte_memzone *
 135 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 136                  const char *post_string, int socket_id,
 137                  uint16_t align, bool reuse)
 138 {
 139         char z_name[RTE_MEMZONE_NAMESIZE];
 140         const struct rte_memzone *mz;
 141
 142         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
 143                  dev->data->drv_name, dev->data->port_id, post_string);
 144
 145         mz = rte_memzone_lookup(z_name);
 146         if (!reuse) {
 147                 if (mz)
 148                         rte_memzone_free(mz);
 149                 return rte_memzone_reserve_aligned(z_name, size, socket_id,
 150                                                    0, align);
 151         }
 152
 153         if (mz)
 154                 return mz;
 155
 156         return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
 157 }
 158
 159 /**
 160  * Atomically reads the link status information from global
 161  * structure rte_eth_dev.
 162  *
 163  * @param dev
 164  *   - Pointer to the structure rte_eth_dev to read from.
 165  *   - Pointer to the buffer to be saved with the link status.
 166  *
 167  * @return
 168  *   - On success, zero.
 169  *   - On failure, negative value.
 170  */
 171
 172 static int
 173 vmxnet3_dev_atomic_read_link_status(struct rte_eth_dev *dev,
 174                                     struct rte_eth_link *link)
 175 {
 176         struct rte_eth_link *dst = link;
 177         struct rte_eth_link *src = &(dev->data->dev_link);
 178
 179         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 180                                 *(uint64_t *)src) == 0)
 181                 return -1;
 182
 183         return 0;
 184 }
 185
 186 /**
 187  * Atomically writes the link status information into global
 188  * structure rte_eth_dev.
 189  *
 190  * @param dev
 191  *   - Pointer to the structure rte_eth_dev to write to.
 192  *   - Pointer to the buffer to be saved with the link status.
 193  *
 194  * @return
 195  *   - On success, zero.
 196  *   - On failure, negative value.
 197  */
 198 static int
 199 vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
 200                                      struct rte_eth_link *link)
 201 {
 202         struct rte_eth_link *dst = &(dev->data->dev_link);
 203         struct rte_eth_link *src = link;
 204
 205         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 206                                 *(uint64_t *)src) == 0)
 207                 return -1;
 208
 209         return 0;
 210 }
 211
 212 /*
 213  * This function is based on vmxnet3_disable_intr()
 214  */
 215 static void
 216 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 217 {
 218         int i;
 219
 220         PMD_INIT_FUNC_TRACE();
 221
 222         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 223         for (i = 0; i < VMXNET3_MAX_INTRS; i++)
 224                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 225 }
 226
 227 /*
 228  * It returns 0 on success.
 229  */
 230 static int
 231 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 232 {
 233         struct rte_pci_device *pci_dev;
 234         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 235         uint32_t mac_hi, mac_lo, ver;
 236
 237         PMD_INIT_FUNC_TRACE();
 238
 239         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 240         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 241         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 242         eth_dev->tx_pkt_prepare = vmxnet3_prep_pkts;
 243         pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
 244
 245         /*
 246          * for secondary processes, we don't initialize any further as primary
 247          * has already done this work.
 248          */
 249         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 250                 return 0;
 251
 252         rte_eth_copy_pci_info(eth_dev, pci_dev);
 253
 254         /* Vendor and Device ID need to be set before init of shared code */
 255         hw->device_id = pci_dev->id.device_id;
 256         hw->vendor_id = pci_dev->id.vendor_id;
 257         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 258         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 259
 260         hw->num_rx_queues = 1;
 261         hw->num_tx_queues = 1;
 262         hw->bufs_per_pkt = 1;
 263
 264         /* Check h/w version compatibility with driver. */
 265         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 266         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 267         if (ver & 0x1)
 268                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS, 1);
 269         else {
 270                 PMD_INIT_LOG(ERR, "Incompatible h/w version, should be 0x1");
 271                 return -EIO;
 272         }
 273
 274         /* Check UPT version compatibility with driver. */
 275         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 276         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 277         if (ver & 0x1)
 278                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 279         else {
 280                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 281                 return -EIO;
 282         }
 283
 284         /* Getting MAC Address */
 285         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 286         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 287         memcpy(hw->perm_addr, &mac_lo, 4);
 288         memcpy(hw->perm_addr + 4, &mac_hi, 2);
 289
 290         /* Allocate memory for storing MAC addresses */
 291         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 292                                                VMXNET3_MAX_MAC_ADDRS, 0);
 293         if (eth_dev->data->mac_addrs == NULL) {
 294                 PMD_INIT_LOG(ERR,
 295                              "Failed to allocate %d bytes needed to store MAC addresses",
 296                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 297                 return -ENOMEM;
 298         }
 299         /* Copy the permanent MAC address */
 300         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 301                         &eth_dev->data->mac_addrs[0]);
 302
 303         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 304                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 305                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 306
 307         /* Put device in Quiesce Mode */
 308         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 309
 310         /* allow untagged pkts */
 311         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 312
 313         return 0;
 314 }
 315
 316 static int
 317 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 318 {
 319         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 320
 321         PMD_INIT_FUNC_TRACE();
 322
 323         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 324                 return 0;
 325
 326         if (hw->adapter_stopped == 0)
 327                 vmxnet3_dev_close(eth_dev);
 328
 329         eth_dev->dev_ops = NULL;
 330         eth_dev->rx_pkt_burst = NULL;
 331         eth_dev->tx_pkt_burst = NULL;
 332         eth_dev->tx_pkt_prepare = NULL;
 333
 334         rte_free(eth_dev->data->mac_addrs);
 335         eth_dev->data->mac_addrs = NULL;
 336
 337         return 0;
 338 }
 339
 340 static struct eth_driver rte_vmxnet3_pmd = {
 341         .pci_drv = {
 342                 .id_table = pci_id_vmxnet3_map,
 343                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,
 344                 .probe = rte_eth_dev_pci_probe,
 345                 .remove = rte_eth_dev_pci_remove,
 346         },
 347         .eth_dev_init = eth_vmxnet3_dev_init,
 348         .eth_dev_uninit = eth_vmxnet3_dev_uninit,
 349         .dev_private_size = sizeof(struct vmxnet3_hw),
 350 };
 351
 352 static int
 353 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 354 {
 355         const struct rte_memzone *mz;
 356         struct vmxnet3_hw *hw = dev->data->dev_private;
 357         size_t size;
 358
 359         PMD_INIT_FUNC_TRACE();
 360
 361         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
 362             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
 363                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
 364                 return -EINVAL;
 365         }
 366
 367         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
 368                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
 369                 return -EINVAL;
 370         }
 371
 372         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 373                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 374
 375         if (size > UINT16_MAX)
 376                 return -EINVAL;
 377
 378         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 379         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 380
 381         /*
 382          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 383          * on current socket
 384          */
 385         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 386                               "shared", rte_socket_id(), 8, 1);
 387
 388         if (mz == NULL) {
 389                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 390                 return -ENOMEM;
 391         }
 392         memset(mz->addr, 0, mz->len);
 393
 394         hw->shared = mz->addr;
 395         hw->sharedPA = mz->phys_addr;
 396
 397         /*
 398          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 399          * on current socket.
 400          *
 401          * We cannot reuse this memzone from previous allocation as its size
 402          * depends on the number of tx and rx queues, which could be different
 403          * from one config to another.
 404          */
 405         mz = gpa_zone_reserve(dev, size, "queuedesc", rte_socket_id(),
 406                               VMXNET3_QUEUE_DESC_ALIGN, 0);
 407         if (mz == NULL) {
 408                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 409                 return -ENOMEM;
 410         }
 411         memset(mz->addr, 0, mz->len);
 412
 413         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 414         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 415
 416         hw->queueDescPA = mz->phys_addr;
 417         hw->queue_desc_len = (uint16_t)size;
 418
 419         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 420                 /* Allocate memory structure for UPT1_RSSConf and configure */
 421                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf),
 422                                       "rss_conf", rte_socket_id(),
 423                                       RTE_CACHE_LINE_SIZE, 1);
 424                 if (mz == NULL) {
 425                         PMD_INIT_LOG(ERR,
 426                                      "ERROR: Creating rss_conf structure zone");
 427                         return -ENOMEM;
 428                 }
 429                 memset(mz->addr, 0, mz->len);
 430
 431                 hw->rss_conf = mz->addr;
 432                 hw->rss_confPA = mz->phys_addr;
 433         }
 434
 435         return 0;
 436 }
 437
 438 static void
 439 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
 440 {
 441         uint32_t val;
 442
 443         PMD_INIT_LOG(DEBUG,
 444                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 445                      addr[0], addr[1], addr[2],
 446                      addr[3], addr[4], addr[5]);
 447
 448         val = *(const uint32_t *)addr;
 449         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 450
 451         val = (addr[5] << 8) | addr[4];
 452         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 453 }
 454
 455 static int
 456 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 457 {
 458         struct rte_eth_conf port_conf = dev->data->dev_conf;
 459         struct vmxnet3_hw *hw = dev->data->dev_private;
 460         uint32_t mtu = dev->data->mtu;
 461         Vmxnet3_DriverShared *shared = hw->shared;
 462         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 463         uint32_t i;
 464         int ret;
 465
 466         shared->magic = VMXNET3_REV1_MAGIC;
 467         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 468
 469         /* Setting up Guest OS information */
 470         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 471                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64;
 472         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 473         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 474         devRead->misc.driverInfo.uptVerSpt     = 1;
 475
 476         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 477         devRead->misc.queueDescPA  = hw->queueDescPA;
 478         devRead->misc.queueDescLen = hw->queue_desc_len;
 479         devRead->misc.numTxQueues  = hw->num_tx_queues;
 480         devRead->misc.numRxQueues  = hw->num_rx_queues;
 481
 482         /*
 483          * Set number of interrupts to 1
 484          * PMD disables all the interrupts but this is MUST to activate device
 485          * It needs at least one interrupt for link events to handle
 486          * So we'll disable it later after device activation if needed
 487          */
 488         devRead->intrConf.numIntrs = 1;
 489         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 490
 491         for (i = 0; i < hw->num_tx_queues; i++) {
 492                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 493                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 494
 495                 tqd->ctrl.txNumDeferred  = 0;
 496                 tqd->ctrl.txThreshold    = 1;
 497                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 498                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 499                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 500
 501                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 502                 tqd->conf.compRingSize = txq->comp_ring.size;
 503                 tqd->conf.dataRingSize = txq->data_ring.size;
 504                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 505                 tqd->status.stopped    = TRUE;
 506                 tqd->status.error      = 0;
 507                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 508         }
 509
 510         for (i = 0; i < hw->num_rx_queues; i++) {
 511                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 512                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 513
 514                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 515                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 516                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 517
 518                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 519                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 520                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 521                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 522                 rqd->status.stopped       = TRUE;
 523                 rqd->status.error         = 0;
 524                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 525         }
 526
 527         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 528         devRead->rxFilterConf.rxMode = 0;
 529
 530         /* Setting up feature flags */
 531         if (dev->data->dev_conf.rxmode.hw_ip_checksum)
 532                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 533
 534         if (dev->data->dev_conf.rxmode.enable_lro) {
 535                 devRead->misc.uptFeatures |= VMXNET3_F_LRO;
 536                 devRead->misc.maxNumRxSG = 0;
 537         }
 538
 539         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 540                 ret = vmxnet3_rss_configure(dev);
 541                 if (ret != VMXNET3_SUCCESS)
 542                         return ret;
 543
 544                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 545                 devRead->rssConfDesc.confVer = 1;
 546                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 547                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 548         }
 549
 550         vmxnet3_dev_vlan_offload_set(dev,
 551                                      ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 552
 553         vmxnet3_write_mac(hw, hw->perm_addr);
 554
 555         return VMXNET3_SUCCESS;
 556 }
 557
 558 /*
 559  * Configure device link speed and setup link.
 560  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 561  * It returns 0 on success.
 562  */
 563 static int
 564 vmxnet3_dev_start(struct rte_eth_dev *dev)
 565 {
 566         int ret;
 567         struct vmxnet3_hw *hw = dev->data->dev_private;
 568
 569         PMD_INIT_FUNC_TRACE();
 570
 571         ret = vmxnet3_setup_driver_shared(dev);
 572         if (ret != VMXNET3_SUCCESS)
 573                 return ret;
 574
 575         /* Exchange shared data with device */
 576         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 577                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 578         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 579                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 580
 581         /* Activate device by register write */
 582         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 583         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 584
 585         if (ret != 0) {
 586                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 587                 return -EINVAL;
 588         }
 589
 590         /* Disable interrupts */
 591         vmxnet3_disable_intr(hw);
 592
 593         /*
 594          * Load RX queues with blank mbufs and update next2fill index for device
 595          * Update RxMode of the device
 596          */
 597         ret = vmxnet3_dev_rxtx_init(dev);
 598         if (ret != VMXNET3_SUCCESS) {
 599                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
 600                 return ret;
 601         }
 602
 603         /* Setting proper Rx Mode and issue Rx Mode Update command */
 604         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 605
 606         /*
 607          * Don't need to handle events for now
 608          */
 609 #if PROCESS_SYS_EVENTS == 1
 610         events = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_ECR);
 611         PMD_INIT_LOG(DEBUG, "Reading events: 0x%X", events);
 612         vmxnet3_process_events(hw);
 613 #endif
 614         return VMXNET3_SUCCESS;
 615 }
 616
 617 /*
 618  * Stop device: disable rx and tx functions to allow for reconfiguring.
 619  */
 620 static void
 621 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 622 {
 623         struct rte_eth_link link;
 624         struct vmxnet3_hw *hw = dev->data->dev_private;
 625
 626         PMD_INIT_FUNC_TRACE();
 627
 628         if (hw->adapter_stopped == 1) {
 629                 PMD_INIT_LOG(DEBUG, "Device already closed.");
 630                 return;
 631         }
 632
 633         /* disable interrupts */
 634         vmxnet3_disable_intr(hw);
 635
 636         /* quiesce the device first */
 637         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 638         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 639         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 640
 641         /* reset the device */
 642         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 643         PMD_INIT_LOG(DEBUG, "Device reset.");
 644         hw->adapter_stopped = 0;
 645
 646         vmxnet3_dev_clear_queues(dev);
 647
 648         /* Clear recorded link status */
 649         memset(&link, 0, sizeof(link));
 650         vmxnet3_dev_atomic_write_link_status(dev, &link);
 651 }
 652
 653 /*
 654  * Reset and stop device.
 655  */
 656 static void
 657 vmxnet3_dev_close(struct rte_eth_dev *dev)
 658 {
 659         struct vmxnet3_hw *hw = dev->data->dev_private;
 660
 661         PMD_INIT_FUNC_TRACE();
 662
 663         vmxnet3_dev_stop(dev);
 664         hw->adapter_stopped = 1;
 665 }
 666
 667 static void
 668 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 669 {
 670         unsigned int i;
 671         struct vmxnet3_hw *hw = dev->data->dev_private;
 672
 673         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 674
 675         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 676         for (i = 0; i < hw->num_tx_queues; i++) {
 677                 struct UPT1_TxStats *txStats = &hw->tqd_start[i].stats;
 678
 679                 stats->q_opackets[i] = txStats->ucastPktsTxOK +
 680                                         txStats->mcastPktsTxOK +
 681                                         txStats->bcastPktsTxOK;
 682                 stats->q_obytes[i] = txStats->ucastBytesTxOK +
 683                                         txStats->mcastBytesTxOK +
 684                                         txStats->bcastBytesTxOK;
 685
 686                 stats->opackets += stats->q_opackets[i];
 687                 stats->obytes += stats->q_obytes[i];
 688                 stats->oerrors += txStats->pktsTxError + txStats->pktsTxDiscard;
 689         }
 690
 691         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
 692         for (i = 0; i < hw->num_rx_queues; i++) {
 693                 struct UPT1_RxStats *rxStats = &hw->rqd_start[i].stats;
 694
 695                 stats->q_ipackets[i] = rxStats->ucastPktsRxOK +
 696                                         rxStats->mcastPktsRxOK +
 697                                         rxStats->bcastPktsRxOK;
 698
 699                 stats->q_ibytes[i] = rxStats->ucastBytesRxOK +
 700                                         rxStats->mcastBytesRxOK +
 701                                         rxStats->bcastBytesRxOK;
 702
 703                 stats->ipackets += stats->q_ipackets[i];
 704                 stats->ibytes += stats->q_ibytes[i];
 705
 706                 stats->q_errors[i] = rxStats->pktsRxError;
 707                 stats->ierrors += rxStats->pktsRxError;
 708                 stats->rx_nombuf += rxStats->pktsRxOutOfBuf;
 709         }
 710 }
 711
 712 static void
 713 vmxnet3_dev_info_get(struct rte_eth_dev *dev,
 714                      struct rte_eth_dev_info *dev_info)
 715 {
 716         dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device);
 717
 718         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
 719         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
 720         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
 721         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
 722         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
 723
 724         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
 725         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
 726
 727         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 728                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
 729                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
 730                 .nb_align = 1,
 731         };
 732
 733         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 734                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
 735                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
 736                 .nb_align = 1,
 737                 .nb_seg_max = VMXNET3_TX_MAX_SEG,
 738                 .nb_mtu_seg_max = VMXNET3_MAX_TXD_PER_PKT,
 739         };
 740
 741         dev_info->rx_offload_capa =
 742                 DEV_RX_OFFLOAD_VLAN_STRIP |
 743                 DEV_RX_OFFLOAD_UDP_CKSUM |
 744                 DEV_RX_OFFLOAD_TCP_CKSUM |
 745                 DEV_RX_OFFLOAD_TCP_LRO;
 746
 747         dev_info->tx_offload_capa =
 748                 DEV_TX_OFFLOAD_VLAN_INSERT |
 749                 DEV_TX_OFFLOAD_TCP_CKSUM |
 750                 DEV_TX_OFFLOAD_UDP_CKSUM |
 751                 DEV_TX_OFFLOAD_TCP_TSO;
 752 }
 753
 754 static const uint32_t *
 755 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 756 {
 757         static const uint32_t ptypes[] = {
 758                 RTE_PTYPE_L3_IPV4_EXT,
 759                 RTE_PTYPE_L3_IPV4,
 760                 RTE_PTYPE_UNKNOWN
 761         };
 762
 763         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
 764                 return ptypes;
 765         return NULL;
 766 }
 767
 768 static void
 769 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
 770 {
 771         struct vmxnet3_hw *hw = dev->data->dev_private;
 772
 773         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
 774 }
 775
 776 /* return 0 means link status changed, -1 means not changed */
 777 static int
 778 vmxnet3_dev_link_update(struct rte_eth_dev *dev,
 779                         __rte_unused int wait_to_complete)
 780 {
 781         struct vmxnet3_hw *hw = dev->data->dev_private;
 782         struct rte_eth_link old, link;
 783         uint32_t ret;
 784
 785         /* Link status doesn't change for stopped dev */
 786         if (dev->data->dev_started == 0)
 787                 return -1;
 788
 789         memset(&link, 0, sizeof(link));
 790         vmxnet3_dev_atomic_read_link_status(dev, &old);
 791
 792         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
 793         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 794
 795         if (ret & 0x1) {
 796                 link.link_status = ETH_LINK_UP;
 797                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
 798                 link.link_speed = ETH_SPEED_NUM_10G;
 799                 link.link_autoneg = ETH_LINK_SPEED_FIXED;
 800         }
 801
 802         vmxnet3_dev_atomic_write_link_status(dev, &link);
 803
 804         return (old.link_status == link.link_status) ? -1 : 0;
 805 }
 806
 807 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
 808 static void
 809 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set)
 810 {
 811         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
 812
 813         if (set)
 814                 rxConf->rxMode = rxConf->rxMode | feature;
 815         else
 816                 rxConf->rxMode = rxConf->rxMode & (~feature);
 817
 818         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
 819 }
 820
 821 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 822 static void
 823 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
 824 {
 825         struct vmxnet3_hw *hw = dev->data->dev_private;
 826         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 827
 828         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
 829         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
 830
 831         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 832                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 833 }
 834
 835 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 836 static void
 837 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
 838 {
 839         struct vmxnet3_hw *hw = dev->data->dev_private;
 840         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 841
 842         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
 843         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
 844         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 845                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 846 }
 847
 848 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
 849 static void
 850 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
 851 {
 852         struct vmxnet3_hw *hw = dev->data->dev_private;
 853
 854         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
 855 }
 856
 857 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
 858 static void
 859 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
 860 {
 861         struct vmxnet3_hw *hw = dev->data->dev_private;
 862
 863         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
 864 }
 865
 866 /* Enable/disable filter on vlan */
 867 static int
 868 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
 869 {
 870         struct vmxnet3_hw *hw = dev->data->dev_private;
 871         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
 872         uint32_t *vf_table = rxConf->vfTable;
 873
 874         /* save state for restore */
 875         if (on)
 876                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
 877         else
 878                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
 879
 880         /* don't change active filter if in promiscuous mode */
 881         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
 882                 return 0;
 883
 884         /* set in hardware */
 885         if (on)
 886                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
 887         else
 888                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
 889
 890         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 891                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 892         return 0;
 893 }
 894
 895 static void
 896 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 897 {
 898         struct vmxnet3_hw *hw = dev->data->dev_private;
 899         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
 900         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
 901
 902         if (mask & ETH_VLAN_STRIP_MASK) {
 903                 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
 904                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
 905                 else
 906                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
 907
 908                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 909                                        VMXNET3_CMD_UPDATE_FEATURE);
 910         }
 911
 912         if (mask & ETH_VLAN_FILTER_MASK) {
 913                 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
 914                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
 915                 else
 916                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
 917
 918                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 919                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 920         }
 921 }
 922
 923 #if PROCESS_SYS_EVENTS == 1
 924 static void
 925 vmxnet3_process_events(struct vmxnet3_hw *hw)
 926 {
 927         uint32_t events = hw->shared->ecr;
 928
 929         if (!events) {
 930                 PMD_INIT_LOG(ERR, "No events to process");
 931                 return;
 932         }
 933
 934         /*
 935          * ECR bits when written with 1b are cleared. Hence write
 936          * events back to ECR so that the bits which were set will be reset.
 937          */
 938         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
 939
 940         /* Check if link state has changed */
 941         if (events & VMXNET3_ECR_LINK)
 942                 PMD_INIT_LOG(ERR,
 943                              "Process events in %s(): VMXNET3_ECR_LINK event",
 944                              __func__);
 945
 946         /* Check if there is an error on xmit/recv queues */
 947         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
 948                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 949                                        VMXNET3_CMD_GET_QUEUE_STATUS);
 950
 951                 if (hw->tqd_start->status.stopped)
 952                         PMD_INIT_LOG(ERR, "tq error 0x%x",
 953                                      hw->tqd_start->status.error);
 954
 955                 if (hw->rqd_start->status.stopped)
 956                         PMD_INIT_LOG(ERR, "rq error 0x%x",
 957                                      hw->rqd_start->status.error);
 958
 959                 /* Reset the device */
 960                 /* Have to reset the device */
 961         }
 962
 963         if (events & VMXNET3_ECR_DIC)
 964                 PMD_INIT_LOG(ERR, "Device implementation change event.");
 965
 966         if (events & VMXNET3_ECR_DEBUG)
 967                 PMD_INIT_LOG(ERR, "Debug event generated by device.");
 968 }
 969 #endif
 970
 971 RTE_PMD_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd.pci_drv);
 972 RTE_PMD_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);
 973 RTE_PMD_REGISTER_KMOD_DEP(net_vmxnet3, "* igb_uio | uio_pci_generic | vfio");