drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2015 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <fcntl.h>
  13 #include <inttypes.h>
  14 #include <rte_byteorder.h>
  15 #include <rte_common.h>
  16 #include <rte_cycles.h>
  17
  18 #include <rte_interrupts.h>
  19 #include <rte_log.h>
  20 #include <rte_debug.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_atomic.h>
  24 #include <rte_branch_prediction.h>
  25 #include <rte_memory.h>
  26 #include <rte_memzone.h>
  27 #include <rte_eal.h>
  28 #include <rte_alarm.h>
  29 #include <rte_ether.h>
  30 #include <rte_ethdev.h>
  31 #include <rte_ethdev_pci.h>
  32 #include <rte_string_fns.h>
  33 #include <rte_malloc.h>
  34 #include <rte_dev.h>
  35
  36 #include "base/vmxnet3_defs.h"
  37
  38 #include "vmxnet3_ring.h"
  39 #include "vmxnet3_logs.h"
  40 #include "vmxnet3_ethdev.h"
  41
  42 #define PROCESS_SYS_EVENTS 0
  43
  44 #define VMXNET3_TX_MAX_SEG      UINT8_MAX
  45
  46 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  47 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  48 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  49 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  50 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  51 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  52 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  53 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  54 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  55 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  56 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  57 static int __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  58                                      int wait_to_complete);
  59 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  60                                    int wait_to_complete);
  61 static void vmxnet3_hw_stats_save(struct vmxnet3_hw *hw);
  62 static int vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  63                                   struct rte_eth_stats *stats);
  64 static int vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
  65                                         struct rte_eth_xstat_name *xstats,
  66                                         unsigned int n);
  67 static int vmxnet3_dev_xstats_get(struct rte_eth_dev *dev,
  68                                   struct rte_eth_xstat *xstats, unsigned int n);
  69 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  70                                  struct rte_eth_dev_info *dev_info);
  71 static const uint32_t *
  72 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
  73 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
  74                                        uint16_t vid, int on);
  75 static int vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  76 static void vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
  77                                  struct ether_addr *mac_addr);
  78 static void vmxnet3_interrupt_handler(void *param);
  79
  80 int vmxnet3_logtype_init;
  81 int vmxnet3_logtype_driver;
  82
  83 /*
  84  * The set of PCI devices this driver supports
  85  */
  86 #define VMWARE_PCI_VENDOR_ID 0x15AD
  87 #define VMWARE_DEV_ID_VMXNET3 0x07B0
  88 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
  89         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
  90         { .vendor_id = 0, /* sentinel */ },
  91 };
  92
  93 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
  94         .dev_configure        = vmxnet3_dev_configure,
  95         .dev_start            = vmxnet3_dev_start,
  96         .dev_stop             = vmxnet3_dev_stop,
  97         .dev_close            = vmxnet3_dev_close,
  98         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
  99         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
 100         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 101         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 102         .link_update          = vmxnet3_dev_link_update,
 103         .stats_get            = vmxnet3_dev_stats_get,
 104         .xstats_get_names     = vmxnet3_dev_xstats_get_names,
 105         .xstats_get           = vmxnet3_dev_xstats_get,
 106         .mac_addr_set         = vmxnet3_mac_addr_set,
 107         .dev_infos_get        = vmxnet3_dev_info_get,
 108         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
 109         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 110         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 111         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 112         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 113         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 114         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 115 };
 116
 117 struct vmxnet3_xstats_name_off {
 118         char name[RTE_ETH_XSTATS_NAME_SIZE];
 119         unsigned int offset;
 120 };
 121
 122 /* tx_qX_ is prepended to the name string here */
 123 static const struct vmxnet3_xstats_name_off vmxnet3_txq_stat_strings[] = {
 124         {"drop_total",         offsetof(struct vmxnet3_txq_stats, drop_total)},
 125         {"drop_too_many_segs", offsetof(struct vmxnet3_txq_stats, drop_too_many_segs)},
 126         {"drop_tso",           offsetof(struct vmxnet3_txq_stats, drop_tso)},
 127         {"tx_ring_full",       offsetof(struct vmxnet3_txq_stats, tx_ring_full)},
 128 };
 129
 130 /* rx_qX_ is prepended to the name string here */
 131 static const struct vmxnet3_xstats_name_off vmxnet3_rxq_stat_strings[] = {
 132         {"drop_total",           offsetof(struct vmxnet3_rxq_stats, drop_total)},
 133         {"drop_err",             offsetof(struct vmxnet3_rxq_stats, drop_err)},
 134         {"drop_fcs",             offsetof(struct vmxnet3_rxq_stats, drop_fcs)},
 135         {"rx_buf_alloc_failure", offsetof(struct vmxnet3_rxq_stats, rx_buf_alloc_failure)},
 136 };
 137
 138 static const struct rte_memzone *
 139 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 140                  const char *post_string, int socket_id,
 141                  uint16_t align, bool reuse)
 142 {
 143         char z_name[RTE_MEMZONE_NAMESIZE];
 144         const struct rte_memzone *mz;
 145
 146         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
 147                  dev->device->driver->name, dev->data->port_id, post_string);
 148
 149         mz = rte_memzone_lookup(z_name);
 150         if (!reuse) {
 151                 if (mz)
 152                         rte_memzone_free(mz);
 153                 return rte_memzone_reserve_aligned(z_name, size, socket_id,
 154                                                    0, align);
 155         }
 156
 157         if (mz)
 158                 return mz;
 159
 160         return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
 161 }
 162
 163 /**
 164  * Atomically reads the link status information from global
 165  * structure rte_eth_dev.
 166  *
 167  * @param dev
 168  *   - Pointer to the structure rte_eth_dev to read from.
 169  *   - Pointer to the buffer to be saved with the link status.
 170  *
 171  * @return
 172  *   - On success, zero.
 173  *   - On failure, negative value.
 174  */
 175
 176 static int
 177 vmxnet3_dev_atomic_read_link_status(struct rte_eth_dev *dev,
 178                                     struct rte_eth_link *link)
 179 {
 180         struct rte_eth_link *dst = link;
 181         struct rte_eth_link *src = &(dev->data->dev_link);
 182
 183         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 184                                 *(uint64_t *)src) == 0)
 185                 return -1;
 186
 187         return 0;
 188 }
 189
 190 /**
 191  * Atomically writes the link status information into global
 192  * structure rte_eth_dev.
 193  *
 194  * @param dev
 195  *   - Pointer to the structure rte_eth_dev to write to.
 196  *   - Pointer to the buffer to be saved with the link status.
 197  *
 198  * @return
 199  *   - On success, zero.
 200  *   - On failure, negative value.
 201  */
 202 static int
 203 vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
 204                                      struct rte_eth_link *link)
 205 {
 206         struct rte_eth_link *dst = &(dev->data->dev_link);
 207         struct rte_eth_link *src = link;
 208
 209         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 210                                 *(uint64_t *)src) == 0)
 211                 return -1;
 212
 213         return 0;
 214 }
 215
 216 /*
 217  * This function is based on vmxnet3_disable_intr()
 218  */
 219 static void
 220 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 221 {
 222         int i;
 223
 224         PMD_INIT_FUNC_TRACE();
 225
 226         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 227         for (i = 0; i < hw->num_intrs; i++)
 228                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 229 }
 230
 231 static void
 232 vmxnet3_enable_intr(struct vmxnet3_hw *hw)
 233 {
 234         int i;
 235
 236         PMD_INIT_FUNC_TRACE();
 237
 238         hw->shared->devRead.intrConf.intrCtrl &= ~VMXNET3_IC_DISABLE_ALL;
 239         for (i = 0; i < hw->num_intrs; i++)
 240                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 0);
 241 }
 242
 243 /*
 244  * Gets tx data ring descriptor size.
 245  */
 246 static uint16_t
 247 eth_vmxnet3_txdata_get(struct vmxnet3_hw *hw)
 248 {
 249         uint16 txdata_desc_size;
 250
 251         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 252                                VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
 253         txdata_desc_size = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 254
 255         return (txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE ||
 256                 txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE ||
 257                 txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK) ?
 258                 sizeof(struct Vmxnet3_TxDataDesc) : txdata_desc_size;
 259 }
 260
 261 /*
 262  * It returns 0 on success.
 263  */
 264 static int
 265 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 266 {
 267         struct rte_pci_device *pci_dev;
 268         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 269         uint32_t mac_hi, mac_lo, ver;
 270
 271         PMD_INIT_FUNC_TRACE();
 272
 273         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 274         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 275         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 276         eth_dev->tx_pkt_prepare = vmxnet3_prep_pkts;
 277         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 278
 279         /*
 280          * for secondary processes, we don't initialize any further as primary
 281          * has already done this work.
 282          */
 283         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 284                 return 0;
 285
 286         rte_eth_copy_pci_info(eth_dev, pci_dev);
 287
 288         /* Vendor and Device ID need to be set before init of shared code */
 289         hw->device_id = pci_dev->id.device_id;
 290         hw->vendor_id = pci_dev->id.vendor_id;
 291         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 292         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 293
 294         hw->num_rx_queues = 1;
 295         hw->num_tx_queues = 1;
 296         hw->bufs_per_pkt = 1;
 297
 298         /* Check h/w version compatibility with driver. */
 299         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 300         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 301
 302         if (ver & (1 << VMXNET3_REV_3)) {
 303                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 304                                        1 << VMXNET3_REV_3);
 305                 hw->version = VMXNET3_REV_3 + 1;
 306         } else if (ver & (1 << VMXNET3_REV_2)) {
 307                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 308                                        1 << VMXNET3_REV_2);
 309                 hw->version = VMXNET3_REV_2 + 1;
 310         } else if (ver & (1 << VMXNET3_REV_1)) {
 311                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 312                                        1 << VMXNET3_REV_1);
 313                 hw->version = VMXNET3_REV_1 + 1;
 314         } else {
 315                 PMD_INIT_LOG(ERR, "Incompatible hardware version: %d", ver);
 316                 return -EIO;
 317         }
 318
 319         PMD_INIT_LOG(DEBUG, "Using device version %d\n", hw->version);
 320
 321         /* Check UPT version compatibility with driver. */
 322         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 323         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 324         if (ver & 0x1)
 325                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 326         else {
 327                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 328                 return -EIO;
 329         }
 330
 331         /* Getting MAC Address */
 332         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 333         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 334         memcpy(hw->perm_addr, &mac_lo, 4);
 335         memcpy(hw->perm_addr + 4, &mac_hi, 2);
 336
 337         /* Allocate memory for storing MAC addresses */
 338         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 339                                                VMXNET3_MAX_MAC_ADDRS, 0);
 340         if (eth_dev->data->mac_addrs == NULL) {
 341                 PMD_INIT_LOG(ERR,
 342                              "Failed to allocate %d bytes needed to store MAC addresses",
 343                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 344                 return -ENOMEM;
 345         }
 346         /* Copy the permanent MAC address */
 347         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 348                         &eth_dev->data->mac_addrs[0]);
 349
 350         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 351                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 352                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 353
 354         /* Put device in Quiesce Mode */
 355         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 356
 357         /* allow untagged pkts */
 358         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 359
 360         hw->txdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 361                 eth_vmxnet3_txdata_get(hw) : sizeof(struct Vmxnet3_TxDataDesc);
 362
 363         hw->rxdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 364                 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
 365         RTE_ASSERT((hw->rxdata_desc_size & ~VMXNET3_RXDATA_DESC_SIZE_MASK) ==
 366                    hw->rxdata_desc_size);
 367
 368         /* clear shadow stats */
 369         memset(hw->saved_tx_stats, 0, sizeof(hw->saved_tx_stats));
 370         memset(hw->saved_rx_stats, 0, sizeof(hw->saved_rx_stats));
 371
 372         return 0;
 373 }
 374
 375 static int
 376 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 377 {
 378         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 379
 380         PMD_INIT_FUNC_TRACE();
 381
 382         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 383                 return 0;
 384
 385         if (hw->adapter_stopped == 0)
 386                 vmxnet3_dev_close(eth_dev);
 387
 388         eth_dev->dev_ops = NULL;
 389         eth_dev->rx_pkt_burst = NULL;
 390         eth_dev->tx_pkt_burst = NULL;
 391         eth_dev->tx_pkt_prepare = NULL;
 392
 393         rte_free(eth_dev->data->mac_addrs);
 394         eth_dev->data->mac_addrs = NULL;
 395
 396         return 0;
 397 }
 398
 399 static int eth_vmxnet3_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 400         struct rte_pci_device *pci_dev)
 401 {
 402         return rte_eth_dev_pci_generic_probe(pci_dev,
 403                 sizeof(struct vmxnet3_hw), eth_vmxnet3_dev_init);
 404 }
 405
 406 static int eth_vmxnet3_pci_remove(struct rte_pci_device *pci_dev)
 407 {
 408         return rte_eth_dev_pci_generic_remove(pci_dev, eth_vmxnet3_dev_uninit);
 409 }
 410
 411 static struct rte_pci_driver rte_vmxnet3_pmd = {
 412         .id_table = pci_id_vmxnet3_map,
 413         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
 414         .probe = eth_vmxnet3_pci_probe,
 415         .remove = eth_vmxnet3_pci_remove,
 416 };
 417
 418 static int
 419 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 420 {
 421         const struct rte_memzone *mz;
 422         struct vmxnet3_hw *hw = dev->data->dev_private;
 423         size_t size;
 424
 425         PMD_INIT_FUNC_TRACE();
 426
 427         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
 428             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
 429                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
 430                 return -EINVAL;
 431         }
 432
 433         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
 434                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
 435                 return -EINVAL;
 436         }
 437
 438         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 439                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 440
 441         if (size > UINT16_MAX)
 442                 return -EINVAL;
 443
 444         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 445         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 446
 447         /*
 448          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 449          * on current socket
 450          */
 451         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 452                               "shared", rte_socket_id(), 8, 1);
 453
 454         if (mz == NULL) {
 455                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 456                 return -ENOMEM;
 457         }
 458         memset(mz->addr, 0, mz->len);
 459
 460         hw->shared = mz->addr;
 461         hw->sharedPA = mz->iova;
 462
 463         /*
 464          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 465          * on current socket.
 466          *
 467          * We cannot reuse this memzone from previous allocation as its size
 468          * depends on the number of tx and rx queues, which could be different
 469          * from one config to another.
 470          */
 471         mz = gpa_zone_reserve(dev, size, "queuedesc", rte_socket_id(),
 472                               VMXNET3_QUEUE_DESC_ALIGN, 0);
 473         if (mz == NULL) {
 474                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 475                 return -ENOMEM;
 476         }
 477         memset(mz->addr, 0, mz->len);
 478
 479         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 480         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 481
 482         hw->queueDescPA = mz->iova;
 483         hw->queue_desc_len = (uint16_t)size;
 484
 485         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 486                 /* Allocate memory structure for UPT1_RSSConf and configure */
 487                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf),
 488                                       "rss_conf", rte_socket_id(),
 489                                       RTE_CACHE_LINE_SIZE, 1);
 490                 if (mz == NULL) {
 491                         PMD_INIT_LOG(ERR,
 492                                      "ERROR: Creating rss_conf structure zone");
 493                         return -ENOMEM;
 494                 }
 495                 memset(mz->addr, 0, mz->len);
 496
 497                 hw->rss_conf = mz->addr;
 498                 hw->rss_confPA = mz->iova;
 499         }
 500
 501         return 0;
 502 }
 503
 504 static void
 505 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
 506 {
 507         uint32_t val;
 508
 509         PMD_INIT_LOG(DEBUG,
 510                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 511                      addr[0], addr[1], addr[2],
 512                      addr[3], addr[4], addr[5]);
 513
 514         memcpy(&val, addr, 4);
 515         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 516
 517         memcpy(&val, addr + 4, 2);
 518         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 519 }
 520
 521 static int
 522 vmxnet3_dev_setup_memreg(struct rte_eth_dev *dev)
 523 {
 524         struct vmxnet3_hw *hw = dev->data->dev_private;
 525         Vmxnet3_DriverShared *shared = hw->shared;
 526         Vmxnet3_CmdInfo *cmdInfo;
 527         struct rte_mempool *mp[VMXNET3_MAX_RX_QUEUES];
 528         uint8_t index[VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES];
 529         uint32_t num, i, j, size;
 530
 531         if (hw->memRegsPA == 0) {
 532                 const struct rte_memzone *mz;
 533
 534                 size = sizeof(Vmxnet3_MemRegs) +
 535                         (VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES) *
 536                         sizeof(Vmxnet3_MemoryRegion);
 537
 538                 mz = gpa_zone_reserve(dev, size, "memRegs", rte_socket_id(), 8,
 539                                       1);
 540                 if (mz == NULL) {
 541                         PMD_INIT_LOG(ERR, "ERROR: Creating memRegs zone");
 542                         return -ENOMEM;
 543                 }
 544                 memset(mz->addr, 0, mz->len);
 545                 hw->memRegs = mz->addr;
 546                 hw->memRegsPA = mz->iova;
 547         }
 548
 549         num = hw->num_rx_queues;
 550
 551         for (i = 0; i < num; i++) {
 552                 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
 553
 554                 mp[i] = rxq->mp;
 555                 index[i] = 1 << i;
 556         }
 557
 558         /*
 559          * The same mempool could be used by multiple queues. In such a case,
 560          * remove duplicate mempool entries. Only one entry is kept with
 561          * bitmask indicating queues that are using this mempool.
 562          */
 563         for (i = 1; i < num; i++) {
 564                 for (j = 0; j < i; j++) {
 565                         if (mp[i] == mp[j]) {
 566                                 mp[i] = NULL;
 567                                 index[j] |= 1 << i;
 568                                 break;
 569                         }
 570                 }
 571         }
 572
 573         j = 0;
 574         for (i = 0; i < num; i++) {
 575                 if (mp[i] == NULL)
 576                         continue;
 577
 578                 Vmxnet3_MemoryRegion *mr = &hw->memRegs->memRegs[j];
 579
 580                 mr->startPA =
 581                         (uintptr_t)STAILQ_FIRST(&mp[i]->mem_list)->iova;
 582                 mr->length = STAILQ_FIRST(&mp[i]->mem_list)->len <= INT32_MAX ?
 583                         STAILQ_FIRST(&mp[i]->mem_list)->len : INT32_MAX;
 584                 mr->txQueueBits = index[i];
 585                 mr->rxQueueBits = index[i];
 586
 587                 PMD_INIT_LOG(INFO,
 588                              "index: %u startPA: %" PRIu64 " length: %u, "
 589                              "rxBits: %x",
 590                              j, mr->startPA, mr->length, mr->rxQueueBits);
 591                 j++;
 592         }
 593         hw->memRegs->numRegs = j;
 594         PMD_INIT_LOG(INFO, "numRegs: %u", j);
 595
 596         size = sizeof(Vmxnet3_MemRegs) +
 597                 (j - 1) * sizeof(Vmxnet3_MemoryRegion);
 598
 599         cmdInfo = &shared->cu.cmdInfo;
 600         cmdInfo->varConf.confVer = 1;
 601         cmdInfo->varConf.confLen = size;
 602         cmdInfo->varConf.confPA = hw->memRegsPA;
 603
 604         return 0;
 605 }
 606
 607 static int
 608 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 609 {
 610         struct rte_eth_conf port_conf = dev->data->dev_conf;
 611         struct vmxnet3_hw *hw = dev->data->dev_private;
 612         uint32_t mtu = dev->data->mtu;
 613         Vmxnet3_DriverShared *shared = hw->shared;
 614         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 615         uint32_t i;
 616         int ret;
 617
 618         shared->magic = VMXNET3_REV1_MAGIC;
 619         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 620
 621         /* Setting up Guest OS information */
 622         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 623                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64;
 624         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 625         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 626         devRead->misc.driverInfo.uptVerSpt     = 1;
 627
 628         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 629         devRead->misc.queueDescPA  = hw->queueDescPA;
 630         devRead->misc.queueDescLen = hw->queue_desc_len;
 631         devRead->misc.numTxQueues  = hw->num_tx_queues;
 632         devRead->misc.numRxQueues  = hw->num_rx_queues;
 633
 634         /*
 635          * Set number of interrupts to 1
 636          * PMD by default disables all the interrupts but this is MUST
 637          * to activate device. It needs at least one interrupt for
 638          * link events to handle
 639          */
 640         hw->num_intrs = devRead->intrConf.numIntrs = 1;
 641         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 642
 643         for (i = 0; i < hw->num_tx_queues; i++) {
 644                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 645                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 646
 647                 tqd->ctrl.txNumDeferred  = 0;
 648                 tqd->ctrl.txThreshold    = 1;
 649                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 650                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 651                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 652
 653                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 654                 tqd->conf.compRingSize = txq->comp_ring.size;
 655                 tqd->conf.dataRingSize = txq->data_ring.size;
 656                 tqd->conf.txDataRingDescSize = txq->txdata_desc_size;
 657                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 658                 tqd->status.stopped    = TRUE;
 659                 tqd->status.error      = 0;
 660                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 661         }
 662
 663         for (i = 0; i < hw->num_rx_queues; i++) {
 664                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 665                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 666
 667                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 668                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 669                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 670
 671                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 672                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 673                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 674                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 675                 if (VMXNET3_VERSION_GE_3(hw)) {
 676                         rqd->conf.rxDataRingBasePA = rxq->data_ring.basePA;
 677                         rqd->conf.rxDataRingDescSize = rxq->data_desc_size;
 678                 }
 679                 rqd->status.stopped       = TRUE;
 680                 rqd->status.error         = 0;
 681                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 682         }
 683
 684         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 685         devRead->rxFilterConf.rxMode = 0;
 686
 687         /* Setting up feature flags */
 688         if (dev->data->dev_conf.rxmode.hw_ip_checksum)
 689                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 690
 691         if (dev->data->dev_conf.rxmode.enable_lro) {
 692                 devRead->misc.uptFeatures |= VMXNET3_F_LRO;
 693                 devRead->misc.maxNumRxSG = 0;
 694         }
 695
 696         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 697                 ret = vmxnet3_rss_configure(dev);
 698                 if (ret != VMXNET3_SUCCESS)
 699                         return ret;
 700
 701                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 702                 devRead->rssConfDesc.confVer = 1;
 703                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 704                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 705         }
 706
 707         ret = vmxnet3_dev_vlan_offload_set(dev,
 708                         ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 709         if (ret)
 710                 return ret;
 711
 712         vmxnet3_write_mac(hw, dev->data->mac_addrs->addr_bytes);
 713
 714         return VMXNET3_SUCCESS;
 715 }
 716
 717 /*
 718  * Configure device link speed and setup link.
 719  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 720  * It returns 0 on success.
 721  */
 722 static int
 723 vmxnet3_dev_start(struct rte_eth_dev *dev)
 724 {
 725         int ret;
 726         struct vmxnet3_hw *hw = dev->data->dev_private;
 727
 728         PMD_INIT_FUNC_TRACE();
 729
 730         /* Save stats before it is reset by CMD_ACTIVATE */
 731         vmxnet3_hw_stats_save(hw);
 732
 733         ret = vmxnet3_setup_driver_shared(dev);
 734         if (ret != VMXNET3_SUCCESS)
 735                 return ret;
 736
 737         /* check if lsc interrupt feature is enabled */
 738         if (dev->data->dev_conf.intr_conf.lsc) {
 739                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 740
 741                 /* Setup interrupt callback  */
 742                 rte_intr_callback_register(&pci_dev->intr_handle,
 743                                            vmxnet3_interrupt_handler, dev);
 744
 745                 if (rte_intr_enable(&pci_dev->intr_handle) < 0) {
 746                         PMD_INIT_LOG(ERR, "interrupt enable failed");
 747                         return -EIO;
 748                 }
 749         }
 750
 751         /* Exchange shared data with device */
 752         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 753                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 754         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 755                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 756
 757         /* Activate device by register write */
 758         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 759         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 760
 761         if (ret != 0) {
 762                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 763                 return -EINVAL;
 764         }
 765
 766         /* Setup memory region for rx buffers */
 767         ret = vmxnet3_dev_setup_memreg(dev);
 768         if (ret == 0) {
 769                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 770                                        VMXNET3_CMD_REGISTER_MEMREGS);
 771                 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 772                 if (ret != 0)
 773                         PMD_INIT_LOG(DEBUG,
 774                                      "Failed in setup memory region cmd\n");
 775                 ret = 0;
 776         } else {
 777                 PMD_INIT_LOG(DEBUG, "Failed to setup memory region\n");
 778         }
 779
 780         /* Disable interrupts */
 781         vmxnet3_disable_intr(hw);
 782
 783         /*
 784          * Load RX queues with blank mbufs and update next2fill index for device
 785          * Update RxMode of the device
 786          */
 787         ret = vmxnet3_dev_rxtx_init(dev);
 788         if (ret != VMXNET3_SUCCESS) {
 789                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
 790                 return ret;
 791         }
 792
 793         hw->adapter_stopped = FALSE;
 794
 795         /* Setting proper Rx Mode and issue Rx Mode Update command */
 796         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 797
 798         if (dev->data->dev_conf.intr_conf.lsc) {
 799                 vmxnet3_enable_intr(hw);
 800
 801                 /*
 802                  * Update link state from device since this won't be
 803                  * done upon starting with lsc in use. This is done
 804                  * only after enabling interrupts to avoid any race
 805                  * where the link state could change without an
 806                  * interrupt being fired.
 807                  */
 808                 __vmxnet3_dev_link_update(dev, 0);
 809         }
 810
 811         return VMXNET3_SUCCESS;
 812 }
 813
 814 /*
 815  * Stop device: disable rx and tx functions to allow for reconfiguring.
 816  */
 817 static void
 818 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 819 {
 820         struct rte_eth_link link;
 821         struct vmxnet3_hw *hw = dev->data->dev_private;
 822
 823         PMD_INIT_FUNC_TRACE();
 824
 825         if (hw->adapter_stopped == 1) {
 826                 PMD_INIT_LOG(DEBUG, "Device already closed.");
 827                 return;
 828         }
 829
 830         /* disable interrupts */
 831         vmxnet3_disable_intr(hw);
 832
 833         if (dev->data->dev_conf.intr_conf.lsc) {
 834                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 835
 836                 rte_intr_disable(&pci_dev->intr_handle);
 837
 838                 rte_intr_callback_unregister(&pci_dev->intr_handle,
 839                                              vmxnet3_interrupt_handler, dev);
 840         }
 841
 842         /* quiesce the device first */
 843         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 844         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 845         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 846
 847         /* reset the device */
 848         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 849         PMD_INIT_LOG(DEBUG, "Device reset.");
 850         hw->adapter_stopped = 0;
 851
 852         vmxnet3_dev_clear_queues(dev);
 853
 854         /* Clear recorded link status */
 855         memset(&link, 0, sizeof(link));
 856         vmxnet3_dev_atomic_write_link_status(dev, &link);
 857 }
 858
 859 /*
 860  * Reset and stop device.
 861  */
 862 static void
 863 vmxnet3_dev_close(struct rte_eth_dev *dev)
 864 {
 865         struct vmxnet3_hw *hw = dev->data->dev_private;
 866
 867         PMD_INIT_FUNC_TRACE();
 868
 869         vmxnet3_dev_stop(dev);
 870         hw->adapter_stopped = 1;
 871 }
 872
 873 static void
 874 vmxnet3_hw_tx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 875                         struct UPT1_TxStats *res)
 876 {
 877 #define VMXNET3_UPDATE_TX_STAT(h, i, f, r)              \
 878                 ((r)->f = (h)->tqd_start[(i)].stats.f + \
 879                         (h)->saved_tx_stats[(i)].f)
 880
 881         VMXNET3_UPDATE_TX_STAT(hw, q, ucastPktsTxOK, res);
 882         VMXNET3_UPDATE_TX_STAT(hw, q, mcastPktsTxOK, res);
 883         VMXNET3_UPDATE_TX_STAT(hw, q, bcastPktsTxOK, res);
 884         VMXNET3_UPDATE_TX_STAT(hw, q, ucastBytesTxOK, res);
 885         VMXNET3_UPDATE_TX_STAT(hw, q, mcastBytesTxOK, res);
 886         VMXNET3_UPDATE_TX_STAT(hw, q, bcastBytesTxOK, res);
 887         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxError, res);
 888         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxDiscard, res);
 889
 890 #undef VMXNET3_UPDATE_TX_STAT
 891 }
 892
 893 static void
 894 vmxnet3_hw_rx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 895                         struct UPT1_RxStats *res)
 896 {
 897 #define VMXNET3_UPDATE_RX_STAT(h, i, f, r)              \
 898                 ((r)->f = (h)->rqd_start[(i)].stats.f + \
 899                         (h)->saved_rx_stats[(i)].f)
 900
 901         VMXNET3_UPDATE_RX_STAT(hw, q, ucastPktsRxOK, res);
 902         VMXNET3_UPDATE_RX_STAT(hw, q, mcastPktsRxOK, res);
 903         VMXNET3_UPDATE_RX_STAT(hw, q, bcastPktsRxOK, res);
 904         VMXNET3_UPDATE_RX_STAT(hw, q, ucastBytesRxOK, res);
 905         VMXNET3_UPDATE_RX_STAT(hw, q, mcastBytesRxOK, res);
 906         VMXNET3_UPDATE_RX_STAT(hw, q, bcastBytesRxOK, res);
 907         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxError, res);
 908         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxOutOfBuf, res);
 909
 910 #undef VMXNET3_UPDATE_RX_STATS
 911 }
 912
 913 static void
 914 vmxnet3_hw_stats_save(struct vmxnet3_hw *hw)
 915 {
 916         unsigned int i;
 917
 918         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 919
 920         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 921
 922         for (i = 0; i < hw->num_tx_queues; i++)
 923                 vmxnet3_hw_tx_stats_get(hw, i, &hw->saved_tx_stats[i]);
 924         for (i = 0; i < hw->num_rx_queues; i++)
 925                 vmxnet3_hw_rx_stats_get(hw, i, &hw->saved_rx_stats[i]);
 926 }
 927
 928 static int
 929 vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
 930                              struct rte_eth_xstat_name *xstats_names,
 931                              unsigned int n)
 932 {
 933         unsigned int i, t, count = 0;
 934         unsigned int nstats =
 935                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
 936                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
 937
 938         if (!xstats_names || n < nstats)
 939                 return nstats;
 940
 941         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 942                 if (!dev->data->rx_queues[i])
 943                         continue;
 944
 945                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
 946                         snprintf(xstats_names[count].name,
 947                                  sizeof(xstats_names[count].name),
 948                                  "rx_q%u_%s", i,
 949                                  vmxnet3_rxq_stat_strings[t].name);
 950                         count++;
 951                 }
 952         }
 953
 954         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 955                 if (!dev->data->tx_queues[i])
 956                         continue;
 957
 958                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
 959                         snprintf(xstats_names[count].name,
 960                                  sizeof(xstats_names[count].name),
 961                                  "tx_q%u_%s", i,
 962                                  vmxnet3_txq_stat_strings[t].name);
 963                         count++;
 964                 }
 965         }
 966
 967         return count;
 968 }
 969
 970 static int
 971 vmxnet3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 972                        unsigned int n)
 973 {
 974         unsigned int i, t, count = 0;
 975         unsigned int nstats =
 976                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
 977                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
 978
 979         if (n < nstats)
 980                 return nstats;
 981
 982         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 983                 struct vmxnet3_rx_queue *rxq = dev->data->rx_queues[i];
 984
 985                 if (rxq == NULL)
 986                         continue;
 987
 988                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
 989                         xstats[count].value = *(uint64_t *)(((char *)&rxq->stats) +
 990                                 vmxnet3_rxq_stat_strings[t].offset);
 991                         xstats[count].id = count;
 992                         count++;
 993                 }
 994         }
 995
 996         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 997                 struct vmxnet3_tx_queue *txq = dev->data->tx_queues[i];
 998
 999                 if (txq == NULL)
1000                         continue;
1001
1002                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
1003                         xstats[count].value = *(uint64_t *)(((char *)&txq->stats) +
1004                                 vmxnet3_txq_stat_strings[t].offset);
1005                         xstats[count].id = count;
1006                         count++;
1007                 }
1008         }
1009
1010         return count;
1011 }
1012
1013 static int
1014 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1015 {
1016         unsigned int i;
1017         struct vmxnet3_hw *hw = dev->data->dev_private;
1018         struct UPT1_TxStats txStats;
1019         struct UPT1_RxStats rxStats;
1020
1021         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
1022
1023         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
1024         for (i = 0; i < hw->num_tx_queues; i++) {
1025                 vmxnet3_hw_tx_stats_get(hw, i, &txStats);
1026
1027                 stats->q_opackets[i] = txStats.ucastPktsTxOK +
1028                         txStats.mcastPktsTxOK +
1029                         txStats.bcastPktsTxOK;
1030
1031                 stats->q_obytes[i] = txStats.ucastBytesTxOK +
1032                         txStats.mcastBytesTxOK +
1033                         txStats.bcastBytesTxOK;
1034
1035                 stats->opackets += stats->q_opackets[i];
1036                 stats->obytes += stats->q_obytes[i];
1037                 stats->oerrors += txStats.pktsTxError + txStats.pktsTxDiscard;
1038         }
1039
1040         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
1041         for (i = 0; i < hw->num_rx_queues; i++) {
1042                 vmxnet3_hw_rx_stats_get(hw, i, &rxStats);
1043
1044                 stats->q_ipackets[i] = rxStats.ucastPktsRxOK +
1045                         rxStats.mcastPktsRxOK +
1046                         rxStats.bcastPktsRxOK;
1047
1048                 stats->q_ibytes[i] = rxStats.ucastBytesRxOK +
1049                         rxStats.mcastBytesRxOK +
1050                         rxStats.bcastBytesRxOK;
1051
1052                 stats->ipackets += stats->q_ipackets[i];
1053                 stats->ibytes += stats->q_ibytes[i];
1054
1055                 stats->q_errors[i] = rxStats.pktsRxError;
1056                 stats->ierrors += rxStats.pktsRxError;
1057                 stats->rx_nombuf += rxStats.pktsRxOutOfBuf;
1058         }
1059
1060         return 0;
1061 }
1062
1063 static void
1064 vmxnet3_dev_info_get(struct rte_eth_dev *dev,
1065                      struct rte_eth_dev_info *dev_info)
1066 {
1067         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1068
1069         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
1070         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
1071         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
1072         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
1073         dev_info->speed_capa = ETH_LINK_SPEED_10G;
1074         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
1075
1076         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
1077         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
1078
1079         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
1080                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
1081                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
1082                 .nb_align = 1,
1083         };
1084
1085         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
1086                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
1087                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
1088                 .nb_align = 1,
1089                 .nb_seg_max = VMXNET3_TX_MAX_SEG,
1090                 .nb_mtu_seg_max = VMXNET3_MAX_TXD_PER_PKT,
1091         };
1092
1093         dev_info->rx_offload_capa =
1094                 DEV_RX_OFFLOAD_VLAN_STRIP |
1095                 DEV_RX_OFFLOAD_UDP_CKSUM |
1096                 DEV_RX_OFFLOAD_TCP_CKSUM |
1097                 DEV_RX_OFFLOAD_TCP_LRO;
1098
1099         dev_info->tx_offload_capa =
1100                 DEV_TX_OFFLOAD_VLAN_INSERT |
1101                 DEV_TX_OFFLOAD_TCP_CKSUM |
1102                 DEV_TX_OFFLOAD_UDP_CKSUM |
1103                 DEV_TX_OFFLOAD_TCP_TSO;
1104 }
1105
1106 static const uint32_t *
1107 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1108 {
1109         static const uint32_t ptypes[] = {
1110                 RTE_PTYPE_L3_IPV4_EXT,
1111                 RTE_PTYPE_L3_IPV4,
1112                 RTE_PTYPE_UNKNOWN
1113         };
1114
1115         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
1116                 return ptypes;
1117         return NULL;
1118 }
1119
1120 static void
1121 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
1122 {
1123         struct vmxnet3_hw *hw = dev->data->dev_private;
1124
1125         ether_addr_copy(mac_addr, (struct ether_addr *)(hw->perm_addr));
1126         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
1127 }
1128
1129 /* return 0 means link status changed, -1 means not changed */
1130 static int
1131 __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
1132                           __rte_unused int wait_to_complete)
1133 {
1134         struct vmxnet3_hw *hw = dev->data->dev_private;
1135         struct rte_eth_link old = { 0 }, link;
1136         uint32_t ret;
1137
1138         memset(&link, 0, sizeof(link));
1139         vmxnet3_dev_atomic_read_link_status(dev, &old);
1140
1141         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
1142         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
1143
1144         if (ret & 0x1) {
1145                 link.link_status = ETH_LINK_UP;
1146                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1147                 link.link_speed = ETH_SPEED_NUM_10G;
1148                 link.link_autoneg = ETH_LINK_AUTONEG;
1149         }
1150
1151         vmxnet3_dev_atomic_write_link_status(dev, &link);
1152
1153         return (old.link_status == link.link_status) ? -1 : 0;
1154 }
1155
1156 static int
1157 vmxnet3_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
1158 {
1159         /* Link status doesn't change for stopped dev */
1160         if (dev->data->dev_started == 0)
1161                 return -1;
1162
1163         return __vmxnet3_dev_link_update(dev, wait_to_complete);
1164 }
1165
1166 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
1167 static void
1168 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set)
1169 {
1170         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1171
1172         if (set)
1173                 rxConf->rxMode = rxConf->rxMode | feature;
1174         else
1175                 rxConf->rxMode = rxConf->rxMode & (~feature);
1176
1177         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
1178 }
1179
1180 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1181 static void
1182 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
1183 {
1184         struct vmxnet3_hw *hw = dev->data->dev_private;
1185         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1186
1187         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
1188         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
1189
1190         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1191                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1192 }
1193
1194 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1195 static void
1196 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
1197 {
1198         struct vmxnet3_hw *hw = dev->data->dev_private;
1199         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1200
1201         if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1202                 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1203         else
1204                 memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1205         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
1206         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1207                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1208 }
1209
1210 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1211 static void
1212 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
1213 {
1214         struct vmxnet3_hw *hw = dev->data->dev_private;
1215
1216         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
1217 }
1218
1219 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1220 static void
1221 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
1222 {
1223         struct vmxnet3_hw *hw = dev->data->dev_private;
1224
1225         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
1226 }
1227
1228 /* Enable/disable filter on vlan */
1229 static int
1230 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
1231 {
1232         struct vmxnet3_hw *hw = dev->data->dev_private;
1233         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1234         uint32_t *vf_table = rxConf->vfTable;
1235
1236         /* save state for restore */
1237         if (on)
1238                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1239         else
1240                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1241
1242         /* don't change active filter if in promiscuous mode */
1243         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
1244                 return 0;
1245
1246         /* set in hardware */
1247         if (on)
1248                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
1249         else
1250                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
1251
1252         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1253                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1254         return 0;
1255 }
1256
1257 static int
1258 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1259 {
1260         struct vmxnet3_hw *hw = dev->data->dev_private;
1261         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
1262         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
1263
1264         if (mask & ETH_VLAN_STRIP_MASK) {
1265                 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1266                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1267                 else
1268                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1269
1270                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1271                                        VMXNET3_CMD_UPDATE_FEATURE);
1272         }
1273
1274         if (mask & ETH_VLAN_FILTER_MASK) {
1275                 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1276                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1277                 else
1278                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1279
1280                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1281                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1282         }
1283
1284         return 0;
1285 }
1286
1287 static void
1288 vmxnet3_process_events(struct rte_eth_dev *dev)
1289 {
1290         struct vmxnet3_hw *hw = dev->data->dev_private;
1291         uint32_t events = hw->shared->ecr;
1292
1293         if (!events)
1294                 return;
1295
1296         /*
1297          * ECR bits when written with 1b are cleared. Hence write
1298          * events back to ECR so that the bits which were set will be reset.
1299          */
1300         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
1301
1302         /* Check if link state has changed */
1303         if (events & VMXNET3_ECR_LINK) {
1304                 PMD_DRV_LOG(DEBUG, "Process events: VMXNET3_ECR_LINK event");
1305                 if (vmxnet3_dev_link_update(dev, 0) == 0)
1306                         _rte_eth_dev_callback_process(dev,
1307                                                       RTE_ETH_EVENT_INTR_LSC,
1308                                                       NULL);
1309         }
1310
1311         /* Check if there is an error on xmit/recv queues */
1312         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
1313                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1314                                        VMXNET3_CMD_GET_QUEUE_STATUS);
1315
1316                 if (hw->tqd_start->status.stopped)
1317                         PMD_DRV_LOG(ERR, "tq error 0x%x",
1318                                     hw->tqd_start->status.error);
1319
1320                 if (hw->rqd_start->status.stopped)
1321                         PMD_DRV_LOG(ERR, "rq error 0x%x",
1322                                      hw->rqd_start->status.error);
1323
1324                 /* Reset the device */
1325                 /* Have to reset the device */
1326         }
1327
1328         if (events & VMXNET3_ECR_DIC)
1329                 PMD_DRV_LOG(DEBUG, "Device implementation change event.");
1330
1331         if (events & VMXNET3_ECR_DEBUG)
1332                 PMD_DRV_LOG(DEBUG, "Debug event generated by device.");
1333 }
1334
1335 static void
1336 vmxnet3_interrupt_handler(void *param)
1337 {
1338         struct rte_eth_dev *dev = param;
1339         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
1340
1341         vmxnet3_process_events(dev);
1342
1343         if (rte_intr_enable(&pci_dev->intr_handle) < 0)
1344                 PMD_DRV_LOG(ERR, "interrupt enable failed");
1345 }
1346
1347 RTE_PMD_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd);
1348 RTE_PMD_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);
1349 RTE_PMD_REGISTER_KMOD_DEP(net_vmxnet3, "* igb_uio | uio_pci_generic | vfio-pci");
1350
1351 RTE_INIT(vmxnet3_init_log);
1352 static void
1353 vmxnet3_init_log(void)
1354 {
1355         vmxnet3_logtype_init = rte_log_register("pmd.vmxnet3.init");
1356         if (vmxnet3_logtype_init >= 0)
1357                 rte_log_set_level(vmxnet3_logtype_init, RTE_LOG_NOTICE);
1358         vmxnet3_logtype_driver = rte_log_register("pmd.vmxnet3.driver");
1359         if (vmxnet3_logtype_driver >= 0)
1360                 rte_log_set_level(vmxnet3_logtype_driver, RTE_LOG_NOTICE);
1361 }