drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <fcntl.h>
  42 #include <inttypes.h>
  43 #include <rte_byteorder.h>
  44 #include <rte_common.h>
  45 #include <rte_cycles.h>
  46
  47 #include <rte_interrupts.h>
  48 #include <rte_log.h>
  49 #include <rte_debug.h>
  50 #include <rte_pci.h>
  51 #include <rte_atomic.h>
  52 #include <rte_branch_prediction.h>
  53 #include <rte_memory.h>
  54 #include <rte_memzone.h>
  55 #include <rte_eal.h>
  56 #include <rte_alarm.h>
  57 #include <rte_ether.h>
  58 #include <rte_ethdev.h>
  59 #include <rte_atomic.h>
  60 #include <rte_string_fns.h>
  61 #include <rte_malloc.h>
  62 #include <rte_dev.h>
  63
  64 #include "base/vmxnet3_defs.h"
  65
  66 #include "vmxnet3_ring.h"
  67 #include "vmxnet3_logs.h"
  68 #include "vmxnet3_ethdev.h"
  69
  70 #define PROCESS_SYS_EVENTS 0
  71
  72 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  73 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  74 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  75 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  76 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  77 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  78 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  79 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  80 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  81 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  82 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  83 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  84                                 int wait_to_complete);
  85 static void vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  86                                 struct rte_eth_stats *stats);
  87 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  88                                 struct rte_eth_dev_info *dev_info);
  89 static const uint32_t *
  90 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
  91 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
  92                                        uint16_t vid, int on);
  93 static void vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  94 static void vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
  95                                  struct ether_addr *mac_addr);
  96
  97 #if PROCESS_SYS_EVENTS == 1
  98 static void vmxnet3_process_events(struct vmxnet3_hw *);
  99 #endif
 100 /*
 101  * The set of PCI devices this driver supports
 102  */
 103 #define VMWARE_PCI_VENDOR_ID 0x15AD
 104 #define VMWARE_DEV_ID_VMXNET3 0x07B0
 105 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
 106         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
 107         { .vendor_id = 0, /* sentinel */ },
 108 };
 109
 110 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
 111         .dev_configure        = vmxnet3_dev_configure,
 112         .dev_start            = vmxnet3_dev_start,
 113         .dev_stop             = vmxnet3_dev_stop,
 114         .dev_close            = vmxnet3_dev_close,
 115         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
 116         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
 117         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 118         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 119         .link_update          = vmxnet3_dev_link_update,
 120         .stats_get            = vmxnet3_dev_stats_get,
 121         .mac_addr_set         = vmxnet3_mac_addr_set,
 122         .dev_infos_get        = vmxnet3_dev_info_get,
 123         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
 124         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 125         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 126         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 127         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 128         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 129         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 130 };
 131
 132 static const struct rte_memzone *
 133 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 134                 const char *post_string, int socket_id, uint16_t align)
 135 {
 136         char z_name[RTE_MEMZONE_NAMESIZE];
 137         const struct rte_memzone *mz;
 138
 139         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
 140                                         dev->driver->pci_drv.name, dev->data->port_id, post_string);
 141
 142         mz = rte_memzone_lookup(z_name);
 143         if (mz)
 144                 return mz;
 145
 146         return rte_memzone_reserve_aligned(z_name, size,
 147                         socket_id, 0, align);
 148 }
 149
 150 /**
 151  * Atomically reads the link status information from global
 152  * structure rte_eth_dev.
 153  *
 154  * @param dev
 155  *   - Pointer to the structure rte_eth_dev to read from.
 156  *   - Pointer to the buffer to be saved with the link status.
 157  *
 158  * @return
 159  *   - On success, zero.
 160  *   - On failure, negative value.
 161  */
 162
 163 static int
 164 vmxnet3_dev_atomic_read_link_status(struct rte_eth_dev *dev,
 165                                     struct rte_eth_link *link)
 166 {
 167         struct rte_eth_link *dst = link;
 168         struct rte_eth_link *src = &(dev->data->dev_link);
 169
 170         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 171                                 *(uint64_t *)src) == 0)
 172                 return -1;
 173
 174         return 0;
 175 }
 176
 177 /**
 178  * Atomically writes the link status information into global
 179  * structure rte_eth_dev.
 180  *
 181  * @param dev
 182  *   - Pointer to the structure rte_eth_dev to write to.
 183  *   - Pointer to the buffer to be saved with the link status.
 184  *
 185  * @return
 186  *   - On success, zero.
 187  *   - On failure, negative value.
 188  */
 189 static int
 190 vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
 191                                      struct rte_eth_link *link)
 192 {
 193         struct rte_eth_link *dst = &(dev->data->dev_link);
 194         struct rte_eth_link *src = link;
 195
 196         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 197                                         *(uint64_t *)src) == 0)
 198                 return -1;
 199
 200         return 0;
 201 }
 202
 203 /*
 204  * This function is based on vmxnet3_disable_intr()
 205  */
 206 static void
 207 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 208 {
 209         int i;
 210
 211         PMD_INIT_FUNC_TRACE();
 212
 213         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 214         for (i = 0; i < VMXNET3_MAX_INTRS; i++)
 215                         VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 216 }
 217
 218 /*
 219  * It returns 0 on success.
 220  */
 221 static int
 222 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 223 {
 224         struct rte_pci_device *pci_dev;
 225         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 226         uint32_t mac_hi, mac_lo, ver;
 227
 228         PMD_INIT_FUNC_TRACE();
 229
 230         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 231         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 232         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 233         pci_dev = eth_dev->pci_dev;
 234
 235         /*
 236          * for secondary processes, we don't initialize any further as primary
 237          * has already done this work.
 238          */
 239         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 240                 return 0;
 241
 242         rte_eth_copy_pci_info(eth_dev, pci_dev);
 243
 244         /* Vendor and Device ID need to be set before init of shared code */
 245         hw->device_id = pci_dev->id.device_id;
 246         hw->vendor_id = pci_dev->id.vendor_id;
 247         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 248         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 249
 250         hw->num_rx_queues = 1;
 251         hw->num_tx_queues = 1;
 252         hw->bufs_per_pkt = 1;
 253
 254         /* Check h/w version compatibility with driver. */
 255         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 256         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 257         if (ver & 0x1)
 258                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS, 1);
 259         else {
 260                 PMD_INIT_LOG(ERR, "Incompatible h/w version, should be 0x1");
 261                 return -EIO;
 262         }
 263
 264         /* Check UPT version compatibility with driver. */
 265         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 266         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 267         if (ver & 0x1)
 268                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 269         else {
 270                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 271                 return -EIO;
 272         }
 273
 274         /* Getting MAC Address */
 275         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 276         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 277         memcpy(hw->perm_addr  , &mac_lo, 4);
 278         memcpy(hw->perm_addr+4, &mac_hi, 2);
 279
 280         /* Allocate memory for storing MAC addresses */
 281         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 282                                                VMXNET3_MAX_MAC_ADDRS, 0);
 283         if (eth_dev->data->mac_addrs == NULL) {
 284                 PMD_INIT_LOG(ERR,
 285                              "Failed to allocate %d bytes needed to store MAC addresses",
 286                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 287                 return -ENOMEM;
 288         }
 289         /* Copy the permanent MAC address */
 290         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 291                         &eth_dev->data->mac_addrs[0]);
 292
 293         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 294                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 295                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 296
 297         /* Put device in Quiesce Mode */
 298         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 299
 300         /* allow untagged pkts */
 301         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 302
 303         return 0;
 304 }
 305
 306 static int
 307 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 308 {
 309         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 310
 311         PMD_INIT_FUNC_TRACE();
 312
 313         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 314                 return 0;
 315
 316         if (hw->adapter_stopped == 0)
 317                 vmxnet3_dev_close(eth_dev);
 318
 319         eth_dev->dev_ops = NULL;
 320         eth_dev->rx_pkt_burst = NULL;
 321         eth_dev->tx_pkt_burst = NULL;
 322
 323         rte_free(eth_dev->data->mac_addrs);
 324         eth_dev->data->mac_addrs = NULL;
 325
 326         return 0;
 327 }
 328
 329 static struct eth_driver rte_vmxnet3_pmd = {
 330         .pci_drv = {
 331                 .name = "rte_vmxnet3_pmd",
 332                 .id_table = pci_id_vmxnet3_map,
 333                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,
 334                 .probe = rte_eth_dev_pci_probe,
 335                 .remove = rte_eth_dev_pci_remove,
 336         },
 337         .eth_dev_init = eth_vmxnet3_dev_init,
 338         .eth_dev_uninit = eth_vmxnet3_dev_uninit,
 339         .dev_private_size = sizeof(struct vmxnet3_hw),
 340 };
 341
 342 static int
 343 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 344 {
 345         const struct rte_memzone *mz;
 346         struct vmxnet3_hw *hw = dev->data->dev_private;
 347         size_t size;
 348
 349         PMD_INIT_FUNC_TRACE();
 350
 351         if (dev->data->nb_rx_queues > UINT8_MAX ||
 352             dev->data->nb_tx_queues > UINT8_MAX)
 353                 return -EINVAL;
 354
 355         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 356                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 357
 358         if (size > UINT16_MAX)
 359                 return -EINVAL;
 360
 361         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 362         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 363
 364         /*
 365          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 366          * on current socket
 367          */
 368         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 369                               "shared", rte_socket_id(), 8);
 370
 371         if (mz == NULL) {
 372                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 373                 return -ENOMEM;
 374         }
 375         memset(mz->addr, 0, mz->len);
 376
 377         hw->shared = mz->addr;
 378         hw->sharedPA = mz->phys_addr;
 379
 380         /*
 381          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 382          * on current socket
 383          */
 384         mz = gpa_zone_reserve(dev, size, "queuedesc",
 385                               rte_socket_id(), VMXNET3_QUEUE_DESC_ALIGN);
 386         if (mz == NULL) {
 387                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 388                 return -ENOMEM;
 389         }
 390         memset(mz->addr, 0, mz->len);
 391
 392         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 393         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 394
 395         hw->queueDescPA = mz->phys_addr;
 396         hw->queue_desc_len = (uint16_t)size;
 397
 398         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 399
 400                 /* Allocate memory structure for UPT1_RSSConf and configure */
 401                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf), "rss_conf",
 402                                       rte_socket_id(), RTE_CACHE_LINE_SIZE);
 403                 if (mz == NULL) {
 404                         PMD_INIT_LOG(ERR,
 405                                      "ERROR: Creating rss_conf structure zone");
 406                         return -ENOMEM;
 407                 }
 408                 memset(mz->addr, 0, mz->len);
 409
 410                 hw->rss_conf = mz->addr;
 411                 hw->rss_confPA = mz->phys_addr;
 412         }
 413
 414         return 0;
 415 }
 416
 417 static void
 418 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
 419 {
 420         uint32_t val;
 421
 422         PMD_INIT_LOG(DEBUG,
 423                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 424                      addr[0], addr[1], addr[2],
 425                      addr[3], addr[4], addr[5]);
 426
 427         val = *(const uint32_t *)addr;
 428         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 429
 430         val = (addr[5] << 8) | addr[4];
 431         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 432 }
 433
 434 static int
 435 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 436 {
 437         struct rte_eth_conf port_conf = dev->data->dev_conf;
 438         struct vmxnet3_hw *hw = dev->data->dev_private;
 439         uint32_t mtu = dev->data->mtu;
 440         Vmxnet3_DriverShared *shared = hw->shared;
 441         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 442         uint32_t i;
 443         int ret;
 444
 445         shared->magic = VMXNET3_REV1_MAGIC;
 446         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 447
 448         /* Setting up Guest OS information */
 449         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 450                 VMXNET3_GOS_BITS_32 :
 451                 VMXNET3_GOS_BITS_64;
 452         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 453         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 454         devRead->misc.driverInfo.uptVerSpt     = 1;
 455
 456         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 457         devRead->misc.queueDescPA  = hw->queueDescPA;
 458         devRead->misc.queueDescLen = hw->queue_desc_len;
 459         devRead->misc.numTxQueues  = hw->num_tx_queues;
 460         devRead->misc.numRxQueues  = hw->num_rx_queues;
 461
 462         /*
 463          * Set number of interrupts to 1
 464          * PMD disables all the interrupts but this is MUST to activate device
 465          * It needs at least one interrupt for link events to handle
 466          * So we'll disable it later after device activation if needed
 467          */
 468         devRead->intrConf.numIntrs = 1;
 469         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 470
 471         for (i = 0; i < hw->num_tx_queues; i++) {
 472                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 473                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 474
 475                 tqd->ctrl.txNumDeferred  = 0;
 476                 tqd->ctrl.txThreshold    = 1;
 477                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 478                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 479                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 480
 481                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 482                 tqd->conf.compRingSize = txq->comp_ring.size;
 483                 tqd->conf.dataRingSize = txq->data_ring.size;
 484                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 485                 tqd->status.stopped    = TRUE;
 486                 tqd->status.error      = 0;
 487                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 488         }
 489
 490         for (i = 0; i < hw->num_rx_queues; i++) {
 491                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 492                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 493
 494                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 495                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 496                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 497
 498                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 499                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 500                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 501                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 502                 rqd->status.stopped       = TRUE;
 503                 rqd->status.error         = 0;
 504                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 505         }
 506
 507         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 508         devRead->rxFilterConf.rxMode = 0;
 509
 510         /* Setting up feature flags */
 511         if (dev->data->dev_conf.rxmode.hw_ip_checksum)
 512                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 513
 514         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 515                 ret = vmxnet3_rss_configure(dev);
 516                 if (ret != VMXNET3_SUCCESS)
 517                         return ret;
 518
 519                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 520                 devRead->rssConfDesc.confVer = 1;
 521                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 522                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 523         }
 524
 525         vmxnet3_dev_vlan_offload_set(dev,
 526                              ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 527
 528         vmxnet3_write_mac(hw, hw->perm_addr);
 529
 530         return VMXNET3_SUCCESS;
 531 }
 532
 533 /*
 534  * Configure device link speed and setup link.
 535  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 536  * It returns 0 on success.
 537  */
 538 static int
 539 vmxnet3_dev_start(struct rte_eth_dev *dev)
 540 {
 541         int status, ret;
 542         struct vmxnet3_hw *hw = dev->data->dev_private;
 543
 544         PMD_INIT_FUNC_TRACE();
 545
 546         ret = vmxnet3_setup_driver_shared(dev);
 547         if (ret != VMXNET3_SUCCESS)
 548                 return ret;
 549
 550         /* Exchange shared data with device */
 551         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 552                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 553         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 554                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 555
 556         /* Activate device by register write */
 557         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 558         status = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 559
 560         if (status != 0) {
 561                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 562                 return -1;
 563         }
 564
 565         /* Disable interrupts */
 566         vmxnet3_disable_intr(hw);
 567
 568         /*
 569          * Load RX queues with blank mbufs and update next2fill index for device
 570          * Update RxMode of the device
 571          */
 572         ret = vmxnet3_dev_rxtx_init(dev);
 573         if (ret != VMXNET3_SUCCESS) {
 574                 PMD_INIT_LOG(ERR, "Device receive init: UNSUCCESSFUL");
 575                 return ret;
 576         }
 577
 578         /* Setting proper Rx Mode and issue Rx Mode Update command */
 579         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 580
 581         /*
 582          * Don't need to handle events for now
 583          */
 584 #if PROCESS_SYS_EVENTS == 1
 585         events = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_ECR);
 586         PMD_INIT_LOG(DEBUG, "Reading events: 0x%X", events);
 587         vmxnet3_process_events(hw);
 588 #endif
 589         return status;
 590 }
 591
 592 /*
 593  * Stop device: disable rx and tx functions to allow for reconfiguring.
 594  */
 595 static void
 596 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 597 {
 598         struct rte_eth_link link;
 599         struct vmxnet3_hw *hw = dev->data->dev_private;
 600
 601         PMD_INIT_FUNC_TRACE();
 602
 603         if (hw->adapter_stopped == 1) {
 604                 PMD_INIT_LOG(DEBUG, "Device already closed.");
 605                 return;
 606         }
 607
 608         /* disable interrupts */
 609         vmxnet3_disable_intr(hw);
 610
 611         /* quiesce the device first */
 612         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 613         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 614         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 615
 616         /* reset the device */
 617         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 618         PMD_INIT_LOG(DEBUG, "Device reset.");
 619         hw->adapter_stopped = 0;
 620
 621         vmxnet3_dev_clear_queues(dev);
 622
 623         /* Clear recorded link status */
 624         memset(&link, 0, sizeof(link));
 625         vmxnet3_dev_atomic_write_link_status(dev, &link);
 626 }
 627
 628 /*
 629  * Reset and stop device.
 630  */
 631 static void
 632 vmxnet3_dev_close(struct rte_eth_dev *dev)
 633 {
 634         struct vmxnet3_hw *hw = dev->data->dev_private;
 635
 636         PMD_INIT_FUNC_TRACE();
 637
 638         vmxnet3_dev_stop(dev);
 639         hw->adapter_stopped = 1;
 640 }
 641
 642 static void
 643 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 644 {
 645         unsigned int i;
 646         struct vmxnet3_hw *hw = dev->data->dev_private;
 647
 648         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 649
 650         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 651         for (i = 0; i < hw->num_tx_queues; i++) {
 652                 struct UPT1_TxStats *txStats = &hw->tqd_start[i].stats;
 653
 654                 stats->q_opackets[i] = txStats->ucastPktsTxOK +
 655                         txStats->mcastPktsTxOK +
 656                         txStats->bcastPktsTxOK;
 657                 stats->q_obytes[i] = txStats->ucastBytesTxOK +
 658                         txStats->mcastBytesTxOK +
 659                         txStats->bcastBytesTxOK;
 660
 661                 stats->opackets += stats->q_opackets[i];
 662                 stats->obytes += stats->q_obytes[i];
 663                 stats->oerrors += txStats->pktsTxError +
 664                         txStats->pktsTxDiscard;
 665         }
 666
 667         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
 668         for (i = 0; i < hw->num_rx_queues; i++) {
 669                 struct UPT1_RxStats *rxStats = &hw->rqd_start[i].stats;
 670
 671                 stats->q_ipackets[i] = rxStats->ucastPktsRxOK +
 672                         rxStats->mcastPktsRxOK +
 673                         rxStats->bcastPktsRxOK;
 674
 675                 stats->q_ibytes[i] = rxStats->ucastBytesRxOK +
 676                         rxStats->mcastBytesRxOK +
 677                         rxStats->bcastBytesRxOK;
 678
 679                 stats->ipackets += stats->q_ipackets[i];
 680                 stats->ibytes += stats->q_ibytes[i];
 681
 682                 stats->q_errors[i] = rxStats->pktsRxError;
 683                 stats->ierrors += rxStats->pktsRxError;
 684                 stats->rx_nombuf += rxStats->pktsRxOutOfBuf;
 685         }
 686 }
 687
 688 static void
 689 vmxnet3_dev_info_get(__attribute__((unused))struct rte_eth_dev *dev,
 690                      struct rte_eth_dev_info *dev_info)
 691 {
 692         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
 693         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
 694         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
 695         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
 696         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
 697
 698         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
 699         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
 700
 701         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 702                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
 703                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
 704                 .nb_align = 1,
 705         };
 706
 707         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 708                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
 709                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
 710                 .nb_align = 1,
 711         };
 712
 713         dev_info->rx_offload_capa =
 714                 DEV_RX_OFFLOAD_VLAN_STRIP |
 715                 DEV_RX_OFFLOAD_UDP_CKSUM |
 716                 DEV_RX_OFFLOAD_TCP_CKSUM;
 717
 718         dev_info->tx_offload_capa =
 719                 DEV_TX_OFFLOAD_VLAN_INSERT |
 720                 DEV_TX_OFFLOAD_TCP_CKSUM |
 721                 DEV_TX_OFFLOAD_UDP_CKSUM |
 722                 DEV_TX_OFFLOAD_TCP_TSO;
 723 }
 724
 725 static const uint32_t *
 726 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 727 {
 728         static const uint32_t ptypes[] = {
 729                 RTE_PTYPE_L3_IPV4_EXT,
 730                 RTE_PTYPE_L3_IPV4,
 731                 RTE_PTYPE_UNKNOWN
 732         };
 733
 734         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
 735                 return ptypes;
 736         return NULL;
 737 }
 738
 739 static void
 740 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
 741 {
 742         struct vmxnet3_hw *hw = dev->data->dev_private;
 743
 744         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
 745 }
 746
 747 /* return 0 means link status changed, -1 means not changed */
 748 static int
 749 vmxnet3_dev_link_update(struct rte_eth_dev *dev, __attribute__((unused)) int wait_to_complete)
 750 {
 751         struct vmxnet3_hw *hw = dev->data->dev_private;
 752         struct rte_eth_link old, link;
 753         uint32_t ret;
 754
 755         if (dev->data->dev_started == 0)
 756                 return -1; /* Link status doesn't change for stopped dev */
 757
 758         memset(&link, 0, sizeof(link));
 759         vmxnet3_dev_atomic_read_link_status(dev, &old);
 760
 761         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
 762         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 763
 764         if (ret & 0x1) {
 765                 link.link_status = ETH_LINK_UP;
 766                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
 767                 link.link_speed = ETH_SPEED_NUM_10G;
 768                 link.link_autoneg = ETH_LINK_SPEED_FIXED;
 769         }
 770
 771         vmxnet3_dev_atomic_write_link_status(dev, &link);
 772
 773         return (old.link_status == link.link_status) ? -1 : 0;
 774 }
 775
 776 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
 777 static void
 778 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set) {
 779
 780         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
 781
 782         if (set)
 783                 rxConf->rxMode = rxConf->rxMode | feature;
 784         else
 785                 rxConf->rxMode = rxConf->rxMode & (~feature);
 786
 787         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
 788 }
 789
 790 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 791 static void
 792 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
 793 {
 794         struct vmxnet3_hw *hw = dev->data->dev_private;
 795         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 796
 797         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
 798         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
 799
 800         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 801                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 802 }
 803
 804 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
 805 static void
 806 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
 807 {
 808         struct vmxnet3_hw *hw = dev->data->dev_private;
 809         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
 810
 811         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
 812         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
 813         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 814                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 815 }
 816
 817 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
 818 static void
 819 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
 820 {
 821         struct vmxnet3_hw *hw = dev->data->dev_private;
 822
 823         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
 824 }
 825
 826 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
 827 static void
 828 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
 829 {
 830         struct vmxnet3_hw *hw = dev->data->dev_private;
 831
 832         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
 833 }
 834
 835 /* Enable/disable filter on vlan */
 836 static int
 837 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
 838 {
 839         struct vmxnet3_hw *hw = dev->data->dev_private;
 840         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
 841         uint32_t *vf_table = rxConf->vfTable;
 842
 843         /* save state for restore */
 844         if (on)
 845                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
 846         else
 847                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
 848
 849         /* don't change active filter if in promiscuous mode */
 850         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
 851                 return 0;
 852
 853         /* set in hardware */
 854         if (on)
 855                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
 856         else
 857                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
 858
 859         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 860                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 861         return 0;
 862 }
 863
 864 static void
 865 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 866 {
 867         struct vmxnet3_hw *hw = dev->data->dev_private;
 868         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
 869         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
 870
 871         if (mask & ETH_VLAN_STRIP_MASK) {
 872                 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
 873                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
 874                 else
 875                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
 876
 877                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 878                                        VMXNET3_CMD_UPDATE_FEATURE);
 879         }
 880
 881         if (mask & ETH_VLAN_FILTER_MASK) {
 882                 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
 883                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
 884                 else
 885                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
 886
 887                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 888                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
 889         }
 890 }
 891
 892 #if PROCESS_SYS_EVENTS == 1
 893 static void
 894 vmxnet3_process_events(struct vmxnet3_hw *hw)
 895 {
 896         uint32_t events = hw->shared->ecr;
 897
 898         if (!events) {
 899                 PMD_INIT_LOG(ERR, "No events to process");
 900                 return;
 901         }
 902
 903         /*
 904          * ECR bits when written with 1b are cleared. Hence write
 905          * events back to ECR so that the bits which were set will be reset.
 906          */
 907         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
 908
 909         /* Check if link state has changed */
 910         if (events & VMXNET3_ECR_LINK)
 911                 PMD_INIT_LOG(ERR,
 912                              "Process events in %s(): VMXNET3_ECR_LINK event", __func__);
 913
 914         /* Check if there is an error on xmit/recv queues */
 915         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
 916                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_QUEUE_STATUS);
 917
 918                 if (hw->tqd_start->status.stopped)
 919                         PMD_INIT_LOG(ERR, "tq error 0x%x",
 920                                      hw->tqd_start->status.error);
 921
 922                 if (hw->rqd_start->status.stopped)
 923                         PMD_INIT_LOG(ERR, "rq error 0x%x",
 924                                      hw->rqd_start->status.error);
 925
 926                 /* Reset the device */
 927                 /* Have to reset the device */
 928         }
 929
 930         if (events & VMXNET3_ECR_DIC)
 931                 PMD_INIT_LOG(ERR, "Device implementation change event.");
 932
 933         if (events & VMXNET3_ECR_DEBUG)
 934                 PMD_INIT_LOG(ERR, "Debug event generated by device.");
 935
 936 }
 937 #endif
 938
 939 DRIVER_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd.pci_drv);
 940 DRIVER_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);