net/vmxnet3: support stats reset
[dpdk.git] / drivers / net / vmxnet3 / vmxnet3_ethdev.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2015 Intel Corporation
3  */
4
5 #include <sys/queue.h>
6 #include <stdio.h>
7 #include <errno.h>
8 #include <stdint.h>
9 #include <string.h>
10 #include <unistd.h>
11 #include <stdarg.h>
12 #include <fcntl.h>
13 #include <inttypes.h>
14 #include <rte_byteorder.h>
15 #include <rte_common.h>
16 #include <rte_cycles.h>
17
18 #include <rte_interrupts.h>
19 #include <rte_log.h>
20 #include <rte_debug.h>
21 #include <rte_pci.h>
22 #include <rte_bus_pci.h>
23 #include <rte_branch_prediction.h>
24 #include <rte_memory.h>
25 #include <rte_memzone.h>
26 #include <rte_eal.h>
27 #include <rte_alarm.h>
28 #include <rte_ether.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
31 #include <rte_string_fns.h>
32 #include <rte_malloc.h>
33 #include <rte_dev.h>
34
35 #include "base/vmxnet3_defs.h"
36
37 #include "vmxnet3_ring.h"
38 #include "vmxnet3_logs.h"
39 #include "vmxnet3_ethdev.h"
40
41 #define PROCESS_SYS_EVENTS 0
42
43 #define VMXNET3_TX_MAX_SEG      UINT8_MAX
44
45 #define VMXNET3_TX_OFFLOAD_CAP          \
46         (DEV_TX_OFFLOAD_VLAN_INSERT |   \
47          DEV_TX_OFFLOAD_IPV4_CKSUM |    \
48          DEV_TX_OFFLOAD_TCP_CKSUM |     \
49          DEV_TX_OFFLOAD_UDP_CKSUM |     \
50          DEV_TX_OFFLOAD_TCP_TSO |       \
51          DEV_TX_OFFLOAD_MULTI_SEGS)
52
53 #define VMXNET3_RX_OFFLOAD_CAP          \
54         (DEV_RX_OFFLOAD_VLAN_STRIP |    \
55          DEV_RX_OFFLOAD_SCATTER |       \
56          DEV_RX_OFFLOAD_IPV4_CKSUM |    \
57          DEV_RX_OFFLOAD_UDP_CKSUM |     \
58          DEV_RX_OFFLOAD_TCP_CKSUM |     \
59          DEV_RX_OFFLOAD_TCP_LRO |       \
60          DEV_RX_OFFLOAD_JUMBO_FRAME)
61
62 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
63 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
64 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
65 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
66 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
67 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
68 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
69 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
70 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
71 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
72 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
73 static int __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
74                                      int wait_to_complete);
75 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
76                                    int wait_to_complete);
77 static void vmxnet3_hw_stats_save(struct vmxnet3_hw *hw);
78 static int vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
79                                   struct rte_eth_stats *stats);
80 static void vmxnet3_dev_stats_reset(struct rte_eth_dev *dev);
81 static int vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
82                                         struct rte_eth_xstat_name *xstats,
83                                         unsigned int n);
84 static int vmxnet3_dev_xstats_get(struct rte_eth_dev *dev,
85                                   struct rte_eth_xstat *xstats, unsigned int n);
86 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
87                                  struct rte_eth_dev_info *dev_info);
88 static const uint32_t *
89 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
90 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
91                                        uint16_t vid, int on);
92 static int vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
93 static int vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
94                                  struct ether_addr *mac_addr);
95 static void vmxnet3_interrupt_handler(void *param);
96
97 int vmxnet3_logtype_init;
98 int vmxnet3_logtype_driver;
99
100 /*
101  * The set of PCI devices this driver supports
102  */
103 #define VMWARE_PCI_VENDOR_ID 0x15AD
104 #define VMWARE_DEV_ID_VMXNET3 0x07B0
105 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
106         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
107         { .vendor_id = 0, /* sentinel */ },
108 };
109
110 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
111         .dev_configure        = vmxnet3_dev_configure,
112         .dev_start            = vmxnet3_dev_start,
113         .dev_stop             = vmxnet3_dev_stop,
114         .dev_close            = vmxnet3_dev_close,
115         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
116         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
117         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
118         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
119         .link_update          = vmxnet3_dev_link_update,
120         .stats_get            = vmxnet3_dev_stats_get,
121         .xstats_get_names     = vmxnet3_dev_xstats_get_names,
122         .xstats_get           = vmxnet3_dev_xstats_get,
123         .stats_reset          = vmxnet3_dev_stats_reset,
124         .mac_addr_set         = vmxnet3_mac_addr_set,
125         .dev_infos_get        = vmxnet3_dev_info_get,
126         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
127         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
128         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
129         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
130         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
131         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
132         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
133 };
134
135 struct vmxnet3_xstats_name_off {
136         char name[RTE_ETH_XSTATS_NAME_SIZE];
137         unsigned int offset;
138 };
139
140 /* tx_qX_ is prepended to the name string here */
141 static const struct vmxnet3_xstats_name_off vmxnet3_txq_stat_strings[] = {
142         {"drop_total",         offsetof(struct vmxnet3_txq_stats, drop_total)},
143         {"drop_too_many_segs", offsetof(struct vmxnet3_txq_stats, drop_too_many_segs)},
144         {"drop_tso",           offsetof(struct vmxnet3_txq_stats, drop_tso)},
145         {"tx_ring_full",       offsetof(struct vmxnet3_txq_stats, tx_ring_full)},
146 };
147
148 /* rx_qX_ is prepended to the name string here */
149 static const struct vmxnet3_xstats_name_off vmxnet3_rxq_stat_strings[] = {
150         {"drop_total",           offsetof(struct vmxnet3_rxq_stats, drop_total)},
151         {"drop_err",             offsetof(struct vmxnet3_rxq_stats, drop_err)},
152         {"drop_fcs",             offsetof(struct vmxnet3_rxq_stats, drop_fcs)},
153         {"rx_buf_alloc_failure", offsetof(struct vmxnet3_rxq_stats, rx_buf_alloc_failure)},
154 };
155
156 static const struct rte_memzone *
157 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
158                  const char *post_string, int socket_id,
159                  uint16_t align, bool reuse)
160 {
161         char z_name[RTE_MEMZONE_NAMESIZE];
162         const struct rte_memzone *mz;
163
164         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
165                  dev->device->driver->name, dev->data->port_id, post_string);
166
167         mz = rte_memzone_lookup(z_name);
168         if (!reuse) {
169                 if (mz)
170                         rte_memzone_free(mz);
171                 return rte_memzone_reserve_aligned(z_name, size, socket_id,
172                                 RTE_MEMZONE_IOVA_CONTIG, align);
173         }
174
175         if (mz)
176                 return mz;
177
178         return rte_memzone_reserve_aligned(z_name, size, socket_id,
179                         RTE_MEMZONE_IOVA_CONTIG, align);
180 }
181
182 /*
183  * This function is based on vmxnet3_disable_intr()
184  */
185 static void
186 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
187 {
188         int i;
189
190         PMD_INIT_FUNC_TRACE();
191
192         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
193         for (i = 0; i < hw->num_intrs; i++)
194                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
195 }
196
197 static void
198 vmxnet3_enable_intr(struct vmxnet3_hw *hw)
199 {
200         int i;
201
202         PMD_INIT_FUNC_TRACE();
203
204         hw->shared->devRead.intrConf.intrCtrl &= ~VMXNET3_IC_DISABLE_ALL;
205         for (i = 0; i < hw->num_intrs; i++)
206                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 0);
207 }
208
209 /*
210  * Gets tx data ring descriptor size.
211  */
212 static uint16_t
213 eth_vmxnet3_txdata_get(struct vmxnet3_hw *hw)
214 {
215         uint16 txdata_desc_size;
216
217         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
218                                VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
219         txdata_desc_size = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
220
221         return (txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE ||
222                 txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE ||
223                 txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK) ?
224                 sizeof(struct Vmxnet3_TxDataDesc) : txdata_desc_size;
225 }
226
227 /*
228  * It returns 0 on success.
229  */
230 static int
231 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
232 {
233         struct rte_pci_device *pci_dev;
234         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
235         uint32_t mac_hi, mac_lo, ver;
236         struct rte_eth_link link;
237
238         PMD_INIT_FUNC_TRACE();
239
240         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
241         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
242         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
243         eth_dev->tx_pkt_prepare = vmxnet3_prep_pkts;
244         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
245
246         /*
247          * for secondary processes, we don't initialize any further as primary
248          * has already done this work.
249          */
250         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
251                 return 0;
252
253         rte_eth_copy_pci_info(eth_dev, pci_dev);
254
255         /* Vendor and Device ID need to be set before init of shared code */
256         hw->device_id = pci_dev->id.device_id;
257         hw->vendor_id = pci_dev->id.vendor_id;
258         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
259         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
260
261         hw->num_rx_queues = 1;
262         hw->num_tx_queues = 1;
263         hw->bufs_per_pkt = 1;
264
265         /* Check h/w version compatibility with driver. */
266         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
267         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
268
269         if (ver & (1 << VMXNET3_REV_3)) {
270                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
271                                        1 << VMXNET3_REV_3);
272                 hw->version = VMXNET3_REV_3 + 1;
273         } else if (ver & (1 << VMXNET3_REV_2)) {
274                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
275                                        1 << VMXNET3_REV_2);
276                 hw->version = VMXNET3_REV_2 + 1;
277         } else if (ver & (1 << VMXNET3_REV_1)) {
278                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
279                                        1 << VMXNET3_REV_1);
280                 hw->version = VMXNET3_REV_1 + 1;
281         } else {
282                 PMD_INIT_LOG(ERR, "Incompatible hardware version: %d", ver);
283                 return -EIO;
284         }
285
286         PMD_INIT_LOG(DEBUG, "Using device version %d\n", hw->version);
287
288         /* Check UPT version compatibility with driver. */
289         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
290         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
291         if (ver & 0x1)
292                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
293         else {
294                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
295                 return -EIO;
296         }
297
298         /* Getting MAC Address */
299         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
300         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
301         memcpy(hw->perm_addr, &mac_lo, 4);
302         memcpy(hw->perm_addr + 4, &mac_hi, 2);
303
304         /* Allocate memory for storing MAC addresses */
305         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
306                                                VMXNET3_MAX_MAC_ADDRS, 0);
307         if (eth_dev->data->mac_addrs == NULL) {
308                 PMD_INIT_LOG(ERR,
309                              "Failed to allocate %d bytes needed to store MAC addresses",
310                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
311                 return -ENOMEM;
312         }
313         /* Copy the permanent MAC address */
314         ether_addr_copy((struct ether_addr *) hw->perm_addr,
315                         &eth_dev->data->mac_addrs[0]);
316
317         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
318                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
319                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
320
321         /* Put device in Quiesce Mode */
322         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
323
324         /* allow untagged pkts */
325         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
326
327         hw->txdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
328                 eth_vmxnet3_txdata_get(hw) : sizeof(struct Vmxnet3_TxDataDesc);
329
330         hw->rxdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
331                 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
332         RTE_ASSERT((hw->rxdata_desc_size & ~VMXNET3_RXDATA_DESC_SIZE_MASK) ==
333                    hw->rxdata_desc_size);
334
335         /* clear shadow stats */
336         memset(hw->saved_tx_stats, 0, sizeof(hw->saved_tx_stats));
337         memset(hw->saved_rx_stats, 0, sizeof(hw->saved_rx_stats));
338
339         /* clear snapshot stats */
340         memset(hw->snapshot_tx_stats, 0, sizeof(hw->snapshot_tx_stats));
341         memset(hw->snapshot_rx_stats, 0, sizeof(hw->snapshot_rx_stats));
342
343         /* set the initial link status */
344         memset(&link, 0, sizeof(link));
345         link.link_duplex = ETH_LINK_FULL_DUPLEX;
346         link.link_speed = ETH_SPEED_NUM_10G;
347         link.link_autoneg = ETH_LINK_FIXED;
348         rte_eth_linkstatus_set(eth_dev, &link);
349
350         return 0;
351 }
352
353 static int
354 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
355 {
356         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
357
358         PMD_INIT_FUNC_TRACE();
359
360         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
361                 return 0;
362
363         if (hw->adapter_stopped == 0)
364                 vmxnet3_dev_close(eth_dev);
365
366         eth_dev->dev_ops = NULL;
367         eth_dev->rx_pkt_burst = NULL;
368         eth_dev->tx_pkt_burst = NULL;
369         eth_dev->tx_pkt_prepare = NULL;
370
371         rte_free(eth_dev->data->mac_addrs);
372         eth_dev->data->mac_addrs = NULL;
373
374         return 0;
375 }
376
377 static int eth_vmxnet3_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
378         struct rte_pci_device *pci_dev)
379 {
380         return rte_eth_dev_pci_generic_probe(pci_dev,
381                 sizeof(struct vmxnet3_hw), eth_vmxnet3_dev_init);
382 }
383
384 static int eth_vmxnet3_pci_remove(struct rte_pci_device *pci_dev)
385 {
386         return rte_eth_dev_pci_generic_remove(pci_dev, eth_vmxnet3_dev_uninit);
387 }
388
389 static struct rte_pci_driver rte_vmxnet3_pmd = {
390         .id_table = pci_id_vmxnet3_map,
391         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
392         .probe = eth_vmxnet3_pci_probe,
393         .remove = eth_vmxnet3_pci_remove,
394 };
395
396 static int
397 vmxnet3_dev_configure(struct rte_eth_dev *dev)
398 {
399         const struct rte_memzone *mz;
400         struct vmxnet3_hw *hw = dev->data->dev_private;
401         size_t size;
402
403         PMD_INIT_FUNC_TRACE();
404
405         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
406             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
407                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
408                 return -EINVAL;
409         }
410
411         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
412                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
413                 return -EINVAL;
414         }
415
416         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
417                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
418
419         if (size > UINT16_MAX)
420                 return -EINVAL;
421
422         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
423         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
424
425         /*
426          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
427          * on current socket
428          */
429         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
430                               "shared", rte_socket_id(), 8, 1);
431
432         if (mz == NULL) {
433                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
434                 return -ENOMEM;
435         }
436         memset(mz->addr, 0, mz->len);
437
438         hw->shared = mz->addr;
439         hw->sharedPA = mz->iova;
440
441         /*
442          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
443          * on current socket.
444          *
445          * We cannot reuse this memzone from previous allocation as its size
446          * depends on the number of tx and rx queues, which could be different
447          * from one config to another.
448          */
449         mz = gpa_zone_reserve(dev, size, "queuedesc", rte_socket_id(),
450                               VMXNET3_QUEUE_DESC_ALIGN, 0);
451         if (mz == NULL) {
452                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
453                 return -ENOMEM;
454         }
455         memset(mz->addr, 0, mz->len);
456
457         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
458         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
459
460         hw->queueDescPA = mz->iova;
461         hw->queue_desc_len = (uint16_t)size;
462
463         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
464                 /* Allocate memory structure for UPT1_RSSConf and configure */
465                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf),
466                                       "rss_conf", rte_socket_id(),
467                                       RTE_CACHE_LINE_SIZE, 1);
468                 if (mz == NULL) {
469                         PMD_INIT_LOG(ERR,
470                                      "ERROR: Creating rss_conf structure zone");
471                         return -ENOMEM;
472                 }
473                 memset(mz->addr, 0, mz->len);
474
475                 hw->rss_conf = mz->addr;
476                 hw->rss_confPA = mz->iova;
477         }
478
479         return 0;
480 }
481
482 static void
483 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
484 {
485         uint32_t val;
486
487         PMD_INIT_LOG(DEBUG,
488                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
489                      addr[0], addr[1], addr[2],
490                      addr[3], addr[4], addr[5]);
491
492         memcpy(&val, addr, 4);
493         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
494
495         memcpy(&val, addr + 4, 2);
496         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
497 }
498
499 static int
500 vmxnet3_dev_setup_memreg(struct rte_eth_dev *dev)
501 {
502         struct vmxnet3_hw *hw = dev->data->dev_private;
503         Vmxnet3_DriverShared *shared = hw->shared;
504         Vmxnet3_CmdInfo *cmdInfo;
505         struct rte_mempool *mp[VMXNET3_MAX_RX_QUEUES];
506         uint8_t index[VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES];
507         uint32_t num, i, j, size;
508
509         if (hw->memRegsPA == 0) {
510                 const struct rte_memzone *mz;
511
512                 size = sizeof(Vmxnet3_MemRegs) +
513                         (VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES) *
514                         sizeof(Vmxnet3_MemoryRegion);
515
516                 mz = gpa_zone_reserve(dev, size, "memRegs", rte_socket_id(), 8,
517                                       1);
518                 if (mz == NULL) {
519                         PMD_INIT_LOG(ERR, "ERROR: Creating memRegs zone");
520                         return -ENOMEM;
521                 }
522                 memset(mz->addr, 0, mz->len);
523                 hw->memRegs = mz->addr;
524                 hw->memRegsPA = mz->iova;
525         }
526
527         num = hw->num_rx_queues;
528
529         for (i = 0; i < num; i++) {
530                 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
531
532                 mp[i] = rxq->mp;
533                 index[i] = 1 << i;
534         }
535
536         /*
537          * The same mempool could be used by multiple queues. In such a case,
538          * remove duplicate mempool entries. Only one entry is kept with
539          * bitmask indicating queues that are using this mempool.
540          */
541         for (i = 1; i < num; i++) {
542                 for (j = 0; j < i; j++) {
543                         if (mp[i] == mp[j]) {
544                                 mp[i] = NULL;
545                                 index[j] |= 1 << i;
546                                 break;
547                         }
548                 }
549         }
550
551         j = 0;
552         for (i = 0; i < num; i++) {
553                 if (mp[i] == NULL)
554                         continue;
555
556                 Vmxnet3_MemoryRegion *mr = &hw->memRegs->memRegs[j];
557
558                 mr->startPA =
559                         (uintptr_t)STAILQ_FIRST(&mp[i]->mem_list)->iova;
560                 mr->length = STAILQ_FIRST(&mp[i]->mem_list)->len <= INT32_MAX ?
561                         STAILQ_FIRST(&mp[i]->mem_list)->len : INT32_MAX;
562                 mr->txQueueBits = index[i];
563                 mr->rxQueueBits = index[i];
564
565                 PMD_INIT_LOG(INFO,
566                              "index: %u startPA: %" PRIu64 " length: %u, "
567                              "rxBits: %x",
568                              j, mr->startPA, mr->length, mr->rxQueueBits);
569                 j++;
570         }
571         hw->memRegs->numRegs = j;
572         PMD_INIT_LOG(INFO, "numRegs: %u", j);
573
574         size = sizeof(Vmxnet3_MemRegs) +
575                 (j - 1) * sizeof(Vmxnet3_MemoryRegion);
576
577         cmdInfo = &shared->cu.cmdInfo;
578         cmdInfo->varConf.confVer = 1;
579         cmdInfo->varConf.confLen = size;
580         cmdInfo->varConf.confPA = hw->memRegsPA;
581
582         return 0;
583 }
584
585 static int
586 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
587 {
588         struct rte_eth_conf port_conf = dev->data->dev_conf;
589         struct vmxnet3_hw *hw = dev->data->dev_private;
590         uint32_t mtu = dev->data->mtu;
591         Vmxnet3_DriverShared *shared = hw->shared;
592         Vmxnet3_DSDevRead *devRead = &shared->devRead;
593         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
594         uint32_t i;
595         int ret;
596
597         hw->mtu = mtu;
598
599         shared->magic = VMXNET3_REV1_MAGIC;
600         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
601
602         /* Setting up Guest OS information */
603         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
604                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64;
605         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
606         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
607         devRead->misc.driverInfo.uptVerSpt     = 1;
608
609         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
610         devRead->misc.queueDescPA  = hw->queueDescPA;
611         devRead->misc.queueDescLen = hw->queue_desc_len;
612         devRead->misc.numTxQueues  = hw->num_tx_queues;
613         devRead->misc.numRxQueues  = hw->num_rx_queues;
614
615         /*
616          * Set number of interrupts to 1
617          * PMD by default disables all the interrupts but this is MUST
618          * to activate device. It needs at least one interrupt for
619          * link events to handle
620          */
621         hw->num_intrs = devRead->intrConf.numIntrs = 1;
622         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
623
624         for (i = 0; i < hw->num_tx_queues; i++) {
625                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
626                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
627
628                 txq->shared = &hw->tqd_start[i];
629
630                 tqd->ctrl.txNumDeferred  = 0;
631                 tqd->ctrl.txThreshold    = 1;
632                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
633                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
634                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
635
636                 tqd->conf.txRingSize   = txq->cmd_ring.size;
637                 tqd->conf.compRingSize = txq->comp_ring.size;
638                 tqd->conf.dataRingSize = txq->data_ring.size;
639                 tqd->conf.txDataRingDescSize = txq->txdata_desc_size;
640                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
641                 tqd->status.stopped    = TRUE;
642                 tqd->status.error      = 0;
643                 memset(&tqd->stats, 0, sizeof(tqd->stats));
644         }
645
646         for (i = 0; i < hw->num_rx_queues; i++) {
647                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
648                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
649
650                 rxq->shared = &hw->rqd_start[i];
651
652                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
653                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
654                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
655
656                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
657                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
658                 rqd->conf.compRingSize    = rxq->comp_ring.size;
659                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
660                 if (VMXNET3_VERSION_GE_3(hw)) {
661                         rqd->conf.rxDataRingBasePA = rxq->data_ring.basePA;
662                         rqd->conf.rxDataRingDescSize = rxq->data_desc_size;
663                 }
664                 rqd->status.stopped       = TRUE;
665                 rqd->status.error         = 0;
666                 memset(&rqd->stats, 0, sizeof(rqd->stats));
667         }
668
669         /* RxMode set to 0 of VMXNET3_RXM_xxx */
670         devRead->rxFilterConf.rxMode = 0;
671
672         /* Setting up feature flags */
673         if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
674                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
675
676         if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO) {
677                 devRead->misc.uptFeatures |= VMXNET3_F_LRO;
678                 devRead->misc.maxNumRxSG = 0;
679         }
680
681         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
682                 ret = vmxnet3_rss_configure(dev);
683                 if (ret != VMXNET3_SUCCESS)
684                         return ret;
685
686                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
687                 devRead->rssConfDesc.confVer = 1;
688                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
689                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
690         }
691
692         ret = vmxnet3_dev_vlan_offload_set(dev,
693                         ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
694         if (ret)
695                 return ret;
696
697         vmxnet3_write_mac(hw, dev->data->mac_addrs->addr_bytes);
698
699         return VMXNET3_SUCCESS;
700 }
701
702 /*
703  * Configure device link speed and setup link.
704  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
705  * It returns 0 on success.
706  */
707 static int
708 vmxnet3_dev_start(struct rte_eth_dev *dev)
709 {
710         int ret;
711         struct vmxnet3_hw *hw = dev->data->dev_private;
712
713         PMD_INIT_FUNC_TRACE();
714
715         /* Save stats before it is reset by CMD_ACTIVATE */
716         vmxnet3_hw_stats_save(hw);
717
718         ret = vmxnet3_setup_driver_shared(dev);
719         if (ret != VMXNET3_SUCCESS)
720                 return ret;
721
722         /* check if lsc interrupt feature is enabled */
723         if (dev->data->dev_conf.intr_conf.lsc) {
724                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
725
726                 /* Setup interrupt callback  */
727                 rte_intr_callback_register(&pci_dev->intr_handle,
728                                            vmxnet3_interrupt_handler, dev);
729
730                 if (rte_intr_enable(&pci_dev->intr_handle) < 0) {
731                         PMD_INIT_LOG(ERR, "interrupt enable failed");
732                         return -EIO;
733                 }
734         }
735
736         /* Exchange shared data with device */
737         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
738                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
739         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
740                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
741
742         /* Activate device by register write */
743         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
744         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
745
746         if (ret != 0) {
747                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
748                 return -EINVAL;
749         }
750
751         /* Setup memory region for rx buffers */
752         ret = vmxnet3_dev_setup_memreg(dev);
753         if (ret == 0) {
754                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
755                                        VMXNET3_CMD_REGISTER_MEMREGS);
756                 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
757                 if (ret != 0)
758                         PMD_INIT_LOG(DEBUG,
759                                      "Failed in setup memory region cmd\n");
760                 ret = 0;
761         } else {
762                 PMD_INIT_LOG(DEBUG, "Failed to setup memory region\n");
763         }
764
765         /* Disable interrupts */
766         vmxnet3_disable_intr(hw);
767
768         /*
769          * Load RX queues with blank mbufs and update next2fill index for device
770          * Update RxMode of the device
771          */
772         ret = vmxnet3_dev_rxtx_init(dev);
773         if (ret != VMXNET3_SUCCESS) {
774                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
775                 return ret;
776         }
777
778         hw->adapter_stopped = FALSE;
779
780         /* Setting proper Rx Mode and issue Rx Mode Update command */
781         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
782
783         if (dev->data->dev_conf.intr_conf.lsc) {
784                 vmxnet3_enable_intr(hw);
785
786                 /*
787                  * Update link state from device since this won't be
788                  * done upon starting with lsc in use. This is done
789                  * only after enabling interrupts to avoid any race
790                  * where the link state could change without an
791                  * interrupt being fired.
792                  */
793                 __vmxnet3_dev_link_update(dev, 0);
794         }
795
796         return VMXNET3_SUCCESS;
797 }
798
799 /*
800  * Stop device: disable rx and tx functions to allow for reconfiguring.
801  */
802 static void
803 vmxnet3_dev_stop(struct rte_eth_dev *dev)
804 {
805         struct rte_eth_link link;
806         struct vmxnet3_hw *hw = dev->data->dev_private;
807
808         PMD_INIT_FUNC_TRACE();
809
810         if (hw->adapter_stopped == 1) {
811                 PMD_INIT_LOG(DEBUG, "Device already closed.");
812                 return;
813         }
814
815         /* disable interrupts */
816         vmxnet3_disable_intr(hw);
817
818         if (dev->data->dev_conf.intr_conf.lsc) {
819                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
820
821                 rte_intr_disable(&pci_dev->intr_handle);
822
823                 rte_intr_callback_unregister(&pci_dev->intr_handle,
824                                              vmxnet3_interrupt_handler, dev);
825         }
826
827         /* quiesce the device first */
828         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
829         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
830         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
831
832         /* reset the device */
833         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
834         PMD_INIT_LOG(DEBUG, "Device reset.");
835         hw->adapter_stopped = 0;
836
837         vmxnet3_dev_clear_queues(dev);
838
839         /* Clear recorded link status */
840         memset(&link, 0, sizeof(link));
841         link.link_duplex = ETH_LINK_FULL_DUPLEX;
842         link.link_speed = ETH_SPEED_NUM_10G;
843         link.link_autoneg = ETH_LINK_FIXED;
844         rte_eth_linkstatus_set(dev, &link);
845 }
846
847 /*
848  * Reset and stop device.
849  */
850 static void
851 vmxnet3_dev_close(struct rte_eth_dev *dev)
852 {
853         struct vmxnet3_hw *hw = dev->data->dev_private;
854
855         PMD_INIT_FUNC_TRACE();
856
857         vmxnet3_dev_stop(dev);
858         hw->adapter_stopped = 1;
859 }
860
861 static void
862 vmxnet3_hw_tx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
863                         struct UPT1_TxStats *res)
864 {
865 #define VMXNET3_UPDATE_TX_STAT(h, i, f, r)              \
866                 ((r)->f = (h)->tqd_start[(i)].stats.f + \
867                         (h)->saved_tx_stats[(i)].f)
868
869         VMXNET3_UPDATE_TX_STAT(hw, q, ucastPktsTxOK, res);
870         VMXNET3_UPDATE_TX_STAT(hw, q, mcastPktsTxOK, res);
871         VMXNET3_UPDATE_TX_STAT(hw, q, bcastPktsTxOK, res);
872         VMXNET3_UPDATE_TX_STAT(hw, q, ucastBytesTxOK, res);
873         VMXNET3_UPDATE_TX_STAT(hw, q, mcastBytesTxOK, res);
874         VMXNET3_UPDATE_TX_STAT(hw, q, bcastBytesTxOK, res);
875         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxError, res);
876         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxDiscard, res);
877
878 #undef VMXNET3_UPDATE_TX_STAT
879 }
880
881 static void
882 vmxnet3_hw_rx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
883                         struct UPT1_RxStats *res)
884 {
885 #define VMXNET3_UPDATE_RX_STAT(h, i, f, r)              \
886                 ((r)->f = (h)->rqd_start[(i)].stats.f + \
887                         (h)->saved_rx_stats[(i)].f)
888
889         VMXNET3_UPDATE_RX_STAT(hw, q, ucastPktsRxOK, res);
890         VMXNET3_UPDATE_RX_STAT(hw, q, mcastPktsRxOK, res);
891         VMXNET3_UPDATE_RX_STAT(hw, q, bcastPktsRxOK, res);
892         VMXNET3_UPDATE_RX_STAT(hw, q, ucastBytesRxOK, res);
893         VMXNET3_UPDATE_RX_STAT(hw, q, mcastBytesRxOK, res);
894         VMXNET3_UPDATE_RX_STAT(hw, q, bcastBytesRxOK, res);
895         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxError, res);
896         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxOutOfBuf, res);
897
898 #undef VMXNET3_UPDATE_RX_STAT
899 }
900
901 static void
902 vmxnet3_tx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
903                                         struct UPT1_TxStats *res)
904 {
905                 vmxnet3_hw_tx_stats_get(hw, q, res);
906
907 #define VMXNET3_REDUCE_SNAPSHOT_TX_STAT(h, i, f, r)     \
908                 ((r)->f -= (h)->snapshot_tx_stats[(i)].f)
909
910         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, ucastPktsTxOK, res);
911         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, mcastPktsTxOK, res);
912         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, bcastPktsTxOK, res);
913         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, ucastBytesTxOK, res);
914         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, mcastBytesTxOK, res);
915         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, bcastBytesTxOK, res);
916         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, pktsTxError, res);
917         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, pktsTxDiscard, res);
918
919 #undef VMXNET3_REDUCE_SNAPSHOT_TX_STAT
920 }
921
922 static void
923 vmxnet3_rx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
924                                         struct UPT1_RxStats *res)
925 {
926                 vmxnet3_hw_rx_stats_get(hw, q, res);
927
928 #define VMXNET3_REDUCE_SNAPSHOT_RX_STAT(h, i, f, r)     \
929                 ((r)->f -= (h)->snapshot_rx_stats[(i)].f)
930
931         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, ucastPktsRxOK, res);
932         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, mcastPktsRxOK, res);
933         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, bcastPktsRxOK, res);
934         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, ucastBytesRxOK, res);
935         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, mcastBytesRxOK, res);
936         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, bcastBytesRxOK, res);
937         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, pktsRxError, res);
938         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, pktsRxOutOfBuf, res);
939
940 #undef VMXNET3_REDUCE_SNAPSHOT_RX_STAT
941 }
942
943 static void
944 vmxnet3_hw_stats_save(struct vmxnet3_hw *hw)
945 {
946         unsigned int i;
947
948         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
949
950         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
951
952         for (i = 0; i < hw->num_tx_queues; i++)
953                 vmxnet3_hw_tx_stats_get(hw, i, &hw->saved_tx_stats[i]);
954         for (i = 0; i < hw->num_rx_queues; i++)
955                 vmxnet3_hw_rx_stats_get(hw, i, &hw->saved_rx_stats[i]);
956 }
957
958 static int
959 vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
960                              struct rte_eth_xstat_name *xstats_names,
961                              unsigned int n)
962 {
963         unsigned int i, t, count = 0;
964         unsigned int nstats =
965                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
966                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
967
968         if (!xstats_names || n < nstats)
969                 return nstats;
970
971         for (i = 0; i < dev->data->nb_rx_queues; i++) {
972                 if (!dev->data->rx_queues[i])
973                         continue;
974
975                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
976                         snprintf(xstats_names[count].name,
977                                  sizeof(xstats_names[count].name),
978                                  "rx_q%u_%s", i,
979                                  vmxnet3_rxq_stat_strings[t].name);
980                         count++;
981                 }
982         }
983
984         for (i = 0; i < dev->data->nb_tx_queues; i++) {
985                 if (!dev->data->tx_queues[i])
986                         continue;
987
988                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
989                         snprintf(xstats_names[count].name,
990                                  sizeof(xstats_names[count].name),
991                                  "tx_q%u_%s", i,
992                                  vmxnet3_txq_stat_strings[t].name);
993                         count++;
994                 }
995         }
996
997         return count;
998 }
999
1000 static int
1001 vmxnet3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1002                        unsigned int n)
1003 {
1004         unsigned int i, t, count = 0;
1005         unsigned int nstats =
1006                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
1007                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
1008
1009         if (n < nstats)
1010                 return nstats;
1011
1012         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1013                 struct vmxnet3_rx_queue *rxq = dev->data->rx_queues[i];
1014
1015                 if (rxq == NULL)
1016                         continue;
1017
1018                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
1019                         xstats[count].value = *(uint64_t *)(((char *)&rxq->stats) +
1020                                 vmxnet3_rxq_stat_strings[t].offset);
1021                         xstats[count].id = count;
1022                         count++;
1023                 }
1024         }
1025
1026         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1027                 struct vmxnet3_tx_queue *txq = dev->data->tx_queues[i];
1028
1029                 if (txq == NULL)
1030                         continue;
1031
1032                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
1033                         xstats[count].value = *(uint64_t *)(((char *)&txq->stats) +
1034                                 vmxnet3_txq_stat_strings[t].offset);
1035                         xstats[count].id = count;
1036                         count++;
1037                 }
1038         }
1039
1040         return count;
1041 }
1042
1043 static int
1044 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1045 {
1046         unsigned int i;
1047         struct vmxnet3_hw *hw = dev->data->dev_private;
1048         struct UPT1_TxStats txStats;
1049         struct UPT1_RxStats rxStats;
1050
1051         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
1052
1053         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
1054         for (i = 0; i < hw->num_tx_queues; i++) {
1055                 vmxnet3_tx_stats_get(hw, i, &txStats);
1056
1057                 stats->q_opackets[i] = txStats.ucastPktsTxOK +
1058                         txStats.mcastPktsTxOK +
1059                         txStats.bcastPktsTxOK;
1060
1061                 stats->q_obytes[i] = txStats.ucastBytesTxOK +
1062                         txStats.mcastBytesTxOK +
1063                         txStats.bcastBytesTxOK;
1064
1065                 stats->opackets += stats->q_opackets[i];
1066                 stats->obytes += stats->q_obytes[i];
1067                 stats->oerrors += txStats.pktsTxError + txStats.pktsTxDiscard;
1068         }
1069
1070         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
1071         for (i = 0; i < hw->num_rx_queues; i++) {
1072                 vmxnet3_rx_stats_get(hw, i, &rxStats);
1073
1074                 stats->q_ipackets[i] = rxStats.ucastPktsRxOK +
1075                         rxStats.mcastPktsRxOK +
1076                         rxStats.bcastPktsRxOK;
1077
1078                 stats->q_ibytes[i] = rxStats.ucastBytesRxOK +
1079                         rxStats.mcastBytesRxOK +
1080                         rxStats.bcastBytesRxOK;
1081
1082                 stats->ipackets += stats->q_ipackets[i];
1083                 stats->ibytes += stats->q_ibytes[i];
1084
1085                 stats->q_errors[i] = rxStats.pktsRxError;
1086                 stats->ierrors += rxStats.pktsRxError;
1087                 stats->imissed += rxStats.pktsRxOutOfBuf;
1088         }
1089
1090         return 0;
1091 }
1092
1093 static void
1094 vmxnet3_dev_stats_reset(struct rte_eth_dev *dev)
1095 {
1096         unsigned int i;
1097         struct vmxnet3_hw *hw = dev->data->dev_private;
1098         struct UPT1_TxStats txStats;
1099         struct UPT1_RxStats rxStats;
1100
1101         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
1102
1103         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
1104
1105         for (i = 0; i < hw->num_tx_queues; i++) {
1106                 vmxnet3_hw_tx_stats_get(hw, i, &txStats);
1107                 memcpy(&hw->snapshot_tx_stats[i], &txStats,
1108                         sizeof(hw->snapshot_tx_stats[0]));
1109         }
1110         for (i = 0; i < hw->num_rx_queues; i++) {
1111                 vmxnet3_hw_rx_stats_get(hw, i, &rxStats);
1112                 memcpy(&hw->snapshot_rx_stats[i], &rxStats,
1113                         sizeof(hw->snapshot_rx_stats[0]));
1114         }
1115 }
1116
1117 static void
1118 vmxnet3_dev_info_get(struct rte_eth_dev *dev __rte_unused,
1119                      struct rte_eth_dev_info *dev_info)
1120 {
1121         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
1122         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
1123         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
1124         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
1125         dev_info->speed_capa = ETH_LINK_SPEED_10G;
1126         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
1127
1128         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
1129
1130         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
1131                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
1132                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
1133                 .nb_align = 1,
1134         };
1135
1136         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
1137                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
1138                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
1139                 .nb_align = 1,
1140                 .nb_seg_max = VMXNET3_TX_MAX_SEG,
1141                 .nb_mtu_seg_max = VMXNET3_MAX_TXD_PER_PKT,
1142         };
1143
1144         dev_info->rx_offload_capa = VMXNET3_RX_OFFLOAD_CAP;
1145         dev_info->rx_queue_offload_capa = 0;
1146         dev_info->tx_offload_capa = VMXNET3_TX_OFFLOAD_CAP;
1147         dev_info->tx_queue_offload_capa = 0;
1148 }
1149
1150 static const uint32_t *
1151 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1152 {
1153         static const uint32_t ptypes[] = {
1154                 RTE_PTYPE_L3_IPV4_EXT,
1155                 RTE_PTYPE_L3_IPV4,
1156                 RTE_PTYPE_UNKNOWN
1157         };
1158
1159         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
1160                 return ptypes;
1161         return NULL;
1162 }
1163
1164 static int
1165 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
1166 {
1167         struct vmxnet3_hw *hw = dev->data->dev_private;
1168
1169         ether_addr_copy(mac_addr, (struct ether_addr *)(hw->perm_addr));
1170         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
1171         return 0;
1172 }
1173
1174 /* return 0 means link status changed, -1 means not changed */
1175 static int
1176 __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
1177                           __rte_unused int wait_to_complete)
1178 {
1179         struct vmxnet3_hw *hw = dev->data->dev_private;
1180         struct rte_eth_link link;
1181         uint32_t ret;
1182
1183         memset(&link, 0, sizeof(link));
1184
1185         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
1186         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
1187
1188         if (ret & 0x1)
1189                 link.link_status = ETH_LINK_UP;
1190         link.link_duplex = ETH_LINK_FULL_DUPLEX;
1191         link.link_speed = ETH_SPEED_NUM_10G;
1192         link.link_autoneg = ETH_LINK_FIXED;
1193
1194         return rte_eth_linkstatus_set(dev, &link);
1195 }
1196
1197 static int
1198 vmxnet3_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
1199 {
1200         /* Link status doesn't change for stopped dev */
1201         if (dev->data->dev_started == 0)
1202                 return -1;
1203
1204         return __vmxnet3_dev_link_update(dev, wait_to_complete);
1205 }
1206
1207 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
1208 static void
1209 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set)
1210 {
1211         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1212
1213         if (set)
1214                 rxConf->rxMode = rxConf->rxMode | feature;
1215         else
1216                 rxConf->rxMode = rxConf->rxMode & (~feature);
1217
1218         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
1219 }
1220
1221 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1222 static void
1223 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
1224 {
1225         struct vmxnet3_hw *hw = dev->data->dev_private;
1226         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1227
1228         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
1229         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
1230
1231         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1232                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1233 }
1234
1235 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1236 static void
1237 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
1238 {
1239         struct vmxnet3_hw *hw = dev->data->dev_private;
1240         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1241         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1242
1243         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1244                 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1245         else
1246                 memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1247         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
1248         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1249                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1250 }
1251
1252 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1253 static void
1254 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
1255 {
1256         struct vmxnet3_hw *hw = dev->data->dev_private;
1257
1258         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
1259 }
1260
1261 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1262 static void
1263 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
1264 {
1265         struct vmxnet3_hw *hw = dev->data->dev_private;
1266
1267         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
1268 }
1269
1270 /* Enable/disable filter on vlan */
1271 static int
1272 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
1273 {
1274         struct vmxnet3_hw *hw = dev->data->dev_private;
1275         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1276         uint32_t *vf_table = rxConf->vfTable;
1277
1278         /* save state for restore */
1279         if (on)
1280                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1281         else
1282                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1283
1284         /* don't change active filter if in promiscuous mode */
1285         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
1286                 return 0;
1287
1288         /* set in hardware */
1289         if (on)
1290                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
1291         else
1292                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
1293
1294         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1295                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1296         return 0;
1297 }
1298
1299 static int
1300 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1301 {
1302         struct vmxnet3_hw *hw = dev->data->dev_private;
1303         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
1304         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
1305         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1306
1307         if (mask & ETH_VLAN_STRIP_MASK) {
1308                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1309                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1310                 else
1311                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1312
1313                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1314                                        VMXNET3_CMD_UPDATE_FEATURE);
1315         }
1316
1317         if (mask & ETH_VLAN_FILTER_MASK) {
1318                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1319                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1320                 else
1321                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1322
1323                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1324                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1325         }
1326
1327         return 0;
1328 }
1329
1330 static void
1331 vmxnet3_process_events(struct rte_eth_dev *dev)
1332 {
1333         struct vmxnet3_hw *hw = dev->data->dev_private;
1334         uint32_t events = hw->shared->ecr;
1335
1336         if (!events)
1337                 return;
1338
1339         /*
1340          * ECR bits when written with 1b are cleared. Hence write
1341          * events back to ECR so that the bits which were set will be reset.
1342          */
1343         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
1344
1345         /* Check if link state has changed */
1346         if (events & VMXNET3_ECR_LINK) {
1347                 PMD_DRV_LOG(DEBUG, "Process events: VMXNET3_ECR_LINK event");
1348                 if (vmxnet3_dev_link_update(dev, 0) == 0)
1349                         _rte_eth_dev_callback_process(dev,
1350                                                       RTE_ETH_EVENT_INTR_LSC,
1351                                                       NULL);
1352         }
1353
1354         /* Check if there is an error on xmit/recv queues */
1355         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
1356                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1357                                        VMXNET3_CMD_GET_QUEUE_STATUS);
1358
1359                 if (hw->tqd_start->status.stopped)
1360                         PMD_DRV_LOG(ERR, "tq error 0x%x",
1361                                     hw->tqd_start->status.error);
1362
1363                 if (hw->rqd_start->status.stopped)
1364                         PMD_DRV_LOG(ERR, "rq error 0x%x",
1365                                      hw->rqd_start->status.error);
1366
1367                 /* Reset the device */
1368                 /* Have to reset the device */
1369         }
1370
1371         if (events & VMXNET3_ECR_DIC)
1372                 PMD_DRV_LOG(DEBUG, "Device implementation change event.");
1373
1374         if (events & VMXNET3_ECR_DEBUG)
1375                 PMD_DRV_LOG(DEBUG, "Debug event generated by device.");
1376 }
1377
1378 static void
1379 vmxnet3_interrupt_handler(void *param)
1380 {
1381         struct rte_eth_dev *dev = param;
1382         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
1383
1384         vmxnet3_process_events(dev);
1385
1386         if (rte_intr_enable(&pci_dev->intr_handle) < 0)
1387                 PMD_DRV_LOG(ERR, "interrupt enable failed");
1388 }
1389
1390 RTE_PMD_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd);
1391 RTE_PMD_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);
1392 RTE_PMD_REGISTER_KMOD_DEP(net_vmxnet3, "* igb_uio | uio_pci_generic | vfio-pci");
1393
1394 RTE_INIT(vmxnet3_init_log)
1395 {
1396         vmxnet3_logtype_init = rte_log_register("pmd.net.vmxnet3.init");
1397         if (vmxnet3_logtype_init >= 0)
1398                 rte_log_set_level(vmxnet3_logtype_init, RTE_LOG_NOTICE);
1399         vmxnet3_logtype_driver = rte_log_register("pmd.net.vmxnet3.driver");
1400         if (vmxnet3_logtype_driver >= 0)
1401                 rte_log_set_level(vmxnet3_logtype_driver, RTE_LOG_NOTICE);
1402 }