drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2015 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <fcntl.h>
  13 #include <inttypes.h>
  14 #include <rte_byteorder.h>
  15 #include <rte_common.h>
  16 #include <rte_cycles.h>
  17
  18 #include <rte_interrupts.h>
  19 #include <rte_log.h>
  20 #include <rte_debug.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_atomic.h>
  24 #include <rte_branch_prediction.h>
  25 #include <rte_memory.h>
  26 #include <rte_memzone.h>
  27 #include <rte_eal.h>
  28 #include <rte_alarm.h>
  29 #include <rte_ether.h>
  30 #include <rte_ethdev_driver.h>
  31 #include <rte_ethdev_pci.h>
  32 #include <rte_string_fns.h>
  33 #include <rte_malloc.h>
  34 #include <rte_dev.h>
  35
  36 #include "base/vmxnet3_defs.h"
  37
  38 #include "vmxnet3_ring.h"
  39 #include "vmxnet3_logs.h"
  40 #include "vmxnet3_ethdev.h"
  41
  42 #define PROCESS_SYS_EVENTS 0
  43
  44 #define VMXNET3_TX_MAX_SEG      UINT8_MAX
  45
  46 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  47 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  48 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  49 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  50 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  51 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  52 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  53 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  54 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  55 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  56 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  57 static int __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  58                                      int wait_to_complete);
  59 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  60                                    int wait_to_complete);
  61 static void vmxnet3_hw_stats_save(struct vmxnet3_hw *hw);
  62 static int vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  63                                   struct rte_eth_stats *stats);
  64 static int vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
  65                                         struct rte_eth_xstat_name *xstats,
  66                                         unsigned int n);
  67 static int vmxnet3_dev_xstats_get(struct rte_eth_dev *dev,
  68                                   struct rte_eth_xstat *xstats, unsigned int n);
  69 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  70                                  struct rte_eth_dev_info *dev_info);
  71 static const uint32_t *
  72 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
  73 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
  74                                        uint16_t vid, int on);
  75 static int vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  76 static void vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
  77                                  struct ether_addr *mac_addr);
  78 static void vmxnet3_interrupt_handler(void *param);
  79
  80 int vmxnet3_logtype_init;
  81 int vmxnet3_logtype_driver;
  82
  83 /*
  84  * The set of PCI devices this driver supports
  85  */
  86 #define VMWARE_PCI_VENDOR_ID 0x15AD
  87 #define VMWARE_DEV_ID_VMXNET3 0x07B0
  88 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
  89         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
  90         { .vendor_id = 0, /* sentinel */ },
  91 };
  92
  93 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
  94         .dev_configure        = vmxnet3_dev_configure,
  95         .dev_start            = vmxnet3_dev_start,
  96         .dev_stop             = vmxnet3_dev_stop,
  97         .dev_close            = vmxnet3_dev_close,
  98         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
  99         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
 100         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 101         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 102         .link_update          = vmxnet3_dev_link_update,
 103         .stats_get            = vmxnet3_dev_stats_get,
 104         .xstats_get_names     = vmxnet3_dev_xstats_get_names,
 105         .xstats_get           = vmxnet3_dev_xstats_get,
 106         .mac_addr_set         = vmxnet3_mac_addr_set,
 107         .dev_infos_get        = vmxnet3_dev_info_get,
 108         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
 109         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 110         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 111         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 112         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 113         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 114         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 115 };
 116
 117 struct vmxnet3_xstats_name_off {
 118         char name[RTE_ETH_XSTATS_NAME_SIZE];
 119         unsigned int offset;
 120 };
 121
 122 /* tx_qX_ is prepended to the name string here */
 123 static const struct vmxnet3_xstats_name_off vmxnet3_txq_stat_strings[] = {
 124         {"drop_total",         offsetof(struct vmxnet3_txq_stats, drop_total)},
 125         {"drop_too_many_segs", offsetof(struct vmxnet3_txq_stats, drop_too_many_segs)},
 126         {"drop_tso",           offsetof(struct vmxnet3_txq_stats, drop_tso)},
 127         {"tx_ring_full",       offsetof(struct vmxnet3_txq_stats, tx_ring_full)},
 128 };
 129
 130 /* rx_qX_ is prepended to the name string here */
 131 static const struct vmxnet3_xstats_name_off vmxnet3_rxq_stat_strings[] = {
 132         {"drop_total",           offsetof(struct vmxnet3_rxq_stats, drop_total)},
 133         {"drop_err",             offsetof(struct vmxnet3_rxq_stats, drop_err)},
 134         {"drop_fcs",             offsetof(struct vmxnet3_rxq_stats, drop_fcs)},
 135         {"rx_buf_alloc_failure", offsetof(struct vmxnet3_rxq_stats, rx_buf_alloc_failure)},
 136 };
 137
 138 static const struct rte_memzone *
 139 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 140                  const char *post_string, int socket_id,
 141                  uint16_t align, bool reuse)
 142 {
 143         char z_name[RTE_MEMZONE_NAMESIZE];
 144         const struct rte_memzone *mz;
 145
 146         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
 147                  dev->device->driver->name, dev->data->port_id, post_string);
 148
 149         mz = rte_memzone_lookup(z_name);
 150         if (!reuse) {
 151                 if (mz)
 152                         rte_memzone_free(mz);
 153                 return rte_memzone_reserve_aligned(z_name, size, socket_id,
 154                                                    0, align);
 155         }
 156
 157         if (mz)
 158                 return mz;
 159
 160         return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
 161 }
 162
 163 /**
 164  * Atomically reads the link status information from global
 165  * structure rte_eth_dev.
 166  *
 167  * @param dev
 168  *   - Pointer to the structure rte_eth_dev to read from.
 169  *   - Pointer to the buffer to be saved with the link status.
 170  *
 171  * @return
 172  *   - On success, zero.
 173  *   - On failure, negative value.
 174  */
 175
 176 static int
 177 vmxnet3_dev_atomic_read_link_status(struct rte_eth_dev *dev,
 178                                     struct rte_eth_link *link)
 179 {
 180         struct rte_eth_link *dst = link;
 181         struct rte_eth_link *src = &(dev->data->dev_link);
 182
 183         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 184                                 *(uint64_t *)src) == 0)
 185                 return -1;
 186
 187         return 0;
 188 }
 189
 190 /**
 191  * Atomically writes the link status information into global
 192  * structure rte_eth_dev.
 193  *
 194  * @param dev
 195  *   - Pointer to the structure rte_eth_dev to write to.
 196  *   - Pointer to the buffer to be saved with the link status.
 197  *
 198  * @return
 199  *   - On success, zero.
 200  *   - On failure, negative value.
 201  */
 202 static int
 203 vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
 204                                      struct rte_eth_link *link)
 205 {
 206         struct rte_eth_link *dst = &(dev->data->dev_link);
 207         struct rte_eth_link *src = link;
 208
 209         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 210                                 *(uint64_t *)src) == 0)
 211                 return -1;
 212
 213         return 0;
 214 }
 215
 216 /*
 217  * This function is based on vmxnet3_disable_intr()
 218  */
 219 static void
 220 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 221 {
 222         int i;
 223
 224         PMD_INIT_FUNC_TRACE();
 225
 226         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 227         for (i = 0; i < hw->num_intrs; i++)
 228                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 229 }
 230
 231 static void
 232 vmxnet3_enable_intr(struct vmxnet3_hw *hw)
 233 {
 234         int i;
 235
 236         PMD_INIT_FUNC_TRACE();
 237
 238         hw->shared->devRead.intrConf.intrCtrl &= ~VMXNET3_IC_DISABLE_ALL;
 239         for (i = 0; i < hw->num_intrs; i++)
 240                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 0);
 241 }
 242
 243 /*
 244  * Gets tx data ring descriptor size.
 245  */
 246 static uint16_t
 247 eth_vmxnet3_txdata_get(struct vmxnet3_hw *hw)
 248 {
 249         uint16 txdata_desc_size;
 250
 251         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 252                                VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
 253         txdata_desc_size = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 254
 255         return (txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE ||
 256                 txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE ||
 257                 txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK) ?
 258                 sizeof(struct Vmxnet3_TxDataDesc) : txdata_desc_size;
 259 }
 260
 261 /*
 262  * It returns 0 on success.
 263  */
 264 static int
 265 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 266 {
 267         struct rte_pci_device *pci_dev;
 268         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 269         uint32_t mac_hi, mac_lo, ver;
 270         struct rte_eth_link link;
 271
 272         PMD_INIT_FUNC_TRACE();
 273
 274         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 275         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 276         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 277         eth_dev->tx_pkt_prepare = vmxnet3_prep_pkts;
 278         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 279
 280         /*
 281          * for secondary processes, we don't initialize any further as primary
 282          * has already done this work.
 283          */
 284         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 285                 return 0;
 286
 287         rte_eth_copy_pci_info(eth_dev, pci_dev);
 288
 289         /* Vendor and Device ID need to be set before init of shared code */
 290         hw->device_id = pci_dev->id.device_id;
 291         hw->vendor_id = pci_dev->id.vendor_id;
 292         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 293         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 294
 295         hw->num_rx_queues = 1;
 296         hw->num_tx_queues = 1;
 297         hw->bufs_per_pkt = 1;
 298
 299         /* Check h/w version compatibility with driver. */
 300         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 301         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 302
 303         if (ver & (1 << VMXNET3_REV_3)) {
 304                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 305                                        1 << VMXNET3_REV_3);
 306                 hw->version = VMXNET3_REV_3 + 1;
 307         } else if (ver & (1 << VMXNET3_REV_2)) {
 308                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 309                                        1 << VMXNET3_REV_2);
 310                 hw->version = VMXNET3_REV_2 + 1;
 311         } else if (ver & (1 << VMXNET3_REV_1)) {
 312                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 313                                        1 << VMXNET3_REV_1);
 314                 hw->version = VMXNET3_REV_1 + 1;
 315         } else {
 316                 PMD_INIT_LOG(ERR, "Incompatible hardware version: %d", ver);
 317                 return -EIO;
 318         }
 319
 320         PMD_INIT_LOG(DEBUG, "Using device version %d\n", hw->version);
 321
 322         /* Check UPT version compatibility with driver. */
 323         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 324         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 325         if (ver & 0x1)
 326                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 327         else {
 328                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 329                 return -EIO;
 330         }
 331
 332         /* Getting MAC Address */
 333         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 334         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 335         memcpy(hw->perm_addr, &mac_lo, 4);
 336         memcpy(hw->perm_addr + 4, &mac_hi, 2);
 337
 338         /* Allocate memory for storing MAC addresses */
 339         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 340                                                VMXNET3_MAX_MAC_ADDRS, 0);
 341         if (eth_dev->data->mac_addrs == NULL) {
 342                 PMD_INIT_LOG(ERR,
 343                              "Failed to allocate %d bytes needed to store MAC addresses",
 344                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 345                 return -ENOMEM;
 346         }
 347         /* Copy the permanent MAC address */
 348         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 349                         &eth_dev->data->mac_addrs[0]);
 350
 351         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 352                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 353                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 354
 355         /* Put device in Quiesce Mode */
 356         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 357
 358         /* allow untagged pkts */
 359         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 360
 361         hw->txdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 362                 eth_vmxnet3_txdata_get(hw) : sizeof(struct Vmxnet3_TxDataDesc);
 363
 364         hw->rxdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 365                 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
 366         RTE_ASSERT((hw->rxdata_desc_size & ~VMXNET3_RXDATA_DESC_SIZE_MASK) ==
 367                    hw->rxdata_desc_size);
 368
 369         /* clear shadow stats */
 370         memset(hw->saved_tx_stats, 0, sizeof(hw->saved_tx_stats));
 371         memset(hw->saved_rx_stats, 0, sizeof(hw->saved_rx_stats));
 372
 373         /* set the initial link status */
 374         memset(&link, 0, sizeof(link));
 375         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 376         link.link_speed = ETH_SPEED_NUM_10G;
 377         link.link_autoneg = ETH_LINK_FIXED;
 378         vmxnet3_dev_atomic_write_link_status(eth_dev, &link);
 379
 380         return 0;
 381 }
 382
 383 static int
 384 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 385 {
 386         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 387
 388         PMD_INIT_FUNC_TRACE();
 389
 390         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 391                 return 0;
 392
 393         if (hw->adapter_stopped == 0)
 394                 vmxnet3_dev_close(eth_dev);
 395
 396         eth_dev->dev_ops = NULL;
 397         eth_dev->rx_pkt_burst = NULL;
 398         eth_dev->tx_pkt_burst = NULL;
 399         eth_dev->tx_pkt_prepare = NULL;
 400
 401         rte_free(eth_dev->data->mac_addrs);
 402         eth_dev->data->mac_addrs = NULL;
 403
 404         return 0;
 405 }
 406
 407 static int eth_vmxnet3_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 408         struct rte_pci_device *pci_dev)
 409 {
 410         return rte_eth_dev_pci_generic_probe(pci_dev,
 411                 sizeof(struct vmxnet3_hw), eth_vmxnet3_dev_init);
 412 }
 413
 414 static int eth_vmxnet3_pci_remove(struct rte_pci_device *pci_dev)
 415 {
 416         return rte_eth_dev_pci_generic_remove(pci_dev, eth_vmxnet3_dev_uninit);
 417 }
 418
 419 static struct rte_pci_driver rte_vmxnet3_pmd = {
 420         .id_table = pci_id_vmxnet3_map,
 421         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
 422         .probe = eth_vmxnet3_pci_probe,
 423         .remove = eth_vmxnet3_pci_remove,
 424 };
 425
 426 static int
 427 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 428 {
 429         const struct rte_memzone *mz;
 430         struct vmxnet3_hw *hw = dev->data->dev_private;
 431         size_t size;
 432
 433         PMD_INIT_FUNC_TRACE();
 434
 435         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
 436             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
 437                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
 438                 return -EINVAL;
 439         }
 440
 441         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
 442                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
 443                 return -EINVAL;
 444         }
 445
 446         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 447                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 448
 449         if (size > UINT16_MAX)
 450                 return -EINVAL;
 451
 452         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 453         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 454
 455         /*
 456          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 457          * on current socket
 458          */
 459         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 460                               "shared", rte_socket_id(), 8, 1);
 461
 462         if (mz == NULL) {
 463                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 464                 return -ENOMEM;
 465         }
 466         memset(mz->addr, 0, mz->len);
 467
 468         hw->shared = mz->addr;
 469         hw->sharedPA = mz->iova;
 470
 471         /*
 472          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 473          * on current socket.
 474          *
 475          * We cannot reuse this memzone from previous allocation as its size
 476          * depends on the number of tx and rx queues, which could be different
 477          * from one config to another.
 478          */
 479         mz = gpa_zone_reserve(dev, size, "queuedesc", rte_socket_id(),
 480                               VMXNET3_QUEUE_DESC_ALIGN, 0);
 481         if (mz == NULL) {
 482                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 483                 return -ENOMEM;
 484         }
 485         memset(mz->addr, 0, mz->len);
 486
 487         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 488         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 489
 490         hw->queueDescPA = mz->iova;
 491         hw->queue_desc_len = (uint16_t)size;
 492
 493         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 494                 /* Allocate memory structure for UPT1_RSSConf and configure */
 495                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf),
 496                                       "rss_conf", rte_socket_id(),
 497                                       RTE_CACHE_LINE_SIZE, 1);
 498                 if (mz == NULL) {
 499                         PMD_INIT_LOG(ERR,
 500                                      "ERROR: Creating rss_conf structure zone");
 501                         return -ENOMEM;
 502                 }
 503                 memset(mz->addr, 0, mz->len);
 504
 505                 hw->rss_conf = mz->addr;
 506                 hw->rss_confPA = mz->iova;
 507         }
 508
 509         return 0;
 510 }
 511
 512 static void
 513 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
 514 {
 515         uint32_t val;
 516
 517         PMD_INIT_LOG(DEBUG,
 518                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 519                      addr[0], addr[1], addr[2],
 520                      addr[3], addr[4], addr[5]);
 521
 522         memcpy(&val, addr, 4);
 523         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 524
 525         memcpy(&val, addr + 4, 2);
 526         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 527 }
 528
 529 static int
 530 vmxnet3_dev_setup_memreg(struct rte_eth_dev *dev)
 531 {
 532         struct vmxnet3_hw *hw = dev->data->dev_private;
 533         Vmxnet3_DriverShared *shared = hw->shared;
 534         Vmxnet3_CmdInfo *cmdInfo;
 535         struct rte_mempool *mp[VMXNET3_MAX_RX_QUEUES];
 536         uint8_t index[VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES];
 537         uint32_t num, i, j, size;
 538
 539         if (hw->memRegsPA == 0) {
 540                 const struct rte_memzone *mz;
 541
 542                 size = sizeof(Vmxnet3_MemRegs) +
 543                         (VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES) *
 544                         sizeof(Vmxnet3_MemoryRegion);
 545
 546                 mz = gpa_zone_reserve(dev, size, "memRegs", rte_socket_id(), 8,
 547                                       1);
 548                 if (mz == NULL) {
 549                         PMD_INIT_LOG(ERR, "ERROR: Creating memRegs zone");
 550                         return -ENOMEM;
 551                 }
 552                 memset(mz->addr, 0, mz->len);
 553                 hw->memRegs = mz->addr;
 554                 hw->memRegsPA = mz->iova;
 555         }
 556
 557         num = hw->num_rx_queues;
 558
 559         for (i = 0; i < num; i++) {
 560                 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
 561
 562                 mp[i] = rxq->mp;
 563                 index[i] = 1 << i;
 564         }
 565
 566         /*
 567          * The same mempool could be used by multiple queues. In such a case,
 568          * remove duplicate mempool entries. Only one entry is kept with
 569          * bitmask indicating queues that are using this mempool.
 570          */
 571         for (i = 1; i < num; i++) {
 572                 for (j = 0; j < i; j++) {
 573                         if (mp[i] == mp[j]) {
 574                                 mp[i] = NULL;
 575                                 index[j] |= 1 << i;
 576                                 break;
 577                         }
 578                 }
 579         }
 580
 581         j = 0;
 582         for (i = 0; i < num; i++) {
 583                 if (mp[i] == NULL)
 584                         continue;
 585
 586                 Vmxnet3_MemoryRegion *mr = &hw->memRegs->memRegs[j];
 587
 588                 mr->startPA =
 589                         (uintptr_t)STAILQ_FIRST(&mp[i]->mem_list)->iova;
 590                 mr->length = STAILQ_FIRST(&mp[i]->mem_list)->len <= INT32_MAX ?
 591                         STAILQ_FIRST(&mp[i]->mem_list)->len : INT32_MAX;
 592                 mr->txQueueBits = index[i];
 593                 mr->rxQueueBits = index[i];
 594
 595                 PMD_INIT_LOG(INFO,
 596                              "index: %u startPA: %" PRIu64 " length: %u, "
 597                              "rxBits: %x",
 598                              j, mr->startPA, mr->length, mr->rxQueueBits);
 599                 j++;
 600         }
 601         hw->memRegs->numRegs = j;
 602         PMD_INIT_LOG(INFO, "numRegs: %u", j);
 603
 604         size = sizeof(Vmxnet3_MemRegs) +
 605                 (j - 1) * sizeof(Vmxnet3_MemoryRegion);
 606
 607         cmdInfo = &shared->cu.cmdInfo;
 608         cmdInfo->varConf.confVer = 1;
 609         cmdInfo->varConf.confLen = size;
 610         cmdInfo->varConf.confPA = hw->memRegsPA;
 611
 612         return 0;
 613 }
 614
 615 static int
 616 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 617 {
 618         struct rte_eth_conf port_conf = dev->data->dev_conf;
 619         struct vmxnet3_hw *hw = dev->data->dev_private;
 620         uint32_t mtu = dev->data->mtu;
 621         Vmxnet3_DriverShared *shared = hw->shared;
 622         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 623         uint32_t i;
 624         int ret;
 625
 626         shared->magic = VMXNET3_REV1_MAGIC;
 627         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 628
 629         /* Setting up Guest OS information */
 630         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 631                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64;
 632         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 633         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 634         devRead->misc.driverInfo.uptVerSpt     = 1;
 635
 636         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 637         devRead->misc.queueDescPA  = hw->queueDescPA;
 638         devRead->misc.queueDescLen = hw->queue_desc_len;
 639         devRead->misc.numTxQueues  = hw->num_tx_queues;
 640         devRead->misc.numRxQueues  = hw->num_rx_queues;
 641
 642         /*
 643          * Set number of interrupts to 1
 644          * PMD by default disables all the interrupts but this is MUST
 645          * to activate device. It needs at least one interrupt for
 646          * link events to handle
 647          */
 648         hw->num_intrs = devRead->intrConf.numIntrs = 1;
 649         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 650
 651         for (i = 0; i < hw->num_tx_queues; i++) {
 652                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 653                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 654
 655                 txq->shared = &hw->tqd_start[i];
 656
 657                 tqd->ctrl.txNumDeferred  = 0;
 658                 tqd->ctrl.txThreshold    = 1;
 659                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 660                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 661                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 662
 663                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 664                 tqd->conf.compRingSize = txq->comp_ring.size;
 665                 tqd->conf.dataRingSize = txq->data_ring.size;
 666                 tqd->conf.txDataRingDescSize = txq->txdata_desc_size;
 667                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 668                 tqd->status.stopped    = TRUE;
 669                 tqd->status.error      = 0;
 670                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 671         }
 672
 673         for (i = 0; i < hw->num_rx_queues; i++) {
 674                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 675                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 676
 677                 rxq->shared = &hw->rqd_start[i];
 678
 679                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 680                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 681                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 682
 683                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 684                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 685                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 686                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 687                 if (VMXNET3_VERSION_GE_3(hw)) {
 688                         rqd->conf.rxDataRingBasePA = rxq->data_ring.basePA;
 689                         rqd->conf.rxDataRingDescSize = rxq->data_desc_size;
 690                 }
 691                 rqd->status.stopped       = TRUE;
 692                 rqd->status.error         = 0;
 693                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 694         }
 695
 696         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 697         devRead->rxFilterConf.rxMode = 0;
 698
 699         /* Setting up feature flags */
 700         if (dev->data->dev_conf.rxmode.hw_ip_checksum)
 701                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 702
 703         if (dev->data->dev_conf.rxmode.enable_lro) {
 704                 devRead->misc.uptFeatures |= VMXNET3_F_LRO;
 705                 devRead->misc.maxNumRxSG = 0;
 706         }
 707
 708         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 709                 ret = vmxnet3_rss_configure(dev);
 710                 if (ret != VMXNET3_SUCCESS)
 711                         return ret;
 712
 713                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 714                 devRead->rssConfDesc.confVer = 1;
 715                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 716                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 717         }
 718
 719         ret = vmxnet3_dev_vlan_offload_set(dev,
 720                         ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 721         if (ret)
 722                 return ret;
 723
 724         vmxnet3_write_mac(hw, dev->data->mac_addrs->addr_bytes);
 725
 726         return VMXNET3_SUCCESS;
 727 }
 728
 729 /*
 730  * Configure device link speed and setup link.
 731  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 732  * It returns 0 on success.
 733  */
 734 static int
 735 vmxnet3_dev_start(struct rte_eth_dev *dev)
 736 {
 737         int ret;
 738         struct vmxnet3_hw *hw = dev->data->dev_private;
 739
 740         PMD_INIT_FUNC_TRACE();
 741
 742         /* Save stats before it is reset by CMD_ACTIVATE */
 743         vmxnet3_hw_stats_save(hw);
 744
 745         ret = vmxnet3_setup_driver_shared(dev);
 746         if (ret != VMXNET3_SUCCESS)
 747                 return ret;
 748
 749         /* check if lsc interrupt feature is enabled */
 750         if (dev->data->dev_conf.intr_conf.lsc) {
 751                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 752
 753                 /* Setup interrupt callback  */
 754                 rte_intr_callback_register(&pci_dev->intr_handle,
 755                                            vmxnet3_interrupt_handler, dev);
 756
 757                 if (rte_intr_enable(&pci_dev->intr_handle) < 0) {
 758                         PMD_INIT_LOG(ERR, "interrupt enable failed");
 759                         return -EIO;
 760                 }
 761         }
 762
 763         /* Exchange shared data with device */
 764         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 765                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 766         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 767                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 768
 769         /* Activate device by register write */
 770         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 771         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 772
 773         if (ret != 0) {
 774                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 775                 return -EINVAL;
 776         }
 777
 778         /* Setup memory region for rx buffers */
 779         ret = vmxnet3_dev_setup_memreg(dev);
 780         if (ret == 0) {
 781                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 782                                        VMXNET3_CMD_REGISTER_MEMREGS);
 783                 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 784                 if (ret != 0)
 785                         PMD_INIT_LOG(DEBUG,
 786                                      "Failed in setup memory region cmd\n");
 787                 ret = 0;
 788         } else {
 789                 PMD_INIT_LOG(DEBUG, "Failed to setup memory region\n");
 790         }
 791
 792         /* Disable interrupts */
 793         vmxnet3_disable_intr(hw);
 794
 795         /*
 796          * Load RX queues with blank mbufs and update next2fill index for device
 797          * Update RxMode of the device
 798          */
 799         ret = vmxnet3_dev_rxtx_init(dev);
 800         if (ret != VMXNET3_SUCCESS) {
 801                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
 802                 return ret;
 803         }
 804
 805         hw->adapter_stopped = FALSE;
 806
 807         /* Setting proper Rx Mode and issue Rx Mode Update command */
 808         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 809
 810         if (dev->data->dev_conf.intr_conf.lsc) {
 811                 vmxnet3_enable_intr(hw);
 812
 813                 /*
 814                  * Update link state from device since this won't be
 815                  * done upon starting with lsc in use. This is done
 816                  * only after enabling interrupts to avoid any race
 817                  * where the link state could change without an
 818                  * interrupt being fired.
 819                  */
 820                 __vmxnet3_dev_link_update(dev, 0);
 821         }
 822
 823         return VMXNET3_SUCCESS;
 824 }
 825
 826 /*
 827  * Stop device: disable rx and tx functions to allow for reconfiguring.
 828  */
 829 static void
 830 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 831 {
 832         struct rte_eth_link link;
 833         struct vmxnet3_hw *hw = dev->data->dev_private;
 834
 835         PMD_INIT_FUNC_TRACE();
 836
 837         if (hw->adapter_stopped == 1) {
 838                 PMD_INIT_LOG(DEBUG, "Device already closed.");
 839                 return;
 840         }
 841
 842         /* disable interrupts */
 843         vmxnet3_disable_intr(hw);
 844
 845         if (dev->data->dev_conf.intr_conf.lsc) {
 846                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 847
 848                 rte_intr_disable(&pci_dev->intr_handle);
 849
 850                 rte_intr_callback_unregister(&pci_dev->intr_handle,
 851                                              vmxnet3_interrupt_handler, dev);
 852         }
 853
 854         /* quiesce the device first */
 855         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 856         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 857         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 858
 859         /* reset the device */
 860         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 861         PMD_INIT_LOG(DEBUG, "Device reset.");
 862         hw->adapter_stopped = 0;
 863
 864         vmxnet3_dev_clear_queues(dev);
 865
 866         /* Clear recorded link status */
 867         memset(&link, 0, sizeof(link));
 868         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 869         link.link_speed = ETH_SPEED_NUM_10G;
 870         link.link_autoneg = ETH_LINK_FIXED;
 871         vmxnet3_dev_atomic_write_link_status(dev, &link);
 872 }
 873
 874 /*
 875  * Reset and stop device.
 876  */
 877 static void
 878 vmxnet3_dev_close(struct rte_eth_dev *dev)
 879 {
 880         struct vmxnet3_hw *hw = dev->data->dev_private;
 881
 882         PMD_INIT_FUNC_TRACE();
 883
 884         vmxnet3_dev_stop(dev);
 885         hw->adapter_stopped = 1;
 886 }
 887
 888 static void
 889 vmxnet3_hw_tx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 890                         struct UPT1_TxStats *res)
 891 {
 892 #define VMXNET3_UPDATE_TX_STAT(h, i, f, r)              \
 893                 ((r)->f = (h)->tqd_start[(i)].stats.f + \
 894                         (h)->saved_tx_stats[(i)].f)
 895
 896         VMXNET3_UPDATE_TX_STAT(hw, q, ucastPktsTxOK, res);
 897         VMXNET3_UPDATE_TX_STAT(hw, q, mcastPktsTxOK, res);
 898         VMXNET3_UPDATE_TX_STAT(hw, q, bcastPktsTxOK, res);
 899         VMXNET3_UPDATE_TX_STAT(hw, q, ucastBytesTxOK, res);
 900         VMXNET3_UPDATE_TX_STAT(hw, q, mcastBytesTxOK, res);
 901         VMXNET3_UPDATE_TX_STAT(hw, q, bcastBytesTxOK, res);
 902         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxError, res);
 903         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxDiscard, res);
 904
 905 #undef VMXNET3_UPDATE_TX_STAT
 906 }
 907
 908 static void
 909 vmxnet3_hw_rx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 910                         struct UPT1_RxStats *res)
 911 {
 912 #define VMXNET3_UPDATE_RX_STAT(h, i, f, r)              \
 913                 ((r)->f = (h)->rqd_start[(i)].stats.f + \
 914                         (h)->saved_rx_stats[(i)].f)
 915
 916         VMXNET3_UPDATE_RX_STAT(hw, q, ucastPktsRxOK, res);
 917         VMXNET3_UPDATE_RX_STAT(hw, q, mcastPktsRxOK, res);
 918         VMXNET3_UPDATE_RX_STAT(hw, q, bcastPktsRxOK, res);
 919         VMXNET3_UPDATE_RX_STAT(hw, q, ucastBytesRxOK, res);
 920         VMXNET3_UPDATE_RX_STAT(hw, q, mcastBytesRxOK, res);
 921         VMXNET3_UPDATE_RX_STAT(hw, q, bcastBytesRxOK, res);
 922         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxError, res);
 923         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxOutOfBuf, res);
 924
 925 #undef VMXNET3_UPDATE_RX_STATS
 926 }
 927
 928 static void
 929 vmxnet3_hw_stats_save(struct vmxnet3_hw *hw)
 930 {
 931         unsigned int i;
 932
 933         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 934
 935         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 936
 937         for (i = 0; i < hw->num_tx_queues; i++)
 938                 vmxnet3_hw_tx_stats_get(hw, i, &hw->saved_tx_stats[i]);
 939         for (i = 0; i < hw->num_rx_queues; i++)
 940                 vmxnet3_hw_rx_stats_get(hw, i, &hw->saved_rx_stats[i]);
 941 }
 942
 943 static int
 944 vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
 945                              struct rte_eth_xstat_name *xstats_names,
 946                              unsigned int n)
 947 {
 948         unsigned int i, t, count = 0;
 949         unsigned int nstats =
 950                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
 951                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
 952
 953         if (!xstats_names || n < nstats)
 954                 return nstats;
 955
 956         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 957                 if (!dev->data->rx_queues[i])
 958                         continue;
 959
 960                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
 961                         snprintf(xstats_names[count].name,
 962                                  sizeof(xstats_names[count].name),
 963                                  "rx_q%u_%s", i,
 964                                  vmxnet3_rxq_stat_strings[t].name);
 965                         count++;
 966                 }
 967         }
 968
 969         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 970                 if (!dev->data->tx_queues[i])
 971                         continue;
 972
 973                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
 974                         snprintf(xstats_names[count].name,
 975                                  sizeof(xstats_names[count].name),
 976                                  "tx_q%u_%s", i,
 977                                  vmxnet3_txq_stat_strings[t].name);
 978                         count++;
 979                 }
 980         }
 981
 982         return count;
 983 }
 984
 985 static int
 986 vmxnet3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 987                        unsigned int n)
 988 {
 989         unsigned int i, t, count = 0;
 990         unsigned int nstats =
 991                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
 992                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
 993
 994         if (n < nstats)
 995                 return nstats;
 996
 997         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 998                 struct vmxnet3_rx_queue *rxq = dev->data->rx_queues[i];
 999
1000                 if (rxq == NULL)
1001                         continue;
1002
1003                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
1004                         xstats[count].value = *(uint64_t *)(((char *)&rxq->stats) +
1005                                 vmxnet3_rxq_stat_strings[t].offset);
1006                         xstats[count].id = count;
1007                         count++;
1008                 }
1009         }
1010
1011         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1012                 struct vmxnet3_tx_queue *txq = dev->data->tx_queues[i];
1013
1014                 if (txq == NULL)
1015                         continue;
1016
1017                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
1018                         xstats[count].value = *(uint64_t *)(((char *)&txq->stats) +
1019                                 vmxnet3_txq_stat_strings[t].offset);
1020                         xstats[count].id = count;
1021                         count++;
1022                 }
1023         }
1024
1025         return count;
1026 }
1027
1028 static int
1029 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1030 {
1031         unsigned int i;
1032         struct vmxnet3_hw *hw = dev->data->dev_private;
1033         struct UPT1_TxStats txStats;
1034         struct UPT1_RxStats rxStats;
1035
1036         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
1037
1038         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
1039         for (i = 0; i < hw->num_tx_queues; i++) {
1040                 vmxnet3_hw_tx_stats_get(hw, i, &txStats);
1041
1042                 stats->q_opackets[i] = txStats.ucastPktsTxOK +
1043                         txStats.mcastPktsTxOK +
1044                         txStats.bcastPktsTxOK;
1045
1046                 stats->q_obytes[i] = txStats.ucastBytesTxOK +
1047                         txStats.mcastBytesTxOK +
1048                         txStats.bcastBytesTxOK;
1049
1050                 stats->opackets += stats->q_opackets[i];
1051                 stats->obytes += stats->q_obytes[i];
1052                 stats->oerrors += txStats.pktsTxError + txStats.pktsTxDiscard;
1053         }
1054
1055         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
1056         for (i = 0; i < hw->num_rx_queues; i++) {
1057                 vmxnet3_hw_rx_stats_get(hw, i, &rxStats);
1058
1059                 stats->q_ipackets[i] = rxStats.ucastPktsRxOK +
1060                         rxStats.mcastPktsRxOK +
1061                         rxStats.bcastPktsRxOK;
1062
1063                 stats->q_ibytes[i] = rxStats.ucastBytesRxOK +
1064                         rxStats.mcastBytesRxOK +
1065                         rxStats.bcastBytesRxOK;
1066
1067                 stats->ipackets += stats->q_ipackets[i];
1068                 stats->ibytes += stats->q_ibytes[i];
1069
1070                 stats->q_errors[i] = rxStats.pktsRxError;
1071                 stats->ierrors += rxStats.pktsRxError;
1072                 stats->rx_nombuf += rxStats.pktsRxOutOfBuf;
1073         }
1074
1075         return 0;
1076 }
1077
1078 static void
1079 vmxnet3_dev_info_get(struct rte_eth_dev *dev,
1080                      struct rte_eth_dev_info *dev_info)
1081 {
1082         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1083
1084         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
1085         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
1086         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
1087         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
1088         dev_info->speed_capa = ETH_LINK_SPEED_10G;
1089         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
1090
1091         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
1092         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
1093
1094         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
1095                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
1096                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
1097                 .nb_align = 1,
1098         };
1099
1100         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
1101                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
1102                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
1103                 .nb_align = 1,
1104                 .nb_seg_max = VMXNET3_TX_MAX_SEG,
1105                 .nb_mtu_seg_max = VMXNET3_MAX_TXD_PER_PKT,
1106         };
1107
1108         dev_info->rx_offload_capa =
1109                 DEV_RX_OFFLOAD_VLAN_STRIP |
1110                 DEV_RX_OFFLOAD_UDP_CKSUM |
1111                 DEV_RX_OFFLOAD_TCP_CKSUM |
1112                 DEV_RX_OFFLOAD_TCP_LRO;
1113
1114         dev_info->tx_offload_capa =
1115                 DEV_TX_OFFLOAD_VLAN_INSERT |
1116                 DEV_TX_OFFLOAD_TCP_CKSUM |
1117                 DEV_TX_OFFLOAD_UDP_CKSUM |
1118                 DEV_TX_OFFLOAD_TCP_TSO;
1119 }
1120
1121 static const uint32_t *
1122 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1123 {
1124         static const uint32_t ptypes[] = {
1125                 RTE_PTYPE_L3_IPV4_EXT,
1126                 RTE_PTYPE_L3_IPV4,
1127                 RTE_PTYPE_UNKNOWN
1128         };
1129
1130         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
1131                 return ptypes;
1132         return NULL;
1133 }
1134
1135 static void
1136 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
1137 {
1138         struct vmxnet3_hw *hw = dev->data->dev_private;
1139
1140         ether_addr_copy(mac_addr, (struct ether_addr *)(hw->perm_addr));
1141         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
1142 }
1143
1144 /* return 0 means link status changed, -1 means not changed */
1145 static int
1146 __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
1147                           __rte_unused int wait_to_complete)
1148 {
1149         struct vmxnet3_hw *hw = dev->data->dev_private;
1150         struct rte_eth_link old = { 0 }, link;
1151         uint32_t ret;
1152
1153         memset(&link, 0, sizeof(link));
1154         vmxnet3_dev_atomic_read_link_status(dev, &old);
1155
1156         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
1157         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
1158
1159         if (ret & 0x1)
1160                 link.link_status = ETH_LINK_UP;
1161         link.link_duplex = ETH_LINK_FULL_DUPLEX;
1162         link.link_speed = ETH_SPEED_NUM_10G;
1163         link.link_autoneg = ETH_LINK_AUTONEG;
1164
1165         vmxnet3_dev_atomic_write_link_status(dev, &link);
1166
1167         return (old.link_status == link.link_status) ? -1 : 0;
1168 }
1169
1170 static int
1171 vmxnet3_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
1172 {
1173         /* Link status doesn't change for stopped dev */
1174         if (dev->data->dev_started == 0)
1175                 return -1;
1176
1177         return __vmxnet3_dev_link_update(dev, wait_to_complete);
1178 }
1179
1180 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
1181 static void
1182 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set)
1183 {
1184         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1185
1186         if (set)
1187                 rxConf->rxMode = rxConf->rxMode | feature;
1188         else
1189                 rxConf->rxMode = rxConf->rxMode & (~feature);
1190
1191         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
1192 }
1193
1194 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1195 static void
1196 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
1197 {
1198         struct vmxnet3_hw *hw = dev->data->dev_private;
1199         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1200
1201         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
1202         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
1203
1204         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1205                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1206 }
1207
1208 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1209 static void
1210 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
1211 {
1212         struct vmxnet3_hw *hw = dev->data->dev_private;
1213         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1214
1215         if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1216                 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1217         else
1218                 memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1219         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
1220         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1221                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1222 }
1223
1224 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1225 static void
1226 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
1227 {
1228         struct vmxnet3_hw *hw = dev->data->dev_private;
1229
1230         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
1231 }
1232
1233 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1234 static void
1235 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
1236 {
1237         struct vmxnet3_hw *hw = dev->data->dev_private;
1238
1239         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
1240 }
1241
1242 /* Enable/disable filter on vlan */
1243 static int
1244 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
1245 {
1246         struct vmxnet3_hw *hw = dev->data->dev_private;
1247         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1248         uint32_t *vf_table = rxConf->vfTable;
1249
1250         /* save state for restore */
1251         if (on)
1252                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1253         else
1254                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1255
1256         /* don't change active filter if in promiscuous mode */
1257         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
1258                 return 0;
1259
1260         /* set in hardware */
1261         if (on)
1262                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
1263         else
1264                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
1265
1266         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1267                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1268         return 0;
1269 }
1270
1271 static int
1272 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1273 {
1274         struct vmxnet3_hw *hw = dev->data->dev_private;
1275         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
1276         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
1277
1278         if (mask & ETH_VLAN_STRIP_MASK) {
1279                 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1280                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1281                 else
1282                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1283
1284                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1285                                        VMXNET3_CMD_UPDATE_FEATURE);
1286         }
1287
1288         if (mask & ETH_VLAN_FILTER_MASK) {
1289                 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1290                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1291                 else
1292                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1293
1294                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1295                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1296         }
1297
1298         return 0;
1299 }
1300
1301 static void
1302 vmxnet3_process_events(struct rte_eth_dev *dev)
1303 {
1304         struct vmxnet3_hw *hw = dev->data->dev_private;
1305         uint32_t events = hw->shared->ecr;
1306
1307         if (!events)
1308                 return;
1309
1310         /*
1311          * ECR bits when written with 1b are cleared. Hence write
1312          * events back to ECR so that the bits which were set will be reset.
1313          */
1314         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
1315
1316         /* Check if link state has changed */
1317         if (events & VMXNET3_ECR_LINK) {
1318                 PMD_DRV_LOG(DEBUG, "Process events: VMXNET3_ECR_LINK event");
1319                 if (vmxnet3_dev_link_update(dev, 0) == 0)
1320                         _rte_eth_dev_callback_process(dev,
1321                                                       RTE_ETH_EVENT_INTR_LSC,
1322                                                       NULL);
1323         }
1324
1325         /* Check if there is an error on xmit/recv queues */
1326         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
1327                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1328                                        VMXNET3_CMD_GET_QUEUE_STATUS);
1329
1330                 if (hw->tqd_start->status.stopped)
1331                         PMD_DRV_LOG(ERR, "tq error 0x%x",
1332                                     hw->tqd_start->status.error);
1333
1334                 if (hw->rqd_start->status.stopped)
1335                         PMD_DRV_LOG(ERR, "rq error 0x%x",
1336                                      hw->rqd_start->status.error);
1337
1338                 /* Reset the device */
1339                 /* Have to reset the device */
1340         }
1341
1342         if (events & VMXNET3_ECR_DIC)
1343                 PMD_DRV_LOG(DEBUG, "Device implementation change event.");
1344
1345         if (events & VMXNET3_ECR_DEBUG)
1346                 PMD_DRV_LOG(DEBUG, "Debug event generated by device.");
1347 }
1348
1349 static void
1350 vmxnet3_interrupt_handler(void *param)
1351 {
1352         struct rte_eth_dev *dev = param;
1353         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
1354
1355         vmxnet3_process_events(dev);
1356
1357         if (rte_intr_enable(&pci_dev->intr_handle) < 0)
1358                 PMD_DRV_LOG(ERR, "interrupt enable failed");
1359 }
1360
1361 RTE_PMD_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd);
1362 RTE_PMD_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);
1363 RTE_PMD_REGISTER_KMOD_DEP(net_vmxnet3, "* igb_uio | uio_pci_generic | vfio-pci");
1364
1365 RTE_INIT(vmxnet3_init_log);
1366 static void
1367 vmxnet3_init_log(void)
1368 {
1369         vmxnet3_logtype_init = rte_log_register("pmd.net.vmxnet3.init");
1370         if (vmxnet3_logtype_init >= 0)
1371                 rte_log_set_level(vmxnet3_logtype_init, RTE_LOG_NOTICE);
1372         vmxnet3_logtype_driver = rte_log_register("pmd.net.vmxnet3.driver");
1373         if (vmxnet3_logtype_driver >= 0)
1374                 rte_log_set_level(vmxnet3_logtype_driver, RTE_LOG_NOTICE);
1375 }