net/vmxnet3: convert to new Rx offload API
[dpdk.git] / drivers / net / vmxnet3 / vmxnet3_ethdev.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2015 Intel Corporation
3  */
4
5 #include <sys/queue.h>
6 #include <stdio.h>
7 #include <errno.h>
8 #include <stdint.h>
9 #include <string.h>
10 #include <unistd.h>
11 #include <stdarg.h>
12 #include <fcntl.h>
13 #include <inttypes.h>
14 #include <rte_byteorder.h>
15 #include <rte_common.h>
16 #include <rte_cycles.h>
17
18 #include <rte_interrupts.h>
19 #include <rte_log.h>
20 #include <rte_debug.h>
21 #include <rte_pci.h>
22 #include <rte_bus_pci.h>
23 #include <rte_branch_prediction.h>
24 #include <rte_memory.h>
25 #include <rte_memzone.h>
26 #include <rte_eal.h>
27 #include <rte_alarm.h>
28 #include <rte_ether.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
31 #include <rte_string_fns.h>
32 #include <rte_malloc.h>
33 #include <rte_dev.h>
34
35 #include "base/vmxnet3_defs.h"
36
37 #include "vmxnet3_ring.h"
38 #include "vmxnet3_logs.h"
39 #include "vmxnet3_ethdev.h"
40
41 #define PROCESS_SYS_EVENTS 0
42
43 #define VMXNET3_TX_MAX_SEG      UINT8_MAX
44
45 #define VMXNET3_TX_OFFLOAD_CAP          \
46         (DEV_TX_OFFLOAD_VLAN_INSERT |   \
47          DEV_TX_OFFLOAD_IPV4_CKSUM |    \
48          DEV_TX_OFFLOAD_TCP_CKSUM |     \
49          DEV_TX_OFFLOAD_UDP_CKSUM |     \
50          DEV_TX_OFFLOAD_TCP_TSO |       \
51          DEV_TX_OFFLOAD_MULTI_SEGS)
52
53 #define VMXNET3_RX_OFFLOAD_CAP          \
54         (DEV_RX_OFFLOAD_VLAN_STRIP |    \
55          DEV_RX_OFFLOAD_SCATTER |       \
56          DEV_RX_OFFLOAD_IPV4_CKSUM |    \
57          DEV_RX_OFFLOAD_UDP_CKSUM |     \
58          DEV_RX_OFFLOAD_TCP_CKSUM |     \
59          DEV_RX_OFFLOAD_TCP_LRO |       \
60          DEV_RX_OFFLOAD_JUMBO_FRAME)
61
62 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
63 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
64 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
65 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
66 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
67 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
68 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
69 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
70 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
71 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
72 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
73 static int __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
74                                      int wait_to_complete);
75 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
76                                    int wait_to_complete);
77 static void vmxnet3_hw_stats_save(struct vmxnet3_hw *hw);
78 static int vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
79                                   struct rte_eth_stats *stats);
80 static int vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
81                                         struct rte_eth_xstat_name *xstats,
82                                         unsigned int n);
83 static int vmxnet3_dev_xstats_get(struct rte_eth_dev *dev,
84                                   struct rte_eth_xstat *xstats, unsigned int n);
85 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
86                                  struct rte_eth_dev_info *dev_info);
87 static const uint32_t *
88 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
89 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
90                                        uint16_t vid, int on);
91 static int vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
92 static int vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
93                                  struct ether_addr *mac_addr);
94 static void vmxnet3_interrupt_handler(void *param);
95
96 int vmxnet3_logtype_init;
97 int vmxnet3_logtype_driver;
98
99 /*
100  * The set of PCI devices this driver supports
101  */
102 #define VMWARE_PCI_VENDOR_ID 0x15AD
103 #define VMWARE_DEV_ID_VMXNET3 0x07B0
104 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
105         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
106         { .vendor_id = 0, /* sentinel */ },
107 };
108
109 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
110         .dev_configure        = vmxnet3_dev_configure,
111         .dev_start            = vmxnet3_dev_start,
112         .dev_stop             = vmxnet3_dev_stop,
113         .dev_close            = vmxnet3_dev_close,
114         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
115         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
116         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
117         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
118         .link_update          = vmxnet3_dev_link_update,
119         .stats_get            = vmxnet3_dev_stats_get,
120         .xstats_get_names     = vmxnet3_dev_xstats_get_names,
121         .xstats_get           = vmxnet3_dev_xstats_get,
122         .mac_addr_set         = vmxnet3_mac_addr_set,
123         .dev_infos_get        = vmxnet3_dev_info_get,
124         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
125         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
126         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
127         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
128         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
129         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
130         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
131 };
132
133 struct vmxnet3_xstats_name_off {
134         char name[RTE_ETH_XSTATS_NAME_SIZE];
135         unsigned int offset;
136 };
137
138 /* tx_qX_ is prepended to the name string here */
139 static const struct vmxnet3_xstats_name_off vmxnet3_txq_stat_strings[] = {
140         {"drop_total",         offsetof(struct vmxnet3_txq_stats, drop_total)},
141         {"drop_too_many_segs", offsetof(struct vmxnet3_txq_stats, drop_too_many_segs)},
142         {"drop_tso",           offsetof(struct vmxnet3_txq_stats, drop_tso)},
143         {"tx_ring_full",       offsetof(struct vmxnet3_txq_stats, tx_ring_full)},
144 };
145
146 /* rx_qX_ is prepended to the name string here */
147 static const struct vmxnet3_xstats_name_off vmxnet3_rxq_stat_strings[] = {
148         {"drop_total",           offsetof(struct vmxnet3_rxq_stats, drop_total)},
149         {"drop_err",             offsetof(struct vmxnet3_rxq_stats, drop_err)},
150         {"drop_fcs",             offsetof(struct vmxnet3_rxq_stats, drop_fcs)},
151         {"rx_buf_alloc_failure", offsetof(struct vmxnet3_rxq_stats, rx_buf_alloc_failure)},
152 };
153
154 static const struct rte_memzone *
155 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
156                  const char *post_string, int socket_id,
157                  uint16_t align, bool reuse)
158 {
159         char z_name[RTE_MEMZONE_NAMESIZE];
160         const struct rte_memzone *mz;
161
162         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
163                  dev->device->driver->name, dev->data->port_id, post_string);
164
165         mz = rte_memzone_lookup(z_name);
166         if (!reuse) {
167                 if (mz)
168                         rte_memzone_free(mz);
169                 return rte_memzone_reserve_aligned(z_name, size, socket_id,
170                                 RTE_MEMZONE_IOVA_CONTIG, align);
171         }
172
173         if (mz)
174                 return mz;
175
176         return rte_memzone_reserve_aligned(z_name, size, socket_id,
177                         RTE_MEMZONE_IOVA_CONTIG, align);
178 }
179
180 /*
181  * This function is based on vmxnet3_disable_intr()
182  */
183 static void
184 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
185 {
186         int i;
187
188         PMD_INIT_FUNC_TRACE();
189
190         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
191         for (i = 0; i < hw->num_intrs; i++)
192                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
193 }
194
195 static void
196 vmxnet3_enable_intr(struct vmxnet3_hw *hw)
197 {
198         int i;
199
200         PMD_INIT_FUNC_TRACE();
201
202         hw->shared->devRead.intrConf.intrCtrl &= ~VMXNET3_IC_DISABLE_ALL;
203         for (i = 0; i < hw->num_intrs; i++)
204                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 0);
205 }
206
207 /*
208  * Gets tx data ring descriptor size.
209  */
210 static uint16_t
211 eth_vmxnet3_txdata_get(struct vmxnet3_hw *hw)
212 {
213         uint16 txdata_desc_size;
214
215         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
216                                VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
217         txdata_desc_size = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
218
219         return (txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE ||
220                 txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE ||
221                 txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK) ?
222                 sizeof(struct Vmxnet3_TxDataDesc) : txdata_desc_size;
223 }
224
225 /*
226  * It returns 0 on success.
227  */
228 static int
229 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
230 {
231         struct rte_pci_device *pci_dev;
232         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
233         uint32_t mac_hi, mac_lo, ver;
234         struct rte_eth_link link;
235
236         PMD_INIT_FUNC_TRACE();
237
238         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
239         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
240         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
241         eth_dev->tx_pkt_prepare = vmxnet3_prep_pkts;
242         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
243
244         /*
245          * for secondary processes, we don't initialize any further as primary
246          * has already done this work.
247          */
248         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
249                 return 0;
250
251         rte_eth_copy_pci_info(eth_dev, pci_dev);
252
253         /* Vendor and Device ID need to be set before init of shared code */
254         hw->device_id = pci_dev->id.device_id;
255         hw->vendor_id = pci_dev->id.vendor_id;
256         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
257         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
258
259         hw->num_rx_queues = 1;
260         hw->num_tx_queues = 1;
261         hw->bufs_per_pkt = 1;
262
263         /* Check h/w version compatibility with driver. */
264         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
265         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
266
267         if (ver & (1 << VMXNET3_REV_3)) {
268                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
269                                        1 << VMXNET3_REV_3);
270                 hw->version = VMXNET3_REV_3 + 1;
271         } else if (ver & (1 << VMXNET3_REV_2)) {
272                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
273                                        1 << VMXNET3_REV_2);
274                 hw->version = VMXNET3_REV_2 + 1;
275         } else if (ver & (1 << VMXNET3_REV_1)) {
276                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
277                                        1 << VMXNET3_REV_1);
278                 hw->version = VMXNET3_REV_1 + 1;
279         } else {
280                 PMD_INIT_LOG(ERR, "Incompatible hardware version: %d", ver);
281                 return -EIO;
282         }
283
284         PMD_INIT_LOG(DEBUG, "Using device version %d\n", hw->version);
285
286         /* Check UPT version compatibility with driver. */
287         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
288         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
289         if (ver & 0x1)
290                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
291         else {
292                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
293                 return -EIO;
294         }
295
296         /* Getting MAC Address */
297         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
298         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
299         memcpy(hw->perm_addr, &mac_lo, 4);
300         memcpy(hw->perm_addr + 4, &mac_hi, 2);
301
302         /* Allocate memory for storing MAC addresses */
303         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
304                                                VMXNET3_MAX_MAC_ADDRS, 0);
305         if (eth_dev->data->mac_addrs == NULL) {
306                 PMD_INIT_LOG(ERR,
307                              "Failed to allocate %d bytes needed to store MAC addresses",
308                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
309                 return -ENOMEM;
310         }
311         /* Copy the permanent MAC address */
312         ether_addr_copy((struct ether_addr *) hw->perm_addr,
313                         &eth_dev->data->mac_addrs[0]);
314
315         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
316                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
317                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
318
319         /* Put device in Quiesce Mode */
320         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
321
322         /* allow untagged pkts */
323         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
324
325         hw->txdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
326                 eth_vmxnet3_txdata_get(hw) : sizeof(struct Vmxnet3_TxDataDesc);
327
328         hw->rxdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
329                 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
330         RTE_ASSERT((hw->rxdata_desc_size & ~VMXNET3_RXDATA_DESC_SIZE_MASK) ==
331                    hw->rxdata_desc_size);
332
333         /* clear shadow stats */
334         memset(hw->saved_tx_stats, 0, sizeof(hw->saved_tx_stats));
335         memset(hw->saved_rx_stats, 0, sizeof(hw->saved_rx_stats));
336
337         /* set the initial link status */
338         memset(&link, 0, sizeof(link));
339         link.link_duplex = ETH_LINK_FULL_DUPLEX;
340         link.link_speed = ETH_SPEED_NUM_10G;
341         link.link_autoneg = ETH_LINK_FIXED;
342         rte_eth_linkstatus_set(eth_dev, &link);
343
344         return 0;
345 }
346
347 static int
348 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
349 {
350         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
351
352         PMD_INIT_FUNC_TRACE();
353
354         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
355                 return 0;
356
357         if (hw->adapter_stopped == 0)
358                 vmxnet3_dev_close(eth_dev);
359
360         eth_dev->dev_ops = NULL;
361         eth_dev->rx_pkt_burst = NULL;
362         eth_dev->tx_pkt_burst = NULL;
363         eth_dev->tx_pkt_prepare = NULL;
364
365         rte_free(eth_dev->data->mac_addrs);
366         eth_dev->data->mac_addrs = NULL;
367
368         return 0;
369 }
370
371 static int eth_vmxnet3_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
372         struct rte_pci_device *pci_dev)
373 {
374         return rte_eth_dev_pci_generic_probe(pci_dev,
375                 sizeof(struct vmxnet3_hw), eth_vmxnet3_dev_init);
376 }
377
378 static int eth_vmxnet3_pci_remove(struct rte_pci_device *pci_dev)
379 {
380         return rte_eth_dev_pci_generic_remove(pci_dev, eth_vmxnet3_dev_uninit);
381 }
382
383 static struct rte_pci_driver rte_vmxnet3_pmd = {
384         .id_table = pci_id_vmxnet3_map,
385         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
386         .probe = eth_vmxnet3_pci_probe,
387         .remove = eth_vmxnet3_pci_remove,
388 };
389
390 static int
391 vmxnet3_dev_configure(struct rte_eth_dev *dev)
392 {
393         const struct rte_memzone *mz;
394         struct vmxnet3_hw *hw = dev->data->dev_private;
395         size_t size;
396         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
397         uint64_t tx_offloads = dev->data->dev_conf.txmode.offloads;
398
399         PMD_INIT_FUNC_TRACE();
400
401         if ((rx_offloads & VMXNET3_RX_OFFLOAD_CAP) != rx_offloads) {
402                 RTE_LOG(ERR, PMD, "Requested RX offloads 0x%" PRIx64
403                         " do not match supported 0x%" PRIx64,
404                         rx_offloads, (uint64_t)VMXNET3_RX_OFFLOAD_CAP);
405                 return -ENOTSUP;
406         }
407
408         if ((tx_offloads & VMXNET3_TX_OFFLOAD_CAP) != tx_offloads) {
409                 RTE_LOG(ERR, PMD, "Requested TX offloads 0x%" PRIx64
410                         " do not match supported 0x%" PRIx64,
411                         tx_offloads, (uint64_t)VMXNET3_TX_OFFLOAD_CAP);
412                 return -ENOTSUP;
413         }
414
415         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
416             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
417                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
418                 return -EINVAL;
419         }
420
421         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
422                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
423                 return -EINVAL;
424         }
425
426         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
427                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
428
429         if (size > UINT16_MAX)
430                 return -EINVAL;
431
432         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
433         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
434
435         /*
436          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
437          * on current socket
438          */
439         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
440                               "shared", rte_socket_id(), 8, 1);
441
442         if (mz == NULL) {
443                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
444                 return -ENOMEM;
445         }
446         memset(mz->addr, 0, mz->len);
447
448         hw->shared = mz->addr;
449         hw->sharedPA = mz->iova;
450
451         /*
452          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
453          * on current socket.
454          *
455          * We cannot reuse this memzone from previous allocation as its size
456          * depends on the number of tx and rx queues, which could be different
457          * from one config to another.
458          */
459         mz = gpa_zone_reserve(dev, size, "queuedesc", rte_socket_id(),
460                               VMXNET3_QUEUE_DESC_ALIGN, 0);
461         if (mz == NULL) {
462                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
463                 return -ENOMEM;
464         }
465         memset(mz->addr, 0, mz->len);
466
467         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
468         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
469
470         hw->queueDescPA = mz->iova;
471         hw->queue_desc_len = (uint16_t)size;
472
473         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
474                 /* Allocate memory structure for UPT1_RSSConf and configure */
475                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf),
476                                       "rss_conf", rte_socket_id(),
477                                       RTE_CACHE_LINE_SIZE, 1);
478                 if (mz == NULL) {
479                         PMD_INIT_LOG(ERR,
480                                      "ERROR: Creating rss_conf structure zone");
481                         return -ENOMEM;
482                 }
483                 memset(mz->addr, 0, mz->len);
484
485                 hw->rss_conf = mz->addr;
486                 hw->rss_confPA = mz->iova;
487         }
488
489         return 0;
490 }
491
492 static void
493 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
494 {
495         uint32_t val;
496
497         PMD_INIT_LOG(DEBUG,
498                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
499                      addr[0], addr[1], addr[2],
500                      addr[3], addr[4], addr[5]);
501
502         memcpy(&val, addr, 4);
503         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
504
505         memcpy(&val, addr + 4, 2);
506         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
507 }
508
509 static int
510 vmxnet3_dev_setup_memreg(struct rte_eth_dev *dev)
511 {
512         struct vmxnet3_hw *hw = dev->data->dev_private;
513         Vmxnet3_DriverShared *shared = hw->shared;
514         Vmxnet3_CmdInfo *cmdInfo;
515         struct rte_mempool *mp[VMXNET3_MAX_RX_QUEUES];
516         uint8_t index[VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES];
517         uint32_t num, i, j, size;
518
519         if (hw->memRegsPA == 0) {
520                 const struct rte_memzone *mz;
521
522                 size = sizeof(Vmxnet3_MemRegs) +
523                         (VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES) *
524                         sizeof(Vmxnet3_MemoryRegion);
525
526                 mz = gpa_zone_reserve(dev, size, "memRegs", rte_socket_id(), 8,
527                                       1);
528                 if (mz == NULL) {
529                         PMD_INIT_LOG(ERR, "ERROR: Creating memRegs zone");
530                         return -ENOMEM;
531                 }
532                 memset(mz->addr, 0, mz->len);
533                 hw->memRegs = mz->addr;
534                 hw->memRegsPA = mz->iova;
535         }
536
537         num = hw->num_rx_queues;
538
539         for (i = 0; i < num; i++) {
540                 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
541
542                 mp[i] = rxq->mp;
543                 index[i] = 1 << i;
544         }
545
546         /*
547          * The same mempool could be used by multiple queues. In such a case,
548          * remove duplicate mempool entries. Only one entry is kept with
549          * bitmask indicating queues that are using this mempool.
550          */
551         for (i = 1; i < num; i++) {
552                 for (j = 0; j < i; j++) {
553                         if (mp[i] == mp[j]) {
554                                 mp[i] = NULL;
555                                 index[j] |= 1 << i;
556                                 break;
557                         }
558                 }
559         }
560
561         j = 0;
562         for (i = 0; i < num; i++) {
563                 if (mp[i] == NULL)
564                         continue;
565
566                 Vmxnet3_MemoryRegion *mr = &hw->memRegs->memRegs[j];
567
568                 mr->startPA =
569                         (uintptr_t)STAILQ_FIRST(&mp[i]->mem_list)->iova;
570                 mr->length = STAILQ_FIRST(&mp[i]->mem_list)->len <= INT32_MAX ?
571                         STAILQ_FIRST(&mp[i]->mem_list)->len : INT32_MAX;
572                 mr->txQueueBits = index[i];
573                 mr->rxQueueBits = index[i];
574
575                 PMD_INIT_LOG(INFO,
576                              "index: %u startPA: %" PRIu64 " length: %u, "
577                              "rxBits: %x",
578                              j, mr->startPA, mr->length, mr->rxQueueBits);
579                 j++;
580         }
581         hw->memRegs->numRegs = j;
582         PMD_INIT_LOG(INFO, "numRegs: %u", j);
583
584         size = sizeof(Vmxnet3_MemRegs) +
585                 (j - 1) * sizeof(Vmxnet3_MemoryRegion);
586
587         cmdInfo = &shared->cu.cmdInfo;
588         cmdInfo->varConf.confVer = 1;
589         cmdInfo->varConf.confLen = size;
590         cmdInfo->varConf.confPA = hw->memRegsPA;
591
592         return 0;
593 }
594
595 static int
596 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
597 {
598         struct rte_eth_conf port_conf = dev->data->dev_conf;
599         struct vmxnet3_hw *hw = dev->data->dev_private;
600         uint32_t mtu = dev->data->mtu;
601         Vmxnet3_DriverShared *shared = hw->shared;
602         Vmxnet3_DSDevRead *devRead = &shared->devRead;
603         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
604         uint32_t i;
605         int ret;
606
607         hw->mtu = mtu;
608
609         shared->magic = VMXNET3_REV1_MAGIC;
610         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
611
612         /* Setting up Guest OS information */
613         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
614                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64;
615         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
616         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
617         devRead->misc.driverInfo.uptVerSpt     = 1;
618
619         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
620         devRead->misc.queueDescPA  = hw->queueDescPA;
621         devRead->misc.queueDescLen = hw->queue_desc_len;
622         devRead->misc.numTxQueues  = hw->num_tx_queues;
623         devRead->misc.numRxQueues  = hw->num_rx_queues;
624
625         /*
626          * Set number of interrupts to 1
627          * PMD by default disables all the interrupts but this is MUST
628          * to activate device. It needs at least one interrupt for
629          * link events to handle
630          */
631         hw->num_intrs = devRead->intrConf.numIntrs = 1;
632         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
633
634         for (i = 0; i < hw->num_tx_queues; i++) {
635                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
636                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
637
638                 txq->shared = &hw->tqd_start[i];
639
640                 tqd->ctrl.txNumDeferred  = 0;
641                 tqd->ctrl.txThreshold    = 1;
642                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
643                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
644                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
645
646                 tqd->conf.txRingSize   = txq->cmd_ring.size;
647                 tqd->conf.compRingSize = txq->comp_ring.size;
648                 tqd->conf.dataRingSize = txq->data_ring.size;
649                 tqd->conf.txDataRingDescSize = txq->txdata_desc_size;
650                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
651                 tqd->status.stopped    = TRUE;
652                 tqd->status.error      = 0;
653                 memset(&tqd->stats, 0, sizeof(tqd->stats));
654         }
655
656         for (i = 0; i < hw->num_rx_queues; i++) {
657                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
658                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
659
660                 rxq->shared = &hw->rqd_start[i];
661
662                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
663                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
664                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
665
666                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
667                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
668                 rqd->conf.compRingSize    = rxq->comp_ring.size;
669                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
670                 if (VMXNET3_VERSION_GE_3(hw)) {
671                         rqd->conf.rxDataRingBasePA = rxq->data_ring.basePA;
672                         rqd->conf.rxDataRingDescSize = rxq->data_desc_size;
673                 }
674                 rqd->status.stopped       = TRUE;
675                 rqd->status.error         = 0;
676                 memset(&rqd->stats, 0, sizeof(rqd->stats));
677         }
678
679         /* RxMode set to 0 of VMXNET3_RXM_xxx */
680         devRead->rxFilterConf.rxMode = 0;
681
682         /* Setting up feature flags */
683         if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
684                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
685
686         if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO) {
687                 devRead->misc.uptFeatures |= VMXNET3_F_LRO;
688                 devRead->misc.maxNumRxSG = 0;
689         }
690
691         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
692                 ret = vmxnet3_rss_configure(dev);
693                 if (ret != VMXNET3_SUCCESS)
694                         return ret;
695
696                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
697                 devRead->rssConfDesc.confVer = 1;
698                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
699                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
700         }
701
702         ret = vmxnet3_dev_vlan_offload_set(dev,
703                         ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
704         if (ret)
705                 return ret;
706
707         vmxnet3_write_mac(hw, dev->data->mac_addrs->addr_bytes);
708
709         return VMXNET3_SUCCESS;
710 }
711
712 /*
713  * Configure device link speed and setup link.
714  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
715  * It returns 0 on success.
716  */
717 static int
718 vmxnet3_dev_start(struct rte_eth_dev *dev)
719 {
720         int ret;
721         struct vmxnet3_hw *hw = dev->data->dev_private;
722
723         PMD_INIT_FUNC_TRACE();
724
725         /* Save stats before it is reset by CMD_ACTIVATE */
726         vmxnet3_hw_stats_save(hw);
727
728         ret = vmxnet3_setup_driver_shared(dev);
729         if (ret != VMXNET3_SUCCESS)
730                 return ret;
731
732         /* check if lsc interrupt feature is enabled */
733         if (dev->data->dev_conf.intr_conf.lsc) {
734                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
735
736                 /* Setup interrupt callback  */
737                 rte_intr_callback_register(&pci_dev->intr_handle,
738                                            vmxnet3_interrupt_handler, dev);
739
740                 if (rte_intr_enable(&pci_dev->intr_handle) < 0) {
741                         PMD_INIT_LOG(ERR, "interrupt enable failed");
742                         return -EIO;
743                 }
744         }
745
746         /* Exchange shared data with device */
747         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
748                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
749         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
750                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
751
752         /* Activate device by register write */
753         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
754         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
755
756         if (ret != 0) {
757                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
758                 return -EINVAL;
759         }
760
761         /* Setup memory region for rx buffers */
762         ret = vmxnet3_dev_setup_memreg(dev);
763         if (ret == 0) {
764                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
765                                        VMXNET3_CMD_REGISTER_MEMREGS);
766                 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
767                 if (ret != 0)
768                         PMD_INIT_LOG(DEBUG,
769                                      "Failed in setup memory region cmd\n");
770                 ret = 0;
771         } else {
772                 PMD_INIT_LOG(DEBUG, "Failed to setup memory region\n");
773         }
774
775         /* Disable interrupts */
776         vmxnet3_disable_intr(hw);
777
778         /*
779          * Load RX queues with blank mbufs and update next2fill index for device
780          * Update RxMode of the device
781          */
782         ret = vmxnet3_dev_rxtx_init(dev);
783         if (ret != VMXNET3_SUCCESS) {
784                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
785                 return ret;
786         }
787
788         hw->adapter_stopped = FALSE;
789
790         /* Setting proper Rx Mode and issue Rx Mode Update command */
791         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
792
793         if (dev->data->dev_conf.intr_conf.lsc) {
794                 vmxnet3_enable_intr(hw);
795
796                 /*
797                  * Update link state from device since this won't be
798                  * done upon starting with lsc in use. This is done
799                  * only after enabling interrupts to avoid any race
800                  * where the link state could change without an
801                  * interrupt being fired.
802                  */
803                 __vmxnet3_dev_link_update(dev, 0);
804         }
805
806         return VMXNET3_SUCCESS;
807 }
808
809 /*
810  * Stop device: disable rx and tx functions to allow for reconfiguring.
811  */
812 static void
813 vmxnet3_dev_stop(struct rte_eth_dev *dev)
814 {
815         struct rte_eth_link link;
816         struct vmxnet3_hw *hw = dev->data->dev_private;
817
818         PMD_INIT_FUNC_TRACE();
819
820         if (hw->adapter_stopped == 1) {
821                 PMD_INIT_LOG(DEBUG, "Device already closed.");
822                 return;
823         }
824
825         /* disable interrupts */
826         vmxnet3_disable_intr(hw);
827
828         if (dev->data->dev_conf.intr_conf.lsc) {
829                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
830
831                 rte_intr_disable(&pci_dev->intr_handle);
832
833                 rte_intr_callback_unregister(&pci_dev->intr_handle,
834                                              vmxnet3_interrupt_handler, dev);
835         }
836
837         /* quiesce the device first */
838         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
839         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
840         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
841
842         /* reset the device */
843         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
844         PMD_INIT_LOG(DEBUG, "Device reset.");
845         hw->adapter_stopped = 0;
846
847         vmxnet3_dev_clear_queues(dev);
848
849         /* Clear recorded link status */
850         memset(&link, 0, sizeof(link));
851         link.link_duplex = ETH_LINK_FULL_DUPLEX;
852         link.link_speed = ETH_SPEED_NUM_10G;
853         link.link_autoneg = ETH_LINK_FIXED;
854         rte_eth_linkstatus_set(dev, &link);
855 }
856
857 /*
858  * Reset and stop device.
859  */
860 static void
861 vmxnet3_dev_close(struct rte_eth_dev *dev)
862 {
863         struct vmxnet3_hw *hw = dev->data->dev_private;
864
865         PMD_INIT_FUNC_TRACE();
866
867         vmxnet3_dev_stop(dev);
868         hw->adapter_stopped = 1;
869 }
870
871 static void
872 vmxnet3_hw_tx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
873                         struct UPT1_TxStats *res)
874 {
875 #define VMXNET3_UPDATE_TX_STAT(h, i, f, r)              \
876                 ((r)->f = (h)->tqd_start[(i)].stats.f + \
877                         (h)->saved_tx_stats[(i)].f)
878
879         VMXNET3_UPDATE_TX_STAT(hw, q, ucastPktsTxOK, res);
880         VMXNET3_UPDATE_TX_STAT(hw, q, mcastPktsTxOK, res);
881         VMXNET3_UPDATE_TX_STAT(hw, q, bcastPktsTxOK, res);
882         VMXNET3_UPDATE_TX_STAT(hw, q, ucastBytesTxOK, res);
883         VMXNET3_UPDATE_TX_STAT(hw, q, mcastBytesTxOK, res);
884         VMXNET3_UPDATE_TX_STAT(hw, q, bcastBytesTxOK, res);
885         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxError, res);
886         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxDiscard, res);
887
888 #undef VMXNET3_UPDATE_TX_STAT
889 }
890
891 static void
892 vmxnet3_hw_rx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
893                         struct UPT1_RxStats *res)
894 {
895 #define VMXNET3_UPDATE_RX_STAT(h, i, f, r)              \
896                 ((r)->f = (h)->rqd_start[(i)].stats.f + \
897                         (h)->saved_rx_stats[(i)].f)
898
899         VMXNET3_UPDATE_RX_STAT(hw, q, ucastPktsRxOK, res);
900         VMXNET3_UPDATE_RX_STAT(hw, q, mcastPktsRxOK, res);
901         VMXNET3_UPDATE_RX_STAT(hw, q, bcastPktsRxOK, res);
902         VMXNET3_UPDATE_RX_STAT(hw, q, ucastBytesRxOK, res);
903         VMXNET3_UPDATE_RX_STAT(hw, q, mcastBytesRxOK, res);
904         VMXNET3_UPDATE_RX_STAT(hw, q, bcastBytesRxOK, res);
905         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxError, res);
906         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxOutOfBuf, res);
907
908 #undef VMXNET3_UPDATE_RX_STATS
909 }
910
911 static void
912 vmxnet3_hw_stats_save(struct vmxnet3_hw *hw)
913 {
914         unsigned int i;
915
916         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
917
918         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
919
920         for (i = 0; i < hw->num_tx_queues; i++)
921                 vmxnet3_hw_tx_stats_get(hw, i, &hw->saved_tx_stats[i]);
922         for (i = 0; i < hw->num_rx_queues; i++)
923                 vmxnet3_hw_rx_stats_get(hw, i, &hw->saved_rx_stats[i]);
924 }
925
926 static int
927 vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
928                              struct rte_eth_xstat_name *xstats_names,
929                              unsigned int n)
930 {
931         unsigned int i, t, count = 0;
932         unsigned int nstats =
933                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
934                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
935
936         if (!xstats_names || n < nstats)
937                 return nstats;
938
939         for (i = 0; i < dev->data->nb_rx_queues; i++) {
940                 if (!dev->data->rx_queues[i])
941                         continue;
942
943                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
944                         snprintf(xstats_names[count].name,
945                                  sizeof(xstats_names[count].name),
946                                  "rx_q%u_%s", i,
947                                  vmxnet3_rxq_stat_strings[t].name);
948                         count++;
949                 }
950         }
951
952         for (i = 0; i < dev->data->nb_tx_queues; i++) {
953                 if (!dev->data->tx_queues[i])
954                         continue;
955
956                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
957                         snprintf(xstats_names[count].name,
958                                  sizeof(xstats_names[count].name),
959                                  "tx_q%u_%s", i,
960                                  vmxnet3_txq_stat_strings[t].name);
961                         count++;
962                 }
963         }
964
965         return count;
966 }
967
968 static int
969 vmxnet3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
970                        unsigned int n)
971 {
972         unsigned int i, t, count = 0;
973         unsigned int nstats =
974                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
975                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
976
977         if (n < nstats)
978                 return nstats;
979
980         for (i = 0; i < dev->data->nb_rx_queues; i++) {
981                 struct vmxnet3_rx_queue *rxq = dev->data->rx_queues[i];
982
983                 if (rxq == NULL)
984                         continue;
985
986                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
987                         xstats[count].value = *(uint64_t *)(((char *)&rxq->stats) +
988                                 vmxnet3_rxq_stat_strings[t].offset);
989                         xstats[count].id = count;
990                         count++;
991                 }
992         }
993
994         for (i = 0; i < dev->data->nb_tx_queues; i++) {
995                 struct vmxnet3_tx_queue *txq = dev->data->tx_queues[i];
996
997                 if (txq == NULL)
998                         continue;
999
1000                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
1001                         xstats[count].value = *(uint64_t *)(((char *)&txq->stats) +
1002                                 vmxnet3_txq_stat_strings[t].offset);
1003                         xstats[count].id = count;
1004                         count++;
1005                 }
1006         }
1007
1008         return count;
1009 }
1010
1011 static int
1012 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1013 {
1014         unsigned int i;
1015         struct vmxnet3_hw *hw = dev->data->dev_private;
1016         struct UPT1_TxStats txStats;
1017         struct UPT1_RxStats rxStats;
1018
1019         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
1020
1021         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
1022         for (i = 0; i < hw->num_tx_queues; i++) {
1023                 vmxnet3_hw_tx_stats_get(hw, i, &txStats);
1024
1025                 stats->q_opackets[i] = txStats.ucastPktsTxOK +
1026                         txStats.mcastPktsTxOK +
1027                         txStats.bcastPktsTxOK;
1028
1029                 stats->q_obytes[i] = txStats.ucastBytesTxOK +
1030                         txStats.mcastBytesTxOK +
1031                         txStats.bcastBytesTxOK;
1032
1033                 stats->opackets += stats->q_opackets[i];
1034                 stats->obytes += stats->q_obytes[i];
1035                 stats->oerrors += txStats.pktsTxError + txStats.pktsTxDiscard;
1036         }
1037
1038         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
1039         for (i = 0; i < hw->num_rx_queues; i++) {
1040                 vmxnet3_hw_rx_stats_get(hw, i, &rxStats);
1041
1042                 stats->q_ipackets[i] = rxStats.ucastPktsRxOK +
1043                         rxStats.mcastPktsRxOK +
1044                         rxStats.bcastPktsRxOK;
1045
1046                 stats->q_ibytes[i] = rxStats.ucastBytesRxOK +
1047                         rxStats.mcastBytesRxOK +
1048                         rxStats.bcastBytesRxOK;
1049
1050                 stats->ipackets += stats->q_ipackets[i];
1051                 stats->ibytes += stats->q_ibytes[i];
1052
1053                 stats->q_errors[i] = rxStats.pktsRxError;
1054                 stats->ierrors += rxStats.pktsRxError;
1055                 stats->imissed += rxStats.pktsRxOutOfBuf;
1056         }
1057
1058         return 0;
1059 }
1060
1061 static void
1062 vmxnet3_dev_info_get(struct rte_eth_dev *dev __rte_unused,
1063                      struct rte_eth_dev_info *dev_info)
1064 {
1065         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
1066         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
1067         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
1068         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
1069         dev_info->speed_capa = ETH_LINK_SPEED_10G;
1070         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
1071
1072         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
1073         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
1074
1075         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
1076                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
1077                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
1078                 .nb_align = 1,
1079         };
1080
1081         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
1082                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
1083                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
1084                 .nb_align = 1,
1085                 .nb_seg_max = VMXNET3_TX_MAX_SEG,
1086                 .nb_mtu_seg_max = VMXNET3_MAX_TXD_PER_PKT,
1087         };
1088
1089         dev_info->rx_offload_capa = VMXNET3_RX_OFFLOAD_CAP;
1090         dev_info->rx_queue_offload_capa = 0;
1091         dev_info->tx_offload_capa = VMXNET3_TX_OFFLOAD_CAP;
1092         dev_info->tx_queue_offload_capa = 0;
1093 }
1094
1095 static const uint32_t *
1096 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1097 {
1098         static const uint32_t ptypes[] = {
1099                 RTE_PTYPE_L3_IPV4_EXT,
1100                 RTE_PTYPE_L3_IPV4,
1101                 RTE_PTYPE_UNKNOWN
1102         };
1103
1104         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
1105                 return ptypes;
1106         return NULL;
1107 }
1108
1109 static int
1110 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
1111 {
1112         struct vmxnet3_hw *hw = dev->data->dev_private;
1113
1114         ether_addr_copy(mac_addr, (struct ether_addr *)(hw->perm_addr));
1115         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
1116         return 0;
1117 }
1118
1119 /* return 0 means link status changed, -1 means not changed */
1120 static int
1121 __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
1122                           __rte_unused int wait_to_complete)
1123 {
1124         struct vmxnet3_hw *hw = dev->data->dev_private;
1125         struct rte_eth_link link;
1126         uint32_t ret;
1127
1128         memset(&link, 0, sizeof(link));
1129
1130         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
1131         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
1132
1133         if (ret & 0x1)
1134                 link.link_status = ETH_LINK_UP;
1135         link.link_duplex = ETH_LINK_FULL_DUPLEX;
1136         link.link_speed = ETH_SPEED_NUM_10G;
1137         link.link_autoneg = ETH_LINK_FIXED;
1138
1139         return rte_eth_linkstatus_set(dev, &link);
1140 }
1141
1142 static int
1143 vmxnet3_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
1144 {
1145         /* Link status doesn't change for stopped dev */
1146         if (dev->data->dev_started == 0)
1147                 return -1;
1148
1149         return __vmxnet3_dev_link_update(dev, wait_to_complete);
1150 }
1151
1152 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
1153 static void
1154 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set)
1155 {
1156         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1157
1158         if (set)
1159                 rxConf->rxMode = rxConf->rxMode | feature;
1160         else
1161                 rxConf->rxMode = rxConf->rxMode & (~feature);
1162
1163         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
1164 }
1165
1166 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1167 static void
1168 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
1169 {
1170         struct vmxnet3_hw *hw = dev->data->dev_private;
1171         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1172
1173         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
1174         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
1175
1176         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1177                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1178 }
1179
1180 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1181 static void
1182 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
1183 {
1184         struct vmxnet3_hw *hw = dev->data->dev_private;
1185         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1186         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1187
1188         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1189                 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1190         else
1191                 memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1192         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
1193         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1194                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1195 }
1196
1197 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1198 static void
1199 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
1200 {
1201         struct vmxnet3_hw *hw = dev->data->dev_private;
1202
1203         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
1204 }
1205
1206 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1207 static void
1208 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
1209 {
1210         struct vmxnet3_hw *hw = dev->data->dev_private;
1211
1212         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
1213 }
1214
1215 /* Enable/disable filter on vlan */
1216 static int
1217 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
1218 {
1219         struct vmxnet3_hw *hw = dev->data->dev_private;
1220         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1221         uint32_t *vf_table = rxConf->vfTable;
1222
1223         /* save state for restore */
1224         if (on)
1225                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1226         else
1227                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1228
1229         /* don't change active filter if in promiscuous mode */
1230         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
1231                 return 0;
1232
1233         /* set in hardware */
1234         if (on)
1235                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
1236         else
1237                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
1238
1239         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1240                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1241         return 0;
1242 }
1243
1244 static int
1245 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1246 {
1247         struct vmxnet3_hw *hw = dev->data->dev_private;
1248         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
1249         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
1250         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1251
1252         if (mask & ETH_VLAN_STRIP_MASK) {
1253                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1254                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1255                 else
1256                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1257
1258                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1259                                        VMXNET3_CMD_UPDATE_FEATURE);
1260         }
1261
1262         if (mask & ETH_VLAN_FILTER_MASK) {
1263                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1264                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1265                 else
1266                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1267
1268                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1269                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1270         }
1271
1272         return 0;
1273 }
1274
1275 static void
1276 vmxnet3_process_events(struct rte_eth_dev *dev)
1277 {
1278         struct vmxnet3_hw *hw = dev->data->dev_private;
1279         uint32_t events = hw->shared->ecr;
1280
1281         if (!events)
1282                 return;
1283
1284         /*
1285          * ECR bits when written with 1b are cleared. Hence write
1286          * events back to ECR so that the bits which were set will be reset.
1287          */
1288         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
1289
1290         /* Check if link state has changed */
1291         if (events & VMXNET3_ECR_LINK) {
1292                 PMD_DRV_LOG(DEBUG, "Process events: VMXNET3_ECR_LINK event");
1293                 if (vmxnet3_dev_link_update(dev, 0) == 0)
1294                         _rte_eth_dev_callback_process(dev,
1295                                                       RTE_ETH_EVENT_INTR_LSC,
1296                                                       NULL);
1297         }
1298
1299         /* Check if there is an error on xmit/recv queues */
1300         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
1301                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1302                                        VMXNET3_CMD_GET_QUEUE_STATUS);
1303
1304                 if (hw->tqd_start->status.stopped)
1305                         PMD_DRV_LOG(ERR, "tq error 0x%x",
1306                                     hw->tqd_start->status.error);
1307
1308                 if (hw->rqd_start->status.stopped)
1309                         PMD_DRV_LOG(ERR, "rq error 0x%x",
1310                                      hw->rqd_start->status.error);
1311
1312                 /* Reset the device */
1313                 /* Have to reset the device */
1314         }
1315
1316         if (events & VMXNET3_ECR_DIC)
1317                 PMD_DRV_LOG(DEBUG, "Device implementation change event.");
1318
1319         if (events & VMXNET3_ECR_DEBUG)
1320                 PMD_DRV_LOG(DEBUG, "Debug event generated by device.");
1321 }
1322
1323 static void
1324 vmxnet3_interrupt_handler(void *param)
1325 {
1326         struct rte_eth_dev *dev = param;
1327         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
1328
1329         vmxnet3_process_events(dev);
1330
1331         if (rte_intr_enable(&pci_dev->intr_handle) < 0)
1332                 PMD_DRV_LOG(ERR, "interrupt enable failed");
1333 }
1334
1335 RTE_PMD_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd);
1336 RTE_PMD_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);
1337 RTE_PMD_REGISTER_KMOD_DEP(net_vmxnet3, "* igb_uio | uio_pci_generic | vfio-pci");
1338
1339 RTE_INIT(vmxnet3_init_log);
1340 static void
1341 vmxnet3_init_log(void)
1342 {
1343         vmxnet3_logtype_init = rte_log_register("pmd.net.vmxnet3.init");
1344         if (vmxnet3_logtype_init >= 0)
1345                 rte_log_set_level(vmxnet3_logtype_init, RTE_LOG_NOTICE);
1346         vmxnet3_logtype_driver = rte_log_register("pmd.net.vmxnet3.driver");
1347         if (vmxnet3_logtype_driver >= 0)
1348                 rte_log_set_level(vmxnet3_logtype_driver, RTE_LOG_NOTICE);
1349 }